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Dependencies:   mbed

inc/adc_defs.h@54:660af33fa930, 2019-11-14 (annotated)

Committer:
Slord2142
Date:
Thu Nov 14 19:51:37 2019 +0000
Revision:
54:660af33fa930
Parent:
33:6c7364ea360f 
Unlocked SCL for 48V after 12V was deemed to be working properly

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mfwic 11:01dcfb29fbc4 1 //-------------------------------------------------------------------------------
mfwic 11:01dcfb29fbc4 2 //
mfwic 11:01dcfb29fbc4 3 // Treehouse Designs Inc.
mfwic 11:01dcfb29fbc4 4 // Colorado Springs, Colorado
mfwic 11:01dcfb29fbc4 5 //
mfwic 11:01dcfb29fbc4 6 // Copyright (c) 2016 by Treehouse Designs Inc.
mfwic 11:01dcfb29fbc4 7 // Copyright (c) 2018 by Agility Power Systems Inc.
mfwic 11:01dcfb29fbc4 8 //
mfwic 11:01dcfb29fbc4 9 // This code is the property of Treehouse Designs, Inc. (Treehouse) and
mfwic 11:01dcfb29fbc4 10 // Agility Power Systems Inc. (Agility) and may not be redistributed
mfwic 11:01dcfb29fbc4 11 // in any form without prior written permission from
mfwic 11:01dcfb29fbc4 12 // both copyright holders, Treehouse and Agility.
mfwic 11:01dcfb29fbc4 13 //
mfwic 11:01dcfb29fbc4 14 // The above copyright notice and this permission notice shall be included in
mfwic 11:01dcfb29fbc4 15 // all copies or substantial portions of the Software.
mfwic 11:01dcfb29fbc4 16 //
mfwic 11:01dcfb29fbc4 17 //
mfwic 11:01dcfb29fbc4 18 //-------------------------------------------------------------------------------
mfwic 11:01dcfb29fbc4 19 //
mfwic 11:01dcfb29fbc4 20 // REVISION HISTORY:
mfwic 11:01dcfb29fbc4 21 //
mfwic 11:01dcfb29fbc4 22 // $Author: $
mfwic 11:01dcfb29fbc4 23 // $Rev: $
mfwic 11:01dcfb29fbc4 24 // $Date: $
mfwic 11:01dcfb29fbc4 25 // $URL: $
mfwic 11:01dcfb29fbc4 26 //
mfwic 11:01dcfb29fbc4 27 //-------------------------------------------------------------------------------
mfwic 11:01dcfb29fbc4 28
mfwic 15:aed8f326c949 29 #ifndef ADC_DEFS_H
mfwic 15:aed8f326c949 30 #define ADC_DEFS_H
mfwic 15:aed8f326c949 31
mfwic 11:01dcfb29fbc4 32 #include "parameters.h"
mfwic 11:01dcfb29fbc4 33
mfwic 11:01dcfb29fbc4 34 const unsigned int ADC_SCALE_FACTOR = ADC_MAX_VALUE/2;
mfwic 11:01dcfb29fbc4 35
Slord2142 33:6c7364ea360f 36 #define VOLTAGE_TARG_VALUE 1.65/*
mfwic 11:01dcfb29fbc4 37 #define VOLTAGE_48_ACTUAL_VALUE 1.51
mfwic 11:01dcfb29fbc4 38 #define VOLTAGE_24_ACTUAL_VALUE 1.55
Slord2142 33:6c7364ea360f 39 #define VOLTAGE_12_ACTUAL_VALUE 1.53*/
Slord2142 33:6c7364ea360f 40 extern double VOLTAGE_48_ACTUAL_VALUE;
Slord2142 33:6c7364ea360f 41 extern double VOLTAGE_24_ACTUAL_VALUE;
Slord2142 33:6c7364ea360f 42 extern double VOLTAGE_12_ACTUAL_VALUE;
Slord2142 33:6c7364ea360f 43 extern double VOLTAGE_48_OFFSET;
Slord2142 33:6c7364ea360f 44 extern double VOLTAGE_24_OFFSET;
Slord2142 33:6c7364ea360f 45 extern double VOLTAGE_12_OFFSET;
Slord2142 33:6c7364ea360f 46 extern double VOLTAGE_48_CORRECTION;
Slord2142 33:6c7364ea360f 47 extern double VOLTAGE_24_CORRECTION;
Slord2142 33:6c7364ea360f 48 extern double VOLTAGE_12_CORRECTION;
Slord2142 33:6c7364ea360f 49 extern double VOLTAGE_48_FACTOR;
Slord2142 33:6c7364ea360f 50 extern double VOLTAGE_24_FACTOR;
Slord2142 33:6c7364ea360f 51 extern double VOLTAGE_12_FACTOR;
mfwic 11:01dcfb29fbc4 52
Slord2142 33:6c7364ea360f 53 /*
mfwic 25:8bcc8bea0e31 54 #define CURRENT_48_DIV_FACTOR5 -370
mfwic 25:8bcc8bea0e31 55 #define CURRENT_48_DIV_FACTOR4 -570
mfwic 25:8bcc8bea0e31 56 #define CURRENT_48_DIV_FACTOR3 -740
mfwic 25:8bcc8bea0e31 57 #define CURRENT_48_DIV_FACTOR2 -948
mfwic 25:8bcc8bea0e31 58 #define CURRENT_48_DIV_FACTOR1 -1541
mfwic 25:8bcc8bea0e31 59 #define CURRENT_48_DIV_FACTOR0 -1610
mfwic 25:8bcc8bea0e31 60
mfwic 25:8bcc8bea0e31 61 #define CURRENT_48_DIV_THRESH5 3000
mfwic 25:8bcc8bea0e31 62 #define CURRENT_48_DIV_THRESH4 2500
mfwic 25:8bcc8bea0e31 63 #define CURRENT_48_DIV_THRESH3 2000
mfwic 25:8bcc8bea0e31 64 #define CURRENT_48_DIV_THRESH2 1500
mfwic 25:8bcc8bea0e31 65 #define CURRENT_48_DIV_THRESH1 500
mfwic 25:8bcc8bea0e31 66
mfwic 18:78e982f31c6b 67 #define CURRENT_24_DIV_FACTOR -376
mfwic 25:8bcc8bea0e31 68
mfwic 26:55e8e1a9cc84 69 #define CURRENT_12_DIV_FACTOR5 -188
mfwic 26:55e8e1a9cc84 70 #define CURRENT_12_DIV_FACTOR4 -186
mfwic 26:55e8e1a9cc84 71 #define CURRENT_12_DIV_FACTOR3 -182
mfwic 26:55e8e1a9cc84 72 #define CURRENT_12_DIV_FACTOR2 -177
mfwic 26:55e8e1a9cc84 73 #define CURRENT_12_DIV_FACTOR1 -179
mfwic 26:55e8e1a9cc84 74 #define CURRENT_12_DIV_FACTOR0 -175
mfwic 26:55e8e1a9cc84 75
mfwic 26:55e8e1a9cc84 76 #define CURRENT_12_DIV_THRESH5 1600
mfwic 26:55e8e1a9cc84 77 #define CURRENT_12_DIV_THRESH4 800
mfwic 26:55e8e1a9cc84 78 #define CURRENT_12_DIV_THRESH3 600
mfwic 26:55e8e1a9cc84 79 #define CURRENT_12_DIV_THRESH2 400
mfwic 26:55e8e1a9cc84 80 #define CURRENT_12_DIV_THRESH1 200
Slord2142 33:6c7364ea360f 81 */
Slord2142 33:6c7364ea360f 82 extern signed int CURRENT_48_DIV_FACTOR5;
Slord2142 33:6c7364ea360f 83 extern signed int CURRENT_48_DIV_FACTOR4;
Slord2142 33:6c7364ea360f 84 extern signed int CURRENT_48_DIV_FACTOR3;
Slord2142 33:6c7364ea360f 85 extern signed int CURRENT_48_DIV_FACTOR2;
Slord2142 33:6c7364ea360f 86 extern signed int CURRENT_48_DIV_FACTOR1;
Slord2142 33:6c7364ea360f 87 extern signed int CURRENT_48_DIV_FACTOR0;
mfwic 25:8bcc8bea0e31 88
Slord2142 33:6c7364ea360f 89 extern unsigned int CURRENT_48_DIV_THRESH5;
Slord2142 33:6c7364ea360f 90 extern unsigned int CURRENT_48_DIV_THRESH4;
Slord2142 33:6c7364ea360f 91 extern unsigned int CURRENT_48_DIV_THRESH3;
Slord2142 33:6c7364ea360f 92 extern unsigned int CURRENT_48_DIV_THRESH2;
Slord2142 33:6c7364ea360f 93 extern unsigned int CURRENT_48_DIV_THRESH1;
Slord2142 33:6c7364ea360f 94
Slord2142 33:6c7364ea360f 95 extern signed int CURRENT_24_DIV_FACTOR;
Slord2142 33:6c7364ea360f 96
Slord2142 33:6c7364ea360f 97 extern signed int CURRENT_12_DIV_FACTOR5;
Slord2142 33:6c7364ea360f 98 extern signed int CURRENT_12_DIV_FACTOR4;
Slord2142 33:6c7364ea360f 99 extern signed int CURRENT_12_DIV_FACTOR3;
Slord2142 33:6c7364ea360f 100 extern signed int CURRENT_12_DIV_FACTOR2;
Slord2142 33:6c7364ea360f 101 extern signed int CURRENT_12_DIV_FACTOR1;
Slord2142 33:6c7364ea360f 102 extern signed int CURRENT_12_DIV_FACTOR0;
Slord2142 33:6c7364ea360f 103
Slord2142 33:6c7364ea360f 104 extern unsigned int CURRENT_12_DIV_THRESH5;
Slord2142 33:6c7364ea360f 105 extern unsigned int CURRENT_12_DIV_THRESH4;
Slord2142 33:6c7364ea360f 106 extern unsigned int CURRENT_12_DIV_THRESH3;
Slord2142 33:6c7364ea360f 107 extern unsigned int CURRENT_12_DIV_THRESH2;
Slord2142 33:6c7364ea360f 108 extern unsigned int CURRENT_12_DIV_THRESH1;
Slord2142 33:6c7364ea360f 109
Slord2142 33:6c7364ea360f 110
Slord2142 54:660af33fa930 111 extern double CURRENT_48_CORRECTION0;
Slord2142 54:660af33fa930 112 extern double CURRENT_48_CORRECTION1;
Slord2142 54:660af33fa930 113 extern double CURRENT_48_CORRECTION2;
Slord2142 54:660af33fa930 114 extern double CURRENT_48_CORRECTION3;
Slord2142 54:660af33fa930 115 extern double CURRENT_48_CORRECTION4;
Slord2142 54:660af33fa930 116 extern double CURRENT_48_CORRECTION5;
Slord2142 33:6c7364ea360f 117 extern double CURRENT_12_CORRECTION0;
Slord2142 33:6c7364ea360f 118 extern double CURRENT_12_CORRECTION1;
Slord2142 33:6c7364ea360f 119 extern double CURRENT_12_CORRECTION2;
Slord2142 33:6c7364ea360f 120 extern double CURRENT_12_CORRECTION3;
Slord2142 33:6c7364ea360f 121 extern double CURRENT_12_CORRECTION4;
Slord2142 33:6c7364ea360f 122 extern double CURRENT_12_CORRECTION5;
mfwic 22:2c37ac12746e 123
mfwic 24:078f62c8d0ed 124 //const double ROW_CORRECTION_FACTOR = 1.017; // 2.6W/chip avg.
mfwic 24:078f62c8d0ed 125 const double ROW_CORRECTION_FACTOR = 0.85; // 3W/chip avg.
mfwic 26:55e8e1a9cc84 126 #define ROW_HYSTERESIS 1
mfwic 15:aed8f326c949 127
mfwic 17:454afe56eedb 128 extern double CURRENT_48_OFFSET;
mfwic 17:454afe56eedb 129 extern double CURRENT_24_OFFSET;
mfwic 17:454afe56eedb 130 extern double CURRENT_12_OFFSET;
mfwic 17:454afe56eedb 131
mfwic 15:aed8f326c949 132 #endif