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EncoderCounter.cpp@0:da791f233257, 2018-05-11 (annotated)

Committer:
Kiwicjam
Date:
Fri May 11 12:21:19 2018 +0000
Revision:
0:da791f233257
start of rome2 p5;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kiwicjam 0:da791f233257 1 /*
Kiwicjam 0:da791f233257 2 * EncoderCounter.cpp
Kiwicjam 0:da791f233257 3 * Copyright (c) 2018, ZHAW
Kiwicjam 0:da791f233257 4 * All rights reserved.
Kiwicjam 0:da791f233257 5 */
Kiwicjam 0:da791f233257 6
Kiwicjam 0:da791f233257 7 #include "EncoderCounter.h"
Kiwicjam 0:da791f233257 8
Kiwicjam 0:da791f233257 9 using namespace std;
Kiwicjam 0:da791f233257 10
Kiwicjam 0:da791f233257 11 /**
Kiwicjam 0:da791f233257 12 * Creates and initializes the driver to read the quadrature
Kiwicjam 0:da791f233257 13 * encoder counter of the STM32 microcontroller.
Kiwicjam 0:da791f233257 14 * @param a the input pin for the channel A.
Kiwicjam 0:da791f233257 15 * @param b the input pin for the channel B.
Kiwicjam 0:da791f233257 16 */
Kiwicjam 0:da791f233257 17 EncoderCounter::EncoderCounter(PinName a, PinName b) {
Kiwicjam 0:da791f233257 18
Kiwicjam 0:da791f233257 19 // check pins
Kiwicjam 0:da791f233257 20
Kiwicjam 0:da791f233257 21 if ((a == PA_0) && (b == PA_1)) {
Kiwicjam 0:da791f233257 22
Kiwicjam 0:da791f233257 23 // pinmap OK for TIM2 CH1 and CH2
Kiwicjam 0:da791f233257 24
Kiwicjam 0:da791f233257 25 TIM = TIM2;
Kiwicjam 0:da791f233257 26
Kiwicjam 0:da791f233257 27 // configure general purpose I/O registers
Kiwicjam 0:da791f233257 28
Kiwicjam 0:da791f233257 29 GPIOA->MODER &= ~GPIO_MODER_MODER0; // reset port A0
Kiwicjam 0:da791f233257 30 GPIOA->MODER |= GPIO_MODER_MODER0_1; // set alternate mode of port A0
Kiwicjam 0:da791f233257 31 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR0; // reset pull-up/pull-down on port A0
Kiwicjam 0:da791f233257 32 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR0_1; // set input as pull-down
Kiwicjam 0:da791f233257 33 GPIOA->AFR[0] &= ~(0xF << 4*0); // reset alternate function of port A0
Kiwicjam 0:da791f233257 34 GPIOA->AFR[0] |= 1 << 4*0; // set alternate funtion 1 of port A0
Kiwicjam 0:da791f233257 35
Kiwicjam 0:da791f233257 36 GPIOA->MODER &= ~GPIO_MODER_MODER1; // reset port A1
Kiwicjam 0:da791f233257 37 GPIOA->MODER |= GPIO_MODER_MODER1_1; // set alternate mode of port A1
Kiwicjam 0:da791f233257 38 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR1; // reset pull-up/pull-down on port A1
Kiwicjam 0:da791f233257 39 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR1_1; // set input as pull-down
Kiwicjam 0:da791f233257 40 GPIOA->AFR[0] &= ~(0xF << 4*1); // reset alternate function of port A1
Kiwicjam 0:da791f233257 41 GPIOA->AFR[0] |= 1 << 4*1; // set alternate funtion 1 of port A1
Kiwicjam 0:da791f233257 42
Kiwicjam 0:da791f233257 43 // configure reset and clock control registers
Kiwicjam 0:da791f233257 44
Kiwicjam 0:da791f233257 45 RCC->APB1RSTR |= RCC_APB1RSTR_TIM2RST; //reset TIM2 controller
Kiwicjam 0:da791f233257 46 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM2RST;
Kiwicjam 0:da791f233257 47
Kiwicjam 0:da791f233257 48 RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // TIM2 clock enable
Kiwicjam 0:da791f233257 49
Kiwicjam 0:da791f233257 50 } else if ((a == PA_6) && (b == PC_7)) {
Kiwicjam 0:da791f233257 51
Kiwicjam 0:da791f233257 52 // pinmap OK for TIM3 CH1 and CH2
Kiwicjam 0:da791f233257 53
Kiwicjam 0:da791f233257 54 TIM = TIM3;
Kiwicjam 0:da791f233257 55
Kiwicjam 0:da791f233257 56 // configure reset and clock control registers
Kiwicjam 0:da791f233257 57
Kiwicjam 0:da791f233257 58 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // manually enable port C (port A enabled by mbed library)
Kiwicjam 0:da791f233257 59
Kiwicjam 0:da791f233257 60 // configure general purpose I/O registers
Kiwicjam 0:da791f233257 61
Kiwicjam 0:da791f233257 62 GPIOA->MODER &= ~GPIO_MODER_MODER6; // reset port A6
Kiwicjam 0:da791f233257 63 GPIOA->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port A6
Kiwicjam 0:da791f233257 64 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port A6
Kiwicjam 0:da791f233257 65 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
Kiwicjam 0:da791f233257 66 GPIOA->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port A6
Kiwicjam 0:da791f233257 67 GPIOA->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port A6
Kiwicjam 0:da791f233257 68
Kiwicjam 0:da791f233257 69 GPIOC->MODER &= ~GPIO_MODER_MODER7; // reset port C7
Kiwicjam 0:da791f233257 70 GPIOC->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port C7
Kiwicjam 0:da791f233257 71 GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port C7
Kiwicjam 0:da791f233257 72 GPIOC->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
Kiwicjam 0:da791f233257 73 GPIOC->AFR[0] &= ~0xF0000000; // reset alternate function of port C7
Kiwicjam 0:da791f233257 74 GPIOC->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port C7
Kiwicjam 0:da791f233257 75
Kiwicjam 0:da791f233257 76 // configure reset and clock control registers
Kiwicjam 0:da791f233257 77
Kiwicjam 0:da791f233257 78 RCC->APB1RSTR |= RCC_APB1RSTR_TIM3RST; //reset TIM3 controller
Kiwicjam 0:da791f233257 79 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM3RST;
Kiwicjam 0:da791f233257 80
Kiwicjam 0:da791f233257 81 RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // TIM3 clock enable
Kiwicjam 0:da791f233257 82
Kiwicjam 0:da791f233257 83 } else if ((a == PB_6) && (b == PB_7)) {
Kiwicjam 0:da791f233257 84
Kiwicjam 0:da791f233257 85 // pinmap OK for TIM4 CH1 and CH2
Kiwicjam 0:da791f233257 86
Kiwicjam 0:da791f233257 87 TIM = TIM4;
Kiwicjam 0:da791f233257 88
Kiwicjam 0:da791f233257 89 // configure reset and clock control registers
Kiwicjam 0:da791f233257 90
Kiwicjam 0:da791f233257 91 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // manually enable port B (port A enabled by mbed library)
Kiwicjam 0:da791f233257 92
Kiwicjam 0:da791f233257 93 // configure general purpose I/O registers
Kiwicjam 0:da791f233257 94
Kiwicjam 0:da791f233257 95 GPIOB->MODER &= ~GPIO_MODER_MODER6; // reset port B6
Kiwicjam 0:da791f233257 96 GPIOB->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port B6
Kiwicjam 0:da791f233257 97 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port B6
Kiwicjam 0:da791f233257 98 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
Kiwicjam 0:da791f233257 99 GPIOB->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port B6
Kiwicjam 0:da791f233257 100 GPIOB->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port B6
Kiwicjam 0:da791f233257 101
Kiwicjam 0:da791f233257 102 GPIOB->MODER &= ~GPIO_MODER_MODER7; // reset port B7
Kiwicjam 0:da791f233257 103 GPIOB->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port B7
Kiwicjam 0:da791f233257 104 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port B7
Kiwicjam 0:da791f233257 105 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
Kiwicjam 0:da791f233257 106 GPIOB->AFR[0] &= ~0xF0000000; // reset alternate function of port B7
Kiwicjam 0:da791f233257 107 GPIOB->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port B7
Kiwicjam 0:da791f233257 108
Kiwicjam 0:da791f233257 109 // configure reset and clock control registers
Kiwicjam 0:da791f233257 110
Kiwicjam 0:da791f233257 111 RCC->APB1RSTR |= RCC_APB1RSTR_TIM4RST; //reset TIM4 controller
Kiwicjam 0:da791f233257 112 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM4RST;
Kiwicjam 0:da791f233257 113
Kiwicjam 0:da791f233257 114 RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // TIM4 clock enable
Kiwicjam 0:da791f233257 115
Kiwicjam 0:da791f233257 116 } else {
Kiwicjam 0:da791f233257 117
Kiwicjam 0:da791f233257 118 printf("pinmap not found for peripheral\n");
Kiwicjam 0:da791f233257 119 }
Kiwicjam 0:da791f233257 120
Kiwicjam 0:da791f233257 121 // configure general purpose timer 3 or 4
Kiwicjam 0:da791f233257 122
Kiwicjam 0:da791f233257 123 TIM->CR1 = 0x0000; // counter disable
Kiwicjam 0:da791f233257 124 TIM->CR2 = 0x0000; // reset master mode selection
Kiwicjam 0:da791f233257 125 TIM->SMCR = TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0; // counting on both TI1 & TI2 edges
Kiwicjam 0:da791f233257 126 TIM->CCMR1 = TIM_CCMR1_CC2S_0 | TIM_CCMR1_CC1S_0;
Kiwicjam 0:da791f233257 127 TIM->CCMR2 = 0x0000; // reset capture mode register 2
Kiwicjam 0:da791f233257 128 TIM->CCER = TIM_CCER_CC2E | TIM_CCER_CC1E;
Kiwicjam 0:da791f233257 129 TIM->CNT = 0x0000; // reset counter value
Kiwicjam 0:da791f233257 130 TIM->ARR = 0xFFFF; // auto reload register
Kiwicjam 0:da791f233257 131 TIM->CR1 = TIM_CR1_CEN; // counter enable
Kiwicjam 0:da791f233257 132 }
Kiwicjam 0:da791f233257 133
Kiwicjam 0:da791f233257 134 EncoderCounter::~EncoderCounter() {}
Kiwicjam 0:da791f233257 135
Kiwicjam 0:da791f233257 136 /**
Kiwicjam 0:da791f233257 137 * Resets the counter value to zero.
Kiwicjam 0:da791f233257 138 */
Kiwicjam 0:da791f233257 139 void EncoderCounter::reset() {
Kiwicjam 0:da791f233257 140
Kiwicjam 0:da791f233257 141 TIM->CNT = 0x0000;
Kiwicjam 0:da791f233257 142 }
Kiwicjam 0:da791f233257 143
Kiwicjam 0:da791f233257 144 /**
Kiwicjam 0:da791f233257 145 * Resets the counter value to a given offset value.
Kiwicjam 0:da791f233257 146 * @param offset the offset value to reset the counter to.
Kiwicjam 0:da791f233257 147 */
Kiwicjam 0:da791f233257 148 void EncoderCounter::reset(short offset) {
Kiwicjam 0:da791f233257 149
Kiwicjam 0:da791f233257 150 TIM->CNT = -offset;
Kiwicjam 0:da791f233257 151 }
Kiwicjam 0:da791f233257 152
Kiwicjam 0:da791f233257 153 /**
Kiwicjam 0:da791f233257 154 * Reads the quadrature encoder counter value.
Kiwicjam 0:da791f233257 155 * @return the quadrature encoder counter as a signed 16-bit integer value.
Kiwicjam 0:da791f233257 156 */
Kiwicjam 0:da791f233257 157 short EncoderCounter::read() {
Kiwicjam 0:da791f233257 158
Kiwicjam 0:da791f233257 159 return (short)(-TIM->CNT);
Kiwicjam 0:da791f233257 160 }
Kiwicjam 0:da791f233257 161
Kiwicjam 0:da791f233257 162 /**
Kiwicjam 0:da791f233257 163 * The empty operator is a shorthand notation of the <code>read()</code> method.
Kiwicjam 0:da791f233257 164 */
Kiwicjam 0:da791f233257 165 EncoderCounter::operator short() {
Kiwicjam 0:da791f233257 166
Kiwicjam 0:da791f233257 167 return read();
Kiwicjam 0:da791f233257 168 }
Kiwicjam 0:da791f233257 169