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P2 halbfertig

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EncoderCounter.cpp@0:bb408887ab78, 2018-03-09 (annotated)

Committer:
kueenste
Date:
Fri Mar 09 15:29:36 2018 +0000
Revision:
0:bb408887ab78
P2_unfertig;

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UserRevisionLine numberNew contents of line
kueenste 0:bb408887ab78 1 /*
kueenste 0:bb408887ab78 2 * EncoderCounter.cpp
kueenste 0:bb408887ab78 3 * Copyright (c) 2018, ZHAW
kueenste 0:bb408887ab78 4 * All rights reserved.
kueenste 0:bb408887ab78 5 */
kueenste 0:bb408887ab78 6
kueenste 0:bb408887ab78 7 #include "EncoderCounter.h"
kueenste 0:bb408887ab78 8
kueenste 0:bb408887ab78 9 using namespace std;
kueenste 0:bb408887ab78 10
kueenste 0:bb408887ab78 11 /**
kueenste 0:bb408887ab78 12 * Creates and initializes the driver to read the quadrature
kueenste 0:bb408887ab78 13 * encoder counter of the STM32 microcontroller.
kueenste 0:bb408887ab78 14 * @param a the input pin for the channel A.
kueenste 0:bb408887ab78 15 * @param b the input pin for the channel B.
kueenste 0:bb408887ab78 16 */
kueenste 0:bb408887ab78 17 EncoderCounter::EncoderCounter(PinName a, PinName b) {
kueenste 0:bb408887ab78 18
kueenste 0:bb408887ab78 19 // check pins
kueenste 0:bb408887ab78 20
kueenste 0:bb408887ab78 21 if ((a == PA_0) && (b == PA_1)) {
kueenste 0:bb408887ab78 22
kueenste 0:bb408887ab78 23 // pinmap OK for TIM2 CH1 and CH2
kueenste 0:bb408887ab78 24
kueenste 0:bb408887ab78 25 TIM = TIM2;
kueenste 0:bb408887ab78 26
kueenste 0:bb408887ab78 27 // configure general purpose I/O registers
kueenste 0:bb408887ab78 28
kueenste 0:bb408887ab78 29 GPIOA->MODER &= ~GPIO_MODER_MODER0; // reset port A0
kueenste 0:bb408887ab78 30 GPIOA->MODER |= GPIO_MODER_MODER0_1; // set alternate mode of port A0
kueenste 0:bb408887ab78 31 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR0; // reset pull-up/pull-down on port A0
kueenste 0:bb408887ab78 32 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR0_1; // set input as pull-down
kueenste 0:bb408887ab78 33 GPIOA->AFR[0] &= ~(0xF << 4*0); // reset alternate function of port A0
kueenste 0:bb408887ab78 34 GPIOA->AFR[0] |= 1 << 4*0; // set alternate funtion 1 of port A0
kueenste 0:bb408887ab78 35
kueenste 0:bb408887ab78 36 GPIOA->MODER &= ~GPIO_MODER_MODER1; // reset port A1
kueenste 0:bb408887ab78 37 GPIOA->MODER |= GPIO_MODER_MODER1_1; // set alternate mode of port A1
kueenste 0:bb408887ab78 38 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR1; // reset pull-up/pull-down on port A1
kueenste 0:bb408887ab78 39 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR1_1; // set input as pull-down
kueenste 0:bb408887ab78 40 GPIOA->AFR[0] &= ~(0xF << 4*1); // reset alternate function of port A1
kueenste 0:bb408887ab78 41 GPIOA->AFR[0] |= 1 << 4*1; // set alternate funtion 1 of port A1
kueenste 0:bb408887ab78 42
kueenste 0:bb408887ab78 43 // configure reset and clock control registers
kueenste 0:bb408887ab78 44
kueenste 0:bb408887ab78 45 RCC->APB1RSTR |= RCC_APB1RSTR_TIM2RST; //reset TIM2 controller
kueenste 0:bb408887ab78 46 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM2RST;
kueenste 0:bb408887ab78 47
kueenste 0:bb408887ab78 48 RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // TIM2 clock enable
kueenste 0:bb408887ab78 49
kueenste 0:bb408887ab78 50 } else if ((a == PA_6) && (b == PC_7)) {
kueenste 0:bb408887ab78 51
kueenste 0:bb408887ab78 52 // pinmap OK for TIM3 CH1 and CH2
kueenste 0:bb408887ab78 53
kueenste 0:bb408887ab78 54 TIM = TIM3;
kueenste 0:bb408887ab78 55
kueenste 0:bb408887ab78 56 // configure reset and clock control registers
kueenste 0:bb408887ab78 57
kueenste 0:bb408887ab78 58 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // manually enable port C (port A enabled by mbed library)
kueenste 0:bb408887ab78 59
kueenste 0:bb408887ab78 60 // configure general purpose I/O registers
kueenste 0:bb408887ab78 61
kueenste 0:bb408887ab78 62 GPIOA->MODER &= ~GPIO_MODER_MODER6; // reset port A6
kueenste 0:bb408887ab78 63 GPIOA->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port A6
kueenste 0:bb408887ab78 64 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port A6
kueenste 0:bb408887ab78 65 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
kueenste 0:bb408887ab78 66 GPIOA->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port A6
kueenste 0:bb408887ab78 67 GPIOA->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port A6
kueenste 0:bb408887ab78 68
kueenste 0:bb408887ab78 69 GPIOC->MODER &= ~GPIO_MODER_MODER7; // reset port C7
kueenste 0:bb408887ab78 70 GPIOC->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port C7
kueenste 0:bb408887ab78 71 GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port C7
kueenste 0:bb408887ab78 72 GPIOC->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
kueenste 0:bb408887ab78 73 GPIOC->AFR[0] &= ~0xF0000000; // reset alternate function of port C7
kueenste 0:bb408887ab78 74 GPIOC->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port C7
kueenste 0:bb408887ab78 75
kueenste 0:bb408887ab78 76 // configure reset and clock control registers
kueenste 0:bb408887ab78 77
kueenste 0:bb408887ab78 78 RCC->APB1RSTR |= RCC_APB1RSTR_TIM3RST; //reset TIM3 controller
kueenste 0:bb408887ab78 79 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM3RST;
kueenste 0:bb408887ab78 80
kueenste 0:bb408887ab78 81 RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // TIM3 clock enable
kueenste 0:bb408887ab78 82
kueenste 0:bb408887ab78 83 } else if ((a == PB_6) && (b == PB_7)) {
kueenste 0:bb408887ab78 84
kueenste 0:bb408887ab78 85 // pinmap OK for TIM4 CH1 and CH2
kueenste 0:bb408887ab78 86
kueenste 0:bb408887ab78 87 TIM = TIM4;
kueenste 0:bb408887ab78 88
kueenste 0:bb408887ab78 89 // configure reset and clock control registers
kueenste 0:bb408887ab78 90
kueenste 0:bb408887ab78 91 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // manually enable port B (port A enabled by mbed library)
kueenste 0:bb408887ab78 92
kueenste 0:bb408887ab78 93 // configure general purpose I/O registers
kueenste 0:bb408887ab78 94
kueenste 0:bb408887ab78 95 GPIOB->MODER &= ~GPIO_MODER_MODER6; // reset port B6
kueenste 0:bb408887ab78 96 GPIOB->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port B6
kueenste 0:bb408887ab78 97 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port B6
kueenste 0:bb408887ab78 98 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
kueenste 0:bb408887ab78 99 GPIOB->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port B6
kueenste 0:bb408887ab78 100 GPIOB->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port B6
kueenste 0:bb408887ab78 101
kueenste 0:bb408887ab78 102 GPIOB->MODER &= ~GPIO_MODER_MODER7; // reset port B7
kueenste 0:bb408887ab78 103 GPIOB->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port B7
kueenste 0:bb408887ab78 104 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port B7
kueenste 0:bb408887ab78 105 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
kueenste 0:bb408887ab78 106 GPIOB->AFR[0] &= ~0xF0000000; // reset alternate function of port B7
kueenste 0:bb408887ab78 107 GPIOB->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port B7
kueenste 0:bb408887ab78 108
kueenste 0:bb408887ab78 109 // configure reset and clock control registers
kueenste 0:bb408887ab78 110
kueenste 0:bb408887ab78 111 RCC->APB1RSTR |= RCC_APB1RSTR_TIM4RST; //reset TIM4 controller
kueenste 0:bb408887ab78 112 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM4RST;
kueenste 0:bb408887ab78 113
kueenste 0:bb408887ab78 114 RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // TIM4 clock enable
kueenste 0:bb408887ab78 115
kueenste 0:bb408887ab78 116 } else {
kueenste 0:bb408887ab78 117
kueenste 0:bb408887ab78 118 printf("pinmap not found for peripheral\n");
kueenste 0:bb408887ab78 119 }
kueenste 0:bb408887ab78 120
kueenste 0:bb408887ab78 121 // configure general purpose timer 3 or 4
kueenste 0:bb408887ab78 122
kueenste 0:bb408887ab78 123 TIM->CR1 = 0x0000; // counter disable
kueenste 0:bb408887ab78 124 TIM->CR2 = 0x0000; // reset master mode selection
kueenste 0:bb408887ab78 125 TIM->SMCR = TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0; // counting on both TI1 & TI2 edges
kueenste 0:bb408887ab78 126 TIM->CCMR1 = TIM_CCMR1_CC2S_0 | TIM_CCMR1_CC1S_0;
kueenste 0:bb408887ab78 127 TIM->CCMR2 = 0x0000; // reset capture mode register 2
kueenste 0:bb408887ab78 128 TIM->CCER = TIM_CCER_CC2E | TIM_CCER_CC1E;
kueenste 0:bb408887ab78 129 TIM->CNT = 0x0000; // reset counter value
kueenste 0:bb408887ab78 130 TIM->ARR = 0xFFFF; // auto reload register
kueenste 0:bb408887ab78 131 TIM->CR1 = TIM_CR1_CEN; // counter enable
kueenste 0:bb408887ab78 132 }
kueenste 0:bb408887ab78 133
kueenste 0:bb408887ab78 134 EncoderCounter::~EncoderCounter() {}
kueenste 0:bb408887ab78 135
kueenste 0:bb408887ab78 136 /**
kueenste 0:bb408887ab78 137 * Resets the counter value to zero.
kueenste 0:bb408887ab78 138 */
kueenste 0:bb408887ab78 139 void EncoderCounter::reset() {
kueenste 0:bb408887ab78 140
kueenste 0:bb408887ab78 141 TIM->CNT = 0x0000;
kueenste 0:bb408887ab78 142 }
kueenste 0:bb408887ab78 143
kueenste 0:bb408887ab78 144 /**
kueenste 0:bb408887ab78 145 * Resets the counter value to a given offset value.
kueenste 0:bb408887ab78 146 * @param offset the offset value to reset the counter to.
kueenste 0:bb408887ab78 147 */
kueenste 0:bb408887ab78 148 void EncoderCounter::reset(short offset) {
kueenste 0:bb408887ab78 149
kueenste 0:bb408887ab78 150 TIM->CNT = -offset;
kueenste 0:bb408887ab78 151 }
kueenste 0:bb408887ab78 152
kueenste 0:bb408887ab78 153 /**
kueenste 0:bb408887ab78 154 * Reads the quadrature encoder counter value.
kueenste 0:bb408887ab78 155 * @return the quadrature encoder counter as a signed 16-bit integer value.
kueenste 0:bb408887ab78 156 */
kueenste 0:bb408887ab78 157 short EncoderCounter::read() {
kueenste 0:bb408887ab78 158
kueenste 0:bb408887ab78 159 return (short)(-TIM->CNT);
kueenste 0:bb408887ab78 160 }
kueenste 0:bb408887ab78 161
kueenste 0:bb408887ab78 162 /**
kueenste 0:bb408887ab78 163 * The empty operator is a shorthand notation of the <code>read()</code> method.
kueenste 0:bb408887ab78 164 */
kueenste 0:bb408887ab78 165 EncoderCounter::operator short() {
kueenste 0:bb408887ab78 166
kueenste 0:bb408887ab78 167 return read();
kueenste 0:bb408887ab78 168 }
kueenste 0:bb408887ab78 169