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HAL_L476/stm32l4xx_ll_swpmi.h@1:d0dfbce63a89, 2017-02-24 (annotated)

Committer:
elmot
Date:
Fri Feb 24 21:13:56 2017 +0000
Revision:
1:d0dfbce63a89
Ready-to-copy

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elmot 1:d0dfbce63a89 1 /**
elmot 1:d0dfbce63a89 2 ******************************************************************************
elmot 1:d0dfbce63a89 3 * @file stm32l4xx_ll_swpmi.h
elmot 1:d0dfbce63a89 4 * @author MCD Application Team
elmot 1:d0dfbce63a89 5 * @version V1.5.1
elmot 1:d0dfbce63a89 6 * @date 31-May-2016
elmot 1:d0dfbce63a89 7 * @brief Header file of SWPMI LL module.
elmot 1:d0dfbce63a89 8 ******************************************************************************
elmot 1:d0dfbce63a89 9 * @attention
elmot 1:d0dfbce63a89 10 *
elmot 1:d0dfbce63a89 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot 1:d0dfbce63a89 12 *
elmot 1:d0dfbce63a89 13 * Redistribution and use in source and binary forms, with or without modification,
elmot 1:d0dfbce63a89 14 * are permitted provided that the following conditions are met:
elmot 1:d0dfbce63a89 15 * 1. Redistributions of source code must retain the above copyright notice,
elmot 1:d0dfbce63a89 16 * this list of conditions and the following disclaimer.
elmot 1:d0dfbce63a89 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
elmot 1:d0dfbce63a89 18 * this list of conditions and the following disclaimer in the documentation
elmot 1:d0dfbce63a89 19 * and/or other materials provided with the distribution.
elmot 1:d0dfbce63a89 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot 1:d0dfbce63a89 21 * may be used to endorse or promote products derived from this software
elmot 1:d0dfbce63a89 22 * without specific prior written permission.
elmot 1:d0dfbce63a89 23 *
elmot 1:d0dfbce63a89 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot 1:d0dfbce63a89 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot 1:d0dfbce63a89 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot 1:d0dfbce63a89 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot 1:d0dfbce63a89 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot 1:d0dfbce63a89 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot 1:d0dfbce63a89 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot 1:d0dfbce63a89 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot 1:d0dfbce63a89 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot 1:d0dfbce63a89 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot 1:d0dfbce63a89 34 *
elmot 1:d0dfbce63a89 35 ******************************************************************************
elmot 1:d0dfbce63a89 36 */
elmot 1:d0dfbce63a89 37
elmot 1:d0dfbce63a89 38 /* Define to prevent recursive inclusion -------------------------------------*/
elmot 1:d0dfbce63a89 39 #ifndef __STM32L4xx_LL_SWPMI_H
elmot 1:d0dfbce63a89 40 #define __STM32L4xx_LL_SWPMI_H
elmot 1:d0dfbce63a89 41
elmot 1:d0dfbce63a89 42 #ifdef __cplusplus
elmot 1:d0dfbce63a89 43 extern "C" {
elmot 1:d0dfbce63a89 44 #endif
elmot 1:d0dfbce63a89 45
elmot 1:d0dfbce63a89 46 /* Includes ------------------------------------------------------------------*/
elmot 1:d0dfbce63a89 47 #include "stm32l4xx.h"
elmot 1:d0dfbce63a89 48
elmot 1:d0dfbce63a89 49 /** @addtogroup STM32L4xx_LL_Driver
elmot 1:d0dfbce63a89 50 * @{
elmot 1:d0dfbce63a89 51 */
elmot 1:d0dfbce63a89 52
elmot 1:d0dfbce63a89 53 #if defined (SWPMI1)
elmot 1:d0dfbce63a89 54
elmot 1:d0dfbce63a89 55 /** @defgroup SWPMI_LL SWPMI
elmot 1:d0dfbce63a89 56 * @{
elmot 1:d0dfbce63a89 57 */
elmot 1:d0dfbce63a89 58
elmot 1:d0dfbce63a89 59 /* Private types -------------------------------------------------------------*/
elmot 1:d0dfbce63a89 60 /* Private variables ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 61 /* Private constants ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 62 /* Private macros ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 63 #if defined(USE_FULL_LL_DRIVER)
elmot 1:d0dfbce63a89 64 /** @defgroup SWPMI_LL_Private_Macros SWPMI Private Macros
elmot 1:d0dfbce63a89 65 * @{
elmot 1:d0dfbce63a89 66 */
elmot 1:d0dfbce63a89 67 /**
elmot 1:d0dfbce63a89 68 * @}
elmot 1:d0dfbce63a89 69 */
elmot 1:d0dfbce63a89 70 #endif /*USE_FULL_LL_DRIVER*/
elmot 1:d0dfbce63a89 71
elmot 1:d0dfbce63a89 72 /* Exported types ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 73 #if defined(USE_FULL_LL_DRIVER)
elmot 1:d0dfbce63a89 74 /** @defgroup SWPMI_LL_ES_INIT SWPMI Exported Init structure
elmot 1:d0dfbce63a89 75 * @{
elmot 1:d0dfbce63a89 76 */
elmot 1:d0dfbce63a89 77
elmot 1:d0dfbce63a89 78 /**
elmot 1:d0dfbce63a89 79 * @brief SWPMI Init structures definition
elmot 1:d0dfbce63a89 80 */
elmot 1:d0dfbce63a89 81 typedef struct
elmot 1:d0dfbce63a89 82 {
elmot 1:d0dfbce63a89 83 uint32_t VoltageClass; /*!< Specifies the SWP Voltage Class.
elmot 1:d0dfbce63a89 84 This parameter can be a value of @ref SWPMI_LL_EC_VOLTAGE_CLASS
elmot 1:d0dfbce63a89 85
elmot 1:d0dfbce63a89 86 This feature can be modified afterwards using unitary function @ref LL_SWPMI_SetVoltageClass. */
elmot 1:d0dfbce63a89 87
elmot 1:d0dfbce63a89 88 uint32_t BitRatePrescaler; /*!< Specifies the SWPMI bitrate prescaler.
elmot 1:d0dfbce63a89 89 This parameter must be a number between Min_Data=0 and Max_Data=63.
elmot 1:d0dfbce63a89 90
elmot 1:d0dfbce63a89 91 The value can be calculated thanks to helper macro @ref __LL_SWPMI_CALC_BITRATE_PRESCALER
elmot 1:d0dfbce63a89 92
elmot 1:d0dfbce63a89 93 This feature can be modified afterwards using unitary function @ref LL_SWPMI_SetBitRatePrescaler. */
elmot 1:d0dfbce63a89 94
elmot 1:d0dfbce63a89 95 uint32_t TxBufferingMode; /*!< Specifies the transmission buffering mode.
elmot 1:d0dfbce63a89 96 This parameter can be a value of @ref SWPMI_LL_EC_SW_BUFFER_TX
elmot 1:d0dfbce63a89 97
elmot 1:d0dfbce63a89 98 This feature can be modified afterwards using unitary function @ref LL_SWPMI_SetTransmissionMode. */
elmot 1:d0dfbce63a89 99
elmot 1:d0dfbce63a89 100 uint32_t RxBufferingMode; /*!< Specifies the reception buffering mode.
elmot 1:d0dfbce63a89 101 This parameter can be a value of @ref SWPMI_LL_EC_SW_BUFFER_RX
elmot 1:d0dfbce63a89 102
elmot 1:d0dfbce63a89 103 This feature can be modified afterwards using unitary function @ref LL_SWPMI_SetReceptionMode. */
elmot 1:d0dfbce63a89 104 } LL_SWPMI_InitTypeDef;
elmot 1:d0dfbce63a89 105
elmot 1:d0dfbce63a89 106 /**
elmot 1:d0dfbce63a89 107 * @}
elmot 1:d0dfbce63a89 108 */
elmot 1:d0dfbce63a89 109 #endif /* USE_FULL_LL_DRIVER */
elmot 1:d0dfbce63a89 110
elmot 1:d0dfbce63a89 111 /* Exported constants --------------------------------------------------------*/
elmot 1:d0dfbce63a89 112 /** @defgroup SWPMI_LL_Exported_Constants SWPMI Exported Constants
elmot 1:d0dfbce63a89 113 * @{
elmot 1:d0dfbce63a89 114 */
elmot 1:d0dfbce63a89 115
elmot 1:d0dfbce63a89 116 /** @defgroup SWPMI_LL_EC_CLEAR_FLAG Clear Flags Defines
elmot 1:d0dfbce63a89 117 * @brief Flags defines which can be used with LL_SWPMI_WriteReg function
elmot 1:d0dfbce63a89 118 * @{
elmot 1:d0dfbce63a89 119 */
elmot 1:d0dfbce63a89 120 #define LL_SWPMI_ICR_CRXBFF SWPMI_ICR_CRXBFF /*!< Clear receive buffer full flag */
elmot 1:d0dfbce63a89 121 #define LL_SWPMI_ICR_CTXBEF SWPMI_ICR_CTXBEF /*!< Clear transmit buffer empty flag */
elmot 1:d0dfbce63a89 122 #define LL_SWPMI_ICR_CRXBERF SWPMI_ICR_CRXBERF /*!< Clear receive CRC error flag */
elmot 1:d0dfbce63a89 123 #define LL_SWPMI_ICR_CRXOVRF SWPMI_ICR_CRXOVRF /*!< Clear receive overrun error flag */
elmot 1:d0dfbce63a89 124 #define LL_SWPMI_ICR_CTXUNRF SWPMI_ICR_CTXUNRF /*!< Clear transmit underrun error flag */
elmot 1:d0dfbce63a89 125 #define LL_SWPMI_ICR_CTCF SWPMI_ICR_CTCF /*!< Clear transfer complete flag */
elmot 1:d0dfbce63a89 126 #define LL_SWPMI_ICR_CSRF SWPMI_ICR_CSRF /*!< Clear slave resume flag */
elmot 1:d0dfbce63a89 127 /**
elmot 1:d0dfbce63a89 128 * @}
elmot 1:d0dfbce63a89 129 */
elmot 1:d0dfbce63a89 130
elmot 1:d0dfbce63a89 131 /** @defgroup SWPMI_LL_EC_GET_FLAG Get Flags Defines
elmot 1:d0dfbce63a89 132 * @brief Flags defines which can be used with LL_SWPMI_ReadReg function
elmot 1:d0dfbce63a89 133 * @{
elmot 1:d0dfbce63a89 134 */
elmot 1:d0dfbce63a89 135 #define LL_SWPMI_ISR_RXBFF SWPMI_ISR_RXBFF /*!< Receive buffer full flag */
elmot 1:d0dfbce63a89 136 #define LL_SWPMI_ISR_TXBEF SWPMI_ISR_TXBEF /*!< Transmit buffer empty flag */
elmot 1:d0dfbce63a89 137 #define LL_SWPMI_ISR_RXBERF SWPMI_ISR_RXBERF /*!< Receive CRC error flag */
elmot 1:d0dfbce63a89 138 #define LL_SWPMI_ISR_RXOVRF SWPMI_ISR_RXOVRF /*!< Receive overrun error flag */
elmot 1:d0dfbce63a89 139 #define LL_SWPMI_ISR_TXUNRF SWPMI_ISR_TXUNRF /*!< Transmit underrun error flag */
elmot 1:d0dfbce63a89 140 #define LL_SWPMI_ISR_RXNE SWPMI_ISR_RXNE /*!< Receive data register not empty */
elmot 1:d0dfbce63a89 141 #define LL_SWPMI_ISR_TXE SWPMI_ISR_TXE /*!< Transmit data register empty */
elmot 1:d0dfbce63a89 142 #define LL_SWPMI_ISR_TCF SWPMI_ISR_TCF /*!< Transfer complete flag */
elmot 1:d0dfbce63a89 143 #define LL_SWPMI_ISR_SRF SWPMI_ISR_SRF /*!< Slave resume flag */
elmot 1:d0dfbce63a89 144 #define LL_SWPMI_ISR_SUSP SWPMI_ISR_SUSP /*!< SUSPEND flag */
elmot 1:d0dfbce63a89 145 #define LL_SWPMI_ISR_DEACTF SWPMI_ISR_DEACTF /*!< DEACTIVATED flag */
elmot 1:d0dfbce63a89 146 /**
elmot 1:d0dfbce63a89 147 * @}
elmot 1:d0dfbce63a89 148 */
elmot 1:d0dfbce63a89 149
elmot 1:d0dfbce63a89 150 /** @defgroup SWPMI_LL_EC_IT IT Defines
elmot 1:d0dfbce63a89 151 * @brief IT defines which can be used with LL_SWPMI_ReadReg and LL_SWPMI_WriteReg functions
elmot 1:d0dfbce63a89 152 * @{
elmot 1:d0dfbce63a89 153 */
elmot 1:d0dfbce63a89 154 #define LL_SWPMI_IER_SRIE SWPMI_IER_SRIE /*!< Slave resume interrupt enable */
elmot 1:d0dfbce63a89 155 #define LL_SWPMI_IER_TCIE SWPMI_IER_TCIE /*!< Transmit complete interrupt enable */
elmot 1:d0dfbce63a89 156 #define LL_SWPMI_IER_TIE SWPMI_IER_TIE /*!< Transmit interrupt enable */
elmot 1:d0dfbce63a89 157 #define LL_SWPMI_IER_RIE SWPMI_IER_RIE /*!< Receive interrupt enable */
elmot 1:d0dfbce63a89 158 #define LL_SWPMI_IER_TXUNRIE SWPMI_IER_TXUNRIE /*!< Transmit underrun error interrupt enable */
elmot 1:d0dfbce63a89 159 #define LL_SWPMI_IER_RXOVRIE SWPMI_IER_RXOVRIE /*!< Receive overrun error interrupt enable */
elmot 1:d0dfbce63a89 160 #define LL_SWPMI_IER_RXBERIE SWPMI_IER_RXBERIE /*!< Receive CRC error interrupt enable */
elmot 1:d0dfbce63a89 161 #define LL_SWPMI_IER_TXBEIE SWPMI_IER_TXBEIE /*!< Transmit buffer empty interrupt enable */
elmot 1:d0dfbce63a89 162 #define LL_SWPMI_IER_RXBFIE SWPMI_IER_RXBFIE /*!< Receive buffer full interrupt enable */
elmot 1:d0dfbce63a89 163 /**
elmot 1:d0dfbce63a89 164 * @}
elmot 1:d0dfbce63a89 165 */
elmot 1:d0dfbce63a89 166
elmot 1:d0dfbce63a89 167 /** @defgroup SWPMI_LL_EC_SW_BUFFER_RX SW BUFFER RX
elmot 1:d0dfbce63a89 168 * @{
elmot 1:d0dfbce63a89 169 */
elmot 1:d0dfbce63a89 170 #define LL_SWPMI_SW_BUFFER_RX_SINGLE ((uint32_t)0x00000000) /*!< Single software buffer mode for reception */
elmot 1:d0dfbce63a89 171 #define LL_SWPMI_SW_BUFFER_RX_MULTI SWPMI_CR_RXMODE /*!< Multi software buffermode for reception */
elmot 1:d0dfbce63a89 172 /**
elmot 1:d0dfbce63a89 173 * @}
elmot 1:d0dfbce63a89 174 */
elmot 1:d0dfbce63a89 175
elmot 1:d0dfbce63a89 176 /** @defgroup SWPMI_LL_EC_SW_BUFFER_TX SW BUFFER TX
elmot 1:d0dfbce63a89 177 * @{
elmot 1:d0dfbce63a89 178 */
elmot 1:d0dfbce63a89 179 #define LL_SWPMI_SW_BUFFER_TX_SINGLE ((uint32_t)0x00000000) /*!< Single software buffer mode for transmission */
elmot 1:d0dfbce63a89 180 #define LL_SWPMI_SW_BUFFER_TX_MULTI SWPMI_CR_TXMODE /*!< Multi software buffermode for transmission */
elmot 1:d0dfbce63a89 181 /**
elmot 1:d0dfbce63a89 182 * @}
elmot 1:d0dfbce63a89 183 */
elmot 1:d0dfbce63a89 184
elmot 1:d0dfbce63a89 185 /** @defgroup SWPMI_LL_EC_VOLTAGE_CLASS VOLTAGE CLASS
elmot 1:d0dfbce63a89 186 * @{
elmot 1:d0dfbce63a89 187 */
elmot 1:d0dfbce63a89 188 #define LL_SWPMI_VOLTAGE_CLASS_C ((uint32_t)0x00000000) /*!< SWPMI_IO uses directly VDD voltage to operate in class C */
elmot 1:d0dfbce63a89 189 #define LL_SWPMI_VOLTAGE_CLASS_B SWPMI_OR_CLASS /*!< SWPMI_IO uses an internal voltage regulator to operate in class B */
elmot 1:d0dfbce63a89 190 /**
elmot 1:d0dfbce63a89 191 * @}
elmot 1:d0dfbce63a89 192 */
elmot 1:d0dfbce63a89 193
elmot 1:d0dfbce63a89 194 /** @defgroup SWPMI_LL_EC_DMA_REG_DATA DMA register data
elmot 1:d0dfbce63a89 195 * @{
elmot 1:d0dfbce63a89 196 */
elmot 1:d0dfbce63a89 197 #define LL_SWPMI_DMA_REG_DATA_TRANSMIT (uint32_t)0 /*!< Get address of data register used for transmission */
elmot 1:d0dfbce63a89 198 #define LL_SWPMI_DMA_REG_DATA_RECEIVE (uint32_t)1 /*!< Get address of data register used for reception */
elmot 1:d0dfbce63a89 199 /**
elmot 1:d0dfbce63a89 200 * @}
elmot 1:d0dfbce63a89 201 */
elmot 1:d0dfbce63a89 202
elmot 1:d0dfbce63a89 203 /**
elmot 1:d0dfbce63a89 204 * @}
elmot 1:d0dfbce63a89 205 */
elmot 1:d0dfbce63a89 206
elmot 1:d0dfbce63a89 207 /* Exported macro ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 208 /** @defgroup SWPMI_LL_Exported_Macros SWPMI Exported Macros
elmot 1:d0dfbce63a89 209 * @{
elmot 1:d0dfbce63a89 210 */
elmot 1:d0dfbce63a89 211
elmot 1:d0dfbce63a89 212 /** @defgroup SWPMI_LL_EM_WRITE_READ Common Write and read registers Macros
elmot 1:d0dfbce63a89 213 * @{
elmot 1:d0dfbce63a89 214 */
elmot 1:d0dfbce63a89 215
elmot 1:d0dfbce63a89 216 /**
elmot 1:d0dfbce63a89 217 * @brief Write a value in SWPMI register
elmot 1:d0dfbce63a89 218 * @param __INSTANCE__ SWPMI Instance
elmot 1:d0dfbce63a89 219 * @param __REG__ Register to be written
elmot 1:d0dfbce63a89 220 * @param __VALUE__ Value to be written in the register
elmot 1:d0dfbce63a89 221 * @retval None
elmot 1:d0dfbce63a89 222 */
elmot 1:d0dfbce63a89 223 #define LL_SWPMI_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
elmot 1:d0dfbce63a89 224
elmot 1:d0dfbce63a89 225 /**
elmot 1:d0dfbce63a89 226 * @brief Read a value in SWPMI register
elmot 1:d0dfbce63a89 227 * @param __INSTANCE__ SWPMI Instance
elmot 1:d0dfbce63a89 228 * @param __REG__ Register to be read
elmot 1:d0dfbce63a89 229 * @retval Register value
elmot 1:d0dfbce63a89 230 */
elmot 1:d0dfbce63a89 231 #define LL_SWPMI_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
elmot 1:d0dfbce63a89 232 /**
elmot 1:d0dfbce63a89 233 * @}
elmot 1:d0dfbce63a89 234 */
elmot 1:d0dfbce63a89 235
elmot 1:d0dfbce63a89 236 /** @defgroup SWPMI_LL_EM_BitRate Bit rate calculation helper Macros
elmot 1:d0dfbce63a89 237 * @{
elmot 1:d0dfbce63a89 238 */
elmot 1:d0dfbce63a89 239
elmot 1:d0dfbce63a89 240 /**
elmot 1:d0dfbce63a89 241 * @brief Helper macro to calculate bit rate value to set in BRR register (@ref LL_SWPMI_SetBitRatePrescaler function)
elmot 1:d0dfbce63a89 242 * @note ex: @ref __LL_SWPMI_CALC_BITRATE_PRESCALER(2000000, 80000000);
elmot 1:d0dfbce63a89 243 * @param __FSWP__ Within the following range: from 100 Kbit/s up to 2Mbit/s (in bit/s)
elmot 1:d0dfbce63a89 244 * @param __FSWPCLK__ PCLK or HSI frequency (in Hz)
elmot 1:d0dfbce63a89 245 * @retval Bitrate prescaler (BRR register)
elmot 1:d0dfbce63a89 246 */
elmot 1:d0dfbce63a89 247 #define __LL_SWPMI_CALC_BITRATE_PRESCALER(__FSWP__, __FSWPCLK__) ((uint32_t)(((__FSWPCLK__) / ((__FSWP__) * 4)) - 1))
elmot 1:d0dfbce63a89 248
elmot 1:d0dfbce63a89 249 /**
elmot 1:d0dfbce63a89 250 * @}
elmot 1:d0dfbce63a89 251 */
elmot 1:d0dfbce63a89 252
elmot 1:d0dfbce63a89 253 /**
elmot 1:d0dfbce63a89 254 * @}
elmot 1:d0dfbce63a89 255 */
elmot 1:d0dfbce63a89 256
elmot 1:d0dfbce63a89 257 /* Exported functions --------------------------------------------------------*/
elmot 1:d0dfbce63a89 258 /** @defgroup SWPMI_LL_Exported_Functions SWPMI Exported Functions
elmot 1:d0dfbce63a89 259 * @{
elmot 1:d0dfbce63a89 260 */
elmot 1:d0dfbce63a89 261
elmot 1:d0dfbce63a89 262 /** @defgroup SWPMI_LL_EF_Configuration Configuration
elmot 1:d0dfbce63a89 263 * @{
elmot 1:d0dfbce63a89 264 */
elmot 1:d0dfbce63a89 265
elmot 1:d0dfbce63a89 266 /**
elmot 1:d0dfbce63a89 267 * @brief Set Reception buffering mode
elmot 1:d0dfbce63a89 268 * @note If Multi software buffer mode is chosen, RXDMA bits must also be set.
elmot 1:d0dfbce63a89 269 * @rmtoll CR RXMODE LL_SWPMI_SetReceptionMode
elmot 1:d0dfbce63a89 270 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 271 * @param RxBufferingMode This parameter can be one of the following values:
elmot 1:d0dfbce63a89 272 * @arg @ref LL_SWPMI_SW_BUFFER_RX_SINGLE
elmot 1:d0dfbce63a89 273 * @arg @ref LL_SWPMI_SW_BUFFER_RX_MULTI
elmot 1:d0dfbce63a89 274 * @retval None
elmot 1:d0dfbce63a89 275 */
elmot 1:d0dfbce63a89 276 __STATIC_INLINE void LL_SWPMI_SetReceptionMode(SWPMI_TypeDef *SWPMIx, uint32_t RxBufferingMode)
elmot 1:d0dfbce63a89 277 {
elmot 1:d0dfbce63a89 278 MODIFY_REG(SWPMIx->CR, SWPMI_CR_RXMODE, RxBufferingMode);
elmot 1:d0dfbce63a89 279 }
elmot 1:d0dfbce63a89 280
elmot 1:d0dfbce63a89 281 /**
elmot 1:d0dfbce63a89 282 * @brief Get Reception buffering mode
elmot 1:d0dfbce63a89 283 * @rmtoll CR RXMODE LL_SWPMI_GetReceptionMode
elmot 1:d0dfbce63a89 284 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 285 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 286 * @arg @ref LL_SWPMI_SW_BUFFER_RX_SINGLE
elmot 1:d0dfbce63a89 287 * @arg @ref LL_SWPMI_SW_BUFFER_RX_MULTI
elmot 1:d0dfbce63a89 288 */
elmot 1:d0dfbce63a89 289 __STATIC_INLINE uint32_t LL_SWPMI_GetReceptionMode(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 290 {
elmot 1:d0dfbce63a89 291 return (uint32_t)(READ_BIT(SWPMIx->CR, SWPMI_CR_RXMODE));
elmot 1:d0dfbce63a89 292 }
elmot 1:d0dfbce63a89 293
elmot 1:d0dfbce63a89 294 /**
elmot 1:d0dfbce63a89 295 * @brief Set Transmission buffering mode
elmot 1:d0dfbce63a89 296 * @note If Multi software buffer mode is chosen, TXDMA bits must also be set.
elmot 1:d0dfbce63a89 297 * @rmtoll CR TXMODE LL_SWPMI_SetTransmissionMode
elmot 1:d0dfbce63a89 298 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 299 * @param TxBufferingMode This parameter can be one of the following values:
elmot 1:d0dfbce63a89 300 * @arg @ref LL_SWPMI_SW_BUFFER_TX_SINGLE
elmot 1:d0dfbce63a89 301 * @arg @ref LL_SWPMI_SW_BUFFER_TX_MULTI
elmot 1:d0dfbce63a89 302 * @retval None
elmot 1:d0dfbce63a89 303 */
elmot 1:d0dfbce63a89 304 __STATIC_INLINE void LL_SWPMI_SetTransmissionMode(SWPMI_TypeDef *SWPMIx, uint32_t TxBufferingMode)
elmot 1:d0dfbce63a89 305 {
elmot 1:d0dfbce63a89 306 MODIFY_REG(SWPMIx->CR, SWPMI_CR_TXMODE, TxBufferingMode);
elmot 1:d0dfbce63a89 307 }
elmot 1:d0dfbce63a89 308
elmot 1:d0dfbce63a89 309 /**
elmot 1:d0dfbce63a89 310 * @brief Get Transmission buffering mode
elmot 1:d0dfbce63a89 311 * @rmtoll CR TXMODE LL_SWPMI_GetTransmissionMode
elmot 1:d0dfbce63a89 312 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 313 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 314 * @arg @ref LL_SWPMI_SW_BUFFER_TX_SINGLE
elmot 1:d0dfbce63a89 315 * @arg @ref LL_SWPMI_SW_BUFFER_TX_MULTI
elmot 1:d0dfbce63a89 316 */
elmot 1:d0dfbce63a89 317 __STATIC_INLINE uint32_t LL_SWPMI_GetTransmissionMode(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 318 {
elmot 1:d0dfbce63a89 319 return (uint32_t)(READ_BIT(SWPMIx->CR, SWPMI_CR_TXMODE));
elmot 1:d0dfbce63a89 320 }
elmot 1:d0dfbce63a89 321
elmot 1:d0dfbce63a89 322 /**
elmot 1:d0dfbce63a89 323 * @brief Enable loopback mode
elmot 1:d0dfbce63a89 324 * @rmtoll CR LPBK LL_SWPMI_EnableLoopback
elmot 1:d0dfbce63a89 325 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 326 * @retval None
elmot 1:d0dfbce63a89 327 */
elmot 1:d0dfbce63a89 328 __STATIC_INLINE void LL_SWPMI_EnableLoopback(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 329 {
elmot 1:d0dfbce63a89 330 SET_BIT(SWPMIx->CR, SWPMI_CR_LPBK);
elmot 1:d0dfbce63a89 331 }
elmot 1:d0dfbce63a89 332
elmot 1:d0dfbce63a89 333 /**
elmot 1:d0dfbce63a89 334 * @brief Disable loopback mode
elmot 1:d0dfbce63a89 335 * @rmtoll CR LPBK LL_SWPMI_DisableLoopback
elmot 1:d0dfbce63a89 336 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 337 * @retval None
elmot 1:d0dfbce63a89 338 */
elmot 1:d0dfbce63a89 339 __STATIC_INLINE void LL_SWPMI_DisableLoopback(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 340 {
elmot 1:d0dfbce63a89 341 CLEAR_BIT(SWPMIx->CR, SWPMI_CR_LPBK);
elmot 1:d0dfbce63a89 342 }
elmot 1:d0dfbce63a89 343
elmot 1:d0dfbce63a89 344 /**
elmot 1:d0dfbce63a89 345 * @brief Activate Single wire protocol bus (SUSPENDED or ACTIVATED state)
elmot 1:d0dfbce63a89 346 * @note SWP bus stays in the ACTIVATED state as long as there is a communication
elmot 1:d0dfbce63a89 347 * with the slave, either in transmission or in reception. The SWP bus switches back
elmot 1:d0dfbce63a89 348 * to the SUSPENDED state as soon as there is no more transmission or reception
elmot 1:d0dfbce63a89 349 * activity, after 7 idle bits.
elmot 1:d0dfbce63a89 350 * @rmtoll CR SWPACT LL_SWPMI_Activate
elmot 1:d0dfbce63a89 351 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 352 * @retval None
elmot 1:d0dfbce63a89 353 */
elmot 1:d0dfbce63a89 354 __STATIC_INLINE void LL_SWPMI_Activate(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 355 {
elmot 1:d0dfbce63a89 356 /* In order to activate SWP again, the software must clear DEACT bit*/
elmot 1:d0dfbce63a89 357 CLEAR_BIT(SWPMIx->CR, SWPMI_CR_DEACT);
elmot 1:d0dfbce63a89 358
elmot 1:d0dfbce63a89 359 /* Set SWACT bit */
elmot 1:d0dfbce63a89 360 SET_BIT(SWPMIx->CR, SWPMI_CR_SWPACT);
elmot 1:d0dfbce63a89 361 }
elmot 1:d0dfbce63a89 362
elmot 1:d0dfbce63a89 363 /**
elmot 1:d0dfbce63a89 364 * @brief Check if Single wire protocol bus is in ACTIVATED state.
elmot 1:d0dfbce63a89 365 * @rmtoll CR SWPACT LL_SWPMI_Activate
elmot 1:d0dfbce63a89 366 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 367 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 368 */
elmot 1:d0dfbce63a89 369 __STATIC_INLINE uint32_t LL_SWPMI_IsActivated(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 370 {
elmot 1:d0dfbce63a89 371 return (READ_BIT(SWPMIx->CR, SWPMI_CR_SWPACT) == (SWPMI_CR_SWPACT));
elmot 1:d0dfbce63a89 372 }
elmot 1:d0dfbce63a89 373
elmot 1:d0dfbce63a89 374 /**
elmot 1:d0dfbce63a89 375 * @brief Deactivate immediately Single wire protocol bus (immediate transition to
elmot 1:d0dfbce63a89 376 * DEACTIVATED state)
elmot 1:d0dfbce63a89 377 * @rmtoll CR SWPACT LL_SWPMI_Deactivate
elmot 1:d0dfbce63a89 378 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 379 * @retval None
elmot 1:d0dfbce63a89 380 */
elmot 1:d0dfbce63a89 381 __STATIC_INLINE void LL_SWPMI_Deactivate(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 382 {
elmot 1:d0dfbce63a89 383 CLEAR_BIT(SWPMIx->CR, SWPMI_CR_SWPACT);
elmot 1:d0dfbce63a89 384 }
elmot 1:d0dfbce63a89 385
elmot 1:d0dfbce63a89 386 /**
elmot 1:d0dfbce63a89 387 * @brief Request a deactivation of Single wire protocol bus (request to go in DEACTIVATED
elmot 1:d0dfbce63a89 388 * state if no resume from slave)
elmot 1:d0dfbce63a89 389 * @rmtoll CR DEACT LL_SWPMI_RequestDeactivation
elmot 1:d0dfbce63a89 390 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 391 * @retval None
elmot 1:d0dfbce63a89 392 */
elmot 1:d0dfbce63a89 393 __STATIC_INLINE void LL_SWPMI_RequestDeactivation(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 394 {
elmot 1:d0dfbce63a89 395 SET_BIT(SWPMIx->CR, SWPMI_CR_DEACT);
elmot 1:d0dfbce63a89 396 }
elmot 1:d0dfbce63a89 397
elmot 1:d0dfbce63a89 398 /**
elmot 1:d0dfbce63a89 399 * @brief Set Bitrate prescaler SWPMI_freq = SWPMI_clk / (((BitRate) + 1) * 4)
elmot 1:d0dfbce63a89 400 * @rmtoll BRR BR LL_SWPMI_SetBitRatePrescaler
elmot 1:d0dfbce63a89 401 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 402 * @param BitRatePrescaler A number between Min_Data=0 and Max_Data=63
elmot 1:d0dfbce63a89 403 * @retval None
elmot 1:d0dfbce63a89 404 */
elmot 1:d0dfbce63a89 405 __STATIC_INLINE void LL_SWPMI_SetBitRatePrescaler(SWPMI_TypeDef *SWPMIx, uint32_t BitRatePrescaler)
elmot 1:d0dfbce63a89 406 {
elmot 1:d0dfbce63a89 407 WRITE_REG(SWPMIx->BRR, BitRatePrescaler);
elmot 1:d0dfbce63a89 408 }
elmot 1:d0dfbce63a89 409
elmot 1:d0dfbce63a89 410 /**
elmot 1:d0dfbce63a89 411 * @brief Get Bitrate prescaler
elmot 1:d0dfbce63a89 412 * @rmtoll BRR BR LL_SWPMI_GetBitRatePrescaler
elmot 1:d0dfbce63a89 413 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 414 * @retval A number between Min_Data=0 and Max_Data=63
elmot 1:d0dfbce63a89 415 */
elmot 1:d0dfbce63a89 416 __STATIC_INLINE uint32_t LL_SWPMI_GetBitRatePrescaler(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 417 {
elmot 1:d0dfbce63a89 418 return (uint32_t)(READ_BIT(SWPMIx->BRR, SWPMI_BRR_BR));
elmot 1:d0dfbce63a89 419 }
elmot 1:d0dfbce63a89 420
elmot 1:d0dfbce63a89 421 /**
elmot 1:d0dfbce63a89 422 * @brief Set SWP Voltage Class
elmot 1:d0dfbce63a89 423 * @rmtoll OR CLASS LL_SWPMI_SetVoltageClass
elmot 1:d0dfbce63a89 424 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 425 * @param VoltageClass This parameter can be one of the following values:
elmot 1:d0dfbce63a89 426 * @arg @ref LL_SWPMI_VOLTAGE_CLASS_C
elmot 1:d0dfbce63a89 427 * @arg @ref LL_SWPMI_VOLTAGE_CLASS_B
elmot 1:d0dfbce63a89 428 * @retval None
elmot 1:d0dfbce63a89 429 */
elmot 1:d0dfbce63a89 430 __STATIC_INLINE void LL_SWPMI_SetVoltageClass(SWPMI_TypeDef *SWPMIx, uint32_t VoltageClass)
elmot 1:d0dfbce63a89 431 {
elmot 1:d0dfbce63a89 432 MODIFY_REG(SWPMIx->OR, SWPMI_OR_CLASS, VoltageClass);
elmot 1:d0dfbce63a89 433 }
elmot 1:d0dfbce63a89 434
elmot 1:d0dfbce63a89 435 /**
elmot 1:d0dfbce63a89 436 * @brief Get SWP Voltage Class
elmot 1:d0dfbce63a89 437 * @rmtoll OR CLASS LL_SWPMI_GetVoltageClass
elmot 1:d0dfbce63a89 438 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 439 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 440 * @arg @ref LL_SWPMI_VOLTAGE_CLASS_C
elmot 1:d0dfbce63a89 441 * @arg @ref LL_SWPMI_VOLTAGE_CLASS_B
elmot 1:d0dfbce63a89 442 */
elmot 1:d0dfbce63a89 443 __STATIC_INLINE uint32_t LL_SWPMI_GetVoltageClass(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 444 {
elmot 1:d0dfbce63a89 445 return (uint32_t)(READ_BIT(SWPMIx->OR, SWPMI_OR_CLASS));
elmot 1:d0dfbce63a89 446 }
elmot 1:d0dfbce63a89 447
elmot 1:d0dfbce63a89 448 /**
elmot 1:d0dfbce63a89 449 * @}
elmot 1:d0dfbce63a89 450 */
elmot 1:d0dfbce63a89 451
elmot 1:d0dfbce63a89 452 /** @defgroup SWPMI_LL_EF_FLAG_Management FLAG_Management
elmot 1:d0dfbce63a89 453 * @{
elmot 1:d0dfbce63a89 454 */
elmot 1:d0dfbce63a89 455
elmot 1:d0dfbce63a89 456 /**
elmot 1:d0dfbce63a89 457 * @brief Check if the last word of the frame under reception has arrived in SWPMI_RDR.
elmot 1:d0dfbce63a89 458 * @rmtoll ISR RXBFF LL_SWPMI_IsActiveFlag_RXBF
elmot 1:d0dfbce63a89 459 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 460 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 461 */
elmot 1:d0dfbce63a89 462 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXBF(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 463 {
elmot 1:d0dfbce63a89 464 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXBFF) == (SWPMI_ISR_RXBFF));
elmot 1:d0dfbce63a89 465 }
elmot 1:d0dfbce63a89 466
elmot 1:d0dfbce63a89 467 /**
elmot 1:d0dfbce63a89 468 * @brief Check if Frame transmission buffer has been emptied
elmot 1:d0dfbce63a89 469 * @rmtoll ISR TXBEF LL_SWPMI_IsActiveFlag_TXBE
elmot 1:d0dfbce63a89 470 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 471 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 472 */
elmot 1:d0dfbce63a89 473 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TXBE(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 474 {
elmot 1:d0dfbce63a89 475 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_TXBEF) == (SWPMI_ISR_TXBEF));
elmot 1:d0dfbce63a89 476 }
elmot 1:d0dfbce63a89 477
elmot 1:d0dfbce63a89 478 /**
elmot 1:d0dfbce63a89 479 * @brief Check if CRC error in reception has been detected
elmot 1:d0dfbce63a89 480 * @rmtoll ISR RXBERF LL_SWPMI_IsActiveFlag_RXBER
elmot 1:d0dfbce63a89 481 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 482 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 483 */
elmot 1:d0dfbce63a89 484 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXBER(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 485 {
elmot 1:d0dfbce63a89 486 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXBERF) == (SWPMI_ISR_RXBERF));
elmot 1:d0dfbce63a89 487 }
elmot 1:d0dfbce63a89 488
elmot 1:d0dfbce63a89 489 /**
elmot 1:d0dfbce63a89 490 * @brief Check if Overrun in reception has been detected
elmot 1:d0dfbce63a89 491 * @rmtoll ISR RXOVRF LL_SWPMI_IsActiveFlag_RXOVR
elmot 1:d0dfbce63a89 492 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 493 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 494 */
elmot 1:d0dfbce63a89 495 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXOVR(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 496 {
elmot 1:d0dfbce63a89 497 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXOVRF) == (SWPMI_ISR_RXOVRF));
elmot 1:d0dfbce63a89 498 }
elmot 1:d0dfbce63a89 499
elmot 1:d0dfbce63a89 500 /**
elmot 1:d0dfbce63a89 501 * @brief Check if underrun error in transmission has been detected
elmot 1:d0dfbce63a89 502 * @rmtoll ISR TXUNRF LL_SWPMI_IsActiveFlag_TXUNR
elmot 1:d0dfbce63a89 503 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 504 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 505 */
elmot 1:d0dfbce63a89 506 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TXUNR(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 507 {
elmot 1:d0dfbce63a89 508 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_TXUNRF) == (SWPMI_ISR_TXUNRF));
elmot 1:d0dfbce63a89 509 }
elmot 1:d0dfbce63a89 510
elmot 1:d0dfbce63a89 511 /**
elmot 1:d0dfbce63a89 512 * @brief Check if Receive data register not empty (it means that Received data is ready
elmot 1:d0dfbce63a89 513 * to be read in the SWPMI_RDR register)
elmot 1:d0dfbce63a89 514 * @rmtoll ISR RXNE LL_SWPMI_IsActiveFlag_RXNE
elmot 1:d0dfbce63a89 515 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 516 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 517 */
elmot 1:d0dfbce63a89 518 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXNE(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 519 {
elmot 1:d0dfbce63a89 520 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXNE) == (SWPMI_ISR_RXNE));
elmot 1:d0dfbce63a89 521 }
elmot 1:d0dfbce63a89 522
elmot 1:d0dfbce63a89 523 /**
elmot 1:d0dfbce63a89 524 * @brief Check if Transmit data register is empty (it means that Data written in transmit
elmot 1:d0dfbce63a89 525 * data register SWPMI_TDR has been transmitted and SWPMI_TDR can be written to again)
elmot 1:d0dfbce63a89 526 * @rmtoll ISR TXE LL_SWPMI_IsActiveFlag_TXE
elmot 1:d0dfbce63a89 527 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 528 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 529 */
elmot 1:d0dfbce63a89 530 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TXE(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 531 {
elmot 1:d0dfbce63a89 532 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_TXE) == (SWPMI_ISR_TXE));
elmot 1:d0dfbce63a89 533 }
elmot 1:d0dfbce63a89 534
elmot 1:d0dfbce63a89 535 /**
elmot 1:d0dfbce63a89 536 * @brief Check if Both transmission and reception are completed and SWP is switched to
elmot 1:d0dfbce63a89 537 * the SUSPENDED state
elmot 1:d0dfbce63a89 538 * @rmtoll ISR TCF LL_SWPMI_IsActiveFlag_TC
elmot 1:d0dfbce63a89 539 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 540 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 541 */
elmot 1:d0dfbce63a89 542 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TC(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 543 {
elmot 1:d0dfbce63a89 544 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_TCF) == (SWPMI_ISR_TCF));
elmot 1:d0dfbce63a89 545 }
elmot 1:d0dfbce63a89 546
elmot 1:d0dfbce63a89 547 /**
elmot 1:d0dfbce63a89 548 * @brief Check if a Resume by slave state has been detected during the SWP bus SUSPENDED
elmot 1:d0dfbce63a89 549 * state
elmot 1:d0dfbce63a89 550 * @rmtoll ISR SRF LL_SWPMI_IsActiveFlag_SR
elmot 1:d0dfbce63a89 551 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 552 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 553 */
elmot 1:d0dfbce63a89 554 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_SR(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 555 {
elmot 1:d0dfbce63a89 556 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_SRF) == (SWPMI_ISR_SRF));
elmot 1:d0dfbce63a89 557 }
elmot 1:d0dfbce63a89 558
elmot 1:d0dfbce63a89 559 /**
elmot 1:d0dfbce63a89 560 * @brief Check if SWP bus is in SUSPENDED or DEACTIVATED state
elmot 1:d0dfbce63a89 561 * @rmtoll ISR SUSP LL_SWPMI_IsActiveFlag_SUSP
elmot 1:d0dfbce63a89 562 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 563 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 564 */
elmot 1:d0dfbce63a89 565 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_SUSP(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 566 {
elmot 1:d0dfbce63a89 567 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_SUSP) == (SWPMI_ISR_SUSP));
elmot 1:d0dfbce63a89 568 }
elmot 1:d0dfbce63a89 569
elmot 1:d0dfbce63a89 570 /**
elmot 1:d0dfbce63a89 571 * @brief Check if SWP bus is in DEACTIVATED state
elmot 1:d0dfbce63a89 572 * @rmtoll ISR DEACTF LL_SWPMI_IsActiveFlag_DEACT
elmot 1:d0dfbce63a89 573 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 574 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 575 */
elmot 1:d0dfbce63a89 576 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_DEACT(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 577 {
elmot 1:d0dfbce63a89 578 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_DEACTF) == (SWPMI_ISR_DEACTF));
elmot 1:d0dfbce63a89 579 }
elmot 1:d0dfbce63a89 580
elmot 1:d0dfbce63a89 581 /**
elmot 1:d0dfbce63a89 582 * @brief Clear receive buffer full flag
elmot 1:d0dfbce63a89 583 * @rmtoll ICR CRXBFF LL_SWPMI_ClearFlag_RXBF
elmot 1:d0dfbce63a89 584 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 585 * @retval None
elmot 1:d0dfbce63a89 586 */
elmot 1:d0dfbce63a89 587 __STATIC_INLINE void LL_SWPMI_ClearFlag_RXBF(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 588 {
elmot 1:d0dfbce63a89 589 WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CRXBFF);
elmot 1:d0dfbce63a89 590 }
elmot 1:d0dfbce63a89 591
elmot 1:d0dfbce63a89 592 /**
elmot 1:d0dfbce63a89 593 * @brief Clear transmit buffer empty flag
elmot 1:d0dfbce63a89 594 * @rmtoll ICR CTXBEF LL_SWPMI_ClearFlag_TXBE
elmot 1:d0dfbce63a89 595 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 596 * @retval None
elmot 1:d0dfbce63a89 597 */
elmot 1:d0dfbce63a89 598 __STATIC_INLINE void LL_SWPMI_ClearFlag_TXBE(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 599 {
elmot 1:d0dfbce63a89 600 WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CTXBEF);
elmot 1:d0dfbce63a89 601 }
elmot 1:d0dfbce63a89 602
elmot 1:d0dfbce63a89 603 /**
elmot 1:d0dfbce63a89 604 * @brief Clear receive CRC error flag
elmot 1:d0dfbce63a89 605 * @rmtoll ICR CRXBERF LL_SWPMI_ClearFlag_RXBER
elmot 1:d0dfbce63a89 606 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 607 * @retval None
elmot 1:d0dfbce63a89 608 */
elmot 1:d0dfbce63a89 609 __STATIC_INLINE void LL_SWPMI_ClearFlag_RXBER(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 610 {
elmot 1:d0dfbce63a89 611 WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CRXBERF);
elmot 1:d0dfbce63a89 612 }
elmot 1:d0dfbce63a89 613
elmot 1:d0dfbce63a89 614 /**
elmot 1:d0dfbce63a89 615 * @brief Clear receive overrun error flag
elmot 1:d0dfbce63a89 616 * @rmtoll ICR CRXOVRF LL_SWPMI_ClearFlag_RXOVR
elmot 1:d0dfbce63a89 617 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 618 * @retval None
elmot 1:d0dfbce63a89 619 */
elmot 1:d0dfbce63a89 620 __STATIC_INLINE void LL_SWPMI_ClearFlag_RXOVR(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 621 {
elmot 1:d0dfbce63a89 622 WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CRXOVRF);
elmot 1:d0dfbce63a89 623 }
elmot 1:d0dfbce63a89 624
elmot 1:d0dfbce63a89 625 /**
elmot 1:d0dfbce63a89 626 * @brief Clear transmit underrun error flag
elmot 1:d0dfbce63a89 627 * @rmtoll ICR CTXUNRF LL_SWPMI_ClearFlag_TXUNR
elmot 1:d0dfbce63a89 628 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 629 * @retval None
elmot 1:d0dfbce63a89 630 */
elmot 1:d0dfbce63a89 631 __STATIC_INLINE void LL_SWPMI_ClearFlag_TXUNR(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 632 {
elmot 1:d0dfbce63a89 633 WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CTXUNRF);
elmot 1:d0dfbce63a89 634 }
elmot 1:d0dfbce63a89 635
elmot 1:d0dfbce63a89 636 /**
elmot 1:d0dfbce63a89 637 * @brief Clear transfer complete flag
elmot 1:d0dfbce63a89 638 * @rmtoll ICR CTCF LL_SWPMI_ClearFlag_TC
elmot 1:d0dfbce63a89 639 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 640 * @retval None
elmot 1:d0dfbce63a89 641 */
elmot 1:d0dfbce63a89 642 __STATIC_INLINE void LL_SWPMI_ClearFlag_TC(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 643 {
elmot 1:d0dfbce63a89 644 WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CTCF);
elmot 1:d0dfbce63a89 645 }
elmot 1:d0dfbce63a89 646
elmot 1:d0dfbce63a89 647 /**
elmot 1:d0dfbce63a89 648 * @brief Clear slave resume flag
elmot 1:d0dfbce63a89 649 * @rmtoll ICR CSRF LL_SWPMI_ClearFlag_SR
elmot 1:d0dfbce63a89 650 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 651 * @retval None
elmot 1:d0dfbce63a89 652 */
elmot 1:d0dfbce63a89 653 __STATIC_INLINE void LL_SWPMI_ClearFlag_SR(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 654 {
elmot 1:d0dfbce63a89 655 WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CSRF);
elmot 1:d0dfbce63a89 656 }
elmot 1:d0dfbce63a89 657
elmot 1:d0dfbce63a89 658 /**
elmot 1:d0dfbce63a89 659 * @}
elmot 1:d0dfbce63a89 660 */
elmot 1:d0dfbce63a89 661
elmot 1:d0dfbce63a89 662 /** @defgroup SWPMI_LL_EF_IT_Management IT_Management
elmot 1:d0dfbce63a89 663 * @{
elmot 1:d0dfbce63a89 664 */
elmot 1:d0dfbce63a89 665
elmot 1:d0dfbce63a89 666 /**
elmot 1:d0dfbce63a89 667 * @brief Enable Slave resume interrupt
elmot 1:d0dfbce63a89 668 * @rmtoll IER SRIE LL_SWPMI_EnableIT_SR
elmot 1:d0dfbce63a89 669 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 670 * @retval None
elmot 1:d0dfbce63a89 671 */
elmot 1:d0dfbce63a89 672 __STATIC_INLINE void LL_SWPMI_EnableIT_SR(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 673 {
elmot 1:d0dfbce63a89 674 SET_BIT(SWPMIx->IER, SWPMI_IER_SRIE);
elmot 1:d0dfbce63a89 675 }
elmot 1:d0dfbce63a89 676
elmot 1:d0dfbce63a89 677 /**
elmot 1:d0dfbce63a89 678 * @brief Enable Transmit complete interrupt
elmot 1:d0dfbce63a89 679 * @rmtoll IER TCIE LL_SWPMI_EnableIT_TC
elmot 1:d0dfbce63a89 680 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 681 * @retval None
elmot 1:d0dfbce63a89 682 */
elmot 1:d0dfbce63a89 683 __STATIC_INLINE void LL_SWPMI_EnableIT_TC(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 684 {
elmot 1:d0dfbce63a89 685 SET_BIT(SWPMIx->IER, SWPMI_IER_TCIE);
elmot 1:d0dfbce63a89 686 }
elmot 1:d0dfbce63a89 687
elmot 1:d0dfbce63a89 688 /**
elmot 1:d0dfbce63a89 689 * @brief Enable Transmit interrupt
elmot 1:d0dfbce63a89 690 * @rmtoll IER TIE LL_SWPMI_EnableIT_TX
elmot 1:d0dfbce63a89 691 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 692 * @retval None
elmot 1:d0dfbce63a89 693 */
elmot 1:d0dfbce63a89 694 __STATIC_INLINE void LL_SWPMI_EnableIT_TX(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 695 {
elmot 1:d0dfbce63a89 696 SET_BIT(SWPMIx->IER, SWPMI_IER_TIE);
elmot 1:d0dfbce63a89 697 }
elmot 1:d0dfbce63a89 698
elmot 1:d0dfbce63a89 699 /**
elmot 1:d0dfbce63a89 700 * @brief Enable Receive interrupt
elmot 1:d0dfbce63a89 701 * @rmtoll IER RIE LL_SWPMI_EnableIT_RX
elmot 1:d0dfbce63a89 702 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 703 * @retval None
elmot 1:d0dfbce63a89 704 */
elmot 1:d0dfbce63a89 705 __STATIC_INLINE void LL_SWPMI_EnableIT_RX(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 706 {
elmot 1:d0dfbce63a89 707 SET_BIT(SWPMIx->IER, SWPMI_IER_RIE);
elmot 1:d0dfbce63a89 708 }
elmot 1:d0dfbce63a89 709
elmot 1:d0dfbce63a89 710 /**
elmot 1:d0dfbce63a89 711 * @brief Enable Transmit underrun error interrupt
elmot 1:d0dfbce63a89 712 * @rmtoll IER TXUNRIE LL_SWPMI_EnableIT_TXUNR
elmot 1:d0dfbce63a89 713 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 714 * @retval None
elmot 1:d0dfbce63a89 715 */
elmot 1:d0dfbce63a89 716 __STATIC_INLINE void LL_SWPMI_EnableIT_TXUNR(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 717 {
elmot 1:d0dfbce63a89 718 SET_BIT(SWPMIx->IER, SWPMI_IER_TXUNRIE);
elmot 1:d0dfbce63a89 719 }
elmot 1:d0dfbce63a89 720
elmot 1:d0dfbce63a89 721 /**
elmot 1:d0dfbce63a89 722 * @brief Enable Receive overrun error interrupt
elmot 1:d0dfbce63a89 723 * @rmtoll IER RXOVRIE LL_SWPMI_EnableIT_RXOVR
elmot 1:d0dfbce63a89 724 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 725 * @retval None
elmot 1:d0dfbce63a89 726 */
elmot 1:d0dfbce63a89 727 __STATIC_INLINE void LL_SWPMI_EnableIT_RXOVR(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 728 {
elmot 1:d0dfbce63a89 729 SET_BIT(SWPMIx->IER, SWPMI_IER_RXOVRIE);
elmot 1:d0dfbce63a89 730 }
elmot 1:d0dfbce63a89 731
elmot 1:d0dfbce63a89 732 /**
elmot 1:d0dfbce63a89 733 * @brief Enable Receive CRC error interrupt
elmot 1:d0dfbce63a89 734 * @rmtoll IER RXBERIE LL_SWPMI_EnableIT_RXBER
elmot 1:d0dfbce63a89 735 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 736 * @retval None
elmot 1:d0dfbce63a89 737 */
elmot 1:d0dfbce63a89 738 __STATIC_INLINE void LL_SWPMI_EnableIT_RXBER(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 739 {
elmot 1:d0dfbce63a89 740 SET_BIT(SWPMIx->IER, SWPMI_IER_RXBERIE);
elmot 1:d0dfbce63a89 741 }
elmot 1:d0dfbce63a89 742
elmot 1:d0dfbce63a89 743 /**
elmot 1:d0dfbce63a89 744 * @brief Enable Transmit buffer empty interrupt
elmot 1:d0dfbce63a89 745 * @rmtoll IER TXBEIE LL_SWPMI_EnableIT_TXBE
elmot 1:d0dfbce63a89 746 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 747 * @retval None
elmot 1:d0dfbce63a89 748 */
elmot 1:d0dfbce63a89 749 __STATIC_INLINE void LL_SWPMI_EnableIT_TXBE(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 750 {
elmot 1:d0dfbce63a89 751 SET_BIT(SWPMIx->IER, SWPMI_IER_TXBEIE);
elmot 1:d0dfbce63a89 752 }
elmot 1:d0dfbce63a89 753
elmot 1:d0dfbce63a89 754 /**
elmot 1:d0dfbce63a89 755 * @brief Enable Receive buffer full interrupt
elmot 1:d0dfbce63a89 756 * @rmtoll IER RXBFIE LL_SWPMI_EnableIT_RXBF
elmot 1:d0dfbce63a89 757 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 758 * @retval None
elmot 1:d0dfbce63a89 759 */
elmot 1:d0dfbce63a89 760 __STATIC_INLINE void LL_SWPMI_EnableIT_RXBF(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 761 {
elmot 1:d0dfbce63a89 762 SET_BIT(SWPMIx->IER, SWPMI_IER_RXBFIE);
elmot 1:d0dfbce63a89 763 }
elmot 1:d0dfbce63a89 764
elmot 1:d0dfbce63a89 765 /**
elmot 1:d0dfbce63a89 766 * @brief Disable Slave resume interrupt
elmot 1:d0dfbce63a89 767 * @rmtoll IER SRIE LL_SWPMI_DisableIT_SR
elmot 1:d0dfbce63a89 768 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 769 * @retval None
elmot 1:d0dfbce63a89 770 */
elmot 1:d0dfbce63a89 771 __STATIC_INLINE void LL_SWPMI_DisableIT_SR(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 772 {
elmot 1:d0dfbce63a89 773 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_SRIE);
elmot 1:d0dfbce63a89 774 }
elmot 1:d0dfbce63a89 775
elmot 1:d0dfbce63a89 776 /**
elmot 1:d0dfbce63a89 777 * @brief Disable Transmit complete interrupt
elmot 1:d0dfbce63a89 778 * @rmtoll IER TCIE LL_SWPMI_DisableIT_TC
elmot 1:d0dfbce63a89 779 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 780 * @retval None
elmot 1:d0dfbce63a89 781 */
elmot 1:d0dfbce63a89 782 __STATIC_INLINE void LL_SWPMI_DisableIT_TC(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 783 {
elmot 1:d0dfbce63a89 784 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TCIE);
elmot 1:d0dfbce63a89 785 }
elmot 1:d0dfbce63a89 786
elmot 1:d0dfbce63a89 787 /**
elmot 1:d0dfbce63a89 788 * @brief Disable Transmit interrupt
elmot 1:d0dfbce63a89 789 * @rmtoll IER TIE LL_SWPMI_DisableIT_TX
elmot 1:d0dfbce63a89 790 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 791 * @retval None
elmot 1:d0dfbce63a89 792 */
elmot 1:d0dfbce63a89 793 __STATIC_INLINE void LL_SWPMI_DisableIT_TX(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 794 {
elmot 1:d0dfbce63a89 795 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TIE);
elmot 1:d0dfbce63a89 796 }
elmot 1:d0dfbce63a89 797
elmot 1:d0dfbce63a89 798 /**
elmot 1:d0dfbce63a89 799 * @brief Disable Receive interrupt
elmot 1:d0dfbce63a89 800 * @rmtoll IER RIE LL_SWPMI_DisableIT_RX
elmot 1:d0dfbce63a89 801 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 802 * @retval None
elmot 1:d0dfbce63a89 803 */
elmot 1:d0dfbce63a89 804 __STATIC_INLINE void LL_SWPMI_DisableIT_RX(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 805 {
elmot 1:d0dfbce63a89 806 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RIE);
elmot 1:d0dfbce63a89 807 }
elmot 1:d0dfbce63a89 808
elmot 1:d0dfbce63a89 809 /**
elmot 1:d0dfbce63a89 810 * @brief Disable Transmit underrun error interrupt
elmot 1:d0dfbce63a89 811 * @rmtoll IER TXUNRIE LL_SWPMI_DisableIT_TXUNR
elmot 1:d0dfbce63a89 812 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 813 * @retval None
elmot 1:d0dfbce63a89 814 */
elmot 1:d0dfbce63a89 815 __STATIC_INLINE void LL_SWPMI_DisableIT_TXUNR(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 816 {
elmot 1:d0dfbce63a89 817 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TXUNRIE);
elmot 1:d0dfbce63a89 818 }
elmot 1:d0dfbce63a89 819
elmot 1:d0dfbce63a89 820 /**
elmot 1:d0dfbce63a89 821 * @brief Disable Receive overrun error interrupt
elmot 1:d0dfbce63a89 822 * @rmtoll IER RXOVRIE LL_SWPMI_DisableIT_RXOVR
elmot 1:d0dfbce63a89 823 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 824 * @retval None
elmot 1:d0dfbce63a89 825 */
elmot 1:d0dfbce63a89 826 __STATIC_INLINE void LL_SWPMI_DisableIT_RXOVR(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 827 {
elmot 1:d0dfbce63a89 828 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RXOVRIE);
elmot 1:d0dfbce63a89 829 }
elmot 1:d0dfbce63a89 830
elmot 1:d0dfbce63a89 831 /**
elmot 1:d0dfbce63a89 832 * @brief Disable Receive CRC error interrupt
elmot 1:d0dfbce63a89 833 * @rmtoll IER RXBERIE LL_SWPMI_DisableIT_RXBER
elmot 1:d0dfbce63a89 834 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 835 * @retval None
elmot 1:d0dfbce63a89 836 */
elmot 1:d0dfbce63a89 837 __STATIC_INLINE void LL_SWPMI_DisableIT_RXBER(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 838 {
elmot 1:d0dfbce63a89 839 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RXBERIE);
elmot 1:d0dfbce63a89 840 }
elmot 1:d0dfbce63a89 841
elmot 1:d0dfbce63a89 842 /**
elmot 1:d0dfbce63a89 843 * @brief Disable Transmit buffer empty interrupt
elmot 1:d0dfbce63a89 844 * @rmtoll IER TXBEIE LL_SWPMI_DisableIT_TXBE
elmot 1:d0dfbce63a89 845 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 846 * @retval None
elmot 1:d0dfbce63a89 847 */
elmot 1:d0dfbce63a89 848 __STATIC_INLINE void LL_SWPMI_DisableIT_TXBE(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 849 {
elmot 1:d0dfbce63a89 850 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TXBEIE);
elmot 1:d0dfbce63a89 851 }
elmot 1:d0dfbce63a89 852
elmot 1:d0dfbce63a89 853 /**
elmot 1:d0dfbce63a89 854 * @brief Disable Receive buffer full interrupt
elmot 1:d0dfbce63a89 855 * @rmtoll IER RXBFIE LL_SWPMI_DisableIT_RXBF
elmot 1:d0dfbce63a89 856 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 857 * @retval None
elmot 1:d0dfbce63a89 858 */
elmot 1:d0dfbce63a89 859 __STATIC_INLINE void LL_SWPMI_DisableIT_RXBF(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 860 {
elmot 1:d0dfbce63a89 861 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RXBFIE);
elmot 1:d0dfbce63a89 862 }
elmot 1:d0dfbce63a89 863
elmot 1:d0dfbce63a89 864 /**
elmot 1:d0dfbce63a89 865 * @brief Check if Slave resume interrupt is enabled
elmot 1:d0dfbce63a89 866 * @rmtoll IER SRIE LL_SWPMI_IsEnabledIT_SR
elmot 1:d0dfbce63a89 867 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 868 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 869 */
elmot 1:d0dfbce63a89 870 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_SR(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 871 {
elmot 1:d0dfbce63a89 872 return (READ_BIT(SWPMIx->IER, SWPMI_IER_SRIE) == (SWPMI_IER_SRIE));
elmot 1:d0dfbce63a89 873 }
elmot 1:d0dfbce63a89 874
elmot 1:d0dfbce63a89 875 /**
elmot 1:d0dfbce63a89 876 * @brief Check if Transmit complete interrupt is enabled
elmot 1:d0dfbce63a89 877 * @rmtoll IER TCIE LL_SWPMI_IsEnabledIT_TC
elmot 1:d0dfbce63a89 878 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 879 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 880 */
elmot 1:d0dfbce63a89 881 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TC(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 882 {
elmot 1:d0dfbce63a89 883 return (READ_BIT(SWPMIx->IER, SWPMI_IER_TCIE) == (SWPMI_IER_TCIE));
elmot 1:d0dfbce63a89 884 }
elmot 1:d0dfbce63a89 885
elmot 1:d0dfbce63a89 886 /**
elmot 1:d0dfbce63a89 887 * @brief Check if Transmit interrupt is enabled
elmot 1:d0dfbce63a89 888 * @rmtoll IER TIE LL_SWPMI_IsEnabledIT_TX
elmot 1:d0dfbce63a89 889 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 890 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 891 */
elmot 1:d0dfbce63a89 892 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TX(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 893 {
elmot 1:d0dfbce63a89 894 return (READ_BIT(SWPMIx->IER, SWPMI_IER_TIE) == (SWPMI_IER_TIE));
elmot 1:d0dfbce63a89 895 }
elmot 1:d0dfbce63a89 896
elmot 1:d0dfbce63a89 897 /**
elmot 1:d0dfbce63a89 898 * @brief Check if Receive interrupt is enabled
elmot 1:d0dfbce63a89 899 * @rmtoll IER RIE LL_SWPMI_IsEnabledIT_RX
elmot 1:d0dfbce63a89 900 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 901 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 902 */
elmot 1:d0dfbce63a89 903 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RX(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 904 {
elmot 1:d0dfbce63a89 905 return (READ_BIT(SWPMIx->IER, SWPMI_IER_RIE) == (SWPMI_IER_RIE));
elmot 1:d0dfbce63a89 906 }
elmot 1:d0dfbce63a89 907
elmot 1:d0dfbce63a89 908 /**
elmot 1:d0dfbce63a89 909 * @brief Check if Transmit underrun error interrupt is enabled
elmot 1:d0dfbce63a89 910 * @rmtoll IER TXUNRIE LL_SWPMI_IsEnabledIT_TXUNR
elmot 1:d0dfbce63a89 911 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 912 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 913 */
elmot 1:d0dfbce63a89 914 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TXUNR(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 915 {
elmot 1:d0dfbce63a89 916 return (READ_BIT(SWPMIx->IER, SWPMI_IER_TXUNRIE) == (SWPMI_IER_TXUNRIE));
elmot 1:d0dfbce63a89 917 }
elmot 1:d0dfbce63a89 918
elmot 1:d0dfbce63a89 919 /**
elmot 1:d0dfbce63a89 920 * @brief Check if Receive overrun error interrupt is enabled
elmot 1:d0dfbce63a89 921 * @rmtoll IER RXOVRIE LL_SWPMI_IsEnabledIT_RXOVR
elmot 1:d0dfbce63a89 922 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 923 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 924 */
elmot 1:d0dfbce63a89 925 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RXOVR(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 926 {
elmot 1:d0dfbce63a89 927 return (READ_BIT(SWPMIx->IER, SWPMI_IER_RXOVRIE) == (SWPMI_IER_RXOVRIE));
elmot 1:d0dfbce63a89 928 }
elmot 1:d0dfbce63a89 929
elmot 1:d0dfbce63a89 930 /**
elmot 1:d0dfbce63a89 931 * @brief Check if Receive CRC error interrupt is enabled
elmot 1:d0dfbce63a89 932 * @rmtoll IER RXBERIE LL_SWPMI_IsEnabledIT_RXBER
elmot 1:d0dfbce63a89 933 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 934 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 935 */
elmot 1:d0dfbce63a89 936 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RXBER(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 937 {
elmot 1:d0dfbce63a89 938 return (READ_BIT(SWPMIx->IER, SWPMI_IER_RXBERIE) == (SWPMI_IER_RXBERIE));
elmot 1:d0dfbce63a89 939 }
elmot 1:d0dfbce63a89 940
elmot 1:d0dfbce63a89 941 /**
elmot 1:d0dfbce63a89 942 * @brief Check if Transmit buffer empty interrupt is enabled
elmot 1:d0dfbce63a89 943 * @rmtoll IER TXBEIE LL_SWPMI_IsEnabledIT_TXBE
elmot 1:d0dfbce63a89 944 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 945 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 946 */
elmot 1:d0dfbce63a89 947 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TXBE(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 948 {
elmot 1:d0dfbce63a89 949 return (READ_BIT(SWPMIx->IER, SWPMI_IER_TXBEIE) == (SWPMI_IER_TXBEIE));
elmot 1:d0dfbce63a89 950 }
elmot 1:d0dfbce63a89 951
elmot 1:d0dfbce63a89 952 /**
elmot 1:d0dfbce63a89 953 * @brief Check if Receive buffer full interrupt is enabled
elmot 1:d0dfbce63a89 954 * @rmtoll IER RXBFIE LL_SWPMI_IsEnabledIT_RXBF
elmot 1:d0dfbce63a89 955 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 956 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 957 */
elmot 1:d0dfbce63a89 958 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RXBF(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 959 {
elmot 1:d0dfbce63a89 960 return (READ_BIT(SWPMIx->IER, SWPMI_IER_RXBFIE) == (SWPMI_IER_RXBFIE));
elmot 1:d0dfbce63a89 961 }
elmot 1:d0dfbce63a89 962
elmot 1:d0dfbce63a89 963 /**
elmot 1:d0dfbce63a89 964 * @}
elmot 1:d0dfbce63a89 965 */
elmot 1:d0dfbce63a89 966
elmot 1:d0dfbce63a89 967 /** @defgroup SWPMI_LL_EF_DMA_Management DMA_Management
elmot 1:d0dfbce63a89 968 * @{
elmot 1:d0dfbce63a89 969 */
elmot 1:d0dfbce63a89 970
elmot 1:d0dfbce63a89 971 /**
elmot 1:d0dfbce63a89 972 * @brief Enable DMA mode for reception
elmot 1:d0dfbce63a89 973 * @rmtoll CR RXDMA LL_SWPMI_EnableDMAReq_RX
elmot 1:d0dfbce63a89 974 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 975 * @retval None
elmot 1:d0dfbce63a89 976 */
elmot 1:d0dfbce63a89 977 __STATIC_INLINE void LL_SWPMI_EnableDMAReq_RX(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 978 {
elmot 1:d0dfbce63a89 979 SET_BIT(SWPMIx->CR, SWPMI_CR_RXDMA);
elmot 1:d0dfbce63a89 980 }
elmot 1:d0dfbce63a89 981
elmot 1:d0dfbce63a89 982 /**
elmot 1:d0dfbce63a89 983 * @brief Disable DMA mode for reception
elmot 1:d0dfbce63a89 984 * @rmtoll CR RXDMA LL_SWPMI_DisableDMAReq_RX
elmot 1:d0dfbce63a89 985 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 986 * @retval None
elmot 1:d0dfbce63a89 987 */
elmot 1:d0dfbce63a89 988 __STATIC_INLINE void LL_SWPMI_DisableDMAReq_RX(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 989 {
elmot 1:d0dfbce63a89 990 CLEAR_BIT(SWPMIx->CR, SWPMI_CR_RXDMA);
elmot 1:d0dfbce63a89 991 }
elmot 1:d0dfbce63a89 992
elmot 1:d0dfbce63a89 993 /**
elmot 1:d0dfbce63a89 994 * @brief Check if DMA mode for reception is enabled
elmot 1:d0dfbce63a89 995 * @rmtoll CR RXDMA LL_SWPMI_IsEnabledDMAReq_RX
elmot 1:d0dfbce63a89 996 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 997 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 998 */
elmot 1:d0dfbce63a89 999 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledDMAReq_RX(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 1000 {
elmot 1:d0dfbce63a89 1001 return (READ_BIT(SWPMIx->CR, SWPMI_CR_RXDMA) == (SWPMI_CR_RXDMA));
elmot 1:d0dfbce63a89 1002 }
elmot 1:d0dfbce63a89 1003
elmot 1:d0dfbce63a89 1004 /**
elmot 1:d0dfbce63a89 1005 * @brief Enable DMA mode for transmission
elmot 1:d0dfbce63a89 1006 * @rmtoll CR TXDMA LL_SWPMI_EnableDMAReq_TX
elmot 1:d0dfbce63a89 1007 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 1008 * @retval None
elmot 1:d0dfbce63a89 1009 */
elmot 1:d0dfbce63a89 1010 __STATIC_INLINE void LL_SWPMI_EnableDMAReq_TX(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 1011 {
elmot 1:d0dfbce63a89 1012 SET_BIT(SWPMIx->CR, SWPMI_CR_TXDMA);
elmot 1:d0dfbce63a89 1013 }
elmot 1:d0dfbce63a89 1014
elmot 1:d0dfbce63a89 1015 /**
elmot 1:d0dfbce63a89 1016 * @brief Disable DMA mode for transmission
elmot 1:d0dfbce63a89 1017 * @rmtoll CR TXDMA LL_SWPMI_DisableDMAReq_TX
elmot 1:d0dfbce63a89 1018 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 1019 * @retval None
elmot 1:d0dfbce63a89 1020 */
elmot 1:d0dfbce63a89 1021 __STATIC_INLINE void LL_SWPMI_DisableDMAReq_TX(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 1022 {
elmot 1:d0dfbce63a89 1023 CLEAR_BIT(SWPMIx->CR, SWPMI_CR_TXDMA);
elmot 1:d0dfbce63a89 1024 }
elmot 1:d0dfbce63a89 1025
elmot 1:d0dfbce63a89 1026 /**
elmot 1:d0dfbce63a89 1027 * @brief Check if DMA mode for transmission is enabled
elmot 1:d0dfbce63a89 1028 * @rmtoll CR TXDMA LL_SWPMI_IsEnabledDMAReq_TX
elmot 1:d0dfbce63a89 1029 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 1030 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1031 */
elmot 1:d0dfbce63a89 1032 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledDMAReq_TX(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 1033 {
elmot 1:d0dfbce63a89 1034 return (READ_BIT(SWPMIx->CR, SWPMI_CR_TXDMA) == (SWPMI_CR_TXDMA));
elmot 1:d0dfbce63a89 1035 }
elmot 1:d0dfbce63a89 1036
elmot 1:d0dfbce63a89 1037 /**
elmot 1:d0dfbce63a89 1038 * @brief Get the data register address used for DMA transfer
elmot 1:d0dfbce63a89 1039 * @rmtoll TDR TD LL_SWPMI_DMA_GetRegAddr\n
elmot 1:d0dfbce63a89 1040 * RDR RD LL_SWPMI_DMA_GetRegAddr
elmot 1:d0dfbce63a89 1041 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 1042 * @param Direction This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1043 * @arg @ref LL_SWPMI_DMA_REG_DATA_TRANSMIT
elmot 1:d0dfbce63a89 1044 * @arg @ref LL_SWPMI_DMA_REG_DATA_RECEIVE
elmot 1:d0dfbce63a89 1045 * @retval Address of data register
elmot 1:d0dfbce63a89 1046 */
elmot 1:d0dfbce63a89 1047 __STATIC_INLINE uint32_t LL_SWPMI_DMA_GetRegAddr(SWPMI_TypeDef *SWPMIx, uint32_t Direction)
elmot 1:d0dfbce63a89 1048 {
elmot 1:d0dfbce63a89 1049 register uint32_t data_reg_addr = 0;
elmot 1:d0dfbce63a89 1050
elmot 1:d0dfbce63a89 1051 if (Direction == LL_SWPMI_DMA_REG_DATA_TRANSMIT)
elmot 1:d0dfbce63a89 1052 {
elmot 1:d0dfbce63a89 1053 /* return address of TDR register */
elmot 1:d0dfbce63a89 1054 data_reg_addr = (uint32_t)&(SWPMIx->TDR);
elmot 1:d0dfbce63a89 1055 }
elmot 1:d0dfbce63a89 1056 else
elmot 1:d0dfbce63a89 1057 {
elmot 1:d0dfbce63a89 1058 /* return address of RDR register */
elmot 1:d0dfbce63a89 1059 data_reg_addr = (uint32_t)&(SWPMIx->RDR);
elmot 1:d0dfbce63a89 1060 }
elmot 1:d0dfbce63a89 1061
elmot 1:d0dfbce63a89 1062 return data_reg_addr;
elmot 1:d0dfbce63a89 1063 }
elmot 1:d0dfbce63a89 1064
elmot 1:d0dfbce63a89 1065 /**
elmot 1:d0dfbce63a89 1066 * @}
elmot 1:d0dfbce63a89 1067 */
elmot 1:d0dfbce63a89 1068
elmot 1:d0dfbce63a89 1069 /** @defgroup SWPMI_LL_EF_Data_Management Data_Management
elmot 1:d0dfbce63a89 1070 * @{
elmot 1:d0dfbce63a89 1071 */
elmot 1:d0dfbce63a89 1072
elmot 1:d0dfbce63a89 1073 /**
elmot 1:d0dfbce63a89 1074 * @brief Retrieve number of data bytes present in payload of received frame
elmot 1:d0dfbce63a89 1075 * @rmtoll RFL RFL LL_SWPMI_GetReceiveFrameLength
elmot 1:d0dfbce63a89 1076 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 1077 * @retval Value between Min_Data=0x00 and Max_Data=0x1F
elmot 1:d0dfbce63a89 1078 */
elmot 1:d0dfbce63a89 1079 __STATIC_INLINE uint32_t LL_SWPMI_GetReceiveFrameLength(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 1080 {
elmot 1:d0dfbce63a89 1081 return (uint32_t)(READ_BIT(SWPMIx->RFL, SWPMI_RFL_RFL));
elmot 1:d0dfbce63a89 1082 }
elmot 1:d0dfbce63a89 1083
elmot 1:d0dfbce63a89 1084 /**
elmot 1:d0dfbce63a89 1085 * @brief Transmit Data Register
elmot 1:d0dfbce63a89 1086 * @rmtoll TDR TD LL_SWPMI_TransmitData32
elmot 1:d0dfbce63a89 1087 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 1088 * @param TxData Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
elmot 1:d0dfbce63a89 1089 * @retval None
elmot 1:d0dfbce63a89 1090 */
elmot 1:d0dfbce63a89 1091 __STATIC_INLINE void LL_SWPMI_TransmitData32(SWPMI_TypeDef *SWPMIx, uint32_t TxData)
elmot 1:d0dfbce63a89 1092 {
elmot 1:d0dfbce63a89 1093 WRITE_REG(SWPMIx->TDR, TxData);
elmot 1:d0dfbce63a89 1094 }
elmot 1:d0dfbce63a89 1095
elmot 1:d0dfbce63a89 1096 /**
elmot 1:d0dfbce63a89 1097 * @brief Receive Data Register
elmot 1:d0dfbce63a89 1098 * @rmtoll RDR RD LL_SWPMI_ReceiveData32
elmot 1:d0dfbce63a89 1099 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 1100 * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
elmot 1:d0dfbce63a89 1101 */
elmot 1:d0dfbce63a89 1102 __STATIC_INLINE uint32_t LL_SWPMI_ReceiveData32(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 1103 {
elmot 1:d0dfbce63a89 1104 return (uint32_t)(READ_BIT(SWPMIx->RDR, SWPMI_RDR_RD));
elmot 1:d0dfbce63a89 1105 }
elmot 1:d0dfbce63a89 1106
elmot 1:d0dfbce63a89 1107 /**
elmot 1:d0dfbce63a89 1108 * @brief Enable SWP Transceiver Bypass
elmot 1:d0dfbce63a89 1109 * @note The external interface for SWPMI is SWPMI_IO
elmot 1:d0dfbce63a89 1110 * (SWPMI_RX, SWPMI_TX and SWPMI_SUSPEND signals are not available on GPIOs)
elmot 1:d0dfbce63a89 1111 * @rmtoll OR TBYP LL_SWPMI_EnableTXBypass
elmot 1:d0dfbce63a89 1112 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 1113 * @retval None
elmot 1:d0dfbce63a89 1114 */
elmot 1:d0dfbce63a89 1115 __STATIC_INLINE void LL_SWPMI_EnableTXBypass(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 1116 {
elmot 1:d0dfbce63a89 1117 CLEAR_BIT(SWPMIx->OR, SWPMI_OR_TBYP);
elmot 1:d0dfbce63a89 1118 }
elmot 1:d0dfbce63a89 1119
elmot 1:d0dfbce63a89 1120 /**
elmot 1:d0dfbce63a89 1121 * @brief Disable SWP Transceiver Bypass
elmot 1:d0dfbce63a89 1122 * @note SWPMI_RX, SWPMI_TX and SWPMI_SUSPEND signals are available as alternate
elmot 1:d0dfbce63a89 1123 * function on GPIOs. This configuration is selected to connect an external transceiver
elmot 1:d0dfbce63a89 1124 * @rmtoll OR TBYP LL_SWPMI_DisableTXBypass
elmot 1:d0dfbce63a89 1125 * @param SWPMIx SWPMI Instance
elmot 1:d0dfbce63a89 1126 * @retval None
elmot 1:d0dfbce63a89 1127 */
elmot 1:d0dfbce63a89 1128 __STATIC_INLINE void LL_SWPMI_DisableTXBypass(SWPMI_TypeDef *SWPMIx)
elmot 1:d0dfbce63a89 1129 {
elmot 1:d0dfbce63a89 1130 SET_BIT(SWPMIx->OR, SWPMI_OR_TBYP);
elmot 1:d0dfbce63a89 1131 }
elmot 1:d0dfbce63a89 1132
elmot 1:d0dfbce63a89 1133 /**
elmot 1:d0dfbce63a89 1134 * @}
elmot 1:d0dfbce63a89 1135 */
elmot 1:d0dfbce63a89 1136
elmot 1:d0dfbce63a89 1137 #if defined(USE_FULL_LL_DRIVER)
elmot 1:d0dfbce63a89 1138 /** @defgroup SWPMI_LL_EF_Init Initialization and de-initialization functions
elmot 1:d0dfbce63a89 1139 * @{
elmot 1:d0dfbce63a89 1140 */
elmot 1:d0dfbce63a89 1141
elmot 1:d0dfbce63a89 1142 ErrorStatus LL_SWPMI_DeInit(SWPMI_TypeDef *SWPMIx);
elmot 1:d0dfbce63a89 1143 ErrorStatus LL_SWPMI_Init(SWPMI_TypeDef *SWPMIx, LL_SWPMI_InitTypeDef *SWPMI_InitStruct);
elmot 1:d0dfbce63a89 1144 void LL_SWPMI_StructInit(LL_SWPMI_InitTypeDef *SWPMI_InitStruct);
elmot 1:d0dfbce63a89 1145
elmot 1:d0dfbce63a89 1146 /**
elmot 1:d0dfbce63a89 1147 * @}
elmot 1:d0dfbce63a89 1148 */
elmot 1:d0dfbce63a89 1149 #endif /*USE_FULL_LL_DRIVER*/
elmot 1:d0dfbce63a89 1150
elmot 1:d0dfbce63a89 1151 /**
elmot 1:d0dfbce63a89 1152 * @}
elmot 1:d0dfbce63a89 1153 */
elmot 1:d0dfbce63a89 1154
elmot 1:d0dfbce63a89 1155 /**
elmot 1:d0dfbce63a89 1156 * @}
elmot 1:d0dfbce63a89 1157 */
elmot 1:d0dfbce63a89 1158
elmot 1:d0dfbce63a89 1159 #endif /* defined (SWPMI1) */
elmot 1:d0dfbce63a89 1160
elmot 1:d0dfbce63a89 1161 /**
elmot 1:d0dfbce63a89 1162 * @}
elmot 1:d0dfbce63a89 1163 */
elmot 1:d0dfbce63a89 1164
elmot 1:d0dfbce63a89 1165 #ifdef __cplusplus
elmot 1:d0dfbce63a89 1166 }
elmot 1:d0dfbce63a89 1167 #endif
elmot 1:d0dfbce63a89 1168
elmot 1:d0dfbce63a89 1169 #endif /* __STM32L4xx_LL_SWPMI_H */
elmot 1:d0dfbce63a89 1170
elmot 1:d0dfbce63a89 1171 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/