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HAL_L476/stm32l4xx_hal_nand.h@1:d0dfbce63a89, 2017-02-24 (annotated)

Committer:
elmot
Date:
Fri Feb 24 21:13:56 2017 +0000
Revision:
1:d0dfbce63a89
Ready-to-copy

Who changed what in which revision?

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elmot 1:d0dfbce63a89 1 /**
elmot 1:d0dfbce63a89 2 ******************************************************************************
elmot 1:d0dfbce63a89 3 * @file stm32l4xx_hal_nand.h
elmot 1:d0dfbce63a89 4 * @author MCD Application Team
elmot 1:d0dfbce63a89 5 * @version V1.5.1
elmot 1:d0dfbce63a89 6 * @date 31-May-2016
elmot 1:d0dfbce63a89 7 * @brief Header file of NAND HAL module.
elmot 1:d0dfbce63a89 8 ******************************************************************************
elmot 1:d0dfbce63a89 9 * @attention
elmot 1:d0dfbce63a89 10 *
elmot 1:d0dfbce63a89 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot 1:d0dfbce63a89 12 *
elmot 1:d0dfbce63a89 13 * Redistribution and use in source and binary forms, with or without modification,
elmot 1:d0dfbce63a89 14 * are permitted provided that the following conditions are met:
elmot 1:d0dfbce63a89 15 * 1. Redistributions of source code must retain the above copyright notice,
elmot 1:d0dfbce63a89 16 * this list of conditions and the following disclaimer.
elmot 1:d0dfbce63a89 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
elmot 1:d0dfbce63a89 18 * this list of conditions and the following disclaimer in the documentation
elmot 1:d0dfbce63a89 19 * and/or other materials provided with the distribution.
elmot 1:d0dfbce63a89 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot 1:d0dfbce63a89 21 * may be used to endorse or promote products derived from this software
elmot 1:d0dfbce63a89 22 * without specific prior written permission.
elmot 1:d0dfbce63a89 23 *
elmot 1:d0dfbce63a89 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot 1:d0dfbce63a89 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot 1:d0dfbce63a89 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot 1:d0dfbce63a89 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot 1:d0dfbce63a89 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot 1:d0dfbce63a89 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot 1:d0dfbce63a89 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot 1:d0dfbce63a89 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot 1:d0dfbce63a89 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot 1:d0dfbce63a89 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot 1:d0dfbce63a89 34 *
elmot 1:d0dfbce63a89 35 ******************************************************************************
elmot 1:d0dfbce63a89 36 */
elmot 1:d0dfbce63a89 37
elmot 1:d0dfbce63a89 38 /* Define to prevent recursive inclusion -------------------------------------*/
elmot 1:d0dfbce63a89 39 #ifndef __STM32L4xx_HAL_NAND_H
elmot 1:d0dfbce63a89 40 #define __STM32L4xx_HAL_NAND_H
elmot 1:d0dfbce63a89 41
elmot 1:d0dfbce63a89 42 #ifdef __cplusplus
elmot 1:d0dfbce63a89 43 extern "C" {
elmot 1:d0dfbce63a89 44 #endif
elmot 1:d0dfbce63a89 45
elmot 1:d0dfbce63a89 46 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
elmot 1:d0dfbce63a89 47
elmot 1:d0dfbce63a89 48 /* Includes ------------------------------------------------------------------*/
elmot 1:d0dfbce63a89 49 #include "stm32l4xx_ll_fmc.h"
elmot 1:d0dfbce63a89 50
elmot 1:d0dfbce63a89 51 /** @addtogroup STM32L4xx_HAL_Driver
elmot 1:d0dfbce63a89 52 * @{
elmot 1:d0dfbce63a89 53 */
elmot 1:d0dfbce63a89 54
elmot 1:d0dfbce63a89 55 /** @addtogroup NAND
elmot 1:d0dfbce63a89 56 * @{
elmot 1:d0dfbce63a89 57 */
elmot 1:d0dfbce63a89 58
elmot 1:d0dfbce63a89 59 /** @addtogroup NAND_Private_Constants
elmot 1:d0dfbce63a89 60 * @{
elmot 1:d0dfbce63a89 61 */
elmot 1:d0dfbce63a89 62
elmot 1:d0dfbce63a89 63 #define NAND_DEVICE FMC_BANK3
elmot 1:d0dfbce63a89 64 #define NAND_WRITE_TIMEOUT ((uint32_t)1000)
elmot 1:d0dfbce63a89 65
elmot 1:d0dfbce63a89 66 #define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */
elmot 1:d0dfbce63a89 67 #define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */
elmot 1:d0dfbce63a89 68
elmot 1:d0dfbce63a89 69 #define NAND_CMD_AREA_A ((uint8_t)0x00)
elmot 1:d0dfbce63a89 70 #define NAND_CMD_AREA_B ((uint8_t)0x01)
elmot 1:d0dfbce63a89 71 #define NAND_CMD_AREA_C ((uint8_t)0x50)
elmot 1:d0dfbce63a89 72 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30)
elmot 1:d0dfbce63a89 73
elmot 1:d0dfbce63a89 74 #define NAND_CMD_WRITE0 ((uint8_t)0x80)
elmot 1:d0dfbce63a89 75 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10)
elmot 1:d0dfbce63a89 76 #define NAND_CMD_ERASE0 ((uint8_t)0x60)
elmot 1:d0dfbce63a89 77 #define NAND_CMD_ERASE1 ((uint8_t)0xD0)
elmot 1:d0dfbce63a89 78 #define NAND_CMD_READID ((uint8_t)0x90)
elmot 1:d0dfbce63a89 79 #define NAND_CMD_STATUS ((uint8_t)0x70)
elmot 1:d0dfbce63a89 80 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A)
elmot 1:d0dfbce63a89 81 #define NAND_CMD_RESET ((uint8_t)0xFF)
elmot 1:d0dfbce63a89 82
elmot 1:d0dfbce63a89 83 /* NAND memory status */
elmot 1:d0dfbce63a89 84 #define NAND_VALID_ADDRESS ((uint32_t)0x00000100)
elmot 1:d0dfbce63a89 85 #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200)
elmot 1:d0dfbce63a89 86 #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400)
elmot 1:d0dfbce63a89 87 #define NAND_BUSY ((uint32_t)0x00000000)
elmot 1:d0dfbce63a89 88 #define NAND_ERROR ((uint32_t)0x00000001)
elmot 1:d0dfbce63a89 89 #define NAND_READY ((uint32_t)0x00000040)
elmot 1:d0dfbce63a89 90
elmot 1:d0dfbce63a89 91 /**
elmot 1:d0dfbce63a89 92 * @}
elmot 1:d0dfbce63a89 93 */
elmot 1:d0dfbce63a89 94
elmot 1:d0dfbce63a89 95 /** @addtogroup NAND_Private_Macros
elmot 1:d0dfbce63a89 96 * @{
elmot 1:d0dfbce63a89 97 */
elmot 1:d0dfbce63a89 98
elmot 1:d0dfbce63a89 99 /**
elmot 1:d0dfbce63a89 100 * @brief NAND memory address computation.
elmot 1:d0dfbce63a89 101 * @param __ADDRESS__: NAND memory address.
elmot 1:d0dfbce63a89 102 * @param __HANDLE__: NAND handle.
elmot 1:d0dfbce63a89 103 * @retval NAND Raw address value
elmot 1:d0dfbce63a89 104 */
elmot 1:d0dfbce63a89 105 #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) (((__ADDRESS__)->Page) + \
elmot 1:d0dfbce63a89 106 (((__ADDRESS__)->Block + (((__ADDRESS__)->Zone) * ((__HANDLE__)->Info.ZoneSize)))* ((__HANDLE__)->Info.BlockSize * ((__HANDLE__)->Info.PageSize + (__HANDLE__)->Info.SpareAreaSize))))
elmot 1:d0dfbce63a89 107
elmot 1:d0dfbce63a89 108 /**
elmot 1:d0dfbce63a89 109 * @brief NAND memory address cycling.
elmot 1:d0dfbce63a89 110 * @param __ADDRESS__: NAND memory address.
elmot 1:d0dfbce63a89 111 * @retval NAND address cycling value.
elmot 1:d0dfbce63a89 112 */
elmot 1:d0dfbce63a89 113 #define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
elmot 1:d0dfbce63a89 114 #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */
elmot 1:d0dfbce63a89 115 #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
elmot 1:d0dfbce63a89 116 #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */
elmot 1:d0dfbce63a89 117
elmot 1:d0dfbce63a89 118 /**
elmot 1:d0dfbce63a89 119 * @}
elmot 1:d0dfbce63a89 120 */
elmot 1:d0dfbce63a89 121
elmot 1:d0dfbce63a89 122 /* Exported typedef ----------------------------------------------------------*/
elmot 1:d0dfbce63a89 123 /* Exported types ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 124 /** @defgroup NAND_Exported_Types NAND Exported Types
elmot 1:d0dfbce63a89 125 * @{
elmot 1:d0dfbce63a89 126 */
elmot 1:d0dfbce63a89 127
elmot 1:d0dfbce63a89 128 /**
elmot 1:d0dfbce63a89 129 * @brief HAL NAND State structures definition
elmot 1:d0dfbce63a89 130 */
elmot 1:d0dfbce63a89 131 typedef enum
elmot 1:d0dfbce63a89 132 {
elmot 1:d0dfbce63a89 133 HAL_NAND_STATE_RESET = 0x00, /*!< NAND not yet initialized or disabled */
elmot 1:d0dfbce63a89 134 HAL_NAND_STATE_READY = 0x01, /*!< NAND initialized and ready for use */
elmot 1:d0dfbce63a89 135 HAL_NAND_STATE_BUSY = 0x02, /*!< NAND internal process is ongoing */
elmot 1:d0dfbce63a89 136 HAL_NAND_STATE_ERROR = 0x03 /*!< NAND error state */
elmot 1:d0dfbce63a89 137 }HAL_NAND_StateTypeDef;
elmot 1:d0dfbce63a89 138
elmot 1:d0dfbce63a89 139 /**
elmot 1:d0dfbce63a89 140 * @brief NAND Memory electronic signature Structure definition
elmot 1:d0dfbce63a89 141 */
elmot 1:d0dfbce63a89 142 typedef struct
elmot 1:d0dfbce63a89 143 {
elmot 1:d0dfbce63a89 144 /*<! NAND memory electronic signature maker and device IDs */
elmot 1:d0dfbce63a89 145
elmot 1:d0dfbce63a89 146 uint8_t Maker_Id;
elmot 1:d0dfbce63a89 147
elmot 1:d0dfbce63a89 148 uint8_t Device_Id;
elmot 1:d0dfbce63a89 149
elmot 1:d0dfbce63a89 150 uint8_t Third_Id;
elmot 1:d0dfbce63a89 151
elmot 1:d0dfbce63a89 152 uint8_t Fourth_Id;
elmot 1:d0dfbce63a89 153 }NAND_IDTypeDef;
elmot 1:d0dfbce63a89 154
elmot 1:d0dfbce63a89 155 /**
elmot 1:d0dfbce63a89 156 * @brief NAND Memory address Structure definition
elmot 1:d0dfbce63a89 157 */
elmot 1:d0dfbce63a89 158 typedef struct
elmot 1:d0dfbce63a89 159 {
elmot 1:d0dfbce63a89 160 uint16_t Page; /*!< NAND memory Page address */
elmot 1:d0dfbce63a89 161
elmot 1:d0dfbce63a89 162 uint16_t Zone; /*!< NAND memory Zone address */
elmot 1:d0dfbce63a89 163
elmot 1:d0dfbce63a89 164 uint16_t Block; /*!< NAND memory Block address */
elmot 1:d0dfbce63a89 165
elmot 1:d0dfbce63a89 166 }NAND_AddressTypeDef;
elmot 1:d0dfbce63a89 167
elmot 1:d0dfbce63a89 168 /**
elmot 1:d0dfbce63a89 169 * @brief NAND Memory info Structure definition
elmot 1:d0dfbce63a89 170 */
elmot 1:d0dfbce63a89 171 typedef struct
elmot 1:d0dfbce63a89 172 {
elmot 1:d0dfbce63a89 173 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in K. bytes */
elmot 1:d0dfbce63a89 174
elmot 1:d0dfbce63a89 175 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in K. bytes */
elmot 1:d0dfbce63a89 176
elmot 1:d0dfbce63a89 177 uint32_t BlockSize; /*!< NAND memory block size number of pages */
elmot 1:d0dfbce63a89 178
elmot 1:d0dfbce63a89 179 uint32_t BlockNbr; /*!< NAND memory number of blocks */
elmot 1:d0dfbce63a89 180
elmot 1:d0dfbce63a89 181 uint32_t ZoneSize; /*!< NAND memory zone size measured in number of blocks */
elmot 1:d0dfbce63a89 182 }NAND_InfoTypeDef;
elmot 1:d0dfbce63a89 183
elmot 1:d0dfbce63a89 184 /**
elmot 1:d0dfbce63a89 185 * @brief NAND handle Structure definition
elmot 1:d0dfbce63a89 186 */
elmot 1:d0dfbce63a89 187 typedef struct
elmot 1:d0dfbce63a89 188 {
elmot 1:d0dfbce63a89 189 FMC_NAND_TypeDef *Instance; /*!< Register base address */
elmot 1:d0dfbce63a89 190
elmot 1:d0dfbce63a89 191 FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
elmot 1:d0dfbce63a89 192
elmot 1:d0dfbce63a89 193 HAL_LockTypeDef Lock; /*!< NAND locking object */
elmot 1:d0dfbce63a89 194
elmot 1:d0dfbce63a89 195 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
elmot 1:d0dfbce63a89 196
elmot 1:d0dfbce63a89 197 NAND_InfoTypeDef Info; /*!< NAND characteristic information structure */
elmot 1:d0dfbce63a89 198 }NAND_HandleTypeDef;
elmot 1:d0dfbce63a89 199
elmot 1:d0dfbce63a89 200 /**
elmot 1:d0dfbce63a89 201 * @}
elmot 1:d0dfbce63a89 202 */
elmot 1:d0dfbce63a89 203
elmot 1:d0dfbce63a89 204 /* Exported constants --------------------------------------------------------*/
elmot 1:d0dfbce63a89 205 /* Exported macro ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 206 /** @defgroup NAND_Exported_Macros NAND Exported Macros
elmot 1:d0dfbce63a89 207 * @{
elmot 1:d0dfbce63a89 208 */
elmot 1:d0dfbce63a89 209
elmot 1:d0dfbce63a89 210 /** @brief Reset NAND handle state.
elmot 1:d0dfbce63a89 211 * @param __HANDLE__: specifies the NAND handle.
elmot 1:d0dfbce63a89 212 * @retval None
elmot 1:d0dfbce63a89 213 */
elmot 1:d0dfbce63a89 214 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
elmot 1:d0dfbce63a89 215
elmot 1:d0dfbce63a89 216 /**
elmot 1:d0dfbce63a89 217 * @}
elmot 1:d0dfbce63a89 218 */
elmot 1:d0dfbce63a89 219
elmot 1:d0dfbce63a89 220 /* Exported functions --------------------------------------------------------*/
elmot 1:d0dfbce63a89 221 /** @addtogroup NAND_Exported_Functions NAND Exported Functions
elmot 1:d0dfbce63a89 222 * @{
elmot 1:d0dfbce63a89 223 */
elmot 1:d0dfbce63a89 224
elmot 1:d0dfbce63a89 225 /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
elmot 1:d0dfbce63a89 226 * @{
elmot 1:d0dfbce63a89 227 */
elmot 1:d0dfbce63a89 228
elmot 1:d0dfbce63a89 229 /* Initialization/de-initialization functions ********************************/
elmot 1:d0dfbce63a89 230 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
elmot 1:d0dfbce63a89 231 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
elmot 1:d0dfbce63a89 232 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
elmot 1:d0dfbce63a89 233 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
elmot 1:d0dfbce63a89 234 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
elmot 1:d0dfbce63a89 235 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
elmot 1:d0dfbce63a89 236
elmot 1:d0dfbce63a89 237 /**
elmot 1:d0dfbce63a89 238 * @}
elmot 1:d0dfbce63a89 239 */
elmot 1:d0dfbce63a89 240
elmot 1:d0dfbce63a89 241 /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
elmot 1:d0dfbce63a89 242 * @{
elmot 1:d0dfbce63a89 243 */
elmot 1:d0dfbce63a89 244
elmot 1:d0dfbce63a89 245 /* IO operation functions ****************************************************/
elmot 1:d0dfbce63a89 246 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
elmot 1:d0dfbce63a89 247 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
elmot 1:d0dfbce63a89 248 HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
elmot 1:d0dfbce63a89 249 HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
elmot 1:d0dfbce63a89 250 HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
elmot 1:d0dfbce63a89 251 HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
elmot 1:d0dfbce63a89 252 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
elmot 1:d0dfbce63a89 253 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
elmot 1:d0dfbce63a89 254 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
elmot 1:d0dfbce63a89 255
elmot 1:d0dfbce63a89 256 /**
elmot 1:d0dfbce63a89 257 * @}
elmot 1:d0dfbce63a89 258 */
elmot 1:d0dfbce63a89 259
elmot 1:d0dfbce63a89 260 /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
elmot 1:d0dfbce63a89 261 * @{
elmot 1:d0dfbce63a89 262 */
elmot 1:d0dfbce63a89 263
elmot 1:d0dfbce63a89 264 /* NAND Control functions ****************************************************/
elmot 1:d0dfbce63a89 265 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
elmot 1:d0dfbce63a89 266 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
elmot 1:d0dfbce63a89 267 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
elmot 1:d0dfbce63a89 268
elmot 1:d0dfbce63a89 269 /**
elmot 1:d0dfbce63a89 270 * @}
elmot 1:d0dfbce63a89 271 */
elmot 1:d0dfbce63a89 272
elmot 1:d0dfbce63a89 273 /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions
elmot 1:d0dfbce63a89 274 * @{
elmot 1:d0dfbce63a89 275 */
elmot 1:d0dfbce63a89 276
elmot 1:d0dfbce63a89 277 /* NAND State functions *******************************************************/
elmot 1:d0dfbce63a89 278 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
elmot 1:d0dfbce63a89 279 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
elmot 1:d0dfbce63a89 280
elmot 1:d0dfbce63a89 281 /**
elmot 1:d0dfbce63a89 282 * @}
elmot 1:d0dfbce63a89 283 */
elmot 1:d0dfbce63a89 284
elmot 1:d0dfbce63a89 285 /**
elmot 1:d0dfbce63a89 286 * @}
elmot 1:d0dfbce63a89 287 */
elmot 1:d0dfbce63a89 288
elmot 1:d0dfbce63a89 289 /**
elmot 1:d0dfbce63a89 290 * @}
elmot 1:d0dfbce63a89 291 */
elmot 1:d0dfbce63a89 292
elmot 1:d0dfbce63a89 293 /**
elmot 1:d0dfbce63a89 294 * @}
elmot 1:d0dfbce63a89 295 */
elmot 1:d0dfbce63a89 296
elmot 1:d0dfbce63a89 297 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
elmot 1:d0dfbce63a89 298
elmot 1:d0dfbce63a89 299 #ifdef __cplusplus
elmot 1:d0dfbce63a89 300 }
elmot 1:d0dfbce63a89 301 #endif
elmot 1:d0dfbce63a89 302
elmot 1:d0dfbce63a89 303 #endif /* __STM32L4xx_HAL_NAND_H */
elmot 1:d0dfbce63a89 304
elmot 1:d0dfbce63a89 305 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/