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HAL_L476/stm32l4xx_ll_spi.h@1:d0dfbce63a89, 2017-02-24 (annotated)

Committer:
elmot
Date:
Fri Feb 24 21:13:56 2017 +0000
Revision:
1:d0dfbce63a89
Ready-to-copy

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elmot 1:d0dfbce63a89 1 /**
elmot 1:d0dfbce63a89 2 ******************************************************************************
elmot 1:d0dfbce63a89 3 * @file stm32l4xx_ll_spi.h
elmot 1:d0dfbce63a89 4 * @author MCD Application Team
elmot 1:d0dfbce63a89 5 * @version V1.5.1
elmot 1:d0dfbce63a89 6 * @date 31-May-2016
elmot 1:d0dfbce63a89 7 * @brief Header file of SPI LL module.
elmot 1:d0dfbce63a89 8 ******************************************************************************
elmot 1:d0dfbce63a89 9 * @attention
elmot 1:d0dfbce63a89 10 *
elmot 1:d0dfbce63a89 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot 1:d0dfbce63a89 12 *
elmot 1:d0dfbce63a89 13 * Redistribution and use in source and binary forms, with or without modification,
elmot 1:d0dfbce63a89 14 * are permitted provided that the following conditions are met:
elmot 1:d0dfbce63a89 15 * 1. Redistributions of source code must retain the above copyright notice,
elmot 1:d0dfbce63a89 16 * this list of conditions and the following disclaimer.
elmot 1:d0dfbce63a89 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
elmot 1:d0dfbce63a89 18 * this list of conditions and the following disclaimer in the documentation
elmot 1:d0dfbce63a89 19 * and/or other materials provided with the distribution.
elmot 1:d0dfbce63a89 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot 1:d0dfbce63a89 21 * may be used to endorse or promote products derived from this software
elmot 1:d0dfbce63a89 22 * without specific prior written permission.
elmot 1:d0dfbce63a89 23 *
elmot 1:d0dfbce63a89 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot 1:d0dfbce63a89 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot 1:d0dfbce63a89 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot 1:d0dfbce63a89 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot 1:d0dfbce63a89 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot 1:d0dfbce63a89 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot 1:d0dfbce63a89 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot 1:d0dfbce63a89 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot 1:d0dfbce63a89 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot 1:d0dfbce63a89 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot 1:d0dfbce63a89 34 *
elmot 1:d0dfbce63a89 35 ******************************************************************************
elmot 1:d0dfbce63a89 36 */
elmot 1:d0dfbce63a89 37
elmot 1:d0dfbce63a89 38 /* Define to prevent recursive inclusion -------------------------------------*/
elmot 1:d0dfbce63a89 39 #ifndef __STM32L4xx_LL_SPI_H
elmot 1:d0dfbce63a89 40 #define __STM32L4xx_LL_SPI_H
elmot 1:d0dfbce63a89 41
elmot 1:d0dfbce63a89 42 #ifdef __cplusplus
elmot 1:d0dfbce63a89 43 extern "C" {
elmot 1:d0dfbce63a89 44 #endif
elmot 1:d0dfbce63a89 45
elmot 1:d0dfbce63a89 46 /* Includes ------------------------------------------------------------------*/
elmot 1:d0dfbce63a89 47 #include "stm32l4xx.h"
elmot 1:d0dfbce63a89 48
elmot 1:d0dfbce63a89 49 /** @addtogroup STM32L4xx_LL_Driver
elmot 1:d0dfbce63a89 50 * @{
elmot 1:d0dfbce63a89 51 */
elmot 1:d0dfbce63a89 52
elmot 1:d0dfbce63a89 53 #if defined (SPI1) || defined (SPI2) || defined (SPI3)
elmot 1:d0dfbce63a89 54
elmot 1:d0dfbce63a89 55 /** @defgroup SPI_LL SPI
elmot 1:d0dfbce63a89 56 * @{
elmot 1:d0dfbce63a89 57 */
elmot 1:d0dfbce63a89 58
elmot 1:d0dfbce63a89 59 /* Private types -------------------------------------------------------------*/
elmot 1:d0dfbce63a89 60 /* Private variables ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 61 /* Private macros ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 62
elmot 1:d0dfbce63a89 63 /* Exported types ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 64 #if defined(USE_FULL_LL_DRIVER)
elmot 1:d0dfbce63a89 65 /** @defgroup SPI_LL_ES_INIT SPI Exported Init structure
elmot 1:d0dfbce63a89 66 * @{
elmot 1:d0dfbce63a89 67 */
elmot 1:d0dfbce63a89 68
elmot 1:d0dfbce63a89 69 /**
elmot 1:d0dfbce63a89 70 * @brief SPI Init structures definition
elmot 1:d0dfbce63a89 71 */
elmot 1:d0dfbce63a89 72 typedef struct
elmot 1:d0dfbce63a89 73 {
elmot 1:d0dfbce63a89 74 uint32_t TransferDirection; /*!< Specifies the SPI unidirectional or bidirectional data mode.
elmot 1:d0dfbce63a89 75 This parameter can be a value of @ref SPI_LL_EC_TRANSFER_MODE.
elmot 1:d0dfbce63a89 76
elmot 1:d0dfbce63a89 77 This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferDirection().*/
elmot 1:d0dfbce63a89 78
elmot 1:d0dfbce63a89 79 uint32_t Mode; /*!< Specifies the SPI mode (Master/Slave).
elmot 1:d0dfbce63a89 80 This parameter can be a value of @ref SPI_LL_EC_MODE.
elmot 1:d0dfbce63a89 81
elmot 1:d0dfbce63a89 82 This feature can be modified afterwards using unitary function @ref LL_SPI_SetMode().*/
elmot 1:d0dfbce63a89 83
elmot 1:d0dfbce63a89 84 uint32_t DataWidth; /*!< Specifies the SPI data width.
elmot 1:d0dfbce63a89 85 This parameter can be a value of @ref SPI_LL_EC_DATAWIDTH.
elmot 1:d0dfbce63a89 86
elmot 1:d0dfbce63a89 87 This feature can be modified afterwards using unitary function @ref LL_SPI_SetDataWidth().*/
elmot 1:d0dfbce63a89 88
elmot 1:d0dfbce63a89 89 uint32_t ClockPolarity; /*!< Specifies the serial clock steady state.
elmot 1:d0dfbce63a89 90 This parameter can be a value of @ref SPI_LL_EC_POLARITY.
elmot 1:d0dfbce63a89 91
elmot 1:d0dfbce63a89 92 This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPolarity().*/
elmot 1:d0dfbce63a89 93
elmot 1:d0dfbce63a89 94 uint32_t ClockPhase; /*!< Specifies the clock active edge for the bit capture.
elmot 1:d0dfbce63a89 95 This parameter can be a value of @ref SPI_LL_EC_PHASE.
elmot 1:d0dfbce63a89 96
elmot 1:d0dfbce63a89 97 This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPhase().*/
elmot 1:d0dfbce63a89 98
elmot 1:d0dfbce63a89 99 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (NSS pin) or by software using the SSI bit.
elmot 1:d0dfbce63a89 100 This parameter can be a value of @ref SPI_LL_EC_NSS_MODE.
elmot 1:d0dfbce63a89 101
elmot 1:d0dfbce63a89 102 This feature can be modified afterwards using unitary function @ref LL_SPI_SetNSSMode().*/
elmot 1:d0dfbce63a89 103
elmot 1:d0dfbce63a89 104 uint32_t BaudRate; /*!< Specifies the BaudRate prescaler value which will be used to configure the transmit and receive SCK clock.
elmot 1:d0dfbce63a89 105 This parameter can be a value of @ref SPI_LL_EC_BAUDRATEPRESCALER.
elmot 1:d0dfbce63a89 106 @note The communication clock is derived from the master clock. The slave clock does not need to be set.
elmot 1:d0dfbce63a89 107
elmot 1:d0dfbce63a89 108 This feature can be modified afterwards using unitary function @ref LL_SPI_SetBaudRatePrescaler().*/
elmot 1:d0dfbce63a89 109
elmot 1:d0dfbce63a89 110 uint32_t BitOrder; /*!< Specifies whether data transfers start from MSB or LSB bit.
elmot 1:d0dfbce63a89 111 This parameter can be a value of @ref SPI_LL_EC_BIT_ORDER.
elmot 1:d0dfbce63a89 112
elmot 1:d0dfbce63a89 113 This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferBitOrder().*/
elmot 1:d0dfbce63a89 114
elmot 1:d0dfbce63a89 115 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
elmot 1:d0dfbce63a89 116 This parameter can be a value of @ref SPI_LL_EC_CRC_CALCULATION.
elmot 1:d0dfbce63a89 117
elmot 1:d0dfbce63a89 118 This feature can be modified afterwards using unitary functions @ref LL_SPI_EnableCRC() and @ref LL_SPI_DisableCRC().*/
elmot 1:d0dfbce63a89 119
elmot 1:d0dfbce63a89 120 uint32_t CRCPoly; /*!< Specifies the polynomial used for the CRC calculation.
elmot 1:d0dfbce63a89 121 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF.
elmot 1:d0dfbce63a89 122
elmot 1:d0dfbce63a89 123 This feature can be modified afterwards using unitary function @ref LL_SPI_SetCRCPolynomial().*/
elmot 1:d0dfbce63a89 124
elmot 1:d0dfbce63a89 125 } LL_SPI_InitTypeDef;
elmot 1:d0dfbce63a89 126
elmot 1:d0dfbce63a89 127 /**
elmot 1:d0dfbce63a89 128 * @}
elmot 1:d0dfbce63a89 129 */
elmot 1:d0dfbce63a89 130 #endif /* USE_FULL_LL_DRIVER */
elmot 1:d0dfbce63a89 131
elmot 1:d0dfbce63a89 132 /* Exported constants --------------------------------------------------------*/
elmot 1:d0dfbce63a89 133 /** @defgroup SPI_LL_Exported_Constants SPI Exported Constants
elmot 1:d0dfbce63a89 134 * @{
elmot 1:d0dfbce63a89 135 */
elmot 1:d0dfbce63a89 136
elmot 1:d0dfbce63a89 137 /** @defgroup SPI_LL_EC_GET_FLAG Get Flags Defines
elmot 1:d0dfbce63a89 138 * @brief Flags defines which can be used with LL_SPI_ReadReg function
elmot 1:d0dfbce63a89 139 * @{
elmot 1:d0dfbce63a89 140 */
elmot 1:d0dfbce63a89 141 #define LL_SPI_SR_RXNE SPI_SR_RXNE /*!< Rx buffer not empty flag */
elmot 1:d0dfbce63a89 142 #define LL_SPI_SR_TXE SPI_SR_TXE /*!< Tx buffer empty flag */
elmot 1:d0dfbce63a89 143 #define LL_SPI_SR_BSY SPI_SR_BSY /*!< Busy flag */
elmot 1:d0dfbce63a89 144 #define LL_SPI_SR_UDR SPI_SR_UDR /*!< Underrun flag */
elmot 1:d0dfbce63a89 145 #define LL_SPI_SR_CRCERR SPI_SR_CRCERR /*!< CRC error flag */
elmot 1:d0dfbce63a89 146 #define LL_SPI_SR_MODF SPI_SR_MODF /*!< Mode fault flag */
elmot 1:d0dfbce63a89 147 #define LL_SPI_SR_OVR SPI_SR_OVR /*!< Overrun flag */
elmot 1:d0dfbce63a89 148 #define LL_SPI_SR_FRE SPI_SR_FRE /*!< TI mode frame format error flag */
elmot 1:d0dfbce63a89 149 /**
elmot 1:d0dfbce63a89 150 * @}
elmot 1:d0dfbce63a89 151 */
elmot 1:d0dfbce63a89 152
elmot 1:d0dfbce63a89 153 /** @defgroup SPI_LL_EC_IT IT Defines
elmot 1:d0dfbce63a89 154 * @brief IT defines which can be used with LL_SPI_ReadReg and LL_SPI_WriteReg functions
elmot 1:d0dfbce63a89 155 * @{
elmot 1:d0dfbce63a89 156 */
elmot 1:d0dfbce63a89 157 #define LL_SPI_CR2_RXNEIE SPI_CR2_RXNEIE /*!< Rx buffer not empty interrupt enable */
elmot 1:d0dfbce63a89 158 #define LL_SPI_CR2_TXEIE SPI_CR2_TXEIE /*!< Tx buffer empty interrupt enable */
elmot 1:d0dfbce63a89 159 #define LL_SPI_CR2_ERRIE SPI_CR2_ERRIE /*!< Error interrupt enable */
elmot 1:d0dfbce63a89 160 /**
elmot 1:d0dfbce63a89 161 * @}
elmot 1:d0dfbce63a89 162 */
elmot 1:d0dfbce63a89 163
elmot 1:d0dfbce63a89 164 /** @defgroup SPI_LL_EC_MODE Operation Mode
elmot 1:d0dfbce63a89 165 * @{
elmot 1:d0dfbce63a89 166 */
elmot 1:d0dfbce63a89 167 #define LL_SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) /*!< Master configuration */
elmot 1:d0dfbce63a89 168 #define LL_SPI_MODE_SLAVE ((uint32_t)0x00000000U) /*!< Slave configuration */
elmot 1:d0dfbce63a89 169 /**
elmot 1:d0dfbce63a89 170 * @}
elmot 1:d0dfbce63a89 171 */
elmot 1:d0dfbce63a89 172
elmot 1:d0dfbce63a89 173 /** @defgroup SPI_LL_EC_PROTOCOL Serial Protocol
elmot 1:d0dfbce63a89 174 * @{
elmot 1:d0dfbce63a89 175 */
elmot 1:d0dfbce63a89 176 #define LL_SPI_PROTOCOL_MOTOROLA ((uint32_t)0x00000000U) /*!< Motorola mode. Used as default value */
elmot 1:d0dfbce63a89 177 #define LL_SPI_PROTOCOL_TI (SPI_CR2_FRF) /*!< TI mode */
elmot 1:d0dfbce63a89 178 /**
elmot 1:d0dfbce63a89 179 * @}
elmot 1:d0dfbce63a89 180 */
elmot 1:d0dfbce63a89 181
elmot 1:d0dfbce63a89 182 /** @defgroup SPI_LL_EC_PHASE Clock Phase
elmot 1:d0dfbce63a89 183 * @{
elmot 1:d0dfbce63a89 184 */
elmot 1:d0dfbce63a89 185 #define LL_SPI_PHASE_1EDGE ((uint32_t)0x00000000U) /*!< First clock transition is the first data capture edge */
elmot 1:d0dfbce63a89 186 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition is the first data capture edge */
elmot 1:d0dfbce63a89 187 /**
elmot 1:d0dfbce63a89 188 * @}
elmot 1:d0dfbce63a89 189 */
elmot 1:d0dfbce63a89 190
elmot 1:d0dfbce63a89 191 /** @defgroup SPI_LL_EC_POLARITY Clock Polarity
elmot 1:d0dfbce63a89 192 * @{
elmot 1:d0dfbce63a89 193 */
elmot 1:d0dfbce63a89 194 #define LL_SPI_POLARITY_LOW ((uint32_t)0x00000000U) /*!< Clock to 0 when idle */
elmot 1:d0dfbce63a89 195 #define LL_SPI_POLARITY_HIGH (SPI_CR1_CPOL) /*!< Clock to 1 when idle */
elmot 1:d0dfbce63a89 196 /**
elmot 1:d0dfbce63a89 197 * @}
elmot 1:d0dfbce63a89 198 */
elmot 1:d0dfbce63a89 199
elmot 1:d0dfbce63a89 200 /** @defgroup SPI_LL_EC_BAUDRATEPRESCALER Baud Rate Prescaler
elmot 1:d0dfbce63a89 201 * @{
elmot 1:d0dfbce63a89 202 */
elmot 1:d0dfbce63a89 203 #define LL_SPI_BAUDRATEPRESCALER_DIV2 ((uint32_t)0x00000000U) /*!< BaudRate control equal to fPCLK/2 */
elmot 1:d0dfbce63a89 204 #define LL_SPI_BAUDRATEPRESCALER_DIV4 (SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/4 */
elmot 1:d0dfbce63a89 205 #define LL_SPI_BAUDRATEPRESCALER_DIV8 (SPI_CR1_BR_1) /*!< BaudRate control equal to fPCLK/8 */
elmot 1:d0dfbce63a89 206 #define LL_SPI_BAUDRATEPRESCALER_DIV16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/16 */
elmot 1:d0dfbce63a89 207 #define LL_SPI_BAUDRATEPRESCALER_DIV32 (SPI_CR1_BR_2) /*!< BaudRate control equal to fPCLK/32 */
elmot 1:d0dfbce63a89 208 #define LL_SPI_BAUDRATEPRESCALER_DIV64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/64 */
elmot 1:d0dfbce63a89 209 #define LL_SPI_BAUDRATEPRESCALER_DIV128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) /*!< BaudRate control equal to fPCLK/128 */
elmot 1:d0dfbce63a89 210 #define LL_SPI_BAUDRATEPRESCALER_DIV256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/256 */
elmot 1:d0dfbce63a89 211 /**
elmot 1:d0dfbce63a89 212 * @}
elmot 1:d0dfbce63a89 213 */
elmot 1:d0dfbce63a89 214
elmot 1:d0dfbce63a89 215 /** @defgroup SPI_LL_EC_BIT_ORDER Transmission Bit Order
elmot 1:d0dfbce63a89 216 * @{
elmot 1:d0dfbce63a89 217 */
elmot 1:d0dfbce63a89 218 #define LL_SPI_LSB_FIRST (SPI_CR1_LSBFIRST) /*!< Data is transmitted/received with the LSB first */
elmot 1:d0dfbce63a89 219 #define LL_SPI_MSB_FIRST ((uint32_t)0x00000000U) /*!< Data is transmitted/received with the MSB first */
elmot 1:d0dfbce63a89 220 /**
elmot 1:d0dfbce63a89 221 * @}
elmot 1:d0dfbce63a89 222 */
elmot 1:d0dfbce63a89 223
elmot 1:d0dfbce63a89 224 /** @defgroup SPI_LL_EC_TRANSFER_MODE Transfer Mode
elmot 1:d0dfbce63a89 225 * @{
elmot 1:d0dfbce63a89 226 */
elmot 1:d0dfbce63a89 227 #define LL_SPI_FULL_DUPLEX ((uint32_t)0x00000000U) /*!< Full-Duplex mode. Rx and Tx transfer on 2 lines */
elmot 1:d0dfbce63a89 228 #define LL_SPI_SIMPLEX_RX (SPI_CR1_RXONLY) /*!< Simplex Rx mode. Rx transfer only on 1 line */
elmot 1:d0dfbce63a89 229 #define LL_SPI_HALF_DUPLEX_RX (SPI_CR1_BIDIMODE) /*!< Half-Duplex Rx mode. Rx transfer on 1 line */
elmot 1:d0dfbce63a89 230 #define LL_SPI_HALF_DUPLEX_TX (SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE) /*!< Half-Duplex Tx mode. Tx transfer on 1 line */
elmot 1:d0dfbce63a89 231 /**
elmot 1:d0dfbce63a89 232 * @}
elmot 1:d0dfbce63a89 233 */
elmot 1:d0dfbce63a89 234
elmot 1:d0dfbce63a89 235 /** @defgroup SPI_LL_EC_NSS_MODE Slave Select Pin Mode
elmot 1:d0dfbce63a89 236 * @{
elmot 1:d0dfbce63a89 237 */
elmot 1:d0dfbce63a89 238 #define LL_SPI_NSS_SOFT (SPI_CR1_SSM) /*!< NSS managed internally. NSS pin not used and free */
elmot 1:d0dfbce63a89 239 #define LL_SPI_NSS_HARD_INPUT ((uint32_t)0x00000000U) /*!< NSS pin used in Input. Only used in Master mode */
elmot 1:d0dfbce63a89 240 #define LL_SPI_NSS_HARD_OUTPUT (((uint32_t)SPI_CR2_SSOE << 16U)) /*!< NSS pin used in Output. Only used in Slave mode as chip select */
elmot 1:d0dfbce63a89 241 /**
elmot 1:d0dfbce63a89 242 * @}
elmot 1:d0dfbce63a89 243 */
elmot 1:d0dfbce63a89 244
elmot 1:d0dfbce63a89 245 /** @defgroup SPI_LL_EC_DATAWIDTH Datawidth
elmot 1:d0dfbce63a89 246 * @{
elmot 1:d0dfbce63a89 247 */
elmot 1:d0dfbce63a89 248 #define LL_SPI_DATAWIDTH_4BIT (SPI_CR2_DS_0 | SPI_CR2_DS_1) /*!< Data length for SPI transfer: 4 bits */
elmot 1:d0dfbce63a89 249 #define LL_SPI_DATAWIDTH_5BIT (SPI_CR2_DS_2) /*!< Data length for SPI transfer: 5 bits */
elmot 1:d0dfbce63a89 250 #define LL_SPI_DATAWIDTH_6BIT (SPI_CR2_DS_2 | SPI_CR2_DS_0) /*!< Data length for SPI transfer: 6 bits */
elmot 1:d0dfbce63a89 251 #define LL_SPI_DATAWIDTH_7BIT (SPI_CR2_DS_2 | SPI_CR2_DS_1) /*!< Data length for SPI transfer: 7 bits */
elmot 1:d0dfbce63a89 252 #define LL_SPI_DATAWIDTH_8BIT (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0) /*!< Data length for SPI transfer: 8 bits */
elmot 1:d0dfbce63a89 253 #define LL_SPI_DATAWIDTH_9BIT (SPI_CR2_DS_3) /*!< Data length for SPI transfer: 9 bits */
elmot 1:d0dfbce63a89 254 #define LL_SPI_DATAWIDTH_10BIT (SPI_CR2_DS_3 | SPI_CR2_DS_0) /*!< Data length for SPI transfer: 10 bits */
elmot 1:d0dfbce63a89 255 #define LL_SPI_DATAWIDTH_11BIT (SPI_CR2_DS_3 | SPI_CR2_DS_1) /*!< Data length for SPI transfer: 11 bits */
elmot 1:d0dfbce63a89 256 #define LL_SPI_DATAWIDTH_12BIT (SPI_CR2_DS_3 | SPI_CR2_DS_1 | SPI_CR2_DS_0) /*!< Data length for SPI transfer: 12 bits */
elmot 1:d0dfbce63a89 257 #define LL_SPI_DATAWIDTH_13BIT (SPI_CR2_DS_3 | SPI_CR2_DS_2) /*!< Data length for SPI transfer: 13 bits */
elmot 1:d0dfbce63a89 258 #define LL_SPI_DATAWIDTH_14BIT (SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_0) /*!< Data length for SPI transfer: 14 bits */
elmot 1:d0dfbce63a89 259 #define LL_SPI_DATAWIDTH_15BIT (SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1) /*!< Data length for SPI transfer: 15 bits */
elmot 1:d0dfbce63a89 260 #define LL_SPI_DATAWIDTH_16BIT (SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0) /*!< Data length for SPI transfer: 16 bits */
elmot 1:d0dfbce63a89 261 /**
elmot 1:d0dfbce63a89 262 * @}
elmot 1:d0dfbce63a89 263 */
elmot 1:d0dfbce63a89 264 #if defined(USE_FULL_LL_DRIVER)
elmot 1:d0dfbce63a89 265
elmot 1:d0dfbce63a89 266 /** @defgroup SPI_LL_EC_CRC_CALCULATION CRC Calculation
elmot 1:d0dfbce63a89 267 * @{
elmot 1:d0dfbce63a89 268 */
elmot 1:d0dfbce63a89 269 #define LL_SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000U) /*!< CRC calculation disabled */
elmot 1:d0dfbce63a89 270 #define LL_SPI_CRCCALCULATION_ENABLE (SPI_CR1_CRCEN) /*!< CRC calculation enabled */
elmot 1:d0dfbce63a89 271 /**
elmot 1:d0dfbce63a89 272 * @}
elmot 1:d0dfbce63a89 273 */
elmot 1:d0dfbce63a89 274 #endif /* USE_FULL_LL_DRIVER */
elmot 1:d0dfbce63a89 275
elmot 1:d0dfbce63a89 276 /** @defgroup SPI_LL_EC_CRC_LENGTH CRC Length
elmot 1:d0dfbce63a89 277 * @{
elmot 1:d0dfbce63a89 278 */
elmot 1:d0dfbce63a89 279 #define LL_SPI_CRC_8BIT ((uint32_t)0x00000000U) /*!< 8-bit CRC length */
elmot 1:d0dfbce63a89 280 #define LL_SPI_CRC_16BIT (SPI_CR1_CRCL) /*!< 16-bit CRC length */
elmot 1:d0dfbce63a89 281 /**
elmot 1:d0dfbce63a89 282 * @}
elmot 1:d0dfbce63a89 283 */
elmot 1:d0dfbce63a89 284
elmot 1:d0dfbce63a89 285 /** @defgroup SPI_LL_EC_RX_FIFO_TH RX FIFO Threshold
elmot 1:d0dfbce63a89 286 * @{
elmot 1:d0dfbce63a89 287 */
elmot 1:d0dfbce63a89 288 #define LL_SPI_RX_FIFO_TH_HALF ((uint32_t)0x00000000U) /*!< RXNE event is generated if FIFO level is greater than or equel to 1/2 (16-bit) */
elmot 1:d0dfbce63a89 289 #define LL_SPI_RX_FIFO_TH_QUARTER (SPI_CR2_FRXTH) /*!< RXNE event is generated if FIFO level is greater than or equel to 1/4 (8-bit) */
elmot 1:d0dfbce63a89 290 /**
elmot 1:d0dfbce63a89 291 * @}
elmot 1:d0dfbce63a89 292 */
elmot 1:d0dfbce63a89 293
elmot 1:d0dfbce63a89 294 /** @defgroup SPI_LL_EC_RX_FIFO RX FIFO Level
elmot 1:d0dfbce63a89 295 * @{
elmot 1:d0dfbce63a89 296 */
elmot 1:d0dfbce63a89 297 #define LL_SPI_RX_FIFO_EMPTY ((uint32_t)0x00000000U) /*!< FIFO reception empty */
elmot 1:d0dfbce63a89 298 #define LL_SPI_RX_FIFO_QUARTER_FULL (SPI_SR_FRLVL_0) /*!< FIFO reception 1/4 */
elmot 1:d0dfbce63a89 299 #define LL_SPI_RX_FIFO_HALF_FULL (SPI_SR_FRLVL_1) /*!< FIFO reception 1/2 */
elmot 1:d0dfbce63a89 300 #define LL_SPI_RX_FIFO_FULL (SPI_SR_FRLVL_1 | SPI_SR_FRLVL_0) /*!< FIFO reception full */
elmot 1:d0dfbce63a89 301 /**
elmot 1:d0dfbce63a89 302 * @}
elmot 1:d0dfbce63a89 303 */
elmot 1:d0dfbce63a89 304
elmot 1:d0dfbce63a89 305 /** @defgroup SPI_LL_EC_TX_FIFO TX FIFO Level
elmot 1:d0dfbce63a89 306 * @{
elmot 1:d0dfbce63a89 307 */
elmot 1:d0dfbce63a89 308 #define LL_SPI_TX_FIFO_EMPTY ((uint32_t)0x00000000U) /*!< FIFO transmission empty */
elmot 1:d0dfbce63a89 309 #define LL_SPI_TX_FIFO_QUARTER_FULL (SPI_SR_FTLVL_0) /*!< FIFO transmission 1/4 */
elmot 1:d0dfbce63a89 310 #define LL_SPI_TX_FIFO_HALF_FULL (SPI_SR_FTLVL_1) /*!< FIFO transmission 1/2 */
elmot 1:d0dfbce63a89 311 #define LL_SPI_TX_FIFO_FULL (SPI_SR_FTLVL_1 | SPI_SR_FTLVL_0) /*!< FIFO transmission full */
elmot 1:d0dfbce63a89 312 /**
elmot 1:d0dfbce63a89 313 * @}
elmot 1:d0dfbce63a89 314 */
elmot 1:d0dfbce63a89 315
elmot 1:d0dfbce63a89 316 /** @defgroup SPI_LL_EC_DMA_PARITY DMA Parity
elmot 1:d0dfbce63a89 317 * @{
elmot 1:d0dfbce63a89 318 */
elmot 1:d0dfbce63a89 319 #define LL_SPI_DMA_PARITY_EVEN ((uint32_t)0x00000000U) /*!< Select DMA parity Even */
elmot 1:d0dfbce63a89 320 #define LL_SPI_DMA_PARITY_ODD ((uint32_t)0x00000001U) /*!< Select DMA parity Odd */
elmot 1:d0dfbce63a89 321
elmot 1:d0dfbce63a89 322 /**
elmot 1:d0dfbce63a89 323 * @}
elmot 1:d0dfbce63a89 324 */
elmot 1:d0dfbce63a89 325
elmot 1:d0dfbce63a89 326 /**
elmot 1:d0dfbce63a89 327 * @}
elmot 1:d0dfbce63a89 328 */
elmot 1:d0dfbce63a89 329
elmot 1:d0dfbce63a89 330 /* Exported macro ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 331 /** @defgroup SPI_LL_Exported_Macros SPI Exported Macros
elmot 1:d0dfbce63a89 332 * @{
elmot 1:d0dfbce63a89 333 */
elmot 1:d0dfbce63a89 334
elmot 1:d0dfbce63a89 335 /** @defgroup SPI_LL_EM_WRITE_READ Common Write and read registers Macros
elmot 1:d0dfbce63a89 336 * @{
elmot 1:d0dfbce63a89 337 */
elmot 1:d0dfbce63a89 338
elmot 1:d0dfbce63a89 339 /**
elmot 1:d0dfbce63a89 340 * @brief Write a value in SPI register
elmot 1:d0dfbce63a89 341 * @param __INSTANCE__ SPI Instance
elmot 1:d0dfbce63a89 342 * @param __REG__ Register to be written
elmot 1:d0dfbce63a89 343 * @param __VALUE__ Value to be written in the register
elmot 1:d0dfbce63a89 344 * @retval None
elmot 1:d0dfbce63a89 345 */
elmot 1:d0dfbce63a89 346 #define LL_SPI_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
elmot 1:d0dfbce63a89 347
elmot 1:d0dfbce63a89 348 /**
elmot 1:d0dfbce63a89 349 * @brief Read a value in SPI register
elmot 1:d0dfbce63a89 350 * @param __INSTANCE__ SPI Instance
elmot 1:d0dfbce63a89 351 * @param __REG__ Register to be read
elmot 1:d0dfbce63a89 352 * @retval Register value
elmot 1:d0dfbce63a89 353 */
elmot 1:d0dfbce63a89 354 #define LL_SPI_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
elmot 1:d0dfbce63a89 355 /**
elmot 1:d0dfbce63a89 356 * @}
elmot 1:d0dfbce63a89 357 */
elmot 1:d0dfbce63a89 358
elmot 1:d0dfbce63a89 359 /**
elmot 1:d0dfbce63a89 360 * @}
elmot 1:d0dfbce63a89 361 */
elmot 1:d0dfbce63a89 362
elmot 1:d0dfbce63a89 363 /* Exported functions --------------------------------------------------------*/
elmot 1:d0dfbce63a89 364 /** @defgroup SPI_LL_Exported_Functions SPI Exported Functions
elmot 1:d0dfbce63a89 365 * @{
elmot 1:d0dfbce63a89 366 */
elmot 1:d0dfbce63a89 367
elmot 1:d0dfbce63a89 368 /** @defgroup SPI_LL_EF_Configuration Configuration
elmot 1:d0dfbce63a89 369 * @{
elmot 1:d0dfbce63a89 370 */
elmot 1:d0dfbce63a89 371
elmot 1:d0dfbce63a89 372 /**
elmot 1:d0dfbce63a89 373 * @brief Enable SPI peripheral
elmot 1:d0dfbce63a89 374 * @rmtoll CR1 SPE LL_SPI_Enable
elmot 1:d0dfbce63a89 375 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 376 * @retval None
elmot 1:d0dfbce63a89 377 */
elmot 1:d0dfbce63a89 378 __STATIC_INLINE void LL_SPI_Enable(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 379 {
elmot 1:d0dfbce63a89 380 SET_BIT(SPIx->CR1, SPI_CR1_SPE);
elmot 1:d0dfbce63a89 381 }
elmot 1:d0dfbce63a89 382
elmot 1:d0dfbce63a89 383 /**
elmot 1:d0dfbce63a89 384 * @brief Disable SPI peripheral
elmot 1:d0dfbce63a89 385 * @note When disabling the SPI, follow the procedure described in the Reference Manual.
elmot 1:d0dfbce63a89 386 * @rmtoll CR1 SPE LL_SPI_Disable
elmot 1:d0dfbce63a89 387 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 388 * @retval None
elmot 1:d0dfbce63a89 389 */
elmot 1:d0dfbce63a89 390 __STATIC_INLINE void LL_SPI_Disable(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 391 {
elmot 1:d0dfbce63a89 392 CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE);
elmot 1:d0dfbce63a89 393 }
elmot 1:d0dfbce63a89 394
elmot 1:d0dfbce63a89 395 /**
elmot 1:d0dfbce63a89 396 * @brief Check if SPI peripheral is enabled
elmot 1:d0dfbce63a89 397 * @rmtoll CR1 SPE LL_SPI_IsEnabled
elmot 1:d0dfbce63a89 398 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 399 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 400 */
elmot 1:d0dfbce63a89 401 __STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 402 {
elmot 1:d0dfbce63a89 403 return (READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE));
elmot 1:d0dfbce63a89 404 }
elmot 1:d0dfbce63a89 405
elmot 1:d0dfbce63a89 406 /**
elmot 1:d0dfbce63a89 407 * @brief Set SPI operation mode to Master or Slave
elmot 1:d0dfbce63a89 408 * @note This bit should not be changed when communication is ongoing.
elmot 1:d0dfbce63a89 409 * @rmtoll CR1 MSTR LL_SPI_SetMode\n
elmot 1:d0dfbce63a89 410 * CR1 SSI LL_SPI_SetMode
elmot 1:d0dfbce63a89 411 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 412 * @param Mode This parameter can be one of the following values:
elmot 1:d0dfbce63a89 413 * @arg @ref LL_SPI_MODE_MASTER
elmot 1:d0dfbce63a89 414 * @arg @ref LL_SPI_MODE_SLAVE
elmot 1:d0dfbce63a89 415 * @retval None
elmot 1:d0dfbce63a89 416 */
elmot 1:d0dfbce63a89 417 __STATIC_INLINE void LL_SPI_SetMode(SPI_TypeDef *SPIx, uint32_t Mode)
elmot 1:d0dfbce63a89 418 {
elmot 1:d0dfbce63a89 419 MODIFY_REG(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI, Mode);
elmot 1:d0dfbce63a89 420 }
elmot 1:d0dfbce63a89 421
elmot 1:d0dfbce63a89 422 /**
elmot 1:d0dfbce63a89 423 * @brief Get SPI operation mode (Master or Slave)
elmot 1:d0dfbce63a89 424 * @rmtoll CR1 MSTR LL_SPI_GetMode\n
elmot 1:d0dfbce63a89 425 * CR1 SSI LL_SPI_GetMode
elmot 1:d0dfbce63a89 426 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 427 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 428 * @arg @ref LL_SPI_MODE_MASTER
elmot 1:d0dfbce63a89 429 * @arg @ref LL_SPI_MODE_SLAVE
elmot 1:d0dfbce63a89 430 */
elmot 1:d0dfbce63a89 431 __STATIC_INLINE uint32_t LL_SPI_GetMode(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 432 {
elmot 1:d0dfbce63a89 433 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI));
elmot 1:d0dfbce63a89 434 }
elmot 1:d0dfbce63a89 435
elmot 1:d0dfbce63a89 436 /**
elmot 1:d0dfbce63a89 437 * @brief Set serial protocol used
elmot 1:d0dfbce63a89 438 * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
elmot 1:d0dfbce63a89 439 * @rmtoll CR2 FRF LL_SPI_SetStandard
elmot 1:d0dfbce63a89 440 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 441 * @param Standard This parameter can be one of the following values:
elmot 1:d0dfbce63a89 442 * @arg @ref LL_SPI_PROTOCOL_MOTOROLA
elmot 1:d0dfbce63a89 443 * @arg @ref LL_SPI_PROTOCOL_TI
elmot 1:d0dfbce63a89 444 * @retval None
elmot 1:d0dfbce63a89 445 */
elmot 1:d0dfbce63a89 446 __STATIC_INLINE void LL_SPI_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard)
elmot 1:d0dfbce63a89 447 {
elmot 1:d0dfbce63a89 448 MODIFY_REG(SPIx->CR2, SPI_CR2_FRF, Standard);
elmot 1:d0dfbce63a89 449 }
elmot 1:d0dfbce63a89 450
elmot 1:d0dfbce63a89 451 /**
elmot 1:d0dfbce63a89 452 * @brief Get serial protocol used
elmot 1:d0dfbce63a89 453 * @rmtoll CR2 FRF LL_SPI_GetStandard
elmot 1:d0dfbce63a89 454 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 455 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 456 * @arg @ref LL_SPI_PROTOCOL_MOTOROLA
elmot 1:d0dfbce63a89 457 * @arg @ref LL_SPI_PROTOCOL_TI
elmot 1:d0dfbce63a89 458 */
elmot 1:d0dfbce63a89 459 __STATIC_INLINE uint32_t LL_SPI_GetStandard(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 460 {
elmot 1:d0dfbce63a89 461 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF));
elmot 1:d0dfbce63a89 462 }
elmot 1:d0dfbce63a89 463
elmot 1:d0dfbce63a89 464 /**
elmot 1:d0dfbce63a89 465 * @brief Set clock phase
elmot 1:d0dfbce63a89 466 * @note This bit should not be changed when communication is ongoing.
elmot 1:d0dfbce63a89 467 * This bit is not used in SPI TI mode.
elmot 1:d0dfbce63a89 468 * @rmtoll CR1 CPHA LL_SPI_SetClockPhase
elmot 1:d0dfbce63a89 469 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 470 * @param ClockPhase This parameter can be one of the following values:
elmot 1:d0dfbce63a89 471 * @arg @ref LL_SPI_PHASE_1EDGE
elmot 1:d0dfbce63a89 472 * @arg @ref LL_SPI_PHASE_2EDGE
elmot 1:d0dfbce63a89 473 * @retval None
elmot 1:d0dfbce63a89 474 */
elmot 1:d0dfbce63a89 475 __STATIC_INLINE void LL_SPI_SetClockPhase(SPI_TypeDef *SPIx, uint32_t ClockPhase)
elmot 1:d0dfbce63a89 476 {
elmot 1:d0dfbce63a89 477 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase);
elmot 1:d0dfbce63a89 478 }
elmot 1:d0dfbce63a89 479
elmot 1:d0dfbce63a89 480 /**
elmot 1:d0dfbce63a89 481 * @brief Get clock phase
elmot 1:d0dfbce63a89 482 * @rmtoll CR1 CPHA LL_SPI_GetClockPhase
elmot 1:d0dfbce63a89 483 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 484 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 485 * @arg @ref LL_SPI_PHASE_1EDGE
elmot 1:d0dfbce63a89 486 * @arg @ref LL_SPI_PHASE_2EDGE
elmot 1:d0dfbce63a89 487 */
elmot 1:d0dfbce63a89 488 __STATIC_INLINE uint32_t LL_SPI_GetClockPhase(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 489 {
elmot 1:d0dfbce63a89 490 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA));
elmot 1:d0dfbce63a89 491 }
elmot 1:d0dfbce63a89 492
elmot 1:d0dfbce63a89 493 /**
elmot 1:d0dfbce63a89 494 * @brief Set clock polarity
elmot 1:d0dfbce63a89 495 * @note This bit should not be changed when communication is ongoing.
elmot 1:d0dfbce63a89 496 * This bit is not used in SPI TI mode.
elmot 1:d0dfbce63a89 497 * @rmtoll CR1 CPOL LL_SPI_SetClockPolarity
elmot 1:d0dfbce63a89 498 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 499 * @param ClockPolarity This parameter can be one of the following values:
elmot 1:d0dfbce63a89 500 * @arg @ref LL_SPI_POLARITY_LOW
elmot 1:d0dfbce63a89 501 * @arg @ref LL_SPI_POLARITY_HIGH
elmot 1:d0dfbce63a89 502 * @retval None
elmot 1:d0dfbce63a89 503 */
elmot 1:d0dfbce63a89 504 __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity)
elmot 1:d0dfbce63a89 505 {
elmot 1:d0dfbce63a89 506 MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity);
elmot 1:d0dfbce63a89 507 }
elmot 1:d0dfbce63a89 508
elmot 1:d0dfbce63a89 509 /**
elmot 1:d0dfbce63a89 510 * @brief Get clock polarity
elmot 1:d0dfbce63a89 511 * @rmtoll CR1 CPOL LL_SPI_GetClockPolarity
elmot 1:d0dfbce63a89 512 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 513 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 514 * @arg @ref LL_SPI_POLARITY_LOW
elmot 1:d0dfbce63a89 515 * @arg @ref LL_SPI_POLARITY_HIGH
elmot 1:d0dfbce63a89 516 */
elmot 1:d0dfbce63a89 517 __STATIC_INLINE uint32_t LL_SPI_GetClockPolarity(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 518 {
elmot 1:d0dfbce63a89 519 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPOL));
elmot 1:d0dfbce63a89 520 }
elmot 1:d0dfbce63a89 521
elmot 1:d0dfbce63a89 522 /**
elmot 1:d0dfbce63a89 523 * @brief Set baud rate prescaler
elmot 1:d0dfbce63a89 524 * @note These bits should not be changed when communication is ongoing. SPI BaudRate = fPCLK/Prescaler.
elmot 1:d0dfbce63a89 525 * @rmtoll CR1 BR LL_SPI_SetBaudRatePrescaler
elmot 1:d0dfbce63a89 526 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 527 * @param BaudRate This parameter can be one of the following values:
elmot 1:d0dfbce63a89 528 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV2
elmot 1:d0dfbce63a89 529 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV4
elmot 1:d0dfbce63a89 530 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV8
elmot 1:d0dfbce63a89 531 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV16
elmot 1:d0dfbce63a89 532 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV32
elmot 1:d0dfbce63a89 533 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV64
elmot 1:d0dfbce63a89 534 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128
elmot 1:d0dfbce63a89 535 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256
elmot 1:d0dfbce63a89 536 * @retval None
elmot 1:d0dfbce63a89 537 */
elmot 1:d0dfbce63a89 538 __STATIC_INLINE void LL_SPI_SetBaudRatePrescaler(SPI_TypeDef *SPIx, uint32_t BaudRate)
elmot 1:d0dfbce63a89 539 {
elmot 1:d0dfbce63a89 540 MODIFY_REG(SPIx->CR1, SPI_CR1_BR, BaudRate);
elmot 1:d0dfbce63a89 541 }
elmot 1:d0dfbce63a89 542
elmot 1:d0dfbce63a89 543 /**
elmot 1:d0dfbce63a89 544 * @brief Get baud rate prescaler
elmot 1:d0dfbce63a89 545 * @rmtoll CR1 BR LL_SPI_GetBaudRatePrescaler
elmot 1:d0dfbce63a89 546 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 547 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 548 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV2
elmot 1:d0dfbce63a89 549 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV4
elmot 1:d0dfbce63a89 550 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV8
elmot 1:d0dfbce63a89 551 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV16
elmot 1:d0dfbce63a89 552 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV32
elmot 1:d0dfbce63a89 553 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV64
elmot 1:d0dfbce63a89 554 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128
elmot 1:d0dfbce63a89 555 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256
elmot 1:d0dfbce63a89 556 */
elmot 1:d0dfbce63a89 557 __STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 558 {
elmot 1:d0dfbce63a89 559 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_BR));
elmot 1:d0dfbce63a89 560 }
elmot 1:d0dfbce63a89 561
elmot 1:d0dfbce63a89 562 /**
elmot 1:d0dfbce63a89 563 * @brief Set transfer bit order
elmot 1:d0dfbce63a89 564 * @note This bit should not be changed when communication is ongoing. This bit is not used in SPI TI mode.
elmot 1:d0dfbce63a89 565 * @rmtoll CR1 LSBFIRST LL_SPI_SetTransferBitOrder
elmot 1:d0dfbce63a89 566 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 567 * @param BitOrder This parameter can be one of the following values:
elmot 1:d0dfbce63a89 568 * @arg @ref LL_SPI_LSB_FIRST
elmot 1:d0dfbce63a89 569 * @arg @ref LL_SPI_MSB_FIRST
elmot 1:d0dfbce63a89 570 * @retval None
elmot 1:d0dfbce63a89 571 */
elmot 1:d0dfbce63a89 572 __STATIC_INLINE void LL_SPI_SetTransferBitOrder(SPI_TypeDef *SPIx, uint32_t BitOrder)
elmot 1:d0dfbce63a89 573 {
elmot 1:d0dfbce63a89 574 MODIFY_REG(SPIx->CR1, SPI_CR1_LSBFIRST, BitOrder);
elmot 1:d0dfbce63a89 575 }
elmot 1:d0dfbce63a89 576
elmot 1:d0dfbce63a89 577 /**
elmot 1:d0dfbce63a89 578 * @brief Get transfer bit order
elmot 1:d0dfbce63a89 579 * @rmtoll CR1 LSBFIRST LL_SPI_GetTransferBitOrder
elmot 1:d0dfbce63a89 580 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 581 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 582 * @arg @ref LL_SPI_LSB_FIRST
elmot 1:d0dfbce63a89 583 * @arg @ref LL_SPI_MSB_FIRST
elmot 1:d0dfbce63a89 584 */
elmot 1:d0dfbce63a89 585 __STATIC_INLINE uint32_t LL_SPI_GetTransferBitOrder(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 586 {
elmot 1:d0dfbce63a89 587 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_LSBFIRST));
elmot 1:d0dfbce63a89 588 }
elmot 1:d0dfbce63a89 589
elmot 1:d0dfbce63a89 590 /**
elmot 1:d0dfbce63a89 591 * @brief Set transfer direction mode
elmot 1:d0dfbce63a89 592 * @note For Half-Duplex mode, Rx Direction is set by default.
elmot 1:d0dfbce63a89 593 * In master mode, the MOSI pin is used and in slave mode, the MISO pin is used for Half-Duplex.
elmot 1:d0dfbce63a89 594 * @rmtoll CR1 RXONLY LL_SPI_SetTransferDirection\n
elmot 1:d0dfbce63a89 595 * CR1 BIDIMODE LL_SPI_SetTransferDirection\n
elmot 1:d0dfbce63a89 596 * CR1 BIDIOE LL_SPI_SetTransferDirection
elmot 1:d0dfbce63a89 597 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 598 * @param TransferDirection This parameter can be one of the following values:
elmot 1:d0dfbce63a89 599 * @arg @ref LL_SPI_FULL_DUPLEX
elmot 1:d0dfbce63a89 600 * @arg @ref LL_SPI_SIMPLEX_RX
elmot 1:d0dfbce63a89 601 * @arg @ref LL_SPI_HALF_DUPLEX_RX
elmot 1:d0dfbce63a89 602 * @arg @ref LL_SPI_HALF_DUPLEX_TX
elmot 1:d0dfbce63a89 603 * @retval None
elmot 1:d0dfbce63a89 604 */
elmot 1:d0dfbce63a89 605 __STATIC_INLINE void LL_SPI_SetTransferDirection(SPI_TypeDef *SPIx, uint32_t TransferDirection)
elmot 1:d0dfbce63a89 606 {
elmot 1:d0dfbce63a89 607 MODIFY_REG(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE, TransferDirection);
elmot 1:d0dfbce63a89 608 }
elmot 1:d0dfbce63a89 609
elmot 1:d0dfbce63a89 610 /**
elmot 1:d0dfbce63a89 611 * @brief Get transfer direction mode
elmot 1:d0dfbce63a89 612 * @rmtoll CR1 RXONLY LL_SPI_GetTransferDirection\n
elmot 1:d0dfbce63a89 613 * CR1 BIDIMODE LL_SPI_GetTransferDirection\n
elmot 1:d0dfbce63a89 614 * CR1 BIDIOE LL_SPI_GetTransferDirection
elmot 1:d0dfbce63a89 615 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 616 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 617 * @arg @ref LL_SPI_FULL_DUPLEX
elmot 1:d0dfbce63a89 618 * @arg @ref LL_SPI_SIMPLEX_RX
elmot 1:d0dfbce63a89 619 * @arg @ref LL_SPI_HALF_DUPLEX_RX
elmot 1:d0dfbce63a89 620 * @arg @ref LL_SPI_HALF_DUPLEX_TX
elmot 1:d0dfbce63a89 621 */
elmot 1:d0dfbce63a89 622 __STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 623 {
elmot 1:d0dfbce63a89 624 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE));
elmot 1:d0dfbce63a89 625 }
elmot 1:d0dfbce63a89 626
elmot 1:d0dfbce63a89 627 /**
elmot 1:d0dfbce63a89 628 * @brief Set frame data width
elmot 1:d0dfbce63a89 629 * @rmtoll CR2 DS LL_SPI_SetDataWidth
elmot 1:d0dfbce63a89 630 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 631 * @param DataWidth This parameter can be one of the following values:
elmot 1:d0dfbce63a89 632 * @arg @ref LL_SPI_DATAWIDTH_4BIT
elmot 1:d0dfbce63a89 633 * @arg @ref LL_SPI_DATAWIDTH_5BIT
elmot 1:d0dfbce63a89 634 * @arg @ref LL_SPI_DATAWIDTH_6BIT
elmot 1:d0dfbce63a89 635 * @arg @ref LL_SPI_DATAWIDTH_7BIT
elmot 1:d0dfbce63a89 636 * @arg @ref LL_SPI_DATAWIDTH_8BIT
elmot 1:d0dfbce63a89 637 * @arg @ref LL_SPI_DATAWIDTH_9BIT
elmot 1:d0dfbce63a89 638 * @arg @ref LL_SPI_DATAWIDTH_10BIT
elmot 1:d0dfbce63a89 639 * @arg @ref LL_SPI_DATAWIDTH_11BIT
elmot 1:d0dfbce63a89 640 * @arg @ref LL_SPI_DATAWIDTH_12BIT
elmot 1:d0dfbce63a89 641 * @arg @ref LL_SPI_DATAWIDTH_13BIT
elmot 1:d0dfbce63a89 642 * @arg @ref LL_SPI_DATAWIDTH_14BIT
elmot 1:d0dfbce63a89 643 * @arg @ref LL_SPI_DATAWIDTH_15BIT
elmot 1:d0dfbce63a89 644 * @arg @ref LL_SPI_DATAWIDTH_16BIT
elmot 1:d0dfbce63a89 645 * @retval None
elmot 1:d0dfbce63a89 646 */
elmot 1:d0dfbce63a89 647 __STATIC_INLINE void LL_SPI_SetDataWidth(SPI_TypeDef *SPIx, uint32_t DataWidth)
elmot 1:d0dfbce63a89 648 {
elmot 1:d0dfbce63a89 649 MODIFY_REG(SPIx->CR2, SPI_CR2_DS, DataWidth);
elmot 1:d0dfbce63a89 650 }
elmot 1:d0dfbce63a89 651
elmot 1:d0dfbce63a89 652 /**
elmot 1:d0dfbce63a89 653 * @brief Get frame data width
elmot 1:d0dfbce63a89 654 * @rmtoll CR2 DS LL_SPI_GetDataWidth
elmot 1:d0dfbce63a89 655 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 656 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 657 * @arg @ref LL_SPI_DATAWIDTH_4BIT
elmot 1:d0dfbce63a89 658 * @arg @ref LL_SPI_DATAWIDTH_5BIT
elmot 1:d0dfbce63a89 659 * @arg @ref LL_SPI_DATAWIDTH_6BIT
elmot 1:d0dfbce63a89 660 * @arg @ref LL_SPI_DATAWIDTH_7BIT
elmot 1:d0dfbce63a89 661 * @arg @ref LL_SPI_DATAWIDTH_8BIT
elmot 1:d0dfbce63a89 662 * @arg @ref LL_SPI_DATAWIDTH_9BIT
elmot 1:d0dfbce63a89 663 * @arg @ref LL_SPI_DATAWIDTH_10BIT
elmot 1:d0dfbce63a89 664 * @arg @ref LL_SPI_DATAWIDTH_11BIT
elmot 1:d0dfbce63a89 665 * @arg @ref LL_SPI_DATAWIDTH_12BIT
elmot 1:d0dfbce63a89 666 * @arg @ref LL_SPI_DATAWIDTH_13BIT
elmot 1:d0dfbce63a89 667 * @arg @ref LL_SPI_DATAWIDTH_14BIT
elmot 1:d0dfbce63a89 668 * @arg @ref LL_SPI_DATAWIDTH_15BIT
elmot 1:d0dfbce63a89 669 * @arg @ref LL_SPI_DATAWIDTH_16BIT
elmot 1:d0dfbce63a89 670 */
elmot 1:d0dfbce63a89 671 __STATIC_INLINE uint32_t LL_SPI_GetDataWidth(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 672 {
elmot 1:d0dfbce63a89 673 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_DS));
elmot 1:d0dfbce63a89 674 }
elmot 1:d0dfbce63a89 675
elmot 1:d0dfbce63a89 676 /**
elmot 1:d0dfbce63a89 677 * @brief Set threshold of RXFIFO that triggers an RXNE event
elmot 1:d0dfbce63a89 678 * @rmtoll CR2 FRXTH LL_SPI_SetRxFIFOThreshold
elmot 1:d0dfbce63a89 679 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 680 * @param Threshold This parameter can be one of the following values:
elmot 1:d0dfbce63a89 681 * @arg @ref LL_SPI_RX_FIFO_TH_HALF
elmot 1:d0dfbce63a89 682 * @arg @ref LL_SPI_RX_FIFO_TH_QUARTER
elmot 1:d0dfbce63a89 683 * @retval None
elmot 1:d0dfbce63a89 684 */
elmot 1:d0dfbce63a89 685 __STATIC_INLINE void LL_SPI_SetRxFIFOThreshold(SPI_TypeDef *SPIx, uint32_t Threshold)
elmot 1:d0dfbce63a89 686 {
elmot 1:d0dfbce63a89 687 MODIFY_REG(SPIx->CR2, SPI_CR2_FRXTH, Threshold);
elmot 1:d0dfbce63a89 688 }
elmot 1:d0dfbce63a89 689
elmot 1:d0dfbce63a89 690 /**
elmot 1:d0dfbce63a89 691 * @brief Get threshold of RXFIFO that triggers an RXNE event
elmot 1:d0dfbce63a89 692 * @rmtoll CR2 FRXTH LL_SPI_GetRxFIFOThreshold
elmot 1:d0dfbce63a89 693 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 694 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 695 * @arg @ref LL_SPI_RX_FIFO_TH_HALF
elmot 1:d0dfbce63a89 696 * @arg @ref LL_SPI_RX_FIFO_TH_QUARTER
elmot 1:d0dfbce63a89 697 */
elmot 1:d0dfbce63a89 698 __STATIC_INLINE uint32_t LL_SPI_GetRxFIFOThreshold(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 699 {
elmot 1:d0dfbce63a89 700 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRXTH));
elmot 1:d0dfbce63a89 701 }
elmot 1:d0dfbce63a89 702
elmot 1:d0dfbce63a89 703 /**
elmot 1:d0dfbce63a89 704 * @}
elmot 1:d0dfbce63a89 705 */
elmot 1:d0dfbce63a89 706
elmot 1:d0dfbce63a89 707 /** @defgroup SPI_LL_EF_CRC_Management CRC Management
elmot 1:d0dfbce63a89 708 * @{
elmot 1:d0dfbce63a89 709 */
elmot 1:d0dfbce63a89 710
elmot 1:d0dfbce63a89 711 /**
elmot 1:d0dfbce63a89 712 * @brief Enable CRC
elmot 1:d0dfbce63a89 713 * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
elmot 1:d0dfbce63a89 714 * @rmtoll CR1 CRCEN LL_SPI_EnableCRC
elmot 1:d0dfbce63a89 715 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 716 * @retval None
elmot 1:d0dfbce63a89 717 */
elmot 1:d0dfbce63a89 718 __STATIC_INLINE void LL_SPI_EnableCRC(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 719 {
elmot 1:d0dfbce63a89 720 SET_BIT(SPIx->CR1, SPI_CR1_CRCEN);
elmot 1:d0dfbce63a89 721 }
elmot 1:d0dfbce63a89 722
elmot 1:d0dfbce63a89 723 /**
elmot 1:d0dfbce63a89 724 * @brief Disable CRC
elmot 1:d0dfbce63a89 725 * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
elmot 1:d0dfbce63a89 726 * @rmtoll CR1 CRCEN LL_SPI_DisableCRC
elmot 1:d0dfbce63a89 727 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 728 * @retval None
elmot 1:d0dfbce63a89 729 */
elmot 1:d0dfbce63a89 730 __STATIC_INLINE void LL_SPI_DisableCRC(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 731 {
elmot 1:d0dfbce63a89 732 CLEAR_BIT(SPIx->CR1, SPI_CR1_CRCEN);
elmot 1:d0dfbce63a89 733 }
elmot 1:d0dfbce63a89 734
elmot 1:d0dfbce63a89 735 /**
elmot 1:d0dfbce63a89 736 * @brief Check if CRC is enabled
elmot 1:d0dfbce63a89 737 * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
elmot 1:d0dfbce63a89 738 * @rmtoll CR1 CRCEN LL_SPI_IsEnabledCRC
elmot 1:d0dfbce63a89 739 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 740 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 741 */
elmot 1:d0dfbce63a89 742 __STATIC_INLINE uint32_t LL_SPI_IsEnabledCRC(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 743 {
elmot 1:d0dfbce63a89 744 return (READ_BIT(SPIx->CR1, SPI_CR1_CRCEN) == (SPI_CR1_CRCEN));
elmot 1:d0dfbce63a89 745 }
elmot 1:d0dfbce63a89 746
elmot 1:d0dfbce63a89 747 /**
elmot 1:d0dfbce63a89 748 * @brief Set CRC Length
elmot 1:d0dfbce63a89 749 * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
elmot 1:d0dfbce63a89 750 * @rmtoll CR1 CRCL LL_SPI_SetCRCWidth
elmot 1:d0dfbce63a89 751 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 752 * @param CRCLength This parameter can be one of the following values:
elmot 1:d0dfbce63a89 753 * @arg @ref LL_SPI_CRC_8BIT
elmot 1:d0dfbce63a89 754 * @arg @ref LL_SPI_CRC_16BIT
elmot 1:d0dfbce63a89 755 * @retval None
elmot 1:d0dfbce63a89 756 */
elmot 1:d0dfbce63a89 757 __STATIC_INLINE void LL_SPI_SetCRCWidth(SPI_TypeDef *SPIx, uint32_t CRCLength)
elmot 1:d0dfbce63a89 758 {
elmot 1:d0dfbce63a89 759 MODIFY_REG(SPIx->CR1, SPI_CR1_CRCL, CRCLength);
elmot 1:d0dfbce63a89 760 }
elmot 1:d0dfbce63a89 761
elmot 1:d0dfbce63a89 762 /**
elmot 1:d0dfbce63a89 763 * @brief Get CRC Length
elmot 1:d0dfbce63a89 764 * @rmtoll CR1 CRCL LL_SPI_GetCRCWidth
elmot 1:d0dfbce63a89 765 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 766 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 767 * @arg @ref LL_SPI_CRC_8BIT
elmot 1:d0dfbce63a89 768 * @arg @ref LL_SPI_CRC_16BIT
elmot 1:d0dfbce63a89 769 */
elmot 1:d0dfbce63a89 770 __STATIC_INLINE uint32_t LL_SPI_GetCRCWidth(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 771 {
elmot 1:d0dfbce63a89 772 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CRCL));
elmot 1:d0dfbce63a89 773 }
elmot 1:d0dfbce63a89 774
elmot 1:d0dfbce63a89 775 /**
elmot 1:d0dfbce63a89 776 * @brief Set CRCNext to transfer CRC on the line
elmot 1:d0dfbce63a89 777 * @note This bit has to be written as soon as the last data is written in the SPIx_DR register.
elmot 1:d0dfbce63a89 778 * @rmtoll CR1 CRCNEXT LL_SPI_SetCRCNext
elmot 1:d0dfbce63a89 779 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 780 * @retval None
elmot 1:d0dfbce63a89 781 */
elmot 1:d0dfbce63a89 782 __STATIC_INLINE void LL_SPI_SetCRCNext(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 783 {
elmot 1:d0dfbce63a89 784 SET_BIT(SPIx->CR1, SPI_CR1_CRCNEXT);
elmot 1:d0dfbce63a89 785 }
elmot 1:d0dfbce63a89 786
elmot 1:d0dfbce63a89 787 /**
elmot 1:d0dfbce63a89 788 * @brief Set polynomial for CRC calculation
elmot 1:d0dfbce63a89 789 * @rmtoll CRCPR CRCPOLY LL_SPI_SetCRCPolynomial
elmot 1:d0dfbce63a89 790 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 791 * @param CRCPoly This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF
elmot 1:d0dfbce63a89 792 * @retval None
elmot 1:d0dfbce63a89 793 */
elmot 1:d0dfbce63a89 794 __STATIC_INLINE void LL_SPI_SetCRCPolynomial(SPI_TypeDef *SPIx, uint32_t CRCPoly)
elmot 1:d0dfbce63a89 795 {
elmot 1:d0dfbce63a89 796 WRITE_REG(SPIx->CRCPR, (uint16_t)CRCPoly);
elmot 1:d0dfbce63a89 797 }
elmot 1:d0dfbce63a89 798
elmot 1:d0dfbce63a89 799 /**
elmot 1:d0dfbce63a89 800 * @brief Get polynomial for CRC calculation
elmot 1:d0dfbce63a89 801 * @rmtoll CRCPR CRCPOLY LL_SPI_GetCRCPolynomial
elmot 1:d0dfbce63a89 802 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 803 * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
elmot 1:d0dfbce63a89 804 */
elmot 1:d0dfbce63a89 805 __STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 806 {
elmot 1:d0dfbce63a89 807 return (uint32_t)(READ_REG(SPIx->CRCPR));
elmot 1:d0dfbce63a89 808 }
elmot 1:d0dfbce63a89 809
elmot 1:d0dfbce63a89 810 /**
elmot 1:d0dfbce63a89 811 * @brief Get Rx CRC
elmot 1:d0dfbce63a89 812 * @rmtoll RXCRCR RXCRC LL_SPI_GetRxCRC
elmot 1:d0dfbce63a89 813 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 814 * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
elmot 1:d0dfbce63a89 815 */
elmot 1:d0dfbce63a89 816 __STATIC_INLINE uint32_t LL_SPI_GetRxCRC(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 817 {
elmot 1:d0dfbce63a89 818 return (uint32_t)(READ_REG(SPIx->RXCRCR));
elmot 1:d0dfbce63a89 819 }
elmot 1:d0dfbce63a89 820
elmot 1:d0dfbce63a89 821 /**
elmot 1:d0dfbce63a89 822 * @brief Get Tx CRC
elmot 1:d0dfbce63a89 823 * @rmtoll TXCRCR TXCRC LL_SPI_GetTxCRC
elmot 1:d0dfbce63a89 824 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 825 * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
elmot 1:d0dfbce63a89 826 */
elmot 1:d0dfbce63a89 827 __STATIC_INLINE uint32_t LL_SPI_GetTxCRC(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 828 {
elmot 1:d0dfbce63a89 829 return (uint32_t)(READ_REG(SPIx->TXCRCR));
elmot 1:d0dfbce63a89 830 }
elmot 1:d0dfbce63a89 831
elmot 1:d0dfbce63a89 832 /**
elmot 1:d0dfbce63a89 833 * @}
elmot 1:d0dfbce63a89 834 */
elmot 1:d0dfbce63a89 835
elmot 1:d0dfbce63a89 836 /** @defgroup SPI_LL_EF_NSS_Management Slave Select Pin Management
elmot 1:d0dfbce63a89 837 * @{
elmot 1:d0dfbce63a89 838 */
elmot 1:d0dfbce63a89 839
elmot 1:d0dfbce63a89 840 /**
elmot 1:d0dfbce63a89 841 * @brief Set NSS mode
elmot 1:d0dfbce63a89 842 * @note LL_SPI_NSS_SOFT Mode is not used in SPI TI mode.
elmot 1:d0dfbce63a89 843 * @rmtoll CR1 SSM LL_SPI_SetNSSMode\n
elmot 1:d0dfbce63a89 844 * @rmtoll CR2 SSOE LL_SPI_SetNSSMode
elmot 1:d0dfbce63a89 845 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 846 * @param NSS This parameter can be one of the following values:
elmot 1:d0dfbce63a89 847 * @arg @ref LL_SPI_NSS_SOFT
elmot 1:d0dfbce63a89 848 * @arg @ref LL_SPI_NSS_HARD_INPUT
elmot 1:d0dfbce63a89 849 * @arg @ref LL_SPI_NSS_HARD_OUTPUT
elmot 1:d0dfbce63a89 850 * @retval None
elmot 1:d0dfbce63a89 851 */
elmot 1:d0dfbce63a89 852 __STATIC_INLINE void LL_SPI_SetNSSMode(SPI_TypeDef *SPIx, uint32_t NSS)
elmot 1:d0dfbce63a89 853 {
elmot 1:d0dfbce63a89 854 MODIFY_REG(SPIx->CR1, SPI_CR1_SSM, NSS);
elmot 1:d0dfbce63a89 855 MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, ((uint32_t)(NSS >> 16U)));
elmot 1:d0dfbce63a89 856 }
elmot 1:d0dfbce63a89 857
elmot 1:d0dfbce63a89 858 /**
elmot 1:d0dfbce63a89 859 * @brief Get NSS mode
elmot 1:d0dfbce63a89 860 * @rmtoll CR1 SSM LL_SPI_GetNSSMode\n
elmot 1:d0dfbce63a89 861 * @rmtoll CR2 SSOE LL_SPI_GetNSSMode
elmot 1:d0dfbce63a89 862 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 863 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 864 * @arg @ref LL_SPI_NSS_SOFT
elmot 1:d0dfbce63a89 865 * @arg @ref LL_SPI_NSS_HARD_INPUT
elmot 1:d0dfbce63a89 866 * @arg @ref LL_SPI_NSS_HARD_OUTPUT
elmot 1:d0dfbce63a89 867 */
elmot 1:d0dfbce63a89 868 __STATIC_INLINE uint32_t LL_SPI_GetNSSMode(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 869 {
elmot 1:d0dfbce63a89 870 register uint32_t Ssm = (READ_BIT(SPIx->CR1, SPI_CR1_SSM));
elmot 1:d0dfbce63a89 871 register uint32_t Ssoe = (READ_BIT(SPIx->CR2, SPI_CR2_SSOE) << 16U);
elmot 1:d0dfbce63a89 872 return (Ssm | Ssoe);
elmot 1:d0dfbce63a89 873 }
elmot 1:d0dfbce63a89 874
elmot 1:d0dfbce63a89 875 /**
elmot 1:d0dfbce63a89 876 * @brief Enable NSS pulse management
elmot 1:d0dfbce63a89 877 * @note This bit should not be changed when communication is ongoing. This bit is not used in SPI TI mode.
elmot 1:d0dfbce63a89 878 * @rmtoll CR2 NSSP LL_SPI_EnableNSSPulseMgt
elmot 1:d0dfbce63a89 879 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 880 * @retval None
elmot 1:d0dfbce63a89 881 */
elmot 1:d0dfbce63a89 882 __STATIC_INLINE void LL_SPI_EnableNSSPulseMgt(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 883 {
elmot 1:d0dfbce63a89 884 SET_BIT(SPIx->CR2, SPI_CR2_NSSP);
elmot 1:d0dfbce63a89 885 }
elmot 1:d0dfbce63a89 886
elmot 1:d0dfbce63a89 887 /**
elmot 1:d0dfbce63a89 888 * @brief Disable NSS pulse management
elmot 1:d0dfbce63a89 889 * @note This bit should not be changed when communication is ongoing. This bit is not used in SPI TI mode.
elmot 1:d0dfbce63a89 890 * @rmtoll CR2 NSSP LL_SPI_DisableNSSPulseMgt
elmot 1:d0dfbce63a89 891 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 892 * @retval None
elmot 1:d0dfbce63a89 893 */
elmot 1:d0dfbce63a89 894 __STATIC_INLINE void LL_SPI_DisableNSSPulseMgt(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 895 {
elmot 1:d0dfbce63a89 896 CLEAR_BIT(SPIx->CR2, SPI_CR2_NSSP);
elmot 1:d0dfbce63a89 897 }
elmot 1:d0dfbce63a89 898
elmot 1:d0dfbce63a89 899 /**
elmot 1:d0dfbce63a89 900 * @brief Check if NSS pulse is enabled
elmot 1:d0dfbce63a89 901 * @note This bit should not be changed when communication is ongoing. This bit is not used in SPI TI mode.
elmot 1:d0dfbce63a89 902 * @rmtoll CR2 NSSP LL_SPI_IsEnabledNSSPulse
elmot 1:d0dfbce63a89 903 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 904 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 905 */
elmot 1:d0dfbce63a89 906 __STATIC_INLINE uint32_t LL_SPI_IsEnabledNSSPulse(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 907 {
elmot 1:d0dfbce63a89 908 return (READ_BIT(SPIx->CR2, SPI_CR2_NSSP) == (SPI_CR2_NSSP));
elmot 1:d0dfbce63a89 909 }
elmot 1:d0dfbce63a89 910
elmot 1:d0dfbce63a89 911 /**
elmot 1:d0dfbce63a89 912 * @}
elmot 1:d0dfbce63a89 913 */
elmot 1:d0dfbce63a89 914
elmot 1:d0dfbce63a89 915 /** @defgroup SPI_LL_EF_FLAG_Management FLAG Management
elmot 1:d0dfbce63a89 916 * @{
elmot 1:d0dfbce63a89 917 */
elmot 1:d0dfbce63a89 918
elmot 1:d0dfbce63a89 919 /**
elmot 1:d0dfbce63a89 920 * @brief Check if Rx buffer is not empty
elmot 1:d0dfbce63a89 921 * @rmtoll SR RXNE LL_SPI_IsActiveFlag_RXNE
elmot 1:d0dfbce63a89 922 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 923 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 924 */
elmot 1:d0dfbce63a89 925 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 926 {
elmot 1:d0dfbce63a89 927 return (READ_BIT(SPIx->SR, SPI_SR_RXNE) == (SPI_SR_RXNE));
elmot 1:d0dfbce63a89 928 }
elmot 1:d0dfbce63a89 929
elmot 1:d0dfbce63a89 930 /**
elmot 1:d0dfbce63a89 931 * @brief Check if Tx buffer is empty
elmot 1:d0dfbce63a89 932 * @rmtoll SR TXE LL_SPI_IsActiveFlag_TXE
elmot 1:d0dfbce63a89 933 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 934 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 935 */
elmot 1:d0dfbce63a89 936 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 937 {
elmot 1:d0dfbce63a89 938 return (READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE));
elmot 1:d0dfbce63a89 939 }
elmot 1:d0dfbce63a89 940
elmot 1:d0dfbce63a89 941 /**
elmot 1:d0dfbce63a89 942 * @brief Get CRC error flag
elmot 1:d0dfbce63a89 943 * @rmtoll SR CRCERR LL_SPI_IsActiveFlag_CRCERR
elmot 1:d0dfbce63a89 944 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 945 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 946 */
elmot 1:d0dfbce63a89 947 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 948 {
elmot 1:d0dfbce63a89 949 return (READ_BIT(SPIx->SR, SPI_SR_CRCERR) == (SPI_SR_CRCERR));
elmot 1:d0dfbce63a89 950 }
elmot 1:d0dfbce63a89 951
elmot 1:d0dfbce63a89 952 /**
elmot 1:d0dfbce63a89 953 * @brief Get mode fault error flag
elmot 1:d0dfbce63a89 954 * @rmtoll SR MODF LL_SPI_IsActiveFlag_MODF
elmot 1:d0dfbce63a89 955 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 956 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 957 */
elmot 1:d0dfbce63a89 958 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 959 {
elmot 1:d0dfbce63a89 960 return (READ_BIT(SPIx->SR, SPI_SR_MODF) == (SPI_SR_MODF));
elmot 1:d0dfbce63a89 961 }
elmot 1:d0dfbce63a89 962
elmot 1:d0dfbce63a89 963 /**
elmot 1:d0dfbce63a89 964 * @brief Get overrun error flag
elmot 1:d0dfbce63a89 965 * @rmtoll SR OVR LL_SPI_IsActiveFlag_OVR
elmot 1:d0dfbce63a89 966 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 967 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 968 */
elmot 1:d0dfbce63a89 969 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 970 {
elmot 1:d0dfbce63a89 971 return (READ_BIT(SPIx->SR, SPI_SR_OVR) == (SPI_SR_OVR));
elmot 1:d0dfbce63a89 972 }
elmot 1:d0dfbce63a89 973
elmot 1:d0dfbce63a89 974 /**
elmot 1:d0dfbce63a89 975 * @brief Get busy flag
elmot 1:d0dfbce63a89 976 * @note The BSY flag is cleared under any one of the following conditions:
elmot 1:d0dfbce63a89 977 * -When the SPI is correctly disabled
elmot 1:d0dfbce63a89 978 * -When a fault is detected in Master mode (MODF bit set to 1)
elmot 1:d0dfbce63a89 979 * -In Master mode, when it finishes a data transmission and no new data is ready to be
elmot 1:d0dfbce63a89 980 * sent
elmot 1:d0dfbce63a89 981 * -In Slave mode, when the BSY flag is set to '0' for at least one SPI clock cycle between
elmot 1:d0dfbce63a89 982 * each data transfer.
elmot 1:d0dfbce63a89 983 * @rmtoll SR BSY LL_SPI_IsActiveFlag_BSY
elmot 1:d0dfbce63a89 984 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 985 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 986 */
elmot 1:d0dfbce63a89 987 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 988 {
elmot 1:d0dfbce63a89 989 return (READ_BIT(SPIx->SR, SPI_SR_BSY) == (SPI_SR_BSY));
elmot 1:d0dfbce63a89 990 }
elmot 1:d0dfbce63a89 991
elmot 1:d0dfbce63a89 992 /**
elmot 1:d0dfbce63a89 993 * @brief Get frame format error flag
elmot 1:d0dfbce63a89 994 * @rmtoll SR FRE LL_SPI_IsActiveFlag_FRE
elmot 1:d0dfbce63a89 995 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 996 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 997 */
elmot 1:d0dfbce63a89 998 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 999 {
elmot 1:d0dfbce63a89 1000 return (READ_BIT(SPIx->SR, SPI_SR_FRE) == (SPI_SR_FRE));
elmot 1:d0dfbce63a89 1001 }
elmot 1:d0dfbce63a89 1002
elmot 1:d0dfbce63a89 1003 /**
elmot 1:d0dfbce63a89 1004 * @brief Get FIFO reception Level
elmot 1:d0dfbce63a89 1005 * @rmtoll SR FRLVL LL_SPI_GetRxFIFOLevel
elmot 1:d0dfbce63a89 1006 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1007 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 1008 * @arg @ref LL_SPI_RX_FIFO_EMPTY
elmot 1:d0dfbce63a89 1009 * @arg @ref LL_SPI_RX_FIFO_QUARTER_FULL
elmot 1:d0dfbce63a89 1010 * @arg @ref LL_SPI_RX_FIFO_HALF_FULL
elmot 1:d0dfbce63a89 1011 * @arg @ref LL_SPI_RX_FIFO_FULL
elmot 1:d0dfbce63a89 1012 */
elmot 1:d0dfbce63a89 1013 __STATIC_INLINE uint32_t LL_SPI_GetRxFIFOLevel(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1014 {
elmot 1:d0dfbce63a89 1015 return (uint32_t)(READ_BIT(SPIx->SR, SPI_SR_FRLVL));
elmot 1:d0dfbce63a89 1016 }
elmot 1:d0dfbce63a89 1017
elmot 1:d0dfbce63a89 1018 /**
elmot 1:d0dfbce63a89 1019 * @brief Get FIFO Transmission Level
elmot 1:d0dfbce63a89 1020 * @rmtoll SR FTLVL LL_SPI_GetTxFIFOLevel
elmot 1:d0dfbce63a89 1021 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1022 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 1023 * @arg @ref LL_SPI_TX_FIFO_EMPTY
elmot 1:d0dfbce63a89 1024 * @arg @ref LL_SPI_TX_FIFO_QUARTER_FULL
elmot 1:d0dfbce63a89 1025 * @arg @ref LL_SPI_TX_FIFO_HALF_FULL
elmot 1:d0dfbce63a89 1026 * @arg @ref LL_SPI_TX_FIFO_FULL
elmot 1:d0dfbce63a89 1027 */
elmot 1:d0dfbce63a89 1028 __STATIC_INLINE uint32_t LL_SPI_GetTxFIFOLevel(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1029 {
elmot 1:d0dfbce63a89 1030 return (uint32_t)(READ_BIT(SPIx->SR, SPI_SR_FTLVL));
elmot 1:d0dfbce63a89 1031 }
elmot 1:d0dfbce63a89 1032
elmot 1:d0dfbce63a89 1033 /**
elmot 1:d0dfbce63a89 1034 * @brief Clear CRC error flag
elmot 1:d0dfbce63a89 1035 * @rmtoll SR CRCERR LL_SPI_ClearFlag_CRCERR
elmot 1:d0dfbce63a89 1036 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1037 * @retval None
elmot 1:d0dfbce63a89 1038 */
elmot 1:d0dfbce63a89 1039 __STATIC_INLINE void LL_SPI_ClearFlag_CRCERR(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1040 {
elmot 1:d0dfbce63a89 1041 CLEAR_BIT(SPIx->SR, SPI_SR_CRCERR);
elmot 1:d0dfbce63a89 1042 }
elmot 1:d0dfbce63a89 1043
elmot 1:d0dfbce63a89 1044 /**
elmot 1:d0dfbce63a89 1045 * @brief Clear mode fault error flag
elmot 1:d0dfbce63a89 1046 * @note Clearing this flag is done by a read access to the SPIx_SR
elmot 1:d0dfbce63a89 1047 * register followed by a write access to the SPIx_CR1 register
elmot 1:d0dfbce63a89 1048 * @rmtoll SR MODF LL_SPI_ClearFlag_MODF
elmot 1:d0dfbce63a89 1049 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1050 * @retval None
elmot 1:d0dfbce63a89 1051 */
elmot 1:d0dfbce63a89 1052 __STATIC_INLINE void LL_SPI_ClearFlag_MODF(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1053 {
elmot 1:d0dfbce63a89 1054 __IO uint32_t tmpreg;
elmot 1:d0dfbce63a89 1055 tmpreg = SPIx->SR;
elmot 1:d0dfbce63a89 1056 (void) tmpreg;
elmot 1:d0dfbce63a89 1057 tmpreg = CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE);
elmot 1:d0dfbce63a89 1058 (void) tmpreg;
elmot 1:d0dfbce63a89 1059 }
elmot 1:d0dfbce63a89 1060
elmot 1:d0dfbce63a89 1061 /**
elmot 1:d0dfbce63a89 1062 * @brief Clear overrun error flag
elmot 1:d0dfbce63a89 1063 * @note Clearing this flag is done by a read access to the SPIx_DR
elmot 1:d0dfbce63a89 1064 * register followed by a read access to the SPIx_SR register
elmot 1:d0dfbce63a89 1065 * @rmtoll SR OVR LL_SPI_ClearFlag_OVR
elmot 1:d0dfbce63a89 1066 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1067 * @retval None
elmot 1:d0dfbce63a89 1068 */
elmot 1:d0dfbce63a89 1069 __STATIC_INLINE void LL_SPI_ClearFlag_OVR(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1070 {
elmot 1:d0dfbce63a89 1071 __IO uint32_t tmpreg;
elmot 1:d0dfbce63a89 1072 tmpreg = SPIx->DR;
elmot 1:d0dfbce63a89 1073 (void) tmpreg;
elmot 1:d0dfbce63a89 1074 tmpreg = SPIx->SR;
elmot 1:d0dfbce63a89 1075 (void) tmpreg;
elmot 1:d0dfbce63a89 1076 }
elmot 1:d0dfbce63a89 1077
elmot 1:d0dfbce63a89 1078 /**
elmot 1:d0dfbce63a89 1079 * @brief Clear frame format error flag
elmot 1:d0dfbce63a89 1080 * @note Clearing this flag is done by reading SPIx_SR register
elmot 1:d0dfbce63a89 1081 * @rmtoll SR FRE LL_SPI_ClearFlag_FRE
elmot 1:d0dfbce63a89 1082 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1083 * @retval None
elmot 1:d0dfbce63a89 1084 */
elmot 1:d0dfbce63a89 1085 __STATIC_INLINE void LL_SPI_ClearFlag_FRE(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1086 {
elmot 1:d0dfbce63a89 1087 __IO uint32_t tmpreg;
elmot 1:d0dfbce63a89 1088 tmpreg = SPIx->SR;
elmot 1:d0dfbce63a89 1089 (void) tmpreg;
elmot 1:d0dfbce63a89 1090 }
elmot 1:d0dfbce63a89 1091
elmot 1:d0dfbce63a89 1092 /**
elmot 1:d0dfbce63a89 1093 * @}
elmot 1:d0dfbce63a89 1094 */
elmot 1:d0dfbce63a89 1095
elmot 1:d0dfbce63a89 1096 /** @defgroup SPI_LL_EF_IT_Management Interrupt Management
elmot 1:d0dfbce63a89 1097 * @{
elmot 1:d0dfbce63a89 1098 */
elmot 1:d0dfbce63a89 1099
elmot 1:d0dfbce63a89 1100 /**
elmot 1:d0dfbce63a89 1101 * @brief Enable error interrupt
elmot 1:d0dfbce63a89 1102 * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode).
elmot 1:d0dfbce63a89 1103 * @rmtoll CR2 ERRIE LL_SPI_EnableIT_ERR
elmot 1:d0dfbce63a89 1104 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1105 * @retval None
elmot 1:d0dfbce63a89 1106 */
elmot 1:d0dfbce63a89 1107 __STATIC_INLINE void LL_SPI_EnableIT_ERR(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1108 {
elmot 1:d0dfbce63a89 1109 SET_BIT(SPIx->CR2, SPI_CR2_ERRIE);
elmot 1:d0dfbce63a89 1110 }
elmot 1:d0dfbce63a89 1111
elmot 1:d0dfbce63a89 1112 /**
elmot 1:d0dfbce63a89 1113 * @brief Enable Rx buffer not empty interrupt
elmot 1:d0dfbce63a89 1114 * @rmtoll CR2 RXNEIE LL_SPI_EnableIT_RXNE
elmot 1:d0dfbce63a89 1115 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1116 * @retval None
elmot 1:d0dfbce63a89 1117 */
elmot 1:d0dfbce63a89 1118 __STATIC_INLINE void LL_SPI_EnableIT_RXNE(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1119 {
elmot 1:d0dfbce63a89 1120 SET_BIT(SPIx->CR2, SPI_CR2_RXNEIE);
elmot 1:d0dfbce63a89 1121 }
elmot 1:d0dfbce63a89 1122
elmot 1:d0dfbce63a89 1123 /**
elmot 1:d0dfbce63a89 1124 * @brief Enable Tx buffer empty interrupt
elmot 1:d0dfbce63a89 1125 * @rmtoll CR2 TXEIE LL_SPI_EnableIT_TXE
elmot 1:d0dfbce63a89 1126 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1127 * @retval None
elmot 1:d0dfbce63a89 1128 */
elmot 1:d0dfbce63a89 1129 __STATIC_INLINE void LL_SPI_EnableIT_TXE(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1130 {
elmot 1:d0dfbce63a89 1131 SET_BIT(SPIx->CR2, SPI_CR2_TXEIE);
elmot 1:d0dfbce63a89 1132 }
elmot 1:d0dfbce63a89 1133
elmot 1:d0dfbce63a89 1134 /**
elmot 1:d0dfbce63a89 1135 * @brief Disable error interrupt
elmot 1:d0dfbce63a89 1136 * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode).
elmot 1:d0dfbce63a89 1137 * @rmtoll CR2 ERRIE LL_SPI_DisableIT_ERR
elmot 1:d0dfbce63a89 1138 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1139 * @retval None
elmot 1:d0dfbce63a89 1140 */
elmot 1:d0dfbce63a89 1141 __STATIC_INLINE void LL_SPI_DisableIT_ERR(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1142 {
elmot 1:d0dfbce63a89 1143 CLEAR_BIT(SPIx->CR2, SPI_CR2_ERRIE);
elmot 1:d0dfbce63a89 1144 }
elmot 1:d0dfbce63a89 1145
elmot 1:d0dfbce63a89 1146 /**
elmot 1:d0dfbce63a89 1147 * @brief Disable Rx buffer not empty interrupt
elmot 1:d0dfbce63a89 1148 * @rmtoll CR2 RXNEIE LL_SPI_DisableIT_RXNE
elmot 1:d0dfbce63a89 1149 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1150 * @retval None
elmot 1:d0dfbce63a89 1151 */
elmot 1:d0dfbce63a89 1152 __STATIC_INLINE void LL_SPI_DisableIT_RXNE(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1153 {
elmot 1:d0dfbce63a89 1154 CLEAR_BIT(SPIx->CR2, SPI_CR2_RXNEIE);
elmot 1:d0dfbce63a89 1155 }
elmot 1:d0dfbce63a89 1156
elmot 1:d0dfbce63a89 1157 /**
elmot 1:d0dfbce63a89 1158 * @brief Disable Tx buffer empty interrupt
elmot 1:d0dfbce63a89 1159 * @rmtoll CR2 TXEIE LL_SPI_DisableIT_TXE
elmot 1:d0dfbce63a89 1160 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1161 * @retval None
elmot 1:d0dfbce63a89 1162 */
elmot 1:d0dfbce63a89 1163 __STATIC_INLINE void LL_SPI_DisableIT_TXE(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1164 {
elmot 1:d0dfbce63a89 1165 CLEAR_BIT(SPIx->CR2, SPI_CR2_TXEIE);
elmot 1:d0dfbce63a89 1166 }
elmot 1:d0dfbce63a89 1167
elmot 1:d0dfbce63a89 1168 /**
elmot 1:d0dfbce63a89 1169 * @brief Check if error interrupt is enabled
elmot 1:d0dfbce63a89 1170 * @rmtoll CR2 ERRIE LL_SPI_IsEnabledIT_ERR
elmot 1:d0dfbce63a89 1171 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1172 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1173 */
elmot 1:d0dfbce63a89 1174 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1175 {
elmot 1:d0dfbce63a89 1176 return (READ_BIT(SPIx->CR2, SPI_CR2_ERRIE) == (SPI_CR2_ERRIE));
elmot 1:d0dfbce63a89 1177 }
elmot 1:d0dfbce63a89 1178
elmot 1:d0dfbce63a89 1179 /**
elmot 1:d0dfbce63a89 1180 * @brief Check if Rx buffer not empty interrupt is enabled
elmot 1:d0dfbce63a89 1181 * @rmtoll CR2 RXNEIE LL_SPI_IsEnabledIT_RXNE
elmot 1:d0dfbce63a89 1182 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1183 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1184 */
elmot 1:d0dfbce63a89 1185 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1186 {
elmot 1:d0dfbce63a89 1187 return (READ_BIT(SPIx->CR2, SPI_CR2_RXNEIE) == (SPI_CR2_RXNEIE));
elmot 1:d0dfbce63a89 1188 }
elmot 1:d0dfbce63a89 1189
elmot 1:d0dfbce63a89 1190 /**
elmot 1:d0dfbce63a89 1191 * @brief Check if Tx buffer empty interrupt
elmot 1:d0dfbce63a89 1192 * @rmtoll CR2 TXEIE LL_SPI_IsEnabledIT_TXE
elmot 1:d0dfbce63a89 1193 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1194 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1195 */
elmot 1:d0dfbce63a89 1196 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXE(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1197 {
elmot 1:d0dfbce63a89 1198 return (READ_BIT(SPIx->CR2, SPI_CR2_TXEIE) == (SPI_CR2_TXEIE));
elmot 1:d0dfbce63a89 1199 }
elmot 1:d0dfbce63a89 1200
elmot 1:d0dfbce63a89 1201 /**
elmot 1:d0dfbce63a89 1202 * @}
elmot 1:d0dfbce63a89 1203 */
elmot 1:d0dfbce63a89 1204
elmot 1:d0dfbce63a89 1205 /** @defgroup SPI_LL_EF_DMA_Management DMA Management
elmot 1:d0dfbce63a89 1206 * @{
elmot 1:d0dfbce63a89 1207 */
elmot 1:d0dfbce63a89 1208
elmot 1:d0dfbce63a89 1209 /**
elmot 1:d0dfbce63a89 1210 * @brief Enable DMA Rx
elmot 1:d0dfbce63a89 1211 * @rmtoll CR2 RXDMAEN LL_SPI_EnableDMAReq_RX
elmot 1:d0dfbce63a89 1212 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1213 * @retval None
elmot 1:d0dfbce63a89 1214 */
elmot 1:d0dfbce63a89 1215 __STATIC_INLINE void LL_SPI_EnableDMAReq_RX(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1216 {
elmot 1:d0dfbce63a89 1217 SET_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);
elmot 1:d0dfbce63a89 1218 }
elmot 1:d0dfbce63a89 1219
elmot 1:d0dfbce63a89 1220 /**
elmot 1:d0dfbce63a89 1221 * @brief Disable DMA Rx
elmot 1:d0dfbce63a89 1222 * @rmtoll CR2 RXDMAEN LL_SPI_DisableDMAReq_RX
elmot 1:d0dfbce63a89 1223 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1224 * @retval None
elmot 1:d0dfbce63a89 1225 */
elmot 1:d0dfbce63a89 1226 __STATIC_INLINE void LL_SPI_DisableDMAReq_RX(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1227 {
elmot 1:d0dfbce63a89 1228 CLEAR_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);
elmot 1:d0dfbce63a89 1229 }
elmot 1:d0dfbce63a89 1230
elmot 1:d0dfbce63a89 1231 /**
elmot 1:d0dfbce63a89 1232 * @brief Check if DMA Rx is enabled
elmot 1:d0dfbce63a89 1233 * @rmtoll CR2 RXDMAEN LL_SPI_IsEnabledDMAReq_RX
elmot 1:d0dfbce63a89 1234 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1235 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1236 */
elmot 1:d0dfbce63a89 1237 __STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1238 {
elmot 1:d0dfbce63a89 1239 return (READ_BIT(SPIx->CR2, SPI_CR2_RXDMAEN) == (SPI_CR2_RXDMAEN));
elmot 1:d0dfbce63a89 1240 }
elmot 1:d0dfbce63a89 1241
elmot 1:d0dfbce63a89 1242 /**
elmot 1:d0dfbce63a89 1243 * @brief Enable DMA Tx
elmot 1:d0dfbce63a89 1244 * @rmtoll CR2 TXDMAEN LL_SPI_EnableDMAReq_TX
elmot 1:d0dfbce63a89 1245 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1246 * @retval None
elmot 1:d0dfbce63a89 1247 */
elmot 1:d0dfbce63a89 1248 __STATIC_INLINE void LL_SPI_EnableDMAReq_TX(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1249 {
elmot 1:d0dfbce63a89 1250 SET_BIT(SPIx->CR2, SPI_CR2_TXDMAEN);
elmot 1:d0dfbce63a89 1251 }
elmot 1:d0dfbce63a89 1252
elmot 1:d0dfbce63a89 1253 /**
elmot 1:d0dfbce63a89 1254 * @brief Disable DMA Tx
elmot 1:d0dfbce63a89 1255 * @rmtoll CR2 TXDMAEN LL_SPI_DisableDMAReq_TX
elmot 1:d0dfbce63a89 1256 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1257 * @retval None
elmot 1:d0dfbce63a89 1258 */
elmot 1:d0dfbce63a89 1259 __STATIC_INLINE void LL_SPI_DisableDMAReq_TX(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1260 {
elmot 1:d0dfbce63a89 1261 CLEAR_BIT(SPIx->CR2, SPI_CR2_TXDMAEN);
elmot 1:d0dfbce63a89 1262 }
elmot 1:d0dfbce63a89 1263
elmot 1:d0dfbce63a89 1264 /**
elmot 1:d0dfbce63a89 1265 * @brief Check if DMA Tx is enabled
elmot 1:d0dfbce63a89 1266 * @rmtoll CR2 TXDMAEN LL_SPI_IsEnabledDMAReq_TX
elmot 1:d0dfbce63a89 1267 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1268 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1269 */
elmot 1:d0dfbce63a89 1270 __STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1271 {
elmot 1:d0dfbce63a89 1272 return (READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN));
elmot 1:d0dfbce63a89 1273 }
elmot 1:d0dfbce63a89 1274
elmot 1:d0dfbce63a89 1275 /**
elmot 1:d0dfbce63a89 1276 * @brief Set parity of Last DMA reception
elmot 1:d0dfbce63a89 1277 * @rmtoll CR2 LDMARX LL_SPI_SetDMAParity_RX
elmot 1:d0dfbce63a89 1278 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1279 * @param Parity This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1280 * @arg @ref LL_SPI_DMA_PARITY_ODD
elmot 1:d0dfbce63a89 1281 * @arg @ref LL_SPI_DMA_PARITY_EVEN
elmot 1:d0dfbce63a89 1282 * @retval None
elmot 1:d0dfbce63a89 1283 */
elmot 1:d0dfbce63a89 1284 __STATIC_INLINE void LL_SPI_SetDMAParity_RX(SPI_TypeDef *SPIx, uint32_t Parity)
elmot 1:d0dfbce63a89 1285 {
elmot 1:d0dfbce63a89 1286 MODIFY_REG(SPIx->CR2, SPI_CR2_LDMARX, (Parity << POSITION_VAL(SPI_CR2_LDMARX)));
elmot 1:d0dfbce63a89 1287 }
elmot 1:d0dfbce63a89 1288
elmot 1:d0dfbce63a89 1289 /**
elmot 1:d0dfbce63a89 1290 * @brief Get parity configuration for Last DMA reception
elmot 1:d0dfbce63a89 1291 * @rmtoll CR2 LDMARX LL_SPI_GetDMAParity_RX
elmot 1:d0dfbce63a89 1292 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1293 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 1294 * @arg @ref LL_SPI_DMA_PARITY_ODD
elmot 1:d0dfbce63a89 1295 * @arg @ref LL_SPI_DMA_PARITY_EVEN
elmot 1:d0dfbce63a89 1296 */
elmot 1:d0dfbce63a89 1297 __STATIC_INLINE uint32_t LL_SPI_GetDMAParity_RX(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1298 {
elmot 1:d0dfbce63a89 1299 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_LDMARX) >> POSITION_VAL(SPI_CR2_LDMARX));
elmot 1:d0dfbce63a89 1300 }
elmot 1:d0dfbce63a89 1301
elmot 1:d0dfbce63a89 1302 /**
elmot 1:d0dfbce63a89 1303 * @brief Set parity of Last DMA transmission
elmot 1:d0dfbce63a89 1304 * @rmtoll CR2 LDMATX LL_SPI_SetDMAParity_TX
elmot 1:d0dfbce63a89 1305 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1306 * @param Parity This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1307 * @arg @ref LL_SPI_DMA_PARITY_ODD
elmot 1:d0dfbce63a89 1308 * @arg @ref LL_SPI_DMA_PARITY_EVEN
elmot 1:d0dfbce63a89 1309 * @retval None
elmot 1:d0dfbce63a89 1310 */
elmot 1:d0dfbce63a89 1311 __STATIC_INLINE void LL_SPI_SetDMAParity_TX(SPI_TypeDef *SPIx, uint32_t Parity)
elmot 1:d0dfbce63a89 1312 {
elmot 1:d0dfbce63a89 1313 MODIFY_REG(SPIx->CR2, SPI_CR2_LDMATX, (Parity << POSITION_VAL(SPI_CR2_LDMATX)));
elmot 1:d0dfbce63a89 1314 }
elmot 1:d0dfbce63a89 1315
elmot 1:d0dfbce63a89 1316 /**
elmot 1:d0dfbce63a89 1317 * @brief Get parity configuration for Last DMA transmission
elmot 1:d0dfbce63a89 1318 * @rmtoll CR2 LDMATX LL_SPI_GetDMAParity_TX
elmot 1:d0dfbce63a89 1319 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1320 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 1321 * @arg @ref LL_SPI_DMA_PARITY_ODD
elmot 1:d0dfbce63a89 1322 * @arg @ref LL_SPI_DMA_PARITY_EVEN
elmot 1:d0dfbce63a89 1323 */
elmot 1:d0dfbce63a89 1324 __STATIC_INLINE uint32_t LL_SPI_GetDMAParity_TX(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1325 {
elmot 1:d0dfbce63a89 1326 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_LDMATX) >> POSITION_VAL(SPI_CR2_LDMATX));
elmot 1:d0dfbce63a89 1327 }
elmot 1:d0dfbce63a89 1328
elmot 1:d0dfbce63a89 1329 /**
elmot 1:d0dfbce63a89 1330 * @brief Get the data register address used for DMA transfer
elmot 1:d0dfbce63a89 1331 * @rmtoll DR DR LL_SPI_DMA_GetRegAddr
elmot 1:d0dfbce63a89 1332 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1333 * @retval Address of data register
elmot 1:d0dfbce63a89 1334 */
elmot 1:d0dfbce63a89 1335 __STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1336 {
elmot 1:d0dfbce63a89 1337 return (uint32_t) & (SPIx->DR);
elmot 1:d0dfbce63a89 1338 }
elmot 1:d0dfbce63a89 1339
elmot 1:d0dfbce63a89 1340 /**
elmot 1:d0dfbce63a89 1341 * @}
elmot 1:d0dfbce63a89 1342 */
elmot 1:d0dfbce63a89 1343
elmot 1:d0dfbce63a89 1344 /** @defgroup SPI_LL_EF_DATA_Management DATA Management
elmot 1:d0dfbce63a89 1345 * @{
elmot 1:d0dfbce63a89 1346 */
elmot 1:d0dfbce63a89 1347
elmot 1:d0dfbce63a89 1348 /**
elmot 1:d0dfbce63a89 1349 * @brief Read 8-Bits in the data register
elmot 1:d0dfbce63a89 1350 * @rmtoll DR DR LL_SPI_ReceiveData8
elmot 1:d0dfbce63a89 1351 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1352 * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFF
elmot 1:d0dfbce63a89 1353 */
elmot 1:d0dfbce63a89 1354 __STATIC_INLINE uint8_t LL_SPI_ReceiveData8(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1355 {
elmot 1:d0dfbce63a89 1356 return (uint8_t)(READ_REG(SPIx->DR));
elmot 1:d0dfbce63a89 1357 }
elmot 1:d0dfbce63a89 1358
elmot 1:d0dfbce63a89 1359 /**
elmot 1:d0dfbce63a89 1360 * @brief Read 16-Bits in the data register
elmot 1:d0dfbce63a89 1361 * @rmtoll DR DR LL_SPI_ReceiveData16
elmot 1:d0dfbce63a89 1362 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1363 * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFFFF
elmot 1:d0dfbce63a89 1364 */
elmot 1:d0dfbce63a89 1365 __STATIC_INLINE uint16_t LL_SPI_ReceiveData16(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 1366 {
elmot 1:d0dfbce63a89 1367 return (uint16_t)(READ_REG(SPIx->DR));
elmot 1:d0dfbce63a89 1368 }
elmot 1:d0dfbce63a89 1369
elmot 1:d0dfbce63a89 1370 /**
elmot 1:d0dfbce63a89 1371 * @brief Write 8-Bits in the data register
elmot 1:d0dfbce63a89 1372 * @rmtoll DR DR LL_SPI_TransmitData8
elmot 1:d0dfbce63a89 1373 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1374 * @param TxData Value between Min_Data=0x00 and Max_Data=0xFF
elmot 1:d0dfbce63a89 1375 * @retval None
elmot 1:d0dfbce63a89 1376 */
elmot 1:d0dfbce63a89 1377 __STATIC_INLINE void LL_SPI_TransmitData8(SPI_TypeDef *SPIx, uint8_t TxData)
elmot 1:d0dfbce63a89 1378 {
elmot 1:d0dfbce63a89 1379 *((__IO uint8_t *)&SPIx->DR) = TxData;
elmot 1:d0dfbce63a89 1380 }
elmot 1:d0dfbce63a89 1381
elmot 1:d0dfbce63a89 1382 /**
elmot 1:d0dfbce63a89 1383 * @brief Write 16-Bits in the data register
elmot 1:d0dfbce63a89 1384 * @rmtoll DR DR LL_SPI_TransmitData16
elmot 1:d0dfbce63a89 1385 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 1386 * @param TxData Value between Min_Data=0x00 and Max_Data=0xFFFF
elmot 1:d0dfbce63a89 1387 * @retval None
elmot 1:d0dfbce63a89 1388 */
elmot 1:d0dfbce63a89 1389 __STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData)
elmot 1:d0dfbce63a89 1390 {
elmot 1:d0dfbce63a89 1391 *((__IO uint16_t *)&SPIx->DR) = TxData;
elmot 1:d0dfbce63a89 1392 }
elmot 1:d0dfbce63a89 1393
elmot 1:d0dfbce63a89 1394 /**
elmot 1:d0dfbce63a89 1395 * @}
elmot 1:d0dfbce63a89 1396 */
elmot 1:d0dfbce63a89 1397 #if defined(USE_FULL_LL_DRIVER)
elmot 1:d0dfbce63a89 1398 /** @defgroup SPI_LL_EF_Init Initialization and de-initialization functions
elmot 1:d0dfbce63a89 1399 * @{
elmot 1:d0dfbce63a89 1400 */
elmot 1:d0dfbce63a89 1401
elmot 1:d0dfbce63a89 1402 ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx);
elmot 1:d0dfbce63a89 1403 ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct);
elmot 1:d0dfbce63a89 1404 void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct);
elmot 1:d0dfbce63a89 1405
elmot 1:d0dfbce63a89 1406 /**
elmot 1:d0dfbce63a89 1407 * @}
elmot 1:d0dfbce63a89 1408 */
elmot 1:d0dfbce63a89 1409 #endif /* USE_FULL_LL_DRIVER */
elmot 1:d0dfbce63a89 1410 /**
elmot 1:d0dfbce63a89 1411 * @}
elmot 1:d0dfbce63a89 1412 */
elmot 1:d0dfbce63a89 1413
elmot 1:d0dfbce63a89 1414 /**
elmot 1:d0dfbce63a89 1415 * @}
elmot 1:d0dfbce63a89 1416 */
elmot 1:d0dfbce63a89 1417
elmot 1:d0dfbce63a89 1418 #endif /* defined (SPI1) || defined (SPI2) || defined (SPI3) */
elmot 1:d0dfbce63a89 1419
elmot 1:d0dfbce63a89 1420 /**
elmot 1:d0dfbce63a89 1421 * @}
elmot 1:d0dfbce63a89 1422 */
elmot 1:d0dfbce63a89 1423
elmot 1:d0dfbce63a89 1424 #ifdef __cplusplus
elmot 1:d0dfbce63a89 1425 }
elmot 1:d0dfbce63a89 1426 #endif
elmot 1:d0dfbce63a89 1427
elmot 1:d0dfbce63a89 1428 #endif /* __STM32L4xx_LL_SPI_H */
elmot 1:d0dfbce63a89 1429
elmot 1:d0dfbce63a89 1430 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/