TUKS MCU Introductory course / TUKS-COURSE-TIMER
Committer:
elmot
Date:
Fri Feb 24 21:13:56 2017 +0000
Revision:
1:d0dfbce63a89
Ready-to-copy

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elmot 1:d0dfbce63a89 1 /**
elmot 1:d0dfbce63a89 2 ******************************************************************************
elmot 1:d0dfbce63a89 3 * @file stm32l4xx_ll_spi.c
elmot 1:d0dfbce63a89 4 * @author MCD Application Team
elmot 1:d0dfbce63a89 5 * @version V1.5.1
elmot 1:d0dfbce63a89 6 * @date 31-May-2016
elmot 1:d0dfbce63a89 7 * @brief SPI LL module driver.
elmot 1:d0dfbce63a89 8 ******************************************************************************
elmot 1:d0dfbce63a89 9 * @attention
elmot 1:d0dfbce63a89 10 *
elmot 1:d0dfbce63a89 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot 1:d0dfbce63a89 12 *
elmot 1:d0dfbce63a89 13 * Redistribution and use in source and binary forms, with or without modification,
elmot 1:d0dfbce63a89 14 * are permitted provided that the following conditions are met:
elmot 1:d0dfbce63a89 15 * 1. Redistributions of source code must retain the above copyright notice,
elmot 1:d0dfbce63a89 16 * this list of conditions and the following disclaimer.
elmot 1:d0dfbce63a89 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
elmot 1:d0dfbce63a89 18 * this list of conditions and the following disclaimer in the documentation
elmot 1:d0dfbce63a89 19 * and/or other materials provided with the distribution.
elmot 1:d0dfbce63a89 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot 1:d0dfbce63a89 21 * may be used to endorse or promote products derived from this software
elmot 1:d0dfbce63a89 22 * without specific prior written permission.
elmot 1:d0dfbce63a89 23 *
elmot 1:d0dfbce63a89 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot 1:d0dfbce63a89 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot 1:d0dfbce63a89 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot 1:d0dfbce63a89 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot 1:d0dfbce63a89 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot 1:d0dfbce63a89 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot 1:d0dfbce63a89 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot 1:d0dfbce63a89 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot 1:d0dfbce63a89 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot 1:d0dfbce63a89 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot 1:d0dfbce63a89 34 *
elmot 1:d0dfbce63a89 35 ******************************************************************************
elmot 1:d0dfbce63a89 36 */
elmot 1:d0dfbce63a89 37 #if defined(USE_FULL_LL_DRIVER)
elmot 1:d0dfbce63a89 38
elmot 1:d0dfbce63a89 39 /* Includes ------------------------------------------------------------------*/
elmot 1:d0dfbce63a89 40 #include "stm32l4xx_ll_spi.h"
elmot 1:d0dfbce63a89 41 #include "stm32l4xx_ll_bus.h"
elmot 1:d0dfbce63a89 42
elmot 1:d0dfbce63a89 43 #ifdef USE_FULL_ASSERT
elmot 1:d0dfbce63a89 44 #include "stm32_assert.h"
elmot 1:d0dfbce63a89 45 #else
elmot 1:d0dfbce63a89 46 #define assert_param(expr) ((void)0U)
elmot 1:d0dfbce63a89 47 #endif
elmot 1:d0dfbce63a89 48
elmot 1:d0dfbce63a89 49 /** @addtogroup STM32L4xx_LL_Driver
elmot 1:d0dfbce63a89 50 * @{
elmot 1:d0dfbce63a89 51 */
elmot 1:d0dfbce63a89 52
elmot 1:d0dfbce63a89 53 #if defined (SPI1) || defined (SPI2) || defined (SPI3)
elmot 1:d0dfbce63a89 54
elmot 1:d0dfbce63a89 55 /** @addtogroup SPI_LL
elmot 1:d0dfbce63a89 56 * @{
elmot 1:d0dfbce63a89 57 */
elmot 1:d0dfbce63a89 58
elmot 1:d0dfbce63a89 59 /* Private types -------------------------------------------------------------*/
elmot 1:d0dfbce63a89 60 /* Private variables ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 61
elmot 1:d0dfbce63a89 62 /* Private constants ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 63 /** @defgroup SPI_LL_Private_Constants SPI Private Constants
elmot 1:d0dfbce63a89 64 * @{
elmot 1:d0dfbce63a89 65 */
elmot 1:d0dfbce63a89 66 /* SPI registers Masks */
elmot 1:d0dfbce63a89 67 #define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \
elmot 1:d0dfbce63a89 68 SPI_CR1_BR | SPI_CR1_LSBFIRST | SPI_CR1_SSI | \
elmot 1:d0dfbce63a89 69 SPI_CR1_SSM | SPI_CR1_RXONLY | SPI_CR1_CRCL | \
elmot 1:d0dfbce63a89 70 SPI_CR1_CRCNEXT | SPI_CR1_CRCEN | SPI_CR1_BIDIOE | \
elmot 1:d0dfbce63a89 71 SPI_CR1_BIDIMODE)
elmot 1:d0dfbce63a89 72 /**
elmot 1:d0dfbce63a89 73 * @}
elmot 1:d0dfbce63a89 74 */
elmot 1:d0dfbce63a89 75
elmot 1:d0dfbce63a89 76 /* Private macros ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 77 /** @defgroup SPI_LL_Private_Macros SPI Private Macros
elmot 1:d0dfbce63a89 78 * @{
elmot 1:d0dfbce63a89 79 */
elmot 1:d0dfbce63a89 80 #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \
elmot 1:d0dfbce63a89 81 || ((__VALUE__) == LL_SPI_SIMPLEX_RX) \
elmot 1:d0dfbce63a89 82 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \
elmot 1:d0dfbce63a89 83 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX))
elmot 1:d0dfbce63a89 84
elmot 1:d0dfbce63a89 85 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \
elmot 1:d0dfbce63a89 86 || ((__VALUE__) == LL_SPI_MODE_SLAVE))
elmot 1:d0dfbce63a89 87
elmot 1:d0dfbce63a89 88 #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_4BIT) \
elmot 1:d0dfbce63a89 89 || ((__VALUE__) == LL_SPI_DATAWIDTH_5BIT) \
elmot 1:d0dfbce63a89 90 || ((__VALUE__) == LL_SPI_DATAWIDTH_6BIT) \
elmot 1:d0dfbce63a89 91 || ((__VALUE__) == LL_SPI_DATAWIDTH_7BIT) \
elmot 1:d0dfbce63a89 92 || ((__VALUE__) == LL_SPI_DATAWIDTH_8BIT) \
elmot 1:d0dfbce63a89 93 || ((__VALUE__) == LL_SPI_DATAWIDTH_9BIT) \
elmot 1:d0dfbce63a89 94 || ((__VALUE__) == LL_SPI_DATAWIDTH_10BIT) \
elmot 1:d0dfbce63a89 95 || ((__VALUE__) == LL_SPI_DATAWIDTH_11BIT) \
elmot 1:d0dfbce63a89 96 || ((__VALUE__) == LL_SPI_DATAWIDTH_12BIT) \
elmot 1:d0dfbce63a89 97 || ((__VALUE__) == LL_SPI_DATAWIDTH_13BIT) \
elmot 1:d0dfbce63a89 98 || ((__VALUE__) == LL_SPI_DATAWIDTH_14BIT) \
elmot 1:d0dfbce63a89 99 || ((__VALUE__) == LL_SPI_DATAWIDTH_15BIT) \
elmot 1:d0dfbce63a89 100 || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT))
elmot 1:d0dfbce63a89 101
elmot 1:d0dfbce63a89 102 #define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \
elmot 1:d0dfbce63a89 103 || ((__VALUE__) == LL_SPI_POLARITY_HIGH))
elmot 1:d0dfbce63a89 104
elmot 1:d0dfbce63a89 105 #define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \
elmot 1:d0dfbce63a89 106 || ((__VALUE__) == LL_SPI_PHASE_2EDGE))
elmot 1:d0dfbce63a89 107
elmot 1:d0dfbce63a89 108 #define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT) \
elmot 1:d0dfbce63a89 109 || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \
elmot 1:d0dfbce63a89 110 || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT))
elmot 1:d0dfbce63a89 111
elmot 1:d0dfbce63a89 112 #define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2) \
elmot 1:d0dfbce63a89 113 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4) \
elmot 1:d0dfbce63a89 114 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8) \
elmot 1:d0dfbce63a89 115 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16) \
elmot 1:d0dfbce63a89 116 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32) \
elmot 1:d0dfbce63a89 117 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64) \
elmot 1:d0dfbce63a89 118 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \
elmot 1:d0dfbce63a89 119 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256))
elmot 1:d0dfbce63a89 120
elmot 1:d0dfbce63a89 121 #define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \
elmot 1:d0dfbce63a89 122 || ((__VALUE__) == LL_SPI_MSB_FIRST))
elmot 1:d0dfbce63a89 123
elmot 1:d0dfbce63a89 124 #define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \
elmot 1:d0dfbce63a89 125 || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE))
elmot 1:d0dfbce63a89 126
elmot 1:d0dfbce63a89 127 #define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U)
elmot 1:d0dfbce63a89 128
elmot 1:d0dfbce63a89 129 /**
elmot 1:d0dfbce63a89 130 * @}
elmot 1:d0dfbce63a89 131 */
elmot 1:d0dfbce63a89 132
elmot 1:d0dfbce63a89 133 /* Private function prototypes -----------------------------------------------*/
elmot 1:d0dfbce63a89 134
elmot 1:d0dfbce63a89 135 /* Exported functions --------------------------------------------------------*/
elmot 1:d0dfbce63a89 136 /** @addtogroup SPI_LL_Exported_Functions
elmot 1:d0dfbce63a89 137 * @{
elmot 1:d0dfbce63a89 138 */
elmot 1:d0dfbce63a89 139
elmot 1:d0dfbce63a89 140 /** @addtogroup SPI_LL_EF_Init
elmot 1:d0dfbce63a89 141 * @{
elmot 1:d0dfbce63a89 142 */
elmot 1:d0dfbce63a89 143
elmot 1:d0dfbce63a89 144 /**
elmot 1:d0dfbce63a89 145 * @brief De-initialize the SPI registers to their default reset values.
elmot 1:d0dfbce63a89 146 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 147 * @retval An ErrorStatus enumeration value:
elmot 1:d0dfbce63a89 148 * - SUCCESS: SPI registers are de-initialized
elmot 1:d0dfbce63a89 149 * - ERROR: SPI registers are not de-initialized
elmot 1:d0dfbce63a89 150 */
elmot 1:d0dfbce63a89 151 ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx)
elmot 1:d0dfbce63a89 152 {
elmot 1:d0dfbce63a89 153 ErrorStatus status = ERROR;
elmot 1:d0dfbce63a89 154
elmot 1:d0dfbce63a89 155 /* Check the parameters */
elmot 1:d0dfbce63a89 156 assert_param(IS_SPI_ALL_INSTANCE(SPIx));
elmot 1:d0dfbce63a89 157
elmot 1:d0dfbce63a89 158 #if defined(SPI1)
elmot 1:d0dfbce63a89 159 if (SPIx == SPI1)
elmot 1:d0dfbce63a89 160 {
elmot 1:d0dfbce63a89 161 /* Force reset of SPI clock */
elmot 1:d0dfbce63a89 162 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI1);
elmot 1:d0dfbce63a89 163
elmot 1:d0dfbce63a89 164 /* Release reset of SPI clock */
elmot 1:d0dfbce63a89 165 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI1);
elmot 1:d0dfbce63a89 166
elmot 1:d0dfbce63a89 167 status = SUCCESS;
elmot 1:d0dfbce63a89 168 }
elmot 1:d0dfbce63a89 169 #endif /* SPI1 */
elmot 1:d0dfbce63a89 170 #if defined(SPI2)
elmot 1:d0dfbce63a89 171 if (SPIx == SPI2)
elmot 1:d0dfbce63a89 172 {
elmot 1:d0dfbce63a89 173 /* Force reset of SPI clock */
elmot 1:d0dfbce63a89 174 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI2);
elmot 1:d0dfbce63a89 175
elmot 1:d0dfbce63a89 176 /* Release reset of SPI clock */
elmot 1:d0dfbce63a89 177 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI2);
elmot 1:d0dfbce63a89 178
elmot 1:d0dfbce63a89 179 status = SUCCESS;
elmot 1:d0dfbce63a89 180 }
elmot 1:d0dfbce63a89 181 #endif /* SPI2 */
elmot 1:d0dfbce63a89 182 #if defined(SPI3)
elmot 1:d0dfbce63a89 183 if (SPIx == SPI3)
elmot 1:d0dfbce63a89 184 {
elmot 1:d0dfbce63a89 185 /* Force reset of SPI clock */
elmot 1:d0dfbce63a89 186 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI3);
elmot 1:d0dfbce63a89 187
elmot 1:d0dfbce63a89 188 /* Release reset of SPI clock */
elmot 1:d0dfbce63a89 189 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI3);
elmot 1:d0dfbce63a89 190
elmot 1:d0dfbce63a89 191 status = SUCCESS;
elmot 1:d0dfbce63a89 192 }
elmot 1:d0dfbce63a89 193 #endif /* SPI3 */
elmot 1:d0dfbce63a89 194
elmot 1:d0dfbce63a89 195 return status;
elmot 1:d0dfbce63a89 196 }
elmot 1:d0dfbce63a89 197
elmot 1:d0dfbce63a89 198 /**
elmot 1:d0dfbce63a89 199 * @brief Initialize the SPI registers according to the specified parameters in SPI_InitStruct.
elmot 1:d0dfbce63a89 200 * @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
elmot 1:d0dfbce63a89 201 * SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
elmot 1:d0dfbce63a89 202 * @param SPIx SPI Instance
elmot 1:d0dfbce63a89 203 * @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
elmot 1:d0dfbce63a89 204 * @retval An ErrorStatus enumeration value. (Return always SUCCESS)
elmot 1:d0dfbce63a89 205 */
elmot 1:d0dfbce63a89 206 ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct)
elmot 1:d0dfbce63a89 207 {
elmot 1:d0dfbce63a89 208 ErrorStatus status = ERROR;
elmot 1:d0dfbce63a89 209
elmot 1:d0dfbce63a89 210 /* Check the SPI Instance SPIx*/
elmot 1:d0dfbce63a89 211 assert_param(IS_SPI_ALL_INSTANCE(SPIx));
elmot 1:d0dfbce63a89 212
elmot 1:d0dfbce63a89 213 /* Check the SPI parameters from SPI_InitStruct*/
elmot 1:d0dfbce63a89 214 assert_param(IS_LL_SPI_TRANSFER_DIRECTION(SPI_InitStruct->TransferDirection));
elmot 1:d0dfbce63a89 215 assert_param(IS_LL_SPI_MODE(SPI_InitStruct->Mode));
elmot 1:d0dfbce63a89 216 assert_param(IS_LL_SPI_DATAWIDTH(SPI_InitStruct->DataWidth));
elmot 1:d0dfbce63a89 217 assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity));
elmot 1:d0dfbce63a89 218 assert_param(IS_LL_SPI_PHASE(SPI_InitStruct->ClockPhase));
elmot 1:d0dfbce63a89 219 assert_param(IS_LL_SPI_NSS(SPI_InitStruct->NSS));
elmot 1:d0dfbce63a89 220 assert_param(IS_LL_SPI_BAUDRATE(SPI_InitStruct->BaudRate));
elmot 1:d0dfbce63a89 221 assert_param(IS_LL_SPI_BITORDER(SPI_InitStruct->BitOrder));
elmot 1:d0dfbce63a89 222 assert_param(IS_LL_SPI_CRCCALCULATION(SPI_InitStruct->CRCCalculation));
elmot 1:d0dfbce63a89 223
elmot 1:d0dfbce63a89 224 if (LL_SPI_IsEnabled(SPIx) == 0x00000000U)
elmot 1:d0dfbce63a89 225 {
elmot 1:d0dfbce63a89 226 /*---------------------------- SPIx CR1 Configuration ------------------------
elmot 1:d0dfbce63a89 227 * Configure SPIx CR1 with parameters:
elmot 1:d0dfbce63a89 228 * - TransferDirection: SPI_CR1_BIDIMODE, SPI_CR1_BIDIOE and SPI_CR1_RXONLY bits
elmot 1:d0dfbce63a89 229 * - Master/Slave Mode: SPI_CR1_MSTR bit
elmot 1:d0dfbce63a89 230 * - ClockPolarity: SPI_CR1_CPOL bit
elmot 1:d0dfbce63a89 231 * - ClockPhase: SPI_CR1_CPHA bit
elmot 1:d0dfbce63a89 232 * - NSS management: SPI_CR1_SSM bit
elmot 1:d0dfbce63a89 233 * - BaudRate prescaler: SPI_CR1_BR[2:0] bits
elmot 1:d0dfbce63a89 234 * - BitOrder: SPI_CR1_LSBFIRST bit
elmot 1:d0dfbce63a89 235 * - CRCCalculation: SPI_CR1_CRCEN bit
elmot 1:d0dfbce63a89 236 */
elmot 1:d0dfbce63a89 237 MODIFY_REG(SPIx->CR1,
elmot 1:d0dfbce63a89 238 SPI_CR1_CLEAR_MASK,
elmot 1:d0dfbce63a89 239 SPI_InitStruct->TransferDirection | SPI_InitStruct->Mode |
elmot 1:d0dfbce63a89 240 SPI_InitStruct->ClockPolarity | SPI_InitStruct->ClockPhase |
elmot 1:d0dfbce63a89 241 SPI_InitStruct->NSS | SPI_InitStruct->BaudRate |
elmot 1:d0dfbce63a89 242 SPI_InitStruct->BitOrder | SPI_InitStruct->CRCCalculation);
elmot 1:d0dfbce63a89 243
elmot 1:d0dfbce63a89 244 /*---------------------------- SPIx CR2 Configuration ------------------------
elmot 1:d0dfbce63a89 245 * Configure SPIx CR2 with parameters:
elmot 1:d0dfbce63a89 246 * - DataWidth: DS[3:0] bits
elmot 1:d0dfbce63a89 247 * - NSS management: SSOE bit
elmot 1:d0dfbce63a89 248 */
elmot 1:d0dfbce63a89 249 MODIFY_REG(SPIx->CR2,
elmot 1:d0dfbce63a89 250 SPI_CR2_DS | SPI_CR2_SSOE,
elmot 1:d0dfbce63a89 251 SPI_InitStruct->DataWidth | (SPI_InitStruct->NSS >> 16U));
elmot 1:d0dfbce63a89 252
elmot 1:d0dfbce63a89 253 /*---------------------------- SPIx CRCPR Configuration ----------------------
elmot 1:d0dfbce63a89 254 * Configure SPIx CRCPR with parameters:
elmot 1:d0dfbce63a89 255 * - CRCPoly: CRCPOLY[15:0] bits
elmot 1:d0dfbce63a89 256 */
elmot 1:d0dfbce63a89 257 if (SPI_InitStruct->CRCCalculation == LL_SPI_CRCCALCULATION_ENABLE)
elmot 1:d0dfbce63a89 258 {
elmot 1:d0dfbce63a89 259 assert_param(IS_LL_SPI_CRC_POLYNOMIAL(SPI_InitStruct->CRCPoly));
elmot 1:d0dfbce63a89 260 LL_SPI_SetCRCPolynomial(SPIx, SPI_InitStruct->CRCPoly);
elmot 1:d0dfbce63a89 261 }
elmot 1:d0dfbce63a89 262 status = SUCCESS;
elmot 1:d0dfbce63a89 263 }
elmot 1:d0dfbce63a89 264
elmot 1:d0dfbce63a89 265 return status;
elmot 1:d0dfbce63a89 266 }
elmot 1:d0dfbce63a89 267
elmot 1:d0dfbce63a89 268 /**
elmot 1:d0dfbce63a89 269 * @brief Set each @ref LL_SPI_InitTypeDef field to default value.
elmot 1:d0dfbce63a89 270 * @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
elmot 1:d0dfbce63a89 271 * whose fields will be set to default values.
elmot 1:d0dfbce63a89 272 * @retval None
elmot 1:d0dfbce63a89 273 */
elmot 1:d0dfbce63a89 274 void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct)
elmot 1:d0dfbce63a89 275 {
elmot 1:d0dfbce63a89 276 /* Set SPI_InitStruct fields to default values */
elmot 1:d0dfbce63a89 277 SPI_InitStruct->TransferDirection = LL_SPI_FULL_DUPLEX;
elmot 1:d0dfbce63a89 278 SPI_InitStruct->Mode = LL_SPI_MODE_SLAVE;
elmot 1:d0dfbce63a89 279 SPI_InitStruct->DataWidth = LL_SPI_DATAWIDTH_8BIT;
elmot 1:d0dfbce63a89 280 SPI_InitStruct->ClockPolarity = LL_SPI_POLARITY_LOW;
elmot 1:d0dfbce63a89 281 SPI_InitStruct->ClockPhase = LL_SPI_PHASE_1EDGE;
elmot 1:d0dfbce63a89 282 SPI_InitStruct->NSS = LL_SPI_NSS_HARD_INPUT;
elmot 1:d0dfbce63a89 283 SPI_InitStruct->BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2;
elmot 1:d0dfbce63a89 284 SPI_InitStruct->BitOrder = LL_SPI_MSB_FIRST;
elmot 1:d0dfbce63a89 285 SPI_InitStruct->CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
elmot 1:d0dfbce63a89 286 SPI_InitStruct->CRCPoly = 7U;
elmot 1:d0dfbce63a89 287 }
elmot 1:d0dfbce63a89 288
elmot 1:d0dfbce63a89 289 /**
elmot 1:d0dfbce63a89 290 * @}
elmot 1:d0dfbce63a89 291 */
elmot 1:d0dfbce63a89 292
elmot 1:d0dfbce63a89 293 /**
elmot 1:d0dfbce63a89 294 * @}
elmot 1:d0dfbce63a89 295 */
elmot 1:d0dfbce63a89 296
elmot 1:d0dfbce63a89 297 /**
elmot 1:d0dfbce63a89 298 * @}
elmot 1:d0dfbce63a89 299 */
elmot 1:d0dfbce63a89 300
elmot 1:d0dfbce63a89 301 #endif /* defined (SPI1) || defined (SPI2) || defined (SPI3) */
elmot 1:d0dfbce63a89 302
elmot 1:d0dfbce63a89 303 /**
elmot 1:d0dfbce63a89 304 * @}
elmot 1:d0dfbce63a89 305 */
elmot 1:d0dfbce63a89 306
elmot 1:d0dfbce63a89 307 #endif /* USE_FULL_LL_DRIVER */
elmot 1:d0dfbce63a89 308
elmot 1:d0dfbce63a89 309 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/