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HAL_L476/stm32l4xx_ll_lpuart.h@1:d0dfbce63a89, 2017-02-24 (annotated)

Committer:
elmot
Date:
Fri Feb 24 21:13:56 2017 +0000
Revision:
1:d0dfbce63a89
Ready-to-copy

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elmot 1:d0dfbce63a89 1 /**
elmot 1:d0dfbce63a89 2 ******************************************************************************
elmot 1:d0dfbce63a89 3 * @file stm32l4xx_ll_lpuart.h
elmot 1:d0dfbce63a89 4 * @author MCD Application Team
elmot 1:d0dfbce63a89 5 * @version V1.5.1
elmot 1:d0dfbce63a89 6 * @date 31-May-2016
elmot 1:d0dfbce63a89 7 * @brief Header file of LPUART LL module.
elmot 1:d0dfbce63a89 8 ******************************************************************************
elmot 1:d0dfbce63a89 9 * @attention
elmot 1:d0dfbce63a89 10 *
elmot 1:d0dfbce63a89 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot 1:d0dfbce63a89 12 *
elmot 1:d0dfbce63a89 13 * Redistribution and use in source and binary forms, with or without modification,
elmot 1:d0dfbce63a89 14 * are permitted provided that the following conditions are met:
elmot 1:d0dfbce63a89 15 * 1. Redistributions of source code must retain the above copyright notice,
elmot 1:d0dfbce63a89 16 * this list of conditions and the following disclaimer.
elmot 1:d0dfbce63a89 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
elmot 1:d0dfbce63a89 18 * this list of conditions and the following disclaimer in the documentation
elmot 1:d0dfbce63a89 19 * and/or other materials provided with the distribution.
elmot 1:d0dfbce63a89 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot 1:d0dfbce63a89 21 * may be used to endorse or promote products derived from this software
elmot 1:d0dfbce63a89 22 * without specific prior written permission.
elmot 1:d0dfbce63a89 23 *
elmot 1:d0dfbce63a89 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot 1:d0dfbce63a89 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot 1:d0dfbce63a89 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot 1:d0dfbce63a89 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot 1:d0dfbce63a89 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot 1:d0dfbce63a89 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot 1:d0dfbce63a89 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot 1:d0dfbce63a89 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot 1:d0dfbce63a89 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot 1:d0dfbce63a89 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot 1:d0dfbce63a89 34 *
elmot 1:d0dfbce63a89 35 ******************************************************************************
elmot 1:d0dfbce63a89 36 */
elmot 1:d0dfbce63a89 37
elmot 1:d0dfbce63a89 38 /* Define to prevent recursive inclusion -------------------------------------*/
elmot 1:d0dfbce63a89 39 #ifndef __STM32L4xx_LL_LPUART_H
elmot 1:d0dfbce63a89 40 #define __STM32L4xx_LL_LPUART_H
elmot 1:d0dfbce63a89 41
elmot 1:d0dfbce63a89 42 #ifdef __cplusplus
elmot 1:d0dfbce63a89 43 extern "C" {
elmot 1:d0dfbce63a89 44 #endif
elmot 1:d0dfbce63a89 45
elmot 1:d0dfbce63a89 46 /* Includes ------------------------------------------------------------------*/
elmot 1:d0dfbce63a89 47 #include "stm32l4xx.h"
elmot 1:d0dfbce63a89 48
elmot 1:d0dfbce63a89 49 /** @addtogroup STM32L4xx_LL_Driver
elmot 1:d0dfbce63a89 50 * @{
elmot 1:d0dfbce63a89 51 */
elmot 1:d0dfbce63a89 52
elmot 1:d0dfbce63a89 53 #if defined (LPUART1)
elmot 1:d0dfbce63a89 54
elmot 1:d0dfbce63a89 55 /** @defgroup LPUART_LL LPUART
elmot 1:d0dfbce63a89 56 * @{
elmot 1:d0dfbce63a89 57 */
elmot 1:d0dfbce63a89 58
elmot 1:d0dfbce63a89 59 /* Private types -------------------------------------------------------------*/
elmot 1:d0dfbce63a89 60 /* Private variables ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 61
elmot 1:d0dfbce63a89 62 /* Private constants ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 63 /** @defgroup LPUART_LL_Private_Constants LPUART Private Constants
elmot 1:d0dfbce63a89 64 * @{
elmot 1:d0dfbce63a89 65 */
elmot 1:d0dfbce63a89 66
elmot 1:d0dfbce63a89 67 /* Defines used for the bit position in the register and perform offsets*/
elmot 1:d0dfbce63a89 68 #define LPUART_POSITION_CR1_DEDT (uint32_t)POSITION_VAL(USART_CR1_DEDT)
elmot 1:d0dfbce63a89 69 #define LPUART_POSITION_CR1_DEAT (uint32_t)POSITION_VAL(USART_CR1_DEAT)
elmot 1:d0dfbce63a89 70 #define LPUART_POSITION_CR2_ADD (uint32_t)POSITION_VAL(USART_CR2_ADD)
elmot 1:d0dfbce63a89 71
elmot 1:d0dfbce63a89 72 /* Defines used in Baud Rate related macros and corresponding register setting computation */
elmot 1:d0dfbce63a89 73 #define LPUART_LPUARTDIV_FREQ_MUL (uint32_t)(256U)
elmot 1:d0dfbce63a89 74 #define LPUART_BRR_MASK (uint32_t)(0x000FFFFFU)
elmot 1:d0dfbce63a89 75 #define LPUART_BRR_MIN_VALUE (uint32_t)(0x00000300U)
elmot 1:d0dfbce63a89 76 /**
elmot 1:d0dfbce63a89 77 * @}
elmot 1:d0dfbce63a89 78 */
elmot 1:d0dfbce63a89 79
elmot 1:d0dfbce63a89 80
elmot 1:d0dfbce63a89 81 /* Private macros ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 82 #if defined(USE_FULL_LL_DRIVER)
elmot 1:d0dfbce63a89 83 /** @defgroup LPUART_LL_Private_Macros LPUART Private Macros
elmot 1:d0dfbce63a89 84 * @{
elmot 1:d0dfbce63a89 85 */
elmot 1:d0dfbce63a89 86 /**
elmot 1:d0dfbce63a89 87 * @}
elmot 1:d0dfbce63a89 88 */
elmot 1:d0dfbce63a89 89 #endif /*USE_FULL_LL_DRIVER*/
elmot 1:d0dfbce63a89 90
elmot 1:d0dfbce63a89 91 /* Exported types ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 92 #if defined(USE_FULL_LL_DRIVER)
elmot 1:d0dfbce63a89 93 /** @defgroup LPUART_LL_ES_INIT LPUART Exported Init structures
elmot 1:d0dfbce63a89 94 * @{
elmot 1:d0dfbce63a89 95 */
elmot 1:d0dfbce63a89 96
elmot 1:d0dfbce63a89 97 /**
elmot 1:d0dfbce63a89 98 * @brief LL LPUART Init Structure definition
elmot 1:d0dfbce63a89 99 */
elmot 1:d0dfbce63a89 100 typedef struct
elmot 1:d0dfbce63a89 101 {
elmot 1:d0dfbce63a89 102 uint32_t BaudRate; /*!< This field defines expected LPUART communication baud rate.
elmot 1:d0dfbce63a89 103
elmot 1:d0dfbce63a89 104 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetBaudRate().*/
elmot 1:d0dfbce63a89 105
elmot 1:d0dfbce63a89 106 uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame.
elmot 1:d0dfbce63a89 107 This parameter can be a value of @ref LPUART_LL_EC_DATAWIDTH.
elmot 1:d0dfbce63a89 108
elmot 1:d0dfbce63a89 109 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetDataWidth().*/
elmot 1:d0dfbce63a89 110
elmot 1:d0dfbce63a89 111 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
elmot 1:d0dfbce63a89 112 This parameter can be a value of @ref LPUART_LL_EC_STOPBITS.
elmot 1:d0dfbce63a89 113
elmot 1:d0dfbce63a89 114 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetStopBitsLength().*/
elmot 1:d0dfbce63a89 115
elmot 1:d0dfbce63a89 116 uint32_t Parity; /*!< Specifies the parity mode.
elmot 1:d0dfbce63a89 117 This parameter can be a value of @ref LPUART_LL_EC_PARITY.
elmot 1:d0dfbce63a89 118
elmot 1:d0dfbce63a89 119 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetParity().*/
elmot 1:d0dfbce63a89 120
elmot 1:d0dfbce63a89 121 uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
elmot 1:d0dfbce63a89 122 This parameter can be a value of @ref LPUART_LL_EC_DIRECTION.
elmot 1:d0dfbce63a89 123
elmot 1:d0dfbce63a89 124 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetTransferDirection().*/
elmot 1:d0dfbce63a89 125
elmot 1:d0dfbce63a89 126 uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
elmot 1:d0dfbce63a89 127 This parameter can be a value of @ref LPUART_LL_EC_HWCONTROL.
elmot 1:d0dfbce63a89 128
elmot 1:d0dfbce63a89 129 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetHWFlowCtrl().*/
elmot 1:d0dfbce63a89 130
elmot 1:d0dfbce63a89 131 } LL_LPUART_InitTypeDef;
elmot 1:d0dfbce63a89 132
elmot 1:d0dfbce63a89 133 /**
elmot 1:d0dfbce63a89 134 * @}
elmot 1:d0dfbce63a89 135 */
elmot 1:d0dfbce63a89 136 #endif /* USE_FULL_LL_DRIVER */
elmot 1:d0dfbce63a89 137
elmot 1:d0dfbce63a89 138 /* Exported constants --------------------------------------------------------*/
elmot 1:d0dfbce63a89 139 /** @defgroup LPUART_LL_Exported_Constants LPUART Exported Constants
elmot 1:d0dfbce63a89 140 * @{
elmot 1:d0dfbce63a89 141 */
elmot 1:d0dfbce63a89 142
elmot 1:d0dfbce63a89 143 /** @defgroup LPUART_LL_EC_CLEAR_FLAG Clear Flags Defines
elmot 1:d0dfbce63a89 144 * @brief Flags defines which can be used with LL_LPUART_WriteReg function
elmot 1:d0dfbce63a89 145 * @{
elmot 1:d0dfbce63a89 146 */
elmot 1:d0dfbce63a89 147 #define LL_LPUART_ICR_PECF USART_ICR_PECF /*!< Parity error flag */
elmot 1:d0dfbce63a89 148 #define LL_LPUART_ICR_FECF USART_ICR_FECF /*!< Framing error flag */
elmot 1:d0dfbce63a89 149 #define LL_LPUART_ICR_NCF USART_ICR_NCF /*!< Noise detected flag */
elmot 1:d0dfbce63a89 150 #define LL_LPUART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error flag */
elmot 1:d0dfbce63a89 151 #define LL_LPUART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected flag */
elmot 1:d0dfbce63a89 152 #define LL_LPUART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete flag */
elmot 1:d0dfbce63a89 153 #define LL_LPUART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS flag */
elmot 1:d0dfbce63a89 154 #define LL_LPUART_ICR_CMCF USART_ICR_CMCF /*!< Character match flag */
elmot 1:d0dfbce63a89 155 #define LL_LPUART_ICR_WUCF USART_ICR_WUCF /*!< Wakeup from Stop mode flag */
elmot 1:d0dfbce63a89 156 /**
elmot 1:d0dfbce63a89 157 * @}
elmot 1:d0dfbce63a89 158 */
elmot 1:d0dfbce63a89 159
elmot 1:d0dfbce63a89 160 /** @defgroup LPUART_LL_EC_GET_FLAG Get Flags Defines
elmot 1:d0dfbce63a89 161 * @brief Flags defines which can be used with LL_LPUART_ReadReg function
elmot 1:d0dfbce63a89 162 * @{
elmot 1:d0dfbce63a89 163 */
elmot 1:d0dfbce63a89 164 #define LL_LPUART_ISR_PE USART_ISR_PE /*!< Parity error flag */
elmot 1:d0dfbce63a89 165 #define LL_LPUART_ISR_FE USART_ISR_FE /*!< Framing error flag */
elmot 1:d0dfbce63a89 166 #define LL_LPUART_ISR_NE USART_ISR_NE /*!< Noise detected flag */
elmot 1:d0dfbce63a89 167 #define LL_LPUART_ISR_ORE USART_ISR_ORE /*!< Overrun error flag */
elmot 1:d0dfbce63a89 168 #define LL_LPUART_ISR_IDLE USART_ISR_IDLE /*!< Idle line detected flag */
elmot 1:d0dfbce63a89 169 #define LL_LPUART_ISR_RXNE USART_ISR_RXNE /*!< Read data register not empty flag */
elmot 1:d0dfbce63a89 170 #define LL_LPUART_ISR_TC USART_ISR_TC /*!< Transmission complete flag */
elmot 1:d0dfbce63a89 171 #define LL_LPUART_ISR_TXE USART_ISR_TXE /*!< Transmit data register empty flag */
elmot 1:d0dfbce63a89 172 #define LL_LPUART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt flag */
elmot 1:d0dfbce63a89 173 #define LL_LPUART_ISR_CTS USART_ISR_CTS /*!< CTS flag */
elmot 1:d0dfbce63a89 174 #define LL_LPUART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */
elmot 1:d0dfbce63a89 175 #define LL_LPUART_ISR_CMF USART_ISR_CMF /*!< Character match flag */
elmot 1:d0dfbce63a89 176 #define LL_LPUART_ISR_SBKF USART_ISR_SBKF /*!< Send break flag */
elmot 1:d0dfbce63a89 177 #define LL_LPUART_ISR_RWU USART_ISR_RWU /*!< Receiver wakeup from Mute mode flag */
elmot 1:d0dfbce63a89 178 #define LL_LPUART_ISR_WUF USART_ISR_WUF /*!< Wakeup from Stop mode flag */
elmot 1:d0dfbce63a89 179 #define LL_LPUART_ISR_TEACK USART_ISR_TEACK /*!< Transmit enable acknowledge flag */
elmot 1:d0dfbce63a89 180 #define LL_LPUART_ISR_REACK USART_ISR_REACK /*!< Receive enable acknowledge flag */
elmot 1:d0dfbce63a89 181 /**
elmot 1:d0dfbce63a89 182 * @}
elmot 1:d0dfbce63a89 183 */
elmot 1:d0dfbce63a89 184
elmot 1:d0dfbce63a89 185 /** @defgroup LPUART_LL_EC_IT IT Defines
elmot 1:d0dfbce63a89 186 * @brief IT defines which can be used with LL_LPUART_ReadReg and LL_LPUART_WriteReg functions
elmot 1:d0dfbce63a89 187 * @{
elmot 1:d0dfbce63a89 188 */
elmot 1:d0dfbce63a89 189 #define LL_LPUART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */
elmot 1:d0dfbce63a89 190 #define LL_LPUART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */
elmot 1:d0dfbce63a89 191 #define LL_LPUART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */
elmot 1:d0dfbce63a89 192 #define LL_LPUART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */
elmot 1:d0dfbce63a89 193 #define LL_LPUART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */
elmot 1:d0dfbce63a89 194 #define LL_LPUART_CR1_CMIE USART_CR1_CMIE /*!< Character match interrupt enable */
elmot 1:d0dfbce63a89 195 #define LL_LPUART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */
elmot 1:d0dfbce63a89 196 #define LL_LPUART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */
elmot 1:d0dfbce63a89 197 #define LL_LPUART_CR3_WUFIE USART_CR3_WUFIE /*!< Wakeup from Stop mode interrupt enable */
elmot 1:d0dfbce63a89 198 /**
elmot 1:d0dfbce63a89 199 * @}
elmot 1:d0dfbce63a89 200 */
elmot 1:d0dfbce63a89 201
elmot 1:d0dfbce63a89 202 /** @defgroup LPUART_LL_EC_DIRECTION Direction
elmot 1:d0dfbce63a89 203 * @{
elmot 1:d0dfbce63a89 204 */
elmot 1:d0dfbce63a89 205 #define LL_LPUART_DIRECTION_NONE (uint32_t)0x00000000U /*!< Transmitter and Receiver are disabled */
elmot 1:d0dfbce63a89 206 #define LL_LPUART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */
elmot 1:d0dfbce63a89 207 #define LL_LPUART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */
elmot 1:d0dfbce63a89 208 #define LL_LPUART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */
elmot 1:d0dfbce63a89 209 /**
elmot 1:d0dfbce63a89 210 * @}
elmot 1:d0dfbce63a89 211 */
elmot 1:d0dfbce63a89 212
elmot 1:d0dfbce63a89 213 /** @defgroup LPUART_LL_EC_PARITY Parity Control
elmot 1:d0dfbce63a89 214 * @{
elmot 1:d0dfbce63a89 215 */
elmot 1:d0dfbce63a89 216 #define LL_LPUART_PARITY_NONE (uint32_t)0x00000000U /*!< Parity control disabled */
elmot 1:d0dfbce63a89 217 #define LL_LPUART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */
elmot 1:d0dfbce63a89 218 #define LL_LPUART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */
elmot 1:d0dfbce63a89 219 /**
elmot 1:d0dfbce63a89 220 * @}
elmot 1:d0dfbce63a89 221 */
elmot 1:d0dfbce63a89 222
elmot 1:d0dfbce63a89 223 /** @defgroup LPUART_LL_EC_WAKEUP Wakeup
elmot 1:d0dfbce63a89 224 * @{
elmot 1:d0dfbce63a89 225 */
elmot 1:d0dfbce63a89 226 #define LL_LPUART_WAKEUP_IDLELINE (uint32_t)0x00000000U /*!< LPUART wake up from Mute mode on Idle Line */
elmot 1:d0dfbce63a89 227 #define LL_LPUART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< LPUART wake up from Mute mode on Address Mark */
elmot 1:d0dfbce63a89 228 /**
elmot 1:d0dfbce63a89 229 * @}
elmot 1:d0dfbce63a89 230 */
elmot 1:d0dfbce63a89 231
elmot 1:d0dfbce63a89 232 /** @defgroup LPUART_LL_EC_DATAWIDTH Datawidth
elmot 1:d0dfbce63a89 233 * @{
elmot 1:d0dfbce63a89 234 */
elmot 1:d0dfbce63a89 235 #define LL_LPUART_DATAWIDTH_7B USART_CR1_M1 /*!< 7 bits word length : Start bit, 7 data bits, n stop bits */
elmot 1:d0dfbce63a89 236 #define LL_LPUART_DATAWIDTH_8B (uint32_t)0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
elmot 1:d0dfbce63a89 237 #define LL_LPUART_DATAWIDTH_9B USART_CR1_M0 /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
elmot 1:d0dfbce63a89 238 /**
elmot 1:d0dfbce63a89 239 * @}
elmot 1:d0dfbce63a89 240 */
elmot 1:d0dfbce63a89 241
elmot 1:d0dfbce63a89 242 /** @defgroup LPUART_LL_EC_STOPBITS Stop Bits
elmot 1:d0dfbce63a89 243 * @{
elmot 1:d0dfbce63a89 244 */
elmot 1:d0dfbce63a89 245 #define LL_LPUART_STOPBITS_1 (uint32_t)0x00000000U /*!< 1 stop bit */
elmot 1:d0dfbce63a89 246 #define LL_LPUART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */
elmot 1:d0dfbce63a89 247 /**
elmot 1:d0dfbce63a89 248 * @}
elmot 1:d0dfbce63a89 249 */
elmot 1:d0dfbce63a89 250
elmot 1:d0dfbce63a89 251 /** @defgroup LPUART_LL_EC_TXRX TX RX Pins Swap
elmot 1:d0dfbce63a89 252 * @{
elmot 1:d0dfbce63a89 253 */
elmot 1:d0dfbce63a89 254 #define LL_LPUART_TXRX_STANDARD (uint32_t)0x00000000U /*!< TX/RX pins are used as defined in standard pinout */
elmot 1:d0dfbce63a89 255 #define LL_LPUART_TXRX_SWAPPED (USART_CR2_SWAP) /*!< TX and RX pins functions are swapped. */
elmot 1:d0dfbce63a89 256 /**
elmot 1:d0dfbce63a89 257 * @}
elmot 1:d0dfbce63a89 258 */
elmot 1:d0dfbce63a89 259
elmot 1:d0dfbce63a89 260 /** @defgroup LPUART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion
elmot 1:d0dfbce63a89 261 * @{
elmot 1:d0dfbce63a89 262 */
elmot 1:d0dfbce63a89 263 #define LL_LPUART_RXPIN_LEVEL_STANDARD (uint32_t)0x00000000U /*!< RX pin signal works using the standard logic levels */
elmot 1:d0dfbce63a89 264 #define LL_LPUART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV) /*!< RX pin signal values are inverted. */
elmot 1:d0dfbce63a89 265 /**
elmot 1:d0dfbce63a89 266 * @}
elmot 1:d0dfbce63a89 267 */
elmot 1:d0dfbce63a89 268
elmot 1:d0dfbce63a89 269 /** @defgroup LPUART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion
elmot 1:d0dfbce63a89 270 * @{
elmot 1:d0dfbce63a89 271 */
elmot 1:d0dfbce63a89 272 #define LL_LPUART_TXPIN_LEVEL_STANDARD (uint32_t)0x00000000U /*!< TX pin signal works using the standard logic levels */
elmot 1:d0dfbce63a89 273 #define LL_LPUART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) /*!< TX pin signal values are inverted. */
elmot 1:d0dfbce63a89 274 /**
elmot 1:d0dfbce63a89 275 * @}
elmot 1:d0dfbce63a89 276 */
elmot 1:d0dfbce63a89 277
elmot 1:d0dfbce63a89 278 /** @defgroup LPUART_LL_EC_BINARY_LOGIC Binary Data Inversion
elmot 1:d0dfbce63a89 279 * @{
elmot 1:d0dfbce63a89 280 */
elmot 1:d0dfbce63a89 281 #define LL_LPUART_BINARY_LOGIC_POSITIVE (uint32_t)0x00000000U /*!< Logical data from the data register are send/received in positive/direct logic. (1=H, 0=L) */
elmot 1:d0dfbce63a89 282 #define LL_LPUART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /*!< Logical data from the data register are send/received in negative/inverse logic. (1=L, 0=H). The parity bit is also inverted. */
elmot 1:d0dfbce63a89 283 /**
elmot 1:d0dfbce63a89 284 * @}
elmot 1:d0dfbce63a89 285 */
elmot 1:d0dfbce63a89 286
elmot 1:d0dfbce63a89 287 /** @defgroup LPUART_LL_EC_BITORDER Bit Order
elmot 1:d0dfbce63a89 288 * @{
elmot 1:d0dfbce63a89 289 */
elmot 1:d0dfbce63a89 290 #define LL_LPUART_BITORDER_LSBFIRST (uint32_t)0x00000000U /*!< data is transmitted/received with data bit 0 first, following the start bit */
elmot 1:d0dfbce63a89 291 #define LL_LPUART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmitted/received with the MSB first, following the start bit */
elmot 1:d0dfbce63a89 292 /**
elmot 1:d0dfbce63a89 293 * @}
elmot 1:d0dfbce63a89 294 */
elmot 1:d0dfbce63a89 295
elmot 1:d0dfbce63a89 296 /** @defgroup LPUART_LL_EC_ADDRESS_DETECT Address Length Detection
elmot 1:d0dfbce63a89 297 * @{
elmot 1:d0dfbce63a89 298 */
elmot 1:d0dfbce63a89 299 #define LL_LPUART_ADDRESS_DETECT_4B (uint32_t)0x00000000U /*!< 4-bit address detection method selected */
elmot 1:d0dfbce63a89 300 #define LL_LPUART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit address detection (in 8-bit data mode) method selected */
elmot 1:d0dfbce63a89 301 /**
elmot 1:d0dfbce63a89 302 * @}
elmot 1:d0dfbce63a89 303 */
elmot 1:d0dfbce63a89 304
elmot 1:d0dfbce63a89 305 /** @defgroup LPUART_LL_EC_HWCONTROL Hardware Control
elmot 1:d0dfbce63a89 306 * @{
elmot 1:d0dfbce63a89 307 */
elmot 1:d0dfbce63a89 308 #define LL_LPUART_HWCONTROL_NONE (uint32_t)0x00000000U /*!< CTS and RTS hardware flow control disabled */
elmot 1:d0dfbce63a89 309 #define LL_LPUART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */
elmot 1:d0dfbce63a89 310 #define LL_LPUART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */
elmot 1:d0dfbce63a89 311 #define LL_LPUART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */
elmot 1:d0dfbce63a89 312 /**
elmot 1:d0dfbce63a89 313 * @}
elmot 1:d0dfbce63a89 314 */
elmot 1:d0dfbce63a89 315
elmot 1:d0dfbce63a89 316 /** @defgroup LPUART_LL_EC_WAKEUP_ON Wakeup Activation
elmot 1:d0dfbce63a89 317 * @{
elmot 1:d0dfbce63a89 318 */
elmot 1:d0dfbce63a89 319 #define LL_LPUART_WAKEUP_ON_ADDRESS (uint32_t)0x00000000U /*!< Wake up active on address match */
elmot 1:d0dfbce63a89 320 #define LL_LPUART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< Wake up active on Start bit detection */
elmot 1:d0dfbce63a89 321 #define LL_LPUART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1) /*!< Wake up active on RXNE */
elmot 1:d0dfbce63a89 322 /**
elmot 1:d0dfbce63a89 323 * @}
elmot 1:d0dfbce63a89 324 */
elmot 1:d0dfbce63a89 325
elmot 1:d0dfbce63a89 326 /** @defgroup LPUART_LL_EC_DE_POLARITY Driver Enable Polarity
elmot 1:d0dfbce63a89 327 * @{
elmot 1:d0dfbce63a89 328 */
elmot 1:d0dfbce63a89 329 #define LL_LPUART_DE_POLARITY_HIGH (uint32_t)0x00000000U /*!< DE signal is active high */
elmot 1:d0dfbce63a89 330 #define LL_LPUART_DE_POLARITY_LOW USART_CR3_DEP /*!< DE signal is active low */
elmot 1:d0dfbce63a89 331 /**
elmot 1:d0dfbce63a89 332 * @}
elmot 1:d0dfbce63a89 333 */
elmot 1:d0dfbce63a89 334
elmot 1:d0dfbce63a89 335 /** @defgroup LPUART_LL_EC_DMA_REG_DATA DMA Register Data
elmot 1:d0dfbce63a89 336 * @{
elmot 1:d0dfbce63a89 337 */
elmot 1:d0dfbce63a89 338 #define LL_LPUART_DMA_REG_DATA_TRANSMIT (uint32_t)0U /*!< Get address of data register used for transmission */
elmot 1:d0dfbce63a89 339 #define LL_LPUART_DMA_REG_DATA_RECEIVE (uint32_t)1U /*!< Get address of data register used for reception */
elmot 1:d0dfbce63a89 340 /**
elmot 1:d0dfbce63a89 341 * @}
elmot 1:d0dfbce63a89 342 */
elmot 1:d0dfbce63a89 343
elmot 1:d0dfbce63a89 344 /**
elmot 1:d0dfbce63a89 345 * @}
elmot 1:d0dfbce63a89 346 */
elmot 1:d0dfbce63a89 347
elmot 1:d0dfbce63a89 348 /* Exported macro ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 349 /** @defgroup LPUART_LL_Exported_Macros LPUART Exported Macros
elmot 1:d0dfbce63a89 350 * @{
elmot 1:d0dfbce63a89 351 */
elmot 1:d0dfbce63a89 352
elmot 1:d0dfbce63a89 353 /** @defgroup LPUART_LL_EM_WRITE_READ Common Write and read registers Macros
elmot 1:d0dfbce63a89 354 * @{
elmot 1:d0dfbce63a89 355 */
elmot 1:d0dfbce63a89 356
elmot 1:d0dfbce63a89 357 /**
elmot 1:d0dfbce63a89 358 * @brief Write a value in LPUART register
elmot 1:d0dfbce63a89 359 * @param __INSTANCE__ LPUART Instance
elmot 1:d0dfbce63a89 360 * @param __REG__ Register to be written
elmot 1:d0dfbce63a89 361 * @param __VALUE__ Value to be written in the register
elmot 1:d0dfbce63a89 362 * @retval None
elmot 1:d0dfbce63a89 363 */
elmot 1:d0dfbce63a89 364 #define LL_LPUART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
elmot 1:d0dfbce63a89 365
elmot 1:d0dfbce63a89 366 /**
elmot 1:d0dfbce63a89 367 * @brief Read a value in LPUART register
elmot 1:d0dfbce63a89 368 * @param __INSTANCE__ LPUART Instance
elmot 1:d0dfbce63a89 369 * @param __REG__ Register to be read
elmot 1:d0dfbce63a89 370 * @retval Register value
elmot 1:d0dfbce63a89 371 */
elmot 1:d0dfbce63a89 372 #define LL_LPUART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
elmot 1:d0dfbce63a89 373 /**
elmot 1:d0dfbce63a89 374 * @}
elmot 1:d0dfbce63a89 375 */
elmot 1:d0dfbce63a89 376
elmot 1:d0dfbce63a89 377 /** @defgroup LPUART_LL_EM_Exported_Macros_Helper Helper Macros
elmot 1:d0dfbce63a89 378 * @{
elmot 1:d0dfbce63a89 379 */
elmot 1:d0dfbce63a89 380
elmot 1:d0dfbce63a89 381 /**
elmot 1:d0dfbce63a89 382 * @brief Compute LPUARTDIV value according to Peripheral Clock and
elmot 1:d0dfbce63a89 383 * expected Baud Rate (20-bit value of LPUARTDIV is returned)
elmot 1:d0dfbce63a89 384 * @param __PERIPHCLK__ Peripheral Clock frequency used for LPUART Instance
elmot 1:d0dfbce63a89 385 * @param __BAUDRATE__ Baud Rate value to achieve
elmot 1:d0dfbce63a89 386 * @retval LPUARTDIV value to be used for BRR register filling
elmot 1:d0dfbce63a89 387 */
elmot 1:d0dfbce63a89 388 #define __LL_LPUART_DIV(__PERIPHCLK__, __BAUDRATE__) (((((uint64_t)(__PERIPHCLK__)*LPUART_LPUARTDIV_FREQ_MUL) + ((__BAUDRATE__)/2))/(__BAUDRATE__)) & LPUART_BRR_MASK)
elmot 1:d0dfbce63a89 389
elmot 1:d0dfbce63a89 390 /**
elmot 1:d0dfbce63a89 391 * @}
elmot 1:d0dfbce63a89 392 */
elmot 1:d0dfbce63a89 393
elmot 1:d0dfbce63a89 394 /**
elmot 1:d0dfbce63a89 395 * @}
elmot 1:d0dfbce63a89 396 */
elmot 1:d0dfbce63a89 397
elmot 1:d0dfbce63a89 398 /* Exported functions --------------------------------------------------------*/
elmot 1:d0dfbce63a89 399 /** @defgroup LPUART_LL_Exported_Functions LPUART Exported Functions
elmot 1:d0dfbce63a89 400 * @{
elmot 1:d0dfbce63a89 401 */
elmot 1:d0dfbce63a89 402
elmot 1:d0dfbce63a89 403 /** @defgroup LPUART_LL_EF_Configuration Configuration functions
elmot 1:d0dfbce63a89 404 * @{
elmot 1:d0dfbce63a89 405 */
elmot 1:d0dfbce63a89 406
elmot 1:d0dfbce63a89 407 /**
elmot 1:d0dfbce63a89 408 * @brief LPUART Enable
elmot 1:d0dfbce63a89 409 * @rmtoll CR1 UE LL_LPUART_Enable
elmot 1:d0dfbce63a89 410 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 411 * @retval None
elmot 1:d0dfbce63a89 412 */
elmot 1:d0dfbce63a89 413 __STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 414 {
elmot 1:d0dfbce63a89 415 SET_BIT(LPUARTx->CR1, USART_CR1_UE);
elmot 1:d0dfbce63a89 416 }
elmot 1:d0dfbce63a89 417
elmot 1:d0dfbce63a89 418 /**
elmot 1:d0dfbce63a89 419 * @brief LPUART Disable
elmot 1:d0dfbce63a89 420 * @note When LPUART is disabled, LPUART prescalers and outputs are stopped immediately,
elmot 1:d0dfbce63a89 421 * and current operations are discarded. The configuration of the LPUART is kept, but all the status
elmot 1:d0dfbce63a89 422 * flags, in the LPUARTx_ISR are set to their default values.
elmot 1:d0dfbce63a89 423 * @note In order to go into low-power mode without generating errors on the line,
elmot 1:d0dfbce63a89 424 * the TE bit must be reset before and the software must wait
elmot 1:d0dfbce63a89 425 * for the TC bit in the LPUART_ISR to be set before resetting the UE bit.
elmot 1:d0dfbce63a89 426 * The DMA requests are also reset when UE = 0 so the DMA channel must
elmot 1:d0dfbce63a89 427 * be disabled before resetting the UE bit.
elmot 1:d0dfbce63a89 428 * @rmtoll CR1 UE LL_LPUART_Disable
elmot 1:d0dfbce63a89 429 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 430 * @retval None
elmot 1:d0dfbce63a89 431 */
elmot 1:d0dfbce63a89 432 __STATIC_INLINE void LL_LPUART_Disable(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 433 {
elmot 1:d0dfbce63a89 434 CLEAR_BIT(LPUARTx->CR1, USART_CR1_UE);
elmot 1:d0dfbce63a89 435 }
elmot 1:d0dfbce63a89 436
elmot 1:d0dfbce63a89 437 /**
elmot 1:d0dfbce63a89 438 * @brief Indicate if LPUART is enabled
elmot 1:d0dfbce63a89 439 * @rmtoll CR1 UE LL_LPUART_IsEnabled
elmot 1:d0dfbce63a89 440 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 441 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 442 */
elmot 1:d0dfbce63a89 443 __STATIC_INLINE uint32_t LL_LPUART_IsEnabled(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 444 {
elmot 1:d0dfbce63a89 445 return (READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
elmot 1:d0dfbce63a89 446 }
elmot 1:d0dfbce63a89 447
elmot 1:d0dfbce63a89 448 /**
elmot 1:d0dfbce63a89 449 * @brief LPUART enabled in STOP Mode
elmot 1:d0dfbce63a89 450 * @note When this function is enabled, LPUART is able to wake up the MCU from Stop mode, provided that
elmot 1:d0dfbce63a89 451 * LPUART clock selection is HSI or LSE in RCC.
elmot 1:d0dfbce63a89 452 * @rmtoll CR1 UESM LL_LPUART_EnableInStopMode
elmot 1:d0dfbce63a89 453 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 454 * @retval None
elmot 1:d0dfbce63a89 455 */
elmot 1:d0dfbce63a89 456 __STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 457 {
elmot 1:d0dfbce63a89 458 SET_BIT(LPUARTx->CR1, USART_CR1_UESM);
elmot 1:d0dfbce63a89 459 }
elmot 1:d0dfbce63a89 460
elmot 1:d0dfbce63a89 461 /**
elmot 1:d0dfbce63a89 462 * @brief LPUART disabled in STOP Mode
elmot 1:d0dfbce63a89 463 * @note When this function is disabled, LPUART is not able to wake up the MCU from Stop mode
elmot 1:d0dfbce63a89 464 * @rmtoll CR1 UESM LL_LPUART_DisableInStopMode
elmot 1:d0dfbce63a89 465 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 466 * @retval None
elmot 1:d0dfbce63a89 467 */
elmot 1:d0dfbce63a89 468 __STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 469 {
elmot 1:d0dfbce63a89 470 CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM);
elmot 1:d0dfbce63a89 471 }
elmot 1:d0dfbce63a89 472
elmot 1:d0dfbce63a89 473 /**
elmot 1:d0dfbce63a89 474 * @brief Indicate if LPUART is enabled in STOP Mode
elmot 1:d0dfbce63a89 475 * (able to wake up MCU from Stop mode or not)
elmot 1:d0dfbce63a89 476 * @rmtoll CR1 UESM LL_LPUART_IsEnabledInStopMode
elmot 1:d0dfbce63a89 477 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 478 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 479 */
elmot 1:d0dfbce63a89 480 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 481 {
elmot 1:d0dfbce63a89 482 return (READ_BIT(LPUARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM));
elmot 1:d0dfbce63a89 483 }
elmot 1:d0dfbce63a89 484
elmot 1:d0dfbce63a89 485 /**
elmot 1:d0dfbce63a89 486 * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
elmot 1:d0dfbce63a89 487 * @rmtoll CR1 RE LL_LPUART_EnableDirectionRx
elmot 1:d0dfbce63a89 488 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 489 * @retval None
elmot 1:d0dfbce63a89 490 */
elmot 1:d0dfbce63a89 491 __STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 492 {
elmot 1:d0dfbce63a89 493 SET_BIT(LPUARTx->CR1, USART_CR1_RE);
elmot 1:d0dfbce63a89 494 }
elmot 1:d0dfbce63a89 495
elmot 1:d0dfbce63a89 496 /**
elmot 1:d0dfbce63a89 497 * @brief Receiver Disable
elmot 1:d0dfbce63a89 498 * @rmtoll CR1 RE LL_LPUART_DisableDirectionRx
elmot 1:d0dfbce63a89 499 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 500 * @retval None
elmot 1:d0dfbce63a89 501 */
elmot 1:d0dfbce63a89 502 __STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 503 {
elmot 1:d0dfbce63a89 504 CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE);
elmot 1:d0dfbce63a89 505 }
elmot 1:d0dfbce63a89 506
elmot 1:d0dfbce63a89 507 /**
elmot 1:d0dfbce63a89 508 * @brief Transmitter Enable
elmot 1:d0dfbce63a89 509 * @rmtoll CR1 TE LL_LPUART_EnableDirectionTx
elmot 1:d0dfbce63a89 510 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 511 * @retval None
elmot 1:d0dfbce63a89 512 */
elmot 1:d0dfbce63a89 513 __STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 514 {
elmot 1:d0dfbce63a89 515 SET_BIT(LPUARTx->CR1, USART_CR1_TE);
elmot 1:d0dfbce63a89 516 }
elmot 1:d0dfbce63a89 517
elmot 1:d0dfbce63a89 518 /**
elmot 1:d0dfbce63a89 519 * @brief Transmitter Disable
elmot 1:d0dfbce63a89 520 * @rmtoll CR1 TE LL_LPUART_DisableDirectionTx
elmot 1:d0dfbce63a89 521 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 522 * @retval None
elmot 1:d0dfbce63a89 523 */
elmot 1:d0dfbce63a89 524 __STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 525 {
elmot 1:d0dfbce63a89 526 CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE);
elmot 1:d0dfbce63a89 527 }
elmot 1:d0dfbce63a89 528
elmot 1:d0dfbce63a89 529 /**
elmot 1:d0dfbce63a89 530 * @brief Configure simultaneously enabled/disabled states
elmot 1:d0dfbce63a89 531 * of Transmitter and Receiver
elmot 1:d0dfbce63a89 532 * @rmtoll CR1 RE LL_LPUART_SetTransferDirection\n
elmot 1:d0dfbce63a89 533 * CR1 TE LL_LPUART_SetTransferDirection
elmot 1:d0dfbce63a89 534 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 535 * @param TransferDirection This parameter can be one of the following values:
elmot 1:d0dfbce63a89 536 * @arg @ref LL_LPUART_DIRECTION_NONE
elmot 1:d0dfbce63a89 537 * @arg @ref LL_LPUART_DIRECTION_RX
elmot 1:d0dfbce63a89 538 * @arg @ref LL_LPUART_DIRECTION_TX
elmot 1:d0dfbce63a89 539 * @arg @ref LL_LPUART_DIRECTION_TX_RX
elmot 1:d0dfbce63a89 540 * @retval None
elmot 1:d0dfbce63a89 541 */
elmot 1:d0dfbce63a89 542 __STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t TransferDirection)
elmot 1:d0dfbce63a89 543 {
elmot 1:d0dfbce63a89 544 MODIFY_REG(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
elmot 1:d0dfbce63a89 545 }
elmot 1:d0dfbce63a89 546
elmot 1:d0dfbce63a89 547 /**
elmot 1:d0dfbce63a89 548 * @brief Return enabled/disabled states of Transmitter and Receiver
elmot 1:d0dfbce63a89 549 * @rmtoll CR1 RE LL_LPUART_GetTransferDirection\n
elmot 1:d0dfbce63a89 550 * CR1 TE LL_LPUART_GetTransferDirection
elmot 1:d0dfbce63a89 551 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 552 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 553 * @arg @ref LL_LPUART_DIRECTION_NONE
elmot 1:d0dfbce63a89 554 * @arg @ref LL_LPUART_DIRECTION_RX
elmot 1:d0dfbce63a89 555 * @arg @ref LL_LPUART_DIRECTION_TX
elmot 1:d0dfbce63a89 556 * @arg @ref LL_LPUART_DIRECTION_TX_RX
elmot 1:d0dfbce63a89 557 */
elmot 1:d0dfbce63a89 558 __STATIC_INLINE uint32_t LL_LPUART_GetTransferDirection(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 559 {
elmot 1:d0dfbce63a89 560 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE));
elmot 1:d0dfbce63a89 561 }
elmot 1:d0dfbce63a89 562
elmot 1:d0dfbce63a89 563 /**
elmot 1:d0dfbce63a89 564 * @brief Configure Parity (enabled/disabled and parity mode if enabled)
elmot 1:d0dfbce63a89 565 * @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
elmot 1:d0dfbce63a89 566 * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
elmot 1:d0dfbce63a89 567 * (depending on data width) and parity is checked on the received data.
elmot 1:d0dfbce63a89 568 * @rmtoll CR1 PS LL_LPUART_SetParity\n
elmot 1:d0dfbce63a89 569 * CR1 PCE LL_LPUART_SetParity
elmot 1:d0dfbce63a89 570 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 571 * @param Parity This parameter can be one of the following values:
elmot 1:d0dfbce63a89 572 * @arg @ref LL_LPUART_PARITY_NONE
elmot 1:d0dfbce63a89 573 * @arg @ref LL_LPUART_PARITY_EVEN
elmot 1:d0dfbce63a89 574 * @arg @ref LL_LPUART_PARITY_ODD
elmot 1:d0dfbce63a89 575 * @retval None
elmot 1:d0dfbce63a89 576 */
elmot 1:d0dfbce63a89 577 __STATIC_INLINE void LL_LPUART_SetParity(USART_TypeDef *LPUARTx, uint32_t Parity)
elmot 1:d0dfbce63a89 578 {
elmot 1:d0dfbce63a89 579 MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
elmot 1:d0dfbce63a89 580 }
elmot 1:d0dfbce63a89 581
elmot 1:d0dfbce63a89 582 /**
elmot 1:d0dfbce63a89 583 * @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
elmot 1:d0dfbce63a89 584 * @rmtoll CR1 PS LL_LPUART_GetParity\n
elmot 1:d0dfbce63a89 585 * CR1 PCE LL_LPUART_GetParity
elmot 1:d0dfbce63a89 586 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 587 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 588 * @arg @ref LL_LPUART_PARITY_NONE
elmot 1:d0dfbce63a89 589 * @arg @ref LL_LPUART_PARITY_EVEN
elmot 1:d0dfbce63a89 590 * @arg @ref LL_LPUART_PARITY_ODD
elmot 1:d0dfbce63a89 591 */
elmot 1:d0dfbce63a89 592 __STATIC_INLINE uint32_t LL_LPUART_GetParity(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 593 {
elmot 1:d0dfbce63a89 594 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
elmot 1:d0dfbce63a89 595 }
elmot 1:d0dfbce63a89 596
elmot 1:d0dfbce63a89 597 /**
elmot 1:d0dfbce63a89 598 * @brief Set Receiver Wake Up method from Mute mode.
elmot 1:d0dfbce63a89 599 * @rmtoll CR1 WAKE LL_LPUART_SetWakeUpMethod
elmot 1:d0dfbce63a89 600 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 601 * @param Method This parameter can be one of the following values:
elmot 1:d0dfbce63a89 602 * @arg @ref LL_LPUART_WAKEUP_IDLELINE
elmot 1:d0dfbce63a89 603 * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
elmot 1:d0dfbce63a89 604 * @retval None
elmot 1:d0dfbce63a89 605 */
elmot 1:d0dfbce63a89 606 __STATIC_INLINE void LL_LPUART_SetWakeUpMethod(USART_TypeDef *LPUARTx, uint32_t Method)
elmot 1:d0dfbce63a89 607 {
elmot 1:d0dfbce63a89 608 MODIFY_REG(LPUARTx->CR1, USART_CR1_WAKE, Method);
elmot 1:d0dfbce63a89 609 }
elmot 1:d0dfbce63a89 610
elmot 1:d0dfbce63a89 611 /**
elmot 1:d0dfbce63a89 612 * @brief Return Receiver Wake Up method from Mute mode
elmot 1:d0dfbce63a89 613 * @rmtoll CR1 WAKE LL_LPUART_GetWakeUpMethod
elmot 1:d0dfbce63a89 614 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 615 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 616 * @arg @ref LL_LPUART_WAKEUP_IDLELINE
elmot 1:d0dfbce63a89 617 * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
elmot 1:d0dfbce63a89 618 */
elmot 1:d0dfbce63a89 619 __STATIC_INLINE uint32_t LL_LPUART_GetWakeUpMethod(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 620 {
elmot 1:d0dfbce63a89 621 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_WAKE));
elmot 1:d0dfbce63a89 622 }
elmot 1:d0dfbce63a89 623
elmot 1:d0dfbce63a89 624 /**
elmot 1:d0dfbce63a89 625 * @brief Set Word length (nb of data bits, excluding start and stop bits)
elmot 1:d0dfbce63a89 626 * @rmtoll CR1 M LL_LPUART_SetDataWidth
elmot 1:d0dfbce63a89 627 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 628 * @param DataWidth This parameter can be one of the following values:
elmot 1:d0dfbce63a89 629 * @arg @ref LL_LPUART_DATAWIDTH_7B
elmot 1:d0dfbce63a89 630 * @arg @ref LL_LPUART_DATAWIDTH_8B
elmot 1:d0dfbce63a89 631 * @arg @ref LL_LPUART_DATAWIDTH_9B
elmot 1:d0dfbce63a89 632 * @retval None
elmot 1:d0dfbce63a89 633 */
elmot 1:d0dfbce63a89 634 __STATIC_INLINE void LL_LPUART_SetDataWidth(USART_TypeDef *LPUARTx, uint32_t DataWidth)
elmot 1:d0dfbce63a89 635 {
elmot 1:d0dfbce63a89 636 MODIFY_REG(LPUARTx->CR1, USART_CR1_M, DataWidth);
elmot 1:d0dfbce63a89 637 }
elmot 1:d0dfbce63a89 638
elmot 1:d0dfbce63a89 639 /**
elmot 1:d0dfbce63a89 640 * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
elmot 1:d0dfbce63a89 641 * @rmtoll CR1 M LL_LPUART_GetDataWidth
elmot 1:d0dfbce63a89 642 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 643 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 644 * @arg @ref LL_LPUART_DATAWIDTH_7B
elmot 1:d0dfbce63a89 645 * @arg @ref LL_LPUART_DATAWIDTH_8B
elmot 1:d0dfbce63a89 646 * @arg @ref LL_LPUART_DATAWIDTH_9B
elmot 1:d0dfbce63a89 647 */
elmot 1:d0dfbce63a89 648 __STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 649 {
elmot 1:d0dfbce63a89 650 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_M));
elmot 1:d0dfbce63a89 651 }
elmot 1:d0dfbce63a89 652
elmot 1:d0dfbce63a89 653 /**
elmot 1:d0dfbce63a89 654 * @brief Allow switch between Mute Mode and Active mode
elmot 1:d0dfbce63a89 655 * @rmtoll CR1 MME LL_LPUART_EnableMuteMode
elmot 1:d0dfbce63a89 656 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 657 * @retval None
elmot 1:d0dfbce63a89 658 */
elmot 1:d0dfbce63a89 659 __STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 660 {
elmot 1:d0dfbce63a89 661 SET_BIT(LPUARTx->CR1, USART_CR1_MME);
elmot 1:d0dfbce63a89 662 }
elmot 1:d0dfbce63a89 663
elmot 1:d0dfbce63a89 664 /**
elmot 1:d0dfbce63a89 665 * @brief Prevent Mute Mode use. Set Receiver in active mode permanently.
elmot 1:d0dfbce63a89 666 * @rmtoll CR1 MME LL_LPUART_DisableMuteMode
elmot 1:d0dfbce63a89 667 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 668 * @retval None
elmot 1:d0dfbce63a89 669 */
elmot 1:d0dfbce63a89 670 __STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 671 {
elmot 1:d0dfbce63a89 672 CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME);
elmot 1:d0dfbce63a89 673 }
elmot 1:d0dfbce63a89 674
elmot 1:d0dfbce63a89 675 /**
elmot 1:d0dfbce63a89 676 * @brief Indicate if switch between Mute Mode and Active mode is allowed
elmot 1:d0dfbce63a89 677 * @rmtoll CR1 MME LL_LPUART_IsEnabledMuteMode
elmot 1:d0dfbce63a89 678 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 679 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 680 */
elmot 1:d0dfbce63a89 681 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledMuteMode(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 682 {
elmot 1:d0dfbce63a89 683 return (READ_BIT(LPUARTx->CR1, USART_CR1_MME) == (USART_CR1_MME));
elmot 1:d0dfbce63a89 684 }
elmot 1:d0dfbce63a89 685
elmot 1:d0dfbce63a89 686 /**
elmot 1:d0dfbce63a89 687 * @brief Set the length of the stop bits
elmot 1:d0dfbce63a89 688 * @rmtoll CR2 STOP LL_LPUART_SetStopBitsLength
elmot 1:d0dfbce63a89 689 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 690 * @param StopBits This parameter can be one of the following values:
elmot 1:d0dfbce63a89 691 * @arg @ref LL_LPUART_STOPBITS_1
elmot 1:d0dfbce63a89 692 * @arg @ref LL_LPUART_STOPBITS_2
elmot 1:d0dfbce63a89 693 * @retval None
elmot 1:d0dfbce63a89 694 */
elmot 1:d0dfbce63a89 695 __STATIC_INLINE void LL_LPUART_SetStopBitsLength(USART_TypeDef *LPUARTx, uint32_t StopBits)
elmot 1:d0dfbce63a89 696 {
elmot 1:d0dfbce63a89 697 MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
elmot 1:d0dfbce63a89 698 }
elmot 1:d0dfbce63a89 699
elmot 1:d0dfbce63a89 700 /**
elmot 1:d0dfbce63a89 701 * @brief Retrieve the length of the stop bits
elmot 1:d0dfbce63a89 702 * @rmtoll CR2 STOP LL_LPUART_GetStopBitsLength
elmot 1:d0dfbce63a89 703 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 704 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 705 * @arg @ref LL_LPUART_STOPBITS_1
elmot 1:d0dfbce63a89 706 * @arg @ref LL_LPUART_STOPBITS_2
elmot 1:d0dfbce63a89 707 */
elmot 1:d0dfbce63a89 708 __STATIC_INLINE uint32_t LL_LPUART_GetStopBitsLength(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 709 {
elmot 1:d0dfbce63a89 710 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_STOP));
elmot 1:d0dfbce63a89 711 }
elmot 1:d0dfbce63a89 712
elmot 1:d0dfbce63a89 713 /**
elmot 1:d0dfbce63a89 714 * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
elmot 1:d0dfbce63a89 715 * @note Call of this function is equivalent to following function call sequence :
elmot 1:d0dfbce63a89 716 * - Data Width configuration using @ref LL_LPUART_SetDataWidth() function
elmot 1:d0dfbce63a89 717 * - Parity Control and mode configuration using @ref LL_LPUART_SetParity() function
elmot 1:d0dfbce63a89 718 * - Stop bits configuration using @ref LL_LPUART_SetStopBitsLength() function
elmot 1:d0dfbce63a89 719 * @rmtoll CR1 PS LL_LPUART_ConfigCharacter\n
elmot 1:d0dfbce63a89 720 * CR1 PCE LL_LPUART_ConfigCharacter\n
elmot 1:d0dfbce63a89 721 * CR1 M LL_LPUART_ConfigCharacter\n
elmot 1:d0dfbce63a89 722 * CR2 STOP LL_LPUART_ConfigCharacter
elmot 1:d0dfbce63a89 723 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 724 * @param DataWidth This parameter can be one of the following values:
elmot 1:d0dfbce63a89 725 * @arg @ref LL_LPUART_DATAWIDTH_7B
elmot 1:d0dfbce63a89 726 * @arg @ref LL_LPUART_DATAWIDTH_8B
elmot 1:d0dfbce63a89 727 * @arg @ref LL_LPUART_DATAWIDTH_9B
elmot 1:d0dfbce63a89 728 * @param Parity This parameter can be one of the following values:
elmot 1:d0dfbce63a89 729 * @arg @ref LL_LPUART_PARITY_NONE
elmot 1:d0dfbce63a89 730 * @arg @ref LL_LPUART_PARITY_EVEN
elmot 1:d0dfbce63a89 731 * @arg @ref LL_LPUART_PARITY_ODD
elmot 1:d0dfbce63a89 732 * @param StopBits This parameter can be one of the following values:
elmot 1:d0dfbce63a89 733 * @arg @ref LL_LPUART_STOPBITS_1
elmot 1:d0dfbce63a89 734 * @arg @ref LL_LPUART_STOPBITS_2
elmot 1:d0dfbce63a89 735 * @retval None
elmot 1:d0dfbce63a89 736 */
elmot 1:d0dfbce63a89 737 __STATIC_INLINE void LL_LPUART_ConfigCharacter(USART_TypeDef *LPUARTx, uint32_t DataWidth, uint32_t Parity,
elmot 1:d0dfbce63a89 738 uint32_t StopBits)
elmot 1:d0dfbce63a89 739 {
elmot 1:d0dfbce63a89 740 MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
elmot 1:d0dfbce63a89 741 MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
elmot 1:d0dfbce63a89 742 }
elmot 1:d0dfbce63a89 743
elmot 1:d0dfbce63a89 744 /**
elmot 1:d0dfbce63a89 745 * @brief Configure TX/RX pins swapping setting.
elmot 1:d0dfbce63a89 746 * @rmtoll CR2 SWAP LL_LPUART_SetTXRXSwap
elmot 1:d0dfbce63a89 747 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 748 * @param SwapConfig This parameter can be one of the following values:
elmot 1:d0dfbce63a89 749 * @arg @ref LL_LPUART_TXRX_STANDARD
elmot 1:d0dfbce63a89 750 * @arg @ref LL_LPUART_TXRX_SWAPPED
elmot 1:d0dfbce63a89 751 * @retval None
elmot 1:d0dfbce63a89 752 */
elmot 1:d0dfbce63a89 753 __STATIC_INLINE void LL_LPUART_SetTXRXSwap(USART_TypeDef *LPUARTx, uint32_t SwapConfig)
elmot 1:d0dfbce63a89 754 {
elmot 1:d0dfbce63a89 755 MODIFY_REG(LPUARTx->CR2, USART_CR2_SWAP, SwapConfig);
elmot 1:d0dfbce63a89 756 }
elmot 1:d0dfbce63a89 757
elmot 1:d0dfbce63a89 758 /**
elmot 1:d0dfbce63a89 759 * @brief Retrieve TX/RX pins swapping configuration.
elmot 1:d0dfbce63a89 760 * @rmtoll CR2 SWAP LL_LPUART_GetTXRXSwap
elmot 1:d0dfbce63a89 761 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 762 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 763 * @arg @ref LL_LPUART_TXRX_STANDARD
elmot 1:d0dfbce63a89 764 * @arg @ref LL_LPUART_TXRX_SWAPPED
elmot 1:d0dfbce63a89 765 */
elmot 1:d0dfbce63a89 766 __STATIC_INLINE uint32_t LL_LPUART_GetTXRXSwap(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 767 {
elmot 1:d0dfbce63a89 768 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_SWAP));
elmot 1:d0dfbce63a89 769 }
elmot 1:d0dfbce63a89 770
elmot 1:d0dfbce63a89 771 /**
elmot 1:d0dfbce63a89 772 * @brief Configure RX pin active level logic
elmot 1:d0dfbce63a89 773 * @rmtoll CR2 RXINV LL_LPUART_SetRXPinLevel
elmot 1:d0dfbce63a89 774 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 775 * @param PinInvMethod This parameter can be one of the following values:
elmot 1:d0dfbce63a89 776 * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
elmot 1:d0dfbce63a89 777 * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
elmot 1:d0dfbce63a89 778 * @retval None
elmot 1:d0dfbce63a89 779 */
elmot 1:d0dfbce63a89 780 __STATIC_INLINE void LL_LPUART_SetRXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
elmot 1:d0dfbce63a89 781 {
elmot 1:d0dfbce63a89 782 MODIFY_REG(LPUARTx->CR2, USART_CR2_RXINV, PinInvMethod);
elmot 1:d0dfbce63a89 783 }
elmot 1:d0dfbce63a89 784
elmot 1:d0dfbce63a89 785 /**
elmot 1:d0dfbce63a89 786 * @brief Retrieve RX pin active level logic configuration
elmot 1:d0dfbce63a89 787 * @rmtoll CR2 RXINV LL_LPUART_GetRXPinLevel
elmot 1:d0dfbce63a89 788 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 789 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 790 * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
elmot 1:d0dfbce63a89 791 * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
elmot 1:d0dfbce63a89 792 */
elmot 1:d0dfbce63a89 793 __STATIC_INLINE uint32_t LL_LPUART_GetRXPinLevel(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 794 {
elmot 1:d0dfbce63a89 795 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_RXINV));
elmot 1:d0dfbce63a89 796 }
elmot 1:d0dfbce63a89 797
elmot 1:d0dfbce63a89 798 /**
elmot 1:d0dfbce63a89 799 * @brief Configure TX pin active level logic
elmot 1:d0dfbce63a89 800 * @rmtoll CR2 TXINV LL_LPUART_SetTXPinLevel
elmot 1:d0dfbce63a89 801 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 802 * @param PinInvMethod This parameter can be one of the following values:
elmot 1:d0dfbce63a89 803 * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
elmot 1:d0dfbce63a89 804 * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
elmot 1:d0dfbce63a89 805 * @retval None
elmot 1:d0dfbce63a89 806 */
elmot 1:d0dfbce63a89 807 __STATIC_INLINE void LL_LPUART_SetTXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
elmot 1:d0dfbce63a89 808 {
elmot 1:d0dfbce63a89 809 MODIFY_REG(LPUARTx->CR2, USART_CR2_TXINV, PinInvMethod);
elmot 1:d0dfbce63a89 810 }
elmot 1:d0dfbce63a89 811
elmot 1:d0dfbce63a89 812 /**
elmot 1:d0dfbce63a89 813 * @brief Retrieve TX pin active level logic configuration
elmot 1:d0dfbce63a89 814 * @rmtoll CR2 TXINV LL_LPUART_GetTXPinLevel
elmot 1:d0dfbce63a89 815 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 816 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 817 * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
elmot 1:d0dfbce63a89 818 * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
elmot 1:d0dfbce63a89 819 */
elmot 1:d0dfbce63a89 820 __STATIC_INLINE uint32_t LL_LPUART_GetTXPinLevel(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 821 {
elmot 1:d0dfbce63a89 822 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_TXINV));
elmot 1:d0dfbce63a89 823 }
elmot 1:d0dfbce63a89 824
elmot 1:d0dfbce63a89 825 /**
elmot 1:d0dfbce63a89 826 * @brief Configure Binary data logic.
elmot 1:d0dfbce63a89 827 *
elmot 1:d0dfbce63a89 828 * @note Allow to define how Logical data from the data register are send/received :
elmot 1:d0dfbce63a89 829 * either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H)
elmot 1:d0dfbce63a89 830 * @rmtoll CR2 DATAINV LL_LPUART_SetBinaryDataLogic
elmot 1:d0dfbce63a89 831 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 832 * @param DataLogic This parameter can be one of the following values:
elmot 1:d0dfbce63a89 833 * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
elmot 1:d0dfbce63a89 834 * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
elmot 1:d0dfbce63a89 835 * @retval None
elmot 1:d0dfbce63a89 836 */
elmot 1:d0dfbce63a89 837 __STATIC_INLINE void LL_LPUART_SetBinaryDataLogic(USART_TypeDef *LPUARTx, uint32_t DataLogic)
elmot 1:d0dfbce63a89 838 {
elmot 1:d0dfbce63a89 839 MODIFY_REG(LPUARTx->CR2, USART_CR2_DATAINV, DataLogic);
elmot 1:d0dfbce63a89 840 }
elmot 1:d0dfbce63a89 841
elmot 1:d0dfbce63a89 842 /**
elmot 1:d0dfbce63a89 843 * @brief Retrieve Binary data configuration
elmot 1:d0dfbce63a89 844 * @rmtoll CR2 DATAINV LL_LPUART_GetBinaryDataLogic
elmot 1:d0dfbce63a89 845 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 846 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 847 * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
elmot 1:d0dfbce63a89 848 * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
elmot 1:d0dfbce63a89 849 */
elmot 1:d0dfbce63a89 850 __STATIC_INLINE uint32_t LL_LPUART_GetBinaryDataLogic(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 851 {
elmot 1:d0dfbce63a89 852 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_DATAINV));
elmot 1:d0dfbce63a89 853 }
elmot 1:d0dfbce63a89 854
elmot 1:d0dfbce63a89 855 /**
elmot 1:d0dfbce63a89 856 * @brief Configure transfer bit order (either Less or Most Significant Bit First)
elmot 1:d0dfbce63a89 857 * @note MSB First means data is transmitted/received with the MSB first, following the start bit.
elmot 1:d0dfbce63a89 858 * LSB First means data is transmitted/received with data bit 0 first, following the start bit.
elmot 1:d0dfbce63a89 859 * @rmtoll CR2 MSBFIRST LL_LPUART_SetTransferBitOrder
elmot 1:d0dfbce63a89 860 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 861 * @param BitOrder This parameter can be one of the following values:
elmot 1:d0dfbce63a89 862 * @arg @ref LL_LPUART_BITORDER_LSBFIRST
elmot 1:d0dfbce63a89 863 * @arg @ref LL_LPUART_BITORDER_MSBFIRST
elmot 1:d0dfbce63a89 864 * @retval None
elmot 1:d0dfbce63a89 865 */
elmot 1:d0dfbce63a89 866 __STATIC_INLINE void LL_LPUART_SetTransferBitOrder(USART_TypeDef *LPUARTx, uint32_t BitOrder)
elmot 1:d0dfbce63a89 867 {
elmot 1:d0dfbce63a89 868 MODIFY_REG(LPUARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
elmot 1:d0dfbce63a89 869 }
elmot 1:d0dfbce63a89 870
elmot 1:d0dfbce63a89 871 /**
elmot 1:d0dfbce63a89 872 * @brief Return transfer bit order (either Less or Most Significant Bit First)
elmot 1:d0dfbce63a89 873 * @note MSB First means data is transmitted/received with the MSB first, following the start bit.
elmot 1:d0dfbce63a89 874 * LSB First means data is transmitted/received with data bit 0 first, following the start bit.
elmot 1:d0dfbce63a89 875 * @rmtoll CR2 MSBFIRST LL_LPUART_GetTransferBitOrder
elmot 1:d0dfbce63a89 876 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 877 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 878 * @arg @ref LL_LPUART_BITORDER_LSBFIRST
elmot 1:d0dfbce63a89 879 * @arg @ref LL_LPUART_BITORDER_MSBFIRST
elmot 1:d0dfbce63a89 880 */
elmot 1:d0dfbce63a89 881 __STATIC_INLINE uint32_t LL_LPUART_GetTransferBitOrder(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 882 {
elmot 1:d0dfbce63a89 883 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_MSBFIRST));
elmot 1:d0dfbce63a89 884 }
elmot 1:d0dfbce63a89 885
elmot 1:d0dfbce63a89 886 /**
elmot 1:d0dfbce63a89 887 * @brief Set Address of the LPUART node.
elmot 1:d0dfbce63a89 888 * @note This is used in multiprocessor communication during Mute mode or Stop mode,
elmot 1:d0dfbce63a89 889 * for wake up with address mark detection.
elmot 1:d0dfbce63a89 890 * @note 4bits address node is used when 4-bit Address Detection is selected in ADDM7.
elmot 1:d0dfbce63a89 891 * (b7-b4 should be set to 0)
elmot 1:d0dfbce63a89 892 * 8bits address node is used when 7-bit Address Detection is selected in ADDM7.
elmot 1:d0dfbce63a89 893 * (This is used in multiprocessor communication during Mute mode or Stop mode,
elmot 1:d0dfbce63a89 894 * for wake up with 7-bit address mark detection.
elmot 1:d0dfbce63a89 895 * The MSB of the character sent by the transmitter should be equal to 1.
elmot 1:d0dfbce63a89 896 * It may also be used for character detection during normal reception,
elmot 1:d0dfbce63a89 897 * Mute mode inactive (for example, end of block detection in ModBus protocol).
elmot 1:d0dfbce63a89 898 * In this case, the whole received character (8-bit) is compared to the ADD[7:0]
elmot 1:d0dfbce63a89 899 * value and CMF flag is set on match)
elmot 1:d0dfbce63a89 900 * @rmtoll CR2 ADD LL_LPUART_ConfigNodeAddress\n
elmot 1:d0dfbce63a89 901 * CR2 ADDM7 LL_LPUART_ConfigNodeAddress
elmot 1:d0dfbce63a89 902 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 903 * @param AddressLen This parameter can be one of the following values:
elmot 1:d0dfbce63a89 904 * @arg @ref LL_LPUART_ADDRESS_DETECT_4B
elmot 1:d0dfbce63a89 905 * @arg @ref LL_LPUART_ADDRESS_DETECT_7B
elmot 1:d0dfbce63a89 906 * @param NodeAddress 4 or 7 bit Address of the LPUART node.
elmot 1:d0dfbce63a89 907 * @retval None
elmot 1:d0dfbce63a89 908 */
elmot 1:d0dfbce63a89 909 __STATIC_INLINE void LL_LPUART_ConfigNodeAddress(USART_TypeDef *LPUARTx, uint32_t AddressLen, uint32_t NodeAddress)
elmot 1:d0dfbce63a89 910 {
elmot 1:d0dfbce63a89 911 MODIFY_REG(LPUARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
elmot 1:d0dfbce63a89 912 (uint32_t)(AddressLen | (NodeAddress << LPUART_POSITION_CR2_ADD)));
elmot 1:d0dfbce63a89 913 }
elmot 1:d0dfbce63a89 914
elmot 1:d0dfbce63a89 915 /**
elmot 1:d0dfbce63a89 916 * @brief Return 8 bit Address of the LPUART node as set in ADD field of CR2.
elmot 1:d0dfbce63a89 917 * @note If 4-bit Address Detection is selected in ADDM7,
elmot 1:d0dfbce63a89 918 * only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
elmot 1:d0dfbce63a89 919 * If 7-bit Address Detection is selected in ADDM7,
elmot 1:d0dfbce63a89 920 * only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant)
elmot 1:d0dfbce63a89 921 * @rmtoll CR2 ADD LL_LPUART_GetNodeAddress
elmot 1:d0dfbce63a89 922 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 923 * @retval Address of the LPUART node (Value between Min_Data=0 and Max_Data=255)
elmot 1:d0dfbce63a89 924 */
elmot 1:d0dfbce63a89 925 __STATIC_INLINE uint32_t LL_LPUART_GetNodeAddress(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 926 {
elmot 1:d0dfbce63a89 927 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADD) >> LPUART_POSITION_CR2_ADD);
elmot 1:d0dfbce63a89 928 }
elmot 1:d0dfbce63a89 929
elmot 1:d0dfbce63a89 930 /**
elmot 1:d0dfbce63a89 931 * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit)
elmot 1:d0dfbce63a89 932 * @rmtoll CR2 ADDM7 LL_LPUART_GetNodeAddressLen
elmot 1:d0dfbce63a89 933 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 934 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 935 * @arg @ref LL_LPUART_ADDRESS_DETECT_4B
elmot 1:d0dfbce63a89 936 * @arg @ref LL_LPUART_ADDRESS_DETECT_7B
elmot 1:d0dfbce63a89 937 */
elmot 1:d0dfbce63a89 938 __STATIC_INLINE uint32_t LL_LPUART_GetNodeAddressLen(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 939 {
elmot 1:d0dfbce63a89 940 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADDM7));
elmot 1:d0dfbce63a89 941 }
elmot 1:d0dfbce63a89 942
elmot 1:d0dfbce63a89 943 /**
elmot 1:d0dfbce63a89 944 * @brief Enable RTS HW Flow Control
elmot 1:d0dfbce63a89 945 * @rmtoll CR3 RTSE LL_LPUART_EnableRTSHWFlowCtrl
elmot 1:d0dfbce63a89 946 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 947 * @retval None
elmot 1:d0dfbce63a89 948 */
elmot 1:d0dfbce63a89 949 __STATIC_INLINE void LL_LPUART_EnableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 950 {
elmot 1:d0dfbce63a89 951 SET_BIT(LPUARTx->CR3, USART_CR3_RTSE);
elmot 1:d0dfbce63a89 952 }
elmot 1:d0dfbce63a89 953
elmot 1:d0dfbce63a89 954 /**
elmot 1:d0dfbce63a89 955 * @brief Disable RTS HW Flow Control
elmot 1:d0dfbce63a89 956 * @rmtoll CR3 RTSE LL_LPUART_DisableRTSHWFlowCtrl
elmot 1:d0dfbce63a89 957 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 958 * @retval None
elmot 1:d0dfbce63a89 959 */
elmot 1:d0dfbce63a89 960 __STATIC_INLINE void LL_LPUART_DisableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 961 {
elmot 1:d0dfbce63a89 962 CLEAR_BIT(LPUARTx->CR3, USART_CR3_RTSE);
elmot 1:d0dfbce63a89 963 }
elmot 1:d0dfbce63a89 964
elmot 1:d0dfbce63a89 965 /**
elmot 1:d0dfbce63a89 966 * @brief Enable CTS HW Flow Control
elmot 1:d0dfbce63a89 967 * @rmtoll CR3 CTSE LL_LPUART_EnableCTSHWFlowCtrl
elmot 1:d0dfbce63a89 968 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 969 * @retval None
elmot 1:d0dfbce63a89 970 */
elmot 1:d0dfbce63a89 971 __STATIC_INLINE void LL_LPUART_EnableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 972 {
elmot 1:d0dfbce63a89 973 SET_BIT(LPUARTx->CR3, USART_CR3_CTSE);
elmot 1:d0dfbce63a89 974 }
elmot 1:d0dfbce63a89 975
elmot 1:d0dfbce63a89 976 /**
elmot 1:d0dfbce63a89 977 * @brief Disable CTS HW Flow Control
elmot 1:d0dfbce63a89 978 * @rmtoll CR3 CTSE LL_LPUART_DisableCTSHWFlowCtrl
elmot 1:d0dfbce63a89 979 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 980 * @retval None
elmot 1:d0dfbce63a89 981 */
elmot 1:d0dfbce63a89 982 __STATIC_INLINE void LL_LPUART_DisableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 983 {
elmot 1:d0dfbce63a89 984 CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSE);
elmot 1:d0dfbce63a89 985 }
elmot 1:d0dfbce63a89 986
elmot 1:d0dfbce63a89 987 /**
elmot 1:d0dfbce63a89 988 * @brief Configure HW Flow Control mode (both CTS and RTS)
elmot 1:d0dfbce63a89 989 * @rmtoll CR3 RTSE LL_LPUART_SetHWFlowCtrl\n
elmot 1:d0dfbce63a89 990 * CR3 CTSE LL_LPUART_SetHWFlowCtrl
elmot 1:d0dfbce63a89 991 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 992 * @param HardwareFlowControl This parameter can be one of the following values:
elmot 1:d0dfbce63a89 993 * @arg @ref LL_LPUART_HWCONTROL_NONE
elmot 1:d0dfbce63a89 994 * @arg @ref LL_LPUART_HWCONTROL_RTS
elmot 1:d0dfbce63a89 995 * @arg @ref LL_LPUART_HWCONTROL_CTS
elmot 1:d0dfbce63a89 996 * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
elmot 1:d0dfbce63a89 997 * @retval None
elmot 1:d0dfbce63a89 998 */
elmot 1:d0dfbce63a89 999 __STATIC_INLINE void LL_LPUART_SetHWFlowCtrl(USART_TypeDef *LPUARTx, uint32_t HardwareFlowControl)
elmot 1:d0dfbce63a89 1000 {
elmot 1:d0dfbce63a89 1001 MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
elmot 1:d0dfbce63a89 1002 }
elmot 1:d0dfbce63a89 1003
elmot 1:d0dfbce63a89 1004 /**
elmot 1:d0dfbce63a89 1005 * @brief Return HW Flow Control configuration (both CTS and RTS)
elmot 1:d0dfbce63a89 1006 * @rmtoll CR3 RTSE LL_LPUART_GetHWFlowCtrl\n
elmot 1:d0dfbce63a89 1007 * CR3 CTSE LL_LPUART_GetHWFlowCtrl
elmot 1:d0dfbce63a89 1008 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1009 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 1010 * @arg @ref LL_LPUART_HWCONTROL_NONE
elmot 1:d0dfbce63a89 1011 * @arg @ref LL_LPUART_HWCONTROL_RTS
elmot 1:d0dfbce63a89 1012 * @arg @ref LL_LPUART_HWCONTROL_CTS
elmot 1:d0dfbce63a89 1013 * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
elmot 1:d0dfbce63a89 1014 */
elmot 1:d0dfbce63a89 1015 __STATIC_INLINE uint32_t LL_LPUART_GetHWFlowCtrl(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1016 {
elmot 1:d0dfbce63a89 1017 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
elmot 1:d0dfbce63a89 1018 }
elmot 1:d0dfbce63a89 1019
elmot 1:d0dfbce63a89 1020 /**
elmot 1:d0dfbce63a89 1021 * @brief Enable Overrun detection
elmot 1:d0dfbce63a89 1022 * @rmtoll CR3 OVRDIS LL_LPUART_EnableOverrunDetect
elmot 1:d0dfbce63a89 1023 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1024 * @retval None
elmot 1:d0dfbce63a89 1025 */
elmot 1:d0dfbce63a89 1026 __STATIC_INLINE void LL_LPUART_EnableOverrunDetect(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1027 {
elmot 1:d0dfbce63a89 1028 CLEAR_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
elmot 1:d0dfbce63a89 1029 }
elmot 1:d0dfbce63a89 1030
elmot 1:d0dfbce63a89 1031 /**
elmot 1:d0dfbce63a89 1032 * @brief Disable Overrun detection
elmot 1:d0dfbce63a89 1033 * @rmtoll CR3 OVRDIS LL_LPUART_DisableOverrunDetect
elmot 1:d0dfbce63a89 1034 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1035 * @retval None
elmot 1:d0dfbce63a89 1036 */
elmot 1:d0dfbce63a89 1037 __STATIC_INLINE void LL_LPUART_DisableOverrunDetect(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1038 {
elmot 1:d0dfbce63a89 1039 SET_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
elmot 1:d0dfbce63a89 1040 }
elmot 1:d0dfbce63a89 1041
elmot 1:d0dfbce63a89 1042 /**
elmot 1:d0dfbce63a89 1043 * @brief Indicate if Overrun detection is enabled
elmot 1:d0dfbce63a89 1044 * @rmtoll CR3 OVRDIS LL_LPUART_IsEnabledOverrunDetect
elmot 1:d0dfbce63a89 1045 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1046 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1047 */
elmot 1:d0dfbce63a89 1048 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledOverrunDetect(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1049 {
elmot 1:d0dfbce63a89 1050 return (READ_BIT(LPUARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS);
elmot 1:d0dfbce63a89 1051 }
elmot 1:d0dfbce63a89 1052
elmot 1:d0dfbce63a89 1053 /**
elmot 1:d0dfbce63a89 1054 * @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits)
elmot 1:d0dfbce63a89 1055 * @rmtoll CR3 WUS LL_LPUART_SetWKUPType
elmot 1:d0dfbce63a89 1056 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1057 * @param Type This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1058 * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
elmot 1:d0dfbce63a89 1059 * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
elmot 1:d0dfbce63a89 1060 * @arg @ref LL_LPUART_WAKEUP_ON_RXNE
elmot 1:d0dfbce63a89 1061 * @retval None
elmot 1:d0dfbce63a89 1062 */
elmot 1:d0dfbce63a89 1063 __STATIC_INLINE void LL_LPUART_SetWKUPType(USART_TypeDef *LPUARTx, uint32_t Type)
elmot 1:d0dfbce63a89 1064 {
elmot 1:d0dfbce63a89 1065 MODIFY_REG(LPUARTx->CR3, USART_CR3_WUS, Type);
elmot 1:d0dfbce63a89 1066 }
elmot 1:d0dfbce63a89 1067
elmot 1:d0dfbce63a89 1068 /**
elmot 1:d0dfbce63a89 1069 * @brief Return event type for Wake UP Interrupt Flag (WUS[1:0] bits)
elmot 1:d0dfbce63a89 1070 * @rmtoll CR3 WUS LL_LPUART_GetWKUPType
elmot 1:d0dfbce63a89 1071 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1072 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 1073 * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
elmot 1:d0dfbce63a89 1074 * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
elmot 1:d0dfbce63a89 1075 * @arg @ref LL_LPUART_WAKEUP_ON_RXNE
elmot 1:d0dfbce63a89 1076 */
elmot 1:d0dfbce63a89 1077 __STATIC_INLINE uint32_t LL_LPUART_GetWKUPType(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1078 {
elmot 1:d0dfbce63a89 1079 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_WUS));
elmot 1:d0dfbce63a89 1080 }
elmot 1:d0dfbce63a89 1081
elmot 1:d0dfbce63a89 1082 /**
elmot 1:d0dfbce63a89 1083 * @brief Configure LPUART BRR register for achieving expected Baud Rate value.
elmot 1:d0dfbce63a89 1084 *
elmot 1:d0dfbce63a89 1085 * @note Compute and set LPUARTDIV value in BRR Register (full BRR content)
elmot 1:d0dfbce63a89 1086 * according to used Peripheral Clock and expected Baud Rate values
elmot 1:d0dfbce63a89 1087 * @note Peripheral clock and Baud Rate values provided as function parameters should be valid
elmot 1:d0dfbce63a89 1088 * (Baud rate value != 0).
elmot 1:d0dfbce63a89 1089 * @note Provided that LPUARTx_BRR must be > = 0x300 and LPUART_BRR is 20-bit,
elmot 1:d0dfbce63a89 1090 * a care should be taken when generating high baud rates using high PeriphClk
elmot 1:d0dfbce63a89 1091 * values. PeriphClk must be in the range [3 x BaudRate, 4096 x BaudRate].
elmot 1:d0dfbce63a89 1092 * @rmtoll BRR BRR LL_LPUART_SetBaudRate
elmot 1:d0dfbce63a89 1093 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1094 * @param PeriphClk Peripheral Clock
elmot 1:d0dfbce63a89 1095 * @param BaudRate Baud Rate
elmot 1:d0dfbce63a89 1096 * @retval None
elmot 1:d0dfbce63a89 1097 */
elmot 1:d0dfbce63a89 1098 __STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t BaudRate)
elmot 1:d0dfbce63a89 1099 {
elmot 1:d0dfbce63a89 1100 LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate);
elmot 1:d0dfbce63a89 1101 }
elmot 1:d0dfbce63a89 1102
elmot 1:d0dfbce63a89 1103 /**
elmot 1:d0dfbce63a89 1104 * @brief Return current Baud Rate value, according to LPUARTDIV present in BRR register
elmot 1:d0dfbce63a89 1105 * (full BRR content), and to used Peripheral Clock values
elmot 1:d0dfbce63a89 1106 * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
elmot 1:d0dfbce63a89 1107 * @rmtoll BRR BRR LL_LPUART_GetBaudRate
elmot 1:d0dfbce63a89 1108 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1109 * @param PeriphClk Peripheral Clock
elmot 1:d0dfbce63a89 1110 * @retval Baud Rate
elmot 1:d0dfbce63a89 1111 */
elmot 1:d0dfbce63a89 1112 __STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk)
elmot 1:d0dfbce63a89 1113 {
elmot 1:d0dfbce63a89 1114 register uint32_t lpuartdiv = 0x0U;
elmot 1:d0dfbce63a89 1115 register uint32_t brrresult = 0x0U;
elmot 1:d0dfbce63a89 1116
elmot 1:d0dfbce63a89 1117 lpuartdiv = LPUARTx->BRR & LPUART_BRR_MASK;
elmot 1:d0dfbce63a89 1118
elmot 1:d0dfbce63a89 1119 if (lpuartdiv >= LPUART_BRR_MIN_VALUE)
elmot 1:d0dfbce63a89 1120 {
elmot 1:d0dfbce63a89 1121 brrresult = (uint32_t)(((uint64_t)(PeriphClk) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv);
elmot 1:d0dfbce63a89 1122 }
elmot 1:d0dfbce63a89 1123
elmot 1:d0dfbce63a89 1124 return (brrresult);
elmot 1:d0dfbce63a89 1125 }
elmot 1:d0dfbce63a89 1126
elmot 1:d0dfbce63a89 1127 /**
elmot 1:d0dfbce63a89 1128 * @}
elmot 1:d0dfbce63a89 1129 */
elmot 1:d0dfbce63a89 1130
elmot 1:d0dfbce63a89 1131 /** @defgroup LPUART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
elmot 1:d0dfbce63a89 1132 * @{
elmot 1:d0dfbce63a89 1133 */
elmot 1:d0dfbce63a89 1134
elmot 1:d0dfbce63a89 1135 /**
elmot 1:d0dfbce63a89 1136 * @brief Enable Single Wire Half-Duplex mode
elmot 1:d0dfbce63a89 1137 * @rmtoll CR3 HDSEL LL_LPUART_EnableHalfDuplex
elmot 1:d0dfbce63a89 1138 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1139 * @retval None
elmot 1:d0dfbce63a89 1140 */
elmot 1:d0dfbce63a89 1141 __STATIC_INLINE void LL_LPUART_EnableHalfDuplex(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1142 {
elmot 1:d0dfbce63a89 1143 SET_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
elmot 1:d0dfbce63a89 1144 }
elmot 1:d0dfbce63a89 1145
elmot 1:d0dfbce63a89 1146 /**
elmot 1:d0dfbce63a89 1147 * @brief Disable Single Wire Half-Duplex mode
elmot 1:d0dfbce63a89 1148 * @rmtoll CR3 HDSEL LL_LPUART_DisableHalfDuplex
elmot 1:d0dfbce63a89 1149 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1150 * @retval None
elmot 1:d0dfbce63a89 1151 */
elmot 1:d0dfbce63a89 1152 __STATIC_INLINE void LL_LPUART_DisableHalfDuplex(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1153 {
elmot 1:d0dfbce63a89 1154 CLEAR_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
elmot 1:d0dfbce63a89 1155 }
elmot 1:d0dfbce63a89 1156
elmot 1:d0dfbce63a89 1157 /**
elmot 1:d0dfbce63a89 1158 * @brief Indicate if Single Wire Half-Duplex mode is enabled
elmot 1:d0dfbce63a89 1159 * @rmtoll CR3 HDSEL LL_LPUART_IsEnabledHalfDuplex
elmot 1:d0dfbce63a89 1160 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1161 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1162 */
elmot 1:d0dfbce63a89 1163 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledHalfDuplex(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1164 {
elmot 1:d0dfbce63a89 1165 return (READ_BIT(LPUARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
elmot 1:d0dfbce63a89 1166 }
elmot 1:d0dfbce63a89 1167
elmot 1:d0dfbce63a89 1168 /**
elmot 1:d0dfbce63a89 1169 * @}
elmot 1:d0dfbce63a89 1170 */
elmot 1:d0dfbce63a89 1171
elmot 1:d0dfbce63a89 1172 /** @defgroup LPUART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature
elmot 1:d0dfbce63a89 1173 * @{
elmot 1:d0dfbce63a89 1174 */
elmot 1:d0dfbce63a89 1175
elmot 1:d0dfbce63a89 1176 /**
elmot 1:d0dfbce63a89 1177 * @brief Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits).
elmot 1:d0dfbce63a89 1178 * @rmtoll CR1 DEDT LL_LPUART_SetDEDeassertionTime
elmot 1:d0dfbce63a89 1179 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1180 * @param Time Value between Min_Data=0 and Max_Data=31
elmot 1:d0dfbce63a89 1181 * @retval None
elmot 1:d0dfbce63a89 1182 */
elmot 1:d0dfbce63a89 1183 __STATIC_INLINE void LL_LPUART_SetDEDeassertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
elmot 1:d0dfbce63a89 1184 {
elmot 1:d0dfbce63a89 1185 MODIFY_REG(LPUARTx->CR1, USART_CR1_DEDT, Time << LPUART_POSITION_CR1_DEDT);
elmot 1:d0dfbce63a89 1186 }
elmot 1:d0dfbce63a89 1187
elmot 1:d0dfbce63a89 1188 /**
elmot 1:d0dfbce63a89 1189 * @brief Return DEDT (Driver Enable De-Assertion Time)
elmot 1:d0dfbce63a89 1190 * @rmtoll CR1 DEDT LL_LPUART_GetDEDeassertionTime
elmot 1:d0dfbce63a89 1191 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1192 * @retval Time value expressed on 5 bits ([4:0] bits) : c
elmot 1:d0dfbce63a89 1193 */
elmot 1:d0dfbce63a89 1194 __STATIC_INLINE uint32_t LL_LPUART_GetDEDeassertionTime(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1195 {
elmot 1:d0dfbce63a89 1196 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEDT) >> LPUART_POSITION_CR1_DEDT);
elmot 1:d0dfbce63a89 1197 }
elmot 1:d0dfbce63a89 1198
elmot 1:d0dfbce63a89 1199 /**
elmot 1:d0dfbce63a89 1200 * @brief Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits).
elmot 1:d0dfbce63a89 1201 * @rmtoll CR1 DEAT LL_LPUART_SetDEAssertionTime
elmot 1:d0dfbce63a89 1202 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1203 * @param Time Value between Min_Data=0 and Max_Data=31
elmot 1:d0dfbce63a89 1204 * @retval None
elmot 1:d0dfbce63a89 1205 */
elmot 1:d0dfbce63a89 1206 __STATIC_INLINE void LL_LPUART_SetDEAssertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
elmot 1:d0dfbce63a89 1207 {
elmot 1:d0dfbce63a89 1208 MODIFY_REG(LPUARTx->CR1, USART_CR1_DEAT, Time << LPUART_POSITION_CR1_DEAT);
elmot 1:d0dfbce63a89 1209 }
elmot 1:d0dfbce63a89 1210
elmot 1:d0dfbce63a89 1211 /**
elmot 1:d0dfbce63a89 1212 * @brief Return DEAT (Driver Enable Assertion Time)
elmot 1:d0dfbce63a89 1213 * @rmtoll CR1 DEAT LL_LPUART_GetDEAssertionTime
elmot 1:d0dfbce63a89 1214 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1215 * @retval Time value expressed on 5 bits ([4:0] bits) : Time Value between Min_Data=0 and Max_Data=31
elmot 1:d0dfbce63a89 1216 */
elmot 1:d0dfbce63a89 1217 __STATIC_INLINE uint32_t LL_LPUART_GetDEAssertionTime(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1218 {
elmot 1:d0dfbce63a89 1219 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEAT) >> LPUART_POSITION_CR1_DEAT);
elmot 1:d0dfbce63a89 1220 }
elmot 1:d0dfbce63a89 1221
elmot 1:d0dfbce63a89 1222 /**
elmot 1:d0dfbce63a89 1223 * @brief Enable Driver Enable (DE) Mode
elmot 1:d0dfbce63a89 1224 * @rmtoll CR3 DEM LL_LPUART_EnableDEMode
elmot 1:d0dfbce63a89 1225 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1226 * @retval None
elmot 1:d0dfbce63a89 1227 */
elmot 1:d0dfbce63a89 1228 __STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1229 {
elmot 1:d0dfbce63a89 1230 SET_BIT(LPUARTx->CR3, USART_CR3_DEM);
elmot 1:d0dfbce63a89 1231 }
elmot 1:d0dfbce63a89 1232
elmot 1:d0dfbce63a89 1233 /**
elmot 1:d0dfbce63a89 1234 * @brief Disable Driver Enable (DE) Mode
elmot 1:d0dfbce63a89 1235 * @rmtoll CR3 DEM LL_LPUART_DisableDEMode
elmot 1:d0dfbce63a89 1236 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1237 * @retval None
elmot 1:d0dfbce63a89 1238 */
elmot 1:d0dfbce63a89 1239 __STATIC_INLINE void LL_LPUART_DisableDEMode(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1240 {
elmot 1:d0dfbce63a89 1241 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DEM);
elmot 1:d0dfbce63a89 1242 }
elmot 1:d0dfbce63a89 1243
elmot 1:d0dfbce63a89 1244 /**
elmot 1:d0dfbce63a89 1245 * @brief Indicate if Driver Enable (DE) Mode is enabled
elmot 1:d0dfbce63a89 1246 * @rmtoll CR3 DEM LL_LPUART_IsEnabledDEMode
elmot 1:d0dfbce63a89 1247 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1248 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1249 */
elmot 1:d0dfbce63a89 1250 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDEMode(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1251 {
elmot 1:d0dfbce63a89 1252 return (READ_BIT(LPUARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM));
elmot 1:d0dfbce63a89 1253 }
elmot 1:d0dfbce63a89 1254
elmot 1:d0dfbce63a89 1255 /**
elmot 1:d0dfbce63a89 1256 * @brief Select Driver Enable Polarity
elmot 1:d0dfbce63a89 1257 * @rmtoll CR3 DEP LL_LPUART_SetDESignalPolarity
elmot 1:d0dfbce63a89 1258 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1259 * @param Polarity This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1260 * @arg @ref LL_LPUART_DE_POLARITY_HIGH
elmot 1:d0dfbce63a89 1261 * @arg @ref LL_LPUART_DE_POLARITY_LOW
elmot 1:d0dfbce63a89 1262 * @retval None
elmot 1:d0dfbce63a89 1263 */
elmot 1:d0dfbce63a89 1264 __STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity)
elmot 1:d0dfbce63a89 1265 {
elmot 1:d0dfbce63a89 1266 MODIFY_REG(LPUARTx->CR3, USART_CR3_DEP, Polarity);
elmot 1:d0dfbce63a89 1267 }
elmot 1:d0dfbce63a89 1268
elmot 1:d0dfbce63a89 1269 /**
elmot 1:d0dfbce63a89 1270 * @brief Return Driver Enable Polarity
elmot 1:d0dfbce63a89 1271 * @rmtoll CR3 DEP LL_LPUART_GetDESignalPolarity
elmot 1:d0dfbce63a89 1272 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1273 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 1274 * @arg @ref LL_LPUART_DE_POLARITY_HIGH
elmot 1:d0dfbce63a89 1275 * @arg @ref LL_LPUART_DE_POLARITY_LOW
elmot 1:d0dfbce63a89 1276 */
elmot 1:d0dfbce63a89 1277 __STATIC_INLINE uint32_t LL_LPUART_GetDESignalPolarity(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1278 {
elmot 1:d0dfbce63a89 1279 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_DEP));
elmot 1:d0dfbce63a89 1280 }
elmot 1:d0dfbce63a89 1281
elmot 1:d0dfbce63a89 1282 /**
elmot 1:d0dfbce63a89 1283 * @}
elmot 1:d0dfbce63a89 1284 */
elmot 1:d0dfbce63a89 1285
elmot 1:d0dfbce63a89 1286 /** @defgroup LPUART_LL_EF_FLAG_Management FLAG_Management
elmot 1:d0dfbce63a89 1287 * @{
elmot 1:d0dfbce63a89 1288 */
elmot 1:d0dfbce63a89 1289
elmot 1:d0dfbce63a89 1290 /**
elmot 1:d0dfbce63a89 1291 * @brief Check if the LPUART Parity Error Flag is set or not
elmot 1:d0dfbce63a89 1292 * @rmtoll ISR PE LL_LPUART_IsActiveFlag_PE
elmot 1:d0dfbce63a89 1293 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1294 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1295 */
elmot 1:d0dfbce63a89 1296 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_PE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1297 {
elmot 1:d0dfbce63a89 1298 return (READ_BIT(LPUARTx->ISR, USART_ISR_PE) == (USART_ISR_PE));
elmot 1:d0dfbce63a89 1299 }
elmot 1:d0dfbce63a89 1300
elmot 1:d0dfbce63a89 1301 /**
elmot 1:d0dfbce63a89 1302 * @brief Check if the LPUART Framing Error Flag is set or not
elmot 1:d0dfbce63a89 1303 * @rmtoll ISR FE LL_LPUART_IsActiveFlag_FE
elmot 1:d0dfbce63a89 1304 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1305 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1306 */
elmot 1:d0dfbce63a89 1307 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_FE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1308 {
elmot 1:d0dfbce63a89 1309 return (READ_BIT(LPUARTx->ISR, USART_ISR_FE) == (USART_ISR_FE));
elmot 1:d0dfbce63a89 1310 }
elmot 1:d0dfbce63a89 1311
elmot 1:d0dfbce63a89 1312 /**
elmot 1:d0dfbce63a89 1313 * @brief Check if the LPUART Noise detected Flag is set or not
elmot 1:d0dfbce63a89 1314 * @rmtoll ISR NE LL_LPUART_IsActiveFlag_NE
elmot 1:d0dfbce63a89 1315 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1316 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1317 */
elmot 1:d0dfbce63a89 1318 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_NE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1319 {
elmot 1:d0dfbce63a89 1320 return (READ_BIT(LPUARTx->ISR, USART_ISR_NE) == (USART_ISR_NE));
elmot 1:d0dfbce63a89 1321 }
elmot 1:d0dfbce63a89 1322
elmot 1:d0dfbce63a89 1323 /**
elmot 1:d0dfbce63a89 1324 * @brief Check if the LPUART OverRun Error Flag is set or not
elmot 1:d0dfbce63a89 1325 * @rmtoll ISR ORE LL_LPUART_IsActiveFlag_ORE
elmot 1:d0dfbce63a89 1326 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1327 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1328 */
elmot 1:d0dfbce63a89 1329 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_ORE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1330 {
elmot 1:d0dfbce63a89 1331 return (READ_BIT(LPUARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE));
elmot 1:d0dfbce63a89 1332 }
elmot 1:d0dfbce63a89 1333
elmot 1:d0dfbce63a89 1334 /**
elmot 1:d0dfbce63a89 1335 * @brief Check if the LPUART IDLE line detected Flag is set or not
elmot 1:d0dfbce63a89 1336 * @rmtoll ISR IDLE LL_LPUART_IsActiveFlag_IDLE
elmot 1:d0dfbce63a89 1337 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1338 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1339 */
elmot 1:d0dfbce63a89 1340 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_IDLE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1341 {
elmot 1:d0dfbce63a89 1342 return (READ_BIT(LPUARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE));
elmot 1:d0dfbce63a89 1343 }
elmot 1:d0dfbce63a89 1344
elmot 1:d0dfbce63a89 1345 /**
elmot 1:d0dfbce63a89 1346 * @brief Check if the LPUART Read Data Register Not Empty Flag is set or not
elmot 1:d0dfbce63a89 1347 * @rmtoll ISR RXNE LL_LPUART_IsActiveFlag_RXNE
elmot 1:d0dfbce63a89 1348 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1349 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1350 */
elmot 1:d0dfbce63a89 1351 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1352 {
elmot 1:d0dfbce63a89 1353 return (READ_BIT(LPUARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE));
elmot 1:d0dfbce63a89 1354 }
elmot 1:d0dfbce63a89 1355
elmot 1:d0dfbce63a89 1356 /**
elmot 1:d0dfbce63a89 1357 * @brief Check if the LPUART Transmission Complete Flag is set or not
elmot 1:d0dfbce63a89 1358 * @rmtoll ISR TC LL_LPUART_IsActiveFlag_TC
elmot 1:d0dfbce63a89 1359 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1360 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1361 */
elmot 1:d0dfbce63a89 1362 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TC(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1363 {
elmot 1:d0dfbce63a89 1364 return (READ_BIT(LPUARTx->ISR, USART_ISR_TC) == (USART_ISR_TC));
elmot 1:d0dfbce63a89 1365 }
elmot 1:d0dfbce63a89 1366
elmot 1:d0dfbce63a89 1367 /**
elmot 1:d0dfbce63a89 1368 * @brief Check if the LPUART Transmit Data Register Empty Flag is set or not
elmot 1:d0dfbce63a89 1369 * @rmtoll ISR TXE LL_LPUART_IsActiveFlag_TXE
elmot 1:d0dfbce63a89 1370 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1371 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1372 */
elmot 1:d0dfbce63a89 1373 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1374 {
elmot 1:d0dfbce63a89 1375 return (READ_BIT(LPUARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE));
elmot 1:d0dfbce63a89 1376 }
elmot 1:d0dfbce63a89 1377
elmot 1:d0dfbce63a89 1378 /**
elmot 1:d0dfbce63a89 1379 * @brief Check if the LPUART CTS interrupt Flag is set or not
elmot 1:d0dfbce63a89 1380 * @rmtoll ISR CTSIF LL_LPUART_IsActiveFlag_nCTS
elmot 1:d0dfbce63a89 1381 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1382 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1383 */
elmot 1:d0dfbce63a89 1384 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_nCTS(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1385 {
elmot 1:d0dfbce63a89 1386 return (READ_BIT(LPUARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF));
elmot 1:d0dfbce63a89 1387 }
elmot 1:d0dfbce63a89 1388
elmot 1:d0dfbce63a89 1389 /**
elmot 1:d0dfbce63a89 1390 * @brief Check if the LPUART CTS Flag is set or not
elmot 1:d0dfbce63a89 1391 * @rmtoll ISR CTS LL_LPUART_IsActiveFlag_CTS
elmot 1:d0dfbce63a89 1392 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1393 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1394 */
elmot 1:d0dfbce63a89 1395 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CTS(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1396 {
elmot 1:d0dfbce63a89 1397 return (READ_BIT(LPUARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS));
elmot 1:d0dfbce63a89 1398 }
elmot 1:d0dfbce63a89 1399
elmot 1:d0dfbce63a89 1400 /**
elmot 1:d0dfbce63a89 1401 * @brief Check if the LPUART Busy Flag is set or not
elmot 1:d0dfbce63a89 1402 * @rmtoll ISR BUSY LL_LPUART_IsActiveFlag_BUSY
elmot 1:d0dfbce63a89 1403 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1404 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1405 */
elmot 1:d0dfbce63a89 1406 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_BUSY(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1407 {
elmot 1:d0dfbce63a89 1408 return (READ_BIT(LPUARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY));
elmot 1:d0dfbce63a89 1409 }
elmot 1:d0dfbce63a89 1410
elmot 1:d0dfbce63a89 1411 /**
elmot 1:d0dfbce63a89 1412 * @brief Check if the LPUART Character Match Flag is set or not
elmot 1:d0dfbce63a89 1413 * @rmtoll ISR CMF LL_LPUART_IsActiveFlag_CM
elmot 1:d0dfbce63a89 1414 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1415 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1416 */
elmot 1:d0dfbce63a89 1417 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CM(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1418 {
elmot 1:d0dfbce63a89 1419 return (READ_BIT(LPUARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF));
elmot 1:d0dfbce63a89 1420 }
elmot 1:d0dfbce63a89 1421
elmot 1:d0dfbce63a89 1422 /**
elmot 1:d0dfbce63a89 1423 * @brief Check if the LPUART Send Break Flag is set or not
elmot 1:d0dfbce63a89 1424 * @rmtoll ISR SBKF LL_LPUART_IsActiveFlag_SBK
elmot 1:d0dfbce63a89 1425 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1426 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1427 */
elmot 1:d0dfbce63a89 1428 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_SBK(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1429 {
elmot 1:d0dfbce63a89 1430 return (READ_BIT(LPUARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF));
elmot 1:d0dfbce63a89 1431 }
elmot 1:d0dfbce63a89 1432
elmot 1:d0dfbce63a89 1433 /**
elmot 1:d0dfbce63a89 1434 * @brief Check if the LPUART Receive Wake Up from mute mode Flag is set or not
elmot 1:d0dfbce63a89 1435 * @rmtoll ISR RWU LL_LPUART_IsActiveFlag_RWU
elmot 1:d0dfbce63a89 1436 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1437 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1438 */
elmot 1:d0dfbce63a89 1439 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RWU(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1440 {
elmot 1:d0dfbce63a89 1441 return (READ_BIT(LPUARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU));
elmot 1:d0dfbce63a89 1442 }
elmot 1:d0dfbce63a89 1443
elmot 1:d0dfbce63a89 1444 /**
elmot 1:d0dfbce63a89 1445 * @brief Check if the LPUART Wake Up from stop mode Flag is set or not
elmot 1:d0dfbce63a89 1446 * @rmtoll ISR WUF LL_LPUART_IsActiveFlag_WKUP
elmot 1:d0dfbce63a89 1447 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1448 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1449 */
elmot 1:d0dfbce63a89 1450 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_WKUP(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1451 {
elmot 1:d0dfbce63a89 1452 return (READ_BIT(LPUARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF));
elmot 1:d0dfbce63a89 1453 }
elmot 1:d0dfbce63a89 1454
elmot 1:d0dfbce63a89 1455 /**
elmot 1:d0dfbce63a89 1456 * @brief Check if the LPUART Transmit Enable Acknowledge Flag is set or not
elmot 1:d0dfbce63a89 1457 * @rmtoll ISR TEACK LL_LPUART_IsActiveFlag_TEACK
elmot 1:d0dfbce63a89 1458 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1459 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1460 */
elmot 1:d0dfbce63a89 1461 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TEACK(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1462 {
elmot 1:d0dfbce63a89 1463 return (READ_BIT(LPUARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK));
elmot 1:d0dfbce63a89 1464 }
elmot 1:d0dfbce63a89 1465
elmot 1:d0dfbce63a89 1466 /**
elmot 1:d0dfbce63a89 1467 * @brief Check if the LPUART Receive Enable Acknowledge Flag is set or not
elmot 1:d0dfbce63a89 1468 * @rmtoll ISR REACK LL_LPUART_IsActiveFlag_REACK
elmot 1:d0dfbce63a89 1469 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1470 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1471 */
elmot 1:d0dfbce63a89 1472 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_REACK(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1473 {
elmot 1:d0dfbce63a89 1474 return (READ_BIT(LPUARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK));
elmot 1:d0dfbce63a89 1475 }
elmot 1:d0dfbce63a89 1476
elmot 1:d0dfbce63a89 1477 /**
elmot 1:d0dfbce63a89 1478 * @brief Clear Parity Error Flag
elmot 1:d0dfbce63a89 1479 * @rmtoll ICR PECF LL_LPUART_ClearFlag_PE
elmot 1:d0dfbce63a89 1480 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1481 * @retval None
elmot 1:d0dfbce63a89 1482 */
elmot 1:d0dfbce63a89 1483 __STATIC_INLINE void LL_LPUART_ClearFlag_PE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1484 {
elmot 1:d0dfbce63a89 1485 WRITE_REG(LPUARTx->ICR, USART_ICR_PECF);
elmot 1:d0dfbce63a89 1486 }
elmot 1:d0dfbce63a89 1487
elmot 1:d0dfbce63a89 1488 /**
elmot 1:d0dfbce63a89 1489 * @brief Clear Framing Error Flag
elmot 1:d0dfbce63a89 1490 * @rmtoll ICR FECF LL_LPUART_ClearFlag_FE
elmot 1:d0dfbce63a89 1491 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1492 * @retval None
elmot 1:d0dfbce63a89 1493 */
elmot 1:d0dfbce63a89 1494 __STATIC_INLINE void LL_LPUART_ClearFlag_FE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1495 {
elmot 1:d0dfbce63a89 1496 WRITE_REG(LPUARTx->ICR, USART_ICR_FECF);
elmot 1:d0dfbce63a89 1497 }
elmot 1:d0dfbce63a89 1498
elmot 1:d0dfbce63a89 1499 /**
elmot 1:d0dfbce63a89 1500 * @brief Clear Noise detected Flag
elmot 1:d0dfbce63a89 1501 * @rmtoll ICR NCF LL_LPUART_ClearFlag_NE
elmot 1:d0dfbce63a89 1502 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1503 * @retval None
elmot 1:d0dfbce63a89 1504 */
elmot 1:d0dfbce63a89 1505 __STATIC_INLINE void LL_LPUART_ClearFlag_NE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1506 {
elmot 1:d0dfbce63a89 1507 WRITE_REG(LPUARTx->ICR, USART_ICR_NCF);
elmot 1:d0dfbce63a89 1508 }
elmot 1:d0dfbce63a89 1509
elmot 1:d0dfbce63a89 1510 /**
elmot 1:d0dfbce63a89 1511 * @brief Clear OverRun Error Flag
elmot 1:d0dfbce63a89 1512 * @rmtoll ICR ORECF LL_LPUART_ClearFlag_ORE
elmot 1:d0dfbce63a89 1513 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1514 * @retval None
elmot 1:d0dfbce63a89 1515 */
elmot 1:d0dfbce63a89 1516 __STATIC_INLINE void LL_LPUART_ClearFlag_ORE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1517 {
elmot 1:d0dfbce63a89 1518 WRITE_REG(LPUARTx->ICR, USART_ICR_ORECF);
elmot 1:d0dfbce63a89 1519 }
elmot 1:d0dfbce63a89 1520
elmot 1:d0dfbce63a89 1521 /**
elmot 1:d0dfbce63a89 1522 * @brief Clear IDLE line detected Flag
elmot 1:d0dfbce63a89 1523 * @rmtoll ICR IDLECF LL_LPUART_ClearFlag_IDLE
elmot 1:d0dfbce63a89 1524 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1525 * @retval None
elmot 1:d0dfbce63a89 1526 */
elmot 1:d0dfbce63a89 1527 __STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1528 {
elmot 1:d0dfbce63a89 1529 WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF);
elmot 1:d0dfbce63a89 1530 }
elmot 1:d0dfbce63a89 1531
elmot 1:d0dfbce63a89 1532 /**
elmot 1:d0dfbce63a89 1533 * @brief Clear Transmission Complete Flag
elmot 1:d0dfbce63a89 1534 * @rmtoll ICR TCCF LL_LPUART_ClearFlag_TC
elmot 1:d0dfbce63a89 1535 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1536 * @retval None
elmot 1:d0dfbce63a89 1537 */
elmot 1:d0dfbce63a89 1538 __STATIC_INLINE void LL_LPUART_ClearFlag_TC(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1539 {
elmot 1:d0dfbce63a89 1540 WRITE_REG(LPUARTx->ICR, USART_ICR_TCCF);
elmot 1:d0dfbce63a89 1541 }
elmot 1:d0dfbce63a89 1542
elmot 1:d0dfbce63a89 1543 /**
elmot 1:d0dfbce63a89 1544 * @brief Clear CTS Interrupt Flag
elmot 1:d0dfbce63a89 1545 * @rmtoll ICR CTSCF LL_LPUART_ClearFlag_nCTS
elmot 1:d0dfbce63a89 1546 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1547 * @retval None
elmot 1:d0dfbce63a89 1548 */
elmot 1:d0dfbce63a89 1549 __STATIC_INLINE void LL_LPUART_ClearFlag_nCTS(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1550 {
elmot 1:d0dfbce63a89 1551 WRITE_REG(LPUARTx->ICR, USART_ICR_CTSCF);
elmot 1:d0dfbce63a89 1552 }
elmot 1:d0dfbce63a89 1553
elmot 1:d0dfbce63a89 1554 /**
elmot 1:d0dfbce63a89 1555 * @brief Clear Character Match Flag
elmot 1:d0dfbce63a89 1556 * @rmtoll ICR CMCF LL_LPUART_ClearFlag_CM
elmot 1:d0dfbce63a89 1557 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1558 * @retval None
elmot 1:d0dfbce63a89 1559 */
elmot 1:d0dfbce63a89 1560 __STATIC_INLINE void LL_LPUART_ClearFlag_CM(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1561 {
elmot 1:d0dfbce63a89 1562 WRITE_REG(LPUARTx->ICR, USART_ICR_CMCF);
elmot 1:d0dfbce63a89 1563 }
elmot 1:d0dfbce63a89 1564
elmot 1:d0dfbce63a89 1565 /**
elmot 1:d0dfbce63a89 1566 * @brief Clear Wake Up from stop mode Flag
elmot 1:d0dfbce63a89 1567 * @rmtoll ICR WUCF LL_LPUART_ClearFlag_WKUP
elmot 1:d0dfbce63a89 1568 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1569 * @retval None
elmot 1:d0dfbce63a89 1570 */
elmot 1:d0dfbce63a89 1571 __STATIC_INLINE void LL_LPUART_ClearFlag_WKUP(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1572 {
elmot 1:d0dfbce63a89 1573 WRITE_REG(LPUARTx->ICR, USART_ICR_WUCF);
elmot 1:d0dfbce63a89 1574 }
elmot 1:d0dfbce63a89 1575
elmot 1:d0dfbce63a89 1576 /**
elmot 1:d0dfbce63a89 1577 * @}
elmot 1:d0dfbce63a89 1578 */
elmot 1:d0dfbce63a89 1579
elmot 1:d0dfbce63a89 1580 /** @defgroup LPUART_LL_EF_IT_Management IT_Management
elmot 1:d0dfbce63a89 1581 * @{
elmot 1:d0dfbce63a89 1582 */
elmot 1:d0dfbce63a89 1583
elmot 1:d0dfbce63a89 1584 /**
elmot 1:d0dfbce63a89 1585 * @brief Enable IDLE Interrupt
elmot 1:d0dfbce63a89 1586 * @rmtoll CR1 IDLEIE LL_LPUART_EnableIT_IDLE
elmot 1:d0dfbce63a89 1587 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1588 * @retval None
elmot 1:d0dfbce63a89 1589 */
elmot 1:d0dfbce63a89 1590 __STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1591 {
elmot 1:d0dfbce63a89 1592 SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
elmot 1:d0dfbce63a89 1593 }
elmot 1:d0dfbce63a89 1594
elmot 1:d0dfbce63a89 1595 /**
elmot 1:d0dfbce63a89 1596 * @brief Enable RX Not Empty Interrupt
elmot 1:d0dfbce63a89 1597 * @rmtoll CR1 RXNEIE LL_LPUART_EnableIT_RXNE
elmot 1:d0dfbce63a89 1598 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1599 * @retval None
elmot 1:d0dfbce63a89 1600 */
elmot 1:d0dfbce63a89 1601 __STATIC_INLINE void LL_LPUART_EnableIT_RXNE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1602 {
elmot 1:d0dfbce63a89 1603 SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
elmot 1:d0dfbce63a89 1604 }
elmot 1:d0dfbce63a89 1605
elmot 1:d0dfbce63a89 1606 /**
elmot 1:d0dfbce63a89 1607 * @brief Enable Transmission Complete Interrupt
elmot 1:d0dfbce63a89 1608 * @rmtoll CR1 TCIE LL_LPUART_EnableIT_TC
elmot 1:d0dfbce63a89 1609 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1610 * @retval None
elmot 1:d0dfbce63a89 1611 */
elmot 1:d0dfbce63a89 1612 __STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1613 {
elmot 1:d0dfbce63a89 1614 SET_BIT(LPUARTx->CR1, USART_CR1_TCIE);
elmot 1:d0dfbce63a89 1615 }
elmot 1:d0dfbce63a89 1616
elmot 1:d0dfbce63a89 1617 /**
elmot 1:d0dfbce63a89 1618 * @brief Enable TX Empty Interrupt
elmot 1:d0dfbce63a89 1619 * @rmtoll CR1 TXEIE LL_LPUART_EnableIT_TXE
elmot 1:d0dfbce63a89 1620 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1621 * @retval None
elmot 1:d0dfbce63a89 1622 */
elmot 1:d0dfbce63a89 1623 __STATIC_INLINE void LL_LPUART_EnableIT_TXE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1624 {
elmot 1:d0dfbce63a89 1625 SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
elmot 1:d0dfbce63a89 1626 }
elmot 1:d0dfbce63a89 1627
elmot 1:d0dfbce63a89 1628 /**
elmot 1:d0dfbce63a89 1629 * @brief Enable Parity Error Interrupt
elmot 1:d0dfbce63a89 1630 * @rmtoll CR1 PEIE LL_LPUART_EnableIT_PE
elmot 1:d0dfbce63a89 1631 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1632 * @retval None
elmot 1:d0dfbce63a89 1633 */
elmot 1:d0dfbce63a89 1634 __STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1635 {
elmot 1:d0dfbce63a89 1636 SET_BIT(LPUARTx->CR1, USART_CR1_PEIE);
elmot 1:d0dfbce63a89 1637 }
elmot 1:d0dfbce63a89 1638
elmot 1:d0dfbce63a89 1639 /**
elmot 1:d0dfbce63a89 1640 * @brief Enable Character Match Interrupt
elmot 1:d0dfbce63a89 1641 * @rmtoll CR1 CMIE LL_LPUART_EnableIT_CM
elmot 1:d0dfbce63a89 1642 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1643 * @retval None
elmot 1:d0dfbce63a89 1644 */
elmot 1:d0dfbce63a89 1645 __STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1646 {
elmot 1:d0dfbce63a89 1647 SET_BIT(LPUARTx->CR1, USART_CR1_CMIE);
elmot 1:d0dfbce63a89 1648 }
elmot 1:d0dfbce63a89 1649
elmot 1:d0dfbce63a89 1650 /**
elmot 1:d0dfbce63a89 1651 * @brief Enable Error Interrupt
elmot 1:d0dfbce63a89 1652 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
elmot 1:d0dfbce63a89 1653 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register).
elmot 1:d0dfbce63a89 1654 * - 0: Interrupt is inhibited
elmot 1:d0dfbce63a89 1655 * - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register.
elmot 1:d0dfbce63a89 1656 * @rmtoll CR3 EIE LL_LPUART_EnableIT_ERROR
elmot 1:d0dfbce63a89 1657 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1658 * @retval None
elmot 1:d0dfbce63a89 1659 */
elmot 1:d0dfbce63a89 1660 __STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1661 {
elmot 1:d0dfbce63a89 1662 SET_BIT(LPUARTx->CR3, USART_CR3_EIE);
elmot 1:d0dfbce63a89 1663 }
elmot 1:d0dfbce63a89 1664
elmot 1:d0dfbce63a89 1665 /**
elmot 1:d0dfbce63a89 1666 * @brief Enable CTS Interrupt
elmot 1:d0dfbce63a89 1667 * @rmtoll CR3 CTSIE LL_LPUART_EnableIT_CTS
elmot 1:d0dfbce63a89 1668 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1669 * @retval None
elmot 1:d0dfbce63a89 1670 */
elmot 1:d0dfbce63a89 1671 __STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1672 {
elmot 1:d0dfbce63a89 1673 SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
elmot 1:d0dfbce63a89 1674 }
elmot 1:d0dfbce63a89 1675
elmot 1:d0dfbce63a89 1676 /**
elmot 1:d0dfbce63a89 1677 * @brief Enable Wake Up from Stop Mode Interrupt
elmot 1:d0dfbce63a89 1678 * @rmtoll CR3 WUFIE LL_LPUART_EnableIT_WKUP
elmot 1:d0dfbce63a89 1679 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1680 * @retval None
elmot 1:d0dfbce63a89 1681 */
elmot 1:d0dfbce63a89 1682 __STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1683 {
elmot 1:d0dfbce63a89 1684 SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
elmot 1:d0dfbce63a89 1685 }
elmot 1:d0dfbce63a89 1686
elmot 1:d0dfbce63a89 1687 /**
elmot 1:d0dfbce63a89 1688 * @brief Disable IDLE Interrupt
elmot 1:d0dfbce63a89 1689 * @rmtoll CR1 IDLEIE LL_LPUART_DisableIT_IDLE
elmot 1:d0dfbce63a89 1690 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1691 * @retval None
elmot 1:d0dfbce63a89 1692 */
elmot 1:d0dfbce63a89 1693 __STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1694 {
elmot 1:d0dfbce63a89 1695 CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
elmot 1:d0dfbce63a89 1696 }
elmot 1:d0dfbce63a89 1697
elmot 1:d0dfbce63a89 1698 /**
elmot 1:d0dfbce63a89 1699 * @brief Disable RX Not Empty Interrupt
elmot 1:d0dfbce63a89 1700 * @rmtoll CR1 RXNEIE LL_LPUART_DisableIT_RXNE
elmot 1:d0dfbce63a89 1701 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1702 * @retval None
elmot 1:d0dfbce63a89 1703 */
elmot 1:d0dfbce63a89 1704 __STATIC_INLINE void LL_LPUART_DisableIT_RXNE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1705 {
elmot 1:d0dfbce63a89 1706 CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
elmot 1:d0dfbce63a89 1707 }
elmot 1:d0dfbce63a89 1708
elmot 1:d0dfbce63a89 1709 /**
elmot 1:d0dfbce63a89 1710 * @brief Disable Transmission Complete Interrupt
elmot 1:d0dfbce63a89 1711 * @rmtoll CR1 TCIE LL_LPUART_DisableIT_TC
elmot 1:d0dfbce63a89 1712 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1713 * @retval None
elmot 1:d0dfbce63a89 1714 */
elmot 1:d0dfbce63a89 1715 __STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1716 {
elmot 1:d0dfbce63a89 1717 CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE);
elmot 1:d0dfbce63a89 1718 }
elmot 1:d0dfbce63a89 1719
elmot 1:d0dfbce63a89 1720 /**
elmot 1:d0dfbce63a89 1721 * @brief Disable TX Empty Interrupt
elmot 1:d0dfbce63a89 1722 * @rmtoll CR1 TXEIE LL_LPUART_DisableIT_TXE
elmot 1:d0dfbce63a89 1723 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1724 * @retval None
elmot 1:d0dfbce63a89 1725 */
elmot 1:d0dfbce63a89 1726 __STATIC_INLINE void LL_LPUART_DisableIT_TXE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1727 {
elmot 1:d0dfbce63a89 1728 CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
elmot 1:d0dfbce63a89 1729 }
elmot 1:d0dfbce63a89 1730
elmot 1:d0dfbce63a89 1731 /**
elmot 1:d0dfbce63a89 1732 * @brief Disable Parity Error Interrupt
elmot 1:d0dfbce63a89 1733 * @rmtoll CR1 PEIE LL_LPUART_DisableIT_PE
elmot 1:d0dfbce63a89 1734 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1735 * @retval None
elmot 1:d0dfbce63a89 1736 */
elmot 1:d0dfbce63a89 1737 __STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1738 {
elmot 1:d0dfbce63a89 1739 CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE);
elmot 1:d0dfbce63a89 1740 }
elmot 1:d0dfbce63a89 1741
elmot 1:d0dfbce63a89 1742 /**
elmot 1:d0dfbce63a89 1743 * @brief Disable Character Match Interrupt
elmot 1:d0dfbce63a89 1744 * @rmtoll CR1 CMIE LL_LPUART_DisableIT_CM
elmot 1:d0dfbce63a89 1745 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1746 * @retval None
elmot 1:d0dfbce63a89 1747 */
elmot 1:d0dfbce63a89 1748 __STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1749 {
elmot 1:d0dfbce63a89 1750 CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE);
elmot 1:d0dfbce63a89 1751 }
elmot 1:d0dfbce63a89 1752
elmot 1:d0dfbce63a89 1753 /**
elmot 1:d0dfbce63a89 1754 * @brief Disable Error Interrupt
elmot 1:d0dfbce63a89 1755 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
elmot 1:d0dfbce63a89 1756 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register).
elmot 1:d0dfbce63a89 1757 * - 0: Interrupt is inhibited
elmot 1:d0dfbce63a89 1758 * - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register.
elmot 1:d0dfbce63a89 1759 * @rmtoll CR3 EIE LL_LPUART_DisableIT_ERROR
elmot 1:d0dfbce63a89 1760 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1761 * @retval None
elmot 1:d0dfbce63a89 1762 */
elmot 1:d0dfbce63a89 1763 __STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1764 {
elmot 1:d0dfbce63a89 1765 CLEAR_BIT(LPUARTx->CR3, USART_CR3_EIE);
elmot 1:d0dfbce63a89 1766 }
elmot 1:d0dfbce63a89 1767
elmot 1:d0dfbce63a89 1768 /**
elmot 1:d0dfbce63a89 1769 * @brief Disable CTS Interrupt
elmot 1:d0dfbce63a89 1770 * @rmtoll CR3 CTSIE LL_LPUART_DisableIT_CTS
elmot 1:d0dfbce63a89 1771 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1772 * @retval None
elmot 1:d0dfbce63a89 1773 */
elmot 1:d0dfbce63a89 1774 __STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1775 {
elmot 1:d0dfbce63a89 1776 CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
elmot 1:d0dfbce63a89 1777 }
elmot 1:d0dfbce63a89 1778
elmot 1:d0dfbce63a89 1779 /**
elmot 1:d0dfbce63a89 1780 * @brief Disable Wake Up from Stop Mode Interrupt
elmot 1:d0dfbce63a89 1781 * @rmtoll CR3 WUFIE LL_LPUART_DisableIT_WKUP
elmot 1:d0dfbce63a89 1782 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1783 * @retval None
elmot 1:d0dfbce63a89 1784 */
elmot 1:d0dfbce63a89 1785 __STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1786 {
elmot 1:d0dfbce63a89 1787 CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
elmot 1:d0dfbce63a89 1788 }
elmot 1:d0dfbce63a89 1789
elmot 1:d0dfbce63a89 1790 /**
elmot 1:d0dfbce63a89 1791 * @brief Check if the LPUART IDLE Interrupt source is enabled or disabled.
elmot 1:d0dfbce63a89 1792 * @rmtoll CR1 IDLEIE LL_LPUART_IsEnabledIT_IDLE
elmot 1:d0dfbce63a89 1793 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1794 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1795 */
elmot 1:d0dfbce63a89 1796 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_IDLE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1797 {
elmot 1:d0dfbce63a89 1798 return (READ_BIT(LPUARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
elmot 1:d0dfbce63a89 1799 }
elmot 1:d0dfbce63a89 1800
elmot 1:d0dfbce63a89 1801 /**
elmot 1:d0dfbce63a89 1802 * @brief Check if the LPUART RX Not Empty Interrupt is enabled or disabled.
elmot 1:d0dfbce63a89 1803 * @rmtoll CR1 RXNEIE LL_LPUART_IsEnabledIT_RXNE
elmot 1:d0dfbce63a89 1804 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1805 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1806 */
elmot 1:d0dfbce63a89 1807 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1808 {
elmot 1:d0dfbce63a89 1809 return (READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
elmot 1:d0dfbce63a89 1810 }
elmot 1:d0dfbce63a89 1811
elmot 1:d0dfbce63a89 1812 /**
elmot 1:d0dfbce63a89 1813 * @brief Check if the LPUART Transmission Complete Interrupt is enabled or disabled.
elmot 1:d0dfbce63a89 1814 * @rmtoll CR1 TCIE LL_LPUART_IsEnabledIT_TC
elmot 1:d0dfbce63a89 1815 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1816 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1817 */
elmot 1:d0dfbce63a89 1818 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TC(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1819 {
elmot 1:d0dfbce63a89 1820 return (READ_BIT(LPUARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
elmot 1:d0dfbce63a89 1821 }
elmot 1:d0dfbce63a89 1822
elmot 1:d0dfbce63a89 1823 /**
elmot 1:d0dfbce63a89 1824 * @brief Check if the LPUART TX Empty Interrupt is enabled or disabled.
elmot 1:d0dfbce63a89 1825 * @rmtoll CR1 TXEIE LL_LPUART_IsEnabledIT_TXE
elmot 1:d0dfbce63a89 1826 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1827 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1828 */
elmot 1:d0dfbce63a89 1829 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1830 {
elmot 1:d0dfbce63a89 1831 return (READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
elmot 1:d0dfbce63a89 1832 }
elmot 1:d0dfbce63a89 1833
elmot 1:d0dfbce63a89 1834 /**
elmot 1:d0dfbce63a89 1835 * @brief Check if the LPUART Parity Error Interrupt is enabled or disabled.
elmot 1:d0dfbce63a89 1836 * @rmtoll CR1 PEIE LL_LPUART_IsEnabledIT_PE
elmot 1:d0dfbce63a89 1837 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1838 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1839 */
elmot 1:d0dfbce63a89 1840 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_PE(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1841 {
elmot 1:d0dfbce63a89 1842 return (READ_BIT(LPUARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
elmot 1:d0dfbce63a89 1843 }
elmot 1:d0dfbce63a89 1844
elmot 1:d0dfbce63a89 1845 /**
elmot 1:d0dfbce63a89 1846 * @brief Check if the LPUART Character Match Interrupt is enabled or disabled.
elmot 1:d0dfbce63a89 1847 * @rmtoll CR1 CMIE LL_LPUART_IsEnabledIT_CM
elmot 1:d0dfbce63a89 1848 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1849 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1850 */
elmot 1:d0dfbce63a89 1851 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CM(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1852 {
elmot 1:d0dfbce63a89 1853 return (READ_BIT(LPUARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE));
elmot 1:d0dfbce63a89 1854 }
elmot 1:d0dfbce63a89 1855
elmot 1:d0dfbce63a89 1856 /**
elmot 1:d0dfbce63a89 1857 * @brief Check if the LPUART Error Interrupt is enabled or disabled.
elmot 1:d0dfbce63a89 1858 * @rmtoll CR3 EIE LL_LPUART_IsEnabledIT_ERROR
elmot 1:d0dfbce63a89 1859 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1860 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1861 */
elmot 1:d0dfbce63a89 1862 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_ERROR(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1863 {
elmot 1:d0dfbce63a89 1864 return (READ_BIT(LPUARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
elmot 1:d0dfbce63a89 1865 }
elmot 1:d0dfbce63a89 1866
elmot 1:d0dfbce63a89 1867 /**
elmot 1:d0dfbce63a89 1868 * @brief Check if the LPUART CTS Interrupt is enabled or disabled.
elmot 1:d0dfbce63a89 1869 * @rmtoll CR3 CTSIE LL_LPUART_IsEnabledIT_CTS
elmot 1:d0dfbce63a89 1870 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1871 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1872 */
elmot 1:d0dfbce63a89 1873 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CTS(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1874 {
elmot 1:d0dfbce63a89 1875 return (READ_BIT(LPUARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
elmot 1:d0dfbce63a89 1876 }
elmot 1:d0dfbce63a89 1877
elmot 1:d0dfbce63a89 1878 /**
elmot 1:d0dfbce63a89 1879 * @brief Check if the LPUART Wake Up from Stop Mode Interrupt is enabled or disabled.
elmot 1:d0dfbce63a89 1880 * @rmtoll CR3 WUFIE LL_LPUART_IsEnabledIT_WKUP
elmot 1:d0dfbce63a89 1881 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1882 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1883 */
elmot 1:d0dfbce63a89 1884 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_WKUP(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1885 {
elmot 1:d0dfbce63a89 1886 return (READ_BIT(LPUARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE));
elmot 1:d0dfbce63a89 1887 }
elmot 1:d0dfbce63a89 1888
elmot 1:d0dfbce63a89 1889 /**
elmot 1:d0dfbce63a89 1890 * @}
elmot 1:d0dfbce63a89 1891 */
elmot 1:d0dfbce63a89 1892
elmot 1:d0dfbce63a89 1893 /** @defgroup LPUART_LL_EF_DMA_Management DMA_Management
elmot 1:d0dfbce63a89 1894 * @{
elmot 1:d0dfbce63a89 1895 */
elmot 1:d0dfbce63a89 1896
elmot 1:d0dfbce63a89 1897 /**
elmot 1:d0dfbce63a89 1898 * @brief Enable DMA Mode for reception
elmot 1:d0dfbce63a89 1899 * @rmtoll CR3 DMAR LL_LPUART_EnableDMAReq_RX
elmot 1:d0dfbce63a89 1900 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1901 * @retval None
elmot 1:d0dfbce63a89 1902 */
elmot 1:d0dfbce63a89 1903 __STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1904 {
elmot 1:d0dfbce63a89 1905 SET_BIT(LPUARTx->CR3, USART_CR3_DMAR);
elmot 1:d0dfbce63a89 1906 }
elmot 1:d0dfbce63a89 1907
elmot 1:d0dfbce63a89 1908 /**
elmot 1:d0dfbce63a89 1909 * @brief Disable DMA Mode for reception
elmot 1:d0dfbce63a89 1910 * @rmtoll CR3 DMAR LL_LPUART_DisableDMAReq_RX
elmot 1:d0dfbce63a89 1911 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1912 * @retval None
elmot 1:d0dfbce63a89 1913 */
elmot 1:d0dfbce63a89 1914 __STATIC_INLINE void LL_LPUART_DisableDMAReq_RX(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1915 {
elmot 1:d0dfbce63a89 1916 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR);
elmot 1:d0dfbce63a89 1917 }
elmot 1:d0dfbce63a89 1918
elmot 1:d0dfbce63a89 1919 /**
elmot 1:d0dfbce63a89 1920 * @brief Check if DMA Mode is enabled for reception
elmot 1:d0dfbce63a89 1921 * @rmtoll CR3 DMAR LL_LPUART_IsEnabledDMAReq_RX
elmot 1:d0dfbce63a89 1922 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1923 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1924 */
elmot 1:d0dfbce63a89 1925 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_RX(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1926 {
elmot 1:d0dfbce63a89 1927 return (READ_BIT(LPUARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
elmot 1:d0dfbce63a89 1928 }
elmot 1:d0dfbce63a89 1929
elmot 1:d0dfbce63a89 1930 /**
elmot 1:d0dfbce63a89 1931 * @brief Enable DMA Mode for transmission
elmot 1:d0dfbce63a89 1932 * @rmtoll CR3 DMAT LL_LPUART_EnableDMAReq_TX
elmot 1:d0dfbce63a89 1933 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1934 * @retval None
elmot 1:d0dfbce63a89 1935 */
elmot 1:d0dfbce63a89 1936 __STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1937 {
elmot 1:d0dfbce63a89 1938 SET_BIT(LPUARTx->CR3, USART_CR3_DMAT);
elmot 1:d0dfbce63a89 1939 }
elmot 1:d0dfbce63a89 1940
elmot 1:d0dfbce63a89 1941 /**
elmot 1:d0dfbce63a89 1942 * @brief Disable DMA Mode for transmission
elmot 1:d0dfbce63a89 1943 * @rmtoll CR3 DMAT LL_LPUART_DisableDMAReq_TX
elmot 1:d0dfbce63a89 1944 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1945 * @retval None
elmot 1:d0dfbce63a89 1946 */
elmot 1:d0dfbce63a89 1947 __STATIC_INLINE void LL_LPUART_DisableDMAReq_TX(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1948 {
elmot 1:d0dfbce63a89 1949 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT);
elmot 1:d0dfbce63a89 1950 }
elmot 1:d0dfbce63a89 1951
elmot 1:d0dfbce63a89 1952 /**
elmot 1:d0dfbce63a89 1953 * @brief Check if DMA Mode is enabled for transmission
elmot 1:d0dfbce63a89 1954 * @rmtoll CR3 DMAT LL_LPUART_IsEnabledDMAReq_TX
elmot 1:d0dfbce63a89 1955 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1956 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1957 */
elmot 1:d0dfbce63a89 1958 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_TX(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1959 {
elmot 1:d0dfbce63a89 1960 return (READ_BIT(LPUARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
elmot 1:d0dfbce63a89 1961 }
elmot 1:d0dfbce63a89 1962
elmot 1:d0dfbce63a89 1963 /**
elmot 1:d0dfbce63a89 1964 * @brief Enable DMA Disabling on Reception Error
elmot 1:d0dfbce63a89 1965 * @rmtoll CR3 DDRE LL_LPUART_EnableDMADeactOnRxErr
elmot 1:d0dfbce63a89 1966 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1967 * @retval None
elmot 1:d0dfbce63a89 1968 */
elmot 1:d0dfbce63a89 1969 __STATIC_INLINE void LL_LPUART_EnableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1970 {
elmot 1:d0dfbce63a89 1971 SET_BIT(LPUARTx->CR3, USART_CR3_DDRE);
elmot 1:d0dfbce63a89 1972 }
elmot 1:d0dfbce63a89 1973
elmot 1:d0dfbce63a89 1974 /**
elmot 1:d0dfbce63a89 1975 * @brief Disable DMA Disabling on Reception Error
elmot 1:d0dfbce63a89 1976 * @rmtoll CR3 DDRE LL_LPUART_DisableDMADeactOnRxErr
elmot 1:d0dfbce63a89 1977 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1978 * @retval None
elmot 1:d0dfbce63a89 1979 */
elmot 1:d0dfbce63a89 1980 __STATIC_INLINE void LL_LPUART_DisableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1981 {
elmot 1:d0dfbce63a89 1982 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DDRE);
elmot 1:d0dfbce63a89 1983 }
elmot 1:d0dfbce63a89 1984
elmot 1:d0dfbce63a89 1985 /**
elmot 1:d0dfbce63a89 1986 * @brief Indicate if DMA Disabling on Reception Error is disabled
elmot 1:d0dfbce63a89 1987 * @rmtoll CR3 DDRE LL_LPUART_IsEnabledDMADeactOnRxErr
elmot 1:d0dfbce63a89 1988 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 1989 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1990 */
elmot 1:d0dfbce63a89 1991 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMADeactOnRxErr(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 1992 {
elmot 1:d0dfbce63a89 1993 return (READ_BIT(LPUARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE));
elmot 1:d0dfbce63a89 1994 }
elmot 1:d0dfbce63a89 1995
elmot 1:d0dfbce63a89 1996 /**
elmot 1:d0dfbce63a89 1997 * @brief Get the LPUART data register address used for DMA transfer
elmot 1:d0dfbce63a89 1998 * @rmtoll RDR RDR LL_LPUART_DMA_GetRegAddr\n
elmot 1:d0dfbce63a89 1999 * @rmtoll TDR TDR LL_LPUART_DMA_GetRegAddr
elmot 1:d0dfbce63a89 2000 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 2001 * @param Direction This parameter can be one of the following values:
elmot 1:d0dfbce63a89 2002 * @arg @ref LL_LPUART_DMA_REG_DATA_TRANSMIT
elmot 1:d0dfbce63a89 2003 * @arg @ref LL_LPUART_DMA_REG_DATA_RECEIVE
elmot 1:d0dfbce63a89 2004 * @retval Address of data register
elmot 1:d0dfbce63a89 2005 */
elmot 1:d0dfbce63a89 2006 __STATIC_INLINE uint32_t LL_LPUART_DMA_GetRegAddr(USART_TypeDef *LPUARTx, uint32_t Direction)
elmot 1:d0dfbce63a89 2007 {
elmot 1:d0dfbce63a89 2008 register uint32_t data_reg_addr = 0U;
elmot 1:d0dfbce63a89 2009
elmot 1:d0dfbce63a89 2010 if (Direction == LL_LPUART_DMA_REG_DATA_TRANSMIT)
elmot 1:d0dfbce63a89 2011 {
elmot 1:d0dfbce63a89 2012 /* return address of TDR register */
elmot 1:d0dfbce63a89 2013 data_reg_addr = (uint32_t) &(LPUARTx->TDR);
elmot 1:d0dfbce63a89 2014 }
elmot 1:d0dfbce63a89 2015 else
elmot 1:d0dfbce63a89 2016 {
elmot 1:d0dfbce63a89 2017 /* return address of RDR register */
elmot 1:d0dfbce63a89 2018 data_reg_addr = (uint32_t) &(LPUARTx->RDR);
elmot 1:d0dfbce63a89 2019 }
elmot 1:d0dfbce63a89 2020
elmot 1:d0dfbce63a89 2021 return data_reg_addr;
elmot 1:d0dfbce63a89 2022 }
elmot 1:d0dfbce63a89 2023
elmot 1:d0dfbce63a89 2024 /**
elmot 1:d0dfbce63a89 2025 * @}
elmot 1:d0dfbce63a89 2026 */
elmot 1:d0dfbce63a89 2027
elmot 1:d0dfbce63a89 2028 /** @defgroup LPUART_LL_EF_Data_Management Data_Management
elmot 1:d0dfbce63a89 2029 * @{
elmot 1:d0dfbce63a89 2030 */
elmot 1:d0dfbce63a89 2031
elmot 1:d0dfbce63a89 2032 /**
elmot 1:d0dfbce63a89 2033 * @brief Read Receiver Data register (Receive Data value, 8 bits)
elmot 1:d0dfbce63a89 2034 * @rmtoll RDR RDR LL_LPUART_ReceiveData8
elmot 1:d0dfbce63a89 2035 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 2036 * @retval Time Value between Min_Data=0x00 and Max_Data=0xFF
elmot 1:d0dfbce63a89 2037 */
elmot 1:d0dfbce63a89 2038 __STATIC_INLINE uint8_t LL_LPUART_ReceiveData8(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 2039 {
elmot 1:d0dfbce63a89 2040 return (uint8_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR));
elmot 1:d0dfbce63a89 2041 }
elmot 1:d0dfbce63a89 2042
elmot 1:d0dfbce63a89 2043 /**
elmot 1:d0dfbce63a89 2044 * @brief Read Receiver Data register (Receive Data value, 9 bits)
elmot 1:d0dfbce63a89 2045 * @rmtoll RDR RDR LL_LPUART_ReceiveData9
elmot 1:d0dfbce63a89 2046 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 2047 * @retval Time Value between Min_Data=0x00 and Max_Data=0x1FF
elmot 1:d0dfbce63a89 2048 */
elmot 1:d0dfbce63a89 2049 __STATIC_INLINE uint16_t LL_LPUART_ReceiveData9(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 2050 {
elmot 1:d0dfbce63a89 2051 return (uint16_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR));
elmot 1:d0dfbce63a89 2052 }
elmot 1:d0dfbce63a89 2053
elmot 1:d0dfbce63a89 2054 /**
elmot 1:d0dfbce63a89 2055 * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
elmot 1:d0dfbce63a89 2056 * @rmtoll TDR TDR LL_LPUART_TransmitData8
elmot 1:d0dfbce63a89 2057 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 2058 * @param Value between Min_Data=0x00 and Max_Data=0xFF
elmot 1:d0dfbce63a89 2059 * @retval None
elmot 1:d0dfbce63a89 2060 */
elmot 1:d0dfbce63a89 2061 __STATIC_INLINE void LL_LPUART_TransmitData8(USART_TypeDef *LPUARTx, uint8_t Value)
elmot 1:d0dfbce63a89 2062 {
elmot 1:d0dfbce63a89 2063 LPUARTx->TDR = Value;
elmot 1:d0dfbce63a89 2064 }
elmot 1:d0dfbce63a89 2065
elmot 1:d0dfbce63a89 2066 /**
elmot 1:d0dfbce63a89 2067 * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
elmot 1:d0dfbce63a89 2068 * @rmtoll TDR TDR LL_LPUART_TransmitData9
elmot 1:d0dfbce63a89 2069 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 2070 * @param Value between Min_Data=0x00 and Max_Data=0x1FF
elmot 1:d0dfbce63a89 2071 * @retval None
elmot 1:d0dfbce63a89 2072 */
elmot 1:d0dfbce63a89 2073 __STATIC_INLINE void LL_LPUART_TransmitData9(USART_TypeDef *LPUARTx, uint16_t Value)
elmot 1:d0dfbce63a89 2074 {
elmot 1:d0dfbce63a89 2075 LPUARTx->TDR = Value & 0x1FFU;
elmot 1:d0dfbce63a89 2076 }
elmot 1:d0dfbce63a89 2077
elmot 1:d0dfbce63a89 2078 /**
elmot 1:d0dfbce63a89 2079 * @}
elmot 1:d0dfbce63a89 2080 */
elmot 1:d0dfbce63a89 2081
elmot 1:d0dfbce63a89 2082 /** @defgroup LPUART_LL_EF_Execution Execution
elmot 1:d0dfbce63a89 2083 * @{
elmot 1:d0dfbce63a89 2084 */
elmot 1:d0dfbce63a89 2085
elmot 1:d0dfbce63a89 2086 /**
elmot 1:d0dfbce63a89 2087 * @brief Request Break sending
elmot 1:d0dfbce63a89 2088 * @rmtoll RQR SBKRQ LL_LPUART_RequestBreakSending
elmot 1:d0dfbce63a89 2089 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 2090 * @retval None
elmot 1:d0dfbce63a89 2091 */
elmot 1:d0dfbce63a89 2092 __STATIC_INLINE void LL_LPUART_RequestBreakSending(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 2093 {
elmot 1:d0dfbce63a89 2094 SET_BIT(LPUARTx->RQR, USART_RQR_SBKRQ);
elmot 1:d0dfbce63a89 2095 }
elmot 1:d0dfbce63a89 2096
elmot 1:d0dfbce63a89 2097 /**
elmot 1:d0dfbce63a89 2098 * @brief Put LPUART in mute mode and set the RWU flag
elmot 1:d0dfbce63a89 2099 * @rmtoll RQR MMRQ LL_LPUART_RequestEnterMuteMode
elmot 1:d0dfbce63a89 2100 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 2101 * @retval None
elmot 1:d0dfbce63a89 2102 */
elmot 1:d0dfbce63a89 2103 __STATIC_INLINE void LL_LPUART_RequestEnterMuteMode(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 2104 {
elmot 1:d0dfbce63a89 2105 SET_BIT(LPUARTx->RQR, USART_RQR_MMRQ);
elmot 1:d0dfbce63a89 2106 }
elmot 1:d0dfbce63a89 2107
elmot 1:d0dfbce63a89 2108 /**
elmot 1:d0dfbce63a89 2109 * @brief Request a Receive Data flush
elmot 1:d0dfbce63a89 2110 * @rmtoll RQR RXFRQ LL_LPUART_RequestRxDataFlush
elmot 1:d0dfbce63a89 2111 * @param LPUARTx LPUART Instance
elmot 1:d0dfbce63a89 2112 * @retval None
elmot 1:d0dfbce63a89 2113 */
elmot 1:d0dfbce63a89 2114 __STATIC_INLINE void LL_LPUART_RequestRxDataFlush(USART_TypeDef *LPUARTx)
elmot 1:d0dfbce63a89 2115 {
elmot 1:d0dfbce63a89 2116 SET_BIT(LPUARTx->RQR, USART_RQR_RXFRQ);
elmot 1:d0dfbce63a89 2117 }
elmot 1:d0dfbce63a89 2118
elmot 1:d0dfbce63a89 2119 /**
elmot 1:d0dfbce63a89 2120 * @}
elmot 1:d0dfbce63a89 2121 */
elmot 1:d0dfbce63a89 2122
elmot 1:d0dfbce63a89 2123 #if defined(USE_FULL_LL_DRIVER)
elmot 1:d0dfbce63a89 2124 /** @defgroup LPUART_LL_EF_Init Initialization and de-initialization functions
elmot 1:d0dfbce63a89 2125 * @{
elmot 1:d0dfbce63a89 2126 */
elmot 1:d0dfbce63a89 2127 ErrorStatus LL_LPUART_DeInit(USART_TypeDef *LPUARTx);
elmot 1:d0dfbce63a89 2128 ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, LL_LPUART_InitTypeDef *LPUART_InitStruct);
elmot 1:d0dfbce63a89 2129 void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct);
elmot 1:d0dfbce63a89 2130 /**
elmot 1:d0dfbce63a89 2131 * @}
elmot 1:d0dfbce63a89 2132 */
elmot 1:d0dfbce63a89 2133 #endif /* USE_FULL_LL_DRIVER */
elmot 1:d0dfbce63a89 2134
elmot 1:d0dfbce63a89 2135 /**
elmot 1:d0dfbce63a89 2136 * @}
elmot 1:d0dfbce63a89 2137 */
elmot 1:d0dfbce63a89 2138
elmot 1:d0dfbce63a89 2139 /**
elmot 1:d0dfbce63a89 2140 * @}
elmot 1:d0dfbce63a89 2141 */
elmot 1:d0dfbce63a89 2142
elmot 1:d0dfbce63a89 2143 #endif /* LPUART1 */
elmot 1:d0dfbce63a89 2144
elmot 1:d0dfbce63a89 2145 /**
elmot 1:d0dfbce63a89 2146 * @}
elmot 1:d0dfbce63a89 2147 */
elmot 1:d0dfbce63a89 2148
elmot 1:d0dfbce63a89 2149 #ifdef __cplusplus
elmot 1:d0dfbce63a89 2150 }
elmot 1:d0dfbce63a89 2151 #endif
elmot 1:d0dfbce63a89 2152
elmot 1:d0dfbce63a89 2153 #endif /* __STM32L4xx_LL_LPUART_H */
elmot 1:d0dfbce63a89 2154
elmot 1:d0dfbce63a89 2155 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/