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HAL_L476/stm32l4xx_ll_lptim.h@1:d0dfbce63a89, 2017-02-24 (annotated)

Committer:
elmot
Date:
Fri Feb 24 21:13:56 2017 +0000
Revision:
1:d0dfbce63a89
Ready-to-copy

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elmot 1:d0dfbce63a89 1 /**
elmot 1:d0dfbce63a89 2 ******************************************************************************
elmot 1:d0dfbce63a89 3 * @file stm32l4xx_ll_lptim.h
elmot 1:d0dfbce63a89 4 * @author MCD Application Team
elmot 1:d0dfbce63a89 5 * @version V1.5.1
elmot 1:d0dfbce63a89 6 * @date 31-May-2016
elmot 1:d0dfbce63a89 7 * @brief Header file of LPTIM LL module.
elmot 1:d0dfbce63a89 8 ******************************************************************************
elmot 1:d0dfbce63a89 9 * @attention
elmot 1:d0dfbce63a89 10 *
elmot 1:d0dfbce63a89 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot 1:d0dfbce63a89 12 *
elmot 1:d0dfbce63a89 13 * Redistribution and use in source and binary forms, with or without modification,
elmot 1:d0dfbce63a89 14 * are permitted provided that the following conditions are met:
elmot 1:d0dfbce63a89 15 * 1. Redistributions of source code must retain the above copyright notice,
elmot 1:d0dfbce63a89 16 * this list of conditions and the following disclaimer.
elmot 1:d0dfbce63a89 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
elmot 1:d0dfbce63a89 18 * this list of conditions and the following disclaimer in the documentation
elmot 1:d0dfbce63a89 19 * and/or other materials provided with the distribution.
elmot 1:d0dfbce63a89 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot 1:d0dfbce63a89 21 * may be used to endorse or promote products derived from this software
elmot 1:d0dfbce63a89 22 * without specific prior written permission.
elmot 1:d0dfbce63a89 23 *
elmot 1:d0dfbce63a89 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot 1:d0dfbce63a89 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot 1:d0dfbce63a89 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot 1:d0dfbce63a89 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot 1:d0dfbce63a89 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot 1:d0dfbce63a89 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot 1:d0dfbce63a89 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot 1:d0dfbce63a89 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot 1:d0dfbce63a89 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot 1:d0dfbce63a89 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot 1:d0dfbce63a89 34 *
elmot 1:d0dfbce63a89 35 ******************************************************************************
elmot 1:d0dfbce63a89 36 */
elmot 1:d0dfbce63a89 37
elmot 1:d0dfbce63a89 38 /* Define to prevent recursive inclusion -------------------------------------*/
elmot 1:d0dfbce63a89 39 #ifndef __STM32L4xx_LL_LPTIM_H
elmot 1:d0dfbce63a89 40 #define __STM32L4xx_LL_LPTIM_H
elmot 1:d0dfbce63a89 41
elmot 1:d0dfbce63a89 42 #ifdef __cplusplus
elmot 1:d0dfbce63a89 43 extern "C" {
elmot 1:d0dfbce63a89 44 #endif
elmot 1:d0dfbce63a89 45
elmot 1:d0dfbce63a89 46 /* Includes ------------------------------------------------------------------*/
elmot 1:d0dfbce63a89 47 #include "stm32l4xx.h"
elmot 1:d0dfbce63a89 48
elmot 1:d0dfbce63a89 49 /** @addtogroup STM32L4xx_LL_Driver
elmot 1:d0dfbce63a89 50 * @{
elmot 1:d0dfbce63a89 51 */
elmot 1:d0dfbce63a89 52 #if defined (LPTIM1) || defined (LPTIM2)
elmot 1:d0dfbce63a89 53
elmot 1:d0dfbce63a89 54 /** @defgroup LPTIM_LL LPTIM
elmot 1:d0dfbce63a89 55 * @{
elmot 1:d0dfbce63a89 56 */
elmot 1:d0dfbce63a89 57
elmot 1:d0dfbce63a89 58 /* Private types -------------------------------------------------------------*/
elmot 1:d0dfbce63a89 59 /* Private variables ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 60
elmot 1:d0dfbce63a89 61 /* Private constants ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 62
elmot 1:d0dfbce63a89 63 /* Private macros ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 64 /* Private macros ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 65 #if defined(USE_FULL_LL_DRIVER)
elmot 1:d0dfbce63a89 66 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
elmot 1:d0dfbce63a89 67 * @{
elmot 1:d0dfbce63a89 68 */
elmot 1:d0dfbce63a89 69 /**
elmot 1:d0dfbce63a89 70 * @}
elmot 1:d0dfbce63a89 71 */
elmot 1:d0dfbce63a89 72 #endif /*USE_FULL_LL_DRIVER*/
elmot 1:d0dfbce63a89 73
elmot 1:d0dfbce63a89 74 /* Exported types ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 75 #if defined(USE_FULL_LL_DRIVER)
elmot 1:d0dfbce63a89 76 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
elmot 1:d0dfbce63a89 77 * @{
elmot 1:d0dfbce63a89 78 */
elmot 1:d0dfbce63a89 79
elmot 1:d0dfbce63a89 80 /**
elmot 1:d0dfbce63a89 81 * @brief LPTIM Init structure definition
elmot 1:d0dfbce63a89 82 */
elmot 1:d0dfbce63a89 83 typedef struct
elmot 1:d0dfbce63a89 84 {
elmot 1:d0dfbce63a89 85 uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
elmot 1:d0dfbce63a89 86 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
elmot 1:d0dfbce63a89 87
elmot 1:d0dfbce63a89 88 This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/
elmot 1:d0dfbce63a89 89
elmot 1:d0dfbce63a89 90 uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
elmot 1:d0dfbce63a89 91 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
elmot 1:d0dfbce63a89 92
elmot 1:d0dfbce63a89 93 This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/
elmot 1:d0dfbce63a89 94
elmot 1:d0dfbce63a89 95 uint32_t Waveform; /*!< Specifies the waveform shape.
elmot 1:d0dfbce63a89 96 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
elmot 1:d0dfbce63a89 97
elmot 1:d0dfbce63a89 98 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
elmot 1:d0dfbce63a89 99
elmot 1:d0dfbce63a89 100 uint32_t Polarity; /*!< Specifies waveform polarity.
elmot 1:d0dfbce63a89 101 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
elmot 1:d0dfbce63a89 102
elmot 1:d0dfbce63a89 103 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
elmot 1:d0dfbce63a89 104 } LL_LPTIM_InitTypeDef;
elmot 1:d0dfbce63a89 105
elmot 1:d0dfbce63a89 106 /**
elmot 1:d0dfbce63a89 107 * @}
elmot 1:d0dfbce63a89 108 */
elmot 1:d0dfbce63a89 109 #endif /* USE_FULL_LL_DRIVER */
elmot 1:d0dfbce63a89 110
elmot 1:d0dfbce63a89 111 /* Exported constants --------------------------------------------------------*/
elmot 1:d0dfbce63a89 112 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
elmot 1:d0dfbce63a89 113 * @{
elmot 1:d0dfbce63a89 114 */
elmot 1:d0dfbce63a89 115
elmot 1:d0dfbce63a89 116 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
elmot 1:d0dfbce63a89 117 * @brief Flags defines which can be used with LL_LPTIM_ReadReg function
elmot 1:d0dfbce63a89 118 * @{
elmot 1:d0dfbce63a89 119 */
elmot 1:d0dfbce63a89 120 #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */
elmot 1:d0dfbce63a89 121 #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
elmot 1:d0dfbce63a89 122 #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */
elmot 1:d0dfbce63a89 123 #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */
elmot 1:d0dfbce63a89 124 #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */
elmot 1:d0dfbce63a89 125 #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */
elmot 1:d0dfbce63a89 126 #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */
elmot 1:d0dfbce63a89 127 /**
elmot 1:d0dfbce63a89 128 * @}
elmot 1:d0dfbce63a89 129 */
elmot 1:d0dfbce63a89 130
elmot 1:d0dfbce63a89 131 /** @defgroup LPTIM_LL_EC_IT IT Defines
elmot 1:d0dfbce63a89 132 * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
elmot 1:d0dfbce63a89 133 * @{
elmot 1:d0dfbce63a89 134 */
elmot 1:d0dfbce63a89 135 #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match Interrupt Enable */
elmot 1:d0dfbce63a89 136 #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match Interrupt Enable */
elmot 1:d0dfbce63a89 137 #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger valid edge Interrupt Enable */
elmot 1:d0dfbce63a89 138 #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK Interrupt Enable */
elmot 1:d0dfbce63a89 139 #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK Interrupt Enable */
elmot 1:d0dfbce63a89 140 #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Direction change to UP Interrupt Enable */
elmot 1:d0dfbce63a89 141 #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Direction change to down Interrupt Enable */
elmot 1:d0dfbce63a89 142 /**
elmot 1:d0dfbce63a89 143 * @}
elmot 1:d0dfbce63a89 144 */
elmot 1:d0dfbce63a89 145
elmot 1:d0dfbce63a89 146 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
elmot 1:d0dfbce63a89 147 * @{
elmot 1:d0dfbce63a89 148 */
elmot 1:d0dfbce63a89 149 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
elmot 1:d0dfbce63a89 150 #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
elmot 1:d0dfbce63a89 151 /**
elmot 1:d0dfbce63a89 152 * @}
elmot 1:d0dfbce63a89 153 */
elmot 1:d0dfbce63a89 154
elmot 1:d0dfbce63a89 155 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
elmot 1:d0dfbce63a89 156 * @{
elmot 1:d0dfbce63a89 157 */
elmot 1:d0dfbce63a89 158 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE ((uint32_t)0x00000000U) /*!<Preload is disabled: registers are updated after each APB bus write access*/
elmot 1:d0dfbce63a89 159 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
elmot 1:d0dfbce63a89 160 /**
elmot 1:d0dfbce63a89 161 * @}
elmot 1:d0dfbce63a89 162 */
elmot 1:d0dfbce63a89 163
elmot 1:d0dfbce63a89 164 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
elmot 1:d0dfbce63a89 165 * @{
elmot 1:d0dfbce63a89 166 */
elmot 1:d0dfbce63a89 167 #define LL_LPTIM_COUNTER_MODE_INTERNAL ((uint32_t)0x00000000U) /*!<The counter is incremented following each internal clock pulse*/
elmot 1:d0dfbce63a89 168 #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
elmot 1:d0dfbce63a89 169 /**
elmot 1:d0dfbce63a89 170 * @}
elmot 1:d0dfbce63a89 171 */
elmot 1:d0dfbce63a89 172
elmot 1:d0dfbce63a89 173 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
elmot 1:d0dfbce63a89 174 * @{
elmot 1:d0dfbce63a89 175 */
elmot 1:d0dfbce63a89 176 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM ((uint32_t)0x00000000U) /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINOUS or SINGLE*/
elmot 1:d0dfbce63a89 177 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/
elmot 1:d0dfbce63a89 178 /**
elmot 1:d0dfbce63a89 179 * @}
elmot 1:d0dfbce63a89 180 */
elmot 1:d0dfbce63a89 181
elmot 1:d0dfbce63a89 182 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
elmot 1:d0dfbce63a89 183 * @{
elmot 1:d0dfbce63a89 184 */
elmot 1:d0dfbce63a89 185 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR ((uint32_t) 0x00000000U) /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
elmot 1:d0dfbce63a89 186 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
elmot 1:d0dfbce63a89 187 /**
elmot 1:d0dfbce63a89 188 * @}
elmot 1:d0dfbce63a89 189 */
elmot 1:d0dfbce63a89 190
elmot 1:d0dfbce63a89 191 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
elmot 1:d0dfbce63a89 192 * @{
elmot 1:d0dfbce63a89 193 */
elmot 1:d0dfbce63a89 194 #define LL_LPTIM_PRESCALER_DIV1 ((uint32_t)0x000000U) /*!<Prescaler division factor is set to 1*/
elmot 1:d0dfbce63a89 195 #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
elmot 1:d0dfbce63a89 196 #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
elmot 1:d0dfbce63a89 197 #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
elmot 1:d0dfbce63a89 198 #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
elmot 1:d0dfbce63a89 199 #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
elmot 1:d0dfbce63a89 200 #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
elmot 1:d0dfbce63a89 201 #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
elmot 1:d0dfbce63a89 202 /**
elmot 1:d0dfbce63a89 203 * @}
elmot 1:d0dfbce63a89 204 */
elmot 1:d0dfbce63a89 205
elmot 1:d0dfbce63a89 206 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
elmot 1:d0dfbce63a89 207 * @{
elmot 1:d0dfbce63a89 208 */
elmot 1:d0dfbce63a89 209 #define LL_LPTIM_TRIG_SOURCE_GPIO ((uint32_t)0x00000000U) /*!<External input trigger is connected to TIMx_ETR input*/
elmot 1:d0dfbce63a89 210 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/
elmot 1:d0dfbce63a89 211 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/
elmot 1:d0dfbce63a89 212 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
elmot 1:d0dfbce63a89 213 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP2 LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to RTC Tamper 2*/
elmot 1:d0dfbce63a89 214 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 3*/
elmot 1:d0dfbce63a89 215 #define LL_LPTIM_TRIG_SOURCE_COMP1 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_1) /*!<External input trigger is connected to COMP1 output*/
elmot 1:d0dfbce63a89 216 #define LL_LPTIM_TRIG_SOURCE_COMP2 LPTIM_CFGR_TRIGSEL /*!<External input trigger is connected to COMP2 output*/
elmot 1:d0dfbce63a89 217 /**
elmot 1:d0dfbce63a89 218 * @}
elmot 1:d0dfbce63a89 219 */
elmot 1:d0dfbce63a89 220
elmot 1:d0dfbce63a89 221 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
elmot 1:d0dfbce63a89 222 * @{
elmot 1:d0dfbce63a89 223 */
elmot 1:d0dfbce63a89 224 #define LL_LPTIM_TRIG_FILTER_NONE ((uint32_t)0x00000000U) /*!<Any trigger active level change is considered as a valid trigger*/
elmot 1:d0dfbce63a89 225 #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
elmot 1:d0dfbce63a89 226 #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
elmot 1:d0dfbce63a89 227 #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
elmot 1:d0dfbce63a89 228 /**
elmot 1:d0dfbce63a89 229 * @}
elmot 1:d0dfbce63a89 230 */
elmot 1:d0dfbce63a89 231
elmot 1:d0dfbce63a89 232 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
elmot 1:d0dfbce63a89 233 * @{
elmot 1:d0dfbce63a89 234 */
elmot 1:d0dfbce63a89 235 #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
elmot 1:d0dfbce63a89 236 #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/
elmot 1:d0dfbce63a89 237 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/
elmot 1:d0dfbce63a89 238 /**
elmot 1:d0dfbce63a89 239 * @}
elmot 1:d0dfbce63a89 240 */
elmot 1:d0dfbce63a89 241
elmot 1:d0dfbce63a89 242 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
elmot 1:d0dfbce63a89 243 * @{
elmot 1:d0dfbce63a89 244 */
elmot 1:d0dfbce63a89 245 #define LL_LPTIM_CLK_SOURCE_INTERNAL ((uint32_t)0x00000000U) /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
elmot 1:d0dfbce63a89 246 #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
elmot 1:d0dfbce63a89 247 /**
elmot 1:d0dfbce63a89 248 * @}
elmot 1:d0dfbce63a89 249 */
elmot 1:d0dfbce63a89 250
elmot 1:d0dfbce63a89 251 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
elmot 1:d0dfbce63a89 252 * @{
elmot 1:d0dfbce63a89 253 */
elmot 1:d0dfbce63a89 254 #define LL_LPTIM_CLK_FILTER_NONE ((uint32_t)0x00000000U) /*!<Any external clock signal level change is considered as a valid transition*/
elmot 1:d0dfbce63a89 255 #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
elmot 1:d0dfbce63a89 256 #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
elmot 1:d0dfbce63a89 257 #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
elmot 1:d0dfbce63a89 258 /**
elmot 1:d0dfbce63a89 259 * @}
elmot 1:d0dfbce63a89 260 */
elmot 1:d0dfbce63a89 261
elmot 1:d0dfbce63a89 262 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
elmot 1:d0dfbce63a89 263 * @{
elmot 1:d0dfbce63a89 264 */
elmot 1:d0dfbce63a89 265 #define LL_LPTIM_CLK_POLARITY_RISING ((uint32_t)0x00000000U) /*!< The rising edge is the active edge used for counting*/
elmot 1:d0dfbce63a89 266 #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
elmot 1:d0dfbce63a89 267 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
elmot 1:d0dfbce63a89 268 /**
elmot 1:d0dfbce63a89 269 * @}
elmot 1:d0dfbce63a89 270 */
elmot 1:d0dfbce63a89 271
elmot 1:d0dfbce63a89 272 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
elmot 1:d0dfbce63a89 273 * @{
elmot 1:d0dfbce63a89 274 */
elmot 1:d0dfbce63a89 275 #define LL_LPTIM_ENCODER_MODE_RISING ((uint32_t)0x00000000U) /*!< The rising edge is the active edge used for counting*/
elmot 1:d0dfbce63a89 276 #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
elmot 1:d0dfbce63a89 277 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
elmot 1:d0dfbce63a89 278 /**
elmot 1:d0dfbce63a89 279 * @}
elmot 1:d0dfbce63a89 280 */
elmot 1:d0dfbce63a89 281
elmot 1:d0dfbce63a89 282 /** @defgroup LPTIM_EC_INPUT1_SRC Input1 Source
elmot 1:d0dfbce63a89 283 * @{
elmot 1:d0dfbce63a89 284 */
elmot 1:d0dfbce63a89 285
elmot 1:d0dfbce63a89 286 #define LL_LPTIM_INPUT1_SRC_GPIO ((uint32_t)0x00000000U) /*!< For LPTIM1 and LPTIM2 */
elmot 1:d0dfbce63a89 287 #define LL_LPTIM_INPUT1_SRC_COMP1 LPTIM_OR_OR_0 /*!< For LPTIM1 and LPTIM2 */
elmot 1:d0dfbce63a89 288 #define LL_LPTIM_INPUT1_SRC_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM2 */
elmot 1:d0dfbce63a89 289 #define LL_LPTIM_INPUT1_SRC_COMP1_COMP2 LPTIM_OR_OR /*!< For LPTIM2 */
elmot 1:d0dfbce63a89 290 /**
elmot 1:d0dfbce63a89 291 * @}
elmot 1:d0dfbce63a89 292 */
elmot 1:d0dfbce63a89 293
elmot 1:d0dfbce63a89 294 /** @defgroup LPTIM_EC_INPUT2_SRC Input2 Source
elmot 1:d0dfbce63a89 295 * @{
elmot 1:d0dfbce63a89 296 */
elmot 1:d0dfbce63a89 297
elmot 1:d0dfbce63a89 298 #define LL_LPTIM_INPUT2_SRC_GPIO ((uint32_t)0x00000000U) /*!< For LPTIM1 */
elmot 1:d0dfbce63a89 299 #define LL_LPTIM_INPUT2_SRC_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM1 */
elmot 1:d0dfbce63a89 300 /**
elmot 1:d0dfbce63a89 301 * @}
elmot 1:d0dfbce63a89 302 */
elmot 1:d0dfbce63a89 303
elmot 1:d0dfbce63a89 304 /**
elmot 1:d0dfbce63a89 305 * @}
elmot 1:d0dfbce63a89 306 */
elmot 1:d0dfbce63a89 307
elmot 1:d0dfbce63a89 308 /* Exported macro ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 309 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
elmot 1:d0dfbce63a89 310 * @{
elmot 1:d0dfbce63a89 311 */
elmot 1:d0dfbce63a89 312
elmot 1:d0dfbce63a89 313 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
elmot 1:d0dfbce63a89 314 * @{
elmot 1:d0dfbce63a89 315 */
elmot 1:d0dfbce63a89 316
elmot 1:d0dfbce63a89 317 /**
elmot 1:d0dfbce63a89 318 * @brief Write a value in LPTIM register
elmot 1:d0dfbce63a89 319 * @param __INSTANCE__ LPTIM Instance
elmot 1:d0dfbce63a89 320 * @param __REG__ Register to be written
elmot 1:d0dfbce63a89 321 * @param __VALUE__ Value to be written in the register
elmot 1:d0dfbce63a89 322 * @retval None
elmot 1:d0dfbce63a89 323 */
elmot 1:d0dfbce63a89 324 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
elmot 1:d0dfbce63a89 325
elmot 1:d0dfbce63a89 326 /**
elmot 1:d0dfbce63a89 327 * @brief Read a value in LPTIM register
elmot 1:d0dfbce63a89 328 * @param __INSTANCE__ LPTIM Instance
elmot 1:d0dfbce63a89 329 * @param __REG__ Register to be read
elmot 1:d0dfbce63a89 330 * @retval Register value
elmot 1:d0dfbce63a89 331 */
elmot 1:d0dfbce63a89 332 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
elmot 1:d0dfbce63a89 333 /**
elmot 1:d0dfbce63a89 334 * @}
elmot 1:d0dfbce63a89 335 */
elmot 1:d0dfbce63a89 336
elmot 1:d0dfbce63a89 337 /**
elmot 1:d0dfbce63a89 338 * @}
elmot 1:d0dfbce63a89 339 */
elmot 1:d0dfbce63a89 340
elmot 1:d0dfbce63a89 341
elmot 1:d0dfbce63a89 342 /* Exported functions --------------------------------------------------------*/
elmot 1:d0dfbce63a89 343 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
elmot 1:d0dfbce63a89 344 * @{
elmot 1:d0dfbce63a89 345 */
elmot 1:d0dfbce63a89 346
elmot 1:d0dfbce63a89 347 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
elmot 1:d0dfbce63a89 348 * @{
elmot 1:d0dfbce63a89 349 */
elmot 1:d0dfbce63a89 350
elmot 1:d0dfbce63a89 351 /**
elmot 1:d0dfbce63a89 352 * @brief Enable the LPTIM instance
elmot 1:d0dfbce63a89 353 * @note After setting the ENABLE bit, a delay of two counter clock is needed
elmot 1:d0dfbce63a89 354 * before the LPTIM instance is actually enabled.
elmot 1:d0dfbce63a89 355 * @rmtoll CR ENABLE LL_LPTIM_Enable
elmot 1:d0dfbce63a89 356 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 357 * @retval None
elmot 1:d0dfbce63a89 358 */
elmot 1:d0dfbce63a89 359 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 360 {
elmot 1:d0dfbce63a89 361 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
elmot 1:d0dfbce63a89 362 }
elmot 1:d0dfbce63a89 363
elmot 1:d0dfbce63a89 364 /**
elmot 1:d0dfbce63a89 365 * @brief Disable the LPTIM instance
elmot 1:d0dfbce63a89 366 * @rmtoll CR ENABLE LL_LPTIM_Disable
elmot 1:d0dfbce63a89 367 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 368 * @retval None
elmot 1:d0dfbce63a89 369 */
elmot 1:d0dfbce63a89 370 __STATIC_INLINE void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 371 {
elmot 1:d0dfbce63a89 372 CLEAR_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
elmot 1:d0dfbce63a89 373 }
elmot 1:d0dfbce63a89 374
elmot 1:d0dfbce63a89 375 /**
elmot 1:d0dfbce63a89 376 * @brief Indicates whether the LPTIM instance is enabled.
elmot 1:d0dfbce63a89 377 * @rmtoll CR ENABLE LL_LPTIM_IsEnabled
elmot 1:d0dfbce63a89 378 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 379 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 380 */
elmot 1:d0dfbce63a89 381 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 382 {
elmot 1:d0dfbce63a89 383 return (READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == (LPTIM_CR_ENABLE));
elmot 1:d0dfbce63a89 384 }
elmot 1:d0dfbce63a89 385
elmot 1:d0dfbce63a89 386 /**
elmot 1:d0dfbce63a89 387 * @brief Starts the LPTIM counter in the desired mode.
elmot 1:d0dfbce63a89 388 * @note LPTIM instance must be enabled before starting the counter.
elmot 1:d0dfbce63a89 389 * @note It is possible to change on the fly from One Shot mode to
elmot 1:d0dfbce63a89 390 * Continuous mode.
elmot 1:d0dfbce63a89 391 * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
elmot 1:d0dfbce63a89 392 * CR SNGSTRT LL_LPTIM_StartCounter
elmot 1:d0dfbce63a89 393 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 394 * @param OperatingMode This parameter can be one of the following values:
elmot 1:d0dfbce63a89 395 * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
elmot 1:d0dfbce63a89 396 * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
elmot 1:d0dfbce63a89 397 * @retval None
elmot 1:d0dfbce63a89 398 */
elmot 1:d0dfbce63a89 399 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
elmot 1:d0dfbce63a89 400 {
elmot 1:d0dfbce63a89 401 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
elmot 1:d0dfbce63a89 402 }
elmot 1:d0dfbce63a89 403
elmot 1:d0dfbce63a89 404 /**
elmot 1:d0dfbce63a89 405 * @brief Set the LPTIM registers update mode (enable/disable register preload)
elmot 1:d0dfbce63a89 406 * @note This function must be called when the LPTIM instance is disabled.
elmot 1:d0dfbce63a89 407 * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
elmot 1:d0dfbce63a89 408 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 409 * @param UpdateMode This parameter can be one of the following values:
elmot 1:d0dfbce63a89 410 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
elmot 1:d0dfbce63a89 411 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
elmot 1:d0dfbce63a89 412 * @retval None
elmot 1:d0dfbce63a89 413 */
elmot 1:d0dfbce63a89 414 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
elmot 1:d0dfbce63a89 415 {
elmot 1:d0dfbce63a89 416 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
elmot 1:d0dfbce63a89 417 }
elmot 1:d0dfbce63a89 418
elmot 1:d0dfbce63a89 419 /**
elmot 1:d0dfbce63a89 420 * @brief Get the LPTIM registers update mode
elmot 1:d0dfbce63a89 421 * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
elmot 1:d0dfbce63a89 422 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 423 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 424 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
elmot 1:d0dfbce63a89 425 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
elmot 1:d0dfbce63a89 426 */
elmot 1:d0dfbce63a89 427 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 428 {
elmot 1:d0dfbce63a89 429 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
elmot 1:d0dfbce63a89 430 }
elmot 1:d0dfbce63a89 431
elmot 1:d0dfbce63a89 432 /**
elmot 1:d0dfbce63a89 433 * @brief Set the auto reload value
elmot 1:d0dfbce63a89 434 * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
elmot 1:d0dfbce63a89 435 * @note After a write to the LPTIMx_ARR register a new write operation to the
elmot 1:d0dfbce63a89 436 * same register can only be performed when the previous write operation
elmot 1:d0dfbce63a89 437 * is completed. Any successive write before the ARROK flag be set, will
elmot 1:d0dfbce63a89 438 * lead to unpredictable results.
elmot 1:d0dfbce63a89 439 * @note autoreload value be strictly greater than the compare value.
elmot 1:d0dfbce63a89 440 * @rmtoll ARR ARR LL_LPTIM_SetAutoReload
elmot 1:d0dfbce63a89 441 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 442 * @param AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
elmot 1:d0dfbce63a89 443 * @retval None
elmot 1:d0dfbce63a89 444 */
elmot 1:d0dfbce63a89 445 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
elmot 1:d0dfbce63a89 446 {
elmot 1:d0dfbce63a89 447 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
elmot 1:d0dfbce63a89 448 }
elmot 1:d0dfbce63a89 449
elmot 1:d0dfbce63a89 450 /**
elmot 1:d0dfbce63a89 451 * @brief Get actual auto reload value
elmot 1:d0dfbce63a89 452 * @rmtoll ARR ARR LL_LPTIM_GetAutoReload
elmot 1:d0dfbce63a89 453 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 454 * @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
elmot 1:d0dfbce63a89 455 */
elmot 1:d0dfbce63a89 456 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 457 {
elmot 1:d0dfbce63a89 458 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
elmot 1:d0dfbce63a89 459 }
elmot 1:d0dfbce63a89 460
elmot 1:d0dfbce63a89 461 /**
elmot 1:d0dfbce63a89 462 * @brief Set the compare value
elmot 1:d0dfbce63a89 463 * @note After a write to the LPTIMx_CMP register a new write operation to the
elmot 1:d0dfbce63a89 464 * same register can only be performed when the previous write operation
elmot 1:d0dfbce63a89 465 * is completed. Any successive write before the CMPOK flag be set, will
elmot 1:d0dfbce63a89 466 * lead to unpredictable results.
elmot 1:d0dfbce63a89 467 * @rmtoll CMP CMP LL_LPTIM_SetCompare
elmot 1:d0dfbce63a89 468 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 469 * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
elmot 1:d0dfbce63a89 470 * @retval None
elmot 1:d0dfbce63a89 471 */
elmot 1:d0dfbce63a89 472 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
elmot 1:d0dfbce63a89 473 {
elmot 1:d0dfbce63a89 474 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
elmot 1:d0dfbce63a89 475 }
elmot 1:d0dfbce63a89 476
elmot 1:d0dfbce63a89 477 /**
elmot 1:d0dfbce63a89 478 * @brief Get actual compare value
elmot 1:d0dfbce63a89 479 * @rmtoll CMP CMP LL_LPTIM_GetCompare
elmot 1:d0dfbce63a89 480 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 481 * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
elmot 1:d0dfbce63a89 482 */
elmot 1:d0dfbce63a89 483 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 484 {
elmot 1:d0dfbce63a89 485 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
elmot 1:d0dfbce63a89 486 }
elmot 1:d0dfbce63a89 487
elmot 1:d0dfbce63a89 488 /**
elmot 1:d0dfbce63a89 489 * @brief Get actual counter value
elmot 1:d0dfbce63a89 490 * @note When the LPTIM instance is running with an asynchronous clock, reading
elmot 1:d0dfbce63a89 491 * the LPTIMx_CNT register may return unreliable values. So in this case
elmot 1:d0dfbce63a89 492 * it is necessary to perform two consecutive read accesses and verify
elmot 1:d0dfbce63a89 493 * that the two returned values are identical.
elmot 1:d0dfbce63a89 494 * @rmtoll CNT CNT LL_LPTIM_GetCounter
elmot 1:d0dfbce63a89 495 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 496 * @retval Counter value
elmot 1:d0dfbce63a89 497 */
elmot 1:d0dfbce63a89 498 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 499 {
elmot 1:d0dfbce63a89 500 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
elmot 1:d0dfbce63a89 501 }
elmot 1:d0dfbce63a89 502
elmot 1:d0dfbce63a89 503 /**
elmot 1:d0dfbce63a89 504 * @brief Set the counter mode (selection of the LPTIM counter clock source).
elmot 1:d0dfbce63a89 505 * @note The counter mode can be set only when the LPTIM instance is disabled.
elmot 1:d0dfbce63a89 506 * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
elmot 1:d0dfbce63a89 507 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 508 * @param CounterMode This parameter can be one of the following values:
elmot 1:d0dfbce63a89 509 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
elmot 1:d0dfbce63a89 510 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
elmot 1:d0dfbce63a89 511 * @retval None
elmot 1:d0dfbce63a89 512 */
elmot 1:d0dfbce63a89 513 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
elmot 1:d0dfbce63a89 514 {
elmot 1:d0dfbce63a89 515 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
elmot 1:d0dfbce63a89 516 }
elmot 1:d0dfbce63a89 517
elmot 1:d0dfbce63a89 518 /**
elmot 1:d0dfbce63a89 519 * @brief Get the counter mode
elmot 1:d0dfbce63a89 520 * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
elmot 1:d0dfbce63a89 521 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 522 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 523 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
elmot 1:d0dfbce63a89 524 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
elmot 1:d0dfbce63a89 525 */
elmot 1:d0dfbce63a89 526 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 527 {
elmot 1:d0dfbce63a89 528 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
elmot 1:d0dfbce63a89 529 }
elmot 1:d0dfbce63a89 530
elmot 1:d0dfbce63a89 531 /**
elmot 1:d0dfbce63a89 532 * @brief Configure the LPTIM instance output (LPTIMx_OUT)
elmot 1:d0dfbce63a89 533 * @note This function must be called when the LPTIM instance is disabled.
elmot 1:d0dfbce63a89 534 * @note Regarding the LPTIM output polarity the change takes effect
elmot 1:d0dfbce63a89 535 * immediately, so the output default value will change immediately after
elmot 1:d0dfbce63a89 536 * the polarity is re-configured, even before the timer is enabled.
elmot 1:d0dfbce63a89 537 * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
elmot 1:d0dfbce63a89 538 * CFGR WAVPOL LL_LPTIM_ConfigOutput
elmot 1:d0dfbce63a89 539 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 540 * @param Waveform This parameter can be one of the following values:
elmot 1:d0dfbce63a89 541 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
elmot 1:d0dfbce63a89 542 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
elmot 1:d0dfbce63a89 543 * @param Polarity This parameter can be one of the following values:
elmot 1:d0dfbce63a89 544 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
elmot 1:d0dfbce63a89 545 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
elmot 1:d0dfbce63a89 546 * @retval None
elmot 1:d0dfbce63a89 547 */
elmot 1:d0dfbce63a89 548 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
elmot 1:d0dfbce63a89 549 {
elmot 1:d0dfbce63a89 550 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
elmot 1:d0dfbce63a89 551 }
elmot 1:d0dfbce63a89 552
elmot 1:d0dfbce63a89 553 /**
elmot 1:d0dfbce63a89 554 * @brief Set waveform shape
elmot 1:d0dfbce63a89 555 * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
elmot 1:d0dfbce63a89 556 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 557 * @param Waveform This parameter can be one of the following values:
elmot 1:d0dfbce63a89 558 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
elmot 1:d0dfbce63a89 559 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
elmot 1:d0dfbce63a89 560 * @retval None
elmot 1:d0dfbce63a89 561 */
elmot 1:d0dfbce63a89 562 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
elmot 1:d0dfbce63a89 563 {
elmot 1:d0dfbce63a89 564 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
elmot 1:d0dfbce63a89 565 }
elmot 1:d0dfbce63a89 566
elmot 1:d0dfbce63a89 567 /**
elmot 1:d0dfbce63a89 568 * @brief Get actual waveform shape
elmot 1:d0dfbce63a89 569 * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
elmot 1:d0dfbce63a89 570 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 571 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 572 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
elmot 1:d0dfbce63a89 573 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
elmot 1:d0dfbce63a89 574 */
elmot 1:d0dfbce63a89 575 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 576 {
elmot 1:d0dfbce63a89 577 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
elmot 1:d0dfbce63a89 578 }
elmot 1:d0dfbce63a89 579
elmot 1:d0dfbce63a89 580 /**
elmot 1:d0dfbce63a89 581 * @brief Set output polarity
elmot 1:d0dfbce63a89 582 * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
elmot 1:d0dfbce63a89 583 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 584 * @param Polarity This parameter can be one of the following values:
elmot 1:d0dfbce63a89 585 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
elmot 1:d0dfbce63a89 586 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
elmot 1:d0dfbce63a89 587 * @retval None
elmot 1:d0dfbce63a89 588 */
elmot 1:d0dfbce63a89 589 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
elmot 1:d0dfbce63a89 590 {
elmot 1:d0dfbce63a89 591 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
elmot 1:d0dfbce63a89 592 }
elmot 1:d0dfbce63a89 593
elmot 1:d0dfbce63a89 594 /**
elmot 1:d0dfbce63a89 595 * @brief Get actual output polarity
elmot 1:d0dfbce63a89 596 * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
elmot 1:d0dfbce63a89 597 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 598 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 599 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
elmot 1:d0dfbce63a89 600 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
elmot 1:d0dfbce63a89 601 */
elmot 1:d0dfbce63a89 602 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 603 {
elmot 1:d0dfbce63a89 604 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
elmot 1:d0dfbce63a89 605 }
elmot 1:d0dfbce63a89 606
elmot 1:d0dfbce63a89 607 /**
elmot 1:d0dfbce63a89 608 * @brief Set actual prescaler division ratio.
elmot 1:d0dfbce63a89 609 * @note This function must be called when the LPTIM instance is disabled.
elmot 1:d0dfbce63a89 610 * @note When the LPTIM is configured to be clocked by an internal clock source
elmot 1:d0dfbce63a89 611 * and the LPTIM counter is configured to be updated by active edges
elmot 1:d0dfbce63a89 612 * detected on the LPTIM external Input1, the internal clock provided to
elmot 1:d0dfbce63a89 613 * the LPTIM must be not be prescaled.
elmot 1:d0dfbce63a89 614 * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
elmot 1:d0dfbce63a89 615 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 616 * @param Prescaler This parameter can be one of the following values:
elmot 1:d0dfbce63a89 617 * @arg @ref LL_LPTIM_PRESCALER_DIV1
elmot 1:d0dfbce63a89 618 * @arg @ref LL_LPTIM_PRESCALER_DIV2
elmot 1:d0dfbce63a89 619 * @arg @ref LL_LPTIM_PRESCALER_DIV4
elmot 1:d0dfbce63a89 620 * @arg @ref LL_LPTIM_PRESCALER_DIV8
elmot 1:d0dfbce63a89 621 * @arg @ref LL_LPTIM_PRESCALER_DIV16
elmot 1:d0dfbce63a89 622 * @arg @ref LL_LPTIM_PRESCALER_DIV32
elmot 1:d0dfbce63a89 623 * @arg @ref LL_LPTIM_PRESCALER_DIV64
elmot 1:d0dfbce63a89 624 * @arg @ref LL_LPTIM_PRESCALER_DIV128
elmot 1:d0dfbce63a89 625 * @retval None
elmot 1:d0dfbce63a89 626 */
elmot 1:d0dfbce63a89 627 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
elmot 1:d0dfbce63a89 628 {
elmot 1:d0dfbce63a89 629 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
elmot 1:d0dfbce63a89 630 }
elmot 1:d0dfbce63a89 631
elmot 1:d0dfbce63a89 632 /**
elmot 1:d0dfbce63a89 633 * @brief Get actual prescaler division ratio.
elmot 1:d0dfbce63a89 634 * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
elmot 1:d0dfbce63a89 635 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 636 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 637 * @arg @ref LL_LPTIM_PRESCALER_DIV1
elmot 1:d0dfbce63a89 638 * @arg @ref LL_LPTIM_PRESCALER_DIV2
elmot 1:d0dfbce63a89 639 * @arg @ref LL_LPTIM_PRESCALER_DIV4
elmot 1:d0dfbce63a89 640 * @arg @ref LL_LPTIM_PRESCALER_DIV8
elmot 1:d0dfbce63a89 641 * @arg @ref LL_LPTIM_PRESCALER_DIV16
elmot 1:d0dfbce63a89 642 * @arg @ref LL_LPTIM_PRESCALER_DIV32
elmot 1:d0dfbce63a89 643 * @arg @ref LL_LPTIM_PRESCALER_DIV64
elmot 1:d0dfbce63a89 644 * @arg @ref LL_LPTIM_PRESCALER_DIV128
elmot 1:d0dfbce63a89 645 */
elmot 1:d0dfbce63a89 646 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 647 {
elmot 1:d0dfbce63a89 648 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
elmot 1:d0dfbce63a89 649 }
elmot 1:d0dfbce63a89 650
elmot 1:d0dfbce63a89 651 /**
elmot 1:d0dfbce63a89 652 * @brief Set LPTIM input 1 source (default GPIO).
elmot 1:d0dfbce63a89 653 * @rmtoll OR OR_0 LL_LPTIM_SetInput1Src
elmot 1:d0dfbce63a89 654 * @rmtoll OR OR_1 LL_LPTIM_SetInput1Src
elmot 1:d0dfbce63a89 655 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 656 * @param Src This parameter can be one of the following values:
elmot 1:d0dfbce63a89 657 * @arg @ref LL_LPTIM_INPUT1_SRC_GPIO
elmot 1:d0dfbce63a89 658 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1
elmot 1:d0dfbce63a89 659 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP2
elmot 1:d0dfbce63a89 660 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1_COMP2
elmot 1:d0dfbce63a89 661 * @retval None
elmot 1:d0dfbce63a89 662 */
elmot 1:d0dfbce63a89 663 __STATIC_INLINE void LL_LPTIM_SetInput1Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
elmot 1:d0dfbce63a89 664 {
elmot 1:d0dfbce63a89 665 WRITE_REG(LPTIMx->OR, Src);
elmot 1:d0dfbce63a89 666 }
elmot 1:d0dfbce63a89 667
elmot 1:d0dfbce63a89 668 /**
elmot 1:d0dfbce63a89 669 * @brief Set LPTIM input 2 source (default GPIO).
elmot 1:d0dfbce63a89 670 * @rmtoll OR OR_0 LL_LPTIM_SetInput2Src
elmot 1:d0dfbce63a89 671 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 672 * @param Src This parameter can be one of the following values:
elmot 1:d0dfbce63a89 673 * @arg @ref LL_LPTIM_INPUT2_SRC_GPIO
elmot 1:d0dfbce63a89 674 * @arg @ref LL_LPTIM_INPUT2_SRC_COMP2
elmot 1:d0dfbce63a89 675 * @retval None
elmot 1:d0dfbce63a89 676 */
elmot 1:d0dfbce63a89 677 __STATIC_INLINE void LL_LPTIM_SetInput2Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
elmot 1:d0dfbce63a89 678 {
elmot 1:d0dfbce63a89 679 WRITE_REG(LPTIMx->OR, Src);
elmot 1:d0dfbce63a89 680 }
elmot 1:d0dfbce63a89 681
elmot 1:d0dfbce63a89 682 /**
elmot 1:d0dfbce63a89 683 * @}
elmot 1:d0dfbce63a89 684 */
elmot 1:d0dfbce63a89 685
elmot 1:d0dfbce63a89 686 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
elmot 1:d0dfbce63a89 687 * @{
elmot 1:d0dfbce63a89 688 */
elmot 1:d0dfbce63a89 689
elmot 1:d0dfbce63a89 690 /**
elmot 1:d0dfbce63a89 691 * @brief Enable the timeout function
elmot 1:d0dfbce63a89 692 * @note This function must be called when the LPTIM instance is disabled.
elmot 1:d0dfbce63a89 693 * @note The first trigger event will start the timer, any successive trigger
elmot 1:d0dfbce63a89 694 * event will reset the counter and the timer will restart.
elmot 1:d0dfbce63a89 695 * @note The timeout value corresponds to the compare value; if no trigger
elmot 1:d0dfbce63a89 696 * occurs within the expected time frame, the MCU is waked-up by the
elmot 1:d0dfbce63a89 697 * compare match event.
elmot 1:d0dfbce63a89 698 * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
elmot 1:d0dfbce63a89 699 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 700 * @retval None
elmot 1:d0dfbce63a89 701 */
elmot 1:d0dfbce63a89 702 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 703 {
elmot 1:d0dfbce63a89 704 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
elmot 1:d0dfbce63a89 705 }
elmot 1:d0dfbce63a89 706
elmot 1:d0dfbce63a89 707 /**
elmot 1:d0dfbce63a89 708 * @brief Disable the timeout function
elmot 1:d0dfbce63a89 709 * @note This function must be called when the LPTIM instance is disabled.
elmot 1:d0dfbce63a89 710 * @note A trigger event arriving when the timer is already started will be
elmot 1:d0dfbce63a89 711 * ignored.
elmot 1:d0dfbce63a89 712 * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
elmot 1:d0dfbce63a89 713 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 714 * @retval None
elmot 1:d0dfbce63a89 715 */
elmot 1:d0dfbce63a89 716 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 717 {
elmot 1:d0dfbce63a89 718 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
elmot 1:d0dfbce63a89 719 }
elmot 1:d0dfbce63a89 720
elmot 1:d0dfbce63a89 721 /**
elmot 1:d0dfbce63a89 722 * @brief Indicate whether the timeout function is enabled.
elmot 1:d0dfbce63a89 723 * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
elmot 1:d0dfbce63a89 724 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 725 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 726 */
elmot 1:d0dfbce63a89 727 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 728 {
elmot 1:d0dfbce63a89 729 return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == (LPTIM_CFGR_TIMOUT));
elmot 1:d0dfbce63a89 730 }
elmot 1:d0dfbce63a89 731
elmot 1:d0dfbce63a89 732 /**
elmot 1:d0dfbce63a89 733 * @brief Start the LPTIM counter
elmot 1:d0dfbce63a89 734 * @note This function must be called when the LPTIM instance is disabled.
elmot 1:d0dfbce63a89 735 * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
elmot 1:d0dfbce63a89 736 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 737 * @retval None
elmot 1:d0dfbce63a89 738 */
elmot 1:d0dfbce63a89 739 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 740 {
elmot 1:d0dfbce63a89 741 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
elmot 1:d0dfbce63a89 742 }
elmot 1:d0dfbce63a89 743
elmot 1:d0dfbce63a89 744 /**
elmot 1:d0dfbce63a89 745 * @brief Configure the external trigger used as a trigger event for the LPTIM.
elmot 1:d0dfbce63a89 746 * @note This function must be called when the LPTIM instance is disabled.
elmot 1:d0dfbce63a89 747 * @note An internal clock source must be present when a digital filter is
elmot 1:d0dfbce63a89 748 * required for the trigger.
elmot 1:d0dfbce63a89 749 * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
elmot 1:d0dfbce63a89 750 * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
elmot 1:d0dfbce63a89 751 * CFGR TRIGEN LL_LPTIM_ConfigTrigger
elmot 1:d0dfbce63a89 752 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 753 * @param Source This parameter can be one of the following values:
elmot 1:d0dfbce63a89 754 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
elmot 1:d0dfbce63a89 755 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
elmot 1:d0dfbce63a89 756 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
elmot 1:d0dfbce63a89 757 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
elmot 1:d0dfbce63a89 758 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
elmot 1:d0dfbce63a89 759 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
elmot 1:d0dfbce63a89 760 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
elmot 1:d0dfbce63a89 761 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
elmot 1:d0dfbce63a89 762 * @param Filter This parameter can be one of the following values:
elmot 1:d0dfbce63a89 763 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
elmot 1:d0dfbce63a89 764 * @arg @ref LL_LPTIM_TRIG_FILTER_2
elmot 1:d0dfbce63a89 765 * @arg @ref LL_LPTIM_TRIG_FILTER_4
elmot 1:d0dfbce63a89 766 * @arg @ref LL_LPTIM_TRIG_FILTER_8
elmot 1:d0dfbce63a89 767 * @param Polarity This parameter can be one of the following values:
elmot 1:d0dfbce63a89 768 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
elmot 1:d0dfbce63a89 769 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
elmot 1:d0dfbce63a89 770 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
elmot 1:d0dfbce63a89 771 * @retval None
elmot 1:d0dfbce63a89 772 */
elmot 1:d0dfbce63a89 773 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
elmot 1:d0dfbce63a89 774 {
elmot 1:d0dfbce63a89 775 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
elmot 1:d0dfbce63a89 776 }
elmot 1:d0dfbce63a89 777
elmot 1:d0dfbce63a89 778 /**
elmot 1:d0dfbce63a89 779 * @brief Get actual external trigger source.
elmot 1:d0dfbce63a89 780 * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
elmot 1:d0dfbce63a89 781 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 782 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 783 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
elmot 1:d0dfbce63a89 784 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
elmot 1:d0dfbce63a89 785 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
elmot 1:d0dfbce63a89 786 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
elmot 1:d0dfbce63a89 787 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
elmot 1:d0dfbce63a89 788 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
elmot 1:d0dfbce63a89 789 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
elmot 1:d0dfbce63a89 790 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
elmot 1:d0dfbce63a89 791 */
elmot 1:d0dfbce63a89 792 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 793 {
elmot 1:d0dfbce63a89 794 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
elmot 1:d0dfbce63a89 795 }
elmot 1:d0dfbce63a89 796
elmot 1:d0dfbce63a89 797 /**
elmot 1:d0dfbce63a89 798 * @brief Get actual external trigger filter.
elmot 1:d0dfbce63a89 799 * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
elmot 1:d0dfbce63a89 800 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 801 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 802 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
elmot 1:d0dfbce63a89 803 * @arg @ref LL_LPTIM_TRIG_FILTER_2
elmot 1:d0dfbce63a89 804 * @arg @ref LL_LPTIM_TRIG_FILTER_4
elmot 1:d0dfbce63a89 805 * @arg @ref LL_LPTIM_TRIG_FILTER_8
elmot 1:d0dfbce63a89 806 */
elmot 1:d0dfbce63a89 807 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 808 {
elmot 1:d0dfbce63a89 809 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
elmot 1:d0dfbce63a89 810 }
elmot 1:d0dfbce63a89 811
elmot 1:d0dfbce63a89 812 /**
elmot 1:d0dfbce63a89 813 * @brief Get actual external trigger polarity.
elmot 1:d0dfbce63a89 814 * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
elmot 1:d0dfbce63a89 815 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 816 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 817 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
elmot 1:d0dfbce63a89 818 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
elmot 1:d0dfbce63a89 819 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
elmot 1:d0dfbce63a89 820 */
elmot 1:d0dfbce63a89 821 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 822 {
elmot 1:d0dfbce63a89 823 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
elmot 1:d0dfbce63a89 824 }
elmot 1:d0dfbce63a89 825
elmot 1:d0dfbce63a89 826 /**
elmot 1:d0dfbce63a89 827 * @}
elmot 1:d0dfbce63a89 828 */
elmot 1:d0dfbce63a89 829
elmot 1:d0dfbce63a89 830 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
elmot 1:d0dfbce63a89 831 * @{
elmot 1:d0dfbce63a89 832 */
elmot 1:d0dfbce63a89 833
elmot 1:d0dfbce63a89 834 /**
elmot 1:d0dfbce63a89 835 * @brief Set the source of the clock used by the LPTIM instance.
elmot 1:d0dfbce63a89 836 * @note This function must be called when the LPTIM instance is disabled.
elmot 1:d0dfbce63a89 837 * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
elmot 1:d0dfbce63a89 838 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 839 * @param ClockSource This parameter can be one of the following values:
elmot 1:d0dfbce63a89 840 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
elmot 1:d0dfbce63a89 841 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
elmot 1:d0dfbce63a89 842 * @retval None
elmot 1:d0dfbce63a89 843 */
elmot 1:d0dfbce63a89 844 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
elmot 1:d0dfbce63a89 845 {
elmot 1:d0dfbce63a89 846 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
elmot 1:d0dfbce63a89 847 }
elmot 1:d0dfbce63a89 848
elmot 1:d0dfbce63a89 849 /**
elmot 1:d0dfbce63a89 850 * @brief Get actual LPTIM instance clock source.
elmot 1:d0dfbce63a89 851 * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
elmot 1:d0dfbce63a89 852 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 853 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 854 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
elmot 1:d0dfbce63a89 855 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
elmot 1:d0dfbce63a89 856 */
elmot 1:d0dfbce63a89 857 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 858 {
elmot 1:d0dfbce63a89 859 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
elmot 1:d0dfbce63a89 860 }
elmot 1:d0dfbce63a89 861
elmot 1:d0dfbce63a89 862 /**
elmot 1:d0dfbce63a89 863 * @brief Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source.
elmot 1:d0dfbce63a89 864 * @note This function must be called when the LPTIM instance is disabled.
elmot 1:d0dfbce63a89 865 * @note When both external clock signal edges are considered active ones,
elmot 1:d0dfbce63a89 866 * the LPTIM must also be clocked by an internal clock source with a
elmot 1:d0dfbce63a89 867 * frequency equal to at least four times the external clock frequency.
elmot 1:d0dfbce63a89 868 * @note An internal clock source must be present when a digital filter is
elmot 1:d0dfbce63a89 869 * required for external clock.
elmot 1:d0dfbce63a89 870 * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
elmot 1:d0dfbce63a89 871 * CFGR CKPOL LL_LPTIM_ConfigClock
elmot 1:d0dfbce63a89 872 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 873 * @param ClockFilter This parameter can be one of the following values:
elmot 1:d0dfbce63a89 874 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
elmot 1:d0dfbce63a89 875 * @arg @ref LL_LPTIM_CLK_FILTER_2
elmot 1:d0dfbce63a89 876 * @arg @ref LL_LPTIM_CLK_FILTER_4
elmot 1:d0dfbce63a89 877 * @arg @ref LL_LPTIM_CLK_FILTER_8
elmot 1:d0dfbce63a89 878 * @param ClockPolarity This parameter can be one of the following values:
elmot 1:d0dfbce63a89 879 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
elmot 1:d0dfbce63a89 880 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
elmot 1:d0dfbce63a89 881 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
elmot 1:d0dfbce63a89 882 * @retval None
elmot 1:d0dfbce63a89 883 */
elmot 1:d0dfbce63a89 884 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
elmot 1:d0dfbce63a89 885 {
elmot 1:d0dfbce63a89 886 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
elmot 1:d0dfbce63a89 887 }
elmot 1:d0dfbce63a89 888
elmot 1:d0dfbce63a89 889 /**
elmot 1:d0dfbce63a89 890 * @brief Get actual clock polarity
elmot 1:d0dfbce63a89 891 * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
elmot 1:d0dfbce63a89 892 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 893 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 894 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
elmot 1:d0dfbce63a89 895 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
elmot 1:d0dfbce63a89 896 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
elmot 1:d0dfbce63a89 897 */
elmot 1:d0dfbce63a89 898 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 899 {
elmot 1:d0dfbce63a89 900 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
elmot 1:d0dfbce63a89 901 }
elmot 1:d0dfbce63a89 902
elmot 1:d0dfbce63a89 903 /**
elmot 1:d0dfbce63a89 904 * @brief Get actual clock digital filter
elmot 1:d0dfbce63a89 905 * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
elmot 1:d0dfbce63a89 906 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 907 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 908 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
elmot 1:d0dfbce63a89 909 * @arg @ref LL_LPTIM_CLK_FILTER_2
elmot 1:d0dfbce63a89 910 * @arg @ref LL_LPTIM_CLK_FILTER_4
elmot 1:d0dfbce63a89 911 * @arg @ref LL_LPTIM_CLK_FILTER_8
elmot 1:d0dfbce63a89 912 */
elmot 1:d0dfbce63a89 913 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 914 {
elmot 1:d0dfbce63a89 915 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
elmot 1:d0dfbce63a89 916 }
elmot 1:d0dfbce63a89 917
elmot 1:d0dfbce63a89 918 /**
elmot 1:d0dfbce63a89 919 * @}
elmot 1:d0dfbce63a89 920 */
elmot 1:d0dfbce63a89 921
elmot 1:d0dfbce63a89 922 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
elmot 1:d0dfbce63a89 923 * @{
elmot 1:d0dfbce63a89 924 */
elmot 1:d0dfbce63a89 925
elmot 1:d0dfbce63a89 926 /**
elmot 1:d0dfbce63a89 927 * @brief Configure the encoder mode.
elmot 1:d0dfbce63a89 928 * @note This function must be called when the LPTIM instance is disabled.
elmot 1:d0dfbce63a89 929 * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
elmot 1:d0dfbce63a89 930 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 931 * @param EncoderMode This parameter can be one of the following values:
elmot 1:d0dfbce63a89 932 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
elmot 1:d0dfbce63a89 933 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
elmot 1:d0dfbce63a89 934 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
elmot 1:d0dfbce63a89 935 * @retval None
elmot 1:d0dfbce63a89 936 */
elmot 1:d0dfbce63a89 937 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
elmot 1:d0dfbce63a89 938 {
elmot 1:d0dfbce63a89 939 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
elmot 1:d0dfbce63a89 940 }
elmot 1:d0dfbce63a89 941
elmot 1:d0dfbce63a89 942 /**
elmot 1:d0dfbce63a89 943 * @brief Get actual encoder mode.
elmot 1:d0dfbce63a89 944 * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
elmot 1:d0dfbce63a89 945 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 946 * @retval Returned value can be one of the following values:
elmot 1:d0dfbce63a89 947 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
elmot 1:d0dfbce63a89 948 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
elmot 1:d0dfbce63a89 949 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
elmot 1:d0dfbce63a89 950 */
elmot 1:d0dfbce63a89 951 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 952 {
elmot 1:d0dfbce63a89 953 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
elmot 1:d0dfbce63a89 954 }
elmot 1:d0dfbce63a89 955
elmot 1:d0dfbce63a89 956 /**
elmot 1:d0dfbce63a89 957 * @brief Enable the encoder mode
elmot 1:d0dfbce63a89 958 * @note This function must be called when the LPTIM instance is disabled.
elmot 1:d0dfbce63a89 959 * @note In this mode the LPTIM instance must be clocked by an internal clock
elmot 1:d0dfbce63a89 960 * source. Also, the prescaler division ratio must be equal to 1.
elmot 1:d0dfbce63a89 961 * @note LPTIM instance must be configured in continuous mode prior enabling
elmot 1:d0dfbce63a89 962 * the encoder mode.
elmot 1:d0dfbce63a89 963 * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
elmot 1:d0dfbce63a89 964 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 965 * @retval None
elmot 1:d0dfbce63a89 966 */
elmot 1:d0dfbce63a89 967 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 968 {
elmot 1:d0dfbce63a89 969 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
elmot 1:d0dfbce63a89 970 }
elmot 1:d0dfbce63a89 971
elmot 1:d0dfbce63a89 972 /**
elmot 1:d0dfbce63a89 973 * @brief Disable the encoder mode
elmot 1:d0dfbce63a89 974 * @note This function must be called when the LPTIM instance is disabled.
elmot 1:d0dfbce63a89 975 * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
elmot 1:d0dfbce63a89 976 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 977 * @retval None
elmot 1:d0dfbce63a89 978 */
elmot 1:d0dfbce63a89 979 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 980 {
elmot 1:d0dfbce63a89 981 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
elmot 1:d0dfbce63a89 982 }
elmot 1:d0dfbce63a89 983
elmot 1:d0dfbce63a89 984 /**
elmot 1:d0dfbce63a89 985 * @brief Indicates whether the LPTIM operates in encoder mode.
elmot 1:d0dfbce63a89 986 * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
elmot 1:d0dfbce63a89 987 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 988 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 989 */
elmot 1:d0dfbce63a89 990 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 991 {
elmot 1:d0dfbce63a89 992 return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == (LPTIM_CFGR_ENC));
elmot 1:d0dfbce63a89 993 }
elmot 1:d0dfbce63a89 994
elmot 1:d0dfbce63a89 995 /**
elmot 1:d0dfbce63a89 996 * @}
elmot 1:d0dfbce63a89 997 */
elmot 1:d0dfbce63a89 998
elmot 1:d0dfbce63a89 999 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
elmot 1:d0dfbce63a89 1000 * @{
elmot 1:d0dfbce63a89 1001 */
elmot 1:d0dfbce63a89 1002
elmot 1:d0dfbce63a89 1003 /**
elmot 1:d0dfbce63a89 1004 * @brief Clear the compare match flag (CMPMCF)
elmot 1:d0dfbce63a89 1005 * @rmtoll ICR CMPMCF LL_LPTIM_ClearFLAG_CMPM
elmot 1:d0dfbce63a89 1006 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1007 * @retval None
elmot 1:d0dfbce63a89 1008 */
elmot 1:d0dfbce63a89 1009 __STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1010 {
elmot 1:d0dfbce63a89 1011 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
elmot 1:d0dfbce63a89 1012 }
elmot 1:d0dfbce63a89 1013
elmot 1:d0dfbce63a89 1014 /**
elmot 1:d0dfbce63a89 1015 * @brief Inform application whether a compare match interrupt has occurred.
elmot 1:d0dfbce63a89 1016 * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
elmot 1:d0dfbce63a89 1017 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1018 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1019 */
elmot 1:d0dfbce63a89 1020 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1021 {
elmot 1:d0dfbce63a89 1022 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == (LPTIM_ISR_CMPM));
elmot 1:d0dfbce63a89 1023 }
elmot 1:d0dfbce63a89 1024
elmot 1:d0dfbce63a89 1025 /**
elmot 1:d0dfbce63a89 1026 * @brief Clear the autoreload match flag (ARRMCF)
elmot 1:d0dfbce63a89 1027 * @rmtoll ICR ARRMCF LL_LPTIM_ClearFLAG_ARRM
elmot 1:d0dfbce63a89 1028 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1029 * @retval None
elmot 1:d0dfbce63a89 1030 */
elmot 1:d0dfbce63a89 1031 __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1032 {
elmot 1:d0dfbce63a89 1033 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
elmot 1:d0dfbce63a89 1034 }
elmot 1:d0dfbce63a89 1035
elmot 1:d0dfbce63a89 1036 /**
elmot 1:d0dfbce63a89 1037 * @brief Inform application whether a autoreload match interrupt has occured.
elmot 1:d0dfbce63a89 1038 * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
elmot 1:d0dfbce63a89 1039 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1040 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1041 */
elmot 1:d0dfbce63a89 1042 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1043 {
elmot 1:d0dfbce63a89 1044 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == (LPTIM_ISR_ARRM));
elmot 1:d0dfbce63a89 1045 }
elmot 1:d0dfbce63a89 1046
elmot 1:d0dfbce63a89 1047 /**
elmot 1:d0dfbce63a89 1048 * @brief Clear the external trigger valid edge flag(EXTTRIGCF).
elmot 1:d0dfbce63a89 1049 * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
elmot 1:d0dfbce63a89 1050 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1051 * @retval None
elmot 1:d0dfbce63a89 1052 */
elmot 1:d0dfbce63a89 1053 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1054 {
elmot 1:d0dfbce63a89 1055 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
elmot 1:d0dfbce63a89 1056 }
elmot 1:d0dfbce63a89 1057
elmot 1:d0dfbce63a89 1058 /**
elmot 1:d0dfbce63a89 1059 * @brief Inform application whether a valid edge on the selected external trigger input has occurred.
elmot 1:d0dfbce63a89 1060 * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
elmot 1:d0dfbce63a89 1061 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1062 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1063 */
elmot 1:d0dfbce63a89 1064 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1065 {
elmot 1:d0dfbce63a89 1066 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == (LPTIM_ISR_EXTTRIG));
elmot 1:d0dfbce63a89 1067 }
elmot 1:d0dfbce63a89 1068
elmot 1:d0dfbce63a89 1069 /**
elmot 1:d0dfbce63a89 1070 * @brief Clear the compare register update interrupt flag (CMPOKCF).
elmot 1:d0dfbce63a89 1071 * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
elmot 1:d0dfbce63a89 1072 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1073 * @retval None
elmot 1:d0dfbce63a89 1074 */
elmot 1:d0dfbce63a89 1075 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1076 {
elmot 1:d0dfbce63a89 1077 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
elmot 1:d0dfbce63a89 1078 }
elmot 1:d0dfbce63a89 1079
elmot 1:d0dfbce63a89 1080 /**
elmot 1:d0dfbce63a89 1081 * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed; If so, a new one can be initiated.
elmot 1:d0dfbce63a89 1082 * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
elmot 1:d0dfbce63a89 1083 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1084 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1085 */
elmot 1:d0dfbce63a89 1086 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1087 {
elmot 1:d0dfbce63a89 1088 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == (LPTIM_ISR_CMPOK));
elmot 1:d0dfbce63a89 1089 }
elmot 1:d0dfbce63a89 1090
elmot 1:d0dfbce63a89 1091 /**
elmot 1:d0dfbce63a89 1092 * @brief Clear the autoreload register update interrupt flag (ARROKCF).
elmot 1:d0dfbce63a89 1093 * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
elmot 1:d0dfbce63a89 1094 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1095 * @retval None
elmot 1:d0dfbce63a89 1096 */
elmot 1:d0dfbce63a89 1097 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1098 {
elmot 1:d0dfbce63a89 1099 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
elmot 1:d0dfbce63a89 1100 }
elmot 1:d0dfbce63a89 1101
elmot 1:d0dfbce63a89 1102 /**
elmot 1:d0dfbce63a89 1103 * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed; If so, a new one can be initiated.
elmot 1:d0dfbce63a89 1104 * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
elmot 1:d0dfbce63a89 1105 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1106 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1107 */
elmot 1:d0dfbce63a89 1108 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1109 {
elmot 1:d0dfbce63a89 1110 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == (LPTIM_ISR_ARROK));
elmot 1:d0dfbce63a89 1111 }
elmot 1:d0dfbce63a89 1112
elmot 1:d0dfbce63a89 1113 /**
elmot 1:d0dfbce63a89 1114 * @brief Clear the counter direction change to up interrupt flag (UPCF).
elmot 1:d0dfbce63a89 1115 * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
elmot 1:d0dfbce63a89 1116 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1117 * @retval None
elmot 1:d0dfbce63a89 1118 */
elmot 1:d0dfbce63a89 1119 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1120 {
elmot 1:d0dfbce63a89 1121 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
elmot 1:d0dfbce63a89 1122 }
elmot 1:d0dfbce63a89 1123
elmot 1:d0dfbce63a89 1124 /**
elmot 1:d0dfbce63a89 1125 * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode).
elmot 1:d0dfbce63a89 1126 * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
elmot 1:d0dfbce63a89 1127 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1128 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1129 */
elmot 1:d0dfbce63a89 1130 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1131 {
elmot 1:d0dfbce63a89 1132 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == (LPTIM_ISR_UP));
elmot 1:d0dfbce63a89 1133 }
elmot 1:d0dfbce63a89 1134
elmot 1:d0dfbce63a89 1135 /**
elmot 1:d0dfbce63a89 1136 * @brief Clear the counter direction change to down interrupt flag (DOWNCF).
elmot 1:d0dfbce63a89 1137 * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
elmot 1:d0dfbce63a89 1138 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1139 * @retval None
elmot 1:d0dfbce63a89 1140 */
elmot 1:d0dfbce63a89 1141 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1142 {
elmot 1:d0dfbce63a89 1143 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
elmot 1:d0dfbce63a89 1144 }
elmot 1:d0dfbce63a89 1145
elmot 1:d0dfbce63a89 1146 /**
elmot 1:d0dfbce63a89 1147 * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode).
elmot 1:d0dfbce63a89 1148 * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
elmot 1:d0dfbce63a89 1149 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1150 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1151 */
elmot 1:d0dfbce63a89 1152 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1153 {
elmot 1:d0dfbce63a89 1154 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == (LPTIM_ISR_DOWN));
elmot 1:d0dfbce63a89 1155 }
elmot 1:d0dfbce63a89 1156
elmot 1:d0dfbce63a89 1157 /**
elmot 1:d0dfbce63a89 1158 * @}
elmot 1:d0dfbce63a89 1159 */
elmot 1:d0dfbce63a89 1160
elmot 1:d0dfbce63a89 1161 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
elmot 1:d0dfbce63a89 1162 * @{
elmot 1:d0dfbce63a89 1163 */
elmot 1:d0dfbce63a89 1164
elmot 1:d0dfbce63a89 1165 /**
elmot 1:d0dfbce63a89 1166 * @brief Enable compare match interrupt (CMPMIE).
elmot 1:d0dfbce63a89 1167 * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
elmot 1:d0dfbce63a89 1168 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1169 * @retval None
elmot 1:d0dfbce63a89 1170 */
elmot 1:d0dfbce63a89 1171 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1172 {
elmot 1:d0dfbce63a89 1173 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
elmot 1:d0dfbce63a89 1174 }
elmot 1:d0dfbce63a89 1175
elmot 1:d0dfbce63a89 1176 /**
elmot 1:d0dfbce63a89 1177 * @brief Disable compare match interrupt (CMPMIE).
elmot 1:d0dfbce63a89 1178 * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
elmot 1:d0dfbce63a89 1179 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1180 * @retval None
elmot 1:d0dfbce63a89 1181 */
elmot 1:d0dfbce63a89 1182 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1183 {
elmot 1:d0dfbce63a89 1184 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
elmot 1:d0dfbce63a89 1185 }
elmot 1:d0dfbce63a89 1186
elmot 1:d0dfbce63a89 1187 /**
elmot 1:d0dfbce63a89 1188 * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
elmot 1:d0dfbce63a89 1189 * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
elmot 1:d0dfbce63a89 1190 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1191 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1192 */
elmot 1:d0dfbce63a89 1193 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1194 {
elmot 1:d0dfbce63a89 1195 return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == (LPTIM_IER_CMPMIE));
elmot 1:d0dfbce63a89 1196 }
elmot 1:d0dfbce63a89 1197
elmot 1:d0dfbce63a89 1198 /**
elmot 1:d0dfbce63a89 1199 * @brief Enable autoreload match interrupt (ARRMIE).
elmot 1:d0dfbce63a89 1200 * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
elmot 1:d0dfbce63a89 1201 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1202 * @retval None
elmot 1:d0dfbce63a89 1203 */
elmot 1:d0dfbce63a89 1204 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1205 {
elmot 1:d0dfbce63a89 1206 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
elmot 1:d0dfbce63a89 1207 }
elmot 1:d0dfbce63a89 1208
elmot 1:d0dfbce63a89 1209 /**
elmot 1:d0dfbce63a89 1210 * @brief Disable autoreload match interrupt (ARRMIE).
elmot 1:d0dfbce63a89 1211 * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
elmot 1:d0dfbce63a89 1212 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1213 * @retval None
elmot 1:d0dfbce63a89 1214 */
elmot 1:d0dfbce63a89 1215 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1216 {
elmot 1:d0dfbce63a89 1217 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
elmot 1:d0dfbce63a89 1218 }
elmot 1:d0dfbce63a89 1219
elmot 1:d0dfbce63a89 1220 /**
elmot 1:d0dfbce63a89 1221 * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
elmot 1:d0dfbce63a89 1222 * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
elmot 1:d0dfbce63a89 1223 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1224 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1225 */
elmot 1:d0dfbce63a89 1226 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1227 {
elmot 1:d0dfbce63a89 1228 return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == (LPTIM_IER_ARRMIE));
elmot 1:d0dfbce63a89 1229 }
elmot 1:d0dfbce63a89 1230
elmot 1:d0dfbce63a89 1231 /**
elmot 1:d0dfbce63a89 1232 * @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
elmot 1:d0dfbce63a89 1233 * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
elmot 1:d0dfbce63a89 1234 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1235 * @retval None
elmot 1:d0dfbce63a89 1236 */
elmot 1:d0dfbce63a89 1237 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1238 {
elmot 1:d0dfbce63a89 1239 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
elmot 1:d0dfbce63a89 1240 }
elmot 1:d0dfbce63a89 1241
elmot 1:d0dfbce63a89 1242 /**
elmot 1:d0dfbce63a89 1243 * @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
elmot 1:d0dfbce63a89 1244 * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
elmot 1:d0dfbce63a89 1245 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1246 * @retval None
elmot 1:d0dfbce63a89 1247 */
elmot 1:d0dfbce63a89 1248 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1249 {
elmot 1:d0dfbce63a89 1250 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
elmot 1:d0dfbce63a89 1251 }
elmot 1:d0dfbce63a89 1252
elmot 1:d0dfbce63a89 1253 /**
elmot 1:d0dfbce63a89 1254 * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
elmot 1:d0dfbce63a89 1255 * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
elmot 1:d0dfbce63a89 1256 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1257 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1258 */
elmot 1:d0dfbce63a89 1259 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1260 {
elmot 1:d0dfbce63a89 1261 return (READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == (LPTIM_IER_EXTTRIGIE));
elmot 1:d0dfbce63a89 1262 }
elmot 1:d0dfbce63a89 1263
elmot 1:d0dfbce63a89 1264 /**
elmot 1:d0dfbce63a89 1265 * @brief Enable compare register write completed interrupt (CMPOKIE).
elmot 1:d0dfbce63a89 1266 * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
elmot 1:d0dfbce63a89 1267 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1268 * @retval None
elmot 1:d0dfbce63a89 1269 */
elmot 1:d0dfbce63a89 1270 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1271 {
elmot 1:d0dfbce63a89 1272 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
elmot 1:d0dfbce63a89 1273 }
elmot 1:d0dfbce63a89 1274
elmot 1:d0dfbce63a89 1275 /**
elmot 1:d0dfbce63a89 1276 * @brief Disable compare register write completed interrupt (CMPOKIE).
elmot 1:d0dfbce63a89 1277 * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
elmot 1:d0dfbce63a89 1278 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1279 * @retval None
elmot 1:d0dfbce63a89 1280 */
elmot 1:d0dfbce63a89 1281 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1282 {
elmot 1:d0dfbce63a89 1283 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
elmot 1:d0dfbce63a89 1284 }
elmot 1:d0dfbce63a89 1285
elmot 1:d0dfbce63a89 1286 /**
elmot 1:d0dfbce63a89 1287 * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
elmot 1:d0dfbce63a89 1288 * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
elmot 1:d0dfbce63a89 1289 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1290 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1291 */
elmot 1:d0dfbce63a89 1292 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1293 {
elmot 1:d0dfbce63a89 1294 return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == (LPTIM_IER_CMPOKIE));
elmot 1:d0dfbce63a89 1295 }
elmot 1:d0dfbce63a89 1296
elmot 1:d0dfbce63a89 1297 /**
elmot 1:d0dfbce63a89 1298 * @brief Enable autoreload register write completed interrupt (ARROKIE).
elmot 1:d0dfbce63a89 1299 * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
elmot 1:d0dfbce63a89 1300 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1301 * @retval None
elmot 1:d0dfbce63a89 1302 */
elmot 1:d0dfbce63a89 1303 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1304 {
elmot 1:d0dfbce63a89 1305 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
elmot 1:d0dfbce63a89 1306 }
elmot 1:d0dfbce63a89 1307
elmot 1:d0dfbce63a89 1308 /**
elmot 1:d0dfbce63a89 1309 * @brief Disable autoreload register write completed interrupt (ARROKIE).
elmot 1:d0dfbce63a89 1310 * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
elmot 1:d0dfbce63a89 1311 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1312 * @retval None
elmot 1:d0dfbce63a89 1313 */
elmot 1:d0dfbce63a89 1314 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1315 {
elmot 1:d0dfbce63a89 1316 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
elmot 1:d0dfbce63a89 1317 }
elmot 1:d0dfbce63a89 1318
elmot 1:d0dfbce63a89 1319 /**
elmot 1:d0dfbce63a89 1320 * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
elmot 1:d0dfbce63a89 1321 * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
elmot 1:d0dfbce63a89 1322 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1323 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1324 */
elmot 1:d0dfbce63a89 1325 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1326 {
elmot 1:d0dfbce63a89 1327 return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == (LPTIM_IER_ARROKIE));
elmot 1:d0dfbce63a89 1328 }
elmot 1:d0dfbce63a89 1329
elmot 1:d0dfbce63a89 1330 /**
elmot 1:d0dfbce63a89 1331 * @brief Enable direction change to up interrupt (UPIE).
elmot 1:d0dfbce63a89 1332 * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
elmot 1:d0dfbce63a89 1333 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1334 * @retval None
elmot 1:d0dfbce63a89 1335 */
elmot 1:d0dfbce63a89 1336 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1337 {
elmot 1:d0dfbce63a89 1338 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
elmot 1:d0dfbce63a89 1339 }
elmot 1:d0dfbce63a89 1340
elmot 1:d0dfbce63a89 1341 /**
elmot 1:d0dfbce63a89 1342 * @brief Disable direction change to up interrupt (UPIE).
elmot 1:d0dfbce63a89 1343 * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
elmot 1:d0dfbce63a89 1344 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1345 * @retval None
elmot 1:d0dfbce63a89 1346 */
elmot 1:d0dfbce63a89 1347 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1348 {
elmot 1:d0dfbce63a89 1349 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
elmot 1:d0dfbce63a89 1350 }
elmot 1:d0dfbce63a89 1351
elmot 1:d0dfbce63a89 1352 /**
elmot 1:d0dfbce63a89 1353 * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
elmot 1:d0dfbce63a89 1354 * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
elmot 1:d0dfbce63a89 1355 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1356 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1357 */
elmot 1:d0dfbce63a89 1358 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1359 {
elmot 1:d0dfbce63a89 1360 return (READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == (LPTIM_IER_UPIE));
elmot 1:d0dfbce63a89 1361 }
elmot 1:d0dfbce63a89 1362
elmot 1:d0dfbce63a89 1363 /**
elmot 1:d0dfbce63a89 1364 * @brief Enable direction change to down interrupt (DOWNIE).
elmot 1:d0dfbce63a89 1365 * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
elmot 1:d0dfbce63a89 1366 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1367 * @retval None
elmot 1:d0dfbce63a89 1368 */
elmot 1:d0dfbce63a89 1369 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1370 {
elmot 1:d0dfbce63a89 1371 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
elmot 1:d0dfbce63a89 1372 }
elmot 1:d0dfbce63a89 1373
elmot 1:d0dfbce63a89 1374 /**
elmot 1:d0dfbce63a89 1375 * @brief Disable direction change to down interrupt (DOWNIE).
elmot 1:d0dfbce63a89 1376 * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
elmot 1:d0dfbce63a89 1377 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1378 * @retval None
elmot 1:d0dfbce63a89 1379 */
elmot 1:d0dfbce63a89 1380 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1381 {
elmot 1:d0dfbce63a89 1382 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
elmot 1:d0dfbce63a89 1383 }
elmot 1:d0dfbce63a89 1384
elmot 1:d0dfbce63a89 1385 /**
elmot 1:d0dfbce63a89 1386 * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
elmot 1:d0dfbce63a89 1387 * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
elmot 1:d0dfbce63a89 1388 * @param LPTIMx Low-Power Timer instance
elmot 1:d0dfbce63a89 1389 * @retval State of bit (1 or 0).
elmot 1:d0dfbce63a89 1390 */
elmot 1:d0dfbce63a89 1391 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx)
elmot 1:d0dfbce63a89 1392 {
elmot 1:d0dfbce63a89 1393 return (READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == (LPTIM_IER_DOWNIE));
elmot 1:d0dfbce63a89 1394 }
elmot 1:d0dfbce63a89 1395
elmot 1:d0dfbce63a89 1396 /**
elmot 1:d0dfbce63a89 1397 * @}
elmot 1:d0dfbce63a89 1398 */
elmot 1:d0dfbce63a89 1399
elmot 1:d0dfbce63a89 1400 #if defined(USE_FULL_LL_DRIVER)
elmot 1:d0dfbce63a89 1401 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
elmot 1:d0dfbce63a89 1402 * @{
elmot 1:d0dfbce63a89 1403 */
elmot 1:d0dfbce63a89 1404
elmot 1:d0dfbce63a89 1405 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
elmot 1:d0dfbce63a89 1406 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
elmot 1:d0dfbce63a89 1407 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
elmot 1:d0dfbce63a89 1408 /**
elmot 1:d0dfbce63a89 1409 * @}
elmot 1:d0dfbce63a89 1410 */
elmot 1:d0dfbce63a89 1411 #endif /* USE_FULL_LL_DRIVER */
elmot 1:d0dfbce63a89 1412
elmot 1:d0dfbce63a89 1413 /**
elmot 1:d0dfbce63a89 1414 * @}
elmot 1:d0dfbce63a89 1415 */
elmot 1:d0dfbce63a89 1416
elmot 1:d0dfbce63a89 1417 /**
elmot 1:d0dfbce63a89 1418 * @}
elmot 1:d0dfbce63a89 1419 */
elmot 1:d0dfbce63a89 1420
elmot 1:d0dfbce63a89 1421 #endif /* LPTIM1 || LPTIM2 */
elmot 1:d0dfbce63a89 1422
elmot 1:d0dfbce63a89 1423 /**
elmot 1:d0dfbce63a89 1424 * @}
elmot 1:d0dfbce63a89 1425 */
elmot 1:d0dfbce63a89 1426
elmot 1:d0dfbce63a89 1427 #ifdef __cplusplus
elmot 1:d0dfbce63a89 1428 }
elmot 1:d0dfbce63a89 1429 #endif
elmot 1:d0dfbce63a89 1430
elmot 1:d0dfbce63a89 1431 #endif /* __STM32L4xx_LL_LPTIM_H */
elmot 1:d0dfbce63a89 1432
elmot 1:d0dfbce63a89 1433 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/