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HAL_L476/stm32l4xx_ll_adc.h@1:d0dfbce63a89, 2017-02-24 (annotated)

Committer:: elmot
Date:: Fri Feb 24 21:13:56 2017 +0000
Revision:: 1:d0dfbce63a89

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elmot	1:d0dfbce63a89	1	/**
elmot	1:d0dfbce63a89	2	******************************************************************************
elmot	1:d0dfbce63a89	3	* @file stm32l4xx_ll_adc.h
elmot	1:d0dfbce63a89	4	* @author MCD Application Team
elmot	1:d0dfbce63a89	5	* @version V1.5.1
elmot	1:d0dfbce63a89	6	* @date 31-May-2016
elmot	1:d0dfbce63a89	7	* @brief Header file of ADC LL module.
elmot	1:d0dfbce63a89	8	******************************************************************************
elmot	1:d0dfbce63a89	9	* @attention
elmot	1:d0dfbce63a89	10	*
elmot	1:d0dfbce63a89	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot	1:d0dfbce63a89	12	*
elmot	1:d0dfbce63a89	13	* Redistribution and use in source and binary forms, with or without modification,
elmot	1:d0dfbce63a89	14	* are permitted provided that the following conditions are met:
elmot	1:d0dfbce63a89	15	* 1. Redistributions of source code must retain the above copyright notice,
elmot	1:d0dfbce63a89	16	* this list of conditions and the following disclaimer.
elmot	1:d0dfbce63a89	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
elmot	1:d0dfbce63a89	18	* this list of conditions and the following disclaimer in the documentation
elmot	1:d0dfbce63a89	19	* and/or other materials provided with the distribution.
elmot	1:d0dfbce63a89	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot	1:d0dfbce63a89	21	* may be used to endorse or promote products derived from this software
elmot	1:d0dfbce63a89	22	* without specific prior written permission.
elmot	1:d0dfbce63a89	23	*
elmot	1:d0dfbce63a89	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot	1:d0dfbce63a89	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot	1:d0dfbce63a89	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot	1:d0dfbce63a89	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot	1:d0dfbce63a89	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot	1:d0dfbce63a89	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot	1:d0dfbce63a89	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot	1:d0dfbce63a89	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot	1:d0dfbce63a89	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot	1:d0dfbce63a89	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot	1:d0dfbce63a89	34	*
elmot	1:d0dfbce63a89	35	******************************************************************************
elmot	1:d0dfbce63a89	36	*/
elmot	1:d0dfbce63a89	37
elmot	1:d0dfbce63a89	38	/* Define to prevent recursive inclusion -------------------------------------*/
elmot	1:d0dfbce63a89	39	#ifndef __STM32L4xx_LL_ADC_H
elmot	1:d0dfbce63a89	40	#define __STM32L4xx_LL_ADC_H
elmot	1:d0dfbce63a89	41
elmot	1:d0dfbce63a89	42	#ifdef __cplusplus
elmot	1:d0dfbce63a89	43	extern "C" {
elmot	1:d0dfbce63a89	44	#endif
elmot	1:d0dfbce63a89	45
elmot	1:d0dfbce63a89	46	/* Includes ------------------------------------------------------------------*/
elmot	1:d0dfbce63a89	47	#include "stm32l4xx.h"
elmot	1:d0dfbce63a89	48
elmot	1:d0dfbce63a89	49	/** @addtogroup STM32L4xx_LL_Driver
elmot	1:d0dfbce63a89	50	* @{
elmot	1:d0dfbce63a89	51	*/
elmot	1:d0dfbce63a89	52
elmot	1:d0dfbce63a89	53	#if defined (ADC1) \|\| defined (ADC2) \|\| defined (ADC3)
elmot	1:d0dfbce63a89	54
elmot	1:d0dfbce63a89	55	/** @defgroup ADC_LL ADC
elmot	1:d0dfbce63a89	56	* @{
elmot	1:d0dfbce63a89	57	*/
elmot	1:d0dfbce63a89	58
elmot	1:d0dfbce63a89	59	/* Private types -------------------------------------------------------------*/
elmot	1:d0dfbce63a89	60	/* Private variables ---------------------------------------------------------*/
elmot	1:d0dfbce63a89	61
elmot	1:d0dfbce63a89	62	/* Private constants ---------------------------------------------------------*/
elmot	1:d0dfbce63a89	63	/** @defgroup ADC_LL_Private_Constants ADC Private Constants
elmot	1:d0dfbce63a89	64	* @{
elmot	1:d0dfbce63a89	65	*/
elmot	1:d0dfbce63a89	66
elmot	1:d0dfbce63a89	67	/* Internal mask for ADC group regular sequencer: */
elmot	1:d0dfbce63a89	68	/* To select into literal LL_ADC_REG_RANK_x the relevant bits for: */
elmot	1:d0dfbce63a89	69	/* - sequencer register offset */
elmot	1:d0dfbce63a89	70	/* - sequencer rank bits position into the selected register */
elmot	1:d0dfbce63a89	71
elmot	1:d0dfbce63a89	72	/* Internal register offset for ADC group regular sequencer configuration */
elmot	1:d0dfbce63a89	73	/* (offset placed into a spare area of literal definition) */
elmot	1:d0dfbce63a89	74	#define ADC_SQR1_REGOFFSET ((uint32_t)0x00000000U)
elmot	1:d0dfbce63a89	75	#define ADC_SQR2_REGOFFSET ((uint32_t)0x00000100U)
elmot	1:d0dfbce63a89	76	#define ADC_SQR3_REGOFFSET ((uint32_t)0x00000200U)
elmot	1:d0dfbce63a89	77	#define ADC_SQR4_REGOFFSET ((uint32_t)0x00000300U)
elmot	1:d0dfbce63a89	78
elmot	1:d0dfbce63a89	79	#define ADC_REG_SQRX_REGOFFSET_MASK (ADC_SQR1_REGOFFSET \| ADC_SQR2_REGOFFSET \| ADC_SQR3_REGOFFSET \| ADC_SQR4_REGOFFSET)
elmot	1:d0dfbce63a89	80	#define ADC_REG_RANK_ID_SQRX_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0)
elmot	1:d0dfbce63a89	81
elmot	1:d0dfbce63a89	82	/* Definition of ADC group regular sequencer bits information to be inserted */
elmot	1:d0dfbce63a89	83	/* into ADC group regular sequencer ranks literals definition. */
elmot	1:d0dfbce63a89	84	#define ADC_REG_RANK_1_SQRX_BITOFFSET_POS ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_SQR1_SQ1) */
elmot	1:d0dfbce63a89	85	#define ADC_REG_RANK_2_SQRX_BITOFFSET_POS ((uint32_t)12U) /* Value equivalent to POSITION_VAL(ADC_SQR1_SQ2) */
elmot	1:d0dfbce63a89	86	#define ADC_REG_RANK_3_SQRX_BITOFFSET_POS ((uint32_t)18U) /* Value equivalent to POSITION_VAL(ADC_SQR1_SQ3) */
elmot	1:d0dfbce63a89	87	#define ADC_REG_RANK_4_SQRX_BITOFFSET_POS ((uint32_t)24U) /* Value equivalent to POSITION_VAL(ADC_SQR1_SQ4) */
elmot	1:d0dfbce63a89	88	#define ADC_REG_RANK_5_SQRX_BITOFFSET_POS ((uint32_t) 0U) /* Value equivalent to POSITION_VAL(ADC_SQR2_SQ5) */
elmot	1:d0dfbce63a89	89	#define ADC_REG_RANK_6_SQRX_BITOFFSET_POS ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_SQR2_SQ6) */
elmot	1:d0dfbce63a89	90	#define ADC_REG_RANK_7_SQRX_BITOFFSET_POS ((uint32_t)12U) /* Value equivalent to POSITION_VAL(ADC_SQR2_SQ7) */
elmot	1:d0dfbce63a89	91	#define ADC_REG_RANK_8_SQRX_BITOFFSET_POS ((uint32_t)18U) /* Value equivalent to POSITION_VAL(ADC_SQR2_SQ8) */
elmot	1:d0dfbce63a89	92	#define ADC_REG_RANK_9_SQRX_BITOFFSET_POS ((uint32_t)24U) /* Value equivalent to POSITION_VAL(ADC_SQR2_SQ9) */
elmot	1:d0dfbce63a89	93	#define ADC_REG_RANK_10_SQRX_BITOFFSET_POS ((uint32_t) 0U) /* Value equivalent to POSITION_VAL(ADC_SQR3_SQ10) */
elmot	1:d0dfbce63a89	94	#define ADC_REG_RANK_11_SQRX_BITOFFSET_POS ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_SQR3_SQ11) */
elmot	1:d0dfbce63a89	95	#define ADC_REG_RANK_12_SQRX_BITOFFSET_POS ((uint32_t)12U) /* Value equivalent to POSITION_VAL(ADC_SQR3_SQ12) */
elmot	1:d0dfbce63a89	96	#define ADC_REG_RANK_13_SQRX_BITOFFSET_POS ((uint32_t)18U) /* Value equivalent to POSITION_VAL(ADC_SQR3_SQ13) */
elmot	1:d0dfbce63a89	97	#define ADC_REG_RANK_14_SQRX_BITOFFSET_POS ((uint32_t)24U) /* Value equivalent to POSITION_VAL(ADC_SQR3_SQ14) */
elmot	1:d0dfbce63a89	98	#define ADC_REG_RANK_15_SQRX_BITOFFSET_POS ((uint32_t) 0U) /* Value equivalent to POSITION_VAL(ADC_SQR4_SQ15) */
elmot	1:d0dfbce63a89	99	#define ADC_REG_RANK_16_SQRX_BITOFFSET_POS ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_SQR4_SQ16) */
elmot	1:d0dfbce63a89	100
elmot	1:d0dfbce63a89	101
elmot	1:d0dfbce63a89	102
elmot	1:d0dfbce63a89	103	/* Internal mask for ADC group injected sequencer: */
elmot	1:d0dfbce63a89	104	/* To select into literal LL_ADC_INJ_RANK_x the relevant bits for: */
elmot	1:d0dfbce63a89	105	/* - data register offset */
elmot	1:d0dfbce63a89	106	/* - sequencer rank bits position into the selected register */
elmot	1:d0dfbce63a89	107
elmot	1:d0dfbce63a89	108	/* Internal register offset for ADC group injected data register */
elmot	1:d0dfbce63a89	109	/* (offset placed into a spare area of literal definition) */
elmot	1:d0dfbce63a89	110	#define ADC_JDR1_REGOFFSET ((uint32_t)0x00000000U)
elmot	1:d0dfbce63a89	111	#define ADC_JDR2_REGOFFSET ((uint32_t)0x00000100U)
elmot	1:d0dfbce63a89	112	#define ADC_JDR3_REGOFFSET ((uint32_t)0x00000200U)
elmot	1:d0dfbce63a89	113	#define ADC_JDR4_REGOFFSET ((uint32_t)0x00000300U)
elmot	1:d0dfbce63a89	114
elmot	1:d0dfbce63a89	115	#define ADC_INJ_JDRX_REGOFFSET_MASK (ADC_JDR1_REGOFFSET \| ADC_JDR2_REGOFFSET \| ADC_JDR3_REGOFFSET \| ADC_JDR4_REGOFFSET)
elmot	1:d0dfbce63a89	116	#define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0)
elmot	1:d0dfbce63a89	117
elmot	1:d0dfbce63a89	118	/* Definition of ADC group injected sequencer bits information to be inserted */
elmot	1:d0dfbce63a89	119	/* into ADC group injected sequencer ranks literals definition. */
elmot	1:d0dfbce63a89	120	#define ADC_INJ_RANK_1_JSQR_BITOFFSET_POS ((uint32_t) 8U) /* Value equivalent to POSITION_VAL(ADC_JSQR_JSQ1) */
elmot	1:d0dfbce63a89	121	#define ADC_INJ_RANK_2_JSQR_BITOFFSET_POS ((uint32_t)14U) /* Value equivalent to POSITION_VAL(ADC_JSQR_JSQ2) */
elmot	1:d0dfbce63a89	122	#define ADC_INJ_RANK_3_JSQR_BITOFFSET_POS ((uint32_t)20U) /* Value equivalent to POSITION_VAL(ADC_JSQR_JSQ3) */
elmot	1:d0dfbce63a89	123	#define ADC_INJ_RANK_4_JSQR_BITOFFSET_POS ((uint32_t)26U) /* Value equivalent to POSITION_VAL(ADC_JSQR_JSQ4) */
elmot	1:d0dfbce63a89	124
elmot	1:d0dfbce63a89	125
elmot	1:d0dfbce63a89	126
elmot	1:d0dfbce63a89	127	/* Internal mask for ADC group regular trigger: */
elmot	1:d0dfbce63a89	128	/* To select into literal LL_ADC_REG_TRIG_x the relevant bits for: */
elmot	1:d0dfbce63a89	129	/* - regular trigger source */
elmot	1:d0dfbce63a89	130	/* - regular trigger edge */
elmot	1:d0dfbce63a89	131	#define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value) */
elmot	1:d0dfbce63a89	132
elmot	1:d0dfbce63a89	133	/* Mask containing trigger source masks for each of possible */
elmot	1:d0dfbce63a89	134	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
elmot	1:d0dfbce63a89	135	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
elmot	1:d0dfbce63a89	136	#define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U * 0U)) \| \
elmot	1:d0dfbce63a89	137	((ADC_CFGR_EXTSEL) << (4U * 1U)) \| \
elmot	1:d0dfbce63a89	138	((ADC_CFGR_EXTSEL) << (4U * 2U)) \| \
elmot	1:d0dfbce63a89	139	((ADC_CFGR_EXTSEL) << (4U * 3U)) )
elmot	1:d0dfbce63a89	140
elmot	1:d0dfbce63a89	141	/* Mask containing trigger edge masks for each of possible */
elmot	1:d0dfbce63a89	142	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
elmot	1:d0dfbce63a89	143	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
elmot	1:d0dfbce63a89	144	#define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN) << (4U * 0U)) \| \
elmot	1:d0dfbce63a89	145	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1U)) \| \
elmot	1:d0dfbce63a89	146	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2U)) \| \
elmot	1:d0dfbce63a89	147	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3U)) )
elmot	1:d0dfbce63a89	148
elmot	1:d0dfbce63a89	149	/* Definition of ADC group regular trigger bits information. */
elmot	1:d0dfbce63a89	150	#define ADC_REG_TRIG_EXTSEL_BITOFFSET_POS ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_CFGR_EXTSEL) */
elmot	1:d0dfbce63a89	151	#define ADC_REG_TRIG_EXTEN_BITOFFSET_POS ((uint32_t)10U) /* Value equivalent to POSITION_VAL(ADC_CFGR_EXTEN) */
elmot	1:d0dfbce63a89	152
elmot	1:d0dfbce63a89	153
elmot	1:d0dfbce63a89	154
elmot	1:d0dfbce63a89	155	/* Internal mask for ADC group injected trigger: */
elmot	1:d0dfbce63a89	156	/* To select into literal LL_ADC_INJ_TRIG_x the relevant bits for: */
elmot	1:d0dfbce63a89	157	/* - injected trigger source */
elmot	1:d0dfbce63a89	158	/* - injected trigger edge */
elmot	1:d0dfbce63a89	159	#define ADC_INJ_TRIG_EXT_EDGE_DEFAULT (ADC_JSQR_JEXTEN_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value) */
elmot	1:d0dfbce63a89	160
elmot	1:d0dfbce63a89	161	/* Mask containing trigger source masks for each of possible */
elmot	1:d0dfbce63a89	162	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
elmot	1:d0dfbce63a89	163	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
elmot	1:d0dfbce63a89	164	#define ADC_INJ_TRIG_SOURCE_MASK (((LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTSEL) << (4U * 0U)) \| \
elmot	1:d0dfbce63a89	165	((ADC_JSQR_JEXTSEL) << (4U * 1U)) \| \
elmot	1:d0dfbce63a89	166	((ADC_JSQR_JEXTSEL) << (4U * 2U)) \| \
elmot	1:d0dfbce63a89	167	((ADC_JSQR_JEXTSEL) << (4U * 3U)) )
elmot	1:d0dfbce63a89	168
elmot	1:d0dfbce63a89	169	/* Mask containing trigger edge masks for each of possible */
elmot	1:d0dfbce63a89	170	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
elmot	1:d0dfbce63a89	171	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
elmot	1:d0dfbce63a89	172	#define ADC_INJ_TRIG_EDGE_MASK (((LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTEN) << (4U * 0U)) \| \
elmot	1:d0dfbce63a89	173	((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 1U)) \| \
elmot	1:d0dfbce63a89	174	((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 2U)) \| \
elmot	1:d0dfbce63a89	175	((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 3U)) )
elmot	1:d0dfbce63a89	176
elmot	1:d0dfbce63a89	177	/* Definition of ADC group injected trigger bits information. */
elmot	1:d0dfbce63a89	178	#define ADC_INJ_TRIG_EXTSEL_BITOFFSET_POS ((uint32_t) 2U) /* Value equivalent to POSITION_VAL(ADC_JSQR_JEXTSEL) */
elmot	1:d0dfbce63a89	179	#define ADC_INJ_TRIG_EXTEN_BITOFFSET_POS ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_JSQR_JEXTEN) */
elmot	1:d0dfbce63a89	180
elmot	1:d0dfbce63a89	181
elmot	1:d0dfbce63a89	182
elmot	1:d0dfbce63a89	183
elmot	1:d0dfbce63a89	184
elmot	1:d0dfbce63a89	185
elmot	1:d0dfbce63a89	186	/* Internal mask for ADC channel: */
elmot	1:d0dfbce63a89	187	/* To select into literal LL_ADC_CHANNEL_x the relevant bits for: */
elmot	1:d0dfbce63a89	188	/* - channel identifier defined by number */
elmot	1:d0dfbce63a89	189	/* - channel identifier defined by bitfield */
elmot	1:d0dfbce63a89	190	/* - channel differentiation between external channels (connected to */
elmot	1:d0dfbce63a89	191	/* GPIO pins) and internal channels (connected to internal paths) */
elmot	1:d0dfbce63a89	192	/* - channel sampling time defined by SMPRx register offset */
elmot	1:d0dfbce63a89	193	/* and SMPx bits positions into SMPRx register */
elmot	1:d0dfbce63a89	194	#define ADC_CHANNEL_ID_NUMBER_MASK (ADC_CFGR_AWD1CH)
elmot	1:d0dfbce63a89	195	#define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_AWD2CR_AWD2CH)
elmot	1:d0dfbce63a89	196	#define ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS ((uint32_t)26U)/* Value equivalent to POSITION_VAL(ADC_CHANNEL_ID_NUMBER_MASK) */
elmot	1:d0dfbce63a89	197	#define ADC_CHANNEL_ID_MASK (ADC_CHANNEL_ID_NUMBER_MASK \| ADC_CHANNEL_ID_BITFIELD_MASK \| ADC_CHANNEL_ID_INTERNAL_CH_MASK)
elmot	1:d0dfbce63a89	198	/* Equivalent mask of ADC_CHANNEL_NUMBER_MASK aligned on register LSB (bit 0) */
elmot	1:d0dfbce63a89	199	#define ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 (ADC_SQR2_SQ5) /* Equivalent to shift: (ADC_CHANNEL_NUMBER_MASK >> POSITION_VAL(ADC_CHANNEL_NUMBER_MASK)) */
elmot	1:d0dfbce63a89	200
elmot	1:d0dfbce63a89	201	/* Channel differentiation between external and internal channels */
elmot	1:d0dfbce63a89	202	#define ADC_CHANNEL_ID_INTERNAL_CH ((uint32_t)0x80000000U) /* Marker of internal channel */
elmot	1:d0dfbce63a89	203	#define ADC_CHANNEL_ID_INTERNAL_CH_2 ((uint32_t)0x00080000U) /* Marker of internal channel for other ADC instances, in case of different ADC internal channels mapped on same channel number on different ADC instances */
elmot	1:d0dfbce63a89	204	#define ADC_CHANNEL_ID_INTERNAL_CH_MASK (ADC_CHANNEL_ID_INTERNAL_CH \| ADC_CHANNEL_ID_INTERNAL_CH_2)
elmot	1:d0dfbce63a89	205
elmot	1:d0dfbce63a89	206	/* Internal register offset for ADC channel sampling time configuration */
elmot	1:d0dfbce63a89	207	/* (offset placed into a spare area of literal definition) */
elmot	1:d0dfbce63a89	208	#define ADC_SMPR1_REGOFFSET ((uint32_t)0x00000000U)
elmot	1:d0dfbce63a89	209	#define ADC_SMPR2_REGOFFSET ((uint32_t)0x02000000U)
elmot	1:d0dfbce63a89	210	#define ADC_CHANNEL_SMPRX_REGOFFSET_MASK (ADC_SMPR1_REGOFFSET \| ADC_SMPR2_REGOFFSET)
elmot	1:d0dfbce63a89	211
elmot	1:d0dfbce63a89	212	#define ADC_CHANNEL_SMPx_BITOFFSET_MASK ((uint32_t)0x01F00000U)
elmot	1:d0dfbce63a89	213	#define ADC_CHANNEL_SMPx_BITOFFSET_POS ((uint32_t)20U) /* Value equivalent to POSITION_VAL(ADC_CHANNEL_SMPx_BITOFFSET_MASK) */
elmot	1:d0dfbce63a89	214
elmot	1:d0dfbce63a89	215	/* Definition of channels ID number information to be inserted into */
elmot	1:d0dfbce63a89	216	/* channels literals definition. */
elmot	1:d0dfbce63a89	217	#define ADC_CHANNEL_0_NUMBER ((uint32_t)0x00000000U)
elmot	1:d0dfbce63a89	218	#define ADC_CHANNEL_1_NUMBER ( ADC_CFGR_AWD1CH_0)
elmot	1:d0dfbce63a89	219	#define ADC_CHANNEL_2_NUMBER ( ADC_CFGR_AWD1CH_1 )
elmot	1:d0dfbce63a89	220	#define ADC_CHANNEL_3_NUMBER ( ADC_CFGR_AWD1CH_1 \| ADC_CFGR_AWD1CH_0)
elmot	1:d0dfbce63a89	221	#define ADC_CHANNEL_4_NUMBER ( ADC_CFGR_AWD1CH_2 )
elmot	1:d0dfbce63a89	222	#define ADC_CHANNEL_5_NUMBER ( ADC_CFGR_AWD1CH_2 \| ADC_CFGR_AWD1CH_0)
elmot	1:d0dfbce63a89	223	#define ADC_CHANNEL_6_NUMBER ( ADC_CFGR_AWD1CH_2 \| ADC_CFGR_AWD1CH_1 )
elmot	1:d0dfbce63a89	224	#define ADC_CHANNEL_7_NUMBER ( ADC_CFGR_AWD1CH_2 \| ADC_CFGR_AWD1CH_1 \| ADC_CFGR_AWD1CH_0)
elmot	1:d0dfbce63a89	225	#define ADC_CHANNEL_8_NUMBER ( ADC_CFGR_AWD1CH_3 )
elmot	1:d0dfbce63a89	226	#define ADC_CHANNEL_9_NUMBER ( ADC_CFGR_AWD1CH_3 \| ADC_CFGR_AWD1CH_0)
elmot	1:d0dfbce63a89	227	#define ADC_CHANNEL_10_NUMBER ( ADC_CFGR_AWD1CH_3 \| ADC_CFGR_AWD1CH_1 )
elmot	1:d0dfbce63a89	228	#define ADC_CHANNEL_11_NUMBER ( ADC_CFGR_AWD1CH_3 \| ADC_CFGR_AWD1CH_1 \| ADC_CFGR_AWD1CH_0)
elmot	1:d0dfbce63a89	229	#define ADC_CHANNEL_12_NUMBER ( ADC_CFGR_AWD1CH_3 \| ADC_CFGR_AWD1CH_2 )
elmot	1:d0dfbce63a89	230	#define ADC_CHANNEL_13_NUMBER ( ADC_CFGR_AWD1CH_3 \| ADC_CFGR_AWD1CH_2 \| ADC_CFGR_AWD1CH_0)
elmot	1:d0dfbce63a89	231	#define ADC_CHANNEL_14_NUMBER ( ADC_CFGR_AWD1CH_3 \| ADC_CFGR_AWD1CH_2 \| ADC_CFGR_AWD1CH_1 )
elmot	1:d0dfbce63a89	232	#define ADC_CHANNEL_15_NUMBER ( ADC_CFGR_AWD1CH_3 \| ADC_CFGR_AWD1CH_2 \| ADC_CFGR_AWD1CH_1 \| ADC_CFGR_AWD1CH_0)
elmot	1:d0dfbce63a89	233	#define ADC_CHANNEL_16_NUMBER (ADC_CFGR_AWD1CH_4 )
elmot	1:d0dfbce63a89	234	#define ADC_CHANNEL_17_NUMBER (ADC_CFGR_AWD1CH_4 \| ADC_CFGR_AWD1CH_0)
elmot	1:d0dfbce63a89	235	#define ADC_CHANNEL_18_NUMBER (ADC_CFGR_AWD1CH_4 \| ADC_CFGR_AWD1CH_1 )
elmot	1:d0dfbce63a89	236
elmot	1:d0dfbce63a89	237	/* Definition of channels ID bitfield information to be inserted into */
elmot	1:d0dfbce63a89	238	/* channels literals definition. */
elmot	1:d0dfbce63a89	239	#define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0)
elmot	1:d0dfbce63a89	240	#define ADC_CHANNEL_1_BITFIELD (ADC_AWD2CR_AWD2CH_1)
elmot	1:d0dfbce63a89	241	#define ADC_CHANNEL_2_BITFIELD (ADC_AWD2CR_AWD2CH_2)
elmot	1:d0dfbce63a89	242	#define ADC_CHANNEL_3_BITFIELD (ADC_AWD2CR_AWD2CH_3)
elmot	1:d0dfbce63a89	243	#define ADC_CHANNEL_4_BITFIELD (ADC_AWD2CR_AWD2CH_4)
elmot	1:d0dfbce63a89	244	#define ADC_CHANNEL_5_BITFIELD (ADC_AWD2CR_AWD2CH_5)
elmot	1:d0dfbce63a89	245	#define ADC_CHANNEL_6_BITFIELD (ADC_AWD2CR_AWD2CH_6)
elmot	1:d0dfbce63a89	246	#define ADC_CHANNEL_7_BITFIELD (ADC_AWD2CR_AWD2CH_7)
elmot	1:d0dfbce63a89	247	#define ADC_CHANNEL_8_BITFIELD (ADC_AWD2CR_AWD2CH_8)
elmot	1:d0dfbce63a89	248	#define ADC_CHANNEL_9_BITFIELD (ADC_AWD2CR_AWD2CH_9)
elmot	1:d0dfbce63a89	249	#define ADC_CHANNEL_10_BITFIELD (ADC_AWD2CR_AWD2CH_10)
elmot	1:d0dfbce63a89	250	#define ADC_CHANNEL_11_BITFIELD (ADC_AWD2CR_AWD2CH_11)
elmot	1:d0dfbce63a89	251	#define ADC_CHANNEL_12_BITFIELD (ADC_AWD2CR_AWD2CH_12)
elmot	1:d0dfbce63a89	252	#define ADC_CHANNEL_13_BITFIELD (ADC_AWD2CR_AWD2CH_13)
elmot	1:d0dfbce63a89	253	#define ADC_CHANNEL_14_BITFIELD (ADC_AWD2CR_AWD2CH_14)
elmot	1:d0dfbce63a89	254	#define ADC_CHANNEL_15_BITFIELD (ADC_AWD2CR_AWD2CH_15)
elmot	1:d0dfbce63a89	255	#define ADC_CHANNEL_16_BITFIELD (ADC_AWD2CR_AWD2CH_16)
elmot	1:d0dfbce63a89	256	#define ADC_CHANNEL_17_BITFIELD (ADC_AWD2CR_AWD2CH_17)
elmot	1:d0dfbce63a89	257	#define ADC_CHANNEL_18_BITFIELD (ADC_AWD2CR_AWD2CH_18)
elmot	1:d0dfbce63a89	258
elmot	1:d0dfbce63a89	259	/* Definition of channels sampling time information to be inserted into */
elmot	1:d0dfbce63a89	260	/* channels literals definition. */
elmot	1:d0dfbce63a89	261	#define ADC_CHANNEL_0_SMP (ADC_SMPR1_REGOFFSET \| (((uint32_t) 0U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP0) */
elmot	1:d0dfbce63a89	262	#define ADC_CHANNEL_1_SMP (ADC_SMPR1_REGOFFSET \| (((uint32_t) 3U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP1) */
elmot	1:d0dfbce63a89	263	#define ADC_CHANNEL_2_SMP (ADC_SMPR1_REGOFFSET \| (((uint32_t) 6U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP2) */
elmot	1:d0dfbce63a89	264	#define ADC_CHANNEL_3_SMP (ADC_SMPR1_REGOFFSET \| (((uint32_t) 9U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP3) */
elmot	1:d0dfbce63a89	265	#define ADC_CHANNEL_4_SMP (ADC_SMPR1_REGOFFSET \| (((uint32_t)12U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP4) */
elmot	1:d0dfbce63a89	266	#define ADC_CHANNEL_5_SMP (ADC_SMPR1_REGOFFSET \| (((uint32_t)15U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP5) */
elmot	1:d0dfbce63a89	267	#define ADC_CHANNEL_6_SMP (ADC_SMPR1_REGOFFSET \| (((uint32_t)18U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP6) */
elmot	1:d0dfbce63a89	268	#define ADC_CHANNEL_7_SMP (ADC_SMPR1_REGOFFSET \| (((uint32_t)21U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP7) */
elmot	1:d0dfbce63a89	269	#define ADC_CHANNEL_8_SMP (ADC_SMPR1_REGOFFSET \| (((uint32_t)24U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP8) */
elmot	1:d0dfbce63a89	270	#define ADC_CHANNEL_9_SMP (ADC_SMPR1_REGOFFSET \| (((uint32_t)27U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR1_SMP9) */
elmot	1:d0dfbce63a89	271	#define ADC_CHANNEL_10_SMP (ADC_SMPR2_REGOFFSET \| (((uint32_t) 0U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP10) */
elmot	1:d0dfbce63a89	272	#define ADC_CHANNEL_11_SMP (ADC_SMPR2_REGOFFSET \| (((uint32_t) 3U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP11) */
elmot	1:d0dfbce63a89	273	#define ADC_CHANNEL_12_SMP (ADC_SMPR2_REGOFFSET \| (((uint32_t) 6U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP12) */
elmot	1:d0dfbce63a89	274	#define ADC_CHANNEL_13_SMP (ADC_SMPR2_REGOFFSET \| (((uint32_t) 9U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP13) */
elmot	1:d0dfbce63a89	275	#define ADC_CHANNEL_14_SMP (ADC_SMPR2_REGOFFSET \| (((uint32_t)12U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP14) */
elmot	1:d0dfbce63a89	276	#define ADC_CHANNEL_15_SMP (ADC_SMPR2_REGOFFSET \| (((uint32_t)15U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP15) */
elmot	1:d0dfbce63a89	277	#define ADC_CHANNEL_16_SMP (ADC_SMPR2_REGOFFSET \| (((uint32_t)18U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP16) */
elmot	1:d0dfbce63a89	278	#define ADC_CHANNEL_17_SMP (ADC_SMPR2_REGOFFSET \| (((uint32_t)21U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP17) */
elmot	1:d0dfbce63a89	279	#define ADC_CHANNEL_18_SMP (ADC_SMPR2_REGOFFSET \| (((uint32_t)24U) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) /* Value shifted is equivalent to POSITION_VAL(ADC_SMPR2_SMP18) */
elmot	1:d0dfbce63a89	280
elmot	1:d0dfbce63a89	281
elmot	1:d0dfbce63a89	282	/* Internal mask for ADC mode single or differential ended: */
elmot	1:d0dfbce63a89	283	/* To select into literals LL_ADC_SINGLE_ENDED or LL_ADC_SINGLE_DIFFERENTIAL */
elmot	1:d0dfbce63a89	284	/* the relevant bits for: */
elmot	1:d0dfbce63a89	285	/* (concatenation of multiple bits used in different registers) */
elmot	1:d0dfbce63a89	286	/* - ADC calibration: calibration start, calibration factor get or set */
elmot	1:d0dfbce63a89	287	/* - ADC channels: set each ADC channel ending mode */
elmot	1:d0dfbce63a89	288	#define ADC_SINGLEDIFF_CALIB_START_MASK (ADC_CR_ADCALDIF)
elmot	1:d0dfbce63a89	289	#define ADC_SINGLEDIFF_CALIB_FACTOR_MASK (ADC_CALFACT_CALFACT_D \| ADC_CALFACT_CALFACT_S)
elmot	1:d0dfbce63a89	290	#define ADC_SINGLEDIFF_CHANNEL_MASK (ADC_CHANNEL_ID_BITFIELD_MASK) /* Equivalent to ADC_DIFSEL_DIFSEL */
elmot	1:d0dfbce63a89	291	#define ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK (ADC_CALFACT_CALFACT_S_5) /* Bit chosen to perform of shift when single mode is selected, shift value out of channels bits range. */
elmot	1:d0dfbce63a89	292
elmot	1:d0dfbce63a89	293
elmot	1:d0dfbce63a89	294	/* Internal mask for ADC analog watchdog: */
elmot	1:d0dfbce63a89	295	/* To select into literals LL_ADC_AWD_CHANNELx_xxx the relevant bits for: */
elmot	1:d0dfbce63a89	296	/* (concatenation of multiple bits used in different analog watchdogs, */
elmot	1:d0dfbce63a89	297	/* (feature of several watchdogs not available on all STM32 families)). */
elmot	1:d0dfbce63a89	298	/* - analog watchdog 1: monitored channel defined by number, */
elmot	1:d0dfbce63a89	299	/* selection of ADC group (ADC groups regular and-or injected). */
elmot	1:d0dfbce63a89	300	/* - analog watchdog 2 and 3: monitored channel defined by bitfield, no */
elmot	1:d0dfbce63a89	301	/* selection on groups. */
elmot	1:d0dfbce63a89	302
elmot	1:d0dfbce63a89	303	/* Internal register offset for ADC analog watchdog channel configuration */
elmot	1:d0dfbce63a89	304	#define ADC_AWD_CR1_REGOFFSET ((uint32_t)0x00000000U)
elmot	1:d0dfbce63a89	305	#define ADC_AWD_CR2_REGOFFSET ((uint32_t)0x00100000U)
elmot	1:d0dfbce63a89	306	#define ADC_AWD_CR3_REGOFFSET ((uint32_t)0x00200000U)
elmot	1:d0dfbce63a89	307
elmot	1:d0dfbce63a89	308	/* Register offset gap between AWD1 and AWD2-AWD3 configuration registers */
elmot	1:d0dfbce63a89	309	/* (Set separately as ADC_AWD_CRX_REGOFFSET to spare 32 bits space */
elmot	1:d0dfbce63a89	310	#define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
elmot	1:d0dfbce63a89	311	#define ADC_AWD_CR12_REGOFFSETGAP_VAL ((uint32_t)0x00000024U)
elmot	1:d0dfbce63a89	312
elmot	1:d0dfbce63a89	313	#define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET \| ADC_AWD_CR2_REGOFFSET \| ADC_AWD_CR3_REGOFFSET)
elmot	1:d0dfbce63a89	314
elmot	1:d0dfbce63a89	315	#define ADC_AWD_CR1_CHANNEL_MASK (ADC_CFGR_AWD1CH \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL)
elmot	1:d0dfbce63a89	316	#define ADC_AWD_CR23_CHANNEL_MASK (ADC_AWD2CR_AWD2CH)
elmot	1:d0dfbce63a89	317	#define ADC_AWD_CR_ALL_CHANNEL_MASK (ADC_AWD_CR1_CHANNEL_MASK \| ADC_AWD_CR23_CHANNEL_MASK)
elmot	1:d0dfbce63a89	318
elmot	1:d0dfbce63a89	319	/* Internal register offset for ADC analog watchdog threshold configuration */
elmot	1:d0dfbce63a89	320	#define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
elmot	1:d0dfbce63a89	321	#define ADC_AWD_TR2_REGOFFSET (ADC_AWD_CR2_REGOFFSET)
elmot	1:d0dfbce63a89	322	#define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET)
elmot	1:d0dfbce63a89	323	#define ADC_AWD_TRX_REGOFFSET_MASK (ADC_AWD_TR1_REGOFFSET \| ADC_AWD_TR2_REGOFFSET \| ADC_AWD_TR3_REGOFFSET)
elmot	1:d0dfbce63a89	324
elmot	1:d0dfbce63a89	325
elmot	1:d0dfbce63a89	326	/* Internal mask for ADC offset: */
elmot	1:d0dfbce63a89	327	/* Internal register offset for ADC offset number configuration */
elmot	1:d0dfbce63a89	328	#define ADC_OFR1_REGOFFSET ((uint32_t)0x00000000U)
elmot	1:d0dfbce63a89	329	#define ADC_OFR2_REGOFFSET ((uint32_t)0x00000001U)
elmot	1:d0dfbce63a89	330	#define ADC_OFR3_REGOFFSET ((uint32_t)0x00000002U)
elmot	1:d0dfbce63a89	331	#define ADC_OFR4_REGOFFSET ((uint32_t)0x00000003U)
elmot	1:d0dfbce63a89	332	#define ADC_OFRx_REGOFFSET_MASK (ADC_OFR1_REGOFFSET \| ADC_OFR2_REGOFFSET \| ADC_OFR3_REGOFFSET \| ADC_OFR4_REGOFFSET)
elmot	1:d0dfbce63a89	333
elmot	1:d0dfbce63a89	334
elmot	1:d0dfbce63a89	335	/* ADC registers bits positions */
elmot	1:d0dfbce63a89	336	#define ADC_CFGR_RES_BITOFFSET_POS ((uint32_t) 3U) /* Value equivalent to POSITION_VAL(ADC_CFGR_RES) */
elmot	1:d0dfbce63a89	337	#define ADC_CFGR_AWD1SGL_BITOFFSET_POS ((uint32_t)22U) /* Value equivalent to POSITION_VAL(ADC_CFGR_AWD1SGL) */
elmot	1:d0dfbce63a89	338	#define ADC_CFGR_AWD1EN_BITOFFSET_POS ((uint32_t)23U) /* Value equivalent to POSITION_VAL(ADC_CFGR_AWD1EN) */
elmot	1:d0dfbce63a89	339	#define ADC_CFGR_JAWD1EN_BITOFFSET_POS ((uint32_t)24U) /* Value equivalent to POSITION_VAL(ADC_CFGR_JAWD1EN) */
elmot	1:d0dfbce63a89	340	#define ADC_TR1_HT1_BITOFFSET_POS ((uint32_t)16U) /* Value equivalent to POSITION_VAL(ADC_TR1_HT1) */
elmot	1:d0dfbce63a89	341
elmot	1:d0dfbce63a89	342
elmot	1:d0dfbce63a89	343	/* ADC registers bits groups */
elmot	1:d0dfbce63a89	344	#define ADC_CR_BITS_PROPERTY_RS (ADC_CR_ADCAL \| ADC_CR_JADSTP \| ADC_CR_ADSTP \| ADC_CR_JADSTART \| ADC_CR_ADSTART \| ADC_CR_ADDIS \| ADC_CR_ADEN) /* ADC register CR bits with HW property "rs": Software can read as well as set this bit. Writing '0' has no effect on the bit value. */
elmot	1:d0dfbce63a89	345
elmot	1:d0dfbce63a89	346
elmot	1:d0dfbce63a89	347	/* ADC internal channels related definitions */
elmot	1:d0dfbce63a89	348	/* Internal voltage reference VrefInt */
elmot	1:d0dfbce63a89	349	#define VREFINT_CAL_ADDR ((uint16_t) ((uint32_t)0x1FFF75AAU)) / Internal voltage reference, address of parameter VREFINT_CAL: VrefInt ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
elmot	1:d0dfbce63a89	350	#define VREFINT_CAL_VREF ((uint32_t) 3000U) /* Analog voltage reference (Vref+) value with which temperature sensor has been calibrated in production (tolerance: +-10 mV) (unit: mV). */
elmot	1:d0dfbce63a89	351	/* Temperature sensor */
elmot	1:d0dfbce63a89	352	#define TEMPSENSOR_CAL1_ADDR ((uint16_t) ((uint32_t)0x1FFF75A8U)) / Internal temperature sensor, address of parameter TS_CAL1: On STM32L4, temperature sensor ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
elmot	1:d0dfbce63a89	353	#define TEMPSENSOR_CAL2_ADDR ((uint16_t) ((uint32_t)0x1FFF75CAU)) / Internal temperature sensor, address of parameter TS_CAL2: On STM32L4, temperature sensor ADC raw data acquired at temperature 110 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
elmot	1:d0dfbce63a89	354	#define TEMPSENSOR_CAL1_TEMP (( int32_t) 30) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL1_ADDR (tolerance: +-5 DegC) (unit: DegC). */
elmot	1:d0dfbce63a89	355	#define TEMPSENSOR_CAL2_TEMP (( int32_t) 110) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL2_ADDR (tolerance: +-5 DegC) (unit: DegC). */
elmot	1:d0dfbce63a89	356	#define TEMPSENSOR_CAL_VREFANALOG ((uint32_t) 3000U) /* Analog voltage reference (Vref+) voltage with which temperature sensor has been calibrated in production (+-10 mV) (unit: mV). */
elmot	1:d0dfbce63a89	357
elmot	1:d0dfbce63a89	358
elmot	1:d0dfbce63a89	359	/**
elmot	1:d0dfbce63a89	360	* @}
elmot	1:d0dfbce63a89	361	*/
elmot	1:d0dfbce63a89	362
elmot	1:d0dfbce63a89	363
elmot	1:d0dfbce63a89	364	/* Private macros ------------------------------------------------------------*/
elmot	1:d0dfbce63a89	365	/** @defgroup ADC_LL_Private_Macros ADC Private Macros
elmot	1:d0dfbce63a89	366	* @{
elmot	1:d0dfbce63a89	367	*/
elmot	1:d0dfbce63a89	368
elmot	1:d0dfbce63a89	369	/**
elmot	1:d0dfbce63a89	370	* @brief Driver macro reserved for internal use: isolate bits with the
elmot	1:d0dfbce63a89	371	* selected mask and shift them to the register LSB
elmot	1:d0dfbce63a89	372	* (shift mask on register position bit 0).
elmot	1:d0dfbce63a89	373	* @param __BITS__ Bits in register 32 bits
elmot	1:d0dfbce63a89	374	* @param __MASK__ Mask in register 32 bits
elmot	1:d0dfbce63a89	375	* @retval Bits in register 32 bits
elmot	1:d0dfbce63a89	376	*/
elmot	1:d0dfbce63a89	377	#define __ADC_MASK_SHIFT(__BITS__, __MASK__) \
elmot	1:d0dfbce63a89	378	(((__BITS__) & (__MASK__)) >> POSITION_VAL((__MASK__)))
elmot	1:d0dfbce63a89	379
elmot	1:d0dfbce63a89	380	/**
elmot	1:d0dfbce63a89	381	* @brief Driver macro reserved for internal use: set a pointer to
elmot	1:d0dfbce63a89	382	* a register from a register basis from which an offset
elmot	1:d0dfbce63a89	383	* is applied.
elmot	1:d0dfbce63a89	384	* @param __REG__ Register basis from which the offset is applied.
elmot	1:d0dfbce63a89	385	* @param __REG_OFFFSET__ Offset to be applied (unit: number of registers).
elmot	1:d0dfbce63a89	386	* @retval Pointer to register address
elmot	1:d0dfbce63a89	387	*/
elmot	1:d0dfbce63a89	388	#define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \
elmot	1:d0dfbce63a89	389	((uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2U))))
elmot	1:d0dfbce63a89	390
elmot	1:d0dfbce63a89	391	/**
elmot	1:d0dfbce63a89	392	* @}
elmot	1:d0dfbce63a89	393	*/
elmot	1:d0dfbce63a89	394
elmot	1:d0dfbce63a89	395
elmot	1:d0dfbce63a89	396	/* Exported types ------------------------------------------------------------*/
elmot	1:d0dfbce63a89	397	#if defined(USE_FULL_LL_DRIVER)
elmot	1:d0dfbce63a89	398	/** @defgroup ADC_LL_ES_INIT ADC Exported Init structure
elmot	1:d0dfbce63a89	399	* @{
elmot	1:d0dfbce63a89	400	*/
elmot	1:d0dfbce63a89	401
elmot	1:d0dfbce63a89	402	/**
elmot	1:d0dfbce63a89	403	* @brief Structure definition of some features of ADC common parameters
elmot	1:d0dfbce63a89	404	* and multimode
elmot	1:d0dfbce63a89	405	* (all ADC instances belonging to the same ADC common instance).
elmot	1:d0dfbce63a89	406	* @note The setting of these parameters by function @ref LL_ADC_CommonInit()
elmot	1:d0dfbce63a89	407	* is conditioned to ADC instances state (all ADC instances
elmot	1:d0dfbce63a89	408	* sharing the same ADC common instance):
elmot	1:d0dfbce63a89	409	* All ADC instances sharing the same ADC common instance must be
elmot	1:d0dfbce63a89	410	* disabled.
elmot	1:d0dfbce63a89	411	*/
elmot	1:d0dfbce63a89	412	typedef struct
elmot	1:d0dfbce63a89	413	{
elmot	1:d0dfbce63a89	414	uint32_t CommonClock; /*!< Set parameter common to several ADC: Clock source and prescaler.
elmot	1:d0dfbce63a89	415	This parameter can be a value of @ref ADC_LL_EC_COMMON_CLOCK_SOURCE
elmot	1:d0dfbce63a89	416	@note On this STM32 serie, if ADC group injected is used, some
elmot	1:d0dfbce63a89	417	clock ratio constraints between ADC clock and AHB clock
elmot	1:d0dfbce63a89	418	must be respected. Refer to reference manual.
elmot	1:d0dfbce63a89	419
elmot	1:d0dfbce63a89	420	This feature can be modified afterwards using unitary function @ref LL_ADC_SetCommonClock(). */
elmot	1:d0dfbce63a89	421
elmot	1:d0dfbce63a89	422	#if defined(ADC_MULTIMODE_SUPPORT)
elmot	1:d0dfbce63a89	423	uint32_t Multimode; /*!< Set ADC multimode configuration to operate in independent mode or multimode (for devices with several ADC instances).
elmot	1:d0dfbce63a89	424	This parameter can be a value of @ref ADC_LL_EC_MULTI_MODE
elmot	1:d0dfbce63a89	425
elmot	1:d0dfbce63a89	426	This feature can be modified afterwards using unitary function @ref LL_ADC_SetMultimode(). */
elmot	1:d0dfbce63a89	427
elmot	1:d0dfbce63a89	428	uint32_t MultiDMATransfer; /*!< Set ADC multimode conversion data transfer: no transfer or transfer by DMA.
elmot	1:d0dfbce63a89	429	This parameter can be a value of @ref ADC_LL_EC_MULTI_DMA_TRANSFER
elmot	1:d0dfbce63a89	430
elmot	1:d0dfbce63a89	431	This feature can be modified afterwards using unitary function @ref LL_ADC_SetMultiDMATransfer(). */
elmot	1:d0dfbce63a89	432
elmot	1:d0dfbce63a89	433	uint32_t MultiTwoSamplingDelay; /*!< Set ADC multimode delay between 2 sampling phases.
elmot	1:d0dfbce63a89	434	This parameter can be a value of @ref ADC_LL_EC_MULTI_TWOSMP_DELAY
elmot	1:d0dfbce63a89	435
elmot	1:d0dfbce63a89	436	This feature can be modified afterwards using unitary function @ref LL_ADC_SetMultiTwoSamplingDelay(). */
elmot	1:d0dfbce63a89	437	#endif /* ADC_MULTIMODE_SUPPORT */
elmot	1:d0dfbce63a89	438
elmot	1:d0dfbce63a89	439	} LL_ADC_CommonInitTypeDef;
elmot	1:d0dfbce63a89	440
elmot	1:d0dfbce63a89	441	/**
elmot	1:d0dfbce63a89	442	* @brief Structure definition of some features of ADC instance.
elmot	1:d0dfbce63a89	443	* @note These parameters have an impact on ADC scope: ADC instance.
elmot	1:d0dfbce63a89	444	* Affects both group regular and group injected (availability
elmot	1:d0dfbce63a89	445	* of ADC group injected depends on STM32 families).
elmot	1:d0dfbce63a89	446	* Refer to corresponding unitary functions into
elmot	1:d0dfbce63a89	447	* @ref ADC_LL_EF_Configuration_ADC_Instance .
elmot	1:d0dfbce63a89	448	* @note The setting of these parameters by function @ref LL_ADC_Init()
elmot	1:d0dfbce63a89	449	* is conditioned to ADC state:
elmot	1:d0dfbce63a89	450	* ADC instance must be disabled.
elmot	1:d0dfbce63a89	451	* This condition is applied to all ADC features, for efficiency
elmot	1:d0dfbce63a89	452	* and compatibility over all STM32 families. However, the different
elmot	1:d0dfbce63a89	453	* features can be set under different ADC state conditions
elmot	1:d0dfbce63a89	454	* (setting possible with ADC enabled without conversion on going,
elmot	1:d0dfbce63a89	455	* ADC enabled with conversion on going, ...)
elmot	1:d0dfbce63a89	456	* Each feature can be updated afterwards with a unitary function
elmot	1:d0dfbce63a89	457	* and potentially with ADC in a different state than disabled,
elmot	1:d0dfbce63a89	458	* refer to description of each function for setting
elmot	1:d0dfbce63a89	459	* conditioned to ADC state.
elmot	1:d0dfbce63a89	460	*/
elmot	1:d0dfbce63a89	461	typedef struct
elmot	1:d0dfbce63a89	462	{
elmot	1:d0dfbce63a89	463	uint32_t Resolution; /*!< Set ADC resolution.
elmot	1:d0dfbce63a89	464	This parameter can be a value of @ref ADC_LL_EC_RESOLUTION
elmot	1:d0dfbce63a89	465
elmot	1:d0dfbce63a89	466	This feature can be modified afterwards using unitary function @ref LL_ADC_SetResolution(). */
elmot	1:d0dfbce63a89	467
elmot	1:d0dfbce63a89	468	uint32_t DataAlignment; /*!< Set ADC conversion data alignment.
elmot	1:d0dfbce63a89	469	This parameter can be a value of @ref ADC_LL_EC_DATA_ALIGN
elmot	1:d0dfbce63a89	470
elmot	1:d0dfbce63a89	471	This feature can be modified afterwards using unitary function @ref LL_ADC_SetDataAlignment(). */
elmot	1:d0dfbce63a89	472
elmot	1:d0dfbce63a89	473	uint32_t LowPowerMode; /*!< Set ADC low power mode.
elmot	1:d0dfbce63a89	474	This parameter can be a value of @ref ADC_LL_EC_LP_MODE
elmot	1:d0dfbce63a89	475
elmot	1:d0dfbce63a89	476	This feature can be modified afterwards using unitary function @ref LL_ADC_SetLowPowerMode(). */
elmot	1:d0dfbce63a89	477
elmot	1:d0dfbce63a89	478	} LL_ADC_InitTypeDef;
elmot	1:d0dfbce63a89	479
elmot	1:d0dfbce63a89	480	/**
elmot	1:d0dfbce63a89	481	* @brief Structure definition of some features of ADC group regular.
elmot	1:d0dfbce63a89	482	* @note These parameters have an impact on ADC scope: ADC group regular.
elmot	1:d0dfbce63a89	483	* Refer to corresponding unitary functions into
elmot	1:d0dfbce63a89	484	* @ref ADC_LL_EF_Configuration_ADC_Group_Regular
elmot	1:d0dfbce63a89	485	* (functions with prefix "REG").
elmot	1:d0dfbce63a89	486	* @note The setting of these parameters by function @ref LL_ADC_REG_Init()
elmot	1:d0dfbce63a89	487	* is conditioned to ADC state:
elmot	1:d0dfbce63a89	488	* ADC instance must be disabled.
elmot	1:d0dfbce63a89	489	* This condition is applied to all ADC features, for efficiency
elmot	1:d0dfbce63a89	490	* and compatibility over all STM32 families. However, the different
elmot	1:d0dfbce63a89	491	* features can be set under different ADC state conditions
elmot	1:d0dfbce63a89	492	* (setting possible with ADC enabled without conversion on going,
elmot	1:d0dfbce63a89	493	* ADC enabled with conversion on going, ...)
elmot	1:d0dfbce63a89	494	* Each feature can be updated afterwards with a unitary function
elmot	1:d0dfbce63a89	495	* and potentially with ADC in a different state than disabled,
elmot	1:d0dfbce63a89	496	* refer to description of each function for setting
elmot	1:d0dfbce63a89	497	* conditioned to ADC state.
elmot	1:d0dfbce63a89	498	*/
elmot	1:d0dfbce63a89	499	typedef struct
elmot	1:d0dfbce63a89	500	{
elmot	1:d0dfbce63a89	501	uint32_t TriggerSource; /*!< Set ADC group regular conversion trigger source: internal (SW start) or from external IP (timer event, external interrupt line).
elmot	1:d0dfbce63a89	502	This parameter can be a value of @ref ADC_LL_EC_REG_TRIGGER_SOURCE
elmot	1:d0dfbce63a89	503	@note On this STM32 serie, setting trigger source to external trigger also set trigger polarity to rising edge
elmot	1:d0dfbce63a89	504	(default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value).
elmot	1:d0dfbce63a89	505	In case of need to modify trigger edge, use function @ref LL_ADC_REG_SetTriggerEdge().
elmot	1:d0dfbce63a89	506
elmot	1:d0dfbce63a89	507	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetTriggerSource(). */
elmot	1:d0dfbce63a89	508
elmot	1:d0dfbce63a89	509	uint32_t SequencerLength; /*!< Set ADC group regular sequencer length.
elmot	1:d0dfbce63a89	510	This parameter can be a value of @ref ADC_LL_EC_REG_SEQ_SCAN_LENGTH
elmot	1:d0dfbce63a89	511
elmot	1:d0dfbce63a89	512	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetSequencerLength(). */
elmot	1:d0dfbce63a89	513
elmot	1:d0dfbce63a89	514	uint32_t SequencerDiscont; /*!< Set ADC group regular sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.
elmot	1:d0dfbce63a89	515	This parameter can be a value of @ref ADC_LL_EC_REG_SEQ_DISCONT_MODE
elmot	1:d0dfbce63a89	516	@note This parameter has an effect only if group regular sequencer is enabled
elmot	1:d0dfbce63a89	517	(scan length of 2 ranks or more).
elmot	1:d0dfbce63a89	518
elmot	1:d0dfbce63a89	519	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetSequencerDiscont(). */
elmot	1:d0dfbce63a89	520
elmot	1:d0dfbce63a89	521	uint32_t ContinuousMode; /*!< Set ADC continuous conversion mode on ADC group regular, whether ADC conversions are performed in single mode (one conversion per trigger) or in continuous mode (after the first trigger, following conversions launched successively automatically).
elmot	1:d0dfbce63a89	522	This parameter can be a value of @ref ADC_LL_EC_REG_CONTINUOUS_MODE
elmot	1:d0dfbce63a89	523	Note: It is not possible to enable both ADC group regular continuous mode and discontinuous mode.
elmot	1:d0dfbce63a89	524
elmot	1:d0dfbce63a89	525	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetContinuousMode(). */
elmot	1:d0dfbce63a89	526
elmot	1:d0dfbce63a89	527	uint32_t DMATransfer; /*!< Set ADC group regular conversion data transfer: no transfer or transfer by DMA, and DMA requests mode.
elmot	1:d0dfbce63a89	528	This parameter can be a value of @ref ADC_LL_EC_REG_DMA_TRANSFER
elmot	1:d0dfbce63a89	529
elmot	1:d0dfbce63a89	530	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetDMATransfer(). */
elmot	1:d0dfbce63a89	531
elmot	1:d0dfbce63a89	532	uint32_t Overrun; /*!< Set ADC group regular behavior in case of overrun:
elmot	1:d0dfbce63a89	533	data preserved or overwritten.
elmot	1:d0dfbce63a89	534	This parameter can be a value of @ref ADC_LL_EC_REG_OVR_DATA_BEHAVIOR
elmot	1:d0dfbce63a89	535
elmot	1:d0dfbce63a89	536	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetOverrun(). */
elmot	1:d0dfbce63a89	537
elmot	1:d0dfbce63a89	538	} LL_ADC_REG_InitTypeDef;
elmot	1:d0dfbce63a89	539
elmot	1:d0dfbce63a89	540	/**
elmot	1:d0dfbce63a89	541	* @brief Structure definition of some features of ADC group injected.
elmot	1:d0dfbce63a89	542	* @note These parameters have an impact on ADC scope: ADC group injected.
elmot	1:d0dfbce63a89	543	* Refer to corresponding unitary functions into
elmot	1:d0dfbce63a89	544	* @ref ADC_LL_EF_Configuration_ADC_Group_Regular
elmot	1:d0dfbce63a89	545	* (functions with prefix "INJ").
elmot	1:d0dfbce63a89	546	* @note The setting of these parameters by function @ref LL_ADC_INJ_Init()
elmot	1:d0dfbce63a89	547	* is conditioned to ADC state:
elmot	1:d0dfbce63a89	548	* ADC instance must be disabled.
elmot	1:d0dfbce63a89	549	* This condition is applied to all ADC features, for efficiency
elmot	1:d0dfbce63a89	550	* and compatibility over all STM32 families. However, the different
elmot	1:d0dfbce63a89	551	* features can be set under different ADC state conditions
elmot	1:d0dfbce63a89	552	* (setting possible with ADC enabled without conversion on going,
elmot	1:d0dfbce63a89	553	* ADC enabled with conversion on going, ...)
elmot	1:d0dfbce63a89	554	* Each feature can be updated afterwards with a unitary function
elmot	1:d0dfbce63a89	555	* and potentially with ADC in a different state than disabled,
elmot	1:d0dfbce63a89	556	* refer to description of each function for setting
elmot	1:d0dfbce63a89	557	* conditioned to ADC state.
elmot	1:d0dfbce63a89	558	*/
elmot	1:d0dfbce63a89	559	typedef struct
elmot	1:d0dfbce63a89	560	{
elmot	1:d0dfbce63a89	561	uint32_t TriggerSource; /*!< Set ADC group injected conversion trigger source: internal (SW start) or from external IP (timer event, external interrupt line).
elmot	1:d0dfbce63a89	562	This parameter can be a value of @ref ADC_LL_EC_INJ_TRIGGER_SOURCE
elmot	1:d0dfbce63a89	563	@note On this STM32 serie, setting trigger source to external trigger also set trigger polarity to rising edge
elmot	1:d0dfbce63a89	564	(default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value).
elmot	1:d0dfbce63a89	565	In case of need to modify trigger edge, use function @ref LL_ADC_INJ_SetTriggerEdge().
elmot	1:d0dfbce63a89	566
elmot	1:d0dfbce63a89	567	This feature can be modified afterwards using unitary function @ref LL_ADC_INJ_SetTriggerSource(). */
elmot	1:d0dfbce63a89	568
elmot	1:d0dfbce63a89	569	uint32_t SequencerLength; /*!< Set ADC group injected sequencer length.
elmot	1:d0dfbce63a89	570	This parameter can be a value of @ref ADC_LL_EC_INJ_SEQ_SCAN_LENGTH
elmot	1:d0dfbce63a89	571
elmot	1:d0dfbce63a89	572	This feature can be modified afterwards using unitary function @ref LL_ADC_INJ_SetSequencerLength(). */
elmot	1:d0dfbce63a89	573
elmot	1:d0dfbce63a89	574	uint32_t SequencerDiscont; /*!< Set ADC group injected sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.
elmot	1:d0dfbce63a89	575	This parameter can be a value of @ref ADC_LL_EC_INJ_SEQ_DISCONT_MODE
elmot	1:d0dfbce63a89	576	@note This parameter has an effect only if group injected sequencer is enabled
elmot	1:d0dfbce63a89	577	(scan length of 2 ranks or more).
elmot	1:d0dfbce63a89	578
elmot	1:d0dfbce63a89	579	This feature can be modified afterwards using unitary function @ref LL_ADC_INJ_SetSequencerDiscont(). */
elmot	1:d0dfbce63a89	580
elmot	1:d0dfbce63a89	581	uint32_t TrigAuto; /*!< Set ADC group injected conversion trigger: independent or from ADC group regular.
elmot	1:d0dfbce63a89	582	This parameter can be a value of @ref ADC_LL_EC_INJ_TRIG_AUTO
elmot	1:d0dfbce63a89	583	Note: This parameter must be set to set to independent trigger if injected trigger source is set to an external trigger.
elmot	1:d0dfbce63a89	584
elmot	1:d0dfbce63a89	585	This feature can be modified afterwards using unitary function @ref LL_ADC_INJ_SetTrigAuto(). */
elmot	1:d0dfbce63a89	586
elmot	1:d0dfbce63a89	587	} LL_ADC_INJ_InitTypeDef;
elmot	1:d0dfbce63a89	588
elmot	1:d0dfbce63a89	589	/**
elmot	1:d0dfbce63a89	590	* @}
elmot	1:d0dfbce63a89	591	*/
elmot	1:d0dfbce63a89	592	#endif /* USE_FULL_LL_DRIVER */
elmot	1:d0dfbce63a89	593
elmot	1:d0dfbce63a89	594	/* Exported constants --------------------------------------------------------*/
elmot	1:d0dfbce63a89	595	/** @defgroup ADC_LL_Exported_Constants ADC Exported Constants
elmot	1:d0dfbce63a89	596	* @{
elmot	1:d0dfbce63a89	597	*/
elmot	1:d0dfbce63a89	598
elmot	1:d0dfbce63a89	599	/** @defgroup ADC_LL_EC_FLAG ADC flags
elmot	1:d0dfbce63a89	600	* @brief Flags defines which can be used with LL_ADC_ReadReg function
elmot	1:d0dfbce63a89	601	* @{
elmot	1:d0dfbce63a89	602	*/
elmot	1:d0dfbce63a89	603	#define LL_ADC_FLAG_ADRDY ADC_ISR_ADRDY /!< ADC flag ADC instance ready /
elmot	1:d0dfbce63a89	604	#define LL_ADC_FLAG_EOC ADC_ISR_EOC /!< ADC flag ADC group regular end of unitary conversion /
elmot	1:d0dfbce63a89	605	#define LL_ADC_FLAG_EOS ADC_ISR_EOS /!< ADC flag ADC group regular end of sequence conversions /
elmot	1:d0dfbce63a89	606	#define LL_ADC_FLAG_OVR ADC_ISR_OVR /!< ADC flag ADC group regular overrun /
elmot	1:d0dfbce63a89	607	#define LL_ADC_FLAG_EOSMP ADC_ISR_EOSMP /!< ADC flag ADC group regular end of sampling phase /
elmot	1:d0dfbce63a89	608	#define LL_ADC_FLAG_JEOC ADC_ISR_JEOC /!< ADC flag ADC group injected end of unitary conversion /
elmot	1:d0dfbce63a89	609	#define LL_ADC_FLAG_JEOS ADC_ISR_JEOS /!< ADC flag ADC group injected end of sequence conversions /
elmot	1:d0dfbce63a89	610	#define LL_ADC_FLAG_JQOVF ADC_ISR_JQOVF /!< ADC flag ADC group injected contexts queue overflow /
elmot	1:d0dfbce63a89	611	#define LL_ADC_FLAG_AWD1 ADC_ISR_AWD1 /!< ADC flag ADC analog watchdog 1 /
elmot	1:d0dfbce63a89	612	#define LL_ADC_FLAG_AWD2 ADC_ISR_AWD2 /!< ADC flag ADC analog watchdog 2 /
elmot	1:d0dfbce63a89	613	#define LL_ADC_FLAG_AWD3 ADC_ISR_AWD3 /!< ADC flag ADC analog watchdog 3 /
elmot	1:d0dfbce63a89	614	#if defined(ADC_MULTIMODE_SUPPORT)
elmot	1:d0dfbce63a89	615	#define LL_ADC_FLAG_ADRDY_MST ADC_CSR_ADRDY_MST /!< ADC flag ADC multimode master instance ready /
elmot	1:d0dfbce63a89	616	#define LL_ADC_FLAG_ADRDY_SLV ADC_CSR_ADRDY_SLV /!< ADC flag ADC multimode slave instance ready /
elmot	1:d0dfbce63a89	617	#define LL_ADC_FLAG_EOC_MST ADC_CSR_EOC_MST /!< ADC flag ADC multimode master group regular end of unitary conversion /
elmot	1:d0dfbce63a89	618	#define LL_ADC_FLAG_EOC_SLV ADC_CSR_EOC_SLV /!< ADC flag ADC multimode slave group regular end of unitary conversion /
elmot	1:d0dfbce63a89	619	#define LL_ADC_FLAG_EOS_MST ADC_CSR_EOS_MST /!< ADC flag ADC multimode master group regular end of sequence conversions /
elmot	1:d0dfbce63a89	620	#define LL_ADC_FLAG_EOS_SLV ADC_CSR_EOS_SLV /!< ADC flag ADC multimode slave group regular end of sequence conversions /
elmot	1:d0dfbce63a89	621	#define LL_ADC_FLAG_OVR_MST ADC_CSR_OVR_MST /!< ADC flag ADC multimode master group regular overrun /
elmot	1:d0dfbce63a89	622	#define LL_ADC_FLAG_OVR_SLV ADC_CSR_OVR_SLV /!< ADC flag ADC multimode slave group regular overrun /
elmot	1:d0dfbce63a89	623	#define LL_ADC_FLAG_EOSMP_MST ADC_CSR_EOSMP_MST /!< ADC flag ADC multimode master group regular end of sampling phase /
elmot	1:d0dfbce63a89	624	#define LL_ADC_FLAG_EOSMP_SLV ADC_CSR_EOSMP_SLV /!< ADC flag ADC multimode slave group regular end of sampling phase /
elmot	1:d0dfbce63a89	625	#define LL_ADC_FLAG_JEOC_MST ADC_CSR_JEOC_MST /!< ADC flag ADC multimode master group injected end of unitary conversion /
elmot	1:d0dfbce63a89	626	#define LL_ADC_FLAG_JEOC_SLV ADC_CSR_JEOC_SLV /!< ADC flag ADC multimode slave group injected end of unitary conversion /
elmot	1:d0dfbce63a89	627	#define LL_ADC_FLAG_JEOS_MST ADC_CSR_JEOS_MST /!< ADC flag ADC multimode master group injected end of sequence conversions /
elmot	1:d0dfbce63a89	628	#define LL_ADC_FLAG_JEOS_SLV ADC_CSR_JEOS_SLV /!< ADC flag ADC multimode slave group injected end of sequence conversions /
elmot	1:d0dfbce63a89	629	#define LL_ADC_FLAG_JQOVF_MST ADC_CSR_JQOVF_MST /!< ADC flag ADC multimode master group injected contexts queue overflow /
elmot	1:d0dfbce63a89	630	#define LL_ADC_FLAG_JQOVF_SLV ADC_CSR_JQOVF_SLV /!< ADC flag ADC multimode slave group injected contexts queue overflow /
elmot	1:d0dfbce63a89	631	#define LL_ADC_FLAG_AWD1_MST ADC_CSR_AWD1_MST /!< ADC flag ADC multimode master analog watchdog 1 of the ADC master /
elmot	1:d0dfbce63a89	632	#define LL_ADC_FLAG_AWD1_SLV ADC_CSR_AWD1_SLV /!< ADC flag ADC multimode slave analog watchdog 1 of the ADC slave /
elmot	1:d0dfbce63a89	633	#define LL_ADC_FLAG_AWD2_MST ADC_CSR_AWD2_MST /!< ADC flag ADC multimode master analog watchdog 2 of the ADC master /
elmot	1:d0dfbce63a89	634	#define LL_ADC_FLAG_AWD2_SLV ADC_CSR_AWD2_SLV /!< ADC flag ADC multimode slave analog watchdog 2 of the ADC slave /
elmot	1:d0dfbce63a89	635	#define LL_ADC_FLAG_AWD3_MST ADC_CSR_AWD3_MST /!< ADC flag ADC multimode master analog watchdog 3 of the ADC master /
elmot	1:d0dfbce63a89	636	#define LL_ADC_FLAG_AWD3_SLV ADC_CSR_AWD3_SLV /!< ADC flag ADC multimode slave analog watchdog 3 of the ADC slave /
elmot	1:d0dfbce63a89	637	#endif
elmot	1:d0dfbce63a89	638	/**
elmot	1:d0dfbce63a89	639	* @}
elmot	1:d0dfbce63a89	640	*/
elmot	1:d0dfbce63a89	641
elmot	1:d0dfbce63a89	642	/** @defgroup ADC_LL_EC_IT ADC interruptions for configuration (interruption enable or disable)
elmot	1:d0dfbce63a89	643	* @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
elmot	1:d0dfbce63a89	644	* @{
elmot	1:d0dfbce63a89	645	*/
elmot	1:d0dfbce63a89	646	#define LL_ADC_IT_ADRDY ADC_IER_ADRDYIE /!< ADC interruption ADC instance ready /
elmot	1:d0dfbce63a89	647	#define LL_ADC_IT_EOC ADC_IER_EOCIE /!< ADC interruption ADC group regular end of unitary conversion /
elmot	1:d0dfbce63a89	648	#define LL_ADC_IT_EOS ADC_IER_EOSIE /!< ADC interruption ADC group regular end of sequence conversions /
elmot	1:d0dfbce63a89	649	#define LL_ADC_IT_OVR ADC_IER_OVRIE /!< ADC interruption ADC group regular overrun /
elmot	1:d0dfbce63a89	650	#define LL_ADC_IT_EOSMP ADC_IER_EOSMPIE /!< ADC interruption ADC group regular end of sampling phase /
elmot	1:d0dfbce63a89	651	#define LL_ADC_IT_JEOC ADC_IER_JEOCIE /!< ADC interruption ADC group injected end of unitary conversion /
elmot	1:d0dfbce63a89	652	#define LL_ADC_IT_JEOS ADC_IER_JEOSIE /!< ADC interruption ADC group injected end of sequence conversions /
elmot	1:d0dfbce63a89	653	#define LL_ADC_IT_JQOVF ADC_IER_JQOVFIE /!< ADC interruption ADC group injected contexts queue overflow /
elmot	1:d0dfbce63a89	654	#define LL_ADC_IT_AWD1 ADC_IER_AWD1IE /!< ADC interruption ADC analog watchdog 1 /
elmot	1:d0dfbce63a89	655	#define LL_ADC_IT_AWD2 ADC_IER_AWD2IE /!< ADC interruption ADC analog watchdog 2 /
elmot	1:d0dfbce63a89	656	#define LL_ADC_IT_AWD3 ADC_IER_AWD3IE /!< ADC interruption ADC analog watchdog 3 /
elmot	1:d0dfbce63a89	657	/**
elmot	1:d0dfbce63a89	658	* @}
elmot	1:d0dfbce63a89	659	*/
elmot	1:d0dfbce63a89	660
elmot	1:d0dfbce63a89	661	/** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
elmot	1:d0dfbce63a89	662	* @{
elmot	1:d0dfbce63a89	663	*/
elmot	1:d0dfbce63a89	664	/* List of ADC registers intended to be used (most commonly) with */
elmot	1:d0dfbce63a89	665	/* DMA transfer. */
elmot	1:d0dfbce63a89	666	/* Refer to function @ref LL_ADC_DMA_GetRegAddr(). */
elmot	1:d0dfbce63a89	667	#define LL_ADC_DMA_REG_REGULAR_DATA ((uint32_t)0x00000000U) /* ADC group regular conversion data register (corresponding to register DR) to be used with ADC configured in independent mode. Without DMA transfer, register accessed by LL function @ref LL_ADC_REG_ReadConversionData32() and other functions @ref LL_ADC_REG_ReadConversionDatax() */
elmot	1:d0dfbce63a89	668	#if defined(ADC_MULTIMODE_SUPPORT)
elmot	1:d0dfbce63a89	669	#define LL_ADC_DMA_REG_REGULAR_DATA_MULTI ((uint32_t)0x00000001U) /* ADC group regular conversion data register (corresponding to register CDR) to be used with ADC configured in multimode (available on STM32 devices with several ADC instances). Without DMA transfer, register accessed by LL function @ref LL_ADC_REG_ReadMultiConversionData32() */
elmot	1:d0dfbce63a89	670	#endif
elmot	1:d0dfbce63a89	671	/**
elmot	1:d0dfbce63a89	672	* @}
elmot	1:d0dfbce63a89	673	*/
elmot	1:d0dfbce63a89	674
elmot	1:d0dfbce63a89	675	/** @defgroup ADC_LL_EC_COMMON_CLOCK_SOURCE ADC common - Clock source
elmot	1:d0dfbce63a89	676	* @{
elmot	1:d0dfbce63a89	677	*/
elmot	1:d0dfbce63a89	678	#define LL_ADC_CLOCK_SYNC_PCLK_DIV1 (ADC_CCR_CKMODE_0) /!< ADC synchronous clock derived from AHB clock without prescaler /
elmot	1:d0dfbce63a89	679	#define LL_ADC_CLOCK_SYNC_PCLK_DIV2 (ADC_CCR_CKMODE_1 ) /!< ADC synchronous clock derived from AHB clock with prescaler division by 2 /
elmot	1:d0dfbce63a89	680	#define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CCR_CKMODE_1 \| ADC_CCR_CKMODE_0) /!< ADC synchronous clock derived from AHB clock with prescaler division by 4 /
elmot	1:d0dfbce63a89	681	#define LL_ADC_CLOCK_ASYNC_DIV1 ((uint32_t)0x00000000U) /!< ADC asynchronous clock without prescaler /
elmot	1:d0dfbce63a89	682	#define LL_ADC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 2 /
elmot	1:d0dfbce63a89	683	#define LL_ADC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1 ) /!< ADC asynchronous clock with prescaler division by 4 /
elmot	1:d0dfbce63a89	684	#define LL_ADC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 6 /
elmot	1:d0dfbce63a89	685	#define LL_ADC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2 ) /!< ADC asynchronous clock with prescaler division by 8 /
elmot	1:d0dfbce63a89	686	#define LL_ADC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 10 /
elmot	1:d0dfbce63a89	687	#define LL_ADC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 \| ADC_CCR_PRESC_1 ) /!< ADC asynchronous clock with prescaler division by 12 /
elmot	1:d0dfbce63a89	688	#define LL_ADC_CLOCK_ASYNC_DIV16 (ADC_CCR_PRESC_2 \| ADC_CCR_PRESC_1 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 16 /
elmot	1:d0dfbce63a89	689	#define LL_ADC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /!< ADC asynchronous clock with prescaler division by 32 /
elmot	1:d0dfbce63a89	690	#define LL_ADC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 64 /
elmot	1:d0dfbce63a89	691	#define LL_ADC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 \| ADC_CCR_PRESC_1) /!< ADC asynchronous clock with prescaler division by 128 /
elmot	1:d0dfbce63a89	692	#define LL_ADC_CLOCK_ASYNC_DIV256 (ADC_CCR_PRESC_3 \| ADC_CCR_PRESC_1 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 256 /
elmot	1:d0dfbce63a89	693	/**
elmot	1:d0dfbce63a89	694	* @}
elmot	1:d0dfbce63a89	695	*/
elmot	1:d0dfbce63a89	696
elmot	1:d0dfbce63a89	697	/** @defgroup ADC_LL_EC_COMMON_PATH_INTERNAL ADC common - Measurement path to internal channels
elmot	1:d0dfbce63a89	698	* @{
elmot	1:d0dfbce63a89	699	*/
elmot	1:d0dfbce63a89	700	/* Note: Other measurement paths to internal channels may be available */
elmot	1:d0dfbce63a89	701	/* (connections to other peripherals). */
elmot	1:d0dfbce63a89	702	/* If they are not listed below, they do not require any specific */
elmot	1:d0dfbce63a89	703	/* path enable. In this case, Access to measurement path is done */
elmot	1:d0dfbce63a89	704	/* only by selecting the corresponding ADC internal channel. */
elmot	1:d0dfbce63a89	705	#define LL_ADC_PATH_INTERNAL_NONE ((uint32_t)0x00000000U)/!< ADC measurement pathes all disabled /
elmot	1:d0dfbce63a89	706	#define LL_ADC_PATH_INTERNAL_VREFINT (ADC_CCR_VREFEN) /!< ADC measurement path to internal channel VrefInt /
elmot	1:d0dfbce63a89	707	#define LL_ADC_PATH_INTERNAL_TEMPSENSOR (ADC_CCR_TSEN) /!< ADC measurement path to internal channel temperature sensor /
elmot	1:d0dfbce63a89	708	#define LL_ADC_PATH_INTERNAL_VBAT (ADC_CCR_VBATEN) /!< ADC measurement path to internal channel Vbat /
elmot	1:d0dfbce63a89	709	/**
elmot	1:d0dfbce63a89	710	* @}
elmot	1:d0dfbce63a89	711	*/
elmot	1:d0dfbce63a89	712
elmot	1:d0dfbce63a89	713	/** @defgroup ADC_LL_EC_RESOLUTION ADC instance - Resolution
elmot	1:d0dfbce63a89	714	* @{
elmot	1:d0dfbce63a89	715	*/
elmot	1:d0dfbce63a89	716	#define LL_ADC_RESOLUTION_12B ((uint32_t)0x00000000U) /!< ADC resolution 12 bits /
elmot	1:d0dfbce63a89	717	#define LL_ADC_RESOLUTION_10B ( ADC_CFGR_RES_0) /!< ADC resolution 10 bits /
elmot	1:d0dfbce63a89	718	#define LL_ADC_RESOLUTION_8B (ADC_CFGR_RES_1 ) /!< ADC resolution 8 bits /
elmot	1:d0dfbce63a89	719	#define LL_ADC_RESOLUTION_6B (ADC_CFGR_RES_1 \| ADC_CFGR_RES_0) /!< ADC resolution 6 bits /
elmot	1:d0dfbce63a89	720	/**
elmot	1:d0dfbce63a89	721	* @}
elmot	1:d0dfbce63a89	722	*/
elmot	1:d0dfbce63a89	723
elmot	1:d0dfbce63a89	724	/** @defgroup ADC_LL_EC_DATA_ALIGN ADC instance - Data alignment
elmot	1:d0dfbce63a89	725	* @{
elmot	1:d0dfbce63a89	726	*/
elmot	1:d0dfbce63a89	727	#define LL_ADC_DATA_ALIGN_RIGHT ((uint32_t)0x00000000U)/!< ADC conversion data alignment: right aligned (alignment on data register LSB bit 0)/
elmot	1:d0dfbce63a89	728	#define LL_ADC_DATA_ALIGN_LEFT (ADC_CFGR_ALIGN) /!< ADC conversion data alignment: left aligned (aligment on data register MSB bit 15)/
elmot	1:d0dfbce63a89	729	/**
elmot	1:d0dfbce63a89	730	* @}
elmot	1:d0dfbce63a89	731	*/
elmot	1:d0dfbce63a89	732
elmot	1:d0dfbce63a89	733	/** @defgroup ADC_LL_EC_LP_MODE ADC instance - Low power mode
elmot	1:d0dfbce63a89	734	* @{
elmot	1:d0dfbce63a89	735	*/
elmot	1:d0dfbce63a89	736	#define LL_ADC_LP_MODE_NONE ((uint32_t)0x00000000U) /!< No ADC low power mode activated /
elmot	1:d0dfbce63a89	737	#define LL_ADC_LP_AUTOWAIT (ADC_CFGR_AUTDLY) /!< ADC low power mode auto delay: Dynamic low power mode, ADC conversions are performed only when necessary (when previous ADC conversion data is read). See description with function @ref LL_ADC_SetLowPowerMode(). /
elmot	1:d0dfbce63a89	738	/**
elmot	1:d0dfbce63a89	739	* @}
elmot	1:d0dfbce63a89	740	*/
elmot	1:d0dfbce63a89	741
elmot	1:d0dfbce63a89	742	/** @defgroup ADC_LL_EC_OFFSET_NB ADC instance - Offset number
elmot	1:d0dfbce63a89	743	* @{
elmot	1:d0dfbce63a89	744	*/
elmot	1:d0dfbce63a89	745	#define LL_ADC_OFFSET_1 ADC_OFR1_REGOFFSET /!< ADC offset number 1: ADC channel and offset level to which the offset programmed will be applied (independently of channel mapped on ADC group regular or group injected) /
elmot	1:d0dfbce63a89	746	#define LL_ADC_OFFSET_2 ADC_OFR2_REGOFFSET /!< ADC offset number 2: ADC channel and offset level to which the offset programmed will be applied (independently of channel mapped on ADC group regular or group injected) /
elmot	1:d0dfbce63a89	747	#define LL_ADC_OFFSET_3 ADC_OFR3_REGOFFSET /!< ADC offset number 3: ADC channel and offset level to which the offset programmed will be applied (independently of channel mapped on ADC group regular or group injected) /
elmot	1:d0dfbce63a89	748	#define LL_ADC_OFFSET_4 ADC_OFR4_REGOFFSET /!< ADC offset number 4: ADC channel and offset level to which the offset programmed will be applied (independently of channel mapped on ADC group regular or group injected) /
elmot	1:d0dfbce63a89	749	/**
elmot	1:d0dfbce63a89	750	* @}
elmot	1:d0dfbce63a89	751	*/
elmot	1:d0dfbce63a89	752
elmot	1:d0dfbce63a89	753	/** @defgroup ADC_LL_EC_OFFSET_STATE ADC instance - Offset state
elmot	1:d0dfbce63a89	754	* @{
elmot	1:d0dfbce63a89	755	*/
elmot	1:d0dfbce63a89	756	#define LL_ADC_OFFSET_DISABLE ((uint32_t)0x00000000U)/!< ADC offset disabled (among ADC selected offset number 1, 2, 3 or 4) /
elmot	1:d0dfbce63a89	757	#define LL_ADC_OFFSET_ENABLE (ADC_OFR1_OFFSET1_EN) /!< ADC offset enabled (among ADC selected offset number 1, 2, 3 or 4) /
elmot	1:d0dfbce63a89	758	/**
elmot	1:d0dfbce63a89	759	* @}
elmot	1:d0dfbce63a89	760	*/
elmot	1:d0dfbce63a89	761
elmot	1:d0dfbce63a89	762	/** @defgroup ADC_LL_EC_GROUPS ADC instance - Groups
elmot	1:d0dfbce63a89	763	* @{
elmot	1:d0dfbce63a89	764	*/
elmot	1:d0dfbce63a89	765	#define LL_ADC_GROUP_REGULAR ((uint32_t)0x00000001U) /!< ADC group regular (available on all STM32 devices) /
elmot	1:d0dfbce63a89	766	#define LL_ADC_GROUP_INJECTED ((uint32_t)0x00000002U) /!< ADC group injected (not available on all STM32 devices)/
elmot	1:d0dfbce63a89	767	#define LL_ADC_GROUP_REGULAR_INJECTED ((uint32_t)0x00000003U) /!< ADC both groups regular and injected /
elmot	1:d0dfbce63a89	768	/**
elmot	1:d0dfbce63a89	769	* @}
elmot	1:d0dfbce63a89	770	*/
elmot	1:d0dfbce63a89	771
elmot	1:d0dfbce63a89	772	/** @defgroup ADC_LL_EC_CHANNEL ADC instance - Channel number
elmot	1:d0dfbce63a89	773	* @{
elmot	1:d0dfbce63a89	774	*/
elmot	1:d0dfbce63a89	775	#define LL_ADC_CHANNEL_0 (ADC_CHANNEL_0_NUMBER \| ADC_CHANNEL_0_SMP \| ADC_CHANNEL_0_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN0 /
elmot	1:d0dfbce63a89	776	#define LL_ADC_CHANNEL_1 (ADC_CHANNEL_1_NUMBER \| ADC_CHANNEL_1_SMP \| ADC_CHANNEL_1_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN1 /
elmot	1:d0dfbce63a89	777	#define LL_ADC_CHANNEL_2 (ADC_CHANNEL_2_NUMBER \| ADC_CHANNEL_2_SMP \| ADC_CHANNEL_2_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN2 /
elmot	1:d0dfbce63a89	778	#define LL_ADC_CHANNEL_3 (ADC_CHANNEL_3_NUMBER \| ADC_CHANNEL_3_SMP \| ADC_CHANNEL_3_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN3 /
elmot	1:d0dfbce63a89	779	#define LL_ADC_CHANNEL_4 (ADC_CHANNEL_4_NUMBER \| ADC_CHANNEL_4_SMP \| ADC_CHANNEL_4_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN4 /
elmot	1:d0dfbce63a89	780	#define LL_ADC_CHANNEL_5 (ADC_CHANNEL_5_NUMBER \| ADC_CHANNEL_5_SMP \| ADC_CHANNEL_5_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN5 /
elmot	1:d0dfbce63a89	781	#define LL_ADC_CHANNEL_6 (ADC_CHANNEL_6_NUMBER \| ADC_CHANNEL_6_SMP \| ADC_CHANNEL_6_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN6 /
elmot	1:d0dfbce63a89	782	#define LL_ADC_CHANNEL_7 (ADC_CHANNEL_7_NUMBER \| ADC_CHANNEL_7_SMP \| ADC_CHANNEL_7_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN7 /
elmot	1:d0dfbce63a89	783	#define LL_ADC_CHANNEL_8 (ADC_CHANNEL_8_NUMBER \| ADC_CHANNEL_8_SMP \| ADC_CHANNEL_8_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN8 /
elmot	1:d0dfbce63a89	784	#define LL_ADC_CHANNEL_9 (ADC_CHANNEL_9_NUMBER \| ADC_CHANNEL_9_SMP \| ADC_CHANNEL_9_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN9 /
elmot	1:d0dfbce63a89	785	#define LL_ADC_CHANNEL_10 (ADC_CHANNEL_10_NUMBER \| ADC_CHANNEL_10_SMP \| ADC_CHANNEL_10_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN10 /
elmot	1:d0dfbce63a89	786	#define LL_ADC_CHANNEL_11 (ADC_CHANNEL_11_NUMBER \| ADC_CHANNEL_11_SMP \| ADC_CHANNEL_11_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN11 /
elmot	1:d0dfbce63a89	787	#define LL_ADC_CHANNEL_12 (ADC_CHANNEL_12_NUMBER \| ADC_CHANNEL_12_SMP \| ADC_CHANNEL_12_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN12 /
elmot	1:d0dfbce63a89	788	#define LL_ADC_CHANNEL_13 (ADC_CHANNEL_13_NUMBER \| ADC_CHANNEL_13_SMP \| ADC_CHANNEL_13_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN13 /
elmot	1:d0dfbce63a89	789	#define LL_ADC_CHANNEL_14 (ADC_CHANNEL_14_NUMBER \| ADC_CHANNEL_14_SMP \| ADC_CHANNEL_14_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN14 /
elmot	1:d0dfbce63a89	790	#define LL_ADC_CHANNEL_15 (ADC_CHANNEL_15_NUMBER \| ADC_CHANNEL_15_SMP \| ADC_CHANNEL_15_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN15 /
elmot	1:d0dfbce63a89	791	#define LL_ADC_CHANNEL_16 (ADC_CHANNEL_16_NUMBER \| ADC_CHANNEL_16_SMP \| ADC_CHANNEL_16_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN16 /
elmot	1:d0dfbce63a89	792	#define LL_ADC_CHANNEL_17 (ADC_CHANNEL_17_NUMBER \| ADC_CHANNEL_17_SMP \| ADC_CHANNEL_17_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN17 /
elmot	1:d0dfbce63a89	793	#define LL_ADC_CHANNEL_18 (ADC_CHANNEL_18_NUMBER \| ADC_CHANNEL_18_SMP \| ADC_CHANNEL_18_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN18 /
elmot	1:d0dfbce63a89	794	#define LL_ADC_CHANNEL_VREFINT (LL_ADC_CHANNEL_0 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to VrefInt: Internal voltage reference. On STM32L4, ADC channel available only on ADC instance: ADC1. /
elmot	1:d0dfbce63a89	795	#define LL_ADC_CHANNEL_TEMPSENSOR (LL_ADC_CHANNEL_17 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to Temperature sensor. On STM32L4, ADC channel available only on ADC instances: ADC1, ADC3. /
elmot	1:d0dfbce63a89	796	#define LL_ADC_CHANNEL_VBAT (LL_ADC_CHANNEL_18 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to Vbat/3: Vbat voltage through a divider ladder of factor 1/3 to have Vbat always below Vdda. On STM32L4, ADC channel available only on ADC instances: ADC1, ADC3. /
elmot	1:d0dfbce63a89	797	#if defined(ADC1) && !defined(ADC2)
elmot	1:d0dfbce63a89	798	#define LL_ADC_CHANNEL_DAC1CH1 (LL_ADC_CHANNEL_17 \| ADC_CHANNEL_ID_INTERNAL_CH \| ADC_CHANNEL_ID_INTERNAL_CH_2) /!< ADC internal channel connected to DAC1 channel 1, channel specific to ADC1. This channel is shared with ADC internal channel connected to temperature sensor, selection is done using function @ref LL_ADC_SetCommonPathInternalCh(). /
elmot	1:d0dfbce63a89	799	#define LL_ADC_CHANNEL_DAC1CH2 (LL_ADC_CHANNEL_18 \| ADC_CHANNEL_ID_INTERNAL_CH \| ADC_CHANNEL_ID_INTERNAL_CH_2) /!< ADC internal channel connected to DAC1 channel 2, channel specific to ADC1. This channel is shared with ADC internal channel connected to Vbat, selection is done using function @ref LL_ADC_SetCommonPathInternalCh(). /
elmot	1:d0dfbce63a89	800	#elif defined(ADC2)
elmot	1:d0dfbce63a89	801	#define LL_ADC_CHANNEL_DAC1CH1_ADC2 (LL_ADC_CHANNEL_17 \| ADC_CHANNEL_ID_INTERNAL_CH \| ADC_CHANNEL_ID_INTERNAL_CH_2) /!< ADC internal channel connected to DAC1 channel 1, channel specific to ADC2 /
elmot	1:d0dfbce63a89	802	#define LL_ADC_CHANNEL_DAC1CH2_ADC2 (LL_ADC_CHANNEL_18 \| ADC_CHANNEL_ID_INTERNAL_CH \| ADC_CHANNEL_ID_INTERNAL_CH_2) /!< ADC internal channel connected to DAC1 channel 2, channel specific to ADC2 /
elmot	1:d0dfbce63a89	803	#if defined(ADC3)
elmot	1:d0dfbce63a89	804	#define LL_ADC_CHANNEL_DAC1CH1_ADC3 (LL_ADC_CHANNEL_14 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to DAC1 channel 1, channel specific to ADC3 /
elmot	1:d0dfbce63a89	805	#define LL_ADC_CHANNEL_DAC1CH2_ADC3 (LL_ADC_CHANNEL_15 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to DAC1 channel 2, channel specific to ADC3 /
elmot	1:d0dfbce63a89	806	#endif
elmot	1:d0dfbce63a89	807	#endif
elmot	1:d0dfbce63a89	808	/**
elmot	1:d0dfbce63a89	809	* @}
elmot	1:d0dfbce63a89	810	*/
elmot	1:d0dfbce63a89	811
elmot	1:d0dfbce63a89	812	/** @defgroup ADC_LL_EC_REG_TRIGGER_SOURCE ADC group regular - Trigger source
elmot	1:d0dfbce63a89	813	* @{
elmot	1:d0dfbce63a89	814	*/
elmot	1:d0dfbce63a89	815	#define LL_ADC_REG_TRIG_SOFTWARE ((uint32_t)0x00000000U) /!< ADC group regular conversion trigger internal: SW start. /
elmot	1:d0dfbce63a89	816	#define LL_ADC_REG_TRIG_EXT_TIM1_TRGO (ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM1 TRGO. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	817	#define LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 (ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM1 TRGO2. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	818	#define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM1 channel 1 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	819	#define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM1 channel 2 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	820	#define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM1 channel 3 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	821	#define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_1 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM2 TRGO. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	822	#define LL_ADC_REG_TRIG_EXT_TIM2_CH2 (ADC_CFGR_EXTSEL_1 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM2 channel 2 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	823	#define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM3 TRGO. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	824	#define LL_ADC_REG_TRIG_EXT_TIM3_CH4 (ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_1 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM3 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	825	#define LL_ADC_REG_TRIG_EXT_TIM4_TRGO (ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM4 TRGO. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	826	#define LL_ADC_REG_TRIG_EXT_TIM4_CH4 (ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM4 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	827	#define LL_ADC_REG_TRIG_EXT_TIM6_TRGO (ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM6 TRGO. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	828	#define LL_ADC_REG_TRIG_EXT_TIM8_TRGO (ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_1 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM8 TRGO. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	829	#define LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 (ADC_CFGR_EXTSEL_3 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM8 TRGO2. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	830	#define LL_ADC_REG_TRIG_EXT_TIM15_TRGO (ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM15 TRGO. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	831	#define LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: external interrupt line 11. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	832	/**
elmot	1:d0dfbce63a89	833	* @}
elmot	1:d0dfbce63a89	834	*/
elmot	1:d0dfbce63a89	835
elmot	1:d0dfbce63a89	836	/** @defgroup ADC_LL_EC_REG_TRIGGER_EDGE ADC group regular - Trigger edge
elmot	1:d0dfbce63a89	837	* @{
elmot	1:d0dfbce63a89	838	*/
elmot	1:d0dfbce63a89	839	#define LL_ADC_REG_TRIG_EXT_RISING ( ADC_CFGR_EXTEN_0) /!< ADC group regular conversion trigger polarity set to rising edge /
elmot	1:d0dfbce63a89	840	#define LL_ADC_REG_TRIG_EXT_FALLING (ADC_CFGR_EXTEN_1 ) /!< ADC group regular conversion trigger polarity set to falling edge /
elmot	1:d0dfbce63a89	841	#define LL_ADC_REG_TRIG_EXT_RISINGFALLING (ADC_CFGR_EXTEN_1 \| ADC_CFGR_EXTEN_0) /!< ADC group regular conversion trigger polarity set to both rising and falling edges /
elmot	1:d0dfbce63a89	842	/**
elmot	1:d0dfbce63a89	843	* @}
elmot	1:d0dfbce63a89	844	*/
elmot	1:d0dfbce63a89	845
elmot	1:d0dfbce63a89	846	/** @defgroup ADC_LL_EC_REG_CONTINUOUS_MODE ADC group regular - Continuous mode
elmot	1:d0dfbce63a89	847	* @{
elmot	1:d0dfbce63a89	848	*/
elmot	1:d0dfbce63a89	849	#define LL_ADC_REG_CONV_SINGLE ((uint32_t)0x00000000U) /!< ADC conversions are performed in single mode: one conversion per trigger /
elmot	1:d0dfbce63a89	850	#define LL_ADC_REG_CONV_CONTINUOUS (ADC_CFGR_CONT) /!< ADC conversions are performed in continuous mode: after the first trigger, following conversions launched successively automatically /
elmot	1:d0dfbce63a89	851	/**
elmot	1:d0dfbce63a89	852	* @}
elmot	1:d0dfbce63a89	853	*/
elmot	1:d0dfbce63a89	854
elmot	1:d0dfbce63a89	855	/** @defgroup ADC_LL_EC_REG_DMA_TRANSFER ADC group regular - DMA transfer of ADC conversion data
elmot	1:d0dfbce63a89	856	* @{
elmot	1:d0dfbce63a89	857	*/
elmot	1:d0dfbce63a89	858	#define LL_ADC_REG_DMA_TRANSFER_NONE ((uint32_t)0x00000000U) /!< ADC conversions are not transferred by DMA /
elmot	1:d0dfbce63a89	859	#define LL_ADC_REG_DMA_TRANSFER_LIMITED ( ADC_CFGR_DMAEN) /!< ADC conversion data are transferred by DMA, in limited mode (one shot mode): DMA transfer requests are stopped when number of DMA data transfers (number of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circular. /
elmot	1:d0dfbce63a89	860	#define LL_ADC_REG_DMA_TRANSFER_UNLIMITED (ADC_CFGR_DMACFG \| ADC_CFGR_DMAEN) /!< ADC conversion data are transferred by DMA, in unlimited mode: DMA transfer requests are unlimited, whatever number of DMA data transferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. /
elmot	1:d0dfbce63a89	861	/**
elmot	1:d0dfbce63a89	862	* @}
elmot	1:d0dfbce63a89	863	*/
elmot	1:d0dfbce63a89	864
elmot	1:d0dfbce63a89	865	/** @defgroup ADC_LL_EC_REG_OVR_DATA_BEHAVIOR ADC group regular - Overrun behavior on conversion data
elmot	1:d0dfbce63a89	866	* @{
elmot	1:d0dfbce63a89	867	*/
elmot	1:d0dfbce63a89	868	#define LL_ADC_REG_OVR_DATA_PRESERVED ((uint32_t)0x00000000U)/!< ADC group regular behavior in case of overrun: data preserved /
elmot	1:d0dfbce63a89	869	#define LL_ADC_REG_OVR_DATA_OVERWRITTEN (ADC_CFGR_OVRMOD) /!< ADC group regular behavior in case of overrun: data overwritten /
elmot	1:d0dfbce63a89	870	/**
elmot	1:d0dfbce63a89	871	* @}
elmot	1:d0dfbce63a89	872	*/
elmot	1:d0dfbce63a89	873
elmot	1:d0dfbce63a89	874	/** @defgroup ADC_LL_EC_REG_SEQ_SCAN_LENGTH ADC group regular - Sequencer scan length
elmot	1:d0dfbce63a89	875	* @{
elmot	1:d0dfbce63a89	876	*/
elmot	1:d0dfbce63a89	877	#define LL_ADC_REG_SEQ_SCAN_DISABLE ((uint32_t)0x00000000U) /!< ADC group regular sequencer disable (equivalent to sequencer of 1 rank: ADC conversion on only 1 channel) /
elmot	1:d0dfbce63a89	878	#define LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS ( ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 2 ranks in the sequence /
elmot	1:d0dfbce63a89	879	#define LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS ( ADC_SQR1_L_1 ) /!< ADC group regular sequencer enable with 3 ranks in the sequence /
elmot	1:d0dfbce63a89	880	#define LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS ( ADC_SQR1_L_1 \| ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 4 ranks in the sequence /
elmot	1:d0dfbce63a89	881	#define LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS ( ADC_SQR1_L_2 ) /!< ADC group regular sequencer enable with 5 ranks in the sequence /
elmot	1:d0dfbce63a89	882	#define LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS ( ADC_SQR1_L_2 \| ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 6 ranks in the sequence /
elmot	1:d0dfbce63a89	883	#define LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS ( ADC_SQR1_L_2 \| ADC_SQR1_L_1 ) /!< ADC group regular sequencer enable with 7 ranks in the sequence /
elmot	1:d0dfbce63a89	884	#define LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS ( ADC_SQR1_L_2 \| ADC_SQR1_L_1 \| ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 8 ranks in the sequence /
elmot	1:d0dfbce63a89	885	#define LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS (ADC_SQR1_L_3 ) /!< ADC group regular sequencer enable with 9 ranks in the sequence /
elmot	1:d0dfbce63a89	886	#define LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS (ADC_SQR1_L_3 \| ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 10 ranks in the sequence /
elmot	1:d0dfbce63a89	887	#define LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS (ADC_SQR1_L_3 \| ADC_SQR1_L_1 ) /!< ADC group regular sequencer enable with 11 ranks in the sequence /
elmot	1:d0dfbce63a89	888	#define LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS (ADC_SQR1_L_3 \| ADC_SQR1_L_1 \| ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 12 ranks in the sequence /
elmot	1:d0dfbce63a89	889	#define LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS (ADC_SQR1_L_3 \| ADC_SQR1_L_2 ) /!< ADC group regular sequencer enable with 13 ranks in the sequence /
elmot	1:d0dfbce63a89	890	#define LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS (ADC_SQR1_L_3 \| ADC_SQR1_L_2 \| ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 14 ranks in the sequence /
elmot	1:d0dfbce63a89	891	#define LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS (ADC_SQR1_L_3 \| ADC_SQR1_L_2 \| ADC_SQR1_L_1 ) /!< ADC group regular sequencer enable with 15 ranks in the sequence /
elmot	1:d0dfbce63a89	892	#define LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS (ADC_SQR1_L_3 \| ADC_SQR1_L_2 \| ADC_SQR1_L_1 \| ADC_SQR1_L_0) /!< ADC group regular sequencer enable with 16 ranks in the sequence /
elmot	1:d0dfbce63a89	893	/**
elmot	1:d0dfbce63a89	894	* @}
elmot	1:d0dfbce63a89	895	*/
elmot	1:d0dfbce63a89	896
elmot	1:d0dfbce63a89	897	/** @defgroup ADC_LL_EC_REG_SEQ_DISCONT_MODE ADC group regular - Sequencer discontinuous mode
elmot	1:d0dfbce63a89	898	* @{
elmot	1:d0dfbce63a89	899	*/
elmot	1:d0dfbce63a89	900	#define LL_ADC_REG_SEQ_DISCONT_DISABLE ((uint32_t)0x00000000U) /!< ADC group regular sequencer discontinuous mode disable /
elmot	1:d0dfbce63a89	901	#define LL_ADC_REG_SEQ_DISCONT_1RANK ( ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every rank /
elmot	1:d0dfbce63a89	902	#define LL_ADC_REG_SEQ_DISCONT_2RANKS ( ADC_CFGR_DISCNUM_0 \| ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enabled with sequence interruption every 2 ranks /
elmot	1:d0dfbce63a89	903	#define LL_ADC_REG_SEQ_DISCONT_3RANKS ( ADC_CFGR_DISCNUM_1 \| ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every 3 ranks /
elmot	1:d0dfbce63a89	904	#define LL_ADC_REG_SEQ_DISCONT_4RANKS ( ADC_CFGR_DISCNUM_1 \| ADC_CFGR_DISCNUM_0 \| ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every 4 ranks /
elmot	1:d0dfbce63a89	905	#define LL_ADC_REG_SEQ_DISCONT_5RANKS (ADC_CFGR_DISCNUM_2 \| ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every 5 ranks /
elmot	1:d0dfbce63a89	906	#define LL_ADC_REG_SEQ_DISCONT_6RANKS (ADC_CFGR_DISCNUM_2 \| ADC_CFGR_DISCNUM_0 \| ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every 6 ranks /
elmot	1:d0dfbce63a89	907	#define LL_ADC_REG_SEQ_DISCONT_7RANKS (ADC_CFGR_DISCNUM_2 \| ADC_CFGR_DISCNUM_1 \| ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every 7 ranks /
elmot	1:d0dfbce63a89	908	#define LL_ADC_REG_SEQ_DISCONT_8RANKS (ADC_CFGR_DISCNUM_2 \| ADC_CFGR_DISCNUM_1 \| ADC_CFGR_DISCNUM_0 \| ADC_CFGR_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every 8 ranks /
elmot	1:d0dfbce63a89	909	/**
elmot	1:d0dfbce63a89	910	* @}
elmot	1:d0dfbce63a89	911	*/
elmot	1:d0dfbce63a89	912
elmot	1:d0dfbce63a89	913	/** @defgroup ADC_LL_EC_REG_SEQ_RANKS ADC group regular - Sequencer ranks
elmot	1:d0dfbce63a89	914	* @{
elmot	1:d0dfbce63a89	915	*/
elmot	1:d0dfbce63a89	916	#define LL_ADC_REG_RANK_1 (ADC_SQR1_REGOFFSET \| ADC_REG_RANK_1_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 1 /
elmot	1:d0dfbce63a89	917	#define LL_ADC_REG_RANK_2 (ADC_SQR1_REGOFFSET \| ADC_REG_RANK_2_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 2 /
elmot	1:d0dfbce63a89	918	#define LL_ADC_REG_RANK_3 (ADC_SQR1_REGOFFSET \| ADC_REG_RANK_3_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 3 /
elmot	1:d0dfbce63a89	919	#define LL_ADC_REG_RANK_4 (ADC_SQR1_REGOFFSET \| ADC_REG_RANK_4_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 4 /
elmot	1:d0dfbce63a89	920	#define LL_ADC_REG_RANK_5 (ADC_SQR2_REGOFFSET \| ADC_REG_RANK_5_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 5 /
elmot	1:d0dfbce63a89	921	#define LL_ADC_REG_RANK_6 (ADC_SQR2_REGOFFSET \| ADC_REG_RANK_6_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 6 /
elmot	1:d0dfbce63a89	922	#define LL_ADC_REG_RANK_7 (ADC_SQR2_REGOFFSET \| ADC_REG_RANK_7_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 7 /
elmot	1:d0dfbce63a89	923	#define LL_ADC_REG_RANK_8 (ADC_SQR2_REGOFFSET \| ADC_REG_RANK_8_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 8 /
elmot	1:d0dfbce63a89	924	#define LL_ADC_REG_RANK_9 (ADC_SQR2_REGOFFSET \| ADC_REG_RANK_9_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 9 /
elmot	1:d0dfbce63a89	925	#define LL_ADC_REG_RANK_10 (ADC_SQR3_REGOFFSET \| ADC_REG_RANK_10_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 10 /
elmot	1:d0dfbce63a89	926	#define LL_ADC_REG_RANK_11 (ADC_SQR3_REGOFFSET \| ADC_REG_RANK_11_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 11 /
elmot	1:d0dfbce63a89	927	#define LL_ADC_REG_RANK_12 (ADC_SQR3_REGOFFSET \| ADC_REG_RANK_12_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 12 /
elmot	1:d0dfbce63a89	928	#define LL_ADC_REG_RANK_13 (ADC_SQR3_REGOFFSET \| ADC_REG_RANK_13_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 13 /
elmot	1:d0dfbce63a89	929	#define LL_ADC_REG_RANK_14 (ADC_SQR3_REGOFFSET \| ADC_REG_RANK_14_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 14 /
elmot	1:d0dfbce63a89	930	#define LL_ADC_REG_RANK_15 (ADC_SQR4_REGOFFSET \| ADC_REG_RANK_15_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 15 /
elmot	1:d0dfbce63a89	931	#define LL_ADC_REG_RANK_16 (ADC_SQR4_REGOFFSET \| ADC_REG_RANK_16_SQRX_BITOFFSET_POS) /!< ADC group regular sequencer rank 16 /
elmot	1:d0dfbce63a89	932	/**
elmot	1:d0dfbce63a89	933	* @}
elmot	1:d0dfbce63a89	934	*/
elmot	1:d0dfbce63a89	935
elmot	1:d0dfbce63a89	936	/** @defgroup ADC_LL_EC_INJ_TRIGGER_SOURCE ADC group injected - Trigger source
elmot	1:d0dfbce63a89	937	* @{
elmot	1:d0dfbce63a89	938	*/
elmot	1:d0dfbce63a89	939	#define LL_ADC_INJ_TRIG_SOFTWARE ((uint32_t)0x00000000U) /!< ADC group injected conversion trigger internal: SW start.. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	940	#define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO (ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM1 TRGO. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	941	#define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 (ADC_JSQR_JEXTSEL_3 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM1 TRGO2. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	942	#define LL_ADC_INJ_TRIG_EXT_TIM1_CH4 (ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM1 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	943	#define LL_ADC_INJ_TRIG_EXT_TIM2_TRGO (ADC_JSQR_JEXTSEL_1 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM2 TRGO. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	944	#define LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (ADC_JSQR_JEXTSEL_1 \| ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM2 channel 1 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	945	#define LL_ADC_INJ_TRIG_EXT_TIM3_TRGO (ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_2 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM3 TRGO. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	946	#define LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM3 channel 1 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	947	#define LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_1 \| ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM3 channel 3 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	948	#define LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (ADC_JSQR_JEXTSEL_2 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM3 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	949	#define LL_ADC_INJ_TRIG_EXT_TIM4_TRGO (ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM4 TRGO. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	950	#define LL_ADC_INJ_TRIG_EXT_TIM6_TRGO (ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_1 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM6 TRGO. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	951	#define LL_ADC_INJ_TRIG_EXT_TIM8_CH4 (ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_1 \| ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM8 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	952	#define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO (ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM8 TRGO. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	953	#define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 (ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_1 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM8 TRGO2. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	954	#define LL_ADC_INJ_TRIG_EXT_TIM15_TRGO (ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_1 \| ADC_JSQR_JEXTSEL_0 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: TIM15 TRGO. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	955	#define LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_1 \| ADC_INJ_TRIG_EXT_EDGE_DEFAULT) /!< ADC group injected conversion trigger from external IP: external interrupt line 15. Trigger edge set to rising edge (default setting). /
elmot	1:d0dfbce63a89	956	/**
elmot	1:d0dfbce63a89	957	* @}
elmot	1:d0dfbce63a89	958	*/
elmot	1:d0dfbce63a89	959
elmot	1:d0dfbce63a89	960	/** @defgroup ADC_LL_EC_INJ_TRIGGER_EDGE ADC group injected - Trigger edge
elmot	1:d0dfbce63a89	961	* @{
elmot	1:d0dfbce63a89	962	*/
elmot	1:d0dfbce63a89	963	#define LL_ADC_INJ_TRIG_EXT_RISING ( ADC_JSQR_JEXTEN_0) /!< ADC group injected conversion trigger polarity set to rising edge /
elmot	1:d0dfbce63a89	964	#define LL_ADC_INJ_TRIG_EXT_FALLING (ADC_JSQR_JEXTEN_1 ) /!< ADC group injected conversion trigger polarity set to falling edge /
elmot	1:d0dfbce63a89	965	#define LL_ADC_INJ_TRIG_EXT_RISINGFALLING (ADC_JSQR_JEXTEN_1 \| ADC_JSQR_JEXTEN_0) /!< ADC group injected conversion trigger polarity set to both rising and falling edges /
elmot	1:d0dfbce63a89	966	/**
elmot	1:d0dfbce63a89	967	* @}
elmot	1:d0dfbce63a89	968	*/
elmot	1:d0dfbce63a89	969
elmot	1:d0dfbce63a89	970	/** @defgroup ADC_LL_EC_INJ_TRIG_AUTO ADC group injected - Automatic trigger mode
elmot	1:d0dfbce63a89	971	* @{
elmot	1:d0dfbce63a89	972	*/
elmot	1:d0dfbce63a89	973	#define LL_ADC_INJ_TRIG_INDEPENDENT ((uint32_t)0x00000000U)/!< ADC group injected conversion trigger independent. Setting mandatory if ADC group injected injected trigger source is set to an external trigger. /
elmot	1:d0dfbce63a89	974	#define LL_ADC_INJ_TRIG_FROM_GRP_REGULAR (ADC_CFGR_JAUTO) /!< ADC group injected conversion trigger from ADC group regular. Setting compliant only with group injected trigger source set to SW start, without any further action on ADC group injected conversion start or stop: in this case, ADC group injected is controlled only from ADC group regular. /
elmot	1:d0dfbce63a89	975	/**
elmot	1:d0dfbce63a89	976	* @}
elmot	1:d0dfbce63a89	977	*/
elmot	1:d0dfbce63a89	978
elmot	1:d0dfbce63a89	979	/** @defgroup ADC_LL_EC_INJ_CONTEXT_QUEUE ADC group injected - Context queue mode
elmot	1:d0dfbce63a89	980	* @{
elmot	1:d0dfbce63a89	981	*/
elmot	1:d0dfbce63a89	982	#define LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE ((uint32_t)0x00000000U)/* Group injected sequence context queue is enabled and can contain up to 2 contexts. When all contexts have been processed, the queue maintains the last context active perpetually. */
elmot	1:d0dfbce63a89	983	#define LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY (ADC_CFGR_JQM) /* Group injected sequence context queue is enabled and can contain up to 2 contexts. When all contexts have been processed, the queue is empty and injected group triggers are disabled. */
elmot	1:d0dfbce63a89	984	#define LL_ADC_INJ_QUEUE_DISABLE (ADC_CFGR_JQDIS) /* Group injected sequence context queue is disabled: only 1 sequence can be configured and is active perpetually. */
elmot	1:d0dfbce63a89	985	/**
elmot	1:d0dfbce63a89	986	* @}
elmot	1:d0dfbce63a89	987	*/
elmot	1:d0dfbce63a89	988
elmot	1:d0dfbce63a89	989	/** @defgroup ADC_LL_EC_INJ_SEQ_SCAN_LENGTH ADC group injected - Sequencer scan length
elmot	1:d0dfbce63a89	990	* @{
elmot	1:d0dfbce63a89	991	*/
elmot	1:d0dfbce63a89	992	#define LL_ADC_INJ_SEQ_SCAN_DISABLE ((uint32_t)0x00000000U) /!< ADC group injected sequencer disable (equivalent to sequencer of 1 rank: ADC conversion on only 1 channel) /
elmot	1:d0dfbce63a89	993	#define LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS ( ADC_JSQR_JL_0) /!< ADC group injected sequencer enable with 2 ranks in the sequence /
elmot	1:d0dfbce63a89	994	#define LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS (ADC_JSQR_JL_1 ) /!< ADC group injected sequencer enable with 3 ranks in the sequence /
elmot	1:d0dfbce63a89	995	#define LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS (ADC_JSQR_JL_1 \| ADC_JSQR_JL_0) /!< ADC group injected sequencer enable with 4 ranks in the sequence /
elmot	1:d0dfbce63a89	996	/**
elmot	1:d0dfbce63a89	997	* @}
elmot	1:d0dfbce63a89	998	*/
elmot	1:d0dfbce63a89	999
elmot	1:d0dfbce63a89	1000	/** @defgroup ADC_LL_EC_INJ_SEQ_DISCONT_MODE ADC group injected - Sequencer discontinuous mode
elmot	1:d0dfbce63a89	1001	* @{
elmot	1:d0dfbce63a89	1002	*/
elmot	1:d0dfbce63a89	1003	#define LL_ADC_INJ_SEQ_DISCONT_DISABLE ((uint32_t)0x00000000U)/!< ADC group injected sequencer discontinuous mode disable /
elmot	1:d0dfbce63a89	1004	#define LL_ADC_INJ_SEQ_DISCONT_1RANK (ADC_CFGR_JDISCEN) /!< ADC group injected sequencer discontinuous mode enable with sequence interruption every rank /
elmot	1:d0dfbce63a89	1005	/**
elmot	1:d0dfbce63a89	1006	* @}
elmot	1:d0dfbce63a89	1007	*/
elmot	1:d0dfbce63a89	1008
elmot	1:d0dfbce63a89	1009	/** @defgroup ADC_LL_EC_INJ_SEQ_RANKS ADC group injected - Sequencer ranks
elmot	1:d0dfbce63a89	1010	* @{
elmot	1:d0dfbce63a89	1011	*/
elmot	1:d0dfbce63a89	1012	#define LL_ADC_INJ_RANK_1 (ADC_JDR1_REGOFFSET \| ADC_INJ_RANK_1_JSQR_BITOFFSET_POS) /!< ADC group injected sequencer rank 1 /
elmot	1:d0dfbce63a89	1013	#define LL_ADC_INJ_RANK_2 (ADC_JDR2_REGOFFSET \| ADC_INJ_RANK_2_JSQR_BITOFFSET_POS) /!< ADC group injected sequencer rank 2 /
elmot	1:d0dfbce63a89	1014	#define LL_ADC_INJ_RANK_3 (ADC_JDR3_REGOFFSET \| ADC_INJ_RANK_3_JSQR_BITOFFSET_POS) /!< ADC group injected sequencer rank 3 /
elmot	1:d0dfbce63a89	1015	#define LL_ADC_INJ_RANK_4 (ADC_JDR4_REGOFFSET \| ADC_INJ_RANK_4_JSQR_BITOFFSET_POS) /!< ADC group injected sequencer rank 4 /
elmot	1:d0dfbce63a89	1016	/**
elmot	1:d0dfbce63a89	1017	* @}
elmot	1:d0dfbce63a89	1018	*/
elmot	1:d0dfbce63a89	1019
elmot	1:d0dfbce63a89	1020	/** @defgroup ADC_LL_EC_CHANNEL_SAMPLINGTIME Channel - Sampling time
elmot	1:d0dfbce63a89	1021	* @{
elmot	1:d0dfbce63a89	1022	*/
elmot	1:d0dfbce63a89	1023	#define LL_ADC_SAMPLINGTIME_2CYCLES_5 (0x00000000U) /!< Sampling time 2.5 ADC clock cycles /
elmot	1:d0dfbce63a89	1024	#define LL_ADC_SAMPLINGTIME_6CYCLES_5 ( ADC_SMPR2_SMP10_0) /!< Sampling time 6.5 ADC clock cycles /
elmot	1:d0dfbce63a89	1025	#define LL_ADC_SAMPLINGTIME_12CYCLES_5 ( ADC_SMPR2_SMP10_1 ) /!< Sampling time 12.5 ADC clock cycles /
elmot	1:d0dfbce63a89	1026	#define LL_ADC_SAMPLINGTIME_24CYCLES_5 ( ADC_SMPR2_SMP10_1 \| ADC_SMPR2_SMP10_0) /!< Sampling time 24.5 ADC clock cycles /
elmot	1:d0dfbce63a89	1027	#define LL_ADC_SAMPLINGTIME_47CYCLES_5 (ADC_SMPR2_SMP10_2 ) /!< Sampling time 47.5 ADC clock cycles /
elmot	1:d0dfbce63a89	1028	#define LL_ADC_SAMPLINGTIME_92CYCLES_5 (ADC_SMPR2_SMP10_2 \| ADC_SMPR2_SMP10_0) /!< Sampling time 92.5 ADC clock cycles /
elmot	1:d0dfbce63a89	1029	#define LL_ADC_SAMPLINGTIME_247CYCLES_5 (ADC_SMPR2_SMP10_2 \| ADC_SMPR2_SMP10_1 ) /!< Sampling time 247.5 ADC clock cycles /
elmot	1:d0dfbce63a89	1030	#define LL_ADC_SAMPLINGTIME_640CYCLES_5 (ADC_SMPR2_SMP10_2 \| ADC_SMPR2_SMP10_1 \| ADC_SMPR2_SMP10_0) /!< Sampling time 640.5 ADC clock cycles /
elmot	1:d0dfbce63a89	1031	/**
elmot	1:d0dfbce63a89	1032	* @}
elmot	1:d0dfbce63a89	1033	*/
elmot	1:d0dfbce63a89	1034
elmot	1:d0dfbce63a89	1035	/** @defgroup ADC_LL_EC_CHANNEL_SINGLE_DIFF_ENDING Channel - Single or differential ending
elmot	1:d0dfbce63a89	1036	* @{
elmot	1:d0dfbce63a89	1037	*/
elmot	1:d0dfbce63a89	1038	#define LL_ADC_SINGLE_ENDED ( ADC_CALFACT_CALFACT_S) /!< ADC channel ending set to single ended (literal also used to set calibration mode) /
elmot	1:d0dfbce63a89	1039	#define LL_ADC_DIFFERENTIAL_ENDED (ADC_CR_ADCALDIF \| ADC_CALFACT_CALFACT_D) /!< ADC channel ending set to differential (literal also used to set calibration mode) /
elmot	1:d0dfbce63a89	1040	#define LL_ADC_BOTH_SINGLE_DIFF_ENDED (LL_ADC_SINGLE_ENDED \| LL_ADC_DIFFERENTIAL_ENDED) /!< ADC channel ending set to both single ended and differential (literal used only to set calibration factors) /
elmot	1:d0dfbce63a89	1041	/**
elmot	1:d0dfbce63a89	1042	* @}
elmot	1:d0dfbce63a89	1043	*/
elmot	1:d0dfbce63a89	1044
elmot	1:d0dfbce63a89	1045	/** @defgroup ADC_LL_EC_AWD_NUMBER Analog watchdog - Analog watchdog number
elmot	1:d0dfbce63a89	1046	* @{
elmot	1:d0dfbce63a89	1047	*/
elmot	1:d0dfbce63a89	1048	#define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK \| ADC_AWD_CR1_REGOFFSET) /!< ADC analog watchdog number 1 /
elmot	1:d0dfbce63a89	1049	#define LL_ADC_AWD2 (ADC_AWD_CR23_CHANNEL_MASK \| ADC_AWD_CR2_REGOFFSET) /!< ADC analog watchdog number 2 /
elmot	1:d0dfbce63a89	1050	#define LL_ADC_AWD3 (ADC_AWD_CR23_CHANNEL_MASK \| ADC_AWD_CR3_REGOFFSET) /!< ADC analog watchdog number 3 /
elmot	1:d0dfbce63a89	1051	/**
elmot	1:d0dfbce63a89	1052	* @}
elmot	1:d0dfbce63a89	1053	*/
elmot	1:d0dfbce63a89	1054
elmot	1:d0dfbce63a89	1055	/** @defgroup ADC_LL_EC_AWD_CHANNELS Analog watchdog - Monitored channels
elmot	1:d0dfbce63a89	1056	* @{
elmot	1:d0dfbce63a89	1057	*/
elmot	1:d0dfbce63a89	1058	#define LL_ADC_AWD_DISABLE ((uint32_t)0x00000000U) /!< ADC analog watchdog monitoring disabled /
elmot	1:d0dfbce63a89	1059	#define LL_ADC_AWD_ALL_CHANNELS_REG (ADC_AWD_CR23_CHANNEL_MASK \| ADC_CFGR_AWD1EN ) /!< ADC analog watchdog monitoring of all channels, converted by group regular only /
elmot	1:d0dfbce63a89	1060	#define LL_ADC_AWD_ALL_CHANNELS_INJ (ADC_AWD_CR23_CHANNEL_MASK \| ADC_CFGR_JAWD1EN ) /!< ADC analog watchdog monitoring of all channels, converted by group injected only /
elmot	1:d0dfbce63a89	1061	#define LL_ADC_AWD_ALL_CHANNELS_REG_INJ (ADC_AWD_CR23_CHANNEL_MASK \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN ) /!< ADC analog watchdog monitoring of all channels, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1062	#define LL_ADC_AWD_CHANNEL_0_REG ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN0, converted by group regular only /
elmot	1:d0dfbce63a89	1063	#define LL_ADC_AWD_CHANNEL_0_INJ ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN0, converted by group injected only /
elmot	1:d0dfbce63a89	1064	#define LL_ADC_AWD_CHANNEL_0_REG_INJ ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN0, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1065	#define LL_ADC_AWD_CHANNEL_1_REG ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN1, converted by group regular only /
elmot	1:d0dfbce63a89	1066	#define LL_ADC_AWD_CHANNEL_1_INJ ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN1, converted by group injected only /
elmot	1:d0dfbce63a89	1067	#define LL_ADC_AWD_CHANNEL_1_REG_INJ ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN1, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1068	#define LL_ADC_AWD_CHANNEL_2_REG ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN2, converted by group regular only /
elmot	1:d0dfbce63a89	1069	#define LL_ADC_AWD_CHANNEL_2_INJ ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN2, converted by group injected only /
elmot	1:d0dfbce63a89	1070	#define LL_ADC_AWD_CHANNEL_2_REG_INJ ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN2, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1071	#define LL_ADC_AWD_CHANNEL_3_REG ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN3, converted by group regular only /
elmot	1:d0dfbce63a89	1072	#define LL_ADC_AWD_CHANNEL_3_INJ ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN3, converted by group injected only /
elmot	1:d0dfbce63a89	1073	#define LL_ADC_AWD_CHANNEL_3_REG_INJ ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN3, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1074	#define LL_ADC_AWD_CHANNEL_4_REG ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN4, converted by group regular only /
elmot	1:d0dfbce63a89	1075	#define LL_ADC_AWD_CHANNEL_4_INJ ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN4, converted by group injected only /
elmot	1:d0dfbce63a89	1076	#define LL_ADC_AWD_CHANNEL_4_REG_INJ ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN4, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1077	#define LL_ADC_AWD_CHANNEL_5_REG ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN5, converted by group regular only /
elmot	1:d0dfbce63a89	1078	#define LL_ADC_AWD_CHANNEL_5_INJ ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN5, converted by group injected only /
elmot	1:d0dfbce63a89	1079	#define LL_ADC_AWD_CHANNEL_5_REG_INJ ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN5, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1080	#define LL_ADC_AWD_CHANNEL_6_REG ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN6, converted by group regular only /
elmot	1:d0dfbce63a89	1081	#define LL_ADC_AWD_CHANNEL_6_INJ ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN6, converted by group injected only /
elmot	1:d0dfbce63a89	1082	#define LL_ADC_AWD_CHANNEL_6_REG_INJ ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN6, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1083	#define LL_ADC_AWD_CHANNEL_7_REG ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN7, converted by group regular only /
elmot	1:d0dfbce63a89	1084	#define LL_ADC_AWD_CHANNEL_7_INJ ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN7, converted by group injected only /
elmot	1:d0dfbce63a89	1085	#define LL_ADC_AWD_CHANNEL_7_REG_INJ ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN7, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1086	#define LL_ADC_AWD_CHANNEL_8_REG ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN8, converted by group regular only /
elmot	1:d0dfbce63a89	1087	#define LL_ADC_AWD_CHANNEL_8_INJ ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN8, converted by group injected only /
elmot	1:d0dfbce63a89	1088	#define LL_ADC_AWD_CHANNEL_8_REG_INJ ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN8, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1089	#define LL_ADC_AWD_CHANNEL_9_REG ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN9, converted by group regular only /
elmot	1:d0dfbce63a89	1090	#define LL_ADC_AWD_CHANNEL_9_INJ ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN9, converted by group injected only /
elmot	1:d0dfbce63a89	1091	#define LL_ADC_AWD_CHANNEL_9_REG_INJ ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN9, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1092	#define LL_ADC_AWD_CHANNEL_10_REG ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN10, converted by group regular only /
elmot	1:d0dfbce63a89	1093	#define LL_ADC_AWD_CHANNEL_10_INJ ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN10, converted by group injected only /
elmot	1:d0dfbce63a89	1094	#define LL_ADC_AWD_CHANNEL_10_REG_INJ ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN10, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1095	#define LL_ADC_AWD_CHANNEL_11_REG ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN11, converted by group regular only /
elmot	1:d0dfbce63a89	1096	#define LL_ADC_AWD_CHANNEL_11_INJ ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN11, converted by group injected only /
elmot	1:d0dfbce63a89	1097	#define LL_ADC_AWD_CHANNEL_11_REG_INJ ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN11, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1098	#define LL_ADC_AWD_CHANNEL_12_REG ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN12, converted by group regular only /
elmot	1:d0dfbce63a89	1099	#define LL_ADC_AWD_CHANNEL_12_INJ ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN12, converted by group injected only /
elmot	1:d0dfbce63a89	1100	#define LL_ADC_AWD_CHANNEL_12_REG_INJ ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN12, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1101	#define LL_ADC_AWD_CHANNEL_13_REG ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN13, converted by group regular only /
elmot	1:d0dfbce63a89	1102	#define LL_ADC_AWD_CHANNEL_13_INJ ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN13, converted by group injected only /
elmot	1:d0dfbce63a89	1103	#define LL_ADC_AWD_CHANNEL_13_REG_INJ ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN13, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1104	#define LL_ADC_AWD_CHANNEL_14_REG ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN14, converted by group regular only /
elmot	1:d0dfbce63a89	1105	#define LL_ADC_AWD_CHANNEL_14_INJ ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN14, converted by group injected only /
elmot	1:d0dfbce63a89	1106	#define LL_ADC_AWD_CHANNEL_14_REG_INJ ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN14, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1107	#define LL_ADC_AWD_CHANNEL_15_REG ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN15, converted by group regular only /
elmot	1:d0dfbce63a89	1108	#define LL_ADC_AWD_CHANNEL_15_INJ ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN15, converted by group injected only /
elmot	1:d0dfbce63a89	1109	#define LL_ADC_AWD_CHANNEL_15_REG_INJ ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN15, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1110	#define LL_ADC_AWD_CHANNEL_16_REG ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN16, converted by group regular only /
elmot	1:d0dfbce63a89	1111	#define LL_ADC_AWD_CHANNEL_16_INJ ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN16, converted by group injected only /
elmot	1:d0dfbce63a89	1112	#define LL_ADC_AWD_CHANNEL_16_REG_INJ ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN16, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1113	#define LL_ADC_AWD_CHANNEL_17_REG ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN17, converted by group regular only /
elmot	1:d0dfbce63a89	1114	#define LL_ADC_AWD_CHANNEL_17_INJ ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN17, converted by group injected only /
elmot	1:d0dfbce63a89	1115	#define LL_ADC_AWD_CHANNEL_17_REG_INJ ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN17, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1116	#define LL_ADC_AWD_CHANNEL_18_REG ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN18, converted by group regular only /
elmot	1:d0dfbce63a89	1117	#define LL_ADC_AWD_CHANNEL_18_INJ ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN18, converted by group injected only /
elmot	1:d0dfbce63a89	1118	#define LL_ADC_AWD_CHANNEL_18_REG_INJ ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN18, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1119	#define LL_ADC_AWD_CH_VREFINT_REG ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to VrefInt: Internal voltage reference, converted by group regular only /
elmot	1:d0dfbce63a89	1120	#define LL_ADC_AWD_CH_VREFINT_INJ ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to VrefInt: Internal voltage reference, converted by group injected only /
elmot	1:d0dfbce63a89	1121	#define LL_ADC_AWD_CH_VREFINT_REG_INJ ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to VrefInt: Internal voltage reference, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1122	#define LL_ADC_AWD_CH_TEMPSENSOR_REG ((LL_ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Temperature sensor, converted by group regular only /
elmot	1:d0dfbce63a89	1123	#define LL_ADC_AWD_CH_TEMPSENSOR_INJ ((LL_ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Temperature sensor, converted by group injected only /
elmot	1:d0dfbce63a89	1124	#define LL_ADC_AWD_CH_TEMPSENSOR_REG_INJ ((LL_ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Temperature sensor, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1125	#define LL_ADC_AWD_CH_VBAT_REG ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Vbat/3: Vbat voltage through a divider ladder of factor 1/3 to have Vbat always below Vdda, converted by group regular only /
elmot	1:d0dfbce63a89	1126	#define LL_ADC_AWD_CH_VBAT_INJ ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Vbat/3: Vbat voltage through a divider ladder of factor 1/3 to have Vbat always below Vdda, converted by group injected only /
elmot	1:d0dfbce63a89	1127	#define LL_ADC_AWD_CH_VBAT_REG_INJ ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Vbat/3: Vbat voltage through a divider ladder of factor 1/3 to have Vbat always below Vdda /
elmot	1:d0dfbce63a89	1128	#if defined(ADC1) && !defined(ADC2)
elmot	1:d0dfbce63a89	1129	#define LL_ADC_AWD_CH_DAC1CH1_REG ((LL_ADC_CHANNEL_DAC1CH1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC1, converted by group regular only /
elmot	1:d0dfbce63a89	1130	#define LL_ADC_AWD_CH_DAC1CH1_INJ ((LL_ADC_CHANNEL_DAC1CH1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC1, converted by group injected only /
elmot	1:d0dfbce63a89	1131	#define LL_ADC_AWD_CH_DAC1CH1_REG_INJ ((LL_ADC_CHANNEL_DAC1CH1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC1, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1132	#define LL_ADC_AWD_CH_DAC1CH2_REG ((LL_ADC_CHANNEL_DAC1CH2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC1, converted by group regular only /
elmot	1:d0dfbce63a89	1133	#define LL_ADC_AWD_CH_DAC1CH2_INJ ((LL_ADC_CHANNEL_DAC1CH2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC1, converted by group injected only /
elmot	1:d0dfbce63a89	1134	#define LL_ADC_AWD_CH_DAC1CH2_REG_INJ ((LL_ADC_CHANNEL_DAC1CH2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC1, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1135	#elif defined(ADC2)
elmot	1:d0dfbce63a89	1136	#define LL_ADC_AWD_CH_DAC1CH1_ADC2_REG ((LL_ADC_CHANNEL_DAC1CH1_ADC2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC2, converted by group regular only /
elmot	1:d0dfbce63a89	1137	#define LL_ADC_AWD_CH_DAC1CH1_ADC2_INJ ((LL_ADC_CHANNEL_DAC1CH1_ADC2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC2, converted by group injected only /
elmot	1:d0dfbce63a89	1138	#define LL_ADC_AWD_CH_DAC1CH1_ADC2_REG_INJ ((LL_ADC_CHANNEL_DAC1CH1_ADC2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC2, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1139	#define LL_ADC_AWD_CH_DAC1CH2_ADC2_REG ((LL_ADC_CHANNEL_DAC1CH2_ADC2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC2, converted by group regular only /
elmot	1:d0dfbce63a89	1140	#define LL_ADC_AWD_CH_DAC1CH2_ADC2_INJ ((LL_ADC_CHANNEL_DAC1CH2_ADC2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC2, converted by group injected only /
elmot	1:d0dfbce63a89	1141	#define LL_ADC_AWD_CH_DAC1CH2_ADC2_REG_INJ ((LL_ADC_CHANNEL_DAC1CH2_ADC2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC2, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1142	#if defined(ADC3)
elmot	1:d0dfbce63a89	1143	#define LL_ADC_AWD_CH_DAC1CH1_ADC3_REG ((LL_ADC_CHANNEL_DAC1CH1_ADC3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC3, converted by group regular only /
elmot	1:d0dfbce63a89	1144	#define LL_ADC_AWD_CH_DAC1CH1_ADC3_INJ ((LL_ADC_CHANNEL_DAC1CH1_ADC3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC3, converted by group injected only /
elmot	1:d0dfbce63a89	1145	#define LL_ADC_AWD_CH_DAC1CH1_ADC3_REG_INJ ((LL_ADC_CHANNEL_DAC1CH1_ADC3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC3, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1146	#define LL_ADC_AWD_CH_DAC1CH2_ADC3_REG ((LL_ADC_CHANNEL_DAC1CH2_ADC3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC3, converted by group regular only /
elmot	1:d0dfbce63a89	1147	#define LL_ADC_AWD_CH_DAC1CH2_ADC3_INJ ((LL_ADC_CHANNEL_DAC1CH2_ADC3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC3, converted by group injected only /
elmot	1:d0dfbce63a89	1148	#define LL_ADC_AWD_CH_DAC1CH2_ADC3_REG_INJ ((LL_ADC_CHANNEL_DAC1CH2_ADC3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to DAC1 channel 1, channel specific to ADC3, converted by either group regular or injected /
elmot	1:d0dfbce63a89	1149	#endif
elmot	1:d0dfbce63a89	1150	#endif
elmot	1:d0dfbce63a89	1151	/**
elmot	1:d0dfbce63a89	1152	* @}
elmot	1:d0dfbce63a89	1153	*/
elmot	1:d0dfbce63a89	1154
elmot	1:d0dfbce63a89	1155	/** @defgroup ADC_LL_EC_AWD_THRESHOLDS Analog watchdog - Thresholds
elmot	1:d0dfbce63a89	1156	* @{
elmot	1:d0dfbce63a89	1157	*/
elmot	1:d0dfbce63a89	1158	#define LL_ADC_AWD_THRESHOLD_HIGH (ADC_TR1_HT1 ) /!< ADC analog watchdog threshold high /
elmot	1:d0dfbce63a89	1159	#define LL_ADC_AWD_THRESHOLD_LOW ( ADC_TR1_LT1) /!< ADC analog watchdog threshold low /
elmot	1:d0dfbce63a89	1160	#define LL_ADC_AWD_THRESHOLDS_HIGH_LOW (ADC_TR1_HT1 \| ADC_TR1_LT1) /!< ADC analog watchdog both thresholds high and low concatenated into the same data /
elmot	1:d0dfbce63a89	1161	/**
elmot	1:d0dfbce63a89	1162	* @}
elmot	1:d0dfbce63a89	1163	*/
elmot	1:d0dfbce63a89	1164
elmot	1:d0dfbce63a89	1165	/** @defgroup ADC_LL_EC_OVS_SCOPE Oversampling - Oversampling scope
elmot	1:d0dfbce63a89	1166	* @{
elmot	1:d0dfbce63a89	1167	*/
elmot	1:d0dfbce63a89	1168	#define LL_ADC_OVS_DISABLE ((uint32_t)0x00000000U) /!< ADC oversampling disabled. /
elmot	1:d0dfbce63a89	1169	#define LL_ADC_OVS_GRP_REGULAR_CONTINUED ( ADC_CFGR2_ROVSE) /!< ADC oversampling on conversions of ADC group regular. If group injected interrupts group regular: when ADC group injected is triggered, the oversampling on ADC group regular is temporary stopped and continued afterwards. /
elmot	1:d0dfbce63a89	1170	#define LL_ADC_OVS_GRP_REGULAR_RESUMED (ADC_CFGR2_ROVSM \| ADC_CFGR2_ROVSE) /!< ADC oversampling on conversions of ADC group regular. If group injected interrupts group regular: when ADC group injected is triggered, the oversampling on ADC group regular is resumed from start (oversampler buffer reset). /
elmot	1:d0dfbce63a89	1171	#define LL_ADC_OVS_GRP_INJECTED ( ADC_CFGR2_JOVSE ) /!< ADC oversampling on conversions of ADC group injected. /
elmot	1:d0dfbce63a89	1172	#define LL_ADC_OVS_GRP_INJ_REG_RESUMED ( ADC_CFGR2_JOVSE \| ADC_CFGR2_ROVSE) /!< ADC oversampling on conversions of both ADC groups regular and injected. If group injected interrupting group regular: when ADC group injected is triggered, the oversampling on ADC group regular is resumed from start (oversampler buffer reset). /
elmot	1:d0dfbce63a89	1173	/**
elmot	1:d0dfbce63a89	1174	* @}
elmot	1:d0dfbce63a89	1175	*/
elmot	1:d0dfbce63a89	1176
elmot	1:d0dfbce63a89	1177	/** @defgroup ADC_LL_EC_OVS_DISCONT_MODE Oversampling - Discontinuous mode
elmot	1:d0dfbce63a89	1178	* @{
elmot	1:d0dfbce63a89	1179	*/
elmot	1:d0dfbce63a89	1180	#define LL_ADC_OVS_REG_CONT ((uint32_t)0x00000000U)/!< ADC oversampling discontinuous mode: continuous mode (all conversions of oversampling ratio are done from 1 trigger) /
elmot	1:d0dfbce63a89	1181	#define LL_ADC_OVS_REG_DISCONT (ADC_CFGR2_TROVS) /!< ADC oversampling discontinuous mode: discontinuous mode (each conversion of oversampling ratio needs a trigger) /
elmot	1:d0dfbce63a89	1182	/**
elmot	1:d0dfbce63a89	1183	* @}
elmot	1:d0dfbce63a89	1184	*/
elmot	1:d0dfbce63a89	1185
elmot	1:d0dfbce63a89	1186	/** @defgroup ADC_LL_EC_OVS_RATIO Oversampling - Ratio
elmot	1:d0dfbce63a89	1187	* @{
elmot	1:d0dfbce63a89	1188	*/
elmot	1:d0dfbce63a89	1189	#define LL_ADC_OVS_RATIO_2 ((uint32_t)0x00000000U) /!< ADC oversampling ratio of 2 (2 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
elmot	1:d0dfbce63a89	1190	#define LL_ADC_OVS_RATIO_4 ( ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 4 (4 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
elmot	1:d0dfbce63a89	1191	#define LL_ADC_OVS_RATIO_8 ( ADC_CFGR2_OVSR_1 ) /!< ADC oversampling ratio of 8 (8 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
elmot	1:d0dfbce63a89	1192	#define LL_ADC_OVS_RATIO_16 ( ADC_CFGR2_OVSR_1 \| ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 16 (16 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
elmot	1:d0dfbce63a89	1193	#define LL_ADC_OVS_RATIO_32 (ADC_CFGR2_OVSR_2 ) /!< ADC oversampling ratio of 32 (32 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
elmot	1:d0dfbce63a89	1194	#define LL_ADC_OVS_RATIO_64 (ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 64 (64 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
elmot	1:d0dfbce63a89	1195	#define LL_ADC_OVS_RATIO_128 (ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_1 ) /!< ADC oversampling ratio of 128 (128 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
elmot	1:d0dfbce63a89	1196	#define LL_ADC_OVS_RATIO_256 (ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_1 \| ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 256 (256 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
elmot	1:d0dfbce63a89	1197	/**
elmot	1:d0dfbce63a89	1198	* @}
elmot	1:d0dfbce63a89	1199	*/
elmot	1:d0dfbce63a89	1200
elmot	1:d0dfbce63a89	1201	/** @defgroup ADC_LL_EC_OVS_SHIFT Oversampling - Data shift
elmot	1:d0dfbce63a89	1202	* @{
elmot	1:d0dfbce63a89	1203	*/
elmot	1:d0dfbce63a89	1204	#define LL_ADC_OVS_SHIFT_NONE ((uint32_t)0x00000000U) /!< ADC oversampling no shift (sum of the ADC conversions data is not divided to result as the ADC oversampling conversion data) /
elmot	1:d0dfbce63a89	1205	#define LL_ADC_OVS_SHIFT_RIGHT_1 ( ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 1 (sum of the ADC conversions data is divided by 2 to result as the ADC oversampling conversion data) /
elmot	1:d0dfbce63a89	1206	#define LL_ADC_OVS_SHIFT_RIGHT_2 ( ADC_CFGR2_OVSS_1 ) /!< ADC oversampling shift of 2 (sum of the ADC conversions data is divided by 4 to result as the ADC oversampling conversion data) /
elmot	1:d0dfbce63a89	1207	#define LL_ADC_OVS_SHIFT_RIGHT_3 ( ADC_CFGR2_OVSS_1 \| ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 3 (sum of the ADC conversions data is divided by 8 to result as the ADC oversampling conversion data) /
elmot	1:d0dfbce63a89	1208	#define LL_ADC_OVS_SHIFT_RIGHT_4 ( ADC_CFGR2_OVSS_2 ) /!< ADC oversampling shift of 4 (sum of the ADC conversions data is divided by 16 to result as the ADC oversampling conversion data) /
elmot	1:d0dfbce63a89	1209	#define LL_ADC_OVS_SHIFT_RIGHT_5 ( ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 5 (sum of the ADC conversions data is divided by 32 to result as the ADC oversampling conversion data) /
elmot	1:d0dfbce63a89	1210	#define LL_ADC_OVS_SHIFT_RIGHT_6 ( ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_1 ) /!< ADC oversampling shift of 6 (sum of the ADC conversions data is divided by 64 to result as the ADC oversampling conversion data) /
elmot	1:d0dfbce63a89	1211	#define LL_ADC_OVS_SHIFT_RIGHT_7 ( ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_1 \| ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 7 (sum of the ADC conversions data is divided by 128 to result as the ADC oversampling conversion data) /
elmot	1:d0dfbce63a89	1212	#define LL_ADC_OVS_SHIFT_RIGHT_8 (ADC_CFGR2_OVSS_3 ) /!< ADC oversampling shift of 8 (sum of the ADC conversions data is divided by 256 to result as the ADC oversampling conversion data) /
elmot	1:d0dfbce63a89	1213	/**
elmot	1:d0dfbce63a89	1214	* @}
elmot	1:d0dfbce63a89	1215	*/
elmot	1:d0dfbce63a89	1216
elmot	1:d0dfbce63a89	1217	#if defined(ADC_MULTIMODE_SUPPORT)
elmot	1:d0dfbce63a89	1218	/** @defgroup ADC_LL_EC_MULTI_MODE Multimode - Mode
elmot	1:d0dfbce63a89	1219	* @{
elmot	1:d0dfbce63a89	1220	*/
elmot	1:d0dfbce63a89	1221	#define LL_ADC_MULTI_INDEPENDENT ((uint32_t)0x00000000U) /!< ADC dual mode disabled (ADC independent mode) /
elmot	1:d0dfbce63a89	1222	#define LL_ADC_MULTI_DUAL_REG_SIMULT ( ADC_CCR_DUAL_2 \| ADC_CCR_DUAL_1 ) /!< ADC dual mode enabled: group regular simultaneous /
elmot	1:d0dfbce63a89	1223	#define LL_ADC_MULTI_DUAL_REG_INTERL ( ADC_CCR_DUAL_2 \| ADC_CCR_DUAL_1 \| ADC_CCR_DUAL_0) /!< ADC dual mode enabled: Combined group regular interleaved /
elmot	1:d0dfbce63a89	1224	#define LL_ADC_MULTI_DUAL_INJ_SIMULT ( ADC_CCR_DUAL_2 \| ADC_CCR_DUAL_0) /!< ADC dual mode enabled: group injected simultaneous /
elmot	1:d0dfbce63a89	1225	#define LL_ADC_MULTI_DUAL_INJ_ALTERN (ADC_CCR_DUAL_3 \| ADC_CCR_DUAL_0) /!< ADC dual mode enabled: group injected alternate trigger. Works only with external triggers (not internal SW start) /
elmot	1:d0dfbce63a89	1226	#define LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM ( ADC_CCR_DUAL_0) /!< ADC dual mode enabled: Combined group regular simultaneous + group injected simultaneous /
elmot	1:d0dfbce63a89	1227	#define LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT ( ADC_CCR_DUAL_1 ) /!< ADC dual mode enabled: Combined group regular simultaneous + group injected alternate trigger /
elmot	1:d0dfbce63a89	1228	#define LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM ( ADC_CCR_DUAL_1 \| ADC_CCR_DUAL_0) /!< ADC dual mode enabled: Combined group regular interleaved + group injected simultaneous /
elmot	1:d0dfbce63a89	1229	/**
elmot	1:d0dfbce63a89	1230	* @}
elmot	1:d0dfbce63a89	1231	*/
elmot	1:d0dfbce63a89	1232
elmot	1:d0dfbce63a89	1233	/** @defgroup ADC_LL_EC_MULTI_DMA_TRANSFER Multimode - DMA transfer
elmot	1:d0dfbce63a89	1234	* @{
elmot	1:d0dfbce63a89	1235	*/
elmot	1:d0dfbce63a89	1236	#define LL_ADC_MULTI_REG_DMA_EACH_ADC ((uint32_t)0x00000000U) /!< ADC multimode group regular conversions are transferred by DMA: each ADC uses its own DMA channel, with its individual DMA transfer settings /
elmot	1:d0dfbce63a89	1237	#define LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B ( ADC_CCR_MDMA_1 ) /!< ADC multimode group regular conversions are transferred by DMA, one DMA channel for both ADC (DMA of ADC master), in limited mode (one shot mode): DMA transfer requests are stopped when number of DMA data transfers (number of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circular. Setting for ADC resolution of 12 and 10 bits /
elmot	1:d0dfbce63a89	1238	#define LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B ( ADC_CCR_MDMA_1 \| ADC_CCR_MDMA_0) /!< ADC multimode group regular conversions are transferred by DMA, one DMA channel for both ADC (DMA of ADC master), in limited mode (one shot mode): DMA transfer requests are stopped when number of DMA data transfers (number of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circular. Setting for ADC resolution of 8 and 6 bits /
elmot	1:d0dfbce63a89	1239	#define LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B (ADC_CCR_DMACFG \| ADC_CCR_MDMA_1 ) /!< ADC multimode group regular conversions are transferred by DMA, one DMA channel for both ADC (DMA of ADC master), in unlimited mode: DMA transfer requests are unlimited, whatever number of DMA data transferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. Setting for ADC resolution of 12 and 10 bits /
elmot	1:d0dfbce63a89	1240	#define LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B (ADC_CCR_DMACFG \| ADC_CCR_MDMA_1 \| ADC_CCR_MDMA_0) /!< ADC multimode group regular conversions are transferred by DMA, one DMA channel for both ADC (DMA of ADC master), in unlimited mode: DMA transfer requests are unlimited, whatever number of DMA data transferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. Setting for ADC resolution of 8 and 6 bits /
elmot	1:d0dfbce63a89	1241	/**
elmot	1:d0dfbce63a89	1242	* @}
elmot	1:d0dfbce63a89	1243	*/
elmot	1:d0dfbce63a89	1244
elmot	1:d0dfbce63a89	1245	/** @defgroup ADC_LL_EC_MULTI_TWOSMP_DELAY Multimode - Delay between two sampling phases
elmot	1:d0dfbce63a89	1246	* @{
elmot	1:d0dfbce63a89	1247	*/
elmot	1:d0dfbce63a89	1248	#define LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE ((uint32_t)0x00000000U) /!< ADC multimode delay between two sampling phases: 1 ADC clock cycle /
elmot	1:d0dfbce63a89	1249	#define LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES ( ADC_CCR_DELAY_0) /!< ADC multimode delay between two sampling phases: 2 ADC clock cycles /
elmot	1:d0dfbce63a89	1250	#define LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES ( ADC_CCR_DELAY_1 ) /!< ADC multimode delay between two sampling phases: 3 ADC clock cycles /
elmot	1:d0dfbce63a89	1251	#define LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES ( ADC_CCR_DELAY_1 \| ADC_CCR_DELAY_0) /!< ADC multimode delay between two sampling phases: 4 ADC clock cycles /
elmot	1:d0dfbce63a89	1252	#define LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES ( ADC_CCR_DELAY_2 ) /!< ADC multimode delay between two sampling phases: 5 ADC clock cycles /
elmot	1:d0dfbce63a89	1253	#define LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES ( ADC_CCR_DELAY_2 \| ADC_CCR_DELAY_0) /!< ADC multimode delay between two sampling phases: 6 ADC clock cycles /
elmot	1:d0dfbce63a89	1254	#define LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES ( ADC_CCR_DELAY_2 \| ADC_CCR_DELAY_1 ) /!< ADC multimode delay between two sampling phases: 7 ADC clock cycles /
elmot	1:d0dfbce63a89	1255	#define LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES ( ADC_CCR_DELAY_2 \| ADC_CCR_DELAY_1 \| ADC_CCR_DELAY_0) /!< ADC multimode delay between two sampling phases: 8 ADC clock cycles /
elmot	1:d0dfbce63a89	1256	#define LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (ADC_CCR_DELAY_3 ) /!< ADC multimode delay between two sampling phases: 9 ADC clock cycles /
elmot	1:d0dfbce63a89	1257	#define LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (ADC_CCR_DELAY_3 \| ADC_CCR_DELAY_0) /!< ADC multimode delay between two sampling phases: 10 ADC clock cycles /
elmot	1:d0dfbce63a89	1258	#define LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (ADC_CCR_DELAY_3 \| ADC_CCR_DELAY_1 ) /!< ADC multimode delay between two sampling phases: 11 ADC clock cycles /
elmot	1:d0dfbce63a89	1259	#define LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (ADC_CCR_DELAY_3 \| ADC_CCR_DELAY_1 \| ADC_CCR_DELAY_0) /!< ADC multimode delay between two sampling phases: 12 ADC clock cycles /
elmot	1:d0dfbce63a89	1260	/**
elmot	1:d0dfbce63a89	1261	* @}
elmot	1:d0dfbce63a89	1262	*/
elmot	1:d0dfbce63a89	1263
elmot	1:d0dfbce63a89	1264	/** @defgroup ADC_LL_EC_MULTI_MASTER_SLAVE Multimode - ADC master or slave
elmot	1:d0dfbce63a89	1265	* @{
elmot	1:d0dfbce63a89	1266	*/
elmot	1:d0dfbce63a89	1267	#define LL_ADC_MULTI_MASTER ( ADC_CDR_RDATA_MST) /!< In multimode, selection among several ADC instances: ADC master /
elmot	1:d0dfbce63a89	1268	#define LL_ADC_MULTI_SLAVE (ADC_CDR_RDATA_SLV ) /!< In multimode, selection among several ADC instances: ADC slave /
elmot	1:d0dfbce63a89	1269	#define LL_ADC_MULTI_MASTER_SLAVE (ADC_CDR_RDATA_SLV \| ADC_CDR_RDATA_MST) /!< In multimode, selection among several ADC instances: both ADC master and ADC slave /
elmot	1:d0dfbce63a89	1270	/**
elmot	1:d0dfbce63a89	1271	* @}
elmot	1:d0dfbce63a89	1272	*/
elmot	1:d0dfbce63a89	1273
elmot	1:d0dfbce63a89	1274	#endif /* ADC_MULTIMODE_SUPPORT */
elmot	1:d0dfbce63a89	1275
elmot	1:d0dfbce63a89	1276	/** @defgroup ADC_LL_EC_LEGACY ADC literals legacy naming
elmot	1:d0dfbce63a89	1277	* @{
elmot	1:d0dfbce63a89	1278	*/
elmot	1:d0dfbce63a89	1279	#define LL_ADC_REG_TRIG_SW_START (LL_ADC_REG_TRIG_SOFTWARE)
elmot	1:d0dfbce63a89	1280	#define LL_ADC_REG_TRIG_EXT_TIM1_CC1 (LL_ADC_REG_TRIG_EXT_TIM1_CH1)
elmot	1:d0dfbce63a89	1281	#define LL_ADC_REG_TRIG_EXT_TIM1_CC2 (LL_ADC_REG_TRIG_EXT_TIM1_CH2)
elmot	1:d0dfbce63a89	1282	#define LL_ADC_REG_TRIG_EXT_TIM1_CC3 (LL_ADC_REG_TRIG_EXT_TIM1_CH3)
elmot	1:d0dfbce63a89	1283	#define LL_ADC_REG_TRIG_EXT_TIM2_CC2 (LL_ADC_REG_TRIG_EXT_TIM2_CH2)
elmot	1:d0dfbce63a89	1284	#define LL_ADC_REG_TRIG_EXT_TIM3_CC4 (LL_ADC_REG_TRIG_EXT_TIM3_CH4)
elmot	1:d0dfbce63a89	1285	#define LL_ADC_REG_TRIG_EXT_TIM4_CC4 (LL_ADC_REG_TRIG_EXT_TIM4_CH4)
elmot	1:d0dfbce63a89	1286
elmot	1:d0dfbce63a89	1287	#define LL_ADC_INJ_TRIG_SW_START (LL_ADC_INJ_TRIG_SOFTWARE)
elmot	1:d0dfbce63a89	1288	#define LL_ADC_INJ_TRIG_EXT_TIM1_CC4 (LL_ADC_INJ_TRIG_EXT_TIM1_CH4)
elmot	1:d0dfbce63a89	1289	#define LL_ADC_INJ_TRIG_EXT_TIM2_CC1 (LL_ADC_INJ_TRIG_EXT_TIM2_CH1)
elmot	1:d0dfbce63a89	1290	#define LL_ADC_INJ_TRIG_EXT_TIM3_CC1 (LL_ADC_INJ_TRIG_EXT_TIM3_CH1)
elmot	1:d0dfbce63a89	1291	#define LL_ADC_INJ_TRIG_EXT_TIM3_CC3 (LL_ADC_INJ_TRIG_EXT_TIM3_CH3)
elmot	1:d0dfbce63a89	1292	#define LL_ADC_INJ_TRIG_EXT_TIM3_CC4 (LL_ADC_INJ_TRIG_EXT_TIM3_CH4)
elmot	1:d0dfbce63a89	1293	#define LL_ADC_INJ_TRIG_EXT_TIM8_CC4 (LL_ADC_INJ_TRIG_EXT_TIM8_CH4)
elmot	1:d0dfbce63a89	1294
elmot	1:d0dfbce63a89	1295	#define LL_ADC_OVS_DATA_SHIFT_NONE (LL_ADC_OVS_SHIFT_NONE)
elmot	1:d0dfbce63a89	1296	#define LL_ADC_OVS_DATA_SHIFT_1 (LL_ADC_OVS_SHIFT_RIGHT_1)
elmot	1:d0dfbce63a89	1297	#define LL_ADC_OVS_DATA_SHIFT_2 (LL_ADC_OVS_SHIFT_RIGHT_2)
elmot	1:d0dfbce63a89	1298	#define LL_ADC_OVS_DATA_SHIFT_3 (LL_ADC_OVS_SHIFT_RIGHT_3)
elmot	1:d0dfbce63a89	1299	#define LL_ADC_OVS_DATA_SHIFT_4 (LL_ADC_OVS_SHIFT_RIGHT_4)
elmot	1:d0dfbce63a89	1300	#define LL_ADC_OVS_DATA_SHIFT_5 (LL_ADC_OVS_SHIFT_RIGHT_5)
elmot	1:d0dfbce63a89	1301	#define LL_ADC_OVS_DATA_SHIFT_6 (LL_ADC_OVS_SHIFT_RIGHT_6)
elmot	1:d0dfbce63a89	1302	#define LL_ADC_OVS_DATA_SHIFT_7 (LL_ADC_OVS_SHIFT_RIGHT_7)
elmot	1:d0dfbce63a89	1303	#define LL_ADC_OVS_DATA_SHIFT_8 (LL_ADC_OVS_SHIFT_RIGHT_8)
elmot	1:d0dfbce63a89	1304
elmot	1:d0dfbce63a89	1305	/**
elmot	1:d0dfbce63a89	1306	* @}
elmot	1:d0dfbce63a89	1307	*/
elmot	1:d0dfbce63a89	1308
elmot	1:d0dfbce63a89	1309
elmot	1:d0dfbce63a89	1310	/** @defgroup ADC_LL_EC_HW_DELAYS Definitions of ADC hardware constraints delays
elmot	1:d0dfbce63a89	1311	* @note Only ADC IP HW delays are defined in ADC LL driver driver,
elmot	1:d0dfbce63a89	1312	* not timeout values.
elmot	1:d0dfbce63a89	1313	* For details on delays values, refer to descriptions in source code
elmot	1:d0dfbce63a89	1314	* above each literal definition.
elmot	1:d0dfbce63a89	1315	* @{
elmot	1:d0dfbce63a89	1316	*/
elmot	1:d0dfbce63a89	1317
elmot	1:d0dfbce63a89	1318	/* Note: Only ADC IP HW delays are defined in ADC LL driver driver, */
elmot	1:d0dfbce63a89	1319	/* not timeout values. */
elmot	1:d0dfbce63a89	1320	/* Timeout values for ADC operations are dependent to device clock */
elmot	1:d0dfbce63a89	1321	/* configuration (system clock versus ADC clock), */
elmot	1:d0dfbce63a89	1322	/* and therefore must be defined in user application. */
elmot	1:d0dfbce63a89	1323	/* Indications for estimation of ADC timeout delays, for this */
elmot	1:d0dfbce63a89	1324	/* STM32 serie: */
elmot	1:d0dfbce63a89	1325	/* - ADC calibration time: maximum delay is 112/fADC. */
elmot	1:d0dfbce63a89	1326	/* (refer to device datasheet, parameter "tCAL") */
elmot	1:d0dfbce63a89	1327	/* - ADC enable time: maximum delay is 1 conversion cycle. */
elmot	1:d0dfbce63a89	1328	/* (refer to device datasheet, parameter "tSTAB") */
elmot	1:d0dfbce63a89	1329	/* - ADC disable time: maximum delay should be a few ADC clock cycles */
elmot	1:d0dfbce63a89	1330	/* - ADC stop conversion time: maximum delay should be a few ADC clock */
elmot	1:d0dfbce63a89	1331	/* cycles */
elmot	1:d0dfbce63a89	1332	/* - ADC conversion time: duration depending on ADC clock and ADC */
elmot	1:d0dfbce63a89	1333	/* configuration. */
elmot	1:d0dfbce63a89	1334	/* (refer to device reference manual, section "Timing") */
elmot	1:d0dfbce63a89	1335
elmot	1:d0dfbce63a89	1336	/* Delay for ADC stabilization time (ADC voltage regulator start-up time) */
elmot	1:d0dfbce63a89	1337	/* Delay set to maximum value (refer to device datasheet, */
elmot	1:d0dfbce63a89	1338	/* parameter "tADCVREG_STUP"). */
elmot	1:d0dfbce63a89	1339	/* Unit: us */
elmot	1:d0dfbce63a89	1340	#define LL_ADC_DELAY_INTERNAL_REGUL_STAB_US ((uint32_t) 10U) /!< Delay for ADC stabilization time (ADC voltage regulator start-up time) /
elmot	1:d0dfbce63a89	1341
elmot	1:d0dfbce63a89	1342	/* Delay for internal voltage reference stabilization time. */
elmot	1:d0dfbce63a89	1343	/* Delay set to maximum value (refer to device datasheet, */
elmot	1:d0dfbce63a89	1344	/* parameter "tstart_vrefint"). */
elmot	1:d0dfbce63a89	1345	/* Unit: us */
elmot	1:d0dfbce63a89	1346	#define LL_ADC_DELAY_VREFINT_STAB_US ((uint32_t) 12U) /!< Delay for internal voltage reference stabilization time /
elmot	1:d0dfbce63a89	1347
elmot	1:d0dfbce63a89	1348	/* Delay for temperature sensor stabilization time. */
elmot	1:d0dfbce63a89	1349	/* Literal set to maximum value (refer to device datasheet, */
elmot	1:d0dfbce63a89	1350	/* parameter "tSTART"). */
elmot	1:d0dfbce63a89	1351	/* Unit: us */
elmot	1:d0dfbce63a89	1352	#define LL_ADC_DELAY_TEMPSENSOR_STAB_US ((uint32_t) 120U) /!< Delay for temperature sensor stabilization time /
elmot	1:d0dfbce63a89	1353
elmot	1:d0dfbce63a89	1354	/* Delay required between ADC end of calibration and ADC enable. */
elmot	1:d0dfbce63a89	1355	/* Note: On this STM32 serie, a minimum number of ADC clock cycles */
elmot	1:d0dfbce63a89	1356	/* are required between ADC end of calibration and ADC enable. */
elmot	1:d0dfbce63a89	1357	/* Wait time can be computed in user application by waiting for the */
elmot	1:d0dfbce63a89	1358	/* equivalent number of CPU cycles, by taking into account */
elmot	1:d0dfbce63a89	1359	/* ratio of CPU clock versus ADC clock prescalers. */
elmot	1:d0dfbce63a89	1360	/* Unit: ADC clock cycles. */
elmot	1:d0dfbce63a89	1361	#define LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES ((uint32_t) 4U) /!< Delay required between ADC end of calibration and ADC enable /
elmot	1:d0dfbce63a89	1362
elmot	1:d0dfbce63a89	1363	/**
elmot	1:d0dfbce63a89	1364	* @}
elmot	1:d0dfbce63a89	1365	*/
elmot	1:d0dfbce63a89	1366
elmot	1:d0dfbce63a89	1367	/**
elmot	1:d0dfbce63a89	1368	* @}
elmot	1:d0dfbce63a89	1369	*/
elmot	1:d0dfbce63a89	1370
elmot	1:d0dfbce63a89	1371
elmot	1:d0dfbce63a89	1372	/* Exported macro ------------------------------------------------------------*/
elmot	1:d0dfbce63a89	1373	/** @defgroup ADC_LL_Exported_Macros ADC Exported Macros
elmot	1:d0dfbce63a89	1374	* @{
elmot	1:d0dfbce63a89	1375	*/
elmot	1:d0dfbce63a89	1376
elmot	1:d0dfbce63a89	1377	/** @defgroup ADC_LL_EM_WRITE_READ Common write and read registers Macros
elmot	1:d0dfbce63a89	1378	* @{
elmot	1:d0dfbce63a89	1379	*/
elmot	1:d0dfbce63a89	1380
elmot	1:d0dfbce63a89	1381	/**
elmot	1:d0dfbce63a89	1382	* @brief Write a value in ADC register
elmot	1:d0dfbce63a89	1383	* @param __INSTANCE__ ADC Instance
elmot	1:d0dfbce63a89	1384	* @param __REG__ Register to be written
elmot	1:d0dfbce63a89	1385	* @param __VALUE__ Value to be written in the register
elmot	1:d0dfbce63a89	1386	* @retval None
elmot	1:d0dfbce63a89	1387	*/
elmot	1:d0dfbce63a89	1388	#define LL_ADC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
elmot	1:d0dfbce63a89	1389
elmot	1:d0dfbce63a89	1390	/**
elmot	1:d0dfbce63a89	1391	* @brief Read a value in ADC register
elmot	1:d0dfbce63a89	1392	* @param __INSTANCE__ ADC Instance
elmot	1:d0dfbce63a89	1393	* @param __REG__ Register to be read
elmot	1:d0dfbce63a89	1394	* @retval Register value
elmot	1:d0dfbce63a89	1395	*/
elmot	1:d0dfbce63a89	1396	#define LL_ADC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
elmot	1:d0dfbce63a89	1397	/**
elmot	1:d0dfbce63a89	1398	* @}
elmot	1:d0dfbce63a89	1399	*/
elmot	1:d0dfbce63a89	1400
elmot	1:d0dfbce63a89	1401	/** @defgroup ADC_LL_EM_HELPER_MACRO ADC helper macro
elmot	1:d0dfbce63a89	1402	* @{
elmot	1:d0dfbce63a89	1403	*/
elmot	1:d0dfbce63a89	1404
elmot	1:d0dfbce63a89	1405	/**
elmot	1:d0dfbce63a89	1406	* @brief Helper macro to get ADC channel number in decimal format
elmot	1:d0dfbce63a89	1407	* from literals LL_ADC_CHANNEL_x.
elmot	1:d0dfbce63a89	1408	* @note Example:
elmot	1:d0dfbce63a89	1409	* __LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_CHANNEL_4)
elmot	1:d0dfbce63a89	1410	* will return decimal number "4".
elmot	1:d0dfbce63a89	1411	* @note The input can be a value from functions where a channel
elmot	1:d0dfbce63a89	1412	* number is returned, either defined with number
elmot	1:d0dfbce63a89	1413	* or with bitfield (only one bit must be set).
elmot	1:d0dfbce63a89	1414	* @param __CHANNEL__ This parameter can be one of the following values:
elmot	1:d0dfbce63a89	1415	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	1416	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	1417	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	1418	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	1419	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	1420	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	1421	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	1422	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	1423	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	1424	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	1425	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	1426	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	1427	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	1428	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	1429	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	1430	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	1431	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	1432	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	1433	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	1434	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	1435	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	1436	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	1437	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	1438	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	1439	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	1440	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	1441	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	1442	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	1443	*
elmot	1:d0dfbce63a89	1444	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	1445	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	1446	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	1447	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	1448	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	1449	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	1450	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	1451	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
elmot	1:d0dfbce63a89	1452	* @retval Value between Min_Data=0 and Max_Data=18
elmot	1:d0dfbce63a89	1453	*/
elmot	1:d0dfbce63a89	1454	#define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \
elmot	1:d0dfbce63a89	1455	((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0U) \
elmot	1:d0dfbce63a89	1456	? ( \
elmot	1:d0dfbce63a89	1457	((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS \
elmot	1:d0dfbce63a89	1458	) \
elmot	1:d0dfbce63a89	1459	: \
elmot	1:d0dfbce63a89	1460	( \
elmot	1:d0dfbce63a89	1461	POSITION_VAL((__CHANNEL__)) \
elmot	1:d0dfbce63a89	1462	) \
elmot	1:d0dfbce63a89	1463	)
elmot	1:d0dfbce63a89	1464
elmot	1:d0dfbce63a89	1465	/**
elmot	1:d0dfbce63a89	1466	* @brief Helper macro to get ADC channel in literal format LL_ADC_CHANNEL_x
elmot	1:d0dfbce63a89	1467	* from number in decimal format.
elmot	1:d0dfbce63a89	1468	* @note Example:
elmot	1:d0dfbce63a89	1469	* __LL_ADC_DECIMAL_NB_TO_CHANNEL(4)
elmot	1:d0dfbce63a89	1470	* will return a data equivalent to "LL_ADC_CHANNEL_4".
elmot	1:d0dfbce63a89	1471	* @param __DECIMAL_NB__: Value between Min_Data=0 and Max_Data=18
elmot	1:d0dfbce63a89	1472	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	1473	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	1474	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	1475	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	1476	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	1477	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	1478	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	1479	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	1480	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	1481	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	1482	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	1483	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	1484	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	1485	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	1486	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	1487	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	1488	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	1489	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	1490	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	1491	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	1492	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	1493	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	1494	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	1495	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	1496	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	1497	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	1498	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	1499	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	1500	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	1501	*
elmot	1:d0dfbce63a89	1502	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	1503	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	1504	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	1505	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	1506	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	1507	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	1508	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	1509	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).\n
elmot	1:d0dfbce63a89	1510	* (1, 2, 3, 4) For ADC channel read back from ADC register,
elmot	1:d0dfbce63a89	1511	* comparison with internal channel parameter to be done
elmot	1:d0dfbce63a89	1512	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
elmot	1:d0dfbce63a89	1513	*/
elmot	1:d0dfbce63a89	1514	#define __LL_ADC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \
elmot	1:d0dfbce63a89	1515	(((__DECIMAL_NB__) <= 9U) \
elmot	1:d0dfbce63a89	1516	? ( \
elmot	1:d0dfbce63a89	1517	((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) \| \
elmot	1:d0dfbce63a89	1518	(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) \| \
elmot	1:d0dfbce63a89	1519	(ADC_SMPR1_REGOFFSET \| (((uint32_t) (3U * (__DECIMAL_NB__))) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) \
elmot	1:d0dfbce63a89	1520	) \
elmot	1:d0dfbce63a89	1521	: \
elmot	1:d0dfbce63a89	1522	( \
elmot	1:d0dfbce63a89	1523	((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) \| \
elmot	1:d0dfbce63a89	1524	(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) \| \
elmot	1:d0dfbce63a89	1525	(ADC_SMPR2_REGOFFSET \| (((uint32_t) (3U * ((__DECIMAL_NB__) - 10U))) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) \
elmot	1:d0dfbce63a89	1526	) \
elmot	1:d0dfbce63a89	1527	)
elmot	1:d0dfbce63a89	1528
elmot	1:d0dfbce63a89	1529	/**
elmot	1:d0dfbce63a89	1530	* @brief Helper macro to determine whether the selected channel
elmot	1:d0dfbce63a89	1531	* corresponds to literal definitions of driver.
elmot	1:d0dfbce63a89	1532	* @note The different literal definitions of ADC channels are:
elmot	1:d0dfbce63a89	1533	* - ADC internal channel:
elmot	1:d0dfbce63a89	1534	* LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...
elmot	1:d0dfbce63a89	1535	* - ADC external channel (channel connected to a GPIO pin):
elmot	1:d0dfbce63a89	1536	* LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...
elmot	1:d0dfbce63a89	1537	* @note The channel parameter must be a value defined from literal
elmot	1:d0dfbce63a89	1538	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
elmot	1:d0dfbce63a89	1539	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
elmot	1:d0dfbce63a89	1540	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...),
elmot	1:d0dfbce63a89	1541	* must not be a value from functions where a channel number is
elmot	1:d0dfbce63a89	1542	* returned from ADC registers,
elmot	1:d0dfbce63a89	1543	* because internal and external channels share the same channel
elmot	1:d0dfbce63a89	1544	* number in ADC registers. The differentiation is made only with
elmot	1:d0dfbce63a89	1545	* parameters definitions of driver.
elmot	1:d0dfbce63a89	1546	* @param __CHANNEL__ This parameter can be one of the following values:
elmot	1:d0dfbce63a89	1547	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	1548	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	1549	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	1550	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	1551	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	1552	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	1553	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	1554	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	1555	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	1556	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	1557	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	1558	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	1559	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	1560	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	1561	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	1562	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	1563	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	1564	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	1565	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	1566	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	1567	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	1568	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	1569	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	1570	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	1571	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	1572	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	1573	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	1574	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	1575	*
elmot	1:d0dfbce63a89	1576	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	1577	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	1578	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	1579	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	1580	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	1581	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	1582	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	1583	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
elmot	1:d0dfbce63a89	1584	* @retval Value "0" if the channel corresponds to a parameter definition of a ADC external channel (channel connected to a GPIO pin).
elmot	1:d0dfbce63a89	1585	* Value "1" if the channel corresponds to a parameter definition of a ADC internal channel.
elmot	1:d0dfbce63a89	1586	*/
elmot	1:d0dfbce63a89	1587	#define __LL_ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \
elmot	1:d0dfbce63a89	1588	(((__CHANNEL__) & ADC_CHANNEL_ID_INTERNAL_CH_MASK) != 0U)
elmot	1:d0dfbce63a89	1589
elmot	1:d0dfbce63a89	1590	/**
elmot	1:d0dfbce63a89	1591	* @brief Helper macro to convert a channel defined from parameter
elmot	1:d0dfbce63a89	1592	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
elmot	1:d0dfbce63a89	1593	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
elmot	1:d0dfbce63a89	1594	* to its equivalent parameter definition of a ADC external channel
elmot	1:d0dfbce63a89	1595	* (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...).
elmot	1:d0dfbce63a89	1596	* @note The channel parameter can be, additionally to a value
elmot	1:d0dfbce63a89	1597	* defined from parameter definition of a ADC internal channel
elmot	1:d0dfbce63a89	1598	* (LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...),
elmot	1:d0dfbce63a89	1599	* a value defined from parameter definition of
elmot	1:d0dfbce63a89	1600	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
elmot	1:d0dfbce63a89	1601	* or a value from functions where a channel number is returned
elmot	1:d0dfbce63a89	1602	* from ADC registers.
elmot	1:d0dfbce63a89	1603	* @param __CHANNEL__ This parameter can be one of the following values:
elmot	1:d0dfbce63a89	1604	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	1605	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	1606	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	1607	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	1608	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	1609	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	1610	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	1611	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	1612	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	1613	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	1614	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	1615	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	1616	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	1617	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	1618	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	1619	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	1620	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	1621	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	1622	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	1623	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	1624	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	1625	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	1626	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	1627	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	1628	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	1629	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	1630	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	1631	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	1632	*
elmot	1:d0dfbce63a89	1633	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	1634	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	1635	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	1636	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	1637	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	1638	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	1639	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	1640	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
elmot	1:d0dfbce63a89	1641	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	1642	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	1643	* @arg @ref LL_ADC_CHANNEL_1
elmot	1:d0dfbce63a89	1644	* @arg @ref LL_ADC_CHANNEL_2
elmot	1:d0dfbce63a89	1645	* @arg @ref LL_ADC_CHANNEL_3
elmot	1:d0dfbce63a89	1646	* @arg @ref LL_ADC_CHANNEL_4
elmot	1:d0dfbce63a89	1647	* @arg @ref LL_ADC_CHANNEL_5
elmot	1:d0dfbce63a89	1648	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	1649	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	1650	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	1651	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	1652	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	1653	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	1654	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	1655	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	1656	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	1657	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	1658	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	1659	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	1660	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	1661	*/
elmot	1:d0dfbce63a89	1662	#define __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(__CHANNEL__) \
elmot	1:d0dfbce63a89	1663	((__CHANNEL__) & ~ADC_CHANNEL_ID_INTERNAL_CH_MASK)
elmot	1:d0dfbce63a89	1664
elmot	1:d0dfbce63a89	1665	/**
elmot	1:d0dfbce63a89	1666	* @brief Helper macro to determine whether the internal channel
elmot	1:d0dfbce63a89	1667	* selected is available on the ADC instance selected.
elmot	1:d0dfbce63a89	1668	* @note The channel parameter must be a value defined from parameter
elmot	1:d0dfbce63a89	1669	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
elmot	1:d0dfbce63a89	1670	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
elmot	1:d0dfbce63a89	1671	* must not be a value defined from parameter definition of
elmot	1:d0dfbce63a89	1672	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
elmot	1:d0dfbce63a89	1673	* or a value from functions where a channel number is
elmot	1:d0dfbce63a89	1674	* returned from ADC registers,
elmot	1:d0dfbce63a89	1675	* because internal and external channels share the same channel
elmot	1:d0dfbce63a89	1676	* number in ADC registers. The differentiation is made only with
elmot	1:d0dfbce63a89	1677	* parameters definitions of driver.
elmot	1:d0dfbce63a89	1678	* @param __ADC_INSTANCE__ ADC instance
elmot	1:d0dfbce63a89	1679	* @param __CHANNEL__ This parameter can be one of the following values:
elmot	1:d0dfbce63a89	1680	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	1681	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	1682	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	1683	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	1684	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	1685	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	1686	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	1687	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	1688	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	1689	*
elmot	1:d0dfbce63a89	1690	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	1691	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	1692	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	1693	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	1694	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	1695	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	1696	* @retval Value "0" if the internal channel selected is not available on the ADC instance selected.
elmot	1:d0dfbce63a89	1697	* Value "1" if the internal channel selected is available on the ADC instance selected.
elmot	1:d0dfbce63a89	1698	*/
elmot	1:d0dfbce63a89	1699	#if defined (ADC1) && defined (ADC2) && defined (ADC3)
elmot	1:d0dfbce63a89	1700	#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
elmot	1:d0dfbce63a89	1701	(((__ADC_INSTANCE__) == ADC1) \
elmot	1:d0dfbce63a89	1702	? ( \
elmot	1:d0dfbce63a89	1703	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
elmot	1:d0dfbce63a89	1704	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \|\| \
elmot	1:d0dfbce63a89	1705	((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) \
elmot	1:d0dfbce63a89	1706	) \
elmot	1:d0dfbce63a89	1707	: \
elmot	1:d0dfbce63a89	1708	((__ADC_INSTANCE__) == ADC2) \
elmot	1:d0dfbce63a89	1709	? ( \
elmot	1:d0dfbce63a89	1710	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
elmot	1:d0dfbce63a89	1711	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH1_ADC2) \|\| \
elmot	1:d0dfbce63a89	1712	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH2_ADC2) \
elmot	1:d0dfbce63a89	1713	) \
elmot	1:d0dfbce63a89	1714	: \
elmot	1:d0dfbce63a89	1715	((__ADC_INSTANCE__) == ADC3) \
elmot	1:d0dfbce63a89	1716	? ( \
elmot	1:d0dfbce63a89	1717	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
elmot	1:d0dfbce63a89	1718	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \|\| \
elmot	1:d0dfbce63a89	1719	((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) \|\| \
elmot	1:d0dfbce63a89	1720	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH1_ADC3) \|\| \
elmot	1:d0dfbce63a89	1721	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH2_ADC3) \
elmot	1:d0dfbce63a89	1722	) \
elmot	1:d0dfbce63a89	1723	: \
elmot	1:d0dfbce63a89	1724	(0U) \
elmot	1:d0dfbce63a89	1725	)
elmot	1:d0dfbce63a89	1726	#elif defined (ADC1) && defined (ADC2)
elmot	1:d0dfbce63a89	1727	#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
elmot	1:d0dfbce63a89	1728	(((__ADC_INSTANCE__) == ADC1) \
elmot	1:d0dfbce63a89	1729	? ( \
elmot	1:d0dfbce63a89	1730	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
elmot	1:d0dfbce63a89	1731	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \|\| \
elmot	1:d0dfbce63a89	1732	((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) \
elmot	1:d0dfbce63a89	1733	) \
elmot	1:d0dfbce63a89	1734	: \
elmot	1:d0dfbce63a89	1735	((__ADC_INSTANCE__) == ADC2) \
elmot	1:d0dfbce63a89	1736	? ( \
elmot	1:d0dfbce63a89	1737	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
elmot	1:d0dfbce63a89	1738	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH1_ADC2) \|\| \
elmot	1:d0dfbce63a89	1739	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH2_ADC2) \
elmot	1:d0dfbce63a89	1740	) \
elmot	1:d0dfbce63a89	1741	: \
elmot	1:d0dfbce63a89	1742	(0U) \
elmot	1:d0dfbce63a89	1743	)
elmot	1:d0dfbce63a89	1744	#elif defined (ADC1)
elmot	1:d0dfbce63a89	1745	#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
elmot	1:d0dfbce63a89	1746	( \
elmot	1:d0dfbce63a89	1747	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
elmot	1:d0dfbce63a89	1748	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \|\| \
elmot	1:d0dfbce63a89	1749	((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) \|\| \
elmot	1:d0dfbce63a89	1750	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH1) \|\| \
elmot	1:d0dfbce63a89	1751	((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH2) \
elmot	1:d0dfbce63a89	1752	)
elmot	1:d0dfbce63a89	1753	#endif
elmot	1:d0dfbce63a89	1754
elmot	1:d0dfbce63a89	1755	/**
elmot	1:d0dfbce63a89	1756	* @brief Helper macro to define ADC analog watchdog parameter:
elmot	1:d0dfbce63a89	1757	* define a single channel to monitor with analog watchdog
elmot	1:d0dfbce63a89	1758	* from sequencer channel and groups definition.
elmot	1:d0dfbce63a89	1759	* @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
elmot	1:d0dfbce63a89	1760	* Example:
elmot	1:d0dfbce63a89	1761	* LL_ADC_SetAnalogWDMonitChannels(
elmot	1:d0dfbce63a89	1762	* ADC1, LL_ADC_AWD1,
elmot	1:d0dfbce63a89	1763	* __LL_ADC_ANALOGWD_CHANNEL_GROUP(LL_ADC_CHANNEL4, LL_ADC_GROUP_REGULAR))
elmot	1:d0dfbce63a89	1764	* @param __CHANNEL__ This parameter can be one of the following values:
elmot	1:d0dfbce63a89	1765	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	1766	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	1767	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	1768	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	1769	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	1770	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	1771	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	1772	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	1773	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	1774	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	1775	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	1776	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	1777	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	1778	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	1779	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	1780	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	1781	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	1782	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	1783	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	1784	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	1785	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	1786	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	1787	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	1788	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	1789	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	1790	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	1791	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	1792	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	1793	*
elmot	1:d0dfbce63a89	1794	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	1795	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	1796	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	1797	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	1798	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	1799	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	1800	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	1801	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).\n
elmot	1:d0dfbce63a89	1802	* (1, 2, 3, 4) For ADC channel read back from ADC register,
elmot	1:d0dfbce63a89	1803	* comparison with internal channel parameter to be done
elmot	1:d0dfbce63a89	1804	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
elmot	1:d0dfbce63a89	1805	* @param __GROUP__ This parameter can be one of the following values:
elmot	1:d0dfbce63a89	1806	* @arg @ref LL_ADC_GROUP_REGULAR
elmot	1:d0dfbce63a89	1807	* @arg @ref LL_ADC_GROUP_INJECTED
elmot	1:d0dfbce63a89	1808	* @arg @ref LL_ADC_GROUP_REGULAR_INJECTED
elmot	1:d0dfbce63a89	1809	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	1810	* @arg @ref LL_ADC_AWD_DISABLE
elmot	1:d0dfbce63a89	1811	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0)
elmot	1:d0dfbce63a89	1812	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0)
elmot	1:d0dfbce63a89	1813	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ
elmot	1:d0dfbce63a89	1814	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0)
elmot	1:d0dfbce63a89	1815	* @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0)
elmot	1:d0dfbce63a89	1816	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ
elmot	1:d0dfbce63a89	1817	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0)
elmot	1:d0dfbce63a89	1818	* @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0)
elmot	1:d0dfbce63a89	1819	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ
elmot	1:d0dfbce63a89	1820	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0)
elmot	1:d0dfbce63a89	1821	* @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0)
elmot	1:d0dfbce63a89	1822	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ
elmot	1:d0dfbce63a89	1823	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0)
elmot	1:d0dfbce63a89	1824	* @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0)
elmot	1:d0dfbce63a89	1825	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ
elmot	1:d0dfbce63a89	1826	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0)
elmot	1:d0dfbce63a89	1827	* @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0)
elmot	1:d0dfbce63a89	1828	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ
elmot	1:d0dfbce63a89	1829	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0)
elmot	1:d0dfbce63a89	1830	* @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0)
elmot	1:d0dfbce63a89	1831	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ
elmot	1:d0dfbce63a89	1832	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0)
elmot	1:d0dfbce63a89	1833	* @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0)
elmot	1:d0dfbce63a89	1834	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ
elmot	1:d0dfbce63a89	1835	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0)
elmot	1:d0dfbce63a89	1836	* @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0)
elmot	1:d0dfbce63a89	1837	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ
elmot	1:d0dfbce63a89	1838	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0)
elmot	1:d0dfbce63a89	1839	* @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0)
elmot	1:d0dfbce63a89	1840	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ
elmot	1:d0dfbce63a89	1841	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0)
elmot	1:d0dfbce63a89	1842	* @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0)
elmot	1:d0dfbce63a89	1843	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ
elmot	1:d0dfbce63a89	1844	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0)
elmot	1:d0dfbce63a89	1845	* @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0)
elmot	1:d0dfbce63a89	1846	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ
elmot	1:d0dfbce63a89	1847	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0)
elmot	1:d0dfbce63a89	1848	* @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0)
elmot	1:d0dfbce63a89	1849	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ
elmot	1:d0dfbce63a89	1850	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0)
elmot	1:d0dfbce63a89	1851	* @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0)
elmot	1:d0dfbce63a89	1852	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ
elmot	1:d0dfbce63a89	1853	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0)
elmot	1:d0dfbce63a89	1854	* @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0)
elmot	1:d0dfbce63a89	1855	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ
elmot	1:d0dfbce63a89	1856	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0)
elmot	1:d0dfbce63a89	1857	* @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0)
elmot	1:d0dfbce63a89	1858	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ
elmot	1:d0dfbce63a89	1859	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0)
elmot	1:d0dfbce63a89	1860	* @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0)
elmot	1:d0dfbce63a89	1861	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ
elmot	1:d0dfbce63a89	1862	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0)
elmot	1:d0dfbce63a89	1863	* @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0)
elmot	1:d0dfbce63a89	1864	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ
elmot	1:d0dfbce63a89	1865	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0)
elmot	1:d0dfbce63a89	1866	* @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0)
elmot	1:d0dfbce63a89	1867	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ
elmot	1:d0dfbce63a89	1868	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0)
elmot	1:d0dfbce63a89	1869	* @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0)
elmot	1:d0dfbce63a89	1870	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ
elmot	1:d0dfbce63a89	1871	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG (0)(1)
elmot	1:d0dfbce63a89	1872	* @arg @ref LL_ADC_AWD_CH_VREFINT_INJ (0)(1)
elmot	1:d0dfbce63a89	1873	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG_INJ (1)
elmot	1:d0dfbce63a89	1874	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG (0)(4)
elmot	1:d0dfbce63a89	1875	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_INJ (0)(4)
elmot	1:d0dfbce63a89	1876	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG_INJ (4)
elmot	1:d0dfbce63a89	1877	* @arg @ref LL_ADC_AWD_CH_VBAT_REG (0)(4)
elmot	1:d0dfbce63a89	1878	* @arg @ref LL_ADC_AWD_CH_VBAT_INJ (0)(4)
elmot	1:d0dfbce63a89	1879	* @arg @ref LL_ADC_AWD_CH_VBAT_REG_INJ (4)
elmot	1:d0dfbce63a89	1880	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_REG (0)(2)(5)
elmot	1:d0dfbce63a89	1881	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_INJ (0)(2)(5)
elmot	1:d0dfbce63a89	1882	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_REG_INJ (2)(5)
elmot	1:d0dfbce63a89	1883	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_REG (0)(2)(5)
elmot	1:d0dfbce63a89	1884	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_INJ (0)(2)(5)
elmot	1:d0dfbce63a89	1885	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_REG_INJ (2)(5)
elmot	1:d0dfbce63a89	1886	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_REG (0)(2)(6)
elmot	1:d0dfbce63a89	1887	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_INJ (0)(2)(6)
elmot	1:d0dfbce63a89	1888	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_REG_INJ (2)(6)
elmot	1:d0dfbce63a89	1889	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_REG (0)(2)(6)
elmot	1:d0dfbce63a89	1890	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_INJ (0)(2)(6)
elmot	1:d0dfbce63a89	1891	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_REG_INJ (2)(6)
elmot	1:d0dfbce63a89	1892	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC3_REG (0)(3)(6)
elmot	1:d0dfbce63a89	1893	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC3_INJ (0)(3)(6)
elmot	1:d0dfbce63a89	1894	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC3_REG_INJ (3)(6)
elmot	1:d0dfbce63a89	1895	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC3_REG (0)(3)(6)
elmot	1:d0dfbce63a89	1896	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC3_INJ (0)(3)(6)
elmot	1:d0dfbce63a89	1897	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC3_REG_INJ (3)(6)
elmot	1:d0dfbce63a89	1898	*
elmot	1:d0dfbce63a89	1899	* (0) On STM32L4, parameter available only on analog watchdog number: AWD1.\n
elmot	1:d0dfbce63a89	1900	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	1901	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	1902	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	1903	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.
elmot	1:d0dfbce63a89	1904	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	1905	* (6) On STM32L4, parameter available on devices with several ADC instances.
elmot	1:d0dfbce63a89	1906	*/
elmot	1:d0dfbce63a89	1907	#define __LL_ADC_ANALOGWD_CHANNEL_GROUP(__CHANNEL__, __GROUP__) \
elmot	1:d0dfbce63a89	1908	(((__GROUP__) == LL_ADC_GROUP_REGULAR) \
elmot	1:d0dfbce63a89	1909	? (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) \
elmot	1:d0dfbce63a89	1910	: \
elmot	1:d0dfbce63a89	1911	((__GROUP__) == LL_ADC_GROUP_INJECTED) \
elmot	1:d0dfbce63a89	1912	? (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1SGL) \
elmot	1:d0dfbce63a89	1913	: \
elmot	1:d0dfbce63a89	1914	(((__CHANNEL__) & ADC_CHANNEL_ID_MASK) \| ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL) \
elmot	1:d0dfbce63a89	1915	)
elmot	1:d0dfbce63a89	1916
elmot	1:d0dfbce63a89	1917	/**
elmot	1:d0dfbce63a89	1918	* @brief Helper macro to set the value of ADC analog watchdog threshold high
elmot	1:d0dfbce63a89	1919	* or low in function of ADC resolution, when ADC resolution is
elmot	1:d0dfbce63a89	1920	* different of 12 bits.
elmot	1:d0dfbce63a89	1921	* @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
elmot	1:d0dfbce63a89	1922	* or @ref LL_ADC_SetAnalogWDThresholds().
elmot	1:d0dfbce63a89	1923	* Example, with a ADC resolution of 8 bits, to set the value of
elmot	1:d0dfbce63a89	1924	* analog watchdog threshold high (on 8 bits):
elmot	1:d0dfbce63a89	1925	* LL_ADC_SetAnalogWDThresholds
elmot	1:d0dfbce63a89	1926	* (< ADCx param >,
elmot	1:d0dfbce63a89	1927	* __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(LL_ADC_RESOLUTION_8B, <threshold_value_8_bits>)
elmot	1:d0dfbce63a89	1928	* );
elmot	1:d0dfbce63a89	1929	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
elmot	1:d0dfbce63a89	1930	* @arg @ref LL_ADC_RESOLUTION_12B
elmot	1:d0dfbce63a89	1931	* @arg @ref LL_ADC_RESOLUTION_10B
elmot	1:d0dfbce63a89	1932	* @arg @ref LL_ADC_RESOLUTION_8B
elmot	1:d0dfbce63a89	1933	* @arg @ref LL_ADC_RESOLUTION_6B
elmot	1:d0dfbce63a89	1934	* @param __AWD_THRESHOLD__ Value between Min_Data=0x000 and Max_Data=0xFFF
elmot	1:d0dfbce63a89	1935	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
elmot	1:d0dfbce63a89	1936	*/
elmot	1:d0dfbce63a89	1937	#define __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD__) \
elmot	1:d0dfbce63a89	1938	((__AWD_THRESHOLD__) << ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U )))
elmot	1:d0dfbce63a89	1939
elmot	1:d0dfbce63a89	1940	/**
elmot	1:d0dfbce63a89	1941	* @brief Helper macro to get the value of ADC analog watchdog threshold high
elmot	1:d0dfbce63a89	1942	* or low in function of ADC resolution, when ADC resolution is
elmot	1:d0dfbce63a89	1943	* different of 12 bits.
elmot	1:d0dfbce63a89	1944	* @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
elmot	1:d0dfbce63a89	1945	* Example, with a ADC resolution of 8 bits, to get the value of
elmot	1:d0dfbce63a89	1946	* analog watchdog threshold high (on 8 bits):
elmot	1:d0dfbce63a89	1947	* < threshold_value_6_bits > = __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION
elmot	1:d0dfbce63a89	1948	* (LL_ADC_RESOLUTION_8B,
elmot	1:d0dfbce63a89	1949	* LL_ADC_GetAnalogWDThresholds(<ADCx param>, LL_ADC_AWD_THRESHOLD_HIGH)
elmot	1:d0dfbce63a89	1950	* );
elmot	1:d0dfbce63a89	1951	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
elmot	1:d0dfbce63a89	1952	* @arg @ref LL_ADC_RESOLUTION_12B
elmot	1:d0dfbce63a89	1953	* @arg @ref LL_ADC_RESOLUTION_10B
elmot	1:d0dfbce63a89	1954	* @arg @ref LL_ADC_RESOLUTION_8B
elmot	1:d0dfbce63a89	1955	* @arg @ref LL_ADC_RESOLUTION_6B
elmot	1:d0dfbce63a89	1956	* @param __AWD_THRESHOLD_12_BITS__ Value between Min_Data=0x000 and Max_Data=0xFFF
elmot	1:d0dfbce63a89	1957	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
elmot	1:d0dfbce63a89	1958	*/
elmot	1:d0dfbce63a89	1959	#define __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD_12_BITS__) \
elmot	1:d0dfbce63a89	1960	((__AWD_THRESHOLD_12_BITS__) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U )))
elmot	1:d0dfbce63a89	1961
elmot	1:d0dfbce63a89	1962	/**
elmot	1:d0dfbce63a89	1963	* @brief Helper macro to get the ADC analog watchdog threshold high
elmot	1:d0dfbce63a89	1964	* or low from raw value containing both thresholds concatenated.
elmot	1:d0dfbce63a89	1965	* @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
elmot	1:d0dfbce63a89	1966	* Example, to get analog watchdog threshold high from the register raw value:
elmot	1:d0dfbce63a89	1967	* __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(LL_ADC_AWD_THRESHOLD_HIGH, <raw_value_with_both_thresholds>);
elmot	1:d0dfbce63a89	1968	* @param __AWD_THRESHOLD_TYPE__ This parameter can be one of the following values:
elmot	1:d0dfbce63a89	1969	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
elmot	1:d0dfbce63a89	1970	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
elmot	1:d0dfbce63a89	1971	* @param __AWD_THRESHOLDS__ Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
elmot	1:d0dfbce63a89	1972	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
elmot	1:d0dfbce63a89	1973	*/
elmot	1:d0dfbce63a89	1974	#define __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(__AWD_THRESHOLD_TYPE__, __AWD_THRESHOLDS__) \
elmot	1:d0dfbce63a89	1975	(((__AWD_THRESHOLDS__) >> POSITION_VAL((__AWD_THRESHOLD_TYPE__))) & LL_ADC_AWD_THRESHOLD_LOW)
elmot	1:d0dfbce63a89	1976
elmot	1:d0dfbce63a89	1977	/**
elmot	1:d0dfbce63a89	1978	* @brief Helper macro to set the ADC calibration value with both single ended
elmot	1:d0dfbce63a89	1979	* and differential modes calibration factors concatenated.
elmot	1:d0dfbce63a89	1980	* @note To be used with function @ref LL_ADC_SetCalibrationFactor().
elmot	1:d0dfbce63a89	1981	* Example, to set calibration factors single ended to 0x55
elmot	1:d0dfbce63a89	1982	* and differential ended to 0x2A:
elmot	1:d0dfbce63a89	1983	* LL_ADC_SetCalibrationFactor(
elmot	1:d0dfbce63a89	1984	* ADC1,
elmot	1:d0dfbce63a89	1985	* __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(0x55, 0x2A))
elmot	1:d0dfbce63a89	1986	* @param __CALIB_FACTOR_SINGLE_ENDED__ Value between Min_Data=0x00 and Max_Data=0x7F
elmot	1:d0dfbce63a89	1987	* @param __CALIB_FACTOR_DIFFERENTIAL__ Value between Min_Data=0x00 and Max_Data=0x7F
elmot	1:d0dfbce63a89	1988	* @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
elmot	1:d0dfbce63a89	1989	*/
elmot	1:d0dfbce63a89	1990	#define __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(__CALIB_FACTOR_SINGLE_ENDED__, __CALIB_FACTOR_DIFFERENTIAL__) \
elmot	1:d0dfbce63a89	1991	(((__CALIB_FACTOR_DIFFERENTIAL__) << POSITION_VAL(ADC_CALFACT_CALFACT_D)) \| (__CALIB_FACTOR_SINGLE_ENDED__))
elmot	1:d0dfbce63a89	1992
elmot	1:d0dfbce63a89	1993	#if defined(ADC_MULTIMODE_SUPPORT)
elmot	1:d0dfbce63a89	1994	/**
elmot	1:d0dfbce63a89	1995	* @brief Helper macro to get the ADC multimode conversion data of ADC master
elmot	1:d0dfbce63a89	1996	* or ADC slave from raw value with both ADC conversion data concatenated.
elmot	1:d0dfbce63a89	1997	* @note This macro is intended to be used when multimode transfer by DMA
elmot	1:d0dfbce63a89	1998	* is enabled: refer to function @ref LL_ADC_SetMultiDMATransfer().
elmot	1:d0dfbce63a89	1999	* In this case the transferred data need to processed with this macro
elmot	1:d0dfbce63a89	2000	* to separate the conversion data of ADC master and ADC slave.
elmot	1:d0dfbce63a89	2001	* @param __ADC_MULTI_MASTER_SLAVE__ This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2002	* @arg @ref LL_ADC_MULTI_MASTER
elmot	1:d0dfbce63a89	2003	* @arg @ref LL_ADC_MULTI_SLAVE
elmot	1:d0dfbce63a89	2004	* @param __ADC_MULTI_CONV_DATA__ Value between Min_Data=0x000 and Max_Data=0xFFF
elmot	1:d0dfbce63a89	2005	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
elmot	1:d0dfbce63a89	2006	*/
elmot	1:d0dfbce63a89	2007	#define __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(__ADC_MULTI_MASTER_SLAVE__, __ADC_MULTI_CONV_DATA__) \
elmot	1:d0dfbce63a89	2008	(((__ADC_MULTI_CONV_DATA__) >> POSITION_VAL((__ADC_MULTI_MASTER_SLAVE__))) & ADC_CDR_RDATA_MST)
elmot	1:d0dfbce63a89	2009	#endif
elmot	1:d0dfbce63a89	2010
elmot	1:d0dfbce63a89	2011	/**
elmot	1:d0dfbce63a89	2012	* @brief Helper macro to select the ADC common instance
elmot	1:d0dfbce63a89	2013	* to which is belonging the selected ADC instance.
elmot	1:d0dfbce63a89	2014	* @note ADC common register instance can be used for:
elmot	1:d0dfbce63a89	2015	* - Set parameters common to several ADC instances
elmot	1:d0dfbce63a89	2016	* - Multimode (for devices with several ADC instances)
elmot	1:d0dfbce63a89	2017	* Refer to functions having argument "ADCxy_COMMON" as parameter.
elmot	1:d0dfbce63a89	2018	* @param __ADCx__ ADC instance
elmot	1:d0dfbce63a89	2019	* @retval ADC common register instance
elmot	1:d0dfbce63a89	2020	*/
elmot	1:d0dfbce63a89	2021	#if defined(ADC1) && defined(ADC2) && defined(ADC3)
elmot	1:d0dfbce63a89	2022	#define __LL_ADC_COMMON_INSTANCE(__ADCx__) \
elmot	1:d0dfbce63a89	2023	(ADC123_COMMON)
elmot	1:d0dfbce63a89	2024	#elif defined(ADC1) && defined(ADC2)
elmot	1:d0dfbce63a89	2025	#define __LL_ADC_COMMON_INSTANCE(__ADCx__) \
elmot	1:d0dfbce63a89	2026	(ADC12_COMMON)
elmot	1:d0dfbce63a89	2027	#else
elmot	1:d0dfbce63a89	2028	#define __LL_ADC_COMMON_INSTANCE(__ADCx__) \
elmot	1:d0dfbce63a89	2029	(ADC1_COMMON)
elmot	1:d0dfbce63a89	2030	#endif
elmot	1:d0dfbce63a89	2031
elmot	1:d0dfbce63a89	2032	/**
elmot	1:d0dfbce63a89	2033	* @brief Helper macro to check if all ADC instances sharing the same
elmot	1:d0dfbce63a89	2034	* ADC common instance are disabled.
elmot	1:d0dfbce63a89	2035	* @note This check is required by functions with setting conditioned to
elmot	1:d0dfbce63a89	2036	* ADC state:
elmot	1:d0dfbce63a89	2037	* All ADC instances of the ADC common group must be disabled.
elmot	1:d0dfbce63a89	2038	* Refer to functions having argument "ADCxy_COMMON" as parameter.
elmot	1:d0dfbce63a89	2039	* @note On devices with only 1 ADC common instance, parameter of this macro
elmot	1:d0dfbce63a89	2040	* is useless and can be ignored (parameter kept for compatibility
elmot	1:d0dfbce63a89	2041	* with devices featuring several ADC common instances).
elmot	1:d0dfbce63a89	2042	* @param __ADCXY_COMMON__ ADC common instance
elmot	1:d0dfbce63a89	2043	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	2044	* @retval Value "0" if all ADC instances sharing the same ADC common instance
elmot	1:d0dfbce63a89	2045	* are disabled.
elmot	1:d0dfbce63a89	2046	* Value "1" if at least one ADC instance sharing the same ADC common instance
elmot	1:d0dfbce63a89	2047	* is enabled.
elmot	1:d0dfbce63a89	2048	*/
elmot	1:d0dfbce63a89	2049	#if defined(ADC1) && defined(ADC2) && defined(ADC3)
elmot	1:d0dfbce63a89	2050	#define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \
elmot	1:d0dfbce63a89	2051	(LL_ADC_IsEnabled(ADC1) \| \
elmot	1:d0dfbce63a89	2052	LL_ADC_IsEnabled(ADC2) \| \
elmot	1:d0dfbce63a89	2053	LL_ADC_IsEnabled(ADC3) )
elmot	1:d0dfbce63a89	2054	#elif defined(ADC1) && defined(ADC2)
elmot	1:d0dfbce63a89	2055	#define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \
elmot	1:d0dfbce63a89	2056	(LL_ADC_IsEnabled(ADC1) \| \
elmot	1:d0dfbce63a89	2057	LL_ADC_IsEnabled(ADC2) )
elmot	1:d0dfbce63a89	2058	#else
elmot	1:d0dfbce63a89	2059	#define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \
elmot	1:d0dfbce63a89	2060	(LL_ADC_IsEnabled(ADC1))
elmot	1:d0dfbce63a89	2061	#endif
elmot	1:d0dfbce63a89	2062
elmot	1:d0dfbce63a89	2063	/**
elmot	1:d0dfbce63a89	2064	* @brief Helper macro to define the ADC conversion data full-scale digital
elmot	1:d0dfbce63a89	2065	* value corresponding to the selected ADC resolution.
elmot	1:d0dfbce63a89	2066	* @note ADC conversion data full-scale corresponds to voltage range
elmot	1:d0dfbce63a89	2067	* determined by analog voltage references Vref+ and Vref-
elmot	1:d0dfbce63a89	2068	* (refer to reference manual).
elmot	1:d0dfbce63a89	2069	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2070	* @arg @ref LL_ADC_RESOLUTION_12B
elmot	1:d0dfbce63a89	2071	* @arg @ref LL_ADC_RESOLUTION_10B
elmot	1:d0dfbce63a89	2072	* @arg @ref LL_ADC_RESOLUTION_8B
elmot	1:d0dfbce63a89	2073	* @arg @ref LL_ADC_RESOLUTION_6B
elmot	1:d0dfbce63a89	2074	* @retval ADC conversion data equivalent voltage value (unit: mVolt)
elmot	1:d0dfbce63a89	2075	*/
elmot	1:d0dfbce63a89	2076	#define __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \
elmot	1:d0dfbce63a89	2077	(((uint32_t)0xFFFU) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U)))
elmot	1:d0dfbce63a89	2078
elmot	1:d0dfbce63a89	2079	/**
elmot	1:d0dfbce63a89	2080	* @brief Helper macro to convert the ADC conversion data from
elmot	1:d0dfbce63a89	2081	* a resolution to another resolution.
elmot	1:d0dfbce63a89	2082	* @param __DATA__ ADC conversion data to be converted
elmot	1:d0dfbce63a89	2083	* @param __ADC_RESOLUTION_CURRENT__ Resolution of to the data to be converted
elmot	1:d0dfbce63a89	2084	* This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2085	* @arg @ref LL_ADC_RESOLUTION_12B
elmot	1:d0dfbce63a89	2086	* @arg @ref LL_ADC_RESOLUTION_10B
elmot	1:d0dfbce63a89	2087	* @arg @ref LL_ADC_RESOLUTION_8B
elmot	1:d0dfbce63a89	2088	* @arg @ref LL_ADC_RESOLUTION_6B
elmot	1:d0dfbce63a89	2089	* @param __ADC_RESOLUTION_TARGET__ Resolution of the data after conversion
elmot	1:d0dfbce63a89	2090	* This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2091	* @arg @ref LL_ADC_RESOLUTION_12B
elmot	1:d0dfbce63a89	2092	* @arg @ref LL_ADC_RESOLUTION_10B
elmot	1:d0dfbce63a89	2093	* @arg @ref LL_ADC_RESOLUTION_8B
elmot	1:d0dfbce63a89	2094	* @arg @ref LL_ADC_RESOLUTION_6B
elmot	1:d0dfbce63a89	2095	* @retval ADC conversion data to the requested resolution
elmot	1:d0dfbce63a89	2096	*/
elmot	1:d0dfbce63a89	2097	#define __LL_ADC_CONVERT_DATA_RESOLUTION(__DATA__,\
elmot	1:d0dfbce63a89	2098	__ADC_RESOLUTION_CURRENT__,\
elmot	1:d0dfbce63a89	2099	__ADC_RESOLUTION_TARGET__) \
elmot	1:d0dfbce63a89	2100	(((__DATA__) \
elmot	1:d0dfbce63a89	2101	<< ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U))) \
elmot	1:d0dfbce63a89	2102	>> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U)) \
elmot	1:d0dfbce63a89	2103	)
elmot	1:d0dfbce63a89	2104
elmot	1:d0dfbce63a89	2105	/**
elmot	1:d0dfbce63a89	2106	* @brief Helper macro to calculate the voltage (unit: mVolt)
elmot	1:d0dfbce63a89	2107	* corresponding to a ADC conversion data (unit: digital value).
elmot	1:d0dfbce63a89	2108	* @note Analog reference voltage (Vref+) must be either known from
elmot	1:d0dfbce63a89	2109	* user board environment or can be calculated using ADC measurement
elmot	1:d0dfbce63a89	2110	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
elmot	1:d0dfbce63a89	2111	* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
elmot	1:d0dfbce63a89	2112	* @param __ADC_DATA__ ADC conversion data (resolution 12 bits)
elmot	1:d0dfbce63a89	2113	* (unit: digital value).
elmot	1:d0dfbce63a89	2114	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2115	* @arg @ref LL_ADC_RESOLUTION_12B
elmot	1:d0dfbce63a89	2116	* @arg @ref LL_ADC_RESOLUTION_10B
elmot	1:d0dfbce63a89	2117	* @arg @ref LL_ADC_RESOLUTION_8B
elmot	1:d0dfbce63a89	2118	* @arg @ref LL_ADC_RESOLUTION_6B
elmot	1:d0dfbce63a89	2119	* @retval ADC conversion data equivalent voltage value (unit: mVolt)
elmot	1:d0dfbce63a89	2120	*/
elmot	1:d0dfbce63a89	2121	#define __LL_ADC_CALC_DATA_TO_VOLTAGE(__VREFANALOG_VOLTAGE__,\
elmot	1:d0dfbce63a89	2122	__ADC_DATA__,\
elmot	1:d0dfbce63a89	2123	__ADC_RESOLUTION__) \
elmot	1:d0dfbce63a89	2124	((__ADC_DATA__) * (__VREFANALOG_VOLTAGE__) \
elmot	1:d0dfbce63a89	2125	/ __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \
elmot	1:d0dfbce63a89	2126	)
elmot	1:d0dfbce63a89	2127
elmot	1:d0dfbce63a89	2128	/* Legacy define */
elmot	1:d0dfbce63a89	2129	#define __LL_ADC_CALC_DATA_VOLTAGE() __LL_ADC_CALC_DATA_TO_VOLTAGE()
elmot	1:d0dfbce63a89	2130
elmot	1:d0dfbce63a89	2131	/**
elmot	1:d0dfbce63a89	2132	* @brief Helper macro to calculate analog reference voltage (Vref+)
elmot	1:d0dfbce63a89	2133	* (unit: mVolt) from ADC conversion data of internal voltage
elmot	1:d0dfbce63a89	2134	* reference VrefInt.
elmot	1:d0dfbce63a89	2135	* @note Computation is using VrefInt calibration value
elmot	1:d0dfbce63a89	2136	* stored in system memory for each device during production.
elmot	1:d0dfbce63a89	2137	* @note This voltage depends on user board environment: voltage level
elmot	1:d0dfbce63a89	2138	* connected to pin Vref+.
elmot	1:d0dfbce63a89	2139	* On devices with small package, the pin Vref+ is not present
elmot	1:d0dfbce63a89	2140	* and internally bonded to pin Vdda.
elmot	1:d0dfbce63a89	2141	* @note On this STM32 serie, calibration data of internal voltage reference
elmot	1:d0dfbce63a89	2142	* VrefInt corresponds to a resolution of 12 bits,
elmot	1:d0dfbce63a89	2143	* this is the recommended ADC resolution to convert voltage of
elmot	1:d0dfbce63a89	2144	* internal voltage reference VrefInt.
elmot	1:d0dfbce63a89	2145	* Otherwise, this macro performs the processing to scale
elmot	1:d0dfbce63a89	2146	* ADC conversion data to 12 bits.
elmot	1:d0dfbce63a89	2147	* @param __VREFINT_ADC_DATA__: ADC conversion data (resolution 12 bits)
elmot	1:d0dfbce63a89	2148	* of internal voltage reference VrefInt (unit: digital value).
elmot	1:d0dfbce63a89	2149	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2150	* @arg @ref LL_ADC_RESOLUTION_12B
elmot	1:d0dfbce63a89	2151	* @arg @ref LL_ADC_RESOLUTION_10B
elmot	1:d0dfbce63a89	2152	* @arg @ref LL_ADC_RESOLUTION_8B
elmot	1:d0dfbce63a89	2153	* @arg @ref LL_ADC_RESOLUTION_6B
elmot	1:d0dfbce63a89	2154	* @retval Analog reference voltage (unit: mV)
elmot	1:d0dfbce63a89	2155	*/
elmot	1:d0dfbce63a89	2156	#define __LL_ADC_CALC_VREFANALOG_VOLTAGE(__VREFINT_ADC_DATA__,\
elmot	1:d0dfbce63a89	2157	__ADC_RESOLUTION__) \
elmot	1:d0dfbce63a89	2158	(((uint32_t)(VREFINT_CAL_ADDR) VREFINT_CAL_VREF) \
elmot	1:d0dfbce63a89	2159	/ __LL_ADC_CONVERT_DATA_RESOLUTION((__VREFINT_ADC_DATA__), \
elmot	1:d0dfbce63a89	2160	(__ADC_RESOLUTION__), \
elmot	1:d0dfbce63a89	2161	LL_ADC_RESOLUTION_12B) \
elmot	1:d0dfbce63a89	2162	)
elmot	1:d0dfbce63a89	2163
elmot	1:d0dfbce63a89	2164	/**
elmot	1:d0dfbce63a89	2165	* @brief Helper macro to calculate the temperature (unit: degree Celsius)
elmot	1:d0dfbce63a89	2166	* from ADC conversion data of internal temperature sensor.
elmot	1:d0dfbce63a89	2167	* @note Computation is using temperature sensor calibration values
elmot	1:d0dfbce63a89	2168	* stored in system memory for each device during production.
elmot	1:d0dfbce63a89	2169	* @note Calculation formula:
elmot	1:d0dfbce63a89	2170	* Temperature = ((TS_ADC_DATA - TS_CAL1)
elmot	1:d0dfbce63a89	2171	* * (TS_CAL2_TEMP - TS_CAL1_TEMP))
elmot	1:d0dfbce63a89	2172	* / (TS_CAL2 - TS_CAL1) + TS_CAL1_TEMP
elmot	1:d0dfbce63a89	2173	* with TS_ADC_DATA = temperature sensor raw data measured by ADC
elmot	1:d0dfbce63a89	2174	* Avg_Slope = (TS_CAL2 - TS_CAL1)
elmot	1:d0dfbce63a89	2175	* / (TS_CAL2_TEMP - TS_CAL1_TEMP)
elmot	1:d0dfbce63a89	2176	* TS_CAL1 = equivalent TS_ADC_DATA at temperature
elmot	1:d0dfbce63a89	2177	* TEMP_DEGC_CAL1 (calibrated in factory)
elmot	1:d0dfbce63a89	2178	* TS_CAL2 = equivalent TS_ADC_DATA at temperature
elmot	1:d0dfbce63a89	2179	* TEMP_DEGC_CAL2 (calibrated in factory)
elmot	1:d0dfbce63a89	2180	* Caution: Calculation relevancy under reserve that calibration
elmot	1:d0dfbce63a89	2181	* parameters are correct (address and data).
elmot	1:d0dfbce63a89	2182	* To calculate temperature using temperature sensor
elmot	1:d0dfbce63a89	2183	* datasheet typical values (generic values less, therefore
elmot	1:d0dfbce63a89	2184	* less accurate than calibrated values),
elmot	1:d0dfbce63a89	2185	* use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS().
elmot	1:d0dfbce63a89	2186	* @note As calculation input, the analog reference voltage (Vref+) must be
elmot	1:d0dfbce63a89	2187	* defined as it impacts the ADC LSB equivalent voltage.
elmot	1:d0dfbce63a89	2188	* @note Analog reference voltage (Vref+) must be either known from
elmot	1:d0dfbce63a89	2189	* user board environment or can be calculated using ADC measurement
elmot	1:d0dfbce63a89	2190	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
elmot	1:d0dfbce63a89	2191	* @note On this STM32 serie, calibration data of temperature sensor
elmot	1:d0dfbce63a89	2192	* corresponds to a resolution of 12 bits,
elmot	1:d0dfbce63a89	2193	* this is the recommended ADC resolution to convert voltage of
elmot	1:d0dfbce63a89	2194	* temperature sensor.
elmot	1:d0dfbce63a89	2195	* Otherwise, this macro performs the processing to scale
elmot	1:d0dfbce63a89	2196	* ADC conversion data to 12 bits.
elmot	1:d0dfbce63a89	2197	* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
elmot	1:d0dfbce63a89	2198	* @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal
elmot	1:d0dfbce63a89	2199	* temperature sensor (unit: digital value).
elmot	1:d0dfbce63a89	2200	* @param __ADC_RESOLUTION__ ADC resolution at which internal temperature
elmot	1:d0dfbce63a89	2201	* sensor voltage has been measured.
elmot	1:d0dfbce63a89	2202	* This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2203	* @arg @ref LL_ADC_RESOLUTION_12B
elmot	1:d0dfbce63a89	2204	* @arg @ref LL_ADC_RESOLUTION_10B
elmot	1:d0dfbce63a89	2205	* @arg @ref LL_ADC_RESOLUTION_8B
elmot	1:d0dfbce63a89	2206	* @arg @ref LL_ADC_RESOLUTION_6B
elmot	1:d0dfbce63a89	2207	* @retval Temperature (unit: degree Celsius)
elmot	1:d0dfbce63a89	2208	*/
elmot	1:d0dfbce63a89	2209	#define __LL_ADC_CALC_TEMPERATURE(__VREFANALOG_VOLTAGE__,\
elmot	1:d0dfbce63a89	2210	__TEMPSENSOR_ADC_DATA__,\
elmot	1:d0dfbce63a89	2211	__ADC_RESOLUTION__) \
elmot	1:d0dfbce63a89	2212	(((( ((int32_t)((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__), \
elmot	1:d0dfbce63a89	2213	(__ADC_RESOLUTION__), \
elmot	1:d0dfbce63a89	2214	LL_ADC_RESOLUTION_12B) \
elmot	1:d0dfbce63a89	2215	* (__VREFANALOG_VOLTAGE__)) \
elmot	1:d0dfbce63a89	2216	/ TEMPSENSOR_CAL_VREFANALOG) \
elmot	1:d0dfbce63a89	2217	- (int32_t) *TEMPSENSOR_CAL1_ADDR) \
elmot	1:d0dfbce63a89	2218	) * (int32_t)(TEMPSENSOR_CAL2_TEMP - TEMPSENSOR_CAL1_TEMP) \
elmot	1:d0dfbce63a89	2219	) / (int32_t)((int32_t)TEMPSENSOR_CAL2_ADDR - (int32_t)TEMPSENSOR_CAL1_ADDR) \
elmot	1:d0dfbce63a89	2220	) + TEMPSENSOR_CAL1_TEMP \
elmot	1:d0dfbce63a89	2221	)
elmot	1:d0dfbce63a89	2222
elmot	1:d0dfbce63a89	2223	/**
elmot	1:d0dfbce63a89	2224	* @brief Helper macro to calculate the temperature (unit: degree Celsius)
elmot	1:d0dfbce63a89	2225	* from ADC conversion data of internal temperature sensor.
elmot	1:d0dfbce63a89	2226	* @note Computation is using temperature sensor typical values
elmot	1:d0dfbce63a89	2227	* (refer to device datasheet).
elmot	1:d0dfbce63a89	2228	* @note Calculation formula:
elmot	1:d0dfbce63a89	2229	* Temperature = (TS_TYP_CALx_VOLT(uV) - TS_ADC_DATA * Conversion_uV)
elmot	1:d0dfbce63a89	2230	* / Avg_Slope + CALx_TEMP
elmot	1:d0dfbce63a89	2231	* with TS_ADC_DATA = temperature sensor raw data measured by ADC
elmot	1:d0dfbce63a89	2232	* (unit: digital value)
elmot	1:d0dfbce63a89	2233	* Avg_Slope = temperature sensor slope
elmot	1:d0dfbce63a89	2234	* (unit: uV/Degree Celsius)
elmot	1:d0dfbce63a89	2235	* TS_TYP_CALx_VOLT = temperature sensor digital value at
elmot	1:d0dfbce63a89	2236	* temperature CALx_TEMP (unit: mV)
elmot	1:d0dfbce63a89	2237	* Caution: Calculation relevancy under reserve the temperature sensor
elmot	1:d0dfbce63a89	2238	* of the current device has characteristics in line with
elmot	1:d0dfbce63a89	2239	* datasheet typical values.
elmot	1:d0dfbce63a89	2240	* If temperature sensor calibration values are available on
elmot	1:d0dfbce63a89	2241	* on this device (presence of macro __LL_ADC_CALC_TEMPERATURE()),
elmot	1:d0dfbce63a89	2242	* temperature calculation will be more accurate using
elmot	1:d0dfbce63a89	2243	* helper macro @ref __LL_ADC_CALC_TEMPERATURE().
elmot	1:d0dfbce63a89	2244	* @note As calculation input, the analog reference voltage (Vref+) must be
elmot	1:d0dfbce63a89	2245	* defined as it impacts the ADC LSB equivalent voltage.
elmot	1:d0dfbce63a89	2246	* @note Analog reference voltage (Vref+) must be either known from
elmot	1:d0dfbce63a89	2247	* user board environment or can be calculated using ADC measurement
elmot	1:d0dfbce63a89	2248	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
elmot	1:d0dfbce63a89	2249	* @note ADC measurement data must correspond to a resolution of 12bits
elmot	1:d0dfbce63a89	2250	* (full scale digital value 4095). If not the case, the data must be
elmot	1:d0dfbce63a89	2251	* preliminarily rescaled to an equivalent resolution of 12 bits.
elmot	1:d0dfbce63a89	2252	* @param __TEMPSENSOR_TYP_AVGSLOPE__ Device datasheet data: Temperature sensor slope typical value (unit: uV/DegCelsius).
elmot	1:d0dfbce63a89	2253	* On STM32L4, refer to device datasheet parameter "Avg_Slope".
elmot	1:d0dfbce63a89	2254	* @param __TEMPSENSOR_TYP_CALX_V__ Device datasheet data: Temperature sensor voltage typical value (at temperature and Vref+ defined in parameters below) (unit: mV).
elmot	1:d0dfbce63a89	2255	* On STM32L4, refer to device datasheet parameter "V30" (corresponding to TS_CAL1).
elmot	1:d0dfbce63a89	2256	* @param __TEMPSENSOR_CALX_TEMP__ Device datasheet data: Temperature at which temperature sensor voltage (see parameter above) is corresponding (unit: mV)
elmot	1:d0dfbce63a89	2257	* @param __VREFANALOG_VOLTAGE__ Analog voltage reference (Vref+) voltage (unit: mV)
elmot	1:d0dfbce63a89	2258	* @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal temperature sensor (unit: digital value).
elmot	1:d0dfbce63a89	2259	* @param __ADC_RESOLUTION__ ADC resolution at which internal temperature sensor voltage has been measured.
elmot	1:d0dfbce63a89	2260	* This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2261	* @arg @ref LL_ADC_RESOLUTION_12B
elmot	1:d0dfbce63a89	2262	* @arg @ref LL_ADC_RESOLUTION_10B
elmot	1:d0dfbce63a89	2263	* @arg @ref LL_ADC_RESOLUTION_8B
elmot	1:d0dfbce63a89	2264	* @arg @ref LL_ADC_RESOLUTION_6B
elmot	1:d0dfbce63a89	2265	* @retval Temperature (unit: degree Celsius)
elmot	1:d0dfbce63a89	2266	*/
elmot	1:d0dfbce63a89	2267	#define __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(__TEMPSENSOR_TYP_AVGSLOPE__,\
elmot	1:d0dfbce63a89	2268	__TEMPSENSOR_TYP_CALX_V__,\
elmot	1:d0dfbce63a89	2269	__TEMPSENSOR_CALX_TEMP__,\
elmot	1:d0dfbce63a89	2270	__VREFANALOG_VOLTAGE__,\
elmot	1:d0dfbce63a89	2271	__TEMPSENSOR_ADC_DATA__,\
elmot	1:d0dfbce63a89	2272	__ADC_RESOLUTION__) \
elmot	1:d0dfbce63a89	2273	((( ( \
elmot	1:d0dfbce63a89	2274	(int32_t)((((__TEMPSENSOR_ADC_DATA__) * (__VREFANALOG_VOLTAGE__)) \
elmot	1:d0dfbce63a89	2275	/ __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__)) \
elmot	1:d0dfbce63a89	2276	* 1000) \
elmot	1:d0dfbce63a89	2277	- \
elmot	1:d0dfbce63a89	2278	(int32_t)(((__TEMPSENSOR_TYP_CALX_V__)) \
elmot	1:d0dfbce63a89	2279	* 1000) \
elmot	1:d0dfbce63a89	2280	) \
elmot	1:d0dfbce63a89	2281	) / (__TEMPSENSOR_TYP_AVGSLOPE__) \
elmot	1:d0dfbce63a89	2282	) + (__TEMPSENSOR_CALX_TEMP__) \
elmot	1:d0dfbce63a89	2283	)
elmot	1:d0dfbce63a89	2284
elmot	1:d0dfbce63a89	2285	/**
elmot	1:d0dfbce63a89	2286	* @}
elmot	1:d0dfbce63a89	2287	*/
elmot	1:d0dfbce63a89	2288
elmot	1:d0dfbce63a89	2289	/**
elmot	1:d0dfbce63a89	2290	* @}
elmot	1:d0dfbce63a89	2291	*/
elmot	1:d0dfbce63a89	2292
elmot	1:d0dfbce63a89	2293
elmot	1:d0dfbce63a89	2294	/* Exported functions --------------------------------------------------------*/
elmot	1:d0dfbce63a89	2295	/** @defgroup ADC_LL_Exported_Functions ADC Exported Functions
elmot	1:d0dfbce63a89	2296	* @{
elmot	1:d0dfbce63a89	2297	*/
elmot	1:d0dfbce63a89	2298
elmot	1:d0dfbce63a89	2299	/** @defgroup ADC_LL_EF_DMA_Management ADC DMA management
elmot	1:d0dfbce63a89	2300	* @{
elmot	1:d0dfbce63a89	2301	*/
elmot	1:d0dfbce63a89	2302	/* Note: LL ADC functions to set DMA transfer are located into sections of */
elmot	1:d0dfbce63a89	2303	/* configuration of ADC instance, groups and multimode (if available): */
elmot	1:d0dfbce63a89	2304	/* @ref LL_ADC_REG_SetDMATransfer(), ... */
elmot	1:d0dfbce63a89	2305
elmot	1:d0dfbce63a89	2306	/**
elmot	1:d0dfbce63a89	2307	* @brief Function to help to configure DMA transfer from ADC: retrieve the
elmot	1:d0dfbce63a89	2308	* ADC register address from ADC instance and a list of ADC registers
elmot	1:d0dfbce63a89	2309	* intended to be used (most commonly) with DMA transfer.
elmot	1:d0dfbce63a89	2310	* @note These ADC registers are data registers:
elmot	1:d0dfbce63a89	2311	* when ADC conversion data is available in ADC data registers,
elmot	1:d0dfbce63a89	2312	* ADC generates a DMA transfer request.
elmot	1:d0dfbce63a89	2313	* @note This macro is intended to be used with LL DMA driver, refer to
elmot	1:d0dfbce63a89	2314	* function "LL_DMA_ConfigAddresses()".
elmot	1:d0dfbce63a89	2315	* Example:
elmot	1:d0dfbce63a89	2316	* LL_DMA_ConfigAddresses(DMA1,
elmot	1:d0dfbce63a89	2317	* LL_DMA_CHANNEL_1,
elmot	1:d0dfbce63a89	2318	* LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA),
elmot	1:d0dfbce63a89	2319	* (uint32_t)&< array or variable >,
elmot	1:d0dfbce63a89	2320	* LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
elmot	1:d0dfbce63a89	2321	* @note For devices with several ADC: in multimode, some devices
elmot	1:d0dfbce63a89	2322	* use a different data register outside of ADC instance scope
elmot	1:d0dfbce63a89	2323	* (common data register). This macro manages this register difference,
elmot	1:d0dfbce63a89	2324	* only ADC instance has to be set as parameter.
elmot	1:d0dfbce63a89	2325	* @rmtoll DR RDATA LL_ADC_DMA_GetRegAddr\n
elmot	1:d0dfbce63a89	2326	* CDR RDATA_MST LL_ADC_DMA_GetRegAddr\n
elmot	1:d0dfbce63a89	2327	* CDR RDATA_SLV LL_ADC_DMA_GetRegAddr
elmot	1:d0dfbce63a89	2328	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	2329	* @param Register This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2330	* @arg @ref LL_ADC_DMA_REG_REGULAR_DATA
elmot	1:d0dfbce63a89	2331	* @arg @ref LL_ADC_DMA_REG_REGULAR_DATA_MULTI (1)
elmot	1:d0dfbce63a89	2332	*
elmot	1:d0dfbce63a89	2333	* (1) Available on devices with several ADC instances.
elmot	1:d0dfbce63a89	2334	* @retval ADC register address
elmot	1:d0dfbce63a89	2335	*/
elmot	1:d0dfbce63a89	2336	#if defined(ADC_MULTIMODE_SUPPORT)
elmot	1:d0dfbce63a89	2337	__STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register)
elmot	1:d0dfbce63a89	2338	{
elmot	1:d0dfbce63a89	2339	register uint32_t data_reg_addr = 0U;
elmot	1:d0dfbce63a89	2340
elmot	1:d0dfbce63a89	2341	if (Register == LL_ADC_DMA_REG_REGULAR_DATA)
elmot	1:d0dfbce63a89	2342	{
elmot	1:d0dfbce63a89	2343	/* Retrieve address of register DR */
elmot	1:d0dfbce63a89	2344	data_reg_addr = (uint32_t)&(ADCx->DR);
elmot	1:d0dfbce63a89	2345	}
elmot	1:d0dfbce63a89	2346	else /* (Register == LL_ADC_DMA_REG_REGULAR_DATA_MULTI) */
elmot	1:d0dfbce63a89	2347	{
elmot	1:d0dfbce63a89	2348	/* Retrieve address of register CDR */
elmot	1:d0dfbce63a89	2349	data_reg_addr = (uint32_t)&((__LL_ADC_COMMON_INSTANCE(ADCx))->CDR);
elmot	1:d0dfbce63a89	2350	}
elmot	1:d0dfbce63a89	2351
elmot	1:d0dfbce63a89	2352	return data_reg_addr;
elmot	1:d0dfbce63a89	2353	}
elmot	1:d0dfbce63a89	2354	#else
elmot	1:d0dfbce63a89	2355	__STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register)
elmot	1:d0dfbce63a89	2356	{
elmot	1:d0dfbce63a89	2357	/* Retrieve address of register DR */
elmot	1:d0dfbce63a89	2358	return (uint32_t)&(ADCx->DR);
elmot	1:d0dfbce63a89	2359	}
elmot	1:d0dfbce63a89	2360	#endif
elmot	1:d0dfbce63a89	2361
elmot	1:d0dfbce63a89	2362	/**
elmot	1:d0dfbce63a89	2363	* @}
elmot	1:d0dfbce63a89	2364	*/
elmot	1:d0dfbce63a89	2365
elmot	1:d0dfbce63a89	2366	/** @defgroup ADC_LL_EF_Configuration_ADC_Common Configuration of ADC hierarchical scope: common to several ADC instances
elmot	1:d0dfbce63a89	2367	* @{
elmot	1:d0dfbce63a89	2368	*/
elmot	1:d0dfbce63a89	2369
elmot	1:d0dfbce63a89	2370	/**
elmot	1:d0dfbce63a89	2371	* @brief Set parameter common to several ADC: Clock source and prescaler.
elmot	1:d0dfbce63a89	2372	* @note On this STM32 serie, if ADC group injected is used, some
elmot	1:d0dfbce63a89	2373	* clock ratio constraints between ADC clock and AHB clock
elmot	1:d0dfbce63a89	2374	* must be respected.
elmot	1:d0dfbce63a89	2375	* Refer to reference manual.
elmot	1:d0dfbce63a89	2376	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	2377	* ADC state:
elmot	1:d0dfbce63a89	2378	* All ADC instances of the ADC common group must be disabled.
elmot	1:d0dfbce63a89	2379	* This check can be done with function @ref LL_ADC_IsEnabled() for each
elmot	1:d0dfbce63a89	2380	* ADC instance or by using helper macro helper macro
elmot	1:d0dfbce63a89	2381	* @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
elmot	1:d0dfbce63a89	2382	* @rmtoll CCR CKMODE LL_ADC_SetCommonClock\n
elmot	1:d0dfbce63a89	2383	* CCR PRESC LL_ADC_SetCommonClock
elmot	1:d0dfbce63a89	2384	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	2385	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	2386	* @param CommonClock This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2387	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1
elmot	1:d0dfbce63a89	2388	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
elmot	1:d0dfbce63a89	2389	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
elmot	1:d0dfbce63a89	2390	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV1
elmot	1:d0dfbce63a89	2391	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV2
elmot	1:d0dfbce63a89	2392	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV4
elmot	1:d0dfbce63a89	2393	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV6
elmot	1:d0dfbce63a89	2394	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV8
elmot	1:d0dfbce63a89	2395	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV10
elmot	1:d0dfbce63a89	2396	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV12
elmot	1:d0dfbce63a89	2397	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV16
elmot	1:d0dfbce63a89	2398	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV32
elmot	1:d0dfbce63a89	2399	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV64
elmot	1:d0dfbce63a89	2400	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV128
elmot	1:d0dfbce63a89	2401	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV256
elmot	1:d0dfbce63a89	2402	* @retval None
elmot	1:d0dfbce63a89	2403	*/
elmot	1:d0dfbce63a89	2404	__STATIC_INLINE void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock)
elmot	1:d0dfbce63a89	2405	{
elmot	1:d0dfbce63a89	2406	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_CKMODE \| ADC_CCR_PRESC, CommonClock);
elmot	1:d0dfbce63a89	2407	}
elmot	1:d0dfbce63a89	2408
elmot	1:d0dfbce63a89	2409	/**
elmot	1:d0dfbce63a89	2410	* @brief Get parameter common to several ADC: Clock source and prescaler.
elmot	1:d0dfbce63a89	2411	* @rmtoll CCR CKMODE LL_ADC_GetCommonClock\n
elmot	1:d0dfbce63a89	2412	* CCR PRESC LL_ADC_GetCommonClock
elmot	1:d0dfbce63a89	2413	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	2414	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	2415	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	2416	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1
elmot	1:d0dfbce63a89	2417	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
elmot	1:d0dfbce63a89	2418	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
elmot	1:d0dfbce63a89	2419	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV1
elmot	1:d0dfbce63a89	2420	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV2
elmot	1:d0dfbce63a89	2421	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV4
elmot	1:d0dfbce63a89	2422	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV6
elmot	1:d0dfbce63a89	2423	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV8
elmot	1:d0dfbce63a89	2424	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV10
elmot	1:d0dfbce63a89	2425	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV12
elmot	1:d0dfbce63a89	2426	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV16
elmot	1:d0dfbce63a89	2427	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV32
elmot	1:d0dfbce63a89	2428	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV64
elmot	1:d0dfbce63a89	2429	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV128
elmot	1:d0dfbce63a89	2430	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV256
elmot	1:d0dfbce63a89	2431	*/
elmot	1:d0dfbce63a89	2432	__STATIC_INLINE uint32_t LL_ADC_GetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	2433	{
elmot	1:d0dfbce63a89	2434	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_CKMODE \| ADC_CCR_PRESC));
elmot	1:d0dfbce63a89	2435	}
elmot	1:d0dfbce63a89	2436
elmot	1:d0dfbce63a89	2437	/**
elmot	1:d0dfbce63a89	2438	* @brief Set parameter common to several ADC: measurement path to internal
elmot	1:d0dfbce63a89	2439	* channels (VrefInt, temperature sensor, ...).
elmot	1:d0dfbce63a89	2440	* @note One or several values can be selected.
elmot	1:d0dfbce63a89	2441	* Example: (LL_ADC_PATH_INTERNAL_VREFINT \|
elmot	1:d0dfbce63a89	2442	* LL_ADC_PATH_INTERNAL_TEMPSENSOR)
elmot	1:d0dfbce63a89	2443	* @note Stabilization time of measurement path to internal channel:
elmot	1:d0dfbce63a89	2444	* After enabling internal paths, before starting ADC conversion,
elmot	1:d0dfbce63a89	2445	* a delay is required for internal voltage reference and
elmot	1:d0dfbce63a89	2446	* temperature sensor stabilization time.
elmot	1:d0dfbce63a89	2447	* Refer to device datasheet.
elmot	1:d0dfbce63a89	2448	* Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US.
elmot	1:d0dfbce63a89	2449	* Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US.
elmot	1:d0dfbce63a89	2450	* @note ADC internal channel sampling time constraint:
elmot	1:d0dfbce63a89	2451	* For ADC conversion of internal channels,
elmot	1:d0dfbce63a89	2452	* a sampling time minimum value is required.
elmot	1:d0dfbce63a89	2453	* Refer to device datasheet.
elmot	1:d0dfbce63a89	2454	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	2455	* ADC state:
elmot	1:d0dfbce63a89	2456	* All ADC instances of the ADC common group must be disabled.
elmot	1:d0dfbce63a89	2457	* This check can be done with function @ref LL_ADC_IsEnabled() for each
elmot	1:d0dfbce63a89	2458	* ADC instance or by using helper macro helper macro
elmot	1:d0dfbce63a89	2459	* @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
elmot	1:d0dfbce63a89	2460	* @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalCh\n
elmot	1:d0dfbce63a89	2461	* CCR TSEN LL_ADC_SetCommonPathInternalCh\n
elmot	1:d0dfbce63a89	2462	* CCR VBATEN LL_ADC_SetCommonPathInternalCh
elmot	1:d0dfbce63a89	2463	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	2464	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	2465	* @param PathInternal This parameter can be a combination of the following values:
elmot	1:d0dfbce63a89	2466	* @arg @ref LL_ADC_PATH_INTERNAL_NONE
elmot	1:d0dfbce63a89	2467	* @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
elmot	1:d0dfbce63a89	2468	* @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
elmot	1:d0dfbce63a89	2469	* @arg @ref LL_ADC_PATH_INTERNAL_VBAT
elmot	1:d0dfbce63a89	2470	* @retval None
elmot	1:d0dfbce63a89	2471	*/
elmot	1:d0dfbce63a89	2472	__STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal)
elmot	1:d0dfbce63a89	2473	{
elmot	1:d0dfbce63a89	2474	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN \| ADC_CCR_VBATEN, PathInternal);
elmot	1:d0dfbce63a89	2475	}
elmot	1:d0dfbce63a89	2476
elmot	1:d0dfbce63a89	2477	/**
elmot	1:d0dfbce63a89	2478	* @brief Get parameter common to several ADC: measurement path to internal
elmot	1:d0dfbce63a89	2479	* channels (VrefInt, temperature sensor, ...).
elmot	1:d0dfbce63a89	2480	* @note One or several values can be selected.
elmot	1:d0dfbce63a89	2481	* Example: (LL_ADC_PATH_INTERNAL_VREFINT \|
elmot	1:d0dfbce63a89	2482	* LL_ADC_PATH_INTERNAL_TEMPSENSOR)
elmot	1:d0dfbce63a89	2483	* @rmtoll CCR VREFEN LL_ADC_GetCommonPathInternalCh\n
elmot	1:d0dfbce63a89	2484	* CCR TSEN LL_ADC_GetCommonPathInternalCh\n
elmot	1:d0dfbce63a89	2485	* CCR VBATEN LL_ADC_GetCommonPathInternalCh
elmot	1:d0dfbce63a89	2486	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	2487	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	2488	* @retval Returned value can be a combination of the following values:
elmot	1:d0dfbce63a89	2489	* @arg @ref LL_ADC_PATH_INTERNAL_NONE
elmot	1:d0dfbce63a89	2490	* @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
elmot	1:d0dfbce63a89	2491	* @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
elmot	1:d0dfbce63a89	2492	* @arg @ref LL_ADC_PATH_INTERNAL_VBAT
elmot	1:d0dfbce63a89	2493	*/
elmot	1:d0dfbce63a89	2494	__STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	2495	{
elmot	1:d0dfbce63a89	2496	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN \| ADC_CCR_VBATEN));
elmot	1:d0dfbce63a89	2497	}
elmot	1:d0dfbce63a89	2498
elmot	1:d0dfbce63a89	2499	/**
elmot	1:d0dfbce63a89	2500	* @}
elmot	1:d0dfbce63a89	2501	*/
elmot	1:d0dfbce63a89	2502
elmot	1:d0dfbce63a89	2503	/** @defgroup ADC_LL_EF_Configuration_ADC_Instance Configuration of ADC hierarchical scope: ADC instance
elmot	1:d0dfbce63a89	2504	* @{
elmot	1:d0dfbce63a89	2505	*/
elmot	1:d0dfbce63a89	2506
elmot	1:d0dfbce63a89	2507	/**
elmot	1:d0dfbce63a89	2508	* @brief Set ADC calibration factor in the mode single-ended
elmot	1:d0dfbce63a89	2509	* or differential (for devices with differential mode available).
elmot	1:d0dfbce63a89	2510	* @note This function is intended to set calibration parameters
elmot	1:d0dfbce63a89	2511	* without having to perform a new calibration using
elmot	1:d0dfbce63a89	2512	* @ref LL_ADC_StartCalibration().
elmot	1:d0dfbce63a89	2513	* @note For devices with differential mode available:
elmot	1:d0dfbce63a89	2514	* Calibration of offset is specific to each of
elmot	1:d0dfbce63a89	2515	* single-ended and differential modes
elmot	1:d0dfbce63a89	2516	* (calibration factor must be specified for each of these
elmot	1:d0dfbce63a89	2517	* differential modes, if used afterwards and if the application
elmot	1:d0dfbce63a89	2518	* requires their calibration).
elmot	1:d0dfbce63a89	2519	* @note In case of setting calibration factors of both modes single ended
elmot	1:d0dfbce63a89	2520	* and differential (parameter LL_ADC_BOTH_SINGLE_DIFF_ENDED):
elmot	1:d0dfbce63a89	2521	* both calibration factors must be concatenated.
elmot	1:d0dfbce63a89	2522	* To perform this processing, use helper macro
elmot	1:d0dfbce63a89	2523	* @ref __LL_ADC_CALIB_FACTOR_SINGLE_DIFF().
elmot	1:d0dfbce63a89	2524	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	2525	* ADC state:
elmot	1:d0dfbce63a89	2526	* ADC must be enabled, without calibration on going, without conversion
elmot	1:d0dfbce63a89	2527	* on going on group regular.
elmot	1:d0dfbce63a89	2528	* @rmtoll CALFACT CALFACT_S LL_ADC_SetCalibrationFactor\n
elmot	1:d0dfbce63a89	2529	* CALFACT CALFACT_D LL_ADC_SetCalibrationFactor
elmot	1:d0dfbce63a89	2530	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	2531	* @param SingleDiff This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2532	* @arg @ref LL_ADC_SINGLE_ENDED
elmot	1:d0dfbce63a89	2533	* @arg @ref LL_ADC_DIFFERENTIAL_ENDED
elmot	1:d0dfbce63a89	2534	* @arg @ref LL_ADC_BOTH_SINGLE_DIFF_ENDED
elmot	1:d0dfbce63a89	2535	* @param CalibrationFactor Value between Min_Data=0x00 and Max_Data=0x7F
elmot	1:d0dfbce63a89	2536	* @retval None
elmot	1:d0dfbce63a89	2537	*/
elmot	1:d0dfbce63a89	2538	__STATIC_INLINE void LL_ADC_SetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t SingleDiff, uint32_t CalibrationFactor)
elmot	1:d0dfbce63a89	2539	{
elmot	1:d0dfbce63a89	2540	MODIFY_REG(ADCx->CALFACT,
elmot	1:d0dfbce63a89	2541	SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK,
elmot	1:d0dfbce63a89	2542	CalibrationFactor << POSITION_VAL(SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK));
elmot	1:d0dfbce63a89	2543	}
elmot	1:d0dfbce63a89	2544
elmot	1:d0dfbce63a89	2545	/**
elmot	1:d0dfbce63a89	2546	* @brief Get ADC calibration factor in the mode single-ended
elmot	1:d0dfbce63a89	2547	* or differential (for devices with differential mode available).
elmot	1:d0dfbce63a89	2548	* @note Calibration factors are set by hardware after performing
elmot	1:d0dfbce63a89	2549	* a calibration run using function @ref LL_ADC_StartCalibration().
elmot	1:d0dfbce63a89	2550	* @note For devices with differential mode available:
elmot	1:d0dfbce63a89	2551	* Calibration of offset is specific to each of
elmot	1:d0dfbce63a89	2552	* single-ended and differential modes
elmot	1:d0dfbce63a89	2553	* @rmtoll CALFACT CALFACT_S LL_ADC_GetCalibrationFactor\n
elmot	1:d0dfbce63a89	2554	* CALFACT CALFACT_D LL_ADC_GetCalibrationFactor
elmot	1:d0dfbce63a89	2555	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	2556	* @param SingleDiff This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2557	* @arg @ref LL_ADC_SINGLE_ENDED
elmot	1:d0dfbce63a89	2558	* @arg @ref LL_ADC_DIFFERENTIAL_ENDED
elmot	1:d0dfbce63a89	2559	* @retval Value between Min_Data=0x00 and Max_Data=0x7F
elmot	1:d0dfbce63a89	2560	*/
elmot	1:d0dfbce63a89	2561	__STATIC_INLINE uint32_t LL_ADC_GetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t SingleDiff)
elmot	1:d0dfbce63a89	2562	{
elmot	1:d0dfbce63a89	2563	/* Retrieve bits with position in register depending on parameter */
elmot	1:d0dfbce63a89	2564	/* "SingleDiff". */
elmot	1:d0dfbce63a89	2565	/* Parameter used with mask "ADC_SINGLEDIFF_CALIB_FACTOR_MASK" because */
elmot	1:d0dfbce63a89	2566	/* containing other bits reserved for other purpose. */
elmot	1:d0dfbce63a89	2567	return (uint32_t)(READ_BIT(ADCx->CALFACT, (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) >> POSITION_VAL(SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK));
elmot	1:d0dfbce63a89	2568	}
elmot	1:d0dfbce63a89	2569
elmot	1:d0dfbce63a89	2570	/**
elmot	1:d0dfbce63a89	2571	* @brief Set ADC resolution.
elmot	1:d0dfbce63a89	2572	* Refer to reference manual for alignments formats
elmot	1:d0dfbce63a89	2573	* dependencies to ADC resolutions.
elmot	1:d0dfbce63a89	2574	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	2575	* ADC state:
elmot	1:d0dfbce63a89	2576	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	2577	* on either groups regular or injected.
elmot	1:d0dfbce63a89	2578	* @rmtoll CFGR RES LL_ADC_SetResolution
elmot	1:d0dfbce63a89	2579	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	2580	* @param Resolution This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2581	* @arg @ref LL_ADC_RESOLUTION_12B
elmot	1:d0dfbce63a89	2582	* @arg @ref LL_ADC_RESOLUTION_10B
elmot	1:d0dfbce63a89	2583	* @arg @ref LL_ADC_RESOLUTION_8B
elmot	1:d0dfbce63a89	2584	* @arg @ref LL_ADC_RESOLUTION_6B
elmot	1:d0dfbce63a89	2585	* @retval None
elmot	1:d0dfbce63a89	2586	*/
elmot	1:d0dfbce63a89	2587	__STATIC_INLINE void LL_ADC_SetResolution(ADC_TypeDef *ADCx, uint32_t Resolution)
elmot	1:d0dfbce63a89	2588	{
elmot	1:d0dfbce63a89	2589	MODIFY_REG(ADCx->CFGR, ADC_CFGR_RES, Resolution);
elmot	1:d0dfbce63a89	2590	}
elmot	1:d0dfbce63a89	2591
elmot	1:d0dfbce63a89	2592	/**
elmot	1:d0dfbce63a89	2593	* @brief Get ADC resolution.
elmot	1:d0dfbce63a89	2594	* Refer to reference manual for alignments formats
elmot	1:d0dfbce63a89	2595	* dependencies to ADC resolutions.
elmot	1:d0dfbce63a89	2596	* @rmtoll CFGR RES LL_ADC_GetResolution
elmot	1:d0dfbce63a89	2597	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	2598	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	2599	* @arg @ref LL_ADC_RESOLUTION_12B
elmot	1:d0dfbce63a89	2600	* @arg @ref LL_ADC_RESOLUTION_10B
elmot	1:d0dfbce63a89	2601	* @arg @ref LL_ADC_RESOLUTION_8B
elmot	1:d0dfbce63a89	2602	* @arg @ref LL_ADC_RESOLUTION_6B
elmot	1:d0dfbce63a89	2603	*/
elmot	1:d0dfbce63a89	2604	__STATIC_INLINE uint32_t LL_ADC_GetResolution(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	2605	{
elmot	1:d0dfbce63a89	2606	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_RES));
elmot	1:d0dfbce63a89	2607	}
elmot	1:d0dfbce63a89	2608
elmot	1:d0dfbce63a89	2609	/**
elmot	1:d0dfbce63a89	2610	* @brief Set ADC conversion data alignment.
elmot	1:d0dfbce63a89	2611	* @note Refer to reference manual for alignments formats
elmot	1:d0dfbce63a89	2612	* dependencies to ADC resolutions.
elmot	1:d0dfbce63a89	2613	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	2614	* ADC state:
elmot	1:d0dfbce63a89	2615	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	2616	* on either groups regular or injected.
elmot	1:d0dfbce63a89	2617	* @rmtoll CFGR ALIGN LL_ADC_SetDataAlignment
elmot	1:d0dfbce63a89	2618	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	2619	* @param DataAlignment This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2620	* @arg @ref LL_ADC_DATA_ALIGN_RIGHT
elmot	1:d0dfbce63a89	2621	* @arg @ref LL_ADC_DATA_ALIGN_LEFT
elmot	1:d0dfbce63a89	2622	* @retval None
elmot	1:d0dfbce63a89	2623	*/
elmot	1:d0dfbce63a89	2624	__STATIC_INLINE void LL_ADC_SetDataAlignment(ADC_TypeDef *ADCx, uint32_t DataAlignment)
elmot	1:d0dfbce63a89	2625	{
elmot	1:d0dfbce63a89	2626	MODIFY_REG(ADCx->CFGR, ADC_CFGR_ALIGN, DataAlignment);
elmot	1:d0dfbce63a89	2627	}
elmot	1:d0dfbce63a89	2628
elmot	1:d0dfbce63a89	2629	/**
elmot	1:d0dfbce63a89	2630	* @brief Get ADC conversion data alignment.
elmot	1:d0dfbce63a89	2631	* @note Refer to reference manual for alignments formats
elmot	1:d0dfbce63a89	2632	* dependencies to ADC resolutions.
elmot	1:d0dfbce63a89	2633	* @rmtoll CFGR ALIGN LL_ADC_GetDataAlignment
elmot	1:d0dfbce63a89	2634	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	2635	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	2636	* @arg @ref LL_ADC_DATA_ALIGN_RIGHT
elmot	1:d0dfbce63a89	2637	* @arg @ref LL_ADC_DATA_ALIGN_LEFT
elmot	1:d0dfbce63a89	2638	*/
elmot	1:d0dfbce63a89	2639	__STATIC_INLINE uint32_t LL_ADC_GetDataAlignment(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	2640	{
elmot	1:d0dfbce63a89	2641	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_ALIGN));
elmot	1:d0dfbce63a89	2642	}
elmot	1:d0dfbce63a89	2643
elmot	1:d0dfbce63a89	2644	/**
elmot	1:d0dfbce63a89	2645	* @brief Set ADC low power mode.
elmot	1:d0dfbce63a89	2646	* @note Description of ADC low power modes:
elmot	1:d0dfbce63a89	2647	* - ADC low power mode "auto wait": Dynamic low power mode,
elmot	1:d0dfbce63a89	2648	* ADC conversions occurrences are limited to the minimum necessary
elmot	1:d0dfbce63a89	2649	* in order to reduce power consumption.
elmot	1:d0dfbce63a89	2650	* New ADC conversion starts only when the previous
elmot	1:d0dfbce63a89	2651	* unitary conversion data (for ADC group regular)
elmot	1:d0dfbce63a89	2652	* or previous sequence conversions data (for ADC group injected)
elmot	1:d0dfbce63a89	2653	* has been retrieved by user software.
elmot	1:d0dfbce63a89	2654	* In the meantime, ADC remains idle: does not performs any
elmot	1:d0dfbce63a89	2655	* other conversion.
elmot	1:d0dfbce63a89	2656	* This mode allows to automatically adapt the ADC conversions
elmot	1:d0dfbce63a89	2657	* triggers to the speed of the software that reads the data.
elmot	1:d0dfbce63a89	2658	* Moreover, this avoids risk of overrun for low frequency
elmot	1:d0dfbce63a89	2659	* applications.
elmot	1:d0dfbce63a89	2660	* How to use this low power mode:
elmot	1:d0dfbce63a89	2661	* - Do not use with interruption or DMA since these modes
elmot	1:d0dfbce63a89	2662	* have to clear immediately the EOC flag to free the
elmot	1:d0dfbce63a89	2663	* IRQ vector sequencer.
elmot	1:d0dfbce63a89	2664	* - Do use with polling: 1. Start conversion,
elmot	1:d0dfbce63a89	2665	* 2. Later on, when conversion data is needed: poll for end of
elmot	1:d0dfbce63a89	2666	* conversion to ensure that conversion is completed and
elmot	1:d0dfbce63a89	2667	* retrieve ADC conversion data. This will trig another
elmot	1:d0dfbce63a89	2668	* ADC conversion start.
elmot	1:d0dfbce63a89	2669	* - ADC low power mode "auto power-off" (feature available on
elmot	1:d0dfbce63a89	2670	* this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
elmot	1:d0dfbce63a89	2671	* the ADC automatically powers-off after a conversion and
elmot	1:d0dfbce63a89	2672	* automatically wakes up when a new conversion is triggered
elmot	1:d0dfbce63a89	2673	* (with startup time between trigger and start of sampling).
elmot	1:d0dfbce63a89	2674	* This feature can be combined with low power mode "auto wait".
elmot	1:d0dfbce63a89	2675	* @note With ADC low power mode "auto wait", the ADC conversion data read
elmot	1:d0dfbce63a89	2676	* is corresponding to previous ADC conversion start, independently
elmot	1:d0dfbce63a89	2677	* of delay during which ADC was idle.
elmot	1:d0dfbce63a89	2678	* Therefore, the ADC conversion data may be outdated: does not
elmot	1:d0dfbce63a89	2679	* correspond to the current voltage level on the selected
elmot	1:d0dfbce63a89	2680	* ADC channel.
elmot	1:d0dfbce63a89	2681	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	2682	* ADC state:
elmot	1:d0dfbce63a89	2683	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	2684	* on either groups regular or injected.
elmot	1:d0dfbce63a89	2685	* @rmtoll CFGR AUTDLY LL_ADC_SetLowPowerMode
elmot	1:d0dfbce63a89	2686	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	2687	* @param LowPowerMode This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2688	* @arg @ref LL_ADC_LP_MODE_NONE
elmot	1:d0dfbce63a89	2689	* @arg @ref LL_ADC_LP_AUTOWAIT
elmot	1:d0dfbce63a89	2690	* @retval None
elmot	1:d0dfbce63a89	2691	*/
elmot	1:d0dfbce63a89	2692	__STATIC_INLINE void LL_ADC_SetLowPowerMode(ADC_TypeDef *ADCx, uint32_t LowPowerMode)
elmot	1:d0dfbce63a89	2693	{
elmot	1:d0dfbce63a89	2694	MODIFY_REG(ADCx->CFGR, ADC_CFGR_AUTDLY, LowPowerMode);
elmot	1:d0dfbce63a89	2695	}
elmot	1:d0dfbce63a89	2696
elmot	1:d0dfbce63a89	2697	/**
elmot	1:d0dfbce63a89	2698	* @brief Get ADC low power mode:
elmot	1:d0dfbce63a89	2699	* @note Description of ADC low power modes:
elmot	1:d0dfbce63a89	2700	* - ADC low power mode "auto wait": Dynamic low power mode,
elmot	1:d0dfbce63a89	2701	* ADC conversions occurrences are limited to the minimum necessary
elmot	1:d0dfbce63a89	2702	* in order to reduce power consumption.
elmot	1:d0dfbce63a89	2703	* New ADC conversion starts only when the previous
elmot	1:d0dfbce63a89	2704	* unitary conversion data (for ADC group regular)
elmot	1:d0dfbce63a89	2705	* or previous sequence conversions data (for ADC group injected)
elmot	1:d0dfbce63a89	2706	* has been retrieved by user software.
elmot	1:d0dfbce63a89	2707	* In the meantime, ADC remains idle: does not performs any
elmot	1:d0dfbce63a89	2708	* other conversion.
elmot	1:d0dfbce63a89	2709	* This mode allows to automatically adapt the ADC conversions
elmot	1:d0dfbce63a89	2710	* triggers to the speed of the software that reads the data.
elmot	1:d0dfbce63a89	2711	* Moreover, this avoids risk of overrun for low frequency
elmot	1:d0dfbce63a89	2712	* applications.
elmot	1:d0dfbce63a89	2713	* How to use this low power mode:
elmot	1:d0dfbce63a89	2714	* - Do not use with interruption or DMA since these modes
elmot	1:d0dfbce63a89	2715	* have to clear immediately the EOC flag to free the
elmot	1:d0dfbce63a89	2716	* IRQ vector sequencer.
elmot	1:d0dfbce63a89	2717	* - Do use with polling: 1. Start conversion,
elmot	1:d0dfbce63a89	2718	* 2. Later on, when conversion data is needed: poll for end of
elmot	1:d0dfbce63a89	2719	* conversion to ensure that conversion is completed and
elmot	1:d0dfbce63a89	2720	* retrieve ADC conversion data. This will trig another
elmot	1:d0dfbce63a89	2721	* ADC conversion start.
elmot	1:d0dfbce63a89	2722	* - ADC low power mode "auto power-off" (feature available on
elmot	1:d0dfbce63a89	2723	* this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
elmot	1:d0dfbce63a89	2724	* the ADC automatically powers-off after a conversion and
elmot	1:d0dfbce63a89	2725	* automatically wakes up when a new conversion is triggered
elmot	1:d0dfbce63a89	2726	* (with startup time between trigger and start of sampling).
elmot	1:d0dfbce63a89	2727	* This feature can be combined with low power mode "auto wait".
elmot	1:d0dfbce63a89	2728	* @note With ADC low power mode "auto wait", the ADC conversion data read
elmot	1:d0dfbce63a89	2729	* is corresponding to previous ADC conversion start, independently
elmot	1:d0dfbce63a89	2730	* of delay during which ADC was idle.
elmot	1:d0dfbce63a89	2731	* Therefore, the ADC conversion data may be outdated: does not
elmot	1:d0dfbce63a89	2732	* correspond to the current voltage level on the selected
elmot	1:d0dfbce63a89	2733	* ADC channel.
elmot	1:d0dfbce63a89	2734	* @rmtoll CFGR AUTDLY LL_ADC_GetLowPowerMode
elmot	1:d0dfbce63a89	2735	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	2736	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	2737	* @arg @ref LL_ADC_LP_MODE_NONE
elmot	1:d0dfbce63a89	2738	* @arg @ref LL_ADC_LP_AUTOWAIT
elmot	1:d0dfbce63a89	2739	*/
elmot	1:d0dfbce63a89	2740	__STATIC_INLINE uint32_t LL_ADC_GetLowPowerMode(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	2741	{
elmot	1:d0dfbce63a89	2742	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_AUTDLY));
elmot	1:d0dfbce63a89	2743	}
elmot	1:d0dfbce63a89	2744
elmot	1:d0dfbce63a89	2745	/**
elmot	1:d0dfbce63a89	2746	* @brief Set ADC selected offset number 1, 2, 3 or 4.
elmot	1:d0dfbce63a89	2747	* @note This function set the 2 items of offset configuration:
elmot	1:d0dfbce63a89	2748	* - ADC channel to which the offset programmed will be applied
elmot	1:d0dfbce63a89	2749	* (independently of channel mapped on ADC group regular
elmot	1:d0dfbce63a89	2750	* or group injected)
elmot	1:d0dfbce63a89	2751	* - Offset level (offset to be subtracted from the raw
elmot	1:d0dfbce63a89	2752	* converted data).
elmot	1:d0dfbce63a89	2753	* @note Caution: Offset format is dependent to ADC resolution:
elmot	1:d0dfbce63a89	2754	* offset has to be left-aligned on bit 11, the LSB (right bits)
elmot	1:d0dfbce63a89	2755	* are set to 0.
elmot	1:d0dfbce63a89	2756	* @note This function enables the offset, by default. It can be forced
elmot	1:d0dfbce63a89	2757	* to disable state using function LL_ADC_SetOffsetState().
elmot	1:d0dfbce63a89	2758	* @note If a channel is mapped on several offsets numbers, only the offset
elmot	1:d0dfbce63a89	2759	* with the lowest value is considered for the subtraction.
elmot	1:d0dfbce63a89	2760	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	2761	* ADC state:
elmot	1:d0dfbce63a89	2762	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	2763	* on either groups regular or injected.
elmot	1:d0dfbce63a89	2764	* @note On STM32L4, some fast channels are available: fast analog inputs
elmot	1:d0dfbce63a89	2765	* coming from GPIO pads (ADC_IN1..5).
elmot	1:d0dfbce63a89	2766	* @rmtoll OFR1 OFFSET1_CH LL_ADC_SetOffset\n
elmot	1:d0dfbce63a89	2767	* OFR1 OFFSET1 LL_ADC_SetOffset\n
elmot	1:d0dfbce63a89	2768	* OFR1 OFFSET1_EN LL_ADC_SetOffset\n
elmot	1:d0dfbce63a89	2769	* OFR2 OFFSET2_CH LL_ADC_SetOffset\n
elmot	1:d0dfbce63a89	2770	* OFR2 OFFSET2 LL_ADC_SetOffset\n
elmot	1:d0dfbce63a89	2771	* OFR2 OFFSET2_EN LL_ADC_SetOffset\n
elmot	1:d0dfbce63a89	2772	* OFR3 OFFSET3_CH LL_ADC_SetOffset\n
elmot	1:d0dfbce63a89	2773	* OFR3 OFFSET3 LL_ADC_SetOffset\n
elmot	1:d0dfbce63a89	2774	* OFR3 OFFSET3_EN LL_ADC_SetOffset\n
elmot	1:d0dfbce63a89	2775	* OFR4 OFFSET4_CH LL_ADC_SetOffset\n
elmot	1:d0dfbce63a89	2776	* OFR4 OFFSET4 LL_ADC_SetOffset\n
elmot	1:d0dfbce63a89	2777	* OFR4 OFFSET4_EN LL_ADC_SetOffset
elmot	1:d0dfbce63a89	2778	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	2779	* @param Offsety This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2780	* @arg @ref LL_ADC_OFFSET_1
elmot	1:d0dfbce63a89	2781	* @arg @ref LL_ADC_OFFSET_2
elmot	1:d0dfbce63a89	2782	* @arg @ref LL_ADC_OFFSET_3
elmot	1:d0dfbce63a89	2783	* @arg @ref LL_ADC_OFFSET_4
elmot	1:d0dfbce63a89	2784	* @param Channel This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2785	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	2786	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	2787	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	2788	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	2789	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	2790	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	2791	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	2792	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	2793	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	2794	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	2795	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	2796	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	2797	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	2798	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	2799	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	2800	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	2801	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	2802	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	2803	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	2804	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	2805	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	2806	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	2807	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	2808	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	2809	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	2810	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	2811	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	2812	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	2813	*
elmot	1:d0dfbce63a89	2814	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	2815	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	2816	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	2817	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	2818	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	2819	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	2820	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	2821	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
elmot	1:d0dfbce63a89	2822	* @param OffsetLevel Value between Min_Data=0x000 and Max_Data=0xFFF
elmot	1:d0dfbce63a89	2823	* @retval None
elmot	1:d0dfbce63a89	2824	*/
elmot	1:d0dfbce63a89	2825	__STATIC_INLINE void LL_ADC_SetOffset(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t Channel, uint32_t OffsetLevel)
elmot	1:d0dfbce63a89	2826	{
elmot	1:d0dfbce63a89	2827	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
elmot	1:d0dfbce63a89	2828
elmot	1:d0dfbce63a89	2829	MODIFY_REG(*preg,
elmot	1:d0dfbce63a89	2830	ADC_OFR1_OFFSET1_EN \| ADC_OFR1_OFFSET1_CH \| ADC_OFR1_OFFSET1,
elmot	1:d0dfbce63a89	2831	ADC_OFR1_OFFSET1_EN \| (Channel & ADC_CHANNEL_ID_NUMBER_MASK) \| OffsetLevel);
elmot	1:d0dfbce63a89	2832	}
elmot	1:d0dfbce63a89	2833
elmot	1:d0dfbce63a89	2834	/**
elmot	1:d0dfbce63a89	2835	* @brief Get for the ADC selected offset number 1, 2, 3 or 4:
elmot	1:d0dfbce63a89	2836	* Channel to which the offset programmed will be applied
elmot	1:d0dfbce63a89	2837	* (independently of channel mapped on ADC group regular
elmot	1:d0dfbce63a89	2838	* or group injected)
elmot	1:d0dfbce63a89	2839	* @note Usage of the returned channel number:
elmot	1:d0dfbce63a89	2840	* - To reinject this channel into another function LL_ADC_xxx:
elmot	1:d0dfbce63a89	2841	* the returned channel number is only partly formatted on definition
elmot	1:d0dfbce63a89	2842	* of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
elmot	1:d0dfbce63a89	2843	* with parts of literals LL_ADC_CHANNEL_x or using
elmot	1:d0dfbce63a89	2844	* helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
elmot	1:d0dfbce63a89	2845	* Then the selected literal LL_ADC_CHANNEL_x can be used
elmot	1:d0dfbce63a89	2846	* as parameter for another function.
elmot	1:d0dfbce63a89	2847	* - To get the channel number in decimal format:
elmot	1:d0dfbce63a89	2848	* process the returned value with the helper macro
elmot	1:d0dfbce63a89	2849	* @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
elmot	1:d0dfbce63a89	2850	* @note On STM32L4, some fast channels are available: fast analog inputs
elmot	1:d0dfbce63a89	2851	* coming from GPIO pads (ADC_IN1..5).
elmot	1:d0dfbce63a89	2852	* @rmtoll OFR1 OFFSET1_CH LL_ADC_GetOffsetChannel\n
elmot	1:d0dfbce63a89	2853	* OFR2 OFFSET2_CH LL_ADC_GetOffsetChannel\n
elmot	1:d0dfbce63a89	2854	* OFR3 OFFSET3_CH LL_ADC_GetOffsetChannel\n
elmot	1:d0dfbce63a89	2855	* OFR4 OFFSET4_CH LL_ADC_GetOffsetChannel
elmot	1:d0dfbce63a89	2856	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	2857	* @param Offsety This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2858	* @arg @ref LL_ADC_OFFSET_1
elmot	1:d0dfbce63a89	2859	* @arg @ref LL_ADC_OFFSET_2
elmot	1:d0dfbce63a89	2860	* @arg @ref LL_ADC_OFFSET_3
elmot	1:d0dfbce63a89	2861	* @arg @ref LL_ADC_OFFSET_4
elmot	1:d0dfbce63a89	2862	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	2863	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	2864	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	2865	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	2866	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	2867	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	2868	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	2869	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	2870	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	2871	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	2872	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	2873	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	2874	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	2875	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	2876	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	2877	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	2878	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	2879	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	2880	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	2881	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	2882	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	2883	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	2884	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	2885	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	2886	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	2887	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	2888	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	2889	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	2890	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	2891	*
elmot	1:d0dfbce63a89	2892	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	2893	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	2894	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	2895	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	2896	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	2897	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	2898	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	2899	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).\n
elmot	1:d0dfbce63a89	2900	* (1, 2, 3, 4) For ADC channel read back from ADC register,
elmot	1:d0dfbce63a89	2901	* comparison with internal channel parameter to be done
elmot	1:d0dfbce63a89	2902	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
elmot	1:d0dfbce63a89	2903	*/
elmot	1:d0dfbce63a89	2904	__STATIC_INLINE uint32_t LL_ADC_GetOffsetChannel(ADC_TypeDef *ADCx, uint32_t Offsety)
elmot	1:d0dfbce63a89	2905	{
elmot	1:d0dfbce63a89	2906	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
elmot	1:d0dfbce63a89	2907
elmot	1:d0dfbce63a89	2908	return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1_CH);
elmot	1:d0dfbce63a89	2909	}
elmot	1:d0dfbce63a89	2910
elmot	1:d0dfbce63a89	2911	/**
elmot	1:d0dfbce63a89	2912	* @brief Get for the ADC selected offset number 1, 2, 3 or 4:
elmot	1:d0dfbce63a89	2913	* Offset level (offset to be subtracted from the raw
elmot	1:d0dfbce63a89	2914	* converted data).
elmot	1:d0dfbce63a89	2915	* @note Caution: Offset format is dependent to ADC resolution:
elmot	1:d0dfbce63a89	2916	* offset has to be left-aligned on bit 11, the LSB (right bits)
elmot	1:d0dfbce63a89	2917	* are set to 0.
elmot	1:d0dfbce63a89	2918	* @rmtoll OFR1 OFFSET1 LL_ADC_GetOffsetLevel\n
elmot	1:d0dfbce63a89	2919	* OFR2 OFFSET2 LL_ADC_GetOffsetLevel\n
elmot	1:d0dfbce63a89	2920	* OFR3 OFFSET3 LL_ADC_GetOffsetLevel\n
elmot	1:d0dfbce63a89	2921	* OFR4 OFFSET4 LL_ADC_GetOffsetLevel
elmot	1:d0dfbce63a89	2922	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	2923	* @param Offsety This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2924	* @arg @ref LL_ADC_OFFSET_1
elmot	1:d0dfbce63a89	2925	* @arg @ref LL_ADC_OFFSET_2
elmot	1:d0dfbce63a89	2926	* @arg @ref LL_ADC_OFFSET_3
elmot	1:d0dfbce63a89	2927	* @arg @ref LL_ADC_OFFSET_4
elmot	1:d0dfbce63a89	2928	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
elmot	1:d0dfbce63a89	2929	*/
elmot	1:d0dfbce63a89	2930	__STATIC_INLINE uint32_t LL_ADC_GetOffsetLevel(ADC_TypeDef *ADCx, uint32_t Offsety)
elmot	1:d0dfbce63a89	2931	{
elmot	1:d0dfbce63a89	2932	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
elmot	1:d0dfbce63a89	2933
elmot	1:d0dfbce63a89	2934	return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1);
elmot	1:d0dfbce63a89	2935	}
elmot	1:d0dfbce63a89	2936
elmot	1:d0dfbce63a89	2937	/**
elmot	1:d0dfbce63a89	2938	* @brief Set for the ADC selected offset number 1, 2, 3 or 4:
elmot	1:d0dfbce63a89	2939	* force offset state disable or enable
elmot	1:d0dfbce63a89	2940	* without modifying offset channel or offset value.
elmot	1:d0dfbce63a89	2941	* @note This function should be needed only in case of offset to be
elmot	1:d0dfbce63a89	2942	* enabled-disabled dynamically, and should not be needed in other cases:
elmot	1:d0dfbce63a89	2943	* function LL_ADC_SetOffset() automatically enables the offset.
elmot	1:d0dfbce63a89	2944	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	2945	* ADC state:
elmot	1:d0dfbce63a89	2946	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	2947	* on either groups regular or injected.
elmot	1:d0dfbce63a89	2948	* @rmtoll OFR1 OFFSET1_EN LL_ADC_SetOffsetState\n
elmot	1:d0dfbce63a89	2949	* OFR2 OFFSET2_EN LL_ADC_SetOffsetState\n
elmot	1:d0dfbce63a89	2950	* OFR3 OFFSET3_EN LL_ADC_SetOffsetState\n
elmot	1:d0dfbce63a89	2951	* OFR4 OFFSET4_EN LL_ADC_SetOffsetState
elmot	1:d0dfbce63a89	2952	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	2953	* @param Offsety This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2954	* @arg @ref LL_ADC_OFFSET_1
elmot	1:d0dfbce63a89	2955	* @arg @ref LL_ADC_OFFSET_2
elmot	1:d0dfbce63a89	2956	* @arg @ref LL_ADC_OFFSET_3
elmot	1:d0dfbce63a89	2957	* @arg @ref LL_ADC_OFFSET_4
elmot	1:d0dfbce63a89	2958	* @param OffsetState This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2959	* @arg @ref LL_ADC_OFFSET_DISABLE
elmot	1:d0dfbce63a89	2960	* @arg @ref LL_ADC_OFFSET_ENABLE
elmot	1:d0dfbce63a89	2961	* @retval None
elmot	1:d0dfbce63a89	2962	*/
elmot	1:d0dfbce63a89	2963	__STATIC_INLINE void LL_ADC_SetOffsetState(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t OffsetState)
elmot	1:d0dfbce63a89	2964	{
elmot	1:d0dfbce63a89	2965	register uint32_t preg = (uint32_t )((uint32_t)
elmot	1:d0dfbce63a89	2966	((uint32_t)(&ADCx->OFR1) + (Offsety*4U)));
elmot	1:d0dfbce63a89	2967
elmot	1:d0dfbce63a89	2968	MODIFY_REG(*preg,
elmot	1:d0dfbce63a89	2969	ADC_OFR1_OFFSET1_EN,
elmot	1:d0dfbce63a89	2970	OffsetState);
elmot	1:d0dfbce63a89	2971	}
elmot	1:d0dfbce63a89	2972
elmot	1:d0dfbce63a89	2973	/**
elmot	1:d0dfbce63a89	2974	* @brief Get for the ADC selected offset number 1, 2, 3 or 4:
elmot	1:d0dfbce63a89	2975	* offset state disabled or enabled.
elmot	1:d0dfbce63a89	2976	* @rmtoll OFR1 OFFSET1_EN LL_ADC_GetOffsetState\n
elmot	1:d0dfbce63a89	2977	* OFR2 OFFSET2_EN LL_ADC_GetOffsetState\n
elmot	1:d0dfbce63a89	2978	* OFR3 OFFSET3_EN LL_ADC_GetOffsetState\n
elmot	1:d0dfbce63a89	2979	* OFR4 OFFSET4_EN LL_ADC_GetOffsetState
elmot	1:d0dfbce63a89	2980	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	2981	* @param Offsety This parameter can be one of the following values:
elmot	1:d0dfbce63a89	2982	* @arg @ref LL_ADC_OFFSET_1
elmot	1:d0dfbce63a89	2983	* @arg @ref LL_ADC_OFFSET_2
elmot	1:d0dfbce63a89	2984	* @arg @ref LL_ADC_OFFSET_3
elmot	1:d0dfbce63a89	2985	* @arg @ref LL_ADC_OFFSET_4
elmot	1:d0dfbce63a89	2986	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	2987	* @arg @ref LL_ADC_OFFSET_DISABLE
elmot	1:d0dfbce63a89	2988	* @arg @ref LL_ADC_OFFSET_ENABLE
elmot	1:d0dfbce63a89	2989	*/
elmot	1:d0dfbce63a89	2990	__STATIC_INLINE uint32_t LL_ADC_GetOffsetState(ADC_TypeDef *ADCx, uint32_t Offsety)
elmot	1:d0dfbce63a89	2991	{
elmot	1:d0dfbce63a89	2992	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
elmot	1:d0dfbce63a89	2993
elmot	1:d0dfbce63a89	2994	return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1_EN);
elmot	1:d0dfbce63a89	2995	}
elmot	1:d0dfbce63a89	2996
elmot	1:d0dfbce63a89	2997	/**
elmot	1:d0dfbce63a89	2998	* @}
elmot	1:d0dfbce63a89	2999	*/
elmot	1:d0dfbce63a89	3000
elmot	1:d0dfbce63a89	3001	/** @defgroup ADC_LL_EF_Configuration_ADC_Group_Regular Configuration of ADC hierarchical scope: group regular
elmot	1:d0dfbce63a89	3002	* @{
elmot	1:d0dfbce63a89	3003	*/
elmot	1:d0dfbce63a89	3004
elmot	1:d0dfbce63a89	3005	/**
elmot	1:d0dfbce63a89	3006	* @brief Set ADC group regular conversion trigger source:
elmot	1:d0dfbce63a89	3007	* internal (SW start) or from external IP (timer event,
elmot	1:d0dfbce63a89	3008	* external interrupt line).
elmot	1:d0dfbce63a89	3009	* @note On this STM32 serie, setting trigger source to external trigger
elmot	1:d0dfbce63a89	3010	* also set trigger polarity to rising edge
elmot	1:d0dfbce63a89	3011	* (default setting for compatibility with some ADC on other
elmot	1:d0dfbce63a89	3012	* STM32 families having this setting set by HW default value).
elmot	1:d0dfbce63a89	3013	* In case of need to modify trigger edge, use
elmot	1:d0dfbce63a89	3014	* function @ref LL_ADC_REG_SetTriggerEdge().
elmot	1:d0dfbce63a89	3015	* @note Availability of parameters of trigger sources from timer
elmot	1:d0dfbce63a89	3016	* depends on timers availability on the selected device.
elmot	1:d0dfbce63a89	3017	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	3018	* ADC state:
elmot	1:d0dfbce63a89	3019	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	3020	* on group regular.
elmot	1:d0dfbce63a89	3021	* @rmtoll CFGR EXTSEL LL_ADC_REG_SetTriggerSource\n
elmot	1:d0dfbce63a89	3022	* CFGR EXTEN LL_ADC_REG_SetTriggerSource
elmot	1:d0dfbce63a89	3023	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3024	* @param TriggerSource This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3025	* @arg @ref LL_ADC_REG_TRIG_SOFTWARE
elmot	1:d0dfbce63a89	3026	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO
elmot	1:d0dfbce63a89	3027	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO2
elmot	1:d0dfbce63a89	3028	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH1
elmot	1:d0dfbce63a89	3029	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH2
elmot	1:d0dfbce63a89	3030	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH3
elmot	1:d0dfbce63a89	3031	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
elmot	1:d0dfbce63a89	3032	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH2
elmot	1:d0dfbce63a89	3033	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
elmot	1:d0dfbce63a89	3034	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH4
elmot	1:d0dfbce63a89	3035	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_TRGO
elmot	1:d0dfbce63a89	3036	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH4
elmot	1:d0dfbce63a89	3037	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
elmot	1:d0dfbce63a89	3038	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO
elmot	1:d0dfbce63a89	3039	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO2
elmot	1:d0dfbce63a89	3040	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO
elmot	1:d0dfbce63a89	3041	* @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
elmot	1:d0dfbce63a89	3042	* @retval None
elmot	1:d0dfbce63a89	3043	*/
elmot	1:d0dfbce63a89	3044	__STATIC_INLINE void LL_ADC_REG_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
elmot	1:d0dfbce63a89	3045	{
elmot	1:d0dfbce63a89	3046	MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN \| ADC_CFGR_EXTSEL, TriggerSource);
elmot	1:d0dfbce63a89	3047	}
elmot	1:d0dfbce63a89	3048
elmot	1:d0dfbce63a89	3049	/**
elmot	1:d0dfbce63a89	3050	* @brief Get ADC group regular conversion trigger source:
elmot	1:d0dfbce63a89	3051	* internal (SW start) or from external IP (timer event,
elmot	1:d0dfbce63a89	3052	* external interrupt line).
elmot	1:d0dfbce63a89	3053	* @note To determine whether group regular trigger source is
elmot	1:d0dfbce63a89	3054	* internal (SW start) or external, without detail
elmot	1:d0dfbce63a89	3055	* of which peripheral is selected as external trigger,
elmot	1:d0dfbce63a89	3056	* (equivalent to
elmot	1:d0dfbce63a89	3057	* "if(LL_ADC_REG_GetTriggerSource(ADC1) == LL_ADC_REG_TRIG_SOFTWARE)")
elmot	1:d0dfbce63a89	3058	* use function @ref LL_ADC_REG_IsTriggerSourceSWStart.
elmot	1:d0dfbce63a89	3059	* @note Availability of parameters of trigger sources from timer
elmot	1:d0dfbce63a89	3060	* depends on timers availability on the selected device.
elmot	1:d0dfbce63a89	3061	* @rmtoll CFGR EXTSEL LL_ADC_REG_GetTriggerSource\n
elmot	1:d0dfbce63a89	3062	* CFGR EXTEN LL_ADC_REG_GetTriggerSource
elmot	1:d0dfbce63a89	3063	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3064	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	3065	* @arg @ref LL_ADC_REG_TRIG_SOFTWARE
elmot	1:d0dfbce63a89	3066	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO
elmot	1:d0dfbce63a89	3067	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO2
elmot	1:d0dfbce63a89	3068	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH1
elmot	1:d0dfbce63a89	3069	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH2
elmot	1:d0dfbce63a89	3070	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH3
elmot	1:d0dfbce63a89	3071	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
elmot	1:d0dfbce63a89	3072	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH2
elmot	1:d0dfbce63a89	3073	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
elmot	1:d0dfbce63a89	3074	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH4
elmot	1:d0dfbce63a89	3075	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_TRGO
elmot	1:d0dfbce63a89	3076	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH4
elmot	1:d0dfbce63a89	3077	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
elmot	1:d0dfbce63a89	3078	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO
elmot	1:d0dfbce63a89	3079	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO2
elmot	1:d0dfbce63a89	3080	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO
elmot	1:d0dfbce63a89	3081	* @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
elmot	1:d0dfbce63a89	3082	*/
elmot	1:d0dfbce63a89	3083	__STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerSource(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	3084	{
elmot	1:d0dfbce63a89	3085	register uint32_t TriggerSource = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL \| ADC_CFGR_EXTEN);
elmot	1:d0dfbce63a89	3086
elmot	1:d0dfbce63a89	3087	/* Value for shift of {0; 4; 8; 12} depending on value of bitfield */
elmot	1:d0dfbce63a89	3088	/* corresponding to ADC_CFGR_EXTEN {0; 1; 2; 3}. */
elmot	1:d0dfbce63a89	3089	register uint32_t ShiftExten = ((TriggerSource & ADC_CFGR_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U));
elmot	1:d0dfbce63a89	3090
elmot	1:d0dfbce63a89	3091	/* Set bitfield corresponding to ADC_CFGR_EXTEN and ADC_CFGR_EXTSEL */
elmot	1:d0dfbce63a89	3092	/* to match with triggers literals definition. */
elmot	1:d0dfbce63a89	3093	return ((TriggerSource
elmot	1:d0dfbce63a89	3094	& (ADC_REG_TRIG_SOURCE_MASK >> ShiftExten) & ADC_CFGR_EXTSEL)
elmot	1:d0dfbce63a89	3095	\| ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR_EXTEN)
elmot	1:d0dfbce63a89	3096	);
elmot	1:d0dfbce63a89	3097	}
elmot	1:d0dfbce63a89	3098
elmot	1:d0dfbce63a89	3099	/**
elmot	1:d0dfbce63a89	3100	* @brief Get ADC group regular conversion trigger source internal (SW start)
elmot	1:d0dfbce63a89	3101	or external.
elmot	1:d0dfbce63a89	3102	* @note In case of group regular trigger source set to external trigger,
elmot	1:d0dfbce63a89	3103	* to determine which peripheral is selected as external trigger,
elmot	1:d0dfbce63a89	3104	* use function @ref LL_ADC_REG_GetTriggerSource().
elmot	1:d0dfbce63a89	3105	* @rmtoll CFGR EXTEN LL_ADC_REG_IsTriggerSourceSWStart
elmot	1:d0dfbce63a89	3106	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3107	* @retval Value "0" if trigger source external trigger
elmot	1:d0dfbce63a89	3108	* Value "1" if trigger source SW start.
elmot	1:d0dfbce63a89	3109	*/
elmot	1:d0dfbce63a89	3110	__STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	3111	{
elmot	1:d0dfbce63a89	3112	return (READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN));
elmot	1:d0dfbce63a89	3113	}
elmot	1:d0dfbce63a89	3114
elmot	1:d0dfbce63a89	3115	/**
elmot	1:d0dfbce63a89	3116	* @brief Set ADC group regular conversion trigger polarity.
elmot	1:d0dfbce63a89	3117	* @note Applicable only for trigger source set to external trigger.
elmot	1:d0dfbce63a89	3118	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	3119	* ADC state:
elmot	1:d0dfbce63a89	3120	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	3121	* on group regular.
elmot	1:d0dfbce63a89	3122	* @rmtoll CFGR EXTEN LL_ADC_REG_SetTriggerEdge
elmot	1:d0dfbce63a89	3123	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3124	* @param ExternalTriggerEdge This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3125	* @arg @ref LL_ADC_REG_TRIG_EXT_RISING
elmot	1:d0dfbce63a89	3126	* @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
elmot	1:d0dfbce63a89	3127	* @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
elmot	1:d0dfbce63a89	3128	* @retval None
elmot	1:d0dfbce63a89	3129	*/
elmot	1:d0dfbce63a89	3130	__STATIC_INLINE void LL_ADC_REG_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge)
elmot	1:d0dfbce63a89	3131	{
elmot	1:d0dfbce63a89	3132	MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN, ExternalTriggerEdge);
elmot	1:d0dfbce63a89	3133	}
elmot	1:d0dfbce63a89	3134
elmot	1:d0dfbce63a89	3135	/**
elmot	1:d0dfbce63a89	3136	* @brief Get ADC group regular conversion trigger polarity.
elmot	1:d0dfbce63a89	3137	* @note Applicable only for trigger source set to external trigger.
elmot	1:d0dfbce63a89	3138	* @rmtoll CFGR EXTEN LL_ADC_REG_GetTriggerEdge
elmot	1:d0dfbce63a89	3139	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3140	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	3141	* @arg @ref LL_ADC_REG_TRIG_EXT_RISING
elmot	1:d0dfbce63a89	3142	* @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
elmot	1:d0dfbce63a89	3143	* @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
elmot	1:d0dfbce63a89	3144	*/
elmot	1:d0dfbce63a89	3145	__STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerEdge(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	3146	{
elmot	1:d0dfbce63a89	3147	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN));
elmot	1:d0dfbce63a89	3148	}
elmot	1:d0dfbce63a89	3149
elmot	1:d0dfbce63a89	3150
elmot	1:d0dfbce63a89	3151	/**
elmot	1:d0dfbce63a89	3152	* @brief Set ADC group regular sequencer length and scan direction.
elmot	1:d0dfbce63a89	3153	* @note Description of ADC group regular sequencer features:
elmot	1:d0dfbce63a89	3154	* - For devices with sequencer fully configurable
elmot	1:d0dfbce63a89	3155	* (function "LL_ADC_REG_SetSequencerRanks()" available):
elmot	1:d0dfbce63a89	3156	* sequencer length and each rank affectation to a channel
elmot	1:d0dfbce63a89	3157	* are configurable.
elmot	1:d0dfbce63a89	3158	* This function performs configuration of:
elmot	1:d0dfbce63a89	3159	* - Sequence length: Number of ranks in the scan sequence.
elmot	1:d0dfbce63a89	3160	* - Sequence direction: Unless specified in parameters, sequencer
elmot	1:d0dfbce63a89	3161	* scan direction is forward (from rank 1 to rank n).
elmot	1:d0dfbce63a89	3162	* Sequencer ranks are selected using
elmot	1:d0dfbce63a89	3163	* function "LL_ADC_REG_SetSequencerRanks()".
elmot	1:d0dfbce63a89	3164	* - For devices with sequencer not fully configurable
elmot	1:d0dfbce63a89	3165	* (function "LL_ADC_REG_SetSequencerChannels()" available):
elmot	1:d0dfbce63a89	3166	* sequencer length and each rank affectation to a channel
elmot	1:d0dfbce63a89	3167	* are defined by channel number.
elmot	1:d0dfbce63a89	3168	* This function performs configuration of:
elmot	1:d0dfbce63a89	3169	* - Sequence length: Number of ranks in the scan sequence is
elmot	1:d0dfbce63a89	3170	* defined by number of channels set in the sequence,
elmot	1:d0dfbce63a89	3171	* rank of each channel is fixed by channel HW number.
elmot	1:d0dfbce63a89	3172	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
elmot	1:d0dfbce63a89	3173	* - Sequence direction: Unless specified in parameters, sequencer
elmot	1:d0dfbce63a89	3174	* scan direction is forward (from lowest channel number to
elmot	1:d0dfbce63a89	3175	* highest channel number).
elmot	1:d0dfbce63a89	3176	* Sequencer ranks are selected using
elmot	1:d0dfbce63a89	3177	* function "LL_ADC_REG_SetSequencerChannels()".
elmot	1:d0dfbce63a89	3178	* @note Sequencer disabled is equivalent to sequencer of 1 rank:
elmot	1:d0dfbce63a89	3179	* ADC conversion on only 1 channel.
elmot	1:d0dfbce63a89	3180	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	3181	* ADC state:
elmot	1:d0dfbce63a89	3182	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	3183	* on group regular.
elmot	1:d0dfbce63a89	3184	* @rmtoll SQR1 L LL_ADC_REG_SetSequencerLength
elmot	1:d0dfbce63a89	3185	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3186	* @param SequencerNbRanks This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3187	* @arg @ref LL_ADC_REG_SEQ_SCAN_DISABLE
elmot	1:d0dfbce63a89	3188	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS
elmot	1:d0dfbce63a89	3189	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS
elmot	1:d0dfbce63a89	3190	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS
elmot	1:d0dfbce63a89	3191	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS
elmot	1:d0dfbce63a89	3192	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS
elmot	1:d0dfbce63a89	3193	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS
elmot	1:d0dfbce63a89	3194	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS
elmot	1:d0dfbce63a89	3195	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS
elmot	1:d0dfbce63a89	3196	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS
elmot	1:d0dfbce63a89	3197	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS
elmot	1:d0dfbce63a89	3198	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS
elmot	1:d0dfbce63a89	3199	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS
elmot	1:d0dfbce63a89	3200	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS
elmot	1:d0dfbce63a89	3201	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS
elmot	1:d0dfbce63a89	3202	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS
elmot	1:d0dfbce63a89	3203	* @retval None
elmot	1:d0dfbce63a89	3204	*/
elmot	1:d0dfbce63a89	3205	__STATIC_INLINE void LL_ADC_REG_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks)
elmot	1:d0dfbce63a89	3206	{
elmot	1:d0dfbce63a89	3207	MODIFY_REG(ADCx->SQR1, ADC_SQR1_L, SequencerNbRanks);
elmot	1:d0dfbce63a89	3208	}
elmot	1:d0dfbce63a89	3209
elmot	1:d0dfbce63a89	3210	/**
elmot	1:d0dfbce63a89	3211	* @brief Get ADC group regular sequencer length and scan direction.
elmot	1:d0dfbce63a89	3212	* @note Description of ADC group regular sequencer features:
elmot	1:d0dfbce63a89	3213	* - For devices with sequencer fully configurable
elmot	1:d0dfbce63a89	3214	* (function "LL_ADC_REG_SetSequencerRanks()" available):
elmot	1:d0dfbce63a89	3215	* sequencer length and each rank affectation to a channel
elmot	1:d0dfbce63a89	3216	* are configurable.
elmot	1:d0dfbce63a89	3217	* This function retrieves:
elmot	1:d0dfbce63a89	3218	* - Sequence length: Number of ranks in the scan sequence.
elmot	1:d0dfbce63a89	3219	* - Sequence direction: Unless specified in parameters, sequencer
elmot	1:d0dfbce63a89	3220	* scan direction is forward (from rank 1 to rank n).
elmot	1:d0dfbce63a89	3221	* Sequencer ranks are selected using
elmot	1:d0dfbce63a89	3222	* function "LL_ADC_REG_SetSequencerRanks()".
elmot	1:d0dfbce63a89	3223	* - For devices with sequencer not fully configurable
elmot	1:d0dfbce63a89	3224	* (function "LL_ADC_REG_SetSequencerChannels()" available):
elmot	1:d0dfbce63a89	3225	* sequencer length and each rank affectation to a channel
elmot	1:d0dfbce63a89	3226	* are defined by channel number.
elmot	1:d0dfbce63a89	3227	* This function retrieves:
elmot	1:d0dfbce63a89	3228	* - Sequence length: Number of ranks in the scan sequence is
elmot	1:d0dfbce63a89	3229	* defined by number of channels set in the sequence,
elmot	1:d0dfbce63a89	3230	* rank of each channel is fixed by channel HW number.
elmot	1:d0dfbce63a89	3231	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
elmot	1:d0dfbce63a89	3232	* - Sequence direction: Unless specified in parameters, sequencer
elmot	1:d0dfbce63a89	3233	* scan direction is forward (from lowest channel number to
elmot	1:d0dfbce63a89	3234	* highest channel number).
elmot	1:d0dfbce63a89	3235	* Sequencer ranks are selected using
elmot	1:d0dfbce63a89	3236	* function "LL_ADC_REG_SetSequencerChannels()".
elmot	1:d0dfbce63a89	3237	* @note Sequencer disabled is equivalent to sequencer of 1 rank:
elmot	1:d0dfbce63a89	3238	* ADC conversion on only 1 channel.
elmot	1:d0dfbce63a89	3239	* @rmtoll SQR1 L LL_ADC_REG_GetSequencerLength
elmot	1:d0dfbce63a89	3240	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3241	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	3242	* @arg @ref LL_ADC_REG_SEQ_SCAN_DISABLE
elmot	1:d0dfbce63a89	3243	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS
elmot	1:d0dfbce63a89	3244	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS
elmot	1:d0dfbce63a89	3245	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS
elmot	1:d0dfbce63a89	3246	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS
elmot	1:d0dfbce63a89	3247	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS
elmot	1:d0dfbce63a89	3248	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS
elmot	1:d0dfbce63a89	3249	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS
elmot	1:d0dfbce63a89	3250	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS
elmot	1:d0dfbce63a89	3251	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS
elmot	1:d0dfbce63a89	3252	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS
elmot	1:d0dfbce63a89	3253	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS
elmot	1:d0dfbce63a89	3254	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS
elmot	1:d0dfbce63a89	3255	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS
elmot	1:d0dfbce63a89	3256	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS
elmot	1:d0dfbce63a89	3257	* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS
elmot	1:d0dfbce63a89	3258	*/
elmot	1:d0dfbce63a89	3259	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerLength(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	3260	{
elmot	1:d0dfbce63a89	3261	return (uint32_t)(READ_BIT(ADCx->SQR1, ADC_SQR1_L));
elmot	1:d0dfbce63a89	3262	}
elmot	1:d0dfbce63a89	3263
elmot	1:d0dfbce63a89	3264	/**
elmot	1:d0dfbce63a89	3265	* @brief Set ADC group regular sequencer discontinuous mode:
elmot	1:d0dfbce63a89	3266	* sequence subdivided and scan conversions interrupted every selected
elmot	1:d0dfbce63a89	3267	* number of ranks.
elmot	1:d0dfbce63a89	3268	* @note It is not possible to enable both ADC group regular
elmot	1:d0dfbce63a89	3269	* continuous mode and sequencer discontinuous mode.
elmot	1:d0dfbce63a89	3270	* @note It is not possible to enable both ADC auto-injected mode
elmot	1:d0dfbce63a89	3271	* and ADC group regular sequencer discontinuous mode.
elmot	1:d0dfbce63a89	3272	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	3273	* ADC state:
elmot	1:d0dfbce63a89	3274	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	3275	* on group regular.
elmot	1:d0dfbce63a89	3276	* @rmtoll CFGR DISCEN LL_ADC_REG_SetSequencerDiscont\n
elmot	1:d0dfbce63a89	3277	* CFGR DISCNUM LL_ADC_REG_SetSequencerDiscont
elmot	1:d0dfbce63a89	3278	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3279	* @param SeqDiscont This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3280	* @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
elmot	1:d0dfbce63a89	3281	* @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
elmot	1:d0dfbce63a89	3282	* @arg @ref LL_ADC_REG_SEQ_DISCONT_2RANKS
elmot	1:d0dfbce63a89	3283	* @arg @ref LL_ADC_REG_SEQ_DISCONT_3RANKS
elmot	1:d0dfbce63a89	3284	* @arg @ref LL_ADC_REG_SEQ_DISCONT_4RANKS
elmot	1:d0dfbce63a89	3285	* @arg @ref LL_ADC_REG_SEQ_DISCONT_5RANKS
elmot	1:d0dfbce63a89	3286	* @arg @ref LL_ADC_REG_SEQ_DISCONT_6RANKS
elmot	1:d0dfbce63a89	3287	* @arg @ref LL_ADC_REG_SEQ_DISCONT_7RANKS
elmot	1:d0dfbce63a89	3288	* @arg @ref LL_ADC_REG_SEQ_DISCONT_8RANKS
elmot	1:d0dfbce63a89	3289	* @retval None
elmot	1:d0dfbce63a89	3290	*/
elmot	1:d0dfbce63a89	3291	__STATIC_INLINE void LL_ADC_REG_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont)
elmot	1:d0dfbce63a89	3292	{
elmot	1:d0dfbce63a89	3293	MODIFY_REG(ADCx->CFGR, ADC_CFGR_DISCEN \| ADC_CFGR_DISCNUM, SeqDiscont);
elmot	1:d0dfbce63a89	3294	}
elmot	1:d0dfbce63a89	3295
elmot	1:d0dfbce63a89	3296	/**
elmot	1:d0dfbce63a89	3297	* @brief Get ADC group regular sequencer discontinuous mode:
elmot	1:d0dfbce63a89	3298	* sequence subdivided and scan conversions interrupted every selected
elmot	1:d0dfbce63a89	3299	* number of ranks.
elmot	1:d0dfbce63a89	3300	* @rmtoll CFGR DISCEN LL_ADC_REG_GetSequencerDiscont\n
elmot	1:d0dfbce63a89	3301	* CFGR DISCNUM LL_ADC_REG_GetSequencerDiscont
elmot	1:d0dfbce63a89	3302	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3303	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	3304	* @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
elmot	1:d0dfbce63a89	3305	* @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
elmot	1:d0dfbce63a89	3306	* @arg @ref LL_ADC_REG_SEQ_DISCONT_2RANKS
elmot	1:d0dfbce63a89	3307	* @arg @ref LL_ADC_REG_SEQ_DISCONT_3RANKS
elmot	1:d0dfbce63a89	3308	* @arg @ref LL_ADC_REG_SEQ_DISCONT_4RANKS
elmot	1:d0dfbce63a89	3309	* @arg @ref LL_ADC_REG_SEQ_DISCONT_5RANKS
elmot	1:d0dfbce63a89	3310	* @arg @ref LL_ADC_REG_SEQ_DISCONT_6RANKS
elmot	1:d0dfbce63a89	3311	* @arg @ref LL_ADC_REG_SEQ_DISCONT_7RANKS
elmot	1:d0dfbce63a89	3312	* @arg @ref LL_ADC_REG_SEQ_DISCONT_8RANKS
elmot	1:d0dfbce63a89	3313	*/
elmot	1:d0dfbce63a89	3314	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerDiscont(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	3315	{
elmot	1:d0dfbce63a89	3316	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_DISCEN \| ADC_CFGR_DISCNUM));
elmot	1:d0dfbce63a89	3317	}
elmot	1:d0dfbce63a89	3318
elmot	1:d0dfbce63a89	3319	/**
elmot	1:d0dfbce63a89	3320	* @brief Set ADC group regular sequence: channel on the selected
elmot	1:d0dfbce63a89	3321	* scan sequence rank.
elmot	1:d0dfbce63a89	3322	* @note This function performs configuration of:
elmot	1:d0dfbce63a89	3323	* - Channels ordering into each rank of scan sequence:
elmot	1:d0dfbce63a89	3324	* whatever channel can be placed into whatever rank.
elmot	1:d0dfbce63a89	3325	* @note On this STM32 serie, ADC group regular sequencer is
elmot	1:d0dfbce63a89	3326	* fully configurable: sequencer length and each rank
elmot	1:d0dfbce63a89	3327	* affectation to a channel are configurable.
elmot	1:d0dfbce63a89	3328	* Refer to description of function @ref LL_ADC_REG_SetSequencerLength().
elmot	1:d0dfbce63a89	3329	* @note Depending on devices and packages, some channels may not be available.
elmot	1:d0dfbce63a89	3330	* Refer to device datasheet for channels availability.
elmot	1:d0dfbce63a89	3331	* @note On this STM32 serie, to measure internal channels (VrefInt,
elmot	1:d0dfbce63a89	3332	* TempSensor, ...), measurement paths to internal channels must be
elmot	1:d0dfbce63a89	3333	* enabled separately.
elmot	1:d0dfbce63a89	3334	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
elmot	1:d0dfbce63a89	3335	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	3336	* ADC state:
elmot	1:d0dfbce63a89	3337	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	3338	* on group regular.
elmot	1:d0dfbce63a89	3339	* @rmtoll SQR1 SQ1 LL_ADC_REG_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3340	* SQR1 SQ2 LL_ADC_REG_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3341	* SQR1 SQ3 LL_ADC_REG_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3342	* SQR1 SQ4 LL_ADC_REG_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3343	* SQR2 SQ5 LL_ADC_REG_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3344	* SQR2 SQ6 LL_ADC_REG_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3345	* SQR2 SQ7 LL_ADC_REG_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3346	* SQR2 SQ8 LL_ADC_REG_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3347	* SQR2 SQ9 LL_ADC_REG_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3348	* SQR3 SQ10 LL_ADC_REG_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3349	* SQR3 SQ11 LL_ADC_REG_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3350	* SQR3 SQ12 LL_ADC_REG_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3351	* SQR3 SQ13 LL_ADC_REG_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3352	* SQR3 SQ14 LL_ADC_REG_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3353	* SQR4 SQ15 LL_ADC_REG_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3354	* SQR4 SQ16 LL_ADC_REG_SetSequencerRanks
elmot	1:d0dfbce63a89	3355	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3356	* @param Rank This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3357	* @arg @ref LL_ADC_REG_RANK_1
elmot	1:d0dfbce63a89	3358	* @arg @ref LL_ADC_REG_RANK_2
elmot	1:d0dfbce63a89	3359	* @arg @ref LL_ADC_REG_RANK_3
elmot	1:d0dfbce63a89	3360	* @arg @ref LL_ADC_REG_RANK_4
elmot	1:d0dfbce63a89	3361	* @arg @ref LL_ADC_REG_RANK_5
elmot	1:d0dfbce63a89	3362	* @arg @ref LL_ADC_REG_RANK_6
elmot	1:d0dfbce63a89	3363	* @arg @ref LL_ADC_REG_RANK_7
elmot	1:d0dfbce63a89	3364	* @arg @ref LL_ADC_REG_RANK_8
elmot	1:d0dfbce63a89	3365	* @arg @ref LL_ADC_REG_RANK_9
elmot	1:d0dfbce63a89	3366	* @arg @ref LL_ADC_REG_RANK_10
elmot	1:d0dfbce63a89	3367	* @arg @ref LL_ADC_REG_RANK_11
elmot	1:d0dfbce63a89	3368	* @arg @ref LL_ADC_REG_RANK_12
elmot	1:d0dfbce63a89	3369	* @arg @ref LL_ADC_REG_RANK_13
elmot	1:d0dfbce63a89	3370	* @arg @ref LL_ADC_REG_RANK_14
elmot	1:d0dfbce63a89	3371	* @arg @ref LL_ADC_REG_RANK_15
elmot	1:d0dfbce63a89	3372	* @arg @ref LL_ADC_REG_RANK_16
elmot	1:d0dfbce63a89	3373	* @param Channel This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3374	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	3375	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	3376	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	3377	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	3378	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	3379	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	3380	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	3381	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	3382	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	3383	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	3384	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	3385	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	3386	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	3387	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	3388	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	3389	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	3390	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	3391	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	3392	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	3393	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	3394	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	3395	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	3396	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	3397	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	3398	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	3399	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	3400	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	3401	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	3402	*
elmot	1:d0dfbce63a89	3403	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	3404	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	3405	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	3406	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	3407	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	3408	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	3409	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	3410	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
elmot	1:d0dfbce63a89	3411	* @retval None
elmot	1:d0dfbce63a89	3412	*/
elmot	1:d0dfbce63a89	3413	__STATIC_INLINE void LL_ADC_REG_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channel)
elmot	1:d0dfbce63a89	3414	{
elmot	1:d0dfbce63a89	3415	/* Set bits with content of parameter "Channel" with bits position */
elmot	1:d0dfbce63a89	3416	/* in register and register position depending on parameter "Rank". */
elmot	1:d0dfbce63a89	3417	/* Parameters "Rank" and "Channel" are used with masks because containing */
elmot	1:d0dfbce63a89	3418	/* other bits reserved for other purpose. */
elmot	1:d0dfbce63a89	3419	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REGOFFSET_MASK));
elmot	1:d0dfbce63a89	3420
elmot	1:d0dfbce63a89	3421	MODIFY_REG(*preg,
elmot	1:d0dfbce63a89	3422	ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MASK),
elmot	1:d0dfbce63a89	3423	(Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> (ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS - (Rank & ADC_REG_RANK_ID_SQRX_MASK)));
elmot	1:d0dfbce63a89	3424	}
elmot	1:d0dfbce63a89	3425
elmot	1:d0dfbce63a89	3426	/**
elmot	1:d0dfbce63a89	3427	* @brief Get ADC group regular sequence: channel on the selected
elmot	1:d0dfbce63a89	3428	* scan sequence rank.
elmot	1:d0dfbce63a89	3429	* @note On this STM32 serie, ADC group regular sequencer is
elmot	1:d0dfbce63a89	3430	* fully configurable: sequencer length and each rank
elmot	1:d0dfbce63a89	3431	* affectation to a channel are configurable.
elmot	1:d0dfbce63a89	3432	* Refer to description of function @ref LL_ADC_REG_SetSequencerLength().
elmot	1:d0dfbce63a89	3433	* @note Depending on devices and packages, some channels may not be available.
elmot	1:d0dfbce63a89	3434	* Refer to device datasheet for channels availability.
elmot	1:d0dfbce63a89	3435	* @note Usage of the returned channel number:
elmot	1:d0dfbce63a89	3436	* - To reinject this channel into another function LL_ADC_xxx:
elmot	1:d0dfbce63a89	3437	* the returned channel number is only partly formatted on definition
elmot	1:d0dfbce63a89	3438	* of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
elmot	1:d0dfbce63a89	3439	* with parts of literals LL_ADC_CHANNEL_x or using
elmot	1:d0dfbce63a89	3440	* helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
elmot	1:d0dfbce63a89	3441	* Then the selected literal LL_ADC_CHANNEL_x can be used
elmot	1:d0dfbce63a89	3442	* as parameter for another function.
elmot	1:d0dfbce63a89	3443	* - To get the channel number in decimal format:
elmot	1:d0dfbce63a89	3444	* process the returned value with the helper macro
elmot	1:d0dfbce63a89	3445	* @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
elmot	1:d0dfbce63a89	3446	* @rmtoll SQR1 SQ1 LL_ADC_REG_GetSequencerRanks\n
elmot	1:d0dfbce63a89	3447	* SQR1 SQ2 LL_ADC_REG_GetSequencerRanks\n
elmot	1:d0dfbce63a89	3448	* SQR1 SQ3 LL_ADC_REG_GetSequencerRanks\n
elmot	1:d0dfbce63a89	3449	* SQR1 SQ4 LL_ADC_REG_GetSequencerRanks\n
elmot	1:d0dfbce63a89	3450	* SQR2 SQ5 LL_ADC_REG_GetSequencerRanks\n
elmot	1:d0dfbce63a89	3451	* SQR2 SQ6 LL_ADC_REG_GetSequencerRanks\n
elmot	1:d0dfbce63a89	3452	* SQR2 SQ7 LL_ADC_REG_GetSequencerRanks\n
elmot	1:d0dfbce63a89	3453	* SQR2 SQ8 LL_ADC_REG_GetSequencerRanks\n
elmot	1:d0dfbce63a89	3454	* SQR2 SQ9 LL_ADC_REG_GetSequencerRanks\n
elmot	1:d0dfbce63a89	3455	* SQR3 SQ10 LL_ADC_REG_GetSequencerRanks\n
elmot	1:d0dfbce63a89	3456	* SQR3 SQ11 LL_ADC_REG_GetSequencerRanks\n
elmot	1:d0dfbce63a89	3457	* SQR3 SQ12 LL_ADC_REG_GetSequencerRanks\n
elmot	1:d0dfbce63a89	3458	* SQR3 SQ13 LL_ADC_REG_GetSequencerRanks\n
elmot	1:d0dfbce63a89	3459	* SQR3 SQ14 LL_ADC_REG_GetSequencerRanks\n
elmot	1:d0dfbce63a89	3460	* SQR4 SQ15 LL_ADC_REG_GetSequencerRanks\n
elmot	1:d0dfbce63a89	3461	* SQR4 SQ16 LL_ADC_REG_GetSequencerRanks
elmot	1:d0dfbce63a89	3462	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3463	* @param Rank This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3464	* @arg @ref LL_ADC_REG_RANK_1
elmot	1:d0dfbce63a89	3465	* @arg @ref LL_ADC_REG_RANK_2
elmot	1:d0dfbce63a89	3466	* @arg @ref LL_ADC_REG_RANK_3
elmot	1:d0dfbce63a89	3467	* @arg @ref LL_ADC_REG_RANK_4
elmot	1:d0dfbce63a89	3468	* @arg @ref LL_ADC_REG_RANK_5
elmot	1:d0dfbce63a89	3469	* @arg @ref LL_ADC_REG_RANK_6
elmot	1:d0dfbce63a89	3470	* @arg @ref LL_ADC_REG_RANK_7
elmot	1:d0dfbce63a89	3471	* @arg @ref LL_ADC_REG_RANK_8
elmot	1:d0dfbce63a89	3472	* @arg @ref LL_ADC_REG_RANK_9
elmot	1:d0dfbce63a89	3473	* @arg @ref LL_ADC_REG_RANK_10
elmot	1:d0dfbce63a89	3474	* @arg @ref LL_ADC_REG_RANK_11
elmot	1:d0dfbce63a89	3475	* @arg @ref LL_ADC_REG_RANK_12
elmot	1:d0dfbce63a89	3476	* @arg @ref LL_ADC_REG_RANK_13
elmot	1:d0dfbce63a89	3477	* @arg @ref LL_ADC_REG_RANK_14
elmot	1:d0dfbce63a89	3478	* @arg @ref LL_ADC_REG_RANK_15
elmot	1:d0dfbce63a89	3479	* @arg @ref LL_ADC_REG_RANK_16
elmot	1:d0dfbce63a89	3480	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	3481	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	3482	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	3483	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	3484	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	3485	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	3486	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	3487	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	3488	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	3489	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	3490	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	3491	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	3492	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	3493	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	3494	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	3495	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	3496	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	3497	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	3498	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	3499	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	3500	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	3501	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	3502	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	3503	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	3504	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	3505	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	3506	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	3507	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	3508	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	3509	*
elmot	1:d0dfbce63a89	3510	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	3511	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	3512	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	3513	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	3514	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	3515	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	3516	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	3517	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).\n
elmot	1:d0dfbce63a89	3518	* (1, 2, 3, 4) For ADC channel read back from ADC register,
elmot	1:d0dfbce63a89	3519	* comparison with internal channel parameter to be done
elmot	1:d0dfbce63a89	3520	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
elmot	1:d0dfbce63a89	3521	*/
elmot	1:d0dfbce63a89	3522	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank)
elmot	1:d0dfbce63a89	3523	{
elmot	1:d0dfbce63a89	3524	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REGOFFSET_MASK));
elmot	1:d0dfbce63a89	3525
elmot	1:d0dfbce63a89	3526	return (uint32_t) (READ_BIT(*preg,
elmot	1:d0dfbce63a89	3527	ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MASK))
elmot	1:d0dfbce63a89	3528	<< (ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS - (Rank & ADC_REG_RANK_ID_SQRX_MASK))
elmot	1:d0dfbce63a89	3529	);
elmot	1:d0dfbce63a89	3530	}
elmot	1:d0dfbce63a89	3531
elmot	1:d0dfbce63a89	3532	/**
elmot	1:d0dfbce63a89	3533	* @brief Set ADC continuous conversion mode on ADC group regular.
elmot	1:d0dfbce63a89	3534	* @note Description of ADC continuous conversion mode:
elmot	1:d0dfbce63a89	3535	* - single mode: one conversion per trigger
elmot	1:d0dfbce63a89	3536	* - continuous mode: after the first trigger, following
elmot	1:d0dfbce63a89	3537	* conversions launched successively automatically.
elmot	1:d0dfbce63a89	3538	* @note It is not possible to enable both ADC group regular
elmot	1:d0dfbce63a89	3539	* continuous mode and sequencer discontinuous mode.
elmot	1:d0dfbce63a89	3540	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	3541	* ADC state:
elmot	1:d0dfbce63a89	3542	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	3543	* on group regular.
elmot	1:d0dfbce63a89	3544	* @rmtoll CFGR CONT LL_ADC_REG_SetContinuousMode
elmot	1:d0dfbce63a89	3545	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3546	* @param Continuous This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3547	* @arg @ref LL_ADC_REG_CONV_SINGLE
elmot	1:d0dfbce63a89	3548	* @arg @ref LL_ADC_REG_CONV_CONTINUOUS
elmot	1:d0dfbce63a89	3549	* @retval None
elmot	1:d0dfbce63a89	3550	*/
elmot	1:d0dfbce63a89	3551	__STATIC_INLINE void LL_ADC_REG_SetContinuousMode(ADC_TypeDef *ADCx, uint32_t Continuous)
elmot	1:d0dfbce63a89	3552	{
elmot	1:d0dfbce63a89	3553	MODIFY_REG(ADCx->CFGR, ADC_CFGR_CONT, Continuous);
elmot	1:d0dfbce63a89	3554	}
elmot	1:d0dfbce63a89	3555
elmot	1:d0dfbce63a89	3556	/**
elmot	1:d0dfbce63a89	3557	* @brief Get ADC continuous conversion mode on ADC group regular.
elmot	1:d0dfbce63a89	3558	* @note Description of ADC continuous conversion mode:
elmot	1:d0dfbce63a89	3559	* - single mode: one conversion per trigger
elmot	1:d0dfbce63a89	3560	* - continuous mode: after the first trigger, following
elmot	1:d0dfbce63a89	3561	* conversions launched successively automatically.
elmot	1:d0dfbce63a89	3562	* @rmtoll CFGR CONT LL_ADC_REG_GetContinuousMode
elmot	1:d0dfbce63a89	3563	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3564	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	3565	* @arg @ref LL_ADC_REG_CONV_SINGLE
elmot	1:d0dfbce63a89	3566	* @arg @ref LL_ADC_REG_CONV_CONTINUOUS
elmot	1:d0dfbce63a89	3567	*/
elmot	1:d0dfbce63a89	3568	__STATIC_INLINE uint32_t LL_ADC_REG_GetContinuousMode(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	3569	{
elmot	1:d0dfbce63a89	3570	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_CONT));
elmot	1:d0dfbce63a89	3571	}
elmot	1:d0dfbce63a89	3572
elmot	1:d0dfbce63a89	3573	/**
elmot	1:d0dfbce63a89	3574	* @brief Set ADC group regular conversion data transfer: no transfer or
elmot	1:d0dfbce63a89	3575	* transfer by DMA, and DMA requests mode.
elmot	1:d0dfbce63a89	3576	* @note If transfer by DMA selected, specifies the DMA requests
elmot	1:d0dfbce63a89	3577	* mode:
elmot	1:d0dfbce63a89	3578	* - Limited mode (One shot mode): DMA transfer requests are stopped
elmot	1:d0dfbce63a89	3579	* when number of DMA data transfers (number of
elmot	1:d0dfbce63a89	3580	* ADC conversions) is reached.
elmot	1:d0dfbce63a89	3581	* This ADC mode is intended to be used with DMA mode non-circular.
elmot	1:d0dfbce63a89	3582	* - Unlimited mode: DMA transfer requests are unlimited,
elmot	1:d0dfbce63a89	3583	* whatever number of DMA data transfers (number of
elmot	1:d0dfbce63a89	3584	* ADC conversions).
elmot	1:d0dfbce63a89	3585	* This ADC mode is intended to be used with DMA mode circular.
elmot	1:d0dfbce63a89	3586	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
elmot	1:d0dfbce63a89	3587	* mode non-circular:
elmot	1:d0dfbce63a89	3588	* when DMA transfers size will be reached, DMA will stop transfers of
elmot	1:d0dfbce63a89	3589	* ADC conversions data ADC will raise an overrun error
elmot	1:d0dfbce63a89	3590	* (overrun flag and interruption if enabled).
elmot	1:d0dfbce63a89	3591	* @note For devices with several ADC instances: ADC multimode DMA
elmot	1:d0dfbce63a89	3592	* settings are available using function @ref LL_ADC_SetMultiDMATransfer().
elmot	1:d0dfbce63a89	3593	* @note To configure DMA source address (peripheral address),
elmot	1:d0dfbce63a89	3594	* use function @ref LL_ADC_DMA_GetRegAddr().
elmot	1:d0dfbce63a89	3595	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	3596	* ADC state:
elmot	1:d0dfbce63a89	3597	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	3598	* on either groups regular or injected.
elmot	1:d0dfbce63a89	3599	* @rmtoll CFGR DMAEN LL_ADC_REG_SetDMATransfer\n
elmot	1:d0dfbce63a89	3600	* CFGR DMACFG LL_ADC_REG_SetDMATransfer
elmot	1:d0dfbce63a89	3601	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3602	* @param DMATransfer This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3603	* @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
elmot	1:d0dfbce63a89	3604	* @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
elmot	1:d0dfbce63a89	3605	* @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
elmot	1:d0dfbce63a89	3606	* @retval None
elmot	1:d0dfbce63a89	3607	*/
elmot	1:d0dfbce63a89	3608	__STATIC_INLINE void LL_ADC_REG_SetDMATransfer(ADC_TypeDef *ADCx, uint32_t DMATransfer)
elmot	1:d0dfbce63a89	3609	{
elmot	1:d0dfbce63a89	3610	MODIFY_REG(ADCx->CFGR, ADC_CFGR_DMAEN \| ADC_CFGR_DMACFG, DMATransfer);
elmot	1:d0dfbce63a89	3611	}
elmot	1:d0dfbce63a89	3612
elmot	1:d0dfbce63a89	3613	/**
elmot	1:d0dfbce63a89	3614	* @brief Get ADC group regular conversion data transfer: no transfer or
elmot	1:d0dfbce63a89	3615	* transfer by DMA, and DMA requests mode.
elmot	1:d0dfbce63a89	3616	* @note If transfer by DMA selected, specifies the DMA requests
elmot	1:d0dfbce63a89	3617	* mode:
elmot	1:d0dfbce63a89	3618	* - Limited mode (One shot mode): DMA transfer requests are stopped
elmot	1:d0dfbce63a89	3619	* when number of DMA data transfers (number of
elmot	1:d0dfbce63a89	3620	* ADC conversions) is reached.
elmot	1:d0dfbce63a89	3621	* This ADC mode is intended to be used with DMA mode non-circular.
elmot	1:d0dfbce63a89	3622	* - Unlimited mode: DMA transfer requests are unlimited,
elmot	1:d0dfbce63a89	3623	* whatever number of DMA data transfers (number of
elmot	1:d0dfbce63a89	3624	* ADC conversions).
elmot	1:d0dfbce63a89	3625	* This ADC mode is intended to be used with DMA mode circular.
elmot	1:d0dfbce63a89	3626	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
elmot	1:d0dfbce63a89	3627	* mode non-circular:
elmot	1:d0dfbce63a89	3628	* when DMA transfers size will be reached, DMA will stop transfers of
elmot	1:d0dfbce63a89	3629	* ADC conversions data ADC will raise an overrun error
elmot	1:d0dfbce63a89	3630	* (overrun flag and interruption if enabled).
elmot	1:d0dfbce63a89	3631	* @note For devices with several ADC instances: ADC multimode DMA
elmot	1:d0dfbce63a89	3632	* settings are available using function @ref LL_ADC_GetMultiDMATransfer().
elmot	1:d0dfbce63a89	3633	* @note To configure DMA source address (peripheral address),
elmot	1:d0dfbce63a89	3634	* use function @ref LL_ADC_DMA_GetRegAddr().
elmot	1:d0dfbce63a89	3635	* @rmtoll CFGR DMAEN LL_ADC_REG_GetDMATransfer\n
elmot	1:d0dfbce63a89	3636	* CFGR DMACFG LL_ADC_REG_GetDMATransfer
elmot	1:d0dfbce63a89	3637	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3638	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	3639	* @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
elmot	1:d0dfbce63a89	3640	* @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
elmot	1:d0dfbce63a89	3641	* @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
elmot	1:d0dfbce63a89	3642	*/
elmot	1:d0dfbce63a89	3643	__STATIC_INLINE uint32_t LL_ADC_REG_GetDMATransfer(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	3644	{
elmot	1:d0dfbce63a89	3645	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_DMAEN \| ADC_CFGR_DMACFG));
elmot	1:d0dfbce63a89	3646	}
elmot	1:d0dfbce63a89	3647
elmot	1:d0dfbce63a89	3648
elmot	1:d0dfbce63a89	3649	/**
elmot	1:d0dfbce63a89	3650	* @brief Set ADC group regular behavior in case of overrun:
elmot	1:d0dfbce63a89	3651	* data preserved or overwritten.
elmot	1:d0dfbce63a89	3652	* @note Compatibility with devices without feature overrun:
elmot	1:d0dfbce63a89	3653	* other devices without this feature have a behavior
elmot	1:d0dfbce63a89	3654	* equivalent to data overwritten.
elmot	1:d0dfbce63a89	3655	* The default setting of overrun is data preserved.
elmot	1:d0dfbce63a89	3656	* Therefore, for compatibility with all devices, parameter
elmot	1:d0dfbce63a89	3657	* overrun should be set to data overwritten.
elmot	1:d0dfbce63a89	3658	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	3659	* ADC state:
elmot	1:d0dfbce63a89	3660	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	3661	* on group regular.
elmot	1:d0dfbce63a89	3662	* @rmtoll CFGR OVRMOD LL_ADC_REG_SetOverrun
elmot	1:d0dfbce63a89	3663	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3664	* @param Overrun This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3665	* @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
elmot	1:d0dfbce63a89	3666	* @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
elmot	1:d0dfbce63a89	3667	* @retval None
elmot	1:d0dfbce63a89	3668	*/
elmot	1:d0dfbce63a89	3669	__STATIC_INLINE void LL_ADC_REG_SetOverrun(ADC_TypeDef *ADCx, uint32_t Overrun)
elmot	1:d0dfbce63a89	3670	{
elmot	1:d0dfbce63a89	3671	MODIFY_REG(ADCx->CFGR, ADC_CFGR_OVRMOD, Overrun);
elmot	1:d0dfbce63a89	3672	}
elmot	1:d0dfbce63a89	3673
elmot	1:d0dfbce63a89	3674	/**
elmot	1:d0dfbce63a89	3675	* @brief Get ADC group regular behavior in case of overrun:
elmot	1:d0dfbce63a89	3676	* data preserved or overwritten.
elmot	1:d0dfbce63a89	3677	* @rmtoll CFGR OVRMOD LL_ADC_REG_GetOverrun
elmot	1:d0dfbce63a89	3678	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3679	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	3680	* @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
elmot	1:d0dfbce63a89	3681	* @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
elmot	1:d0dfbce63a89	3682	*/
elmot	1:d0dfbce63a89	3683	__STATIC_INLINE uint32_t LL_ADC_REG_GetOverrun(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	3684	{
elmot	1:d0dfbce63a89	3685	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_OVRMOD));
elmot	1:d0dfbce63a89	3686	}
elmot	1:d0dfbce63a89	3687
elmot	1:d0dfbce63a89	3688	/**
elmot	1:d0dfbce63a89	3689	* @}
elmot	1:d0dfbce63a89	3690	*/
elmot	1:d0dfbce63a89	3691
elmot	1:d0dfbce63a89	3692	/** @defgroup ADC_LL_EF_Configuration_ADC_Group_Injected Configuration of ADC hierarchical scope: group injected
elmot	1:d0dfbce63a89	3693	* @{
elmot	1:d0dfbce63a89	3694	*/
elmot	1:d0dfbce63a89	3695
elmot	1:d0dfbce63a89	3696	/**
elmot	1:d0dfbce63a89	3697	* @brief Set ADC group injected conversion trigger source:
elmot	1:d0dfbce63a89	3698	* internal (SW start) or from external IP (timer event,
elmot	1:d0dfbce63a89	3699	* external interrupt line).
elmot	1:d0dfbce63a89	3700	* @note On this STM32 serie, setting trigger source to external trigger
elmot	1:d0dfbce63a89	3701	* also set trigger polarity to rising edge
elmot	1:d0dfbce63a89	3702	* (default setting for compatibility with some ADC on other
elmot	1:d0dfbce63a89	3703	* STM32 families having this setting set by HW default value).
elmot	1:d0dfbce63a89	3704	* In case of need to modify trigger edge, use
elmot	1:d0dfbce63a89	3705	* function @ref LL_ADC_INJ_SetTriggerEdge().
elmot	1:d0dfbce63a89	3706	* @note Availability of parameters of trigger sources from timer
elmot	1:d0dfbce63a89	3707	* depends on timers availability on the selected device.
elmot	1:d0dfbce63a89	3708	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	3709	* ADC state:
elmot	1:d0dfbce63a89	3710	* ADC must not be disabled. Can be enabled with or without conversion
elmot	1:d0dfbce63a89	3711	* on going on either groups regular or injected.
elmot	1:d0dfbce63a89	3712	* @rmtoll JSQR JEXTSEL LL_ADC_INJ_SetTriggerSource\n
elmot	1:d0dfbce63a89	3713	* JSQR JEXTEN LL_ADC_INJ_SetTriggerSource
elmot	1:d0dfbce63a89	3714	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3715	* @param TriggerSource This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3716	* @arg @ref LL_ADC_INJ_TRIG_SOFTWARE
elmot	1:d0dfbce63a89	3717	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO
elmot	1:d0dfbce63a89	3718	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2
elmot	1:d0dfbce63a89	3719	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4
elmot	1:d0dfbce63a89	3720	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO
elmot	1:d0dfbce63a89	3721	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1
elmot	1:d0dfbce63a89	3722	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO
elmot	1:d0dfbce63a89	3723	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1
elmot	1:d0dfbce63a89	3724	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3
elmot	1:d0dfbce63a89	3725	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4
elmot	1:d0dfbce63a89	3726	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO
elmot	1:d0dfbce63a89	3727	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO
elmot	1:d0dfbce63a89	3728	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4
elmot	1:d0dfbce63a89	3729	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO
elmot	1:d0dfbce63a89	3730	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2
elmot	1:d0dfbce63a89	3731	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO
elmot	1:d0dfbce63a89	3732	* @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15
elmot	1:d0dfbce63a89	3733	* @retval None
elmot	1:d0dfbce63a89	3734	*/
elmot	1:d0dfbce63a89	3735	__STATIC_INLINE void LL_ADC_INJ_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
elmot	1:d0dfbce63a89	3736	{
elmot	1:d0dfbce63a89	3737	MODIFY_REG(ADCx->JSQR, ADC_JSQR_JEXTSEL \| ADC_JSQR_JEXTEN, TriggerSource);
elmot	1:d0dfbce63a89	3738	}
elmot	1:d0dfbce63a89	3739
elmot	1:d0dfbce63a89	3740	/**
elmot	1:d0dfbce63a89	3741	* @brief Get ADC group injected conversion trigger source:
elmot	1:d0dfbce63a89	3742	* internal (SW start) or from external IP (timer event,
elmot	1:d0dfbce63a89	3743	* external interrupt line).
elmot	1:d0dfbce63a89	3744	* @note To determine whether group injected trigger source is
elmot	1:d0dfbce63a89	3745	* internal (SW start) or external, without detail
elmot	1:d0dfbce63a89	3746	* of which peripheral is selected as external trigger,
elmot	1:d0dfbce63a89	3747	* (equivalent to
elmot	1:d0dfbce63a89	3748	* "if(LL_ADC_INJ_GetTriggerSource(ADC1) == LL_ADC_INJ_TRIG_SOFTWARE)")
elmot	1:d0dfbce63a89	3749	* use function @ref LL_ADC_INJ_IsTriggerSourceSWStart.
elmot	1:d0dfbce63a89	3750	* @note Availability of parameters of trigger sources from timer
elmot	1:d0dfbce63a89	3751	* depends on timers availability on the selected device.
elmot	1:d0dfbce63a89	3752	* @rmtoll JSQR JEXTSEL LL_ADC_INJ_GetTriggerSource\n
elmot	1:d0dfbce63a89	3753	* JSQR JEXTEN LL_ADC_INJ_GetTriggerSource
elmot	1:d0dfbce63a89	3754	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3755	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	3756	* @arg @ref LL_ADC_INJ_TRIG_SOFTWARE
elmot	1:d0dfbce63a89	3757	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO
elmot	1:d0dfbce63a89	3758	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2
elmot	1:d0dfbce63a89	3759	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4
elmot	1:d0dfbce63a89	3760	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO
elmot	1:d0dfbce63a89	3761	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1
elmot	1:d0dfbce63a89	3762	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO
elmot	1:d0dfbce63a89	3763	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1
elmot	1:d0dfbce63a89	3764	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3
elmot	1:d0dfbce63a89	3765	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4
elmot	1:d0dfbce63a89	3766	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO
elmot	1:d0dfbce63a89	3767	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO
elmot	1:d0dfbce63a89	3768	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4
elmot	1:d0dfbce63a89	3769	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO
elmot	1:d0dfbce63a89	3770	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2
elmot	1:d0dfbce63a89	3771	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO
elmot	1:d0dfbce63a89	3772	* @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15
elmot	1:d0dfbce63a89	3773	*/
elmot	1:d0dfbce63a89	3774	__STATIC_INLINE uint32_t LL_ADC_INJ_GetTriggerSource(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	3775	{
elmot	1:d0dfbce63a89	3776	register uint32_t TriggerSource = READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTSEL \| ADC_JSQR_JEXTEN);
elmot	1:d0dfbce63a89	3777
elmot	1:d0dfbce63a89	3778	/* Value for shift of {0; 4; 8; 12} depending on value of bitfield */
elmot	1:d0dfbce63a89	3779	/* corresponding to ADC_JSQR_JEXTEN {0; 1; 2; 3}. */
elmot	1:d0dfbce63a89	3780	register uint32_t ShiftJexten = ((TriggerSource & ADC_JSQR_JEXTEN) >> (ADC_INJ_TRIG_EXTEN_BITOFFSET_POS - 2U));
elmot	1:d0dfbce63a89	3781
elmot	1:d0dfbce63a89	3782	/* Set bitfield corresponding to ADC_JSQR_JEXTEN and ADC_JSQR_JEXTSEL */
elmot	1:d0dfbce63a89	3783	/* to match with triggers literals definition. */
elmot	1:d0dfbce63a89	3784	return ((TriggerSource
elmot	1:d0dfbce63a89	3785	& (ADC_INJ_TRIG_SOURCE_MASK >> ShiftJexten) & ADC_JSQR_JEXTSEL)
elmot	1:d0dfbce63a89	3786	\| ((ADC_INJ_TRIG_EDGE_MASK >> ShiftJexten) & ADC_JSQR_JEXTEN)
elmot	1:d0dfbce63a89	3787	);
elmot	1:d0dfbce63a89	3788	}
elmot	1:d0dfbce63a89	3789
elmot	1:d0dfbce63a89	3790	/**
elmot	1:d0dfbce63a89	3791	* @brief Get ADC group injected conversion trigger source internal (SW start)
elmot	1:d0dfbce63a89	3792	or external
elmot	1:d0dfbce63a89	3793	* @note In case of group injected trigger source set to external trigger,
elmot	1:d0dfbce63a89	3794	* to determine which peripheral is selected as external trigger,
elmot	1:d0dfbce63a89	3795	* use function @ref LL_ADC_INJ_GetTriggerSource.
elmot	1:d0dfbce63a89	3796	* @rmtoll JSQR JEXTEN LL_ADC_INJ_IsTriggerSourceSWStart
elmot	1:d0dfbce63a89	3797	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3798	* @retval Value "0" if trigger source external trigger
elmot	1:d0dfbce63a89	3799	* Value "1" if trigger source SW start.
elmot	1:d0dfbce63a89	3800	*/
elmot	1:d0dfbce63a89	3801	__STATIC_INLINE uint32_t LL_ADC_INJ_IsTriggerSourceSWStart(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	3802	{
elmot	1:d0dfbce63a89	3803	return (READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTEN) == (LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTEN));
elmot	1:d0dfbce63a89	3804	}
elmot	1:d0dfbce63a89	3805
elmot	1:d0dfbce63a89	3806	/**
elmot	1:d0dfbce63a89	3807	* @brief Set ADC group injected conversion trigger polarity.
elmot	1:d0dfbce63a89	3808	* Applicable only for trigger source set to external trigger.
elmot	1:d0dfbce63a89	3809	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	3810	* ADC state:
elmot	1:d0dfbce63a89	3811	* ADC must not be disabled. Can be enabled with or without conversion
elmot	1:d0dfbce63a89	3812	* on going on either groups regular or injected.
elmot	1:d0dfbce63a89	3813	* @rmtoll JSQR JEXTEN LL_ADC_INJ_SetTriggerEdge
elmot	1:d0dfbce63a89	3814	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3815	* @param ExternalTriggerEdge This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3816	* @arg @ref LL_ADC_INJ_TRIG_EXT_RISING
elmot	1:d0dfbce63a89	3817	* @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING
elmot	1:d0dfbce63a89	3818	* @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING
elmot	1:d0dfbce63a89	3819	* @retval None
elmot	1:d0dfbce63a89	3820	*/
elmot	1:d0dfbce63a89	3821	__STATIC_INLINE void LL_ADC_INJ_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge)
elmot	1:d0dfbce63a89	3822	{
elmot	1:d0dfbce63a89	3823	MODIFY_REG(ADCx->JSQR, ADC_JSQR_JEXTEN, ExternalTriggerEdge);
elmot	1:d0dfbce63a89	3824	}
elmot	1:d0dfbce63a89	3825
elmot	1:d0dfbce63a89	3826	/**
elmot	1:d0dfbce63a89	3827	* @brief Get ADC group injected conversion trigger polarity.
elmot	1:d0dfbce63a89	3828	* Applicable only for trigger source set to external trigger.
elmot	1:d0dfbce63a89	3829	* @rmtoll JSQR JEXTEN LL_ADC_INJ_GetTriggerEdge
elmot	1:d0dfbce63a89	3830	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3831	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	3832	* @arg @ref LL_ADC_INJ_TRIG_EXT_RISING
elmot	1:d0dfbce63a89	3833	* @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING
elmot	1:d0dfbce63a89	3834	* @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING
elmot	1:d0dfbce63a89	3835	*/
elmot	1:d0dfbce63a89	3836	__STATIC_INLINE uint32_t LL_ADC_INJ_GetTriggerEdge(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	3837	{
elmot	1:d0dfbce63a89	3838	return (uint32_t)(READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTEN));
elmot	1:d0dfbce63a89	3839	}
elmot	1:d0dfbce63a89	3840
elmot	1:d0dfbce63a89	3841	/**
elmot	1:d0dfbce63a89	3842	* @brief Set ADC group injected sequencer length and scan direction.
elmot	1:d0dfbce63a89	3843	* @note This function performs configuration of:
elmot	1:d0dfbce63a89	3844	* - Sequence length: Number of ranks in the scan sequence.
elmot	1:d0dfbce63a89	3845	* - Sequence direction: Unless specified in parameters, sequencer
elmot	1:d0dfbce63a89	3846	* scan direction is forward (from rank 1 to rank n).
elmot	1:d0dfbce63a89	3847	* @note Sequencer disabled is equivalent to sequencer of 1 rank:
elmot	1:d0dfbce63a89	3848	* ADC conversion on only 1 channel.
elmot	1:d0dfbce63a89	3849	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	3850	* ADC state:
elmot	1:d0dfbce63a89	3851	* ADC must not be disabled. Can be enabled with or without conversion
elmot	1:d0dfbce63a89	3852	* on going on either groups regular or injected.
elmot	1:d0dfbce63a89	3853	* @rmtoll JSQR JL LL_ADC_INJ_SetSequencerLength
elmot	1:d0dfbce63a89	3854	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3855	* @param SequencerNbRanks This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3856	* @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE
elmot	1:d0dfbce63a89	3857	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS
elmot	1:d0dfbce63a89	3858	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS
elmot	1:d0dfbce63a89	3859	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS
elmot	1:d0dfbce63a89	3860	* @retval None
elmot	1:d0dfbce63a89	3861	*/
elmot	1:d0dfbce63a89	3862	__STATIC_INLINE void LL_ADC_INJ_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks)
elmot	1:d0dfbce63a89	3863	{
elmot	1:d0dfbce63a89	3864	MODIFY_REG(ADCx->JSQR, ADC_JSQR_JL, SequencerNbRanks);
elmot	1:d0dfbce63a89	3865	}
elmot	1:d0dfbce63a89	3866
elmot	1:d0dfbce63a89	3867	/**
elmot	1:d0dfbce63a89	3868	* @brief Get ADC group injected sequencer length and scan direction.
elmot	1:d0dfbce63a89	3869	* @note This function retrieves:
elmot	1:d0dfbce63a89	3870	* - Sequence length: Number of ranks in the scan sequence.
elmot	1:d0dfbce63a89	3871	* - Sequence direction: Unless specified in parameters, sequencer
elmot	1:d0dfbce63a89	3872	* scan direction is forward (from rank 1 to rank n).
elmot	1:d0dfbce63a89	3873	* @note Sequencer disabled is equivalent to sequencer of 1 rank:
elmot	1:d0dfbce63a89	3874	* ADC conversion on only 1 channel.
elmot	1:d0dfbce63a89	3875	* @rmtoll JSQR JL LL_ADC_INJ_GetSequencerLength
elmot	1:d0dfbce63a89	3876	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3877	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	3878	* @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE
elmot	1:d0dfbce63a89	3879	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS
elmot	1:d0dfbce63a89	3880	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS
elmot	1:d0dfbce63a89	3881	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS
elmot	1:d0dfbce63a89	3882	*/
elmot	1:d0dfbce63a89	3883	__STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerLength(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	3884	{
elmot	1:d0dfbce63a89	3885	return (uint32_t)(READ_BIT(ADCx->JSQR, ADC_JSQR_JL));
elmot	1:d0dfbce63a89	3886	}
elmot	1:d0dfbce63a89	3887
elmot	1:d0dfbce63a89	3888	/**
elmot	1:d0dfbce63a89	3889	* @brief Set ADC group injected sequencer discontinuous mode:
elmot	1:d0dfbce63a89	3890	* sequence subdivided and scan conversions interrupted every selected
elmot	1:d0dfbce63a89	3891	* number of ranks.
elmot	1:d0dfbce63a89	3892	* @note It is not possible to enable both ADC group injected
elmot	1:d0dfbce63a89	3893	* auto-injected mode and sequencer discontinuous mode.
elmot	1:d0dfbce63a89	3894	* @rmtoll CFGR JDISCEN LL_ADC_INJ_SetSequencerDiscont
elmot	1:d0dfbce63a89	3895	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3896	* @param SeqDiscont This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3897	* @arg @ref LL_ADC_INJ_SEQ_DISCONT_DISABLE
elmot	1:d0dfbce63a89	3898	* @arg @ref LL_ADC_INJ_SEQ_DISCONT_1RANK
elmot	1:d0dfbce63a89	3899	* @retval None
elmot	1:d0dfbce63a89	3900	*/
elmot	1:d0dfbce63a89	3901	__STATIC_INLINE void LL_ADC_INJ_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont)
elmot	1:d0dfbce63a89	3902	{
elmot	1:d0dfbce63a89	3903	MODIFY_REG(ADCx->CFGR, ADC_CFGR_JDISCEN, SeqDiscont);
elmot	1:d0dfbce63a89	3904	}
elmot	1:d0dfbce63a89	3905
elmot	1:d0dfbce63a89	3906	/**
elmot	1:d0dfbce63a89	3907	* @brief Get ADC group injected sequencer discontinuous mode:
elmot	1:d0dfbce63a89	3908	* sequence subdivided and scan conversions interrupted every selected
elmot	1:d0dfbce63a89	3909	* number of ranks.
elmot	1:d0dfbce63a89	3910	* @rmtoll CFGR JDISCEN LL_ADC_INJ_GetSequencerDiscont
elmot	1:d0dfbce63a89	3911	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3912	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	3913	* @arg @ref LL_ADC_INJ_SEQ_DISCONT_DISABLE
elmot	1:d0dfbce63a89	3914	* @arg @ref LL_ADC_INJ_SEQ_DISCONT_1RANK
elmot	1:d0dfbce63a89	3915	*/
elmot	1:d0dfbce63a89	3916	__STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerDiscont(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	3917	{
elmot	1:d0dfbce63a89	3918	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JDISCEN));
elmot	1:d0dfbce63a89	3919	}
elmot	1:d0dfbce63a89	3920
elmot	1:d0dfbce63a89	3921	/**
elmot	1:d0dfbce63a89	3922	* @brief Set ADC group injected sequence: channel on the selected
elmot	1:d0dfbce63a89	3923	* sequence rank.
elmot	1:d0dfbce63a89	3924	* @note Depending on devices and packages, some channels may not be available.
elmot	1:d0dfbce63a89	3925	* Refer to device datasheet for channels availability.
elmot	1:d0dfbce63a89	3926	* @note On this STM32 serie, to measure internal channels (VrefInt,
elmot	1:d0dfbce63a89	3927	* TempSensor, ...), measurement paths to internal channels must be
elmot	1:d0dfbce63a89	3928	* enabled separately.
elmot	1:d0dfbce63a89	3929	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
elmot	1:d0dfbce63a89	3930	* @note On this STM32 serie, some fast channels are available: fast analog inputs
elmot	1:d0dfbce63a89	3931	* coming from GPIO pads (ADC_IN1..5).
elmot	1:d0dfbce63a89	3932	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	3933	* ADC state:
elmot	1:d0dfbce63a89	3934	* ADC must not be disabled. Can be enabled with or without conversion
elmot	1:d0dfbce63a89	3935	* on going on either groups regular or injected.
elmot	1:d0dfbce63a89	3936	* @rmtoll JSQR JSQ1 LL_ADC_INJ_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3937	* JSQR JSQ2 LL_ADC_INJ_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3938	* JSQR JSQ3 LL_ADC_INJ_SetSequencerRanks\n
elmot	1:d0dfbce63a89	3939	* JSQR JSQ4 LL_ADC_INJ_SetSequencerRanks
elmot	1:d0dfbce63a89	3940	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	3941	* @param Rank This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3942	* @arg @ref LL_ADC_INJ_RANK_1
elmot	1:d0dfbce63a89	3943	* @arg @ref LL_ADC_INJ_RANK_2
elmot	1:d0dfbce63a89	3944	* @arg @ref LL_ADC_INJ_RANK_3
elmot	1:d0dfbce63a89	3945	* @arg @ref LL_ADC_INJ_RANK_4
elmot	1:d0dfbce63a89	3946	* @param Channel This parameter can be one of the following values:
elmot	1:d0dfbce63a89	3947	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	3948	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	3949	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	3950	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	3951	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	3952	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	3953	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	3954	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	3955	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	3956	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	3957	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	3958	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	3959	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	3960	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	3961	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	3962	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	3963	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	3964	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	3965	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	3966	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	3967	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	3968	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	3969	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	3970	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	3971	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	3972	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	3973	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	3974	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	3975	*
elmot	1:d0dfbce63a89	3976	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	3977	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	3978	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	3979	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	3980	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	3981	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	3982	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	3983	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
elmot	1:d0dfbce63a89	3984	* @retval None
elmot	1:d0dfbce63a89	3985	*/
elmot	1:d0dfbce63a89	3986	__STATIC_INLINE void LL_ADC_INJ_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channel)
elmot	1:d0dfbce63a89	3987	{
elmot	1:d0dfbce63a89	3988	/* Set bits with content of parameter "Channel" with bits position */
elmot	1:d0dfbce63a89	3989	/* in register depending on parameter "Rank". */
elmot	1:d0dfbce63a89	3990	/* Parameters "Rank" and "Channel" are used with masks because containing */
elmot	1:d0dfbce63a89	3991	/* other bits reserved for other purpose. */
elmot	1:d0dfbce63a89	3992	MODIFY_REG(ADCx->JSQR,
elmot	1:d0dfbce63a89	3993	ADC_CHANNEL_ID_NUMBER_MASK >> (ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS - (Rank & ADC_INJ_RANK_ID_JSQR_MASK)),
elmot	1:d0dfbce63a89	3994	(Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> (ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS - (Rank & ADC_INJ_RANK_ID_JSQR_MASK)));
elmot	1:d0dfbce63a89	3995	}
elmot	1:d0dfbce63a89	3996
elmot	1:d0dfbce63a89	3997	/**
elmot	1:d0dfbce63a89	3998	* @brief Get ADC group injected sequence: channel on the selected
elmot	1:d0dfbce63a89	3999	* sequence rank.
elmot	1:d0dfbce63a89	4000	* @note Depending on devices and packages, some channels may not be available.
elmot	1:d0dfbce63a89	4001	* Refer to device datasheet for channels availability.
elmot	1:d0dfbce63a89	4002	* @note Usage of the returned channel number:
elmot	1:d0dfbce63a89	4003	* - To reinject this channel into another function LL_ADC_xxx:
elmot	1:d0dfbce63a89	4004	* the returned channel number is only partly formatted on definition
elmot	1:d0dfbce63a89	4005	* of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
elmot	1:d0dfbce63a89	4006	* with parts of literals LL_ADC_CHANNEL_x or using
elmot	1:d0dfbce63a89	4007	* helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
elmot	1:d0dfbce63a89	4008	* Then the selected literal LL_ADC_CHANNEL_x can be used
elmot	1:d0dfbce63a89	4009	* as parameter for another function.
elmot	1:d0dfbce63a89	4010	* - To get the channel number in decimal format:
elmot	1:d0dfbce63a89	4011	* process the returned value with the helper macro
elmot	1:d0dfbce63a89	4012	* @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
elmot	1:d0dfbce63a89	4013	* @rmtoll JSQR JSQ1 LL_ADC_INJ_GetSequencerRanks\n
elmot	1:d0dfbce63a89	4014	* JSQR JSQ2 LL_ADC_INJ_GetSequencerRanks\n
elmot	1:d0dfbce63a89	4015	* JSQR JSQ3 LL_ADC_INJ_GetSequencerRanks\n
elmot	1:d0dfbce63a89	4016	* JSQR JSQ4 LL_ADC_INJ_GetSequencerRanks
elmot	1:d0dfbce63a89	4017	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	4018	* @param Rank This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4019	* @arg @ref LL_ADC_INJ_RANK_1
elmot	1:d0dfbce63a89	4020	* @arg @ref LL_ADC_INJ_RANK_2
elmot	1:d0dfbce63a89	4021	* @arg @ref LL_ADC_INJ_RANK_3
elmot	1:d0dfbce63a89	4022	* @arg @ref LL_ADC_INJ_RANK_4
elmot	1:d0dfbce63a89	4023	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	4024	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	4025	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	4026	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	4027	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	4028	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	4029	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	4030	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	4031	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	4032	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	4033	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	4034	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	4035	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	4036	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	4037	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	4038	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	4039	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	4040	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	4041	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	4042	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	4043	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	4044	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	4045	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	4046	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	4047	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	4048	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	4049	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	4050	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	4051	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	4052	*
elmot	1:d0dfbce63a89	4053	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	4054	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	4055	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	4056	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	4057	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	4058	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	4059	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	4060	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).\n
elmot	1:d0dfbce63a89	4061	* (1, 2, 3, 4) For ADC channel read back from ADC register,
elmot	1:d0dfbce63a89	4062	* comparison with internal channel parameter to be done
elmot	1:d0dfbce63a89	4063	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
elmot	1:d0dfbce63a89	4064	*/
elmot	1:d0dfbce63a89	4065	__STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank)
elmot	1:d0dfbce63a89	4066	{
elmot	1:d0dfbce63a89	4067	return (uint32_t)(READ_BIT(ADCx->JSQR,
elmot	1:d0dfbce63a89	4068	ADC_CHANNEL_ID_NUMBER_MASK >> (ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS - (Rank & ADC_INJ_RANK_ID_JSQR_MASK)))
elmot	1:d0dfbce63a89	4069	<< (ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS - (Rank & ADC_INJ_RANK_ID_JSQR_MASK))
elmot	1:d0dfbce63a89	4070	);
elmot	1:d0dfbce63a89	4071	}
elmot	1:d0dfbce63a89	4072
elmot	1:d0dfbce63a89	4073	/**
elmot	1:d0dfbce63a89	4074	* @brief Set ADC group injected conversion trigger:
elmot	1:d0dfbce63a89	4075	* independent or from ADC group regular.
elmot	1:d0dfbce63a89	4076	* @note This mode can be used to extend number of data registers
elmot	1:d0dfbce63a89	4077	* updated after one ADC conversion trigger and with data
elmot	1:d0dfbce63a89	4078	* permanently kept (not erased by successive conversions of scan of
elmot	1:d0dfbce63a89	4079	* ADC sequencer ranks), up to 5 data registers:
elmot	1:d0dfbce63a89	4080	* 1 data register on ADC group regular, 4 data registers
elmot	1:d0dfbce63a89	4081	* on ADC group injected.
elmot	1:d0dfbce63a89	4082	* @note If ADC group injected injected trigger source is set to an
elmot	1:d0dfbce63a89	4083	* external trigger, this feature must be must be set to
elmot	1:d0dfbce63a89	4084	* independent trigger.
elmot	1:d0dfbce63a89	4085	* ADC group injected automatic trigger is compliant only with
elmot	1:d0dfbce63a89	4086	* group injected trigger source set to SW start, without any
elmot	1:d0dfbce63a89	4087	* further action on ADC group injected conversion start or stop:
elmot	1:d0dfbce63a89	4088	* in this case, ADC group injected is controlled only
elmot	1:d0dfbce63a89	4089	* from ADC group regular.
elmot	1:d0dfbce63a89	4090	* @note It is not possible to enable both ADC group injected
elmot	1:d0dfbce63a89	4091	* auto-injected mode and sequencer discontinuous mode.
elmot	1:d0dfbce63a89	4092	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	4093	* ADC state:
elmot	1:d0dfbce63a89	4094	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	4095	* on either groups regular or injected.
elmot	1:d0dfbce63a89	4096	* @rmtoll CFGR JAUTO LL_ADC_INJ_SetTrigAuto
elmot	1:d0dfbce63a89	4097	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	4098	* @param TrigAuto This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4099	* @arg @ref LL_ADC_INJ_TRIG_INDEPENDENT
elmot	1:d0dfbce63a89	4100	* @arg @ref LL_ADC_INJ_TRIG_FROM_GRP_REGULAR
elmot	1:d0dfbce63a89	4101	* @retval None
elmot	1:d0dfbce63a89	4102	*/
elmot	1:d0dfbce63a89	4103	__STATIC_INLINE void LL_ADC_INJ_SetTrigAuto(ADC_TypeDef *ADCx, uint32_t TrigAuto)
elmot	1:d0dfbce63a89	4104	{
elmot	1:d0dfbce63a89	4105	MODIFY_REG(ADCx->CFGR, ADC_CFGR_JAUTO, TrigAuto);
elmot	1:d0dfbce63a89	4106	}
elmot	1:d0dfbce63a89	4107
elmot	1:d0dfbce63a89	4108	/**
elmot	1:d0dfbce63a89	4109	* @brief Get ADC group injected conversion trigger:
elmot	1:d0dfbce63a89	4110	* independent or from ADC group regular.
elmot	1:d0dfbce63a89	4111	* @rmtoll CFGR JAUTO LL_ADC_INJ_GetTrigAuto
elmot	1:d0dfbce63a89	4112	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	4113	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	4114	* @arg @ref LL_ADC_INJ_TRIG_INDEPENDENT
elmot	1:d0dfbce63a89	4115	* @arg @ref LL_ADC_INJ_TRIG_FROM_GRP_REGULAR
elmot	1:d0dfbce63a89	4116	*/
elmot	1:d0dfbce63a89	4117	__STATIC_INLINE uint32_t LL_ADC_INJ_GetTrigAuto(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	4118	{
elmot	1:d0dfbce63a89	4119	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JAUTO));
elmot	1:d0dfbce63a89	4120	}
elmot	1:d0dfbce63a89	4121
elmot	1:d0dfbce63a89	4122	/**
elmot	1:d0dfbce63a89	4123	* @brief Set ADC group injected contexts queue mode.
elmot	1:d0dfbce63a89	4124	* @note A context is a setting of group injected sequencer:
elmot	1:d0dfbce63a89	4125	* - group injected trigger
elmot	1:d0dfbce63a89	4126	* - sequencer length
elmot	1:d0dfbce63a89	4127	* - sequencer ranks
elmot	1:d0dfbce63a89	4128	* If contexts queue is disabled:
elmot	1:d0dfbce63a89	4129	* - only 1 sequence can be configured
elmot	1:d0dfbce63a89	4130	* and is active perpetually.
elmot	1:d0dfbce63a89	4131	* If contexts queue is enabled:
elmot	1:d0dfbce63a89	4132	* - up to 2 contexts can be queued
elmot	1:d0dfbce63a89	4133	* and are checked in and out as a FIFO stack (first-in, first-out).
elmot	1:d0dfbce63a89	4134	* - If a new context is set when queues is full, error is triggered
elmot	1:d0dfbce63a89	4135	* by interruption "Injected Queue Overflow".
elmot	1:d0dfbce63a89	4136	* - Two behaviors are possible when all contexts have been processed:
elmot	1:d0dfbce63a89	4137	* the contexts queue can maintain the last context active perpetually
elmot	1:d0dfbce63a89	4138	* or can be empty and injected group triggers are disabled.
elmot	1:d0dfbce63a89	4139	* - Triggers can be only external (not internal SW start)
elmot	1:d0dfbce63a89	4140	* - Caution: The sequence must be fully configured in one time
elmot	1:d0dfbce63a89	4141	* (one write of register JSQR makes a check-in of a new context
elmot	1:d0dfbce63a89	4142	* into the queue).
elmot	1:d0dfbce63a89	4143	* Therefore functions to set separately injected trigger and
elmot	1:d0dfbce63a89	4144	* sequencer channels cannot be used, register JSQR must be set
elmot	1:d0dfbce63a89	4145	* using function @ref LL_ADC_INJ_ConfigQueueContext().
elmot	1:d0dfbce63a89	4146	* @note This parameter can be modified only when no conversion is on going
elmot	1:d0dfbce63a89	4147	* on either groups regular or injected.
elmot	1:d0dfbce63a89	4148	* @note A modification of the context mode (bit JQDIS) causes the contexts
elmot	1:d0dfbce63a89	4149	* queue to be flushed and the register JSQR is cleared.
elmot	1:d0dfbce63a89	4150	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	4151	* ADC state:
elmot	1:d0dfbce63a89	4152	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	4153	* on either groups regular or injected.
elmot	1:d0dfbce63a89	4154	* @rmtoll CFGR JQM LL_ADC_INJ_SetQueueMode\n
elmot	1:d0dfbce63a89	4155	* CFGR JQDIS LL_ADC_INJ_SetQueueMode
elmot	1:d0dfbce63a89	4156	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	4157	* @param QueueMode This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4158	* @arg @ref LL_ADC_INJ_QUEUE_DISABLE
elmot	1:d0dfbce63a89	4159	* @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE
elmot	1:d0dfbce63a89	4160	* @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY
elmot	1:d0dfbce63a89	4161	* @retval None
elmot	1:d0dfbce63a89	4162	*/
elmot	1:d0dfbce63a89	4163	__STATIC_INLINE void LL_ADC_INJ_SetQueueMode(ADC_TypeDef *ADCx, uint32_t QueueMode)
elmot	1:d0dfbce63a89	4164	{
elmot	1:d0dfbce63a89	4165	MODIFY_REG(ADCx->CFGR, ADC_CFGR_JQM \| ADC_CFGR_JQDIS, QueueMode);
elmot	1:d0dfbce63a89	4166	}
elmot	1:d0dfbce63a89	4167
elmot	1:d0dfbce63a89	4168	/**
elmot	1:d0dfbce63a89	4169	* @brief Get ADC group injected context queue mode.
elmot	1:d0dfbce63a89	4170	* @rmtoll CFGR JQM LL_ADC_INJ_GetQueueMode\n
elmot	1:d0dfbce63a89	4171	* CFGR JQDIS LL_ADC_INJ_GetQueueMode
elmot	1:d0dfbce63a89	4172	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	4173	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	4174	* @arg @ref LL_ADC_INJ_QUEUE_DISABLE
elmot	1:d0dfbce63a89	4175	* @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE
elmot	1:d0dfbce63a89	4176	* @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY
elmot	1:d0dfbce63a89	4177	*/
elmot	1:d0dfbce63a89	4178	__STATIC_INLINE uint32_t LL_ADC_INJ_GetQueueMode(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	4179	{
elmot	1:d0dfbce63a89	4180	return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JQM \| ADC_CFGR_JQDIS));
elmot	1:d0dfbce63a89	4181	}
elmot	1:d0dfbce63a89	4182
elmot	1:d0dfbce63a89	4183	/**
elmot	1:d0dfbce63a89	4184	* @brief Set one context on ADC group injected that will be checked in
elmot	1:d0dfbce63a89	4185	* contexts queue.
elmot	1:d0dfbce63a89	4186	* @note A context is a setting of group injected sequencer:
elmot	1:d0dfbce63a89	4187	* - group injected trigger
elmot	1:d0dfbce63a89	4188	* - sequencer length
elmot	1:d0dfbce63a89	4189	* - sequencer ranks
elmot	1:d0dfbce63a89	4190	* This function is intended to be used when contexts queue is enabled,
elmot	1:d0dfbce63a89	4191	* because the sequence must be fully configured in one time
elmot	1:d0dfbce63a89	4192	* (functions to set separately injected trigger and sequencer channels
elmot	1:d0dfbce63a89	4193	* cannot be used):
elmot	1:d0dfbce63a89	4194	* Refer to function @ref LL_ADC_INJ_SetQueueMode().
elmot	1:d0dfbce63a89	4195	* @note In the contexts queue, only the active context can be read.
elmot	1:d0dfbce63a89	4196	* The parameters of this function can be read using functions:
elmot	1:d0dfbce63a89	4197	* @arg @ref LL_ADC_INJ_GetTriggerSource()
elmot	1:d0dfbce63a89	4198	* @arg @ref LL_ADC_INJ_GetTriggerEdge()
elmot	1:d0dfbce63a89	4199	* @arg @ref LL_ADC_INJ_GetSequencerRanks()
elmot	1:d0dfbce63a89	4200	* @note On this STM32 serie, to measure internal channels (VrefInt,
elmot	1:d0dfbce63a89	4201	* TempSensor, ...), measurement paths to internal channels must be
elmot	1:d0dfbce63a89	4202	* enabled separately.
elmot	1:d0dfbce63a89	4203	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
elmot	1:d0dfbce63a89	4204	* @note On this STM32 serie, some fast channels are available: fast analog inputs
elmot	1:d0dfbce63a89	4205	* coming from GPIO pads (ADC_IN1..5).
elmot	1:d0dfbce63a89	4206	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	4207	* ADC state:
elmot	1:d0dfbce63a89	4208	* ADC must not be disabled. Can be enabled with or without conversion
elmot	1:d0dfbce63a89	4209	* on going on either groups regular or injected.
elmot	1:d0dfbce63a89	4210	* @rmtoll JSQR JEXTSEL LL_ADC_INJ_ConfigQueueContext\n
elmot	1:d0dfbce63a89	4211	* JSQR JEXTEN LL_ADC_INJ_ConfigQueueContext\n
elmot	1:d0dfbce63a89	4212	* JSQR JL LL_ADC_INJ_ConfigQueueContext\n
elmot	1:d0dfbce63a89	4213	* JSQR JSQ1 LL_ADC_INJ_ConfigQueueContext\n
elmot	1:d0dfbce63a89	4214	* JSQR JSQ2 LL_ADC_INJ_ConfigQueueContext\n
elmot	1:d0dfbce63a89	4215	* JSQR JSQ3 LL_ADC_INJ_ConfigQueueContext\n
elmot	1:d0dfbce63a89	4216	* JSQR JSQ4 LL_ADC_INJ_ConfigQueueContext
elmot	1:d0dfbce63a89	4217	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	4218	* @param TriggerSource This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4219	* @arg @ref LL_ADC_INJ_TRIG_SOFTWARE
elmot	1:d0dfbce63a89	4220	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO
elmot	1:d0dfbce63a89	4221	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2
elmot	1:d0dfbce63a89	4222	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4
elmot	1:d0dfbce63a89	4223	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO
elmot	1:d0dfbce63a89	4224	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1
elmot	1:d0dfbce63a89	4225	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO
elmot	1:d0dfbce63a89	4226	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1
elmot	1:d0dfbce63a89	4227	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3
elmot	1:d0dfbce63a89	4228	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4
elmot	1:d0dfbce63a89	4229	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO
elmot	1:d0dfbce63a89	4230	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO
elmot	1:d0dfbce63a89	4231	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4
elmot	1:d0dfbce63a89	4232	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO
elmot	1:d0dfbce63a89	4233	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2
elmot	1:d0dfbce63a89	4234	* @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO
elmot	1:d0dfbce63a89	4235	* @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15
elmot	1:d0dfbce63a89	4236	* @param ExternalTriggerEdge This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4237	* @arg @ref LL_ADC_INJ_TRIG_EXT_RISING
elmot	1:d0dfbce63a89	4238	* @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING
elmot	1:d0dfbce63a89	4239	* @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING
elmot	1:d0dfbce63a89	4240	*
elmot	1:d0dfbce63a89	4241	* Note: This parameter is discarded in case of SW start:
elmot	1:d0dfbce63a89	4242	* parameter "TriggerSource" set to "LL_ADC_INJ_TRIG_SOFTWARE".
elmot	1:d0dfbce63a89	4243	* @param SequencerNbRanks This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4244	* @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE
elmot	1:d0dfbce63a89	4245	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS
elmot	1:d0dfbce63a89	4246	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS
elmot	1:d0dfbce63a89	4247	* @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS
elmot	1:d0dfbce63a89	4248	* @param Rank1_Channel This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4249	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	4250	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	4251	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	4252	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	4253	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	4254	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	4255	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	4256	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	4257	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	4258	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	4259	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	4260	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	4261	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	4262	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	4263	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	4264	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	4265	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	4266	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	4267	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	4268	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	4269	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	4270	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	4271	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	4272	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	4273	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	4274	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	4275	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	4276	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	4277	*
elmot	1:d0dfbce63a89	4278	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	4279	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	4280	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	4281	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	4282	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	4283	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	4284	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	4285	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
elmot	1:d0dfbce63a89	4286	* @param Rank2_Channel This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4287	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	4288	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	4289	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	4290	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	4291	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	4292	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	4293	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	4294	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	4295	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	4296	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	4297	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	4298	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	4299	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	4300	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	4301	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	4302	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	4303	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	4304	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	4305	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	4306	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	4307	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	4308	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	4309	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	4310	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	4311	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	4312	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	4313	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	4314	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	4315	*
elmot	1:d0dfbce63a89	4316	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	4317	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	4318	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	4319	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	4320	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	4321	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	4322	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	4323	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
elmot	1:d0dfbce63a89	4324	* @param Rank3_Channel This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4325	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	4326	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	4327	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	4328	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	4329	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	4330	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	4331	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	4332	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	4333	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	4334	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	4335	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	4336	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	4337	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	4338	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	4339	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	4340	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	4341	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	4342	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	4343	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	4344	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	4345	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	4346	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	4347	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	4348	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	4349	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	4350	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	4351	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	4352	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	4353	*
elmot	1:d0dfbce63a89	4354	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	4355	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	4356	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	4357	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	4358	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	4359	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	4360	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	4361	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
elmot	1:d0dfbce63a89	4362	* @param Rank4_Channel This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4363	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	4364	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	4365	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	4366	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	4367	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	4368	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	4369	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	4370	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	4371	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	4372	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	4373	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	4374	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	4375	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	4376	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	4377	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	4378	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	4379	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	4380	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	4381	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	4382	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	4383	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	4384	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	4385	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	4386	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	4387	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	4388	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	4389	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	4390	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	4391	*
elmot	1:d0dfbce63a89	4392	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	4393	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	4394	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	4395	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	4396	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	4397	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	4398	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	4399	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
elmot	1:d0dfbce63a89	4400	* @retval None
elmot	1:d0dfbce63a89	4401	*/
elmot	1:d0dfbce63a89	4402	__STATIC_INLINE void LL_ADC_INJ_ConfigQueueContext(ADC_TypeDef *ADCx,
elmot	1:d0dfbce63a89	4403	uint32_t TriggerSource,
elmot	1:d0dfbce63a89	4404	uint32_t ExternalTriggerEdge,
elmot	1:d0dfbce63a89	4405	uint32_t SequencerNbRanks,
elmot	1:d0dfbce63a89	4406	uint32_t Rank1_Channel,
elmot	1:d0dfbce63a89	4407	uint32_t Rank2_Channel,
elmot	1:d0dfbce63a89	4408	uint32_t Rank3_Channel,
elmot	1:d0dfbce63a89	4409	uint32_t Rank4_Channel)
elmot	1:d0dfbce63a89	4410	{
elmot	1:d0dfbce63a89	4411	/* Set bits with content of parameter "Rankx_Channel" with bits position */
elmot	1:d0dfbce63a89	4412	/* in register depending on literal "LL_ADC_INJ_RANK_x". */
elmot	1:d0dfbce63a89	4413	/* Parameters "Rankx_Channel" and "LL_ADC_INJ_RANK_x" are used with masks */
elmot	1:d0dfbce63a89	4414	/* because containing other bits reserved for other purpose. */
elmot	1:d0dfbce63a89	4415	/* If parameter "TriggerSource" is set to SW start, then parameter */
elmot	1:d0dfbce63a89	4416	/* "ExternalTriggerEdge" is discarded. */
elmot	1:d0dfbce63a89	4417	MODIFY_REG(ADCx->JSQR ,
elmot	1:d0dfbce63a89	4418	ADC_JSQR_JEXTSEL \|
elmot	1:d0dfbce63a89	4419	ADC_JSQR_JEXTEN \|
elmot	1:d0dfbce63a89	4420	ADC_JSQR_JSQ4 \|
elmot	1:d0dfbce63a89	4421	ADC_JSQR_JSQ3 \|
elmot	1:d0dfbce63a89	4422	ADC_JSQR_JSQ2 \|
elmot	1:d0dfbce63a89	4423	ADC_JSQR_JSQ1 \|
elmot	1:d0dfbce63a89	4424	ADC_JSQR_JL ,
elmot	1:d0dfbce63a89	4425	TriggerSource \|
elmot	1:d0dfbce63a89	4426	(ExternalTriggerEdge * ((TriggerSource != LL_ADC_INJ_TRIG_SOFTWARE))) \|
elmot	1:d0dfbce63a89	4427	((Rank4_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> (ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS - (LL_ADC_INJ_RANK_4 & ADC_INJ_RANK_ID_JSQR_MASK))) \|
elmot	1:d0dfbce63a89	4428	((Rank3_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> (ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS - (LL_ADC_INJ_RANK_3 & ADC_INJ_RANK_ID_JSQR_MASK))) \|
elmot	1:d0dfbce63a89	4429	((Rank2_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> (ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS - (LL_ADC_INJ_RANK_2 & ADC_INJ_RANK_ID_JSQR_MASK))) \|
elmot	1:d0dfbce63a89	4430	((Rank1_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> (ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS - (LL_ADC_INJ_RANK_1 & ADC_INJ_RANK_ID_JSQR_MASK))) \|
elmot	1:d0dfbce63a89	4431	SequencerNbRanks
elmot	1:d0dfbce63a89	4432	);
elmot	1:d0dfbce63a89	4433	}
elmot	1:d0dfbce63a89	4434
elmot	1:d0dfbce63a89	4435	/**
elmot	1:d0dfbce63a89	4436	* @}
elmot	1:d0dfbce63a89	4437	*/
elmot	1:d0dfbce63a89	4438
elmot	1:d0dfbce63a89	4439	/** @defgroup ADC_LL_EF_Configuration_Channels Configuration of ADC hierarchical scope: channels
elmot	1:d0dfbce63a89	4440	* @{
elmot	1:d0dfbce63a89	4441	*/
elmot	1:d0dfbce63a89	4442
elmot	1:d0dfbce63a89	4443	/**
elmot	1:d0dfbce63a89	4444	* @brief Set sampling time of the selected ADC channel
elmot	1:d0dfbce63a89	4445	* Unit: ADC clock cycles.
elmot	1:d0dfbce63a89	4446	* @note On this device, sampling time is on channel scope: independently
elmot	1:d0dfbce63a89	4447	* of channel mapped on ADC group regular or injected.
elmot	1:d0dfbce63a89	4448	* @note In case of internal channel (VrefInt, TempSensor, ...) to be
elmot	1:d0dfbce63a89	4449	* converted:
elmot	1:d0dfbce63a89	4450	* sampling time constraints must be respected (sampling time can be
elmot	1:d0dfbce63a89	4451	* adjusted in function of ADC clock frequency and sampling time
elmot	1:d0dfbce63a89	4452	* setting).
elmot	1:d0dfbce63a89	4453	* Refer to device datasheet for timings values (parameters TS_vrefint,
elmot	1:d0dfbce63a89	4454	* TS_temp, ...).
elmot	1:d0dfbce63a89	4455	* @note Conversion time is the addition of sampling time and processing time.
elmot	1:d0dfbce63a89	4456	* On this STM32 serie, ADC processing time is:
elmot	1:d0dfbce63a89	4457	* - 12.5 ADC clock cycles at ADC resolution 12 bits
elmot	1:d0dfbce63a89	4458	* - 10.5 ADC clock cycles at ADC resolution 10 bits
elmot	1:d0dfbce63a89	4459	* - 8.5 ADC clock cycles at ADC resolution 8 bits
elmot	1:d0dfbce63a89	4460	* - 6.5 ADC clock cycles at ADC resolution 6 bits
elmot	1:d0dfbce63a89	4461	* @note In case of ADC conversion of internal channel (VrefInt,
elmot	1:d0dfbce63a89	4462	* temperature sensor, ...), a sampling time minimum value
elmot	1:d0dfbce63a89	4463	* is required.
elmot	1:d0dfbce63a89	4464	* Refer to device datasheet.
elmot	1:d0dfbce63a89	4465	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	4466	* ADC state:
elmot	1:d0dfbce63a89	4467	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	4468	* on either groups regular or injected.
elmot	1:d0dfbce63a89	4469	* @rmtoll SMPR1 SMP0 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4470	* SMPR1 SMP1 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4471	* SMPR1 SMP2 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4472	* SMPR1 SMP3 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4473	* SMPR1 SMP4 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4474	* SMPR1 SMP5 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4475	* SMPR1 SMP6 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4476	* SMPR1 SMP7 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4477	* SMPR1 SMP8 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4478	* SMPR1 SMP9 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4479	* SMPR2 SMP10 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4480	* SMPR2 SMP11 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4481	* SMPR2 SMP12 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4482	* SMPR2 SMP13 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4483	* SMPR2 SMP14 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4484	* SMPR2 SMP15 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4485	* SMPR2 SMP16 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4486	* SMPR2 SMP17 LL_ADC_SetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4487	* SMPR2 SMP18 LL_ADC_SetChannelSamplingTime
elmot	1:d0dfbce63a89	4488	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	4489	* @param Channel This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4490	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	4491	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	4492	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	4493	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	4494	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	4495	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	4496	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	4497	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	4498	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	4499	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	4500	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	4501	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	4502	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	4503	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	4504	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	4505	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	4506	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	4507	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	4508	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	4509	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	4510	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	4511	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	4512	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	4513	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	4514	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	4515	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	4516	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	4517	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	4518	*
elmot	1:d0dfbce63a89	4519	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	4520	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	4521	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	4522	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	4523	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	4524	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	4525	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	4526	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
elmot	1:d0dfbce63a89	4527	* @param SamplingTime This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4528	* @arg @ref LL_ADC_SAMPLINGTIME_2CYCLES_5
elmot	1:d0dfbce63a89	4529	* @arg @ref LL_ADC_SAMPLINGTIME_6CYCLES_5
elmot	1:d0dfbce63a89	4530	* @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5
elmot	1:d0dfbce63a89	4531	* @arg @ref LL_ADC_SAMPLINGTIME_24CYCLES_5
elmot	1:d0dfbce63a89	4532	* @arg @ref LL_ADC_SAMPLINGTIME_47CYCLES_5
elmot	1:d0dfbce63a89	4533	* @arg @ref LL_ADC_SAMPLINGTIME_92CYCLES_5
elmot	1:d0dfbce63a89	4534	* @arg @ref LL_ADC_SAMPLINGTIME_247CYCLES_5
elmot	1:d0dfbce63a89	4535	* @arg @ref LL_ADC_SAMPLINGTIME_640CYCLES_5
elmot	1:d0dfbce63a89	4536	* @retval None
elmot	1:d0dfbce63a89	4537	*/
elmot	1:d0dfbce63a89	4538	__STATIC_INLINE void LL_ADC_SetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t SamplingTime)
elmot	1:d0dfbce63a89	4539	{
elmot	1:d0dfbce63a89	4540	/* Set bits with content of parameter "SamplingTime" with bits position */
elmot	1:d0dfbce63a89	4541	/* in register and register position depending on parameter "Channel". */
elmot	1:d0dfbce63a89	4542	/* Parameter "Channel" is used with masks because containing */
elmot	1:d0dfbce63a89	4543	/* other bits reserved for other purpose. */
elmot	1:d0dfbce63a89	4544	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPRX_REGOFFSET_MASK));
elmot	1:d0dfbce63a89	4545
elmot	1:d0dfbce63a89	4546	MODIFY_REG(*preg,
elmot	1:d0dfbce63a89	4547	ADC_SMPR1_SMP0 << __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPx_BITOFFSET_MASK),
elmot	1:d0dfbce63a89	4548	SamplingTime << __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPx_BITOFFSET_MASK));
elmot	1:d0dfbce63a89	4549	}
elmot	1:d0dfbce63a89	4550
elmot	1:d0dfbce63a89	4551	/**
elmot	1:d0dfbce63a89	4552	* @brief Get sampling time of the selected ADC channel
elmot	1:d0dfbce63a89	4553	* Unit: ADC clock cycles.
elmot	1:d0dfbce63a89	4554	* @note On this device, sampling time is on channel scope: independently
elmot	1:d0dfbce63a89	4555	* of channel mapped on ADC group regular or injected.
elmot	1:d0dfbce63a89	4556	* @note Conversion time is the addition of sampling time and processing time.
elmot	1:d0dfbce63a89	4557	* On this STM32 serie, ADC processing time is:
elmot	1:d0dfbce63a89	4558	* - 12.5 ADC clock cycles at ADC resolution 12 bits
elmot	1:d0dfbce63a89	4559	* - 10.5 ADC clock cycles at ADC resolution 10 bits
elmot	1:d0dfbce63a89	4560	* - 8.5 ADC clock cycles at ADC resolution 8 bits
elmot	1:d0dfbce63a89	4561	* - 6.5 ADC clock cycles at ADC resolution 6 bits
elmot	1:d0dfbce63a89	4562	* @rmtoll SMPR1 SMP0 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4563	* SMPR1 SMP1 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4564	* SMPR1 SMP2 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4565	* SMPR1 SMP3 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4566	* SMPR1 SMP4 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4567	* SMPR1 SMP5 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4568	* SMPR1 SMP6 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4569	* SMPR1 SMP7 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4570	* SMPR1 SMP8 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4571	* SMPR1 SMP9 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4572	* SMPR2 SMP10 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4573	* SMPR2 SMP11 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4574	* SMPR2 SMP12 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4575	* SMPR2 SMP13 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4576	* SMPR2 SMP14 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4577	* SMPR2 SMP15 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4578	* SMPR2 SMP16 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4579	* SMPR2 SMP17 LL_ADC_GetChannelSamplingTime\n
elmot	1:d0dfbce63a89	4580	* SMPR2 SMP18 LL_ADC_GetChannelSamplingTime
elmot	1:d0dfbce63a89	4581	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	4582	* @param Channel This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4583	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	4584	* @arg @ref LL_ADC_CHANNEL_1 (7)
elmot	1:d0dfbce63a89	4585	* @arg @ref LL_ADC_CHANNEL_2 (7)
elmot	1:d0dfbce63a89	4586	* @arg @ref LL_ADC_CHANNEL_3 (7)
elmot	1:d0dfbce63a89	4587	* @arg @ref LL_ADC_CHANNEL_4 (7)
elmot	1:d0dfbce63a89	4588	* @arg @ref LL_ADC_CHANNEL_5 (7)
elmot	1:d0dfbce63a89	4589	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	4590	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	4591	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	4592	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	4593	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	4594	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	4595	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	4596	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	4597	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	4598	* @arg @ref LL_ADC_CHANNEL_15
elmot	1:d0dfbce63a89	4599	* @arg @ref LL_ADC_CHANNEL_16
elmot	1:d0dfbce63a89	4600	* @arg @ref LL_ADC_CHANNEL_17
elmot	1:d0dfbce63a89	4601	* @arg @ref LL_ADC_CHANNEL_18
elmot	1:d0dfbce63a89	4602	* @arg @ref LL_ADC_CHANNEL_VREFINT (1)
elmot	1:d0dfbce63a89	4603	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (4)
elmot	1:d0dfbce63a89	4604	* @arg @ref LL_ADC_CHANNEL_VBAT (4)
elmot	1:d0dfbce63a89	4605	* @arg @ref LL_ADC_CHANNEL_DAC1CH1 (5)
elmot	1:d0dfbce63a89	4606	* @arg @ref LL_ADC_CHANNEL_DAC1CH2 (5)
elmot	1:d0dfbce63a89	4607	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)(6)
elmot	1:d0dfbce63a89	4608	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)(6)
elmot	1:d0dfbce63a89	4609	* @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC3 (3)(6)
elmot	1:d0dfbce63a89	4610	* @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC3 (3)(6)
elmot	1:d0dfbce63a89	4611	*
elmot	1:d0dfbce63a89	4612	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	4613	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	4614	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	4615	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.\n
elmot	1:d0dfbce63a89	4616	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	4617	* (6) On STM32L4, parameter available on devices with several ADC instances.\n
elmot	1:d0dfbce63a89	4618	* (7) On STM32L4, fast channel (0.188 us for 12-bit resolution (ADC conversion rate up to 5.33 Ms/s)).
elmot	1:d0dfbce63a89	4619	* Other channels are slow channels (0.238 us for 12-bit resolution (ADC conversion rate up to 4.21 Ms/s)).
elmot	1:d0dfbce63a89	4620	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	4621	* @arg @ref LL_ADC_SAMPLINGTIME_2CYCLES_5
elmot	1:d0dfbce63a89	4622	* @arg @ref LL_ADC_SAMPLINGTIME_6CYCLES_5
elmot	1:d0dfbce63a89	4623	* @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5
elmot	1:d0dfbce63a89	4624	* @arg @ref LL_ADC_SAMPLINGTIME_24CYCLES_5
elmot	1:d0dfbce63a89	4625	* @arg @ref LL_ADC_SAMPLINGTIME_47CYCLES_5
elmot	1:d0dfbce63a89	4626	* @arg @ref LL_ADC_SAMPLINGTIME_92CYCLES_5
elmot	1:d0dfbce63a89	4627	* @arg @ref LL_ADC_SAMPLINGTIME_247CYCLES_5
elmot	1:d0dfbce63a89	4628	* @arg @ref LL_ADC_SAMPLINGTIME_640CYCLES_5
elmot	1:d0dfbce63a89	4629	*/
elmot	1:d0dfbce63a89	4630	__STATIC_INLINE uint32_t LL_ADC_GetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel)
elmot	1:d0dfbce63a89	4631	{
elmot	1:d0dfbce63a89	4632	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPRX_REGOFFSET_MASK));
elmot	1:d0dfbce63a89	4633
elmot	1:d0dfbce63a89	4634	return (uint32_t)(READ_BIT(*preg,
elmot	1:d0dfbce63a89	4635	ADC_SMPR1_SMP0 << __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPx_BITOFFSET_MASK))
elmot	1:d0dfbce63a89	4636	>> __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPx_BITOFFSET_MASK)
elmot	1:d0dfbce63a89	4637	);
elmot	1:d0dfbce63a89	4638	}
elmot	1:d0dfbce63a89	4639
elmot	1:d0dfbce63a89	4640	/**
elmot	1:d0dfbce63a89	4641	* @brief Set mode single-ended or differential input of the selected
elmot	1:d0dfbce63a89	4642	* ADC channel.
elmot	1:d0dfbce63a89	4643	* @note Channel ending is on channel scope: independently of channel mapped
elmot	1:d0dfbce63a89	4644	* on ADC group regular or injected.
elmot	1:d0dfbce63a89	4645	* In differential mode: Differential measurement is carried out
elmot	1:d0dfbce63a89	4646	* between the selected channel 'i' (positive input) and
elmot	1:d0dfbce63a89	4647	* channel 'i+1' (negative input). Only channel 'i' has to be
elmot	1:d0dfbce63a89	4648	* configured, channel 'i+1' is configured automatically.
elmot	1:d0dfbce63a89	4649	* @note Refer to Reference Manual to ensure the selected channel is
elmot	1:d0dfbce63a89	4650	* available in differential mode.
elmot	1:d0dfbce63a89	4651	* For example, internal channels (VrefInt, TempSensor, ...) are
elmot	1:d0dfbce63a89	4652	* not available in differential mode.
elmot	1:d0dfbce63a89	4653	* @note When configuring a channel 'i' in differential mode,
elmot	1:d0dfbce63a89	4654	* the channel 'i+1' is not usable separately.
elmot	1:d0dfbce63a89	4655	* @note On STM32L4, channels 15, 16, 17, 18 of ADC1, ADC2, ADC3 (if available)
elmot	1:d0dfbce63a89	4656	* are internally fixed to single-ended inputs configuration.
elmot	1:d0dfbce63a89	4657	* @note For ADC channels configured in differential mode, both inputs
elmot	1:d0dfbce63a89	4658	* should be biased at (Vref+)/2 +/-200mV.
elmot	1:d0dfbce63a89	4659	* (Vref+ is the analog voltage reference)
elmot	1:d0dfbce63a89	4660	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	4661	* ADC state:
elmot	1:d0dfbce63a89	4662	* ADC must be ADC disabled.
elmot	1:d0dfbce63a89	4663	* @note One or several values can be selected.
elmot	1:d0dfbce63a89	4664	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
elmot	1:d0dfbce63a89	4665	* @rmtoll DIFSEL DIFSEL LL_ADC_GetChannelSamplingTime
elmot	1:d0dfbce63a89	4666	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	4667	* @param Channel This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4668	* @arg @ref LL_ADC_CHANNEL_1
elmot	1:d0dfbce63a89	4669	* @arg @ref LL_ADC_CHANNEL_2
elmot	1:d0dfbce63a89	4670	* @arg @ref LL_ADC_CHANNEL_3
elmot	1:d0dfbce63a89	4671	* @arg @ref LL_ADC_CHANNEL_4
elmot	1:d0dfbce63a89	4672	* @arg @ref LL_ADC_CHANNEL_5
elmot	1:d0dfbce63a89	4673	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	4674	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	4675	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	4676	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	4677	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	4678	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	4679	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	4680	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	4681	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	4682	* @param SingleDiff This parameter can be a combination of the following values:
elmot	1:d0dfbce63a89	4683	* @arg @ref LL_ADC_SINGLE_ENDED
elmot	1:d0dfbce63a89	4684	* @arg @ref LL_ADC_DIFFERENTIAL_ENDED
elmot	1:d0dfbce63a89	4685	* @retval None
elmot	1:d0dfbce63a89	4686	*/
elmot	1:d0dfbce63a89	4687	__STATIC_INLINE void LL_ADC_SetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t SingleDiff)
elmot	1:d0dfbce63a89	4688	{
elmot	1:d0dfbce63a89	4689	/* Bits of channels in single or differential mode are set only for */
elmot	1:d0dfbce63a89	4690	/* differential mode (for single mode, mask of bits allowed to be set is */
elmot	1:d0dfbce63a89	4691	/* shifted out of range of bits of channels in single or differential mode. */
elmot	1:d0dfbce63a89	4692	MODIFY_REG(ADCx->DIFSEL,
elmot	1:d0dfbce63a89	4693	Channel & ADC_SINGLEDIFF_CHANNEL_MASK,
elmot	1:d0dfbce63a89	4694	(Channel & ADC_SINGLEDIFF_CHANNEL_MASK) & (ADC_DIFSEL_DIFSEL << (SingleDiff & ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK)));
elmot	1:d0dfbce63a89	4695	}
elmot	1:d0dfbce63a89	4696
elmot	1:d0dfbce63a89	4697	/**
elmot	1:d0dfbce63a89	4698	* @brief Get mode single-ended or differential input of the selected
elmot	1:d0dfbce63a89	4699	* ADC channel.
elmot	1:d0dfbce63a89	4700	* @note When configuring a channel 'i' in differential mode,
elmot	1:d0dfbce63a89	4701	* the channel 'i+1' is not usable separately.
elmot	1:d0dfbce63a89	4702	* Therefore, to ensure a channel is configured in single-ended mode,
elmot	1:d0dfbce63a89	4703	* the configuration of channel itself and the channel 'i-1' must be
elmot	1:d0dfbce63a89	4704	* read back (to ensure that the selected channel channel has not been
elmot	1:d0dfbce63a89	4705	* configured in differential mode by the previous channel).
elmot	1:d0dfbce63a89	4706	* @note Refer to Reference Manual to ensure the selected channel is
elmot	1:d0dfbce63a89	4707	* available in differential mode.
elmot	1:d0dfbce63a89	4708	* For example, internal channels (VrefInt, TempSensor, ...) are
elmot	1:d0dfbce63a89	4709	* not available in differential mode.
elmot	1:d0dfbce63a89	4710	* @note When configuring a channel 'i' in differential mode,
elmot	1:d0dfbce63a89	4711	* the channel 'i+1' is not usable separately.
elmot	1:d0dfbce63a89	4712	* @note On STM32L4, channels 15, 16, 17, 18 of ADC1, ADC2, ADC3 (if available)
elmot	1:d0dfbce63a89	4713	* are internally fixed to single-ended inputs configuration.
elmot	1:d0dfbce63a89	4714	* @note One or several values can be selected. In this case, the value
elmot	1:d0dfbce63a89	4715	* returned is null if all channels are in single ended-mode.
elmot	1:d0dfbce63a89	4716	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
elmot	1:d0dfbce63a89	4717	* @rmtoll DIFSEL DIFSEL LL_ADC_GetChannelSamplingTime
elmot	1:d0dfbce63a89	4718	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	4719	* @param Channel This parameter can be a combination of the following values:
elmot	1:d0dfbce63a89	4720	* @arg @ref LL_ADC_CHANNEL_0
elmot	1:d0dfbce63a89	4721	* @arg @ref LL_ADC_CHANNEL_1
elmot	1:d0dfbce63a89	4722	* @arg @ref LL_ADC_CHANNEL_2
elmot	1:d0dfbce63a89	4723	* @arg @ref LL_ADC_CHANNEL_3
elmot	1:d0dfbce63a89	4724	* @arg @ref LL_ADC_CHANNEL_4
elmot	1:d0dfbce63a89	4725	* @arg @ref LL_ADC_CHANNEL_5
elmot	1:d0dfbce63a89	4726	* @arg @ref LL_ADC_CHANNEL_6
elmot	1:d0dfbce63a89	4727	* @arg @ref LL_ADC_CHANNEL_7
elmot	1:d0dfbce63a89	4728	* @arg @ref LL_ADC_CHANNEL_8
elmot	1:d0dfbce63a89	4729	* @arg @ref LL_ADC_CHANNEL_9
elmot	1:d0dfbce63a89	4730	* @arg @ref LL_ADC_CHANNEL_10
elmot	1:d0dfbce63a89	4731	* @arg @ref LL_ADC_CHANNEL_11
elmot	1:d0dfbce63a89	4732	* @arg @ref LL_ADC_CHANNEL_12
elmot	1:d0dfbce63a89	4733	* @arg @ref LL_ADC_CHANNEL_13
elmot	1:d0dfbce63a89	4734	* @arg @ref LL_ADC_CHANNEL_14
elmot	1:d0dfbce63a89	4735	* @retval 0: channel in single-ended mode, else: channel in differential mode
elmot	1:d0dfbce63a89	4736	*/
elmot	1:d0dfbce63a89	4737	__STATIC_INLINE uint32_t LL_ADC_GetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel)
elmot	1:d0dfbce63a89	4738	{
elmot	1:d0dfbce63a89	4739	return (uint32_t)(READ_BIT(ADCx->DIFSEL, (Channel & ADC_SINGLEDIFF_CHANNEL_MASK)));
elmot	1:d0dfbce63a89	4740	}
elmot	1:d0dfbce63a89	4741
elmot	1:d0dfbce63a89	4742	/**
elmot	1:d0dfbce63a89	4743	* @}
elmot	1:d0dfbce63a89	4744	*/
elmot	1:d0dfbce63a89	4745
elmot	1:d0dfbce63a89	4746	/** @defgroup ADC_LL_EF_Configuration_ADC_AnalogWatchdog Configuration of ADC transversal scope: analog watchdog
elmot	1:d0dfbce63a89	4747	* @{
elmot	1:d0dfbce63a89	4748	*/
elmot	1:d0dfbce63a89	4749
elmot	1:d0dfbce63a89	4750	/**
elmot	1:d0dfbce63a89	4751	* @brief Set ADC analog watchdog monitored channels:
elmot	1:d0dfbce63a89	4752	* a single channel, multiple channels or all channels,
elmot	1:d0dfbce63a89	4753	* on ADC groups regular and-or injected.
elmot	1:d0dfbce63a89	4754	* @note Once monitored channels are selected, analog watchdog
elmot	1:d0dfbce63a89	4755	* is enabled.
elmot	1:d0dfbce63a89	4756	* @note In case of need to define a single channel to monitor
elmot	1:d0dfbce63a89	4757	* with analog watchdog from sequencer channel definition,
elmot	1:d0dfbce63a89	4758	* use helper macro @ref __LL_ADC_ANALOGWD_CHANNEL_GROUP().
elmot	1:d0dfbce63a89	4759	* @note On this STM32 serie, there are 2 kinds of analog watchdog
elmot	1:d0dfbce63a89	4760	* instance:
elmot	1:d0dfbce63a89	4761	* - AWD standard (instance AWD1):
elmot	1:d0dfbce63a89	4762	* - channels monitored: can monitor 1 channel or all channels.
elmot	1:d0dfbce63a89	4763	* - groups monitored: ADC groups regular and-or injected.
elmot	1:d0dfbce63a89	4764	* - resolution: resolution is not limited (corresponds to
elmot	1:d0dfbce63a89	4765	* ADC resolution configured).
elmot	1:d0dfbce63a89	4766	* - AWD flexible (instances AWD2, AWD3):
elmot	1:d0dfbce63a89	4767	* - channels monitored: flexible on channels monitored, selection is
elmot	1:d0dfbce63a89	4768	* channel wise, from from 1 to all channels.
elmot	1:d0dfbce63a89	4769	* Specificity of this analog watchdog: Multiple channels can
elmot	1:d0dfbce63a89	4770	* be selected. For example:
elmot	1:d0dfbce63a89	4771	* (LL_ADC_AWD_CHANNEL4_REG_INJ \| LL_ADC_AWD_CHANNEL5_REG_INJ \| ...)
elmot	1:d0dfbce63a89	4772	* - groups monitored: not selection possible (monitoring on both
elmot	1:d0dfbce63a89	4773	* groups regular and injected).
elmot	1:d0dfbce63a89	4774	* Channels selected are monitored on groups regular and injected:
elmot	1:d0dfbce63a89	4775	* LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters
elmot	1:d0dfbce63a89	4776	* LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ)
elmot	1:d0dfbce63a89	4777	* - resolution: resolution is limited to 8 bits: if ADC resolution is
elmot	1:d0dfbce63a89	4778	* 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits
elmot	1:d0dfbce63a89	4779	* the 2 LSB are ignored.
elmot	1:d0dfbce63a89	4780	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	4781	* ADC state:
elmot	1:d0dfbce63a89	4782	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	4783	* on either groups regular or injected.
elmot	1:d0dfbce63a89	4784	* @rmtoll CFGR AWD1CH LL_ADC_SetAnalogWDMonitChannels\n
elmot	1:d0dfbce63a89	4785	* CFGR AWD1SGL LL_ADC_SetAnalogWDMonitChannels\n
elmot	1:d0dfbce63a89	4786	* CFGR AWD1EN LL_ADC_SetAnalogWDMonitChannels\n
elmot	1:d0dfbce63a89	4787	* CFGR JAWD1EN LL_ADC_SetAnalogWDMonitChannels\n
elmot	1:d0dfbce63a89	4788	* AWD2CR AWD2CH LL_ADC_SetAnalogWDMonitChannels\n
elmot	1:d0dfbce63a89	4789	* AWD3CR AWD3CH LL_ADC_SetAnalogWDMonitChannels
elmot	1:d0dfbce63a89	4790	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	4791	* @param AWDy This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4792	* @arg @ref LL_ADC_AWD1
elmot	1:d0dfbce63a89	4793	* @arg @ref LL_ADC_AWD2
elmot	1:d0dfbce63a89	4794	* @arg @ref LL_ADC_AWD3
elmot	1:d0dfbce63a89	4795	* @param AWDChannelGroup This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4796	* @arg @ref LL_ADC_AWD_DISABLE
elmot	1:d0dfbce63a89	4797	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0)
elmot	1:d0dfbce63a89	4798	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0)
elmot	1:d0dfbce63a89	4799	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ
elmot	1:d0dfbce63a89	4800	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0)
elmot	1:d0dfbce63a89	4801	* @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0)
elmot	1:d0dfbce63a89	4802	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ
elmot	1:d0dfbce63a89	4803	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0)
elmot	1:d0dfbce63a89	4804	* @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0)
elmot	1:d0dfbce63a89	4805	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ
elmot	1:d0dfbce63a89	4806	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0)
elmot	1:d0dfbce63a89	4807	* @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0)
elmot	1:d0dfbce63a89	4808	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ
elmot	1:d0dfbce63a89	4809	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0)
elmot	1:d0dfbce63a89	4810	* @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0)
elmot	1:d0dfbce63a89	4811	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ
elmot	1:d0dfbce63a89	4812	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0)
elmot	1:d0dfbce63a89	4813	* @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0)
elmot	1:d0dfbce63a89	4814	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ
elmot	1:d0dfbce63a89	4815	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0)
elmot	1:d0dfbce63a89	4816	* @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0)
elmot	1:d0dfbce63a89	4817	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ
elmot	1:d0dfbce63a89	4818	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0)
elmot	1:d0dfbce63a89	4819	* @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0)
elmot	1:d0dfbce63a89	4820	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ
elmot	1:d0dfbce63a89	4821	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0)
elmot	1:d0dfbce63a89	4822	* @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0)
elmot	1:d0dfbce63a89	4823	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ
elmot	1:d0dfbce63a89	4824	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0)
elmot	1:d0dfbce63a89	4825	* @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0)
elmot	1:d0dfbce63a89	4826	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ
elmot	1:d0dfbce63a89	4827	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0)
elmot	1:d0dfbce63a89	4828	* @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0)
elmot	1:d0dfbce63a89	4829	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ
elmot	1:d0dfbce63a89	4830	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0)
elmot	1:d0dfbce63a89	4831	* @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0)
elmot	1:d0dfbce63a89	4832	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ
elmot	1:d0dfbce63a89	4833	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0)
elmot	1:d0dfbce63a89	4834	* @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0)
elmot	1:d0dfbce63a89	4835	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ
elmot	1:d0dfbce63a89	4836	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0)
elmot	1:d0dfbce63a89	4837	* @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0)
elmot	1:d0dfbce63a89	4838	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ
elmot	1:d0dfbce63a89	4839	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0)
elmot	1:d0dfbce63a89	4840	* @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0)
elmot	1:d0dfbce63a89	4841	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ
elmot	1:d0dfbce63a89	4842	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0)
elmot	1:d0dfbce63a89	4843	* @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0)
elmot	1:d0dfbce63a89	4844	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ
elmot	1:d0dfbce63a89	4845	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0)
elmot	1:d0dfbce63a89	4846	* @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0)
elmot	1:d0dfbce63a89	4847	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ
elmot	1:d0dfbce63a89	4848	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0)
elmot	1:d0dfbce63a89	4849	* @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0)
elmot	1:d0dfbce63a89	4850	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ
elmot	1:d0dfbce63a89	4851	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0)
elmot	1:d0dfbce63a89	4852	* @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0)
elmot	1:d0dfbce63a89	4853	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ
elmot	1:d0dfbce63a89	4854	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0)
elmot	1:d0dfbce63a89	4855	* @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0)
elmot	1:d0dfbce63a89	4856	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ
elmot	1:d0dfbce63a89	4857	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG (0)(1)
elmot	1:d0dfbce63a89	4858	* @arg @ref LL_ADC_AWD_CH_VREFINT_INJ (0)(1)
elmot	1:d0dfbce63a89	4859	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG_INJ (1)
elmot	1:d0dfbce63a89	4860	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG (0)(4)
elmot	1:d0dfbce63a89	4861	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_INJ (0)(4)
elmot	1:d0dfbce63a89	4862	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG_INJ (4)
elmot	1:d0dfbce63a89	4863	* @arg @ref LL_ADC_AWD_CH_VBAT_REG (0)(4)
elmot	1:d0dfbce63a89	4864	* @arg @ref LL_ADC_AWD_CH_VBAT_INJ (0)(4)
elmot	1:d0dfbce63a89	4865	* @arg @ref LL_ADC_AWD_CH_VBAT_REG_INJ (4)
elmot	1:d0dfbce63a89	4866	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_REG (0)(2)(5)
elmot	1:d0dfbce63a89	4867	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_INJ (0)(2)(5)
elmot	1:d0dfbce63a89	4868	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_REG_INJ (2)(5)
elmot	1:d0dfbce63a89	4869	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_REG (0)(2)(5)
elmot	1:d0dfbce63a89	4870	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_INJ (0)(2)(5)
elmot	1:d0dfbce63a89	4871	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_REG_INJ (2)(5)
elmot	1:d0dfbce63a89	4872	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_REG (0)(2)(6)
elmot	1:d0dfbce63a89	4873	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_INJ (0)(2)(6)
elmot	1:d0dfbce63a89	4874	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_REG_INJ (2)(6)
elmot	1:d0dfbce63a89	4875	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_REG (0)(2)(6)
elmot	1:d0dfbce63a89	4876	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_INJ (0)(2)(6)
elmot	1:d0dfbce63a89	4877	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_REG_INJ (2)(6)
elmot	1:d0dfbce63a89	4878	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC3_REG (0)(3)(6)
elmot	1:d0dfbce63a89	4879	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC3_INJ (0)(3)(6)
elmot	1:d0dfbce63a89	4880	* @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC3_REG_INJ (3)(6)
elmot	1:d0dfbce63a89	4881	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC3_REG (0)(3)(6)
elmot	1:d0dfbce63a89	4882	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC3_INJ (0)(3)(6)
elmot	1:d0dfbce63a89	4883	* @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC3_REG_INJ (3)(6)
elmot	1:d0dfbce63a89	4884	*
elmot	1:d0dfbce63a89	4885	* (0) On STM32L4, parameter available only on analog watchdog number: AWD1.\n
elmot	1:d0dfbce63a89	4886	* (1) On STM32L4, parameter available only on ADC instance: ADC1.\n
elmot	1:d0dfbce63a89	4887	* (2) On STM32L4, parameter available only on ADC instance: ADC2.\n
elmot	1:d0dfbce63a89	4888	* (3) On STM32L4, parameter available only on ADC instance: ADC3.\n
elmot	1:d0dfbce63a89	4889	* (4) On STM32L4, parameter available only on ADC instances: ADC1, ADC3.
elmot	1:d0dfbce63a89	4890	* (5) On STM32L4, parameter available on devices with only 1 ADC instance.\n
elmot	1:d0dfbce63a89	4891	* (6) On STM32L4, parameter available on devices with several ADC instances.
elmot	1:d0dfbce63a89	4892	* @retval None
elmot	1:d0dfbce63a89	4893	*/
elmot	1:d0dfbce63a89	4894	__STATIC_INLINE void LL_ADC_SetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDChannelGroup)
elmot	1:d0dfbce63a89	4895	{
elmot	1:d0dfbce63a89	4896	/* Set bits with content of parameter "AWDChannelGroup" with bits position */
elmot	1:d0dfbce63a89	4897	/* in register and register position depending on parameter "AWDy". */
elmot	1:d0dfbce63a89	4898	/* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */
elmot	1:d0dfbce63a89	4899	/* containing other bits reserved for other purpose. */
elmot	1:d0dfbce63a89	4900	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, __ADC_MASK_SHIFT(AWDy, ADC_AWD_CRX_REGOFFSET_MASK)
elmot	1:d0dfbce63a89	4901	+ ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) * ADC_AWD_CR12_REGOFFSETGAP_VAL));
elmot	1:d0dfbce63a89	4902
elmot	1:d0dfbce63a89	4903	MODIFY_REG(*preg,
elmot	1:d0dfbce63a89	4904	(AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK),
elmot	1:d0dfbce63a89	4905	AWDChannelGroup & AWDy);
elmot	1:d0dfbce63a89	4906	}
elmot	1:d0dfbce63a89	4907
elmot	1:d0dfbce63a89	4908	/**
elmot	1:d0dfbce63a89	4909	* @brief Get ADC analog watchdog monitored channel.
elmot	1:d0dfbce63a89	4910	* @note Usage of the returned channel number:
elmot	1:d0dfbce63a89	4911	* - To reinject this channel into another function LL_ADC_xxx:
elmot	1:d0dfbce63a89	4912	* the returned channel number is only partly formatted on definition
elmot	1:d0dfbce63a89	4913	* of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
elmot	1:d0dfbce63a89	4914	* with parts of literals LL_ADC_CHANNEL_x or using
elmot	1:d0dfbce63a89	4915	* helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
elmot	1:d0dfbce63a89	4916	* Then the selected literal LL_ADC_CHANNEL_x can be used
elmot	1:d0dfbce63a89	4917	* as parameter for another function.
elmot	1:d0dfbce63a89	4918	* - To get the channel number in decimal format:
elmot	1:d0dfbce63a89	4919	* process the returned value with the helper macro
elmot	1:d0dfbce63a89	4920	* @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
elmot	1:d0dfbce63a89	4921	* Applicable only when the analog watchdog is set to monitor
elmot	1:d0dfbce63a89	4922	* one channel.
elmot	1:d0dfbce63a89	4923	* @note On this STM32 serie, there are 2 kinds of analog watchdog
elmot	1:d0dfbce63a89	4924	* instance:
elmot	1:d0dfbce63a89	4925	* - AWD standard (instance AWD1):
elmot	1:d0dfbce63a89	4926	* - channels monitored: can monitor 1 channel or all channels.
elmot	1:d0dfbce63a89	4927	* - groups monitored: ADC groups regular and-or injected.
elmot	1:d0dfbce63a89	4928	* - resolution: resolution is not limited (corresponds to
elmot	1:d0dfbce63a89	4929	* ADC resolution configured).
elmot	1:d0dfbce63a89	4930	* - AWD flexible (instances AWD2, AWD3):
elmot	1:d0dfbce63a89	4931	* - channels monitored: flexible on channels monitored, selection is
elmot	1:d0dfbce63a89	4932	* channel wise, from from 1 to all channels.
elmot	1:d0dfbce63a89	4933	* Specificity of this analog watchdog: Multiple channels can
elmot	1:d0dfbce63a89	4934	* be selected. For example:
elmot	1:d0dfbce63a89	4935	* (LL_ADC_AWD_CHANNEL4_REG_INJ \| LL_ADC_AWD_CHANNEL5_REG_INJ \| ...)
elmot	1:d0dfbce63a89	4936	* - groups monitored: not selection possible (monitoring on both
elmot	1:d0dfbce63a89	4937	* groups regular and injected).
elmot	1:d0dfbce63a89	4938	* Channels selected are monitored on groups regular and injected:
elmot	1:d0dfbce63a89	4939	* LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters
elmot	1:d0dfbce63a89	4940	* LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ)
elmot	1:d0dfbce63a89	4941	* - resolution: resolution is limited to 8 bits: if ADC resolution is
elmot	1:d0dfbce63a89	4942	* 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits
elmot	1:d0dfbce63a89	4943	* the 2 LSB are ignored.
elmot	1:d0dfbce63a89	4944	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	4945	* ADC state:
elmot	1:d0dfbce63a89	4946	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	4947	* on either groups regular or injected.
elmot	1:d0dfbce63a89	4948	* @rmtoll CFGR AWD1CH LL_ADC_GetAnalogWDMonitChannels\n
elmot	1:d0dfbce63a89	4949	* CFGR AWD1SGL LL_ADC_GetAnalogWDMonitChannels\n
elmot	1:d0dfbce63a89	4950	* CFGR AWD1EN LL_ADC_GetAnalogWDMonitChannels\n
elmot	1:d0dfbce63a89	4951	* CFGR JAWD1EN LL_ADC_GetAnalogWDMonitChannels\n
elmot	1:d0dfbce63a89	4952	* AWD2CR AWD2CH LL_ADC_GetAnalogWDMonitChannels\n
elmot	1:d0dfbce63a89	4953	* AWD3CR AWD3CH LL_ADC_GetAnalogWDMonitChannels
elmot	1:d0dfbce63a89	4954	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	4955	* @param AWDy This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4956	* @arg @ref LL_ADC_AWD1
elmot	1:d0dfbce63a89	4957	* @arg @ref LL_ADC_AWD2 (1)
elmot	1:d0dfbce63a89	4958	* @arg @ref LL_ADC_AWD3 (1)
elmot	1:d0dfbce63a89	4959	*
elmot	1:d0dfbce63a89	4960	* (1) On this AWD number, monitored channel can be retrieved
elmot	1:d0dfbce63a89	4961	* if only 1 channel is programmed (or none or all channels).
elmot	1:d0dfbce63a89	4962	* This function cannot retrieve monitored channel if
elmot	1:d0dfbce63a89	4963	* multiple channels are programmed simultaneously
elmot	1:d0dfbce63a89	4964	* by bitfield.
elmot	1:d0dfbce63a89	4965	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	4966	* @arg @ref LL_ADC_AWD_DISABLE
elmot	1:d0dfbce63a89	4967	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0)
elmot	1:d0dfbce63a89	4968	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0)
elmot	1:d0dfbce63a89	4969	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ
elmot	1:d0dfbce63a89	4970	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0)
elmot	1:d0dfbce63a89	4971	* @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0)
elmot	1:d0dfbce63a89	4972	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ
elmot	1:d0dfbce63a89	4973	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0)
elmot	1:d0dfbce63a89	4974	* @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0)
elmot	1:d0dfbce63a89	4975	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ
elmot	1:d0dfbce63a89	4976	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0)
elmot	1:d0dfbce63a89	4977	* @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0)
elmot	1:d0dfbce63a89	4978	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ
elmot	1:d0dfbce63a89	4979	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0)
elmot	1:d0dfbce63a89	4980	* @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0)
elmot	1:d0dfbce63a89	4981	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ
elmot	1:d0dfbce63a89	4982	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0)
elmot	1:d0dfbce63a89	4983	* @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0)
elmot	1:d0dfbce63a89	4984	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ
elmot	1:d0dfbce63a89	4985	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0)
elmot	1:d0dfbce63a89	4986	* @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0)
elmot	1:d0dfbce63a89	4987	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ
elmot	1:d0dfbce63a89	4988	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0)
elmot	1:d0dfbce63a89	4989	* @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0)
elmot	1:d0dfbce63a89	4990	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ
elmot	1:d0dfbce63a89	4991	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0)
elmot	1:d0dfbce63a89	4992	* @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0)
elmot	1:d0dfbce63a89	4993	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ
elmot	1:d0dfbce63a89	4994	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0)
elmot	1:d0dfbce63a89	4995	* @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0)
elmot	1:d0dfbce63a89	4996	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ
elmot	1:d0dfbce63a89	4997	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0)
elmot	1:d0dfbce63a89	4998	* @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0)
elmot	1:d0dfbce63a89	4999	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ
elmot	1:d0dfbce63a89	5000	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0)
elmot	1:d0dfbce63a89	5001	* @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0)
elmot	1:d0dfbce63a89	5002	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ
elmot	1:d0dfbce63a89	5003	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0)
elmot	1:d0dfbce63a89	5004	* @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0)
elmot	1:d0dfbce63a89	5005	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ
elmot	1:d0dfbce63a89	5006	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0)
elmot	1:d0dfbce63a89	5007	* @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0)
elmot	1:d0dfbce63a89	5008	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ
elmot	1:d0dfbce63a89	5009	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0)
elmot	1:d0dfbce63a89	5010	* @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0)
elmot	1:d0dfbce63a89	5011	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ
elmot	1:d0dfbce63a89	5012	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0)
elmot	1:d0dfbce63a89	5013	* @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0)
elmot	1:d0dfbce63a89	5014	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ
elmot	1:d0dfbce63a89	5015	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0)
elmot	1:d0dfbce63a89	5016	* @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0)
elmot	1:d0dfbce63a89	5017	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ
elmot	1:d0dfbce63a89	5018	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0)
elmot	1:d0dfbce63a89	5019	* @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0)
elmot	1:d0dfbce63a89	5020	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ
elmot	1:d0dfbce63a89	5021	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0)
elmot	1:d0dfbce63a89	5022	* @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0)
elmot	1:d0dfbce63a89	5023	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ
elmot	1:d0dfbce63a89	5024	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0)
elmot	1:d0dfbce63a89	5025	* @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0)
elmot	1:d0dfbce63a89	5026	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ
elmot	1:d0dfbce63a89	5027	*
elmot	1:d0dfbce63a89	5028	* (0) On STM32L4, parameter available only on analog watchdog number: AWD1.
elmot	1:d0dfbce63a89	5029	*/
elmot	1:d0dfbce63a89	5030	__STATIC_INLINE uint32_t LL_ADC_GetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDy)
elmot	1:d0dfbce63a89	5031	{
elmot	1:d0dfbce63a89	5032	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, __ADC_MASK_SHIFT(AWDy, ADC_AWD_CRX_REGOFFSET_MASK)
elmot	1:d0dfbce63a89	5033	+ ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) * ADC_AWD_CR12_REGOFFSETGAP_VAL));
elmot	1:d0dfbce63a89	5034
elmot	1:d0dfbce63a89	5035	/* Variable "AWDy" used to retrieve appropriate bitfield corresponding to */
elmot	1:d0dfbce63a89	5036	/* ADC_AWD_CR1_CHANNEL_MASK or ADC_AWD_CR23_CHANNEL_MASK. */
elmot	1:d0dfbce63a89	5037	register uint32_t AWD123ChannelGroup = READ_BIT(*preg, (AWDy \| ADC_AWD_CR_ALL_CHANNEL_MASK));
elmot	1:d0dfbce63a89	5038
elmot	1:d0dfbce63a89	5039	/* Set variable of AWD1 monitored channel according to AWD1 features */
elmot	1:d0dfbce63a89	5040	/* and ADC channel definition: */
elmot	1:d0dfbce63a89	5041	/* - channel ID with number */
elmot	1:d0dfbce63a89	5042	/* - channel ID with bitfield */
elmot	1:d0dfbce63a89	5043	/* - AWD1 single or all channels */
elmot	1:d0dfbce63a89	5044	/* - AWD1 enable or disable (also used to discard AWD1 bitfield in case of */
elmot	1:d0dfbce63a89	5045	/* AWD2 or AWD3 selected). */
elmot	1:d0dfbce63a89	5046	register uint32_t AWD1ChannelSingle = ((AWD123ChannelGroup & ADC_CFGR_AWD1SGL) >> ADC_CFGR_AWD1SGL_BITOFFSET_POS);
elmot	1:d0dfbce63a89	5047
elmot	1:d0dfbce63a89	5048	register uint32_t AWD1ChannelGroup = ( ( AWD123ChannelGroup
elmot	1:d0dfbce63a89	5049	\| ((ADC_CHANNEL_0_BITFIELD << ((AWD123ChannelGroup & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS)) * AWD1ChannelSingle)
elmot	1:d0dfbce63a89	5050	\| (ADC_CHANNEL_ID_BITFIELD_MASK * (~AWD1ChannelSingle & ((uint32_t)0x00000001U)))
elmot	1:d0dfbce63a89	5051	)
elmot	1:d0dfbce63a89	5052	* (((AWD123ChannelGroup & ADC_CFGR_JAWD1EN) >> ADC_CFGR_JAWD1EN_BITOFFSET_POS) \| ((AWD123ChannelGroup & ADC_CFGR_AWD1EN) >> ADC_CFGR_AWD1EN_BITOFFSET_POS))
elmot	1:d0dfbce63a89	5053	);
elmot	1:d0dfbce63a89	5054
elmot	1:d0dfbce63a89	5055	/* Set variable of AWD2 and AWD3 monitored channel according to AWD2-3 */
elmot	1:d0dfbce63a89	5056	/* features and ADC channel definition: */
elmot	1:d0dfbce63a89	5057	/* - channel ID with number */
elmot	1:d0dfbce63a89	5058	/* - channel ID with bitfield */
elmot	1:d0dfbce63a89	5059	/* - AWD2-3 single or all channels (shift value 32 (0x1 shift 5) used to */
elmot	1:d0dfbce63a89	5060	/* shift AWD1 equivalent single-all channels out of register) */
elmot	1:d0dfbce63a89	5061	/* - AWD2-3 enable or disable */
elmot	1:d0dfbce63a89	5062	/* Note: Use modulo 3 to avoid a shift value too long. On AWD2 and AWD3, */
elmot	1:d0dfbce63a89	5063	/* channel can be read back if only 1 channel monitoring */
elmot	1:d0dfbce63a89	5064	/* is activated, therefore the channel monitoring value channel "3" */
elmot	1:d0dfbce63a89	5065	/* is not not supported by this function, there is no risk of */
elmot	1:d0dfbce63a89	5066	/* conflict. */
elmot	1:d0dfbce63a89	5067	register uint32_t AWD23Enabled = ((((uint32_t)0x00000001U) >> (AWD123ChannelGroup % 3U)) << 6U); /* Value "0" if AWD2-3 is enabled, value "32" if AWD2-3 is disabled */
elmot	1:d0dfbce63a89	5068
elmot	1:d0dfbce63a89	5069	register uint32_t AWD23ChannelGroup = ((( AWD123ChannelGroup
elmot	1:d0dfbce63a89	5070	\| ((uint32_t)POSITION_VAL(AWD123ChannelGroup) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS)
elmot	1:d0dfbce63a89	5071	\| ((ADC_CFGR_AWD1SGL) >> ((((uint32_t)0x00000001U) >> (ADC_AWD_CR23_CHANNEL_MASK - AWD123ChannelGroup)) << 5U))
elmot	1:d0dfbce63a89	5072	\| (ADC_CFGR_JAWD1EN \| ADC_CFGR_AWD1EN)
elmot	1:d0dfbce63a89	5073	) >> AWD23Enabled
elmot	1:d0dfbce63a89	5074	) >> (((AWDy & ADC_CFGR_AWD1SGL) >> ADC_CFGR_AWD1SGL_BITOFFSET_POS) << 5U));
elmot	1:d0dfbce63a89	5075
elmot	1:d0dfbce63a89	5076	return (AWD1ChannelGroup \| AWD23ChannelGroup);
elmot	1:d0dfbce63a89	5077	}
elmot	1:d0dfbce63a89	5078
elmot	1:d0dfbce63a89	5079	/**
elmot	1:d0dfbce63a89	5080	* @brief Set ADC analog watchdog thresholds value of both thresholds
elmot	1:d0dfbce63a89	5081	* high and low.
elmot	1:d0dfbce63a89	5082	* @note If value of only one threshold high or low must be set,
elmot	1:d0dfbce63a89	5083	* use function @ref LL_ADC_SetAnalogWDThresholds().
elmot	1:d0dfbce63a89	5084	* @note In case of ADC resolution different of 12 bits,
elmot	1:d0dfbce63a89	5085	* analog watchdog thresholds data require a specific shift.
elmot	1:d0dfbce63a89	5086	* Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
elmot	1:d0dfbce63a89	5087	* @note On this STM32 serie, there are 2 kinds of analog watchdog
elmot	1:d0dfbce63a89	5088	* instance:
elmot	1:d0dfbce63a89	5089	* - AWD standard (instance AWD1):
elmot	1:d0dfbce63a89	5090	* - channels monitored: can monitor 1 channel or all channels.
elmot	1:d0dfbce63a89	5091	* - groups monitored: ADC groups regular and-or injected.
elmot	1:d0dfbce63a89	5092	* - resolution: resolution is not limited (corresponds to
elmot	1:d0dfbce63a89	5093	* ADC resolution configured).
elmot	1:d0dfbce63a89	5094	* - AWD flexible (instances AWD2, AWD3):
elmot	1:d0dfbce63a89	5095	* - channels monitored: flexible on channels monitored, selection is
elmot	1:d0dfbce63a89	5096	* channel wise, from from 1 to all channels.
elmot	1:d0dfbce63a89	5097	* Specificity of this analog watchdog: Multiple channels can
elmot	1:d0dfbce63a89	5098	* be selected. For example:
elmot	1:d0dfbce63a89	5099	* (LL_ADC_AWD_CHANNEL4_REG_INJ \| LL_ADC_AWD_CHANNEL5_REG_INJ \| ...)
elmot	1:d0dfbce63a89	5100	* - groups monitored: not selection possible (monitoring on both
elmot	1:d0dfbce63a89	5101	* groups regular and injected).
elmot	1:d0dfbce63a89	5102	* Channels selected are monitored on groups regular and injected:
elmot	1:d0dfbce63a89	5103	* LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters
elmot	1:d0dfbce63a89	5104	* LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ)
elmot	1:d0dfbce63a89	5105	* - resolution: resolution is limited to 8 bits: if ADC resolution is
elmot	1:d0dfbce63a89	5106	* 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits
elmot	1:d0dfbce63a89	5107	* the 2 LSB are ignored.
elmot	1:d0dfbce63a89	5108	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5109	* ADC state:
elmot	1:d0dfbce63a89	5110	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	5111	* on either groups regular or injected.
elmot	1:d0dfbce63a89	5112	* @rmtoll TR1 HT1 LL_ADC_ConfigAnalogWDThresholds\n
elmot	1:d0dfbce63a89	5113	* TR2 HT2 LL_ADC_ConfigAnalogWDThresholds\n
elmot	1:d0dfbce63a89	5114	* TR3 HT3 LL_ADC_ConfigAnalogWDThresholds\n
elmot	1:d0dfbce63a89	5115	* TR1 LT1 LL_ADC_ConfigAnalogWDThresholds\n
elmot	1:d0dfbce63a89	5116	* TR2 LT2 LL_ADC_ConfigAnalogWDThresholds\n
elmot	1:d0dfbce63a89	5117	* TR3 LT3 LL_ADC_ConfigAnalogWDThresholds
elmot	1:d0dfbce63a89	5118	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5119	* @param AWDy This parameter can be one of the following values:
elmot	1:d0dfbce63a89	5120	* @arg @ref LL_ADC_AWD1
elmot	1:d0dfbce63a89	5121	* @arg @ref LL_ADC_AWD2
elmot	1:d0dfbce63a89	5122	* @arg @ref LL_ADC_AWD3
elmot	1:d0dfbce63a89	5123	* @param AWDThresholdHighValue Value between Min_Data=0x000 and Max_Data=0xFFF
elmot	1:d0dfbce63a89	5124	* @param AWDThresholdLowValue Value between Min_Data=0x000 and Max_Data=0xFFF
elmot	1:d0dfbce63a89	5125	* @retval None
elmot	1:d0dfbce63a89	5126	*/
elmot	1:d0dfbce63a89	5127	__STATIC_INLINE void LL_ADC_ConfigAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDThresholdHighValue, uint32_t AWDThresholdLowValue)
elmot	1:d0dfbce63a89	5128	{
elmot	1:d0dfbce63a89	5129	/* Set bits with content of parameter "AWDThresholdxxxValue" with bits */
elmot	1:d0dfbce63a89	5130	/* position in register and register position depending on parameter */
elmot	1:d0dfbce63a89	5131	/* "AWDy". */
elmot	1:d0dfbce63a89	5132	/* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */
elmot	1:d0dfbce63a89	5133	/* containing other bits reserved for other purpose. */
elmot	1:d0dfbce63a89	5134	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, __ADC_MASK_SHIFT(AWDy, ADC_AWD_TRX_REGOFFSET_MASK));
elmot	1:d0dfbce63a89	5135
elmot	1:d0dfbce63a89	5136	MODIFY_REG(*preg,
elmot	1:d0dfbce63a89	5137	ADC_TR1_HT1 \| ADC_TR1_LT1,
elmot	1:d0dfbce63a89	5138	(AWDThresholdHighValue << ADC_TR1_HT1_BITOFFSET_POS) \| AWDThresholdLowValue);
elmot	1:d0dfbce63a89	5139	}
elmot	1:d0dfbce63a89	5140
elmot	1:d0dfbce63a89	5141	/**
elmot	1:d0dfbce63a89	5142	* @brief Set ADC analog watchdog threshold value of threshold
elmot	1:d0dfbce63a89	5143	* high or low.
elmot	1:d0dfbce63a89	5144	* @note If values of both thresholds high or low must be set,
elmot	1:d0dfbce63a89	5145	* use function @ref LL_ADC_ConfigAnalogWDThresholds().
elmot	1:d0dfbce63a89	5146	* @note In case of ADC resolution different of 12 bits,
elmot	1:d0dfbce63a89	5147	* analog watchdog thresholds data require a specific shift.
elmot	1:d0dfbce63a89	5148	* Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
elmot	1:d0dfbce63a89	5149	* @note On this STM32 serie, there are 2 kinds of analog watchdog
elmot	1:d0dfbce63a89	5150	* instance:
elmot	1:d0dfbce63a89	5151	* - AWD standard (instance AWD1):
elmot	1:d0dfbce63a89	5152	* - channels monitored: can monitor 1 channel or all channels.
elmot	1:d0dfbce63a89	5153	* - groups monitored: ADC groups regular and-or injected.
elmot	1:d0dfbce63a89	5154	* - resolution: resolution is not limited (corresponds to
elmot	1:d0dfbce63a89	5155	* ADC resolution configured).
elmot	1:d0dfbce63a89	5156	* - AWD flexible (instances AWD2, AWD3):
elmot	1:d0dfbce63a89	5157	* - channels monitored: flexible on channels monitored, selection is
elmot	1:d0dfbce63a89	5158	* channel wise, from from 1 to all channels.
elmot	1:d0dfbce63a89	5159	* Specificity of this analog watchdog: Multiple channels can
elmot	1:d0dfbce63a89	5160	* be selected. For example:
elmot	1:d0dfbce63a89	5161	* (LL_ADC_AWD_CHANNEL4_REG_INJ \| LL_ADC_AWD_CHANNEL5_REG_INJ \| ...)
elmot	1:d0dfbce63a89	5162	* - groups monitored: not selection possible (monitoring on both
elmot	1:d0dfbce63a89	5163	* groups regular and injected).
elmot	1:d0dfbce63a89	5164	* Channels selected are monitored on groups regular and injected:
elmot	1:d0dfbce63a89	5165	* LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters
elmot	1:d0dfbce63a89	5166	* LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ)
elmot	1:d0dfbce63a89	5167	* - resolution: resolution is limited to 8 bits: if ADC resolution is
elmot	1:d0dfbce63a89	5168	* 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits
elmot	1:d0dfbce63a89	5169	* the 2 LSB are ignored.
elmot	1:d0dfbce63a89	5170	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5171	* ADC state:
elmot	1:d0dfbce63a89	5172	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	5173	* on either groups regular or injected.
elmot	1:d0dfbce63a89	5174	* @rmtoll TR1 HT1 LL_ADC_SetAnalogWDThresholds\n
elmot	1:d0dfbce63a89	5175	* TR2 HT2 LL_ADC_SetAnalogWDThresholds\n
elmot	1:d0dfbce63a89	5176	* TR3 HT3 LL_ADC_SetAnalogWDThresholds\n
elmot	1:d0dfbce63a89	5177	* TR1 LT1 LL_ADC_SetAnalogWDThresholds\n
elmot	1:d0dfbce63a89	5178	* TR2 LT2 LL_ADC_SetAnalogWDThresholds\n
elmot	1:d0dfbce63a89	5179	* TR3 LT3 LL_ADC_SetAnalogWDThresholds
elmot	1:d0dfbce63a89	5180	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5181	* @param AWDy This parameter can be one of the following values:
elmot	1:d0dfbce63a89	5182	* @arg @ref LL_ADC_AWD1
elmot	1:d0dfbce63a89	5183	* @arg @ref LL_ADC_AWD2
elmot	1:d0dfbce63a89	5184	* @arg @ref LL_ADC_AWD3
elmot	1:d0dfbce63a89	5185	* @param AWDThresholdsHighLow This parameter can be one of the following values:
elmot	1:d0dfbce63a89	5186	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
elmot	1:d0dfbce63a89	5187	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
elmot	1:d0dfbce63a89	5188	* @param AWDThresholdValue: Value between Min_Data=0x000 and Max_Data=0xFFF
elmot	1:d0dfbce63a89	5189	* @retval None
elmot	1:d0dfbce63a89	5190	*/
elmot	1:d0dfbce63a89	5191	__STATIC_INLINE void LL_ADC_SetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDThresholdsHighLow, uint32_t AWDThresholdValue)
elmot	1:d0dfbce63a89	5192	{
elmot	1:d0dfbce63a89	5193	/* Set bits with content of parameter "AWDThresholdValue" with bits */
elmot	1:d0dfbce63a89	5194	/* position in register and register position depending on parameters */
elmot	1:d0dfbce63a89	5195	/* "AWDThresholdsHighLow" and "AWDy". */
elmot	1:d0dfbce63a89	5196	/* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */
elmot	1:d0dfbce63a89	5197	/* containing other bits reserved for other purpose. */
elmot	1:d0dfbce63a89	5198	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, __ADC_MASK_SHIFT(AWDy, ADC_AWD_TRX_REGOFFSET_MASK));
elmot	1:d0dfbce63a89	5199
elmot	1:d0dfbce63a89	5200	MODIFY_REG(*preg,
elmot	1:d0dfbce63a89	5201	AWDThresholdsHighLow,
elmot	1:d0dfbce63a89	5202	AWDThresholdValue << POSITION_VAL(AWDThresholdsHighLow));
elmot	1:d0dfbce63a89	5203	}
elmot	1:d0dfbce63a89	5204
elmot	1:d0dfbce63a89	5205	/**
elmot	1:d0dfbce63a89	5206	* @brief Get ADC analog watchdog threshold value of threshold high,
elmot	1:d0dfbce63a89	5207	* threshold low or raw data with ADC thresholds high and low
elmot	1:d0dfbce63a89	5208	* concatenated.
elmot	1:d0dfbce63a89	5209	* @note If raw data with ADC thresholds high and low is retrieved,
elmot	1:d0dfbce63a89	5210	* the data of each threshold high or low can be isolated
elmot	1:d0dfbce63a89	5211	* using helper macro:
elmot	1:d0dfbce63a89	5212	* @ref __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW().
elmot	1:d0dfbce63a89	5213	* @note In case of ADC resolution different of 12 bits,
elmot	1:d0dfbce63a89	5214	* analog watchdog thresholds data require a specific shift.
elmot	1:d0dfbce63a89	5215	* Use helper macro @ref __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION().
elmot	1:d0dfbce63a89	5216	* @rmtoll TR1 HT1 LL_ADC_GetAnalogWDThresholds\n
elmot	1:d0dfbce63a89	5217	* TR2 HT2 LL_ADC_GetAnalogWDThresholds\n
elmot	1:d0dfbce63a89	5218	* TR3 HT3 LL_ADC_GetAnalogWDThresholds\n
elmot	1:d0dfbce63a89	5219	* TR1 LT1 LL_ADC_GetAnalogWDThresholds\n
elmot	1:d0dfbce63a89	5220	* TR2 LT2 LL_ADC_GetAnalogWDThresholds\n
elmot	1:d0dfbce63a89	5221	* TR3 LT3 LL_ADC_GetAnalogWDThresholds
elmot	1:d0dfbce63a89	5222	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5223	* @param AWDy This parameter can be one of the following values:
elmot	1:d0dfbce63a89	5224	* @arg @ref LL_ADC_AWD1
elmot	1:d0dfbce63a89	5225	* @arg @ref LL_ADC_AWD2
elmot	1:d0dfbce63a89	5226	* @arg @ref LL_ADC_AWD3
elmot	1:d0dfbce63a89	5227	* @param AWDThresholdsHighLow This parameter can be one of the following values:
elmot	1:d0dfbce63a89	5228	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
elmot	1:d0dfbce63a89	5229	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
elmot	1:d0dfbce63a89	5230	* @arg @ref LL_ADC_AWD_THRESHOLDS_HIGH_LOW
elmot	1:d0dfbce63a89	5231	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
elmot	1:d0dfbce63a89	5232	*/
elmot	1:d0dfbce63a89	5233	__STATIC_INLINE uint32_t LL_ADC_GetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDThresholdsHighLow)
elmot	1:d0dfbce63a89	5234	{
elmot	1:d0dfbce63a89	5235	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, __ADC_MASK_SHIFT(AWDy, ADC_AWD_TRX_REGOFFSET_MASK));
elmot	1:d0dfbce63a89	5236
elmot	1:d0dfbce63a89	5237	return (uint32_t)(READ_BIT(*preg,
elmot	1:d0dfbce63a89	5238	(AWDThresholdsHighLow \| ADC_TR1_LT1))
elmot	1:d0dfbce63a89	5239	>> POSITION_VAL(AWDThresholdsHighLow)
elmot	1:d0dfbce63a89	5240	);
elmot	1:d0dfbce63a89	5241	}
elmot	1:d0dfbce63a89	5242
elmot	1:d0dfbce63a89	5243	/**
elmot	1:d0dfbce63a89	5244	* @}
elmot	1:d0dfbce63a89	5245	*/
elmot	1:d0dfbce63a89	5246
elmot	1:d0dfbce63a89	5247	/** @defgroup ADC_LL_EF_Configuration_ADC_oversampling Configuration of ADC transversal scope: oversampling
elmot	1:d0dfbce63a89	5248	* @{
elmot	1:d0dfbce63a89	5249	*/
elmot	1:d0dfbce63a89	5250
elmot	1:d0dfbce63a89	5251	/**
elmot	1:d0dfbce63a89	5252	* @brief Set ADC oversampling scope: ADC groups regular and-or injected
elmot	1:d0dfbce63a89	5253	* (availability of ADC group injected depends on STM32 families).
elmot	1:d0dfbce63a89	5254	* @note If both groups regular and injected are selected,
elmot	1:d0dfbce63a89	5255	* specify behavior of ADC group injected interrupting
elmot	1:d0dfbce63a89	5256	* group regular: when ADC group injected is triggered,
elmot	1:d0dfbce63a89	5257	* the oversampling on ADC group regular is either
elmot	1:d0dfbce63a89	5258	* temporary stopped and continued, or resumed from start
elmot	1:d0dfbce63a89	5259	* (oversampler buffer reset).
elmot	1:d0dfbce63a89	5260	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5261	* ADC state:
elmot	1:d0dfbce63a89	5262	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	5263	* on either groups regular or injected.
elmot	1:d0dfbce63a89	5264	* @rmtoll CFGR2 ROVSE LL_ADC_SetOverSamplingScope\n
elmot	1:d0dfbce63a89	5265	* CFGR2 JOVSE LL_ADC_SetOverSamplingScope\n
elmot	1:d0dfbce63a89	5266	* CFGR2 ROVSM LL_ADC_SetOverSamplingScope
elmot	1:d0dfbce63a89	5267	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5268	* @param OvsScope This parameter can be one of the following values:
elmot	1:d0dfbce63a89	5269	* @arg @ref LL_ADC_OVS_DISABLE
elmot	1:d0dfbce63a89	5270	* @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
elmot	1:d0dfbce63a89	5271	* @arg @ref LL_ADC_OVS_GRP_REGULAR_RESUMED
elmot	1:d0dfbce63a89	5272	* @arg @ref LL_ADC_OVS_GRP_INJECTED
elmot	1:d0dfbce63a89	5273	* @arg @ref LL_ADC_OVS_GRP_INJ_REG_RESUMED
elmot	1:d0dfbce63a89	5274	* @retval None
elmot	1:d0dfbce63a89	5275	*/
elmot	1:d0dfbce63a89	5276	__STATIC_INLINE void LL_ADC_SetOverSamplingScope(ADC_TypeDef *ADCx, uint32_t OvsScope)
elmot	1:d0dfbce63a89	5277	{
elmot	1:d0dfbce63a89	5278	MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_ROVSE \| ADC_CFGR2_JOVSE \| ADC_CFGR2_ROVSM, OvsScope);
elmot	1:d0dfbce63a89	5279	}
elmot	1:d0dfbce63a89	5280
elmot	1:d0dfbce63a89	5281	/**
elmot	1:d0dfbce63a89	5282	* @brief Get ADC oversampling scope: ADC groups regular and-or injected
elmot	1:d0dfbce63a89	5283	* (availability of ADC group injected depends on STM32 families).
elmot	1:d0dfbce63a89	5284	* @note If both groups regular and injected are selected,
elmot	1:d0dfbce63a89	5285	* specify behavior of ADC group injected interrupting
elmot	1:d0dfbce63a89	5286	* group regular: when ADC group injected is triggered,
elmot	1:d0dfbce63a89	5287	* the oversampling on ADC group regular is either
elmot	1:d0dfbce63a89	5288	* temporary stopped and continued, or resumed from start
elmot	1:d0dfbce63a89	5289	* (oversampler buffer reset).
elmot	1:d0dfbce63a89	5290	* @rmtoll CFGR2 ROVSE LL_ADC_GetOverSamplingScope\n
elmot	1:d0dfbce63a89	5291	* CFGR2 JOVSE LL_ADC_GetOverSamplingScope\n
elmot	1:d0dfbce63a89	5292	* CFGR2 ROVSM LL_ADC_GetOverSamplingScope
elmot	1:d0dfbce63a89	5293	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5294	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	5295	* @arg @ref LL_ADC_OVS_DISABLE
elmot	1:d0dfbce63a89	5296	* @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
elmot	1:d0dfbce63a89	5297	* @arg @ref LL_ADC_OVS_GRP_REGULAR_RESUMED
elmot	1:d0dfbce63a89	5298	* @arg @ref LL_ADC_OVS_GRP_INJECTED
elmot	1:d0dfbce63a89	5299	* @arg @ref LL_ADC_OVS_GRP_INJ_REG_RESUMED
elmot	1:d0dfbce63a89	5300	*/
elmot	1:d0dfbce63a89	5301	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingScope(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5302	{
elmot	1:d0dfbce63a89	5303	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_ROVSE \| ADC_CFGR2_JOVSE \| ADC_CFGR2_ROVSM));
elmot	1:d0dfbce63a89	5304	}
elmot	1:d0dfbce63a89	5305
elmot	1:d0dfbce63a89	5306	/**
elmot	1:d0dfbce63a89	5307	* @brief Set ADC oversampling discontinuous mode (triggered mode)
elmot	1:d0dfbce63a89	5308	* on the selected ADC group.
elmot	1:d0dfbce63a89	5309	* @note Number of oversampled conversions are done either in:
elmot	1:d0dfbce63a89	5310	* - continuous mode (all conversions of oversampling ratio
elmot	1:d0dfbce63a89	5311	* are done from 1 trigger)
elmot	1:d0dfbce63a89	5312	* - discontinuous mode (each conversion of oversampling ratio
elmot	1:d0dfbce63a89	5313	* needs a trigger)
elmot	1:d0dfbce63a89	5314	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5315	* ADC state:
elmot	1:d0dfbce63a89	5316	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	5317	* on group regular.
elmot	1:d0dfbce63a89	5318	* @note On this STM32 serie, oversampling discontinuous mode
elmot	1:d0dfbce63a89	5319	* (triggered mode) can be used only when oversampling is
elmot	1:d0dfbce63a89	5320	* set on group regular only and in resumed mode.
elmot	1:d0dfbce63a89	5321	* @rmtoll CFGR2 TROVS LL_ADC_SetOverSamplingDiscont
elmot	1:d0dfbce63a89	5322	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5323	* @param OverSamplingDiscont This parameter can be one of the following values:
elmot	1:d0dfbce63a89	5324	* @arg @ref LL_ADC_OVS_REG_CONT
elmot	1:d0dfbce63a89	5325	* @arg @ref LL_ADC_OVS_REG_DISCONT
elmot	1:d0dfbce63a89	5326	* @retval None
elmot	1:d0dfbce63a89	5327	*/
elmot	1:d0dfbce63a89	5328	__STATIC_INLINE void LL_ADC_SetOverSamplingDiscont(ADC_TypeDef *ADCx, uint32_t OverSamplingDiscont)
elmot	1:d0dfbce63a89	5329	{
elmot	1:d0dfbce63a89	5330	MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_TROVS, OverSamplingDiscont);
elmot	1:d0dfbce63a89	5331	}
elmot	1:d0dfbce63a89	5332
elmot	1:d0dfbce63a89	5333	/**
elmot	1:d0dfbce63a89	5334	* @brief Get ADC oversampling discontinuous mode (triggered mode)
elmot	1:d0dfbce63a89	5335	* on the selected ADC group.
elmot	1:d0dfbce63a89	5336	* @note Number of oversampled conversions are done either in:
elmot	1:d0dfbce63a89	5337	* - continuous mode (all conversions of oversampling ratio
elmot	1:d0dfbce63a89	5338	* are done from 1 trigger)
elmot	1:d0dfbce63a89	5339	* - discontinuous mode (each conversion of oversampling ratio
elmot	1:d0dfbce63a89	5340	* needs a trigger)
elmot	1:d0dfbce63a89	5341	* @rmtoll CFGR2 TROVS LL_ADC_GetOverSamplingDiscont
elmot	1:d0dfbce63a89	5342	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5343	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	5344	* @arg @ref LL_ADC_OVS_REG_CONT
elmot	1:d0dfbce63a89	5345	* @arg @ref LL_ADC_OVS_REG_DISCONT
elmot	1:d0dfbce63a89	5346	*/
elmot	1:d0dfbce63a89	5347	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingDiscont(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5348	{
elmot	1:d0dfbce63a89	5349	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_TROVS));
elmot	1:d0dfbce63a89	5350	}
elmot	1:d0dfbce63a89	5351
elmot	1:d0dfbce63a89	5352	/**
elmot	1:d0dfbce63a89	5353	* @brief Set ADC oversampling
elmot	1:d0dfbce63a89	5354	* (impacting both ADC groups regular and injected)
elmot	1:d0dfbce63a89	5355	* @note This function set the 2 items of oversampling configuration:
elmot	1:d0dfbce63a89	5356	* - ratio
elmot	1:d0dfbce63a89	5357	* - shift
elmot	1:d0dfbce63a89	5358	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5359	* ADC state:
elmot	1:d0dfbce63a89	5360	* ADC must be disabled or enabled without conversion on going
elmot	1:d0dfbce63a89	5361	* on either groups regular or injected.
elmot	1:d0dfbce63a89	5362	* @rmtoll CFGR2 OVSS LL_ADC_ConfigOverSamplingRatioShift\n
elmot	1:d0dfbce63a89	5363	* CFGR2 OVSR LL_ADC_ConfigOverSamplingRatioShift
elmot	1:d0dfbce63a89	5364	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5365	* @param Ratio This parameter can be one of the following values:
elmot	1:d0dfbce63a89	5366	* @arg @ref LL_ADC_OVS_RATIO_2
elmot	1:d0dfbce63a89	5367	* @arg @ref LL_ADC_OVS_RATIO_4
elmot	1:d0dfbce63a89	5368	* @arg @ref LL_ADC_OVS_RATIO_8
elmot	1:d0dfbce63a89	5369	* @arg @ref LL_ADC_OVS_RATIO_16
elmot	1:d0dfbce63a89	5370	* @arg @ref LL_ADC_OVS_RATIO_32
elmot	1:d0dfbce63a89	5371	* @arg @ref LL_ADC_OVS_RATIO_64
elmot	1:d0dfbce63a89	5372	* @arg @ref LL_ADC_OVS_RATIO_128
elmot	1:d0dfbce63a89	5373	* @arg @ref LL_ADC_OVS_RATIO_256
elmot	1:d0dfbce63a89	5374	* @param Shift This parameter can be one of the following values:
elmot	1:d0dfbce63a89	5375	* @arg @ref LL_ADC_OVS_SHIFT_NONE
elmot	1:d0dfbce63a89	5376	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
elmot	1:d0dfbce63a89	5377	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
elmot	1:d0dfbce63a89	5378	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
elmot	1:d0dfbce63a89	5379	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
elmot	1:d0dfbce63a89	5380	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
elmot	1:d0dfbce63a89	5381	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
elmot	1:d0dfbce63a89	5382	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
elmot	1:d0dfbce63a89	5383	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
elmot	1:d0dfbce63a89	5384	* @retval None
elmot	1:d0dfbce63a89	5385	*/
elmot	1:d0dfbce63a89	5386	__STATIC_INLINE void LL_ADC_ConfigOverSamplingRatioShift(ADC_TypeDef *ADCx, uint32_t Ratio, uint32_t Shift)
elmot	1:d0dfbce63a89	5387	{
elmot	1:d0dfbce63a89	5388	MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS \| ADC_CFGR2_OVSR), (Shift \| Ratio));
elmot	1:d0dfbce63a89	5389	}
elmot	1:d0dfbce63a89	5390
elmot	1:d0dfbce63a89	5391	/**
elmot	1:d0dfbce63a89	5392	* @brief Get ADC oversampling ratio
elmot	1:d0dfbce63a89	5393	* (impacting both ADC groups regular and injected)
elmot	1:d0dfbce63a89	5394	* @rmtoll CFGR2 OVSR LL_ADC_GetOverSamplingRatio
elmot	1:d0dfbce63a89	5395	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5396	* @retval Ratio This parameter can be one of the following values:
elmot	1:d0dfbce63a89	5397	* @arg @ref LL_ADC_OVS_RATIO_2
elmot	1:d0dfbce63a89	5398	* @arg @ref LL_ADC_OVS_RATIO_4
elmot	1:d0dfbce63a89	5399	* @arg @ref LL_ADC_OVS_RATIO_8
elmot	1:d0dfbce63a89	5400	* @arg @ref LL_ADC_OVS_RATIO_16
elmot	1:d0dfbce63a89	5401	* @arg @ref LL_ADC_OVS_RATIO_32
elmot	1:d0dfbce63a89	5402	* @arg @ref LL_ADC_OVS_RATIO_64
elmot	1:d0dfbce63a89	5403	* @arg @ref LL_ADC_OVS_RATIO_128
elmot	1:d0dfbce63a89	5404	* @arg @ref LL_ADC_OVS_RATIO_256
elmot	1:d0dfbce63a89	5405	*/
elmot	1:d0dfbce63a89	5406	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingRatio(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5407	{
elmot	1:d0dfbce63a89	5408	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR));
elmot	1:d0dfbce63a89	5409	}
elmot	1:d0dfbce63a89	5410
elmot	1:d0dfbce63a89	5411	/**
elmot	1:d0dfbce63a89	5412	* @brief Get ADC oversampling shift
elmot	1:d0dfbce63a89	5413	* (impacting both ADC groups regular and injected)
elmot	1:d0dfbce63a89	5414	* @rmtoll CFGR2 OVSS LL_ADC_GetOverSamplingShift
elmot	1:d0dfbce63a89	5415	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5416	* @retval Shift This parameter can be one of the following values:
elmot	1:d0dfbce63a89	5417	* @arg @ref LL_ADC_OVS_SHIFT_NONE
elmot	1:d0dfbce63a89	5418	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
elmot	1:d0dfbce63a89	5419	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
elmot	1:d0dfbce63a89	5420	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
elmot	1:d0dfbce63a89	5421	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
elmot	1:d0dfbce63a89	5422	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
elmot	1:d0dfbce63a89	5423	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
elmot	1:d0dfbce63a89	5424	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
elmot	1:d0dfbce63a89	5425	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
elmot	1:d0dfbce63a89	5426	*/
elmot	1:d0dfbce63a89	5427	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingShift(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5428	{
elmot	1:d0dfbce63a89	5429	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS));
elmot	1:d0dfbce63a89	5430	}
elmot	1:d0dfbce63a89	5431
elmot	1:d0dfbce63a89	5432	/**
elmot	1:d0dfbce63a89	5433	* @}
elmot	1:d0dfbce63a89	5434	*/
elmot	1:d0dfbce63a89	5435
elmot	1:d0dfbce63a89	5436	/** @defgroup ADC_LL_EF_Configuration_ADC_Multimode Configuration of ADC hierarchical scope: multimode
elmot	1:d0dfbce63a89	5437	* @{
elmot	1:d0dfbce63a89	5438	*/
elmot	1:d0dfbce63a89	5439
elmot	1:d0dfbce63a89	5440	#if defined(ADC_MULTIMODE_SUPPORT)
elmot	1:d0dfbce63a89	5441	/**
elmot	1:d0dfbce63a89	5442	* @brief Set ADC multimode configuration to operate in independent mode
elmot	1:d0dfbce63a89	5443	* or multimode (for devices with several ADC instances).
elmot	1:d0dfbce63a89	5444	* @note If multimode configuration: the selected ADC instance is
elmot	1:d0dfbce63a89	5445	* either master or slave depending on hardware.
elmot	1:d0dfbce63a89	5446	* Refer to reference manual.
elmot	1:d0dfbce63a89	5447	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5448	* ADC state:
elmot	1:d0dfbce63a89	5449	* All ADC instances of the ADC common group must be disabled.
elmot	1:d0dfbce63a89	5450	* This check can be done with function @ref LL_ADC_IsEnabled() for each
elmot	1:d0dfbce63a89	5451	* ADC instance or by using helper macro
elmot	1:d0dfbce63a89	5452	* @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
elmot	1:d0dfbce63a89	5453	* @rmtoll CCR DUAL LL_ADC_SetMultimode
elmot	1:d0dfbce63a89	5454	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	5455	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	5456	* @param Multimode This parameter can be one of the following values:
elmot	1:d0dfbce63a89	5457	* @arg @ref LL_ADC_MULTI_INDEPENDENT
elmot	1:d0dfbce63a89	5458	* @arg @ref LL_ADC_MULTI_DUAL_REG_SIMULT
elmot	1:d0dfbce63a89	5459	* @arg @ref LL_ADC_MULTI_DUAL_REG_INTERL
elmot	1:d0dfbce63a89	5460	* @arg @ref LL_ADC_MULTI_DUAL_INJ_SIMULT
elmot	1:d0dfbce63a89	5461	* @arg @ref LL_ADC_MULTI_DUAL_INJ_ALTERN
elmot	1:d0dfbce63a89	5462	* @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM
elmot	1:d0dfbce63a89	5463	* @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT
elmot	1:d0dfbce63a89	5464	* @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM
elmot	1:d0dfbce63a89	5465	* @retval None
elmot	1:d0dfbce63a89	5466	*/
elmot	1:d0dfbce63a89	5467	__STATIC_INLINE void LL_ADC_SetMultimode(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Multimode)
elmot	1:d0dfbce63a89	5468	{
elmot	1:d0dfbce63a89	5469	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_DUAL, Multimode);
elmot	1:d0dfbce63a89	5470	}
elmot	1:d0dfbce63a89	5471
elmot	1:d0dfbce63a89	5472	/**
elmot	1:d0dfbce63a89	5473	* @brief Get ADC multimode configuration to operate in independent mode
elmot	1:d0dfbce63a89	5474	* or multimode (for devices with several ADC instances).
elmot	1:d0dfbce63a89	5475	* @note If multimode configuration: the selected ADC instance is
elmot	1:d0dfbce63a89	5476	* either master or slave depending on hardware.
elmot	1:d0dfbce63a89	5477	* Refer to reference manual.
elmot	1:d0dfbce63a89	5478	* @rmtoll CCR DUAL LL_ADC_GetMultimode
elmot	1:d0dfbce63a89	5479	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	5480	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	5481	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	5482	* @arg @ref LL_ADC_MULTI_INDEPENDENT
elmot	1:d0dfbce63a89	5483	* @arg @ref LL_ADC_MULTI_DUAL_REG_SIMULT
elmot	1:d0dfbce63a89	5484	* @arg @ref LL_ADC_MULTI_DUAL_REG_INTERL
elmot	1:d0dfbce63a89	5485	* @arg @ref LL_ADC_MULTI_DUAL_INJ_SIMULT
elmot	1:d0dfbce63a89	5486	* @arg @ref LL_ADC_MULTI_DUAL_INJ_ALTERN
elmot	1:d0dfbce63a89	5487	* @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM
elmot	1:d0dfbce63a89	5488	* @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT
elmot	1:d0dfbce63a89	5489	* @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM
elmot	1:d0dfbce63a89	5490	*/
elmot	1:d0dfbce63a89	5491	__STATIC_INLINE uint32_t LL_ADC_GetMultimode(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	5492	{
elmot	1:d0dfbce63a89	5493	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DUAL));
elmot	1:d0dfbce63a89	5494	}
elmot	1:d0dfbce63a89	5495
elmot	1:d0dfbce63a89	5496	/**
elmot	1:d0dfbce63a89	5497	* @brief Set ADC multimode conversion data transfer: no transfer
elmot	1:d0dfbce63a89	5498	* or transfer by DMA.
elmot	1:d0dfbce63a89	5499	* @note If ADC multimode transfer by DMA is not selected:
elmot	1:d0dfbce63a89	5500	* each ADC uses its own DMA channel, with its individual
elmot	1:d0dfbce63a89	5501	* DMA transfer settings.
elmot	1:d0dfbce63a89	5502	* If ADC multimode transfer by DMA is selected:
elmot	1:d0dfbce63a89	5503	* One DMA channel is used for both ADC (DMA of ADC master)
elmot	1:d0dfbce63a89	5504	* Specifies the DMA requests mode:
elmot	1:d0dfbce63a89	5505	* - Limited mode (One shot mode): DMA transfer requests are stopped
elmot	1:d0dfbce63a89	5506	* when number of DMA data transfers (number of
elmot	1:d0dfbce63a89	5507	* ADC conversions) is reached.
elmot	1:d0dfbce63a89	5508	* This ADC mode is intended to be used with DMA mode non-circular.
elmot	1:d0dfbce63a89	5509	* - Unlimited mode: DMA transfer requests are unlimited,
elmot	1:d0dfbce63a89	5510	* whatever number of DMA data transfers (number of
elmot	1:d0dfbce63a89	5511	* ADC conversions).
elmot	1:d0dfbce63a89	5512	* This ADC mode is intended to be used with DMA mode circular.
elmot	1:d0dfbce63a89	5513	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
elmot	1:d0dfbce63a89	5514	* mode non-circular:
elmot	1:d0dfbce63a89	5515	* when DMA transfers size will be reached, DMA will stop transfers of
elmot	1:d0dfbce63a89	5516	* ADC conversions data ADC will raise an overrun error
elmot	1:d0dfbce63a89	5517	* (overrun flag and interruption if enabled).
elmot	1:d0dfbce63a89	5518	* @note How to retrieve multimode conversion data:
elmot	1:d0dfbce63a89	5519	* Whatever multimode transfer by DMA setting: using function
elmot	1:d0dfbce63a89	5520	* @ref LL_ADC_REG_ReadMultiConversionData32().
elmot	1:d0dfbce63a89	5521	* If ADC multimode transfer by DMA is selected: conversion data
elmot	1:d0dfbce63a89	5522	* is a raw data with ADC master and slave concatenated.
elmot	1:d0dfbce63a89	5523	* A macro is available to get the conversion data of
elmot	1:d0dfbce63a89	5524	* ADC master or ADC slave: see helper macro
elmot	1:d0dfbce63a89	5525	* @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE().
elmot	1:d0dfbce63a89	5526	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5527	* ADC state:
elmot	1:d0dfbce63a89	5528	* All ADC instances of the ADC common group must be disabled
elmot	1:d0dfbce63a89	5529	* or enabled without conversion on going on group regular.
elmot	1:d0dfbce63a89	5530	* @rmtoll CCR MDMA LL_ADC_SetMultiDMATransfer\n
elmot	1:d0dfbce63a89	5531	* CCR DMACFG LL_ADC_SetMultiDMATransfer
elmot	1:d0dfbce63a89	5532	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	5533	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	5534	* @param MultiDMATransfer This parameter can be one of the following values:
elmot	1:d0dfbce63a89	5535	* @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC
elmot	1:d0dfbce63a89	5536	* @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B
elmot	1:d0dfbce63a89	5537	* @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B
elmot	1:d0dfbce63a89	5538	* @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B
elmot	1:d0dfbce63a89	5539	* @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B
elmot	1:d0dfbce63a89	5540	* @retval None
elmot	1:d0dfbce63a89	5541	*/
elmot	1:d0dfbce63a89	5542	__STATIC_INLINE void LL_ADC_SetMultiDMATransfer(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t MultiDMATransfer)
elmot	1:d0dfbce63a89	5543	{
elmot	1:d0dfbce63a89	5544	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_MDMA \| ADC_CCR_DMACFG, MultiDMATransfer);
elmot	1:d0dfbce63a89	5545	}
elmot	1:d0dfbce63a89	5546
elmot	1:d0dfbce63a89	5547	/**
elmot	1:d0dfbce63a89	5548	* @brief Get ADC multimode conversion data transfer: no transfer
elmot	1:d0dfbce63a89	5549	* or transfer by DMA.
elmot	1:d0dfbce63a89	5550	* @note If ADC multimode transfer by DMA is not selected:
elmot	1:d0dfbce63a89	5551	* each ADC uses its own DMA channel, with its individual
elmot	1:d0dfbce63a89	5552	* DMA transfer settings.
elmot	1:d0dfbce63a89	5553	* If ADC multimode transfer by DMA is selected:
elmot	1:d0dfbce63a89	5554	* One DMA channel is used for both ADC (DMA of ADC master)
elmot	1:d0dfbce63a89	5555	* Specifies the DMA requests mode:
elmot	1:d0dfbce63a89	5556	* - Limited mode (One shot mode): DMA transfer requests are stopped
elmot	1:d0dfbce63a89	5557	* when number of DMA data transfers (number of
elmot	1:d0dfbce63a89	5558	* ADC conversions) is reached.
elmot	1:d0dfbce63a89	5559	* This ADC mode is intended to be used with DMA mode non-circular.
elmot	1:d0dfbce63a89	5560	* - Unlimited mode: DMA transfer requests are unlimited,
elmot	1:d0dfbce63a89	5561	* whatever number of DMA data transfers (number of
elmot	1:d0dfbce63a89	5562	* ADC conversions).
elmot	1:d0dfbce63a89	5563	* This ADC mode is intended to be used with DMA mode circular.
elmot	1:d0dfbce63a89	5564	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
elmot	1:d0dfbce63a89	5565	* mode non-circular:
elmot	1:d0dfbce63a89	5566	* when DMA transfers size will be reached, DMA will stop transfers of
elmot	1:d0dfbce63a89	5567	* ADC conversions data ADC will raise an overrun error
elmot	1:d0dfbce63a89	5568	* (overrun flag and interruption if enabled).
elmot	1:d0dfbce63a89	5569	* @note How to retrieve multimode conversion data:
elmot	1:d0dfbce63a89	5570	* Whatever multimode transfer by DMA setting: using function
elmot	1:d0dfbce63a89	5571	* @ref LL_ADC_REG_ReadMultiConversionData32().
elmot	1:d0dfbce63a89	5572	* If ADC multimode transfer by DMA is selected: conversion data
elmot	1:d0dfbce63a89	5573	* is a raw data with ADC master and slave concatenated.
elmot	1:d0dfbce63a89	5574	* A macro is available to get the conversion data of
elmot	1:d0dfbce63a89	5575	* ADC master or ADC slave: see helper macro
elmot	1:d0dfbce63a89	5576	* @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE().
elmot	1:d0dfbce63a89	5577	* @rmtoll CCR MDMA LL_ADC_GetMultiDMATransfer\n
elmot	1:d0dfbce63a89	5578	* CCR DMACFG LL_ADC_GetMultiDMATransfer
elmot	1:d0dfbce63a89	5579	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	5580	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	5581	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	5582	* @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC
elmot	1:d0dfbce63a89	5583	* @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B
elmot	1:d0dfbce63a89	5584	* @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B
elmot	1:d0dfbce63a89	5585	* @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B
elmot	1:d0dfbce63a89	5586	* @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B
elmot	1:d0dfbce63a89	5587	*/
elmot	1:d0dfbce63a89	5588	__STATIC_INLINE uint32_t LL_ADC_GetMultiDMATransfer(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	5589	{
elmot	1:d0dfbce63a89	5590	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_MDMA \| ADC_CCR_DMACFG));
elmot	1:d0dfbce63a89	5591	}
elmot	1:d0dfbce63a89	5592
elmot	1:d0dfbce63a89	5593	/**
elmot	1:d0dfbce63a89	5594	* @brief Set ADC multimode delay between 2 sampling phases.
elmot	1:d0dfbce63a89	5595	* @note The sampling delay range depends on ADC resolution:
elmot	1:d0dfbce63a89	5596	* - ADC resolution 12 bits can have maximum delay of 12 cycles.
elmot	1:d0dfbce63a89	5597	* - ADC resolution 10 bits can have maximum delay of 10 cycles.
elmot	1:d0dfbce63a89	5598	* - ADC resolution 8 bits can have maximum delay of 8 cycles.
elmot	1:d0dfbce63a89	5599	* - ADC resolution 6 bits can have maximum delay of 6 cycles.
elmot	1:d0dfbce63a89	5600	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5601	* ADC state:
elmot	1:d0dfbce63a89	5602	* All ADC instances of the ADC common group must be disabled.
elmot	1:d0dfbce63a89	5603	* This check can be done with function @ref LL_ADC_IsEnabled() for each
elmot	1:d0dfbce63a89	5604	* ADC instance or by using helper macro helper macro
elmot	1:d0dfbce63a89	5605	* @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
elmot	1:d0dfbce63a89	5606	* @rmtoll CCR DELAY LL_ADC_SetMultiTwoSamplingDelay
elmot	1:d0dfbce63a89	5607	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	5608	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	5609	* @param MultiTwoSamplingDelay This parameter can be one of the following values:
elmot	1:d0dfbce63a89	5610	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE
elmot	1:d0dfbce63a89	5611	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES
elmot	1:d0dfbce63a89	5612	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES
elmot	1:d0dfbce63a89	5613	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES
elmot	1:d0dfbce63a89	5614	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES
elmot	1:d0dfbce63a89	5615	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (1)
elmot	1:d0dfbce63a89	5616	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES (1)
elmot	1:d0dfbce63a89	5617	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (2)
elmot	1:d0dfbce63a89	5618	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (2)
elmot	1:d0dfbce63a89	5619	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (2)
elmot	1:d0dfbce63a89	5620	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (3)
elmot	1:d0dfbce63a89	5621	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (3)
elmot	1:d0dfbce63a89	5622	*
elmot	1:d0dfbce63a89	5623	* (1) Parameter available only if ADC resolution is 12, 10 or 8 bits.\n
elmot	1:d0dfbce63a89	5624	* (2) Parameter available only if ADC resolution is 12 or 10 bits.\n
elmot	1:d0dfbce63a89	5625	* (3) Parameter available only if ADC resolution is 12 bits.
elmot	1:d0dfbce63a89	5626	* @retval None
elmot	1:d0dfbce63a89	5627	*/
elmot	1:d0dfbce63a89	5628	__STATIC_INLINE void LL_ADC_SetMultiTwoSamplingDelay(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t MultiTwoSamplingDelay)
elmot	1:d0dfbce63a89	5629	{
elmot	1:d0dfbce63a89	5630	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_DELAY, MultiTwoSamplingDelay);
elmot	1:d0dfbce63a89	5631	}
elmot	1:d0dfbce63a89	5632
elmot	1:d0dfbce63a89	5633	/**
elmot	1:d0dfbce63a89	5634	* @brief Get ADC multimode delay between 2 sampling phases.
elmot	1:d0dfbce63a89	5635	* @rmtoll CCR DELAY LL_ADC_GetMultiTwoSamplingDelay
elmot	1:d0dfbce63a89	5636	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	5637	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	5638	* @retval Returned value can be one of the following values:
elmot	1:d0dfbce63a89	5639	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE
elmot	1:d0dfbce63a89	5640	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES
elmot	1:d0dfbce63a89	5641	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES
elmot	1:d0dfbce63a89	5642	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES
elmot	1:d0dfbce63a89	5643	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES
elmot	1:d0dfbce63a89	5644	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (1)
elmot	1:d0dfbce63a89	5645	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES (1)
elmot	1:d0dfbce63a89	5646	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (2)
elmot	1:d0dfbce63a89	5647	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (2)
elmot	1:d0dfbce63a89	5648	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (2)
elmot	1:d0dfbce63a89	5649	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (3)
elmot	1:d0dfbce63a89	5650	* @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (3)
elmot	1:d0dfbce63a89	5651	*
elmot	1:d0dfbce63a89	5652	* (1) Parameter available only if ADC resolution is 12, 10 or 8 bits.\n
elmot	1:d0dfbce63a89	5653	* (2) Parameter available only if ADC resolution is 12 or 10 bits.\n
elmot	1:d0dfbce63a89	5654	* (3) Parameter available only if ADC resolution is 12 bits.
elmot	1:d0dfbce63a89	5655	*/
elmot	1:d0dfbce63a89	5656	__STATIC_INLINE uint32_t LL_ADC_GetMultiTwoSamplingDelay(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	5657	{
elmot	1:d0dfbce63a89	5658	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DELAY));
elmot	1:d0dfbce63a89	5659	}
elmot	1:d0dfbce63a89	5660	#endif /* ADC_MULTIMODE_SUPPORT */
elmot	1:d0dfbce63a89	5661
elmot	1:d0dfbce63a89	5662	/**
elmot	1:d0dfbce63a89	5663	* @}
elmot	1:d0dfbce63a89	5664	*/
elmot	1:d0dfbce63a89	5665	/** @defgroup ADC_LL_EF_Configuration_Leg_Functions Configuration of ADC alternate functions name
elmot	1:d0dfbce63a89	5666	* @{
elmot	1:d0dfbce63a89	5667	*/
elmot	1:d0dfbce63a89	5668	/* Old functions name kept for legacy purpose, to be replaced by the */
elmot	1:d0dfbce63a89	5669	/* current functions name. */
elmot	1:d0dfbce63a89	5670	__STATIC_INLINE void LL_ADC_REG_SetTrigSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
elmot	1:d0dfbce63a89	5671	{
elmot	1:d0dfbce63a89	5672	LL_ADC_REG_SetTrigSource(ADCx, TriggerSource);
elmot	1:d0dfbce63a89	5673	}
elmot	1:d0dfbce63a89	5674	__STATIC_INLINE void LL_ADC_INJ_SetTrigSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
elmot	1:d0dfbce63a89	5675	{
elmot	1:d0dfbce63a89	5676	LL_ADC_INJ_SetTrigSource(ADCx, TriggerSource);
elmot	1:d0dfbce63a89	5677	}
elmot	1:d0dfbce63a89	5678
elmot	1:d0dfbce63a89	5679	/**
elmot	1:d0dfbce63a89	5680	* @}
elmot	1:d0dfbce63a89	5681	*/
elmot	1:d0dfbce63a89	5682
elmot	1:d0dfbce63a89	5683	/** @defgroup ADC_LL_EF_Operation_ADC_Instance Operation on ADC hierarchical scope: ADC instance
elmot	1:d0dfbce63a89	5684	* @{
elmot	1:d0dfbce63a89	5685	*/
elmot	1:d0dfbce63a89	5686
elmot	1:d0dfbce63a89	5687	/**
elmot	1:d0dfbce63a89	5688	* @brief Put ADC instance in deep power down state.
elmot	1:d0dfbce63a89	5689	* @note In case of ADC calibration necessary: When ADC is in deep-power-down
elmot	1:d0dfbce63a89	5690	* state, the internal analog calibration is lost. After exiting from
elmot	1:d0dfbce63a89	5691	* deep power down, calibration must be relaunched or calibration factor
elmot	1:d0dfbce63a89	5692	* (preliminarily saved) must be set back into calibration register.
elmot	1:d0dfbce63a89	5693	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5694	* ADC state:
elmot	1:d0dfbce63a89	5695	* ADC must be ADC disabled.
elmot	1:d0dfbce63a89	5696	* @rmtoll CR DEEPPWD LL_ADC_EnableDeepPowerDown
elmot	1:d0dfbce63a89	5697	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5698	* @retval None
elmot	1:d0dfbce63a89	5699	*/
elmot	1:d0dfbce63a89	5700	__STATIC_INLINE void LL_ADC_EnableDeepPowerDown(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5701	{
elmot	1:d0dfbce63a89	5702	/* Note: Write register with some additional bits forced to state reset */
elmot	1:d0dfbce63a89	5703	/* instead of modifying only the selected bit for this function, */
elmot	1:d0dfbce63a89	5704	/* to not interfere with bits with HW property "rs". */
elmot	1:d0dfbce63a89	5705	MODIFY_REG(ADCx->CR,
elmot	1:d0dfbce63a89	5706	ADC_CR_BITS_PROPERTY_RS,
elmot	1:d0dfbce63a89	5707	ADC_CR_DEEPPWD);
elmot	1:d0dfbce63a89	5708	}
elmot	1:d0dfbce63a89	5709
elmot	1:d0dfbce63a89	5710	/**
elmot	1:d0dfbce63a89	5711	* @brief Disable ADC deep power down mode.
elmot	1:d0dfbce63a89	5712	* @note In case of ADC calibration necessary: When ADC is in deep-power-down
elmot	1:d0dfbce63a89	5713	* state, the internal analog calibration is lost. After exiting from
elmot	1:d0dfbce63a89	5714	* deep power down, calibration must be relaunched or calibration factor
elmot	1:d0dfbce63a89	5715	* (preliminarily saved) must be set back into calibration register.
elmot	1:d0dfbce63a89	5716	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5717	* ADC state:
elmot	1:d0dfbce63a89	5718	* ADC must be ADC disabled.
elmot	1:d0dfbce63a89	5719	* @rmtoll CR DEEPPWD LL_ADC_DisableDeepPowerDown
elmot	1:d0dfbce63a89	5720	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5721	* @retval None
elmot	1:d0dfbce63a89	5722	*/
elmot	1:d0dfbce63a89	5723	__STATIC_INLINE void LL_ADC_DisableDeepPowerDown(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5724	{
elmot	1:d0dfbce63a89	5725	/* Note: Write register with some additional bits forced to state reset */
elmot	1:d0dfbce63a89	5726	/* instead of modifying only the selected bit for this function, */
elmot	1:d0dfbce63a89	5727	/* to not interfere with bits with HW property "rs". */
elmot	1:d0dfbce63a89	5728	CLEAR_BIT(ADCx->CR, (ADC_CR_DEEPPWD \| ADC_CR_BITS_PROPERTY_RS));
elmot	1:d0dfbce63a89	5729	}
elmot	1:d0dfbce63a89	5730
elmot	1:d0dfbce63a89	5731	/**
elmot	1:d0dfbce63a89	5732	* @brief Get the selected ADC instance deep power down state.
elmot	1:d0dfbce63a89	5733	* @rmtoll CR DEEPPWD LL_ADC_IsDeepPowerDownEnabled
elmot	1:d0dfbce63a89	5734	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5735	* @retval 0: deep power down is disabled, 1: deep power down is enabled.
elmot	1:d0dfbce63a89	5736	*/
elmot	1:d0dfbce63a89	5737	__STATIC_INLINE uint32_t LL_ADC_IsDeepPowerDownEnabled(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5738	{
elmot	1:d0dfbce63a89	5739	return (READ_BIT(ADCx->CR, ADC_CR_DEEPPWD) == (ADC_CR_DEEPPWD));
elmot	1:d0dfbce63a89	5740	}
elmot	1:d0dfbce63a89	5741
elmot	1:d0dfbce63a89	5742	/**
elmot	1:d0dfbce63a89	5743	* @brief Enable ADC instance internal voltage regulator.
elmot	1:d0dfbce63a89	5744	* @note On this STM32 serie, after ADC internal voltage regulator enable,
elmot	1:d0dfbce63a89	5745	* a delay for ADC internal voltage regulator stabilization
elmot	1:d0dfbce63a89	5746	* is required before performing a ADC calibration or ADC enable.
elmot	1:d0dfbce63a89	5747	* Refer to device datasheet, parameter tADCVREG_STUP.
elmot	1:d0dfbce63a89	5748	* Refer to literal @ref LL_ADC_DELAY_INTERNAL_REGUL_STAB_US.
elmot	1:d0dfbce63a89	5749	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5750	* ADC state:
elmot	1:d0dfbce63a89	5751	* ADC must be ADC disabled.
elmot	1:d0dfbce63a89	5752	* @rmtoll CR ADVREGEN LL_ADC_EnableInternalRegulator
elmot	1:d0dfbce63a89	5753	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5754	* @retval None
elmot	1:d0dfbce63a89	5755	*/
elmot	1:d0dfbce63a89	5756	__STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5757	{
elmot	1:d0dfbce63a89	5758	/* Note: Write register with some additional bits forced to state reset */
elmot	1:d0dfbce63a89	5759	/* instead of modifying only the selected bit for this function, */
elmot	1:d0dfbce63a89	5760	/* to not interfere with bits with HW property "rs". */
elmot	1:d0dfbce63a89	5761	MODIFY_REG(ADCx->CR,
elmot	1:d0dfbce63a89	5762	ADC_CR_BITS_PROPERTY_RS,
elmot	1:d0dfbce63a89	5763	ADC_CR_ADVREGEN);
elmot	1:d0dfbce63a89	5764	}
elmot	1:d0dfbce63a89	5765
elmot	1:d0dfbce63a89	5766	/**
elmot	1:d0dfbce63a89	5767	* @brief Disable ADC internal voltage regulator.
elmot	1:d0dfbce63a89	5768	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5769	* ADC state:
elmot	1:d0dfbce63a89	5770	* ADC must be ADC disabled.
elmot	1:d0dfbce63a89	5771	* @rmtoll CR ADVREGEN LL_ADC_DisableInternalRegulator
elmot	1:d0dfbce63a89	5772	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5773	* @retval None
elmot	1:d0dfbce63a89	5774	*/
elmot	1:d0dfbce63a89	5775	__STATIC_INLINE void LL_ADC_DisableInternalRegulator(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5776	{
elmot	1:d0dfbce63a89	5777	CLEAR_BIT(ADCx->CR, (ADC_CR_ADVREGEN \| ADC_CR_BITS_PROPERTY_RS));
elmot	1:d0dfbce63a89	5778	}
elmot	1:d0dfbce63a89	5779
elmot	1:d0dfbce63a89	5780	/**
elmot	1:d0dfbce63a89	5781	* @brief Get the selected ADC instance internal voltage regulator state.
elmot	1:d0dfbce63a89	5782	* @rmtoll CR ADVREGEN LL_ADC_IsInternalRegulatorEnabled
elmot	1:d0dfbce63a89	5783	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5784	* @retval 0: internal regulator is disabled, 1: internal regulator is enabled.
elmot	1:d0dfbce63a89	5785	*/
elmot	1:d0dfbce63a89	5786	__STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5787	{
elmot	1:d0dfbce63a89	5788	return (READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN));
elmot	1:d0dfbce63a89	5789	}
elmot	1:d0dfbce63a89	5790
elmot	1:d0dfbce63a89	5791	/**
elmot	1:d0dfbce63a89	5792	* @brief Enable the selected ADC instance.
elmot	1:d0dfbce63a89	5793	* @note On this STM32 serie, after ADC enable, a delay for
elmot	1:d0dfbce63a89	5794	* ADC internal analog stabilization is required before performing a
elmot	1:d0dfbce63a89	5795	* ADC conversion start.
elmot	1:d0dfbce63a89	5796	* Refer to device datasheet, parameter tSTAB.
elmot	1:d0dfbce63a89	5797	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
elmot	1:d0dfbce63a89	5798	* is enabled and when conversion clock is active.
elmot	1:d0dfbce63a89	5799	* (not only core clock: this ADC has a dual clock domain)
elmot	1:d0dfbce63a89	5800	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5801	* ADC state:
elmot	1:d0dfbce63a89	5802	* ADC must be ADC disabled and ADC internal voltage regulator enabled.
elmot	1:d0dfbce63a89	5803	* @rmtoll CR ADEN LL_ADC_Enable
elmot	1:d0dfbce63a89	5804	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5805	* @retval None
elmot	1:d0dfbce63a89	5806	*/
elmot	1:d0dfbce63a89	5807	__STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5808	{
elmot	1:d0dfbce63a89	5809	/* Note: Write register with some additional bits forced to state reset */
elmot	1:d0dfbce63a89	5810	/* instead of modifying only the selected bit for this function, */
elmot	1:d0dfbce63a89	5811	/* to not interfere with bits with HW property "rs". */
elmot	1:d0dfbce63a89	5812	MODIFY_REG(ADCx->CR,
elmot	1:d0dfbce63a89	5813	ADC_CR_BITS_PROPERTY_RS,
elmot	1:d0dfbce63a89	5814	ADC_CR_ADEN);
elmot	1:d0dfbce63a89	5815	}
elmot	1:d0dfbce63a89	5816
elmot	1:d0dfbce63a89	5817	/**
elmot	1:d0dfbce63a89	5818	* @brief Disable the selected ADC instance.
elmot	1:d0dfbce63a89	5819	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5820	* ADC state:
elmot	1:d0dfbce63a89	5821	* ADC must be not disabled. Must be enabled without conversion on going
elmot	1:d0dfbce63a89	5822	* on either groups regular or injected.
elmot	1:d0dfbce63a89	5823	* @rmtoll CR ADDIS LL_ADC_Disable
elmot	1:d0dfbce63a89	5824	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5825	* @retval None
elmot	1:d0dfbce63a89	5826	*/
elmot	1:d0dfbce63a89	5827	__STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5828	{
elmot	1:d0dfbce63a89	5829	/* Note: Write register with some additional bits forced to state reset */
elmot	1:d0dfbce63a89	5830	/* instead of modifying only the selected bit for this function, */
elmot	1:d0dfbce63a89	5831	/* to not interfere with bits with HW property "rs". */
elmot	1:d0dfbce63a89	5832	MODIFY_REG(ADCx->CR,
elmot	1:d0dfbce63a89	5833	ADC_CR_BITS_PROPERTY_RS,
elmot	1:d0dfbce63a89	5834	ADC_CR_ADDIS);
elmot	1:d0dfbce63a89	5835	}
elmot	1:d0dfbce63a89	5836
elmot	1:d0dfbce63a89	5837	/**
elmot	1:d0dfbce63a89	5838	* @brief Get the selected ADC instance enable state.
elmot	1:d0dfbce63a89	5839	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
elmot	1:d0dfbce63a89	5840	* is enabled and when conversion clock is active.
elmot	1:d0dfbce63a89	5841	* (not only core clock: this ADC has a dual clock domain)
elmot	1:d0dfbce63a89	5842	* @rmtoll CR ADEN LL_ADC_IsEnabled
elmot	1:d0dfbce63a89	5843	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5844	* @retval 0: ADC is disabled, 1: ADC is enabled.
elmot	1:d0dfbce63a89	5845	*/
elmot	1:d0dfbce63a89	5846	__STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5847	{
elmot	1:d0dfbce63a89	5848	return (READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN));
elmot	1:d0dfbce63a89	5849	}
elmot	1:d0dfbce63a89	5850
elmot	1:d0dfbce63a89	5851	/**
elmot	1:d0dfbce63a89	5852	* @brief Get the selected ADC instance disable state.
elmot	1:d0dfbce63a89	5853	* @rmtoll CR ADDIS LL_ADC_IsDisableOngoing
elmot	1:d0dfbce63a89	5854	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5855	* @retval 0: no ADC disable command on going.
elmot	1:d0dfbce63a89	5856	*/
elmot	1:d0dfbce63a89	5857	__STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5858	{
elmot	1:d0dfbce63a89	5859	return (READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS));
elmot	1:d0dfbce63a89	5860	}
elmot	1:d0dfbce63a89	5861
elmot	1:d0dfbce63a89	5862	/**
elmot	1:d0dfbce63a89	5863	* @brief Start ADC calibration in the mode single-ended
elmot	1:d0dfbce63a89	5864	* or differential (for devices with differential mode available).
elmot	1:d0dfbce63a89	5865	* @note On this STM32 serie, a minimum number of ADC clock cycles
elmot	1:d0dfbce63a89	5866	* are required between ADC end of calibration and ADC enable.
elmot	1:d0dfbce63a89	5867	* Refer to literal @ref LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES.
elmot	1:d0dfbce63a89	5868	* @note For devices with differential mode available:
elmot	1:d0dfbce63a89	5869	* Calibration of offset is specific to each of
elmot	1:d0dfbce63a89	5870	* single-ended and differential modes
elmot	1:d0dfbce63a89	5871	* (calibration run must be performed for each of these
elmot	1:d0dfbce63a89	5872	* differential modes, if used afterwards and if the application
elmot	1:d0dfbce63a89	5873	* requires their calibration).
elmot	1:d0dfbce63a89	5874	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5875	* ADC state:
elmot	1:d0dfbce63a89	5876	* ADC must be ADC disabled.
elmot	1:d0dfbce63a89	5877	* @rmtoll CR ADCAL LL_ADC_StartCalibration\n
elmot	1:d0dfbce63a89	5878	* CR ADCALDIF LL_ADC_StartCalibration
elmot	1:d0dfbce63a89	5879	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5880	* @param SingleDiff This parameter can be one of the following values:
elmot	1:d0dfbce63a89	5881	* @arg @ref LL_ADC_SINGLE_ENDED
elmot	1:d0dfbce63a89	5882	* @arg @ref LL_ADC_DIFFERENTIAL_ENDED
elmot	1:d0dfbce63a89	5883	* @retval None
elmot	1:d0dfbce63a89	5884	*/
elmot	1:d0dfbce63a89	5885	__STATIC_INLINE void LL_ADC_StartCalibration(ADC_TypeDef *ADCx, uint32_t SingleDiff)
elmot	1:d0dfbce63a89	5886	{
elmot	1:d0dfbce63a89	5887	/* Note: Write register with some additional bits forced to state reset */
elmot	1:d0dfbce63a89	5888	/* instead of modifying only the selected bit for this function, */
elmot	1:d0dfbce63a89	5889	/* to not interfere with bits with HW property "rs". */
elmot	1:d0dfbce63a89	5890	MODIFY_REG(ADCx->CR,
elmot	1:d0dfbce63a89	5891	ADC_CR_ADCALDIF \| ADC_CR_BITS_PROPERTY_RS,
elmot	1:d0dfbce63a89	5892	ADC_CR_ADCAL \| (SingleDiff & ADC_SINGLEDIFF_CALIB_START_MASK));
elmot	1:d0dfbce63a89	5893	}
elmot	1:d0dfbce63a89	5894
elmot	1:d0dfbce63a89	5895	/**
elmot	1:d0dfbce63a89	5896	* @brief Get ADC calibration state.
elmot	1:d0dfbce63a89	5897	* @rmtoll CR ADCAL LL_ADC_IsCalibrationOnGoing
elmot	1:d0dfbce63a89	5898	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5899	* @retval 0: calibration complete, 1: calibration in progress.
elmot	1:d0dfbce63a89	5900	*/
elmot	1:d0dfbce63a89	5901	__STATIC_INLINE uint32_t LL_ADC_IsCalibrationOnGoing(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5902	{
elmot	1:d0dfbce63a89	5903	return (READ_BIT(ADCx->CR, ADC_CR_ADCAL) == (ADC_CR_ADCAL));
elmot	1:d0dfbce63a89	5904	}
elmot	1:d0dfbce63a89	5905
elmot	1:d0dfbce63a89	5906	/**
elmot	1:d0dfbce63a89	5907	* @}
elmot	1:d0dfbce63a89	5908	*/
elmot	1:d0dfbce63a89	5909
elmot	1:d0dfbce63a89	5910	/** @defgroup ADC_LL_EF_Operation_ADC_Group_Regular Operation on ADC hierarchical scope: group regular
elmot	1:d0dfbce63a89	5911	* @{
elmot	1:d0dfbce63a89	5912	*/
elmot	1:d0dfbce63a89	5913
elmot	1:d0dfbce63a89	5914	/**
elmot	1:d0dfbce63a89	5915	* @brief Start ADC group regular conversion.
elmot	1:d0dfbce63a89	5916	* @note On this STM32 serie, this function is relevant for both
elmot	1:d0dfbce63a89	5917	* internal trigger (SW start) and external trigger:
elmot	1:d0dfbce63a89	5918	* - If ADC trigger has been set to software start, ADC conversion
elmot	1:d0dfbce63a89	5919	* starts immediately.
elmot	1:d0dfbce63a89	5920	* - If ADC trigger has been set to external trigger, ADC conversion
elmot	1:d0dfbce63a89	5921	* will start at next trigger event (on the selected trigger edge)
elmot	1:d0dfbce63a89	5922	* following the ADC start conversion command.
elmot	1:d0dfbce63a89	5923	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5924	* ADC state:
elmot	1:d0dfbce63a89	5925	* ADC must be enabled without conversion on going on group regular,
elmot	1:d0dfbce63a89	5926	* without conversion stop command on going on group regular.
elmot	1:d0dfbce63a89	5927	* @rmtoll CR ADSTART LL_ADC_REG_StartConversion
elmot	1:d0dfbce63a89	5928	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5929	* @retval None
elmot	1:d0dfbce63a89	5930	*/
elmot	1:d0dfbce63a89	5931	__STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5932	{
elmot	1:d0dfbce63a89	5933	/* Note: Write register with some additional bits forced to state reset */
elmot	1:d0dfbce63a89	5934	/* instead of modifying only the selected bit for this function, */
elmot	1:d0dfbce63a89	5935	/* to not interfere with bits with HW property "rs". */
elmot	1:d0dfbce63a89	5936	MODIFY_REG(ADCx->CR,
elmot	1:d0dfbce63a89	5937	ADC_CR_BITS_PROPERTY_RS,
elmot	1:d0dfbce63a89	5938	ADC_CR_ADSTART);
elmot	1:d0dfbce63a89	5939	}
elmot	1:d0dfbce63a89	5940
elmot	1:d0dfbce63a89	5941	/**
elmot	1:d0dfbce63a89	5942	* @brief Stop ADC group regular conversion.
elmot	1:d0dfbce63a89	5943	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	5944	* ADC state:
elmot	1:d0dfbce63a89	5945	* ADC must be enabled with conversion on going on group regular,
elmot	1:d0dfbce63a89	5946	* without ADC disable command on going.
elmot	1:d0dfbce63a89	5947	* @rmtoll CR ADSTP LL_ADC_REG_StopConversion
elmot	1:d0dfbce63a89	5948	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5949	* @retval None
elmot	1:d0dfbce63a89	5950	*/
elmot	1:d0dfbce63a89	5951	__STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5952	{
elmot	1:d0dfbce63a89	5953	/* Note: Write register with some additional bits forced to state reset */
elmot	1:d0dfbce63a89	5954	/* instead of modifying only the selected bit for this function, */
elmot	1:d0dfbce63a89	5955	/* to not interfere with bits with HW property "rs". */
elmot	1:d0dfbce63a89	5956	MODIFY_REG(ADCx->CR,
elmot	1:d0dfbce63a89	5957	ADC_CR_BITS_PROPERTY_RS,
elmot	1:d0dfbce63a89	5958	ADC_CR_ADSTP);
elmot	1:d0dfbce63a89	5959	}
elmot	1:d0dfbce63a89	5960
elmot	1:d0dfbce63a89	5961	/**
elmot	1:d0dfbce63a89	5962	* @brief Get ADC group regular conversion state.
elmot	1:d0dfbce63a89	5963	* @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing
elmot	1:d0dfbce63a89	5964	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5965	* @retval 0: no conversion is on going on ADC group regular.
elmot	1:d0dfbce63a89	5966	*/
elmot	1:d0dfbce63a89	5967	__STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5968	{
elmot	1:d0dfbce63a89	5969	return (READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART));
elmot	1:d0dfbce63a89	5970	}
elmot	1:d0dfbce63a89	5971
elmot	1:d0dfbce63a89	5972	/**
elmot	1:d0dfbce63a89	5973	* @brief Get ADC group regular command of conversion stop state
elmot	1:d0dfbce63a89	5974	* @rmtoll CR ADSTP LL_ADC_REG_IsStopConversionOngoing
elmot	1:d0dfbce63a89	5975	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5976	* @retval 0: no command of conversion stop is on going on ADC group regular.
elmot	1:d0dfbce63a89	5977	*/
elmot	1:d0dfbce63a89	5978	__STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5979	{
elmot	1:d0dfbce63a89	5980	return (READ_BIT(ADCx->CR, ADC_CR_ADSTP) == (ADC_CR_ADSTP));
elmot	1:d0dfbce63a89	5981	}
elmot	1:d0dfbce63a89	5982
elmot	1:d0dfbce63a89	5983	/**
elmot	1:d0dfbce63a89	5984	* @brief Get ADC group regular conversion data, range fit for
elmot	1:d0dfbce63a89	5985	* all ADC configurations: all ADC resolutions and
elmot	1:d0dfbce63a89	5986	* all oversampling increased data width (for devices
elmot	1:d0dfbce63a89	5987	* with feature oversampling).
elmot	1:d0dfbce63a89	5988	* @rmtoll DR RDATA LL_ADC_REG_ReadConversionData32
elmot	1:d0dfbce63a89	5989	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	5990	* @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
elmot	1:d0dfbce63a89	5991	*/
elmot	1:d0dfbce63a89	5992	__STATIC_INLINE uint32_t LL_ADC_REG_ReadConversionData32(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	5993	{
elmot	1:d0dfbce63a89	5994	return (uint32_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
elmot	1:d0dfbce63a89	5995	}
elmot	1:d0dfbce63a89	5996
elmot	1:d0dfbce63a89	5997	/**
elmot	1:d0dfbce63a89	5998	* @brief Get ADC group regular conversion data, range fit for
elmot	1:d0dfbce63a89	5999	* ADC resolution 12 bits.
elmot	1:d0dfbce63a89	6000	* @note For devices with feature oversampling: Oversampling
elmot	1:d0dfbce63a89	6001	* can increase data width, function for extended range
elmot	1:d0dfbce63a89	6002	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
elmot	1:d0dfbce63a89	6003	* @rmtoll DR RDATA LL_ADC_REG_ReadConversionData12
elmot	1:d0dfbce63a89	6004	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6005	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
elmot	1:d0dfbce63a89	6006	*/
elmot	1:d0dfbce63a89	6007	__STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData12(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6008	{
elmot	1:d0dfbce63a89	6009	return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
elmot	1:d0dfbce63a89	6010	}
elmot	1:d0dfbce63a89	6011
elmot	1:d0dfbce63a89	6012	/**
elmot	1:d0dfbce63a89	6013	* @brief Get ADC group regular conversion data, range fit for
elmot	1:d0dfbce63a89	6014	* ADC resolution 10 bits.
elmot	1:d0dfbce63a89	6015	* @note For devices with feature oversampling: Oversampling
elmot	1:d0dfbce63a89	6016	* can increase data width, function for extended range
elmot	1:d0dfbce63a89	6017	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
elmot	1:d0dfbce63a89	6018	* @rmtoll DR RDATA LL_ADC_REG_ReadConversionData10
elmot	1:d0dfbce63a89	6019	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6020	* @retval Value between Min_Data=0x000 and Max_Data=0x3FF
elmot	1:d0dfbce63a89	6021	*/
elmot	1:d0dfbce63a89	6022	__STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData10(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6023	{
elmot	1:d0dfbce63a89	6024	return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
elmot	1:d0dfbce63a89	6025	}
elmot	1:d0dfbce63a89	6026
elmot	1:d0dfbce63a89	6027	/**
elmot	1:d0dfbce63a89	6028	* @brief Get ADC group regular conversion data, range fit for
elmot	1:d0dfbce63a89	6029	* ADC resolution 8 bits.
elmot	1:d0dfbce63a89	6030	* @note For devices with feature oversampling: Oversampling
elmot	1:d0dfbce63a89	6031	* can increase data width, function for extended range
elmot	1:d0dfbce63a89	6032	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
elmot	1:d0dfbce63a89	6033	* @rmtoll DR RDATA LL_ADC_REG_ReadConversionData8
elmot	1:d0dfbce63a89	6034	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6035	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
elmot	1:d0dfbce63a89	6036	*/
elmot	1:d0dfbce63a89	6037	__STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData8(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6038	{
elmot	1:d0dfbce63a89	6039	return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
elmot	1:d0dfbce63a89	6040	}
elmot	1:d0dfbce63a89	6041
elmot	1:d0dfbce63a89	6042	/**
elmot	1:d0dfbce63a89	6043	* @brief Get ADC group regular conversion data, range fit for
elmot	1:d0dfbce63a89	6044	* ADC resolution 6 bits.
elmot	1:d0dfbce63a89	6045	* @note For devices with feature oversampling: Oversampling
elmot	1:d0dfbce63a89	6046	* can increase data width, function for extended range
elmot	1:d0dfbce63a89	6047	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
elmot	1:d0dfbce63a89	6048	* @rmtoll DR RDATA LL_ADC_REG_ReadConversionData6
elmot	1:d0dfbce63a89	6049	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6050	* @retval Value between Min_Data=0x00 and Max_Data=0x3F
elmot	1:d0dfbce63a89	6051	*/
elmot	1:d0dfbce63a89	6052	__STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData6(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6053	{
elmot	1:d0dfbce63a89	6054	return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
elmot	1:d0dfbce63a89	6055	}
elmot	1:d0dfbce63a89	6056
elmot	1:d0dfbce63a89	6057	#if defined(ADC_MULTIMODE_SUPPORT)
elmot	1:d0dfbce63a89	6058	/**
elmot	1:d0dfbce63a89	6059	* @brief Get ADC multimode conversion data of ADC master, ADC slave
elmot	1:d0dfbce63a89	6060	* or raw data with ADC master and slave concatenated.
elmot	1:d0dfbce63a89	6061	* @note If raw data with ADC master and slave concatenated is retrieved,
elmot	1:d0dfbce63a89	6062	* a macro is available to get the conversion data of
elmot	1:d0dfbce63a89	6063	* ADC master or ADC slave: see helper macro
elmot	1:d0dfbce63a89	6064	* @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE().
elmot	1:d0dfbce63a89	6065	* (however this macro is mainly intended for multimode
elmot	1:d0dfbce63a89	6066	* transfer by DMA, because this function can do the same
elmot	1:d0dfbce63a89	6067	* by getting multimode conversion data of ADC master or ADC slave
elmot	1:d0dfbce63a89	6068	* separately).
elmot	1:d0dfbce63a89	6069	* @rmtoll CDR RDATA_MST LL_ADC_REG_ReadMultiConversionData32\n
elmot	1:d0dfbce63a89	6070	* CDR RDATA_SLV LL_ADC_REG_ReadMultiConversionData32
elmot	1:d0dfbce63a89	6071	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6072	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6073	* @param ConversionData This parameter can be one of the following values:
elmot	1:d0dfbce63a89	6074	* @arg @ref LL_ADC_MULTI_MASTER
elmot	1:d0dfbce63a89	6075	* @arg @ref LL_ADC_MULTI_SLAVE
elmot	1:d0dfbce63a89	6076	* @arg @ref LL_ADC_MULTI_MASTER_SLAVE
elmot	1:d0dfbce63a89	6077	* @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
elmot	1:d0dfbce63a89	6078	*/
elmot	1:d0dfbce63a89	6079	__STATIC_INLINE uint32_t LL_ADC_REG_ReadMultiConversionData32(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t ConversionData)
elmot	1:d0dfbce63a89	6080	{
elmot	1:d0dfbce63a89	6081	return (uint32_t)(READ_BIT(ADCxy_COMMON->CDR,
elmot	1:d0dfbce63a89	6082	ConversionData)
elmot	1:d0dfbce63a89	6083	>> POSITION_VAL(ConversionData)
elmot	1:d0dfbce63a89	6084	);
elmot	1:d0dfbce63a89	6085	}
elmot	1:d0dfbce63a89	6086	#endif /* ADC_MULTIMODE_SUPPORT */
elmot	1:d0dfbce63a89	6087
elmot	1:d0dfbce63a89	6088	/**
elmot	1:d0dfbce63a89	6089	* @}
elmot	1:d0dfbce63a89	6090	*/
elmot	1:d0dfbce63a89	6091
elmot	1:d0dfbce63a89	6092	/** @defgroup ADC_LL_EF_Operation_ADC_Group_Injected Operation on ADC hierarchical scope: group injected
elmot	1:d0dfbce63a89	6093	* @{
elmot	1:d0dfbce63a89	6094	*/
elmot	1:d0dfbce63a89	6095
elmot	1:d0dfbce63a89	6096	/**
elmot	1:d0dfbce63a89	6097	* @brief Start ADC group injected conversion.
elmot	1:d0dfbce63a89	6098	* @note On this STM32 serie, this function is relevant for both
elmot	1:d0dfbce63a89	6099	* internal trigger (SW start) and external trigger:
elmot	1:d0dfbce63a89	6100	* - If ADC trigger has been set to software start, ADC conversion
elmot	1:d0dfbce63a89	6101	* starts immediately.
elmot	1:d0dfbce63a89	6102	* - If ADC trigger has been set to external trigger, ADC conversion
elmot	1:d0dfbce63a89	6103	* will start at next trigger event (on the selected trigger edge)
elmot	1:d0dfbce63a89	6104	* following the ADC start conversion command.
elmot	1:d0dfbce63a89	6105	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	6106	* ADC state:
elmot	1:d0dfbce63a89	6107	* ADC must be enabled without conversion on going on group injected,
elmot	1:d0dfbce63a89	6108	* without conversion stop command on going on group injected.
elmot	1:d0dfbce63a89	6109	* @rmtoll CR JADSTART LL_ADC_INJ_StartConversion
elmot	1:d0dfbce63a89	6110	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6111	* @retval None
elmot	1:d0dfbce63a89	6112	*/
elmot	1:d0dfbce63a89	6113	__STATIC_INLINE void LL_ADC_INJ_StartConversion(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6114	{
elmot	1:d0dfbce63a89	6115	/* Note: Write register with some additional bits forced to state reset */
elmot	1:d0dfbce63a89	6116	/* instead of modifying only the selected bit for this function, */
elmot	1:d0dfbce63a89	6117	/* to not interfere with bits with HW property "rs". */
elmot	1:d0dfbce63a89	6118	MODIFY_REG(ADCx->CR,
elmot	1:d0dfbce63a89	6119	ADC_CR_BITS_PROPERTY_RS,
elmot	1:d0dfbce63a89	6120	ADC_CR_JADSTART);
elmot	1:d0dfbce63a89	6121	}
elmot	1:d0dfbce63a89	6122
elmot	1:d0dfbce63a89	6123	/**
elmot	1:d0dfbce63a89	6124	* @brief Stop ADC group injected conversion.
elmot	1:d0dfbce63a89	6125	* @note On this STM32 serie, setting of this feature is conditioned to
elmot	1:d0dfbce63a89	6126	* ADC state:
elmot	1:d0dfbce63a89	6127	* ADC must be enabled with conversion on going on group injected,
elmot	1:d0dfbce63a89	6128	* without ADC disable command on going.
elmot	1:d0dfbce63a89	6129	* @rmtoll CR JADSTP LL_ADC_INJ_StopConversion
elmot	1:d0dfbce63a89	6130	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6131	* @retval None
elmot	1:d0dfbce63a89	6132	*/
elmot	1:d0dfbce63a89	6133	__STATIC_INLINE void LL_ADC_INJ_StopConversion(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6134	{
elmot	1:d0dfbce63a89	6135	/* Note: Write register with some additional bits forced to state reset */
elmot	1:d0dfbce63a89	6136	/* instead of modifying only the selected bit for this function, */
elmot	1:d0dfbce63a89	6137	/* to not interfere with bits with HW property "rs". */
elmot	1:d0dfbce63a89	6138	MODIFY_REG(ADCx->CR,
elmot	1:d0dfbce63a89	6139	ADC_CR_BITS_PROPERTY_RS,
elmot	1:d0dfbce63a89	6140	ADC_CR_JADSTP);
elmot	1:d0dfbce63a89	6141	}
elmot	1:d0dfbce63a89	6142
elmot	1:d0dfbce63a89	6143	/**
elmot	1:d0dfbce63a89	6144	* @brief Get ADC group injected conversion state.
elmot	1:d0dfbce63a89	6145	* @rmtoll CR JADSTART LL_ADC_INJ_IsConversionOngoing
elmot	1:d0dfbce63a89	6146	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6147	* @retval 0: no conversion is on going on ADC group injected.
elmot	1:d0dfbce63a89	6148	*/
elmot	1:d0dfbce63a89	6149	__STATIC_INLINE uint32_t LL_ADC_INJ_IsConversionOngoing(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6150	{
elmot	1:d0dfbce63a89	6151	return (READ_BIT(ADCx->CR, ADC_CR_JADSTART) == (ADC_CR_JADSTART));
elmot	1:d0dfbce63a89	6152	}
elmot	1:d0dfbce63a89	6153
elmot	1:d0dfbce63a89	6154	/**
elmot	1:d0dfbce63a89	6155	* @brief Get ADC group injected command of conversion stop state
elmot	1:d0dfbce63a89	6156	* @rmtoll CR JADSTP LL_ADC_INJ_IsStopConversionOngoing
elmot	1:d0dfbce63a89	6157	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6158	* @retval 0: no command of conversion stop is on going on ADC group injected.
elmot	1:d0dfbce63a89	6159	*/
elmot	1:d0dfbce63a89	6160	__STATIC_INLINE uint32_t LL_ADC_INJ_IsStopConversionOngoing(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6161	{
elmot	1:d0dfbce63a89	6162	return (READ_BIT(ADCx->CR, ADC_CR_JADSTP) == (ADC_CR_JADSTP));
elmot	1:d0dfbce63a89	6163	}
elmot	1:d0dfbce63a89	6164
elmot	1:d0dfbce63a89	6165	/**
elmot	1:d0dfbce63a89	6166	* @brief Get ADC group regular conversion data, range fit for
elmot	1:d0dfbce63a89	6167	* all ADC configurations: all ADC resolutions and
elmot	1:d0dfbce63a89	6168	* all oversampling increased data width (for devices
elmot	1:d0dfbce63a89	6169	* with feature oversampling).
elmot	1:d0dfbce63a89	6170	* @rmtoll JDR1 JDATA LL_ADC_INJ_ReadConversionData32\n
elmot	1:d0dfbce63a89	6171	* JDR2 JDATA LL_ADC_INJ_ReadConversionData32\n
elmot	1:d0dfbce63a89	6172	* JDR3 JDATA LL_ADC_INJ_ReadConversionData32\n
elmot	1:d0dfbce63a89	6173	* JDR4 JDATA LL_ADC_INJ_ReadConversionData32
elmot	1:d0dfbce63a89	6174	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6175	* @param Rank This parameter can be one of the following values:
elmot	1:d0dfbce63a89	6176	* @arg @ref LL_ADC_INJ_RANK_1
elmot	1:d0dfbce63a89	6177	* @arg @ref LL_ADC_INJ_RANK_2
elmot	1:d0dfbce63a89	6178	* @arg @ref LL_ADC_INJ_RANK_3
elmot	1:d0dfbce63a89	6179	* @arg @ref LL_ADC_INJ_RANK_4
elmot	1:d0dfbce63a89	6180	* @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
elmot	1:d0dfbce63a89	6181	*/
elmot	1:d0dfbce63a89	6182	__STATIC_INLINE uint32_t LL_ADC_INJ_ReadConversionData32(ADC_TypeDef *ADCx, uint32_t Rank)
elmot	1:d0dfbce63a89	6183	{
elmot	1:d0dfbce63a89	6184	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REGOFFSET_MASK));
elmot	1:d0dfbce63a89	6185
elmot	1:d0dfbce63a89	6186	return (uint32_t)(READ_BIT(*preg,
elmot	1:d0dfbce63a89	6187	ADC_JDR1_JDATA)
elmot	1:d0dfbce63a89	6188	);
elmot	1:d0dfbce63a89	6189	}
elmot	1:d0dfbce63a89	6190
elmot	1:d0dfbce63a89	6191	/**
elmot	1:d0dfbce63a89	6192	* @brief Get ADC group injected conversion data, range fit for
elmot	1:d0dfbce63a89	6193	* ADC resolution 12 bits.
elmot	1:d0dfbce63a89	6194	* @note For devices with feature oversampling: Oversampling
elmot	1:d0dfbce63a89	6195	* can increase data width, function for extended range
elmot	1:d0dfbce63a89	6196	* may be needed: @ref LL_ADC_INJ_ReadConversionData32.
elmot	1:d0dfbce63a89	6197	* @rmtoll JDR1 JDATA LL_ADC_INJ_ReadConversionData12\n
elmot	1:d0dfbce63a89	6198	* JDR2 JDATA LL_ADC_INJ_ReadConversionData12\n
elmot	1:d0dfbce63a89	6199	* JDR3 JDATA LL_ADC_INJ_ReadConversionData12\n
elmot	1:d0dfbce63a89	6200	* JDR4 JDATA LL_ADC_INJ_ReadConversionData12
elmot	1:d0dfbce63a89	6201	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6202	* @param Rank This parameter can be one of the following values:
elmot	1:d0dfbce63a89	6203	* @arg @ref LL_ADC_INJ_RANK_1
elmot	1:d0dfbce63a89	6204	* @arg @ref LL_ADC_INJ_RANK_2
elmot	1:d0dfbce63a89	6205	* @arg @ref LL_ADC_INJ_RANK_3
elmot	1:d0dfbce63a89	6206	* @arg @ref LL_ADC_INJ_RANK_4
elmot	1:d0dfbce63a89	6207	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
elmot	1:d0dfbce63a89	6208	*/
elmot	1:d0dfbce63a89	6209	__STATIC_INLINE uint16_t LL_ADC_INJ_ReadConversionData12(ADC_TypeDef *ADCx, uint32_t Rank)
elmot	1:d0dfbce63a89	6210	{
elmot	1:d0dfbce63a89	6211	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REGOFFSET_MASK));
elmot	1:d0dfbce63a89	6212
elmot	1:d0dfbce63a89	6213	return (uint16_t)(READ_BIT(*preg,
elmot	1:d0dfbce63a89	6214	ADC_JDR1_JDATA)
elmot	1:d0dfbce63a89	6215	);
elmot	1:d0dfbce63a89	6216	}
elmot	1:d0dfbce63a89	6217
elmot	1:d0dfbce63a89	6218	/**
elmot	1:d0dfbce63a89	6219	* @brief Get ADC group injected conversion data, range fit for
elmot	1:d0dfbce63a89	6220	* ADC resolution 10 bits.
elmot	1:d0dfbce63a89	6221	* @note For devices with feature oversampling: Oversampling
elmot	1:d0dfbce63a89	6222	* can increase data width, function for extended range
elmot	1:d0dfbce63a89	6223	* may be needed: @ref LL_ADC_INJ_ReadConversionData32.
elmot	1:d0dfbce63a89	6224	* @rmtoll JDR1 JDATA LL_ADC_INJ_ReadConversionData10\n
elmot	1:d0dfbce63a89	6225	* JDR2 JDATA LL_ADC_INJ_ReadConversionData10\n
elmot	1:d0dfbce63a89	6226	* JDR3 JDATA LL_ADC_INJ_ReadConversionData10\n
elmot	1:d0dfbce63a89	6227	* JDR4 JDATA LL_ADC_INJ_ReadConversionData10
elmot	1:d0dfbce63a89	6228	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6229	* @param Rank This parameter can be one of the following values:
elmot	1:d0dfbce63a89	6230	* @arg @ref LL_ADC_INJ_RANK_1
elmot	1:d0dfbce63a89	6231	* @arg @ref LL_ADC_INJ_RANK_2
elmot	1:d0dfbce63a89	6232	* @arg @ref LL_ADC_INJ_RANK_3
elmot	1:d0dfbce63a89	6233	* @arg @ref LL_ADC_INJ_RANK_4
elmot	1:d0dfbce63a89	6234	* @retval Value between Min_Data=0x000 and Max_Data=0x3FF
elmot	1:d0dfbce63a89	6235	*/
elmot	1:d0dfbce63a89	6236	__STATIC_INLINE uint16_t LL_ADC_INJ_ReadConversionData10(ADC_TypeDef *ADCx, uint32_t Rank)
elmot	1:d0dfbce63a89	6237	{
elmot	1:d0dfbce63a89	6238	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REGOFFSET_MASK));
elmot	1:d0dfbce63a89	6239
elmot	1:d0dfbce63a89	6240	return (uint16_t)(READ_BIT(*preg,
elmot	1:d0dfbce63a89	6241	ADC_JDR1_JDATA)
elmot	1:d0dfbce63a89	6242	);
elmot	1:d0dfbce63a89	6243	}
elmot	1:d0dfbce63a89	6244
elmot	1:d0dfbce63a89	6245	/**
elmot	1:d0dfbce63a89	6246	* @brief Get ADC group injected conversion data, range fit for
elmot	1:d0dfbce63a89	6247	* ADC resolution 8 bits.
elmot	1:d0dfbce63a89	6248	* @note For devices with feature oversampling: Oversampling
elmot	1:d0dfbce63a89	6249	* can increase data width, function for extended range
elmot	1:d0dfbce63a89	6250	* may be needed: @ref LL_ADC_INJ_ReadConversionData32.
elmot	1:d0dfbce63a89	6251	* @rmtoll JDR1 JDATA LL_ADC_INJ_ReadConversionData8\n
elmot	1:d0dfbce63a89	6252	* JDR2 JDATA LL_ADC_INJ_ReadConversionData8\n
elmot	1:d0dfbce63a89	6253	* JDR3 JDATA LL_ADC_INJ_ReadConversionData8\n
elmot	1:d0dfbce63a89	6254	* JDR4 JDATA LL_ADC_INJ_ReadConversionData8
elmot	1:d0dfbce63a89	6255	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6256	* @param Rank This parameter can be one of the following values:
elmot	1:d0dfbce63a89	6257	* @arg @ref LL_ADC_INJ_RANK_1
elmot	1:d0dfbce63a89	6258	* @arg @ref LL_ADC_INJ_RANK_2
elmot	1:d0dfbce63a89	6259	* @arg @ref LL_ADC_INJ_RANK_3
elmot	1:d0dfbce63a89	6260	* @arg @ref LL_ADC_INJ_RANK_4
elmot	1:d0dfbce63a89	6261	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
elmot	1:d0dfbce63a89	6262	*/
elmot	1:d0dfbce63a89	6263	__STATIC_INLINE uint8_t LL_ADC_INJ_ReadConversionData8(ADC_TypeDef *ADCx, uint32_t Rank)
elmot	1:d0dfbce63a89	6264	{
elmot	1:d0dfbce63a89	6265	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REGOFFSET_MASK));
elmot	1:d0dfbce63a89	6266
elmot	1:d0dfbce63a89	6267	return (uint8_t)(READ_BIT(*preg,
elmot	1:d0dfbce63a89	6268	ADC_JDR1_JDATA)
elmot	1:d0dfbce63a89	6269	);
elmot	1:d0dfbce63a89	6270	}
elmot	1:d0dfbce63a89	6271
elmot	1:d0dfbce63a89	6272	/**
elmot	1:d0dfbce63a89	6273	* @brief Get ADC group injected conversion data, range fit for
elmot	1:d0dfbce63a89	6274	* ADC resolution 6 bits.
elmot	1:d0dfbce63a89	6275	* @note For devices with feature oversampling: Oversampling
elmot	1:d0dfbce63a89	6276	* can increase data width, function for extended range
elmot	1:d0dfbce63a89	6277	* may be needed: @ref LL_ADC_INJ_ReadConversionData32.
elmot	1:d0dfbce63a89	6278	* @rmtoll JDR1 JDATA LL_ADC_INJ_ReadConversionData6\n
elmot	1:d0dfbce63a89	6279	* JDR2 JDATA LL_ADC_INJ_ReadConversionData6\n
elmot	1:d0dfbce63a89	6280	* JDR3 JDATA LL_ADC_INJ_ReadConversionData6\n
elmot	1:d0dfbce63a89	6281	* JDR4 JDATA LL_ADC_INJ_ReadConversionData6
elmot	1:d0dfbce63a89	6282	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6283	* @param Rank This parameter can be one of the following values:
elmot	1:d0dfbce63a89	6284	* @arg @ref LL_ADC_INJ_RANK_1
elmot	1:d0dfbce63a89	6285	* @arg @ref LL_ADC_INJ_RANK_2
elmot	1:d0dfbce63a89	6286	* @arg @ref LL_ADC_INJ_RANK_3
elmot	1:d0dfbce63a89	6287	* @arg @ref LL_ADC_INJ_RANK_4
elmot	1:d0dfbce63a89	6288	* @retval Value between Min_Data=0x00 and Max_Data=0x3F
elmot	1:d0dfbce63a89	6289	*/
elmot	1:d0dfbce63a89	6290	__STATIC_INLINE uint8_t LL_ADC_INJ_ReadConversionData6(ADC_TypeDef *ADCx, uint32_t Rank)
elmot	1:d0dfbce63a89	6291	{
elmot	1:d0dfbce63a89	6292	register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REGOFFSET_MASK));
elmot	1:d0dfbce63a89	6293
elmot	1:d0dfbce63a89	6294	return (uint8_t)(READ_BIT(*preg,
elmot	1:d0dfbce63a89	6295	ADC_JDR1_JDATA)
elmot	1:d0dfbce63a89	6296	);
elmot	1:d0dfbce63a89	6297	}
elmot	1:d0dfbce63a89	6298
elmot	1:d0dfbce63a89	6299	/**
elmot	1:d0dfbce63a89	6300	* @}
elmot	1:d0dfbce63a89	6301	*/
elmot	1:d0dfbce63a89	6302
elmot	1:d0dfbce63a89	6303	/** @defgroup ADC_LL_EF_FLAG_Management ADC flag management
elmot	1:d0dfbce63a89	6304	* @{
elmot	1:d0dfbce63a89	6305	*/
elmot	1:d0dfbce63a89	6306
elmot	1:d0dfbce63a89	6307	/**
elmot	1:d0dfbce63a89	6308	* @brief Get flag ADC ready.
elmot	1:d0dfbce63a89	6309	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
elmot	1:d0dfbce63a89	6310	* is enabled and when conversion clock is active.
elmot	1:d0dfbce63a89	6311	* (not only core clock: this ADC has a dual clock domain)
elmot	1:d0dfbce63a89	6312	* @rmtoll ISR ADRDY LL_ADC_IsActiveFlag_ADRDY
elmot	1:d0dfbce63a89	6313	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6314	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6315	*/
elmot	1:d0dfbce63a89	6316	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_ADRDY(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6317	{
elmot	1:d0dfbce63a89	6318	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_ADRDY) == (LL_ADC_FLAG_ADRDY));
elmot	1:d0dfbce63a89	6319	}
elmot	1:d0dfbce63a89	6320
elmot	1:d0dfbce63a89	6321	/**
elmot	1:d0dfbce63a89	6322	* @brief Get flag ADC group regular end of unitary conversion.
elmot	1:d0dfbce63a89	6323	* @rmtoll ISR EOC LL_ADC_IsActiveFlag_EOC
elmot	1:d0dfbce63a89	6324	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6325	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6326	*/
elmot	1:d0dfbce63a89	6327	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOC(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6328	{
elmot	1:d0dfbce63a89	6329	return (READ_BIT(ADCx->ISR, ADC_ISR_EOC) == (ADC_ISR_EOC));
elmot	1:d0dfbce63a89	6330	}
elmot	1:d0dfbce63a89	6331
elmot	1:d0dfbce63a89	6332	/**
elmot	1:d0dfbce63a89	6333	* @brief Get flag ADC group regular end of sequence conversions.
elmot	1:d0dfbce63a89	6334	* @rmtoll ISR EOS LL_ADC_IsActiveFlag_EOS
elmot	1:d0dfbce63a89	6335	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6336	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6337	*/
elmot	1:d0dfbce63a89	6338	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOS(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6339	{
elmot	1:d0dfbce63a89	6340	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOS) == (LL_ADC_FLAG_EOS));
elmot	1:d0dfbce63a89	6341	}
elmot	1:d0dfbce63a89	6342
elmot	1:d0dfbce63a89	6343	/**
elmot	1:d0dfbce63a89	6344	* @brief Get flag ADC group regular overrun.
elmot	1:d0dfbce63a89	6345	* @rmtoll ISR OVR LL_ADC_IsActiveFlag_OVR
elmot	1:d0dfbce63a89	6346	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6347	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6348	*/
elmot	1:d0dfbce63a89	6349	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_OVR(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6350	{
elmot	1:d0dfbce63a89	6351	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_OVR) == (LL_ADC_FLAG_OVR));
elmot	1:d0dfbce63a89	6352	}
elmot	1:d0dfbce63a89	6353
elmot	1:d0dfbce63a89	6354	/**
elmot	1:d0dfbce63a89	6355	* @brief Get flag ADC group regular end of sampling phase.
elmot	1:d0dfbce63a89	6356	* @rmtoll ISR EOSMP LL_ADC_IsActiveFlag_EOSMP
elmot	1:d0dfbce63a89	6357	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6358	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6359	*/
elmot	1:d0dfbce63a89	6360	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOSMP(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6361	{
elmot	1:d0dfbce63a89	6362	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOSMP) == (LL_ADC_FLAG_EOSMP));
elmot	1:d0dfbce63a89	6363	}
elmot	1:d0dfbce63a89	6364
elmot	1:d0dfbce63a89	6365	/**
elmot	1:d0dfbce63a89	6366	* @brief Get flag ADC group injected end of unitary conversion.
elmot	1:d0dfbce63a89	6367	* @rmtoll ISR JEOC LL_ADC_IsActiveFlag_JEOC
elmot	1:d0dfbce63a89	6368	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6369	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6370	*/
elmot	1:d0dfbce63a89	6371	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_JEOC(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6372	{
elmot	1:d0dfbce63a89	6373	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_JEOC) == (LL_ADC_FLAG_JEOC));
elmot	1:d0dfbce63a89	6374	}
elmot	1:d0dfbce63a89	6375
elmot	1:d0dfbce63a89	6376	/**
elmot	1:d0dfbce63a89	6377	* @brief Get flag ADC group injected end of sequence conversions.
elmot	1:d0dfbce63a89	6378	* @rmtoll ISR JEOS LL_ADC_IsActiveFlag_JEOS
elmot	1:d0dfbce63a89	6379	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6380	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6381	*/
elmot	1:d0dfbce63a89	6382	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_JEOS(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6383	{
elmot	1:d0dfbce63a89	6384	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_JEOS) == (LL_ADC_FLAG_JEOS));
elmot	1:d0dfbce63a89	6385	}
elmot	1:d0dfbce63a89	6386
elmot	1:d0dfbce63a89	6387	/**
elmot	1:d0dfbce63a89	6388	* @brief Get flag ADC group injected contexts queue overflow.
elmot	1:d0dfbce63a89	6389	* @rmtoll ISR JQOVF LL_ADC_IsActiveFlag_JQOVF
elmot	1:d0dfbce63a89	6390	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6391	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6392	*/
elmot	1:d0dfbce63a89	6393	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_JQOVF(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6394	{
elmot	1:d0dfbce63a89	6395	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_JQOVF) == (LL_ADC_FLAG_JQOVF));
elmot	1:d0dfbce63a89	6396	}
elmot	1:d0dfbce63a89	6397
elmot	1:d0dfbce63a89	6398	/**
elmot	1:d0dfbce63a89	6399	* @brief Get flag ADC analog watchdog 1 flag
elmot	1:d0dfbce63a89	6400	* @rmtoll ISR AWD1 LL_ADC_IsActiveFlag_AWD1
elmot	1:d0dfbce63a89	6401	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6402	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6403	*/
elmot	1:d0dfbce63a89	6404	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_AWD1(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6405	{
elmot	1:d0dfbce63a89	6406	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_AWD1) == (LL_ADC_FLAG_AWD1));
elmot	1:d0dfbce63a89	6407	}
elmot	1:d0dfbce63a89	6408
elmot	1:d0dfbce63a89	6409	/**
elmot	1:d0dfbce63a89	6410	* @brief Get flag ADC analog watchdog 2.
elmot	1:d0dfbce63a89	6411	* @rmtoll ISR AWD2 LL_ADC_IsActiveFlag_AWD2
elmot	1:d0dfbce63a89	6412	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6413	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6414	*/
elmot	1:d0dfbce63a89	6415	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_AWD2(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6416	{
elmot	1:d0dfbce63a89	6417	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_AWD2) == (LL_ADC_FLAG_AWD2));
elmot	1:d0dfbce63a89	6418	}
elmot	1:d0dfbce63a89	6419
elmot	1:d0dfbce63a89	6420	/**
elmot	1:d0dfbce63a89	6421	* @brief Get flag ADC analog watchdog 3.
elmot	1:d0dfbce63a89	6422	* @rmtoll ISR AWD3 LL_ADC_IsActiveFlag_AWD3
elmot	1:d0dfbce63a89	6423	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6424	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6425	*/
elmot	1:d0dfbce63a89	6426	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_AWD3(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6427	{
elmot	1:d0dfbce63a89	6428	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_AWD3) == (LL_ADC_FLAG_AWD3));
elmot	1:d0dfbce63a89	6429	}
elmot	1:d0dfbce63a89	6430
elmot	1:d0dfbce63a89	6431	/**
elmot	1:d0dfbce63a89	6432	* @brief Clear flag ADC ready.
elmot	1:d0dfbce63a89	6433	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
elmot	1:d0dfbce63a89	6434	* is enabled and when conversion clock is active.
elmot	1:d0dfbce63a89	6435	* (not only core clock: this ADC has a dual clock domain)
elmot	1:d0dfbce63a89	6436	* @rmtoll ISR ADRDY LL_ADC_ClearFlag_ADRDY
elmot	1:d0dfbce63a89	6437	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6438	* @retval None
elmot	1:d0dfbce63a89	6439	*/
elmot	1:d0dfbce63a89	6440	__STATIC_INLINE void LL_ADC_ClearFlag_ADRDY(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6441	{
elmot	1:d0dfbce63a89	6442	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_ADRDY);
elmot	1:d0dfbce63a89	6443	}
elmot	1:d0dfbce63a89	6444
elmot	1:d0dfbce63a89	6445	/**
elmot	1:d0dfbce63a89	6446	* @brief Clear flag ADC group regular end of unitary conversion.
elmot	1:d0dfbce63a89	6447	* @rmtoll ISR EOC LL_ADC_ClearFlag_EOC
elmot	1:d0dfbce63a89	6448	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6449	* @retval None
elmot	1:d0dfbce63a89	6450	*/
elmot	1:d0dfbce63a89	6451	__STATIC_INLINE void LL_ADC_ClearFlag_EOC(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6452	{
elmot	1:d0dfbce63a89	6453	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOC);
elmot	1:d0dfbce63a89	6454	}
elmot	1:d0dfbce63a89	6455
elmot	1:d0dfbce63a89	6456	/**
elmot	1:d0dfbce63a89	6457	* @brief Clear flag ADC group regular end of sequence conversions.
elmot	1:d0dfbce63a89	6458	* @rmtoll ISR EOS LL_ADC_ClearFlag_EOS
elmot	1:d0dfbce63a89	6459	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6460	* @retval None
elmot	1:d0dfbce63a89	6461	*/
elmot	1:d0dfbce63a89	6462	__STATIC_INLINE void LL_ADC_ClearFlag_EOS(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6463	{
elmot	1:d0dfbce63a89	6464	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOS);
elmot	1:d0dfbce63a89	6465	}
elmot	1:d0dfbce63a89	6466
elmot	1:d0dfbce63a89	6467	/**
elmot	1:d0dfbce63a89	6468	* @brief Clear flag ADC group regular overrun.
elmot	1:d0dfbce63a89	6469	* @rmtoll ISR OVR LL_ADC_ClearFlag_OVR
elmot	1:d0dfbce63a89	6470	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6471	* @retval None
elmot	1:d0dfbce63a89	6472	*/
elmot	1:d0dfbce63a89	6473	__STATIC_INLINE void LL_ADC_ClearFlag_OVR(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6474	{
elmot	1:d0dfbce63a89	6475	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_OVR);
elmot	1:d0dfbce63a89	6476	}
elmot	1:d0dfbce63a89	6477
elmot	1:d0dfbce63a89	6478	/**
elmot	1:d0dfbce63a89	6479	* @brief Clear flag ADC group regular end of sampling phase.
elmot	1:d0dfbce63a89	6480	* @rmtoll ISR EOSMP LL_ADC_ClearFlag_EOSMP
elmot	1:d0dfbce63a89	6481	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6482	* @retval None
elmot	1:d0dfbce63a89	6483	*/
elmot	1:d0dfbce63a89	6484	__STATIC_INLINE void LL_ADC_ClearFlag_EOSMP(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6485	{
elmot	1:d0dfbce63a89	6486	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOSMP);
elmot	1:d0dfbce63a89	6487	}
elmot	1:d0dfbce63a89	6488
elmot	1:d0dfbce63a89	6489	/**
elmot	1:d0dfbce63a89	6490	* @brief Clear flag ADC group injected end of unitary conversion.
elmot	1:d0dfbce63a89	6491	* @rmtoll ISR JEOC LL_ADC_ClearFlag_JEOC
elmot	1:d0dfbce63a89	6492	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6493	* @retval None
elmot	1:d0dfbce63a89	6494	*/
elmot	1:d0dfbce63a89	6495	__STATIC_INLINE void LL_ADC_ClearFlag_JEOC(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6496	{
elmot	1:d0dfbce63a89	6497	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_JEOC);
elmot	1:d0dfbce63a89	6498	}
elmot	1:d0dfbce63a89	6499
elmot	1:d0dfbce63a89	6500	/**
elmot	1:d0dfbce63a89	6501	* @brief Clear flag ADC group injected end of sequence conversions.
elmot	1:d0dfbce63a89	6502	* @rmtoll ISR JEOS LL_ADC_ClearFlag_JEOS
elmot	1:d0dfbce63a89	6503	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6504	* @retval None
elmot	1:d0dfbce63a89	6505	*/
elmot	1:d0dfbce63a89	6506	__STATIC_INLINE void LL_ADC_ClearFlag_JEOS(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6507	{
elmot	1:d0dfbce63a89	6508	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_JEOS);
elmot	1:d0dfbce63a89	6509	}
elmot	1:d0dfbce63a89	6510
elmot	1:d0dfbce63a89	6511	/**
elmot	1:d0dfbce63a89	6512	* @brief Clear flag ADC group injected contexts queue overflow.
elmot	1:d0dfbce63a89	6513	* @rmtoll ISR JQOVF LL_ADC_ClearFlag_JQOVF
elmot	1:d0dfbce63a89	6514	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6515	* @retval None
elmot	1:d0dfbce63a89	6516	*/
elmot	1:d0dfbce63a89	6517	__STATIC_INLINE void LL_ADC_ClearFlag_JQOVF(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6518	{
elmot	1:d0dfbce63a89	6519	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_JQOVF);
elmot	1:d0dfbce63a89	6520	}
elmot	1:d0dfbce63a89	6521
elmot	1:d0dfbce63a89	6522	/**
elmot	1:d0dfbce63a89	6523	* @brief Clear flag ADC analog watchdog 1.
elmot	1:d0dfbce63a89	6524	* @rmtoll ISR AWD1 LL_ADC_ClearFlag_AWD1
elmot	1:d0dfbce63a89	6525	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6526	* @retval None
elmot	1:d0dfbce63a89	6527	*/
elmot	1:d0dfbce63a89	6528	__STATIC_INLINE void LL_ADC_ClearFlag_AWD1(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6529	{
elmot	1:d0dfbce63a89	6530	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_AWD1);
elmot	1:d0dfbce63a89	6531	}
elmot	1:d0dfbce63a89	6532
elmot	1:d0dfbce63a89	6533	/**
elmot	1:d0dfbce63a89	6534	* @brief Clear flag ADC analog watchdog 2.
elmot	1:d0dfbce63a89	6535	* @rmtoll ISR AWD2 LL_ADC_ClearFlag_AWD2
elmot	1:d0dfbce63a89	6536	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6537	* @retval None
elmot	1:d0dfbce63a89	6538	*/
elmot	1:d0dfbce63a89	6539	__STATIC_INLINE void LL_ADC_ClearFlag_AWD2(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6540	{
elmot	1:d0dfbce63a89	6541	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_AWD2);
elmot	1:d0dfbce63a89	6542	}
elmot	1:d0dfbce63a89	6543
elmot	1:d0dfbce63a89	6544	/**
elmot	1:d0dfbce63a89	6545	* @brief Clear flag ADC analog watchdog 3.
elmot	1:d0dfbce63a89	6546	* @rmtoll ISR AWD3 LL_ADC_ClearFlag_AWD3
elmot	1:d0dfbce63a89	6547	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6548	* @retval None
elmot	1:d0dfbce63a89	6549	*/
elmot	1:d0dfbce63a89	6550	__STATIC_INLINE void LL_ADC_ClearFlag_AWD3(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6551	{
elmot	1:d0dfbce63a89	6552	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_AWD3);
elmot	1:d0dfbce63a89	6553	}
elmot	1:d0dfbce63a89	6554
elmot	1:d0dfbce63a89	6555	#if defined(ADC_MULTIMODE_SUPPORT)
elmot	1:d0dfbce63a89	6556	/**
elmot	1:d0dfbce63a89	6557	* @brief Get flag multimode ADC ready of the ADC master.
elmot	1:d0dfbce63a89	6558	* @rmtoll CSR ADRDY_MST LL_ADC_IsActiveFlag_MST_ADRDY
elmot	1:d0dfbce63a89	6559	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6560	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6561	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6562	*/
elmot	1:d0dfbce63a89	6563	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_ADRDY(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6564	{
elmot	1:d0dfbce63a89	6565	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_ADRDY_MST) == (LL_ADC_FLAG_ADRDY_MST));
elmot	1:d0dfbce63a89	6566	}
elmot	1:d0dfbce63a89	6567
elmot	1:d0dfbce63a89	6568	/**
elmot	1:d0dfbce63a89	6569	* @brief Get flag multimode ADC ready of the ADC slave.
elmot	1:d0dfbce63a89	6570	* @rmtoll CSR ADRDY_SLV LL_ADC_IsActiveFlag_SLV_ADRDY
elmot	1:d0dfbce63a89	6571	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6572	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6573	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6574	*/
elmot	1:d0dfbce63a89	6575	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_ADRDY(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6576	{
elmot	1:d0dfbce63a89	6577	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_ADRDY_SLV) == (LL_ADC_FLAG_ADRDY_SLV));
elmot	1:d0dfbce63a89	6578	}
elmot	1:d0dfbce63a89	6579
elmot	1:d0dfbce63a89	6580	/**
elmot	1:d0dfbce63a89	6581	* @brief Get flag multimode ADC group regular end of unitary conversion of the ADC master.
elmot	1:d0dfbce63a89	6582	* @rmtoll CSR EOC_MST LL_ADC_IsActiveFlag_MST_EOC
elmot	1:d0dfbce63a89	6583	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6584	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6585	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6586	*/
elmot	1:d0dfbce63a89	6587	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_EOC(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6588	{
elmot	1:d0dfbce63a89	6589	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOC_SLV) == (LL_ADC_FLAG_EOC_SLV));
elmot	1:d0dfbce63a89	6590	}
elmot	1:d0dfbce63a89	6591
elmot	1:d0dfbce63a89	6592	/**
elmot	1:d0dfbce63a89	6593	* @brief Get flag multimode ADC group regular end of unitary conversion of the ADC slave.
elmot	1:d0dfbce63a89	6594	* @rmtoll CSR EOC_SLV LL_ADC_IsActiveFlag_SLV_EOC
elmot	1:d0dfbce63a89	6595	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6596	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6597	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6598	*/
elmot	1:d0dfbce63a89	6599	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_EOC(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6600	{
elmot	1:d0dfbce63a89	6601	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOC_SLV) == (LL_ADC_FLAG_EOC_SLV));
elmot	1:d0dfbce63a89	6602	}
elmot	1:d0dfbce63a89	6603
elmot	1:d0dfbce63a89	6604	/**
elmot	1:d0dfbce63a89	6605	* @brief Get flag multimode ADC group regular end of sequence conversions of the ADC master.
elmot	1:d0dfbce63a89	6606	* @rmtoll CSR EOS_MST LL_ADC_IsActiveFlag_MST_EOS
elmot	1:d0dfbce63a89	6607	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6608	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6609	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6610	*/
elmot	1:d0dfbce63a89	6611	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_EOS(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6612	{
elmot	1:d0dfbce63a89	6613	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOS_MST) == (LL_ADC_FLAG_EOS_MST));
elmot	1:d0dfbce63a89	6614	}
elmot	1:d0dfbce63a89	6615
elmot	1:d0dfbce63a89	6616	/**
elmot	1:d0dfbce63a89	6617	* @brief Get flag multimode ADC group regular end of sequence conversions of the ADC slave.
elmot	1:d0dfbce63a89	6618	* @rmtoll CSR EOS_SLV LL_ADC_IsActiveFlag_SLV_EOS
elmot	1:d0dfbce63a89	6619	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6620	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6621	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6622	*/
elmot	1:d0dfbce63a89	6623	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_EOS(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6624	{
elmot	1:d0dfbce63a89	6625	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOS_SLV) == (LL_ADC_FLAG_EOS_SLV));
elmot	1:d0dfbce63a89	6626	}
elmot	1:d0dfbce63a89	6627
elmot	1:d0dfbce63a89	6628	/**
elmot	1:d0dfbce63a89	6629	* @brief Get flag multimode ADC group regular overrun of the ADC master.
elmot	1:d0dfbce63a89	6630	* @rmtoll CSR OVR_MST LL_ADC_IsActiveFlag_MST_OVR
elmot	1:d0dfbce63a89	6631	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6632	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6633	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6634	*/
elmot	1:d0dfbce63a89	6635	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_OVR(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6636	{
elmot	1:d0dfbce63a89	6637	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_OVR_MST) == (LL_ADC_FLAG_OVR_MST));
elmot	1:d0dfbce63a89	6638	}
elmot	1:d0dfbce63a89	6639
elmot	1:d0dfbce63a89	6640	/**
elmot	1:d0dfbce63a89	6641	* @brief Get flag multimode ADC group regular overrun of the ADC slave.
elmot	1:d0dfbce63a89	6642	* @rmtoll CSR OVR_SLV LL_ADC_IsActiveFlag_SLV_OVR
elmot	1:d0dfbce63a89	6643	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6644	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6645	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6646	*/
elmot	1:d0dfbce63a89	6647	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_OVR(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6648	{
elmot	1:d0dfbce63a89	6649	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_OVR_SLV) == (LL_ADC_FLAG_OVR_SLV));
elmot	1:d0dfbce63a89	6650	}
elmot	1:d0dfbce63a89	6651
elmot	1:d0dfbce63a89	6652	/**
elmot	1:d0dfbce63a89	6653	* @brief Get flag multimode ADC group regular end of sampling of the ADC master.
elmot	1:d0dfbce63a89	6654	* @rmtoll CSR EOSMP_MST LL_ADC_IsActiveFlag_MST_EOSMP
elmot	1:d0dfbce63a89	6655	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6656	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6657	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6658	*/
elmot	1:d0dfbce63a89	6659	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_EOSMP(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6660	{
elmot	1:d0dfbce63a89	6661	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOSMP_MST) == (LL_ADC_FLAG_EOSMP_MST));
elmot	1:d0dfbce63a89	6662	}
elmot	1:d0dfbce63a89	6663
elmot	1:d0dfbce63a89	6664	/**
elmot	1:d0dfbce63a89	6665	* @brief Get flag multimode ADC group regular end of sampling of the ADC slave.
elmot	1:d0dfbce63a89	6666	* @rmtoll CSR EOSMP_SLV LL_ADC_IsActiveFlag_SLV_EOSMP
elmot	1:d0dfbce63a89	6667	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6668	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6669	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6670	*/
elmot	1:d0dfbce63a89	6671	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_EOSMP(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6672	{
elmot	1:d0dfbce63a89	6673	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_EOSMP_SLV) == (LL_ADC_FLAG_EOSMP_SLV));
elmot	1:d0dfbce63a89	6674	}
elmot	1:d0dfbce63a89	6675
elmot	1:d0dfbce63a89	6676	/**
elmot	1:d0dfbce63a89	6677	* @brief Get flag multimode ADC group injected end of unitary conversion of the ADC master.
elmot	1:d0dfbce63a89	6678	* @rmtoll CSR JEOC_MST LL_ADC_IsActiveFlag_MST_JEOC
elmot	1:d0dfbce63a89	6679	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6680	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6681	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6682	*/
elmot	1:d0dfbce63a89	6683	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_JEOC(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6684	{
elmot	1:d0dfbce63a89	6685	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JEOC_MST) == (LL_ADC_FLAG_JEOC_MST));
elmot	1:d0dfbce63a89	6686	}
elmot	1:d0dfbce63a89	6687
elmot	1:d0dfbce63a89	6688	/**
elmot	1:d0dfbce63a89	6689	* @brief Get flag multimode ADC group injected end of unitary conversion of the ADC slave.
elmot	1:d0dfbce63a89	6690	* @rmtoll CSR JEOC_SLV LL_ADC_IsActiveFlag_SLV_JEOC
elmot	1:d0dfbce63a89	6691	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6692	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6693	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6694	*/
elmot	1:d0dfbce63a89	6695	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_JEOC(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6696	{
elmot	1:d0dfbce63a89	6697	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JEOC_SLV) == (LL_ADC_FLAG_JEOC_SLV));
elmot	1:d0dfbce63a89	6698	}
elmot	1:d0dfbce63a89	6699
elmot	1:d0dfbce63a89	6700	/**
elmot	1:d0dfbce63a89	6701	* @brief Get flag multimode ADC group injected end of sequence conversions of the ADC master.
elmot	1:d0dfbce63a89	6702	* @rmtoll CSR JEOS_MST LL_ADC_IsActiveFlag_MST_JEOS
elmot	1:d0dfbce63a89	6703	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6704	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6705	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6706	*/
elmot	1:d0dfbce63a89	6707	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_JEOS(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6708	{
elmot	1:d0dfbce63a89	6709	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JEOS_MST) == (LL_ADC_FLAG_JEOS_MST));
elmot	1:d0dfbce63a89	6710	}
elmot	1:d0dfbce63a89	6711
elmot	1:d0dfbce63a89	6712	/**
elmot	1:d0dfbce63a89	6713	* @brief Get flag multimode ADC group injected end of sequence conversions of the ADC slave.
elmot	1:d0dfbce63a89	6714	* @rmtoll CSR JEOS_SLV LL_ADC_IsActiveFlag_SLV_JEOS
elmot	1:d0dfbce63a89	6715	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6716	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6717	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6718	*/
elmot	1:d0dfbce63a89	6719	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_JEOS(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6720	{
elmot	1:d0dfbce63a89	6721	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JEOS_SLV) == (LL_ADC_FLAG_JEOS_SLV));
elmot	1:d0dfbce63a89	6722	}
elmot	1:d0dfbce63a89	6723
elmot	1:d0dfbce63a89	6724	/**
elmot	1:d0dfbce63a89	6725	* @brief Get flag multimode ADC group injected context queue overflow of the ADC master.
elmot	1:d0dfbce63a89	6726	* @rmtoll CSR JQOVF_MST LL_ADC_IsActiveFlag_MST_JQOVF
elmot	1:d0dfbce63a89	6727	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6728	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6729	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6730	*/
elmot	1:d0dfbce63a89	6731	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_JQOVF(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6732	{
elmot	1:d0dfbce63a89	6733	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JQOVF_MST) == (LL_ADC_FLAG_JQOVF_MST));
elmot	1:d0dfbce63a89	6734	}
elmot	1:d0dfbce63a89	6735
elmot	1:d0dfbce63a89	6736	/**
elmot	1:d0dfbce63a89	6737	* @brief Get flag multimode ADC group injected context queue overflow of the ADC slave.
elmot	1:d0dfbce63a89	6738	* @rmtoll CSR JQOVF_SLV LL_ADC_IsActiveFlag_SLV_JQOVF
elmot	1:d0dfbce63a89	6739	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6740	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6741	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6742	*/
elmot	1:d0dfbce63a89	6743	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_JQOVF(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6744	{
elmot	1:d0dfbce63a89	6745	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_JQOVF_SLV) == (LL_ADC_FLAG_JQOVF_SLV));
elmot	1:d0dfbce63a89	6746	}
elmot	1:d0dfbce63a89	6747
elmot	1:d0dfbce63a89	6748	/**
elmot	1:d0dfbce63a89	6749	* @brief Get flag multimode ADC analog watchdog 1 of the ADC master.
elmot	1:d0dfbce63a89	6750	* @rmtoll CSR AWD1_MST LL_ADC_IsActiveFlag_MST_AWD1
elmot	1:d0dfbce63a89	6751	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6752	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6753	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6754	*/
elmot	1:d0dfbce63a89	6755	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_AWD1(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6756	{
elmot	1:d0dfbce63a89	6757	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD1_MST) == (LL_ADC_FLAG_AWD1_MST));
elmot	1:d0dfbce63a89	6758	}
elmot	1:d0dfbce63a89	6759
elmot	1:d0dfbce63a89	6760	/**
elmot	1:d0dfbce63a89	6761	* @brief Get flag multimode analog watchdog 1 of the ADC slave.
elmot	1:d0dfbce63a89	6762	* @rmtoll CSR AWD1_SLV LL_ADC_IsActiveFlag_SLV_AWD1
elmot	1:d0dfbce63a89	6763	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6764	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6765	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6766	*/
elmot	1:d0dfbce63a89	6767	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_AWD1(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6768	{
elmot	1:d0dfbce63a89	6769	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD1_SLV) == (LL_ADC_FLAG_AWD1_SLV));
elmot	1:d0dfbce63a89	6770	}
elmot	1:d0dfbce63a89	6771
elmot	1:d0dfbce63a89	6772	/**
elmot	1:d0dfbce63a89	6773	* @brief Get flag multimode ADC analog watchdog 2 of the ADC master.
elmot	1:d0dfbce63a89	6774	* @rmtoll CSR AWD2_MST LL_ADC_IsActiveFlag_MST_AWD2
elmot	1:d0dfbce63a89	6775	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6776	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6777	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6778	*/
elmot	1:d0dfbce63a89	6779	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_AWD2(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6780	{
elmot	1:d0dfbce63a89	6781	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD2_MST) == (LL_ADC_FLAG_AWD2_MST));
elmot	1:d0dfbce63a89	6782	}
elmot	1:d0dfbce63a89	6783
elmot	1:d0dfbce63a89	6784	/**
elmot	1:d0dfbce63a89	6785	* @brief Get flag multimode ADC analog watchdog 2 of the ADC slave.
elmot	1:d0dfbce63a89	6786	* @rmtoll CSR AWD2_SLV LL_ADC_IsActiveFlag_SLV_AWD2
elmot	1:d0dfbce63a89	6787	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6788	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6789	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6790	*/
elmot	1:d0dfbce63a89	6791	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_AWD2(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6792	{
elmot	1:d0dfbce63a89	6793	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD2_SLV) == (LL_ADC_FLAG_AWD2_SLV));
elmot	1:d0dfbce63a89	6794	}
elmot	1:d0dfbce63a89	6795
elmot	1:d0dfbce63a89	6796	/**
elmot	1:d0dfbce63a89	6797	* @brief Get flag multimode ADC analog watchdog 3 of the ADC master.
elmot	1:d0dfbce63a89	6798	* @rmtoll CSR AWD3_MST LL_ADC_IsActiveFlag_MST_AWD3
elmot	1:d0dfbce63a89	6799	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6800	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6801	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6802	*/
elmot	1:d0dfbce63a89	6803	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_AWD3(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6804	{
elmot	1:d0dfbce63a89	6805	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD3_MST) == (LL_ADC_FLAG_AWD3_MST));
elmot	1:d0dfbce63a89	6806	}
elmot	1:d0dfbce63a89	6807
elmot	1:d0dfbce63a89	6808	/**
elmot	1:d0dfbce63a89	6809	* @brief Get flag multimode ADC analog watchdog 3 of the ADC slave.
elmot	1:d0dfbce63a89	6810	* @rmtoll CSR AWD3_SLV LL_ADC_IsActiveFlag_SLV_AWD3
elmot	1:d0dfbce63a89	6811	* @param ADCxy_COMMON ADC common instance
elmot	1:d0dfbce63a89	6812	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
elmot	1:d0dfbce63a89	6813	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	6814	*/
elmot	1:d0dfbce63a89	6815	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_SLV_AWD3(ADC_Common_TypeDef *ADCxy_COMMON)
elmot	1:d0dfbce63a89	6816	{
elmot	1:d0dfbce63a89	6817	return (READ_BIT(ADCxy_COMMON->CSR, LL_ADC_FLAG_AWD3_SLV) == (LL_ADC_FLAG_AWD3_SLV));
elmot	1:d0dfbce63a89	6818	}
elmot	1:d0dfbce63a89	6819	#endif /* ADC_MULTIMODE_SUPPORT */
elmot	1:d0dfbce63a89	6820
elmot	1:d0dfbce63a89	6821	/**
elmot	1:d0dfbce63a89	6822	* @}
elmot	1:d0dfbce63a89	6823	*/
elmot	1:d0dfbce63a89	6824
elmot	1:d0dfbce63a89	6825	/** @defgroup ADC_LL_EF_IT_Management ADC IT management
elmot	1:d0dfbce63a89	6826	* @{
elmot	1:d0dfbce63a89	6827	*/
elmot	1:d0dfbce63a89	6828
elmot	1:d0dfbce63a89	6829	/**
elmot	1:d0dfbce63a89	6830	* @brief Enable ADC ready.
elmot	1:d0dfbce63a89	6831	* @rmtoll IER ADRDYIE LL_ADC_EnableIT_ADRDY
elmot	1:d0dfbce63a89	6832	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6833	* @retval None
elmot	1:d0dfbce63a89	6834	*/
elmot	1:d0dfbce63a89	6835	__STATIC_INLINE void LL_ADC_EnableIT_ADRDY(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6836	{
elmot	1:d0dfbce63a89	6837	SET_BIT(ADCx->IER, LL_ADC_IT_ADRDY);
elmot	1:d0dfbce63a89	6838	}
elmot	1:d0dfbce63a89	6839
elmot	1:d0dfbce63a89	6840	/**
elmot	1:d0dfbce63a89	6841	* @brief Enable interruption ADC group regular end of unitary conversion.
elmot	1:d0dfbce63a89	6842	* @rmtoll IER EOCIE LL_ADC_EnableIT_EOC
elmot	1:d0dfbce63a89	6843	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6844	* @retval None
elmot	1:d0dfbce63a89	6845	*/
elmot	1:d0dfbce63a89	6846	__STATIC_INLINE void LL_ADC_EnableIT_EOC(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6847	{
elmot	1:d0dfbce63a89	6848	SET_BIT(ADCx->IER, LL_ADC_IT_EOC);
elmot	1:d0dfbce63a89	6849	}
elmot	1:d0dfbce63a89	6850
elmot	1:d0dfbce63a89	6851	/**
elmot	1:d0dfbce63a89	6852	* @brief Enable interruption ADC group regular end of sequence conversions.
elmot	1:d0dfbce63a89	6853	* @rmtoll IER EOSIE LL_ADC_EnableIT_EOS
elmot	1:d0dfbce63a89	6854	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6855	* @retval None
elmot	1:d0dfbce63a89	6856	*/
elmot	1:d0dfbce63a89	6857	__STATIC_INLINE void LL_ADC_EnableIT_EOS(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6858	{
elmot	1:d0dfbce63a89	6859	SET_BIT(ADCx->IER, LL_ADC_IT_EOS);
elmot	1:d0dfbce63a89	6860	}
elmot	1:d0dfbce63a89	6861
elmot	1:d0dfbce63a89	6862	/**
elmot	1:d0dfbce63a89	6863	* @brief Enable ADC group regular interruption overrun.
elmot	1:d0dfbce63a89	6864	* @rmtoll IER OVRIE LL_ADC_EnableIT_OVR
elmot	1:d0dfbce63a89	6865	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6866	* @retval None
elmot	1:d0dfbce63a89	6867	*/
elmot	1:d0dfbce63a89	6868	__STATIC_INLINE void LL_ADC_EnableIT_OVR(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6869	{
elmot	1:d0dfbce63a89	6870	SET_BIT(ADCx->IER, LL_ADC_IT_OVR);
elmot	1:d0dfbce63a89	6871	}
elmot	1:d0dfbce63a89	6872
elmot	1:d0dfbce63a89	6873	/**
elmot	1:d0dfbce63a89	6874	* @brief Enable interruption ADC group regular end of sampling.
elmot	1:d0dfbce63a89	6875	* @rmtoll IER EOSMPIE LL_ADC_EnableIT_EOSMP
elmot	1:d0dfbce63a89	6876	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6877	* @retval None
elmot	1:d0dfbce63a89	6878	*/
elmot	1:d0dfbce63a89	6879	__STATIC_INLINE void LL_ADC_EnableIT_EOSMP(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6880	{
elmot	1:d0dfbce63a89	6881	SET_BIT(ADCx->IER, LL_ADC_IT_EOSMP);
elmot	1:d0dfbce63a89	6882	}
elmot	1:d0dfbce63a89	6883
elmot	1:d0dfbce63a89	6884	/**
elmot	1:d0dfbce63a89	6885	* @brief Enable interruption ADC group injected end of unitary conversion.
elmot	1:d0dfbce63a89	6886	* @rmtoll IER JEOCIE LL_ADC_EnableIT_JEOC
elmot	1:d0dfbce63a89	6887	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6888	* @retval None
elmot	1:d0dfbce63a89	6889	*/
elmot	1:d0dfbce63a89	6890	__STATIC_INLINE void LL_ADC_EnableIT_JEOC(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6891	{
elmot	1:d0dfbce63a89	6892	SET_BIT(ADCx->IER, LL_ADC_IT_JEOC);
elmot	1:d0dfbce63a89	6893	}
elmot	1:d0dfbce63a89	6894
elmot	1:d0dfbce63a89	6895	/**
elmot	1:d0dfbce63a89	6896	* @brief Enable interruption ADC group injected end of sequence conversions.
elmot	1:d0dfbce63a89	6897	* @rmtoll IER JEOSIE LL_ADC_EnableIT_JEOS
elmot	1:d0dfbce63a89	6898	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6899	* @retval None
elmot	1:d0dfbce63a89	6900	*/
elmot	1:d0dfbce63a89	6901	__STATIC_INLINE void LL_ADC_EnableIT_JEOS(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6902	{
elmot	1:d0dfbce63a89	6903	SET_BIT(ADCx->IER, LL_ADC_IT_JEOS);
elmot	1:d0dfbce63a89	6904	}
elmot	1:d0dfbce63a89	6905
elmot	1:d0dfbce63a89	6906	/**
elmot	1:d0dfbce63a89	6907	* @brief Enable interruption ADC group injected context queue overflow.
elmot	1:d0dfbce63a89	6908	* @rmtoll IER JQOVFIE LL_ADC_EnableIT_JQOVF
elmot	1:d0dfbce63a89	6909	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6910	* @retval None
elmot	1:d0dfbce63a89	6911	*/
elmot	1:d0dfbce63a89	6912	__STATIC_INLINE void LL_ADC_EnableIT_JQOVF(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6913	{
elmot	1:d0dfbce63a89	6914	SET_BIT(ADCx->IER, LL_ADC_IT_JQOVF);
elmot	1:d0dfbce63a89	6915	}
elmot	1:d0dfbce63a89	6916
elmot	1:d0dfbce63a89	6917	/**
elmot	1:d0dfbce63a89	6918	* @brief Enable interruption ADC analog watchdog 1.
elmot	1:d0dfbce63a89	6919	* @rmtoll IER AWD1IE LL_ADC_EnableIT_AWD1
elmot	1:d0dfbce63a89	6920	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6921	* @retval None
elmot	1:d0dfbce63a89	6922	*/
elmot	1:d0dfbce63a89	6923	__STATIC_INLINE void LL_ADC_EnableIT_AWD1(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6924	{
elmot	1:d0dfbce63a89	6925	SET_BIT(ADCx->IER, LL_ADC_IT_AWD1);
elmot	1:d0dfbce63a89	6926	}
elmot	1:d0dfbce63a89	6927
elmot	1:d0dfbce63a89	6928	/**
elmot	1:d0dfbce63a89	6929	* @brief Enable interruption ADC analog watchdog 2.
elmot	1:d0dfbce63a89	6930	* @rmtoll IER AWD2IE LL_ADC_EnableIT_AWD2
elmot	1:d0dfbce63a89	6931	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6932	* @retval None
elmot	1:d0dfbce63a89	6933	*/
elmot	1:d0dfbce63a89	6934	__STATIC_INLINE void LL_ADC_EnableIT_AWD2(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6935	{
elmot	1:d0dfbce63a89	6936	SET_BIT(ADCx->IER, LL_ADC_IT_AWD2);
elmot	1:d0dfbce63a89	6937	}
elmot	1:d0dfbce63a89	6938
elmot	1:d0dfbce63a89	6939	/**
elmot	1:d0dfbce63a89	6940	* @brief Enable interruption ADC analog watchdog 3.
elmot	1:d0dfbce63a89	6941	* @rmtoll IER AWD3IE LL_ADC_EnableIT_AWD3
elmot	1:d0dfbce63a89	6942	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6943	* @retval None
elmot	1:d0dfbce63a89	6944	*/
elmot	1:d0dfbce63a89	6945	__STATIC_INLINE void LL_ADC_EnableIT_AWD3(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6946	{
elmot	1:d0dfbce63a89	6947	SET_BIT(ADCx->IER, LL_ADC_IT_AWD3);
elmot	1:d0dfbce63a89	6948	}
elmot	1:d0dfbce63a89	6949
elmot	1:d0dfbce63a89	6950	/**
elmot	1:d0dfbce63a89	6951	* @brief Disable interruption ADC ready.
elmot	1:d0dfbce63a89	6952	* @rmtoll IER ADRDYIE LL_ADC_DisableIT_ADRDY
elmot	1:d0dfbce63a89	6953	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6954	* @retval None
elmot	1:d0dfbce63a89	6955	*/
elmot	1:d0dfbce63a89	6956	__STATIC_INLINE void LL_ADC_DisableIT_ADRDY(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6957	{
elmot	1:d0dfbce63a89	6958	CLEAR_BIT(ADCx->IER, LL_ADC_IT_ADRDY);
elmot	1:d0dfbce63a89	6959	}
elmot	1:d0dfbce63a89	6960
elmot	1:d0dfbce63a89	6961	/**
elmot	1:d0dfbce63a89	6962	* @brief Disable interruption ADC group regular end of unitary conversion.
elmot	1:d0dfbce63a89	6963	* @rmtoll IER EOCIE LL_ADC_DisableIT_EOC
elmot	1:d0dfbce63a89	6964	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6965	* @retval None
elmot	1:d0dfbce63a89	6966	*/
elmot	1:d0dfbce63a89	6967	__STATIC_INLINE void LL_ADC_DisableIT_EOC(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6968	{
elmot	1:d0dfbce63a89	6969	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOC);
elmot	1:d0dfbce63a89	6970	}
elmot	1:d0dfbce63a89	6971
elmot	1:d0dfbce63a89	6972	/**
elmot	1:d0dfbce63a89	6973	* @brief Disable interruption ADC group regular end of sequence conversions.
elmot	1:d0dfbce63a89	6974	* @rmtoll IER EOSIE LL_ADC_DisableIT_EOS
elmot	1:d0dfbce63a89	6975	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6976	* @retval None
elmot	1:d0dfbce63a89	6977	*/
elmot	1:d0dfbce63a89	6978	__STATIC_INLINE void LL_ADC_DisableIT_EOS(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6979	{
elmot	1:d0dfbce63a89	6980	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOS);
elmot	1:d0dfbce63a89	6981	}
elmot	1:d0dfbce63a89	6982
elmot	1:d0dfbce63a89	6983	/**
elmot	1:d0dfbce63a89	6984	* @brief Disable interruption ADC group regular overrun.
elmot	1:d0dfbce63a89	6985	* @rmtoll IER OVRIE LL_ADC_DisableIT_OVR
elmot	1:d0dfbce63a89	6986	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6987	* @retval None
elmot	1:d0dfbce63a89	6988	*/
elmot	1:d0dfbce63a89	6989	__STATIC_INLINE void LL_ADC_DisableIT_OVR(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	6990	{
elmot	1:d0dfbce63a89	6991	CLEAR_BIT(ADCx->IER, LL_ADC_IT_OVR);
elmot	1:d0dfbce63a89	6992	}
elmot	1:d0dfbce63a89	6993
elmot	1:d0dfbce63a89	6994	/**
elmot	1:d0dfbce63a89	6995	* @brief Disable interruption ADC group regular end of sampling.
elmot	1:d0dfbce63a89	6996	* @rmtoll IER EOSMPIE LL_ADC_DisableIT_EOSMP
elmot	1:d0dfbce63a89	6997	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	6998	* @retval None
elmot	1:d0dfbce63a89	6999	*/
elmot	1:d0dfbce63a89	7000	__STATIC_INLINE void LL_ADC_DisableIT_EOSMP(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7001	{
elmot	1:d0dfbce63a89	7002	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOSMP);
elmot	1:d0dfbce63a89	7003	}
elmot	1:d0dfbce63a89	7004
elmot	1:d0dfbce63a89	7005	/**
elmot	1:d0dfbce63a89	7006	* @brief Disable interruption ADC group regular end of unitary conversion.
elmot	1:d0dfbce63a89	7007	* @rmtoll IER JEOCIE LL_ADC_DisableIT_JEOC
elmot	1:d0dfbce63a89	7008	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7009	* @retval None
elmot	1:d0dfbce63a89	7010	*/
elmot	1:d0dfbce63a89	7011	__STATIC_INLINE void LL_ADC_DisableIT_JEOC(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7012	{
elmot	1:d0dfbce63a89	7013	CLEAR_BIT(ADCx->IER, LL_ADC_IT_JEOC);
elmot	1:d0dfbce63a89	7014	}
elmot	1:d0dfbce63a89	7015
elmot	1:d0dfbce63a89	7016	/**
elmot	1:d0dfbce63a89	7017	* @brief Disable interruption ADC group injected end of sequence conversions.
elmot	1:d0dfbce63a89	7018	* @rmtoll IER JEOSIE LL_ADC_DisableIT_JEOS
elmot	1:d0dfbce63a89	7019	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7020	* @retval None
elmot	1:d0dfbce63a89	7021	*/
elmot	1:d0dfbce63a89	7022	__STATIC_INLINE void LL_ADC_DisableIT_JEOS(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7023	{
elmot	1:d0dfbce63a89	7024	CLEAR_BIT(ADCx->IER, LL_ADC_IT_JEOS);
elmot	1:d0dfbce63a89	7025	}
elmot	1:d0dfbce63a89	7026
elmot	1:d0dfbce63a89	7027	/**
elmot	1:d0dfbce63a89	7028	* @brief Disable interruption ADC group injected context queue overflow.
elmot	1:d0dfbce63a89	7029	* @rmtoll IER JQOVFIE LL_ADC_DisableIT_JQOVF
elmot	1:d0dfbce63a89	7030	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7031	* @retval None
elmot	1:d0dfbce63a89	7032	*/
elmot	1:d0dfbce63a89	7033	__STATIC_INLINE void LL_ADC_DisableIT_JQOVF(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7034	{
elmot	1:d0dfbce63a89	7035	CLEAR_BIT(ADCx->IER, LL_ADC_IT_JQOVF);
elmot	1:d0dfbce63a89	7036	}
elmot	1:d0dfbce63a89	7037
elmot	1:d0dfbce63a89	7038	/**
elmot	1:d0dfbce63a89	7039	* @brief Disable interruption ADC analog watchdog 1.
elmot	1:d0dfbce63a89	7040	* @rmtoll IER AWD1IE LL_ADC_DisableIT_AWD1
elmot	1:d0dfbce63a89	7041	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7042	* @retval None
elmot	1:d0dfbce63a89	7043	*/
elmot	1:d0dfbce63a89	7044	__STATIC_INLINE void LL_ADC_DisableIT_AWD1(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7045	{
elmot	1:d0dfbce63a89	7046	CLEAR_BIT(ADCx->IER, LL_ADC_IT_AWD1);
elmot	1:d0dfbce63a89	7047	}
elmot	1:d0dfbce63a89	7048
elmot	1:d0dfbce63a89	7049	/**
elmot	1:d0dfbce63a89	7050	* @brief Disable interruption ADC analog watchdog 2.
elmot	1:d0dfbce63a89	7051	* @rmtoll IER AWD2IE LL_ADC_DisableIT_AWD2
elmot	1:d0dfbce63a89	7052	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7053	* @retval None
elmot	1:d0dfbce63a89	7054	*/
elmot	1:d0dfbce63a89	7055	__STATIC_INLINE void LL_ADC_DisableIT_AWD2(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7056	{
elmot	1:d0dfbce63a89	7057	CLEAR_BIT(ADCx->IER, LL_ADC_IT_AWD2);
elmot	1:d0dfbce63a89	7058	}
elmot	1:d0dfbce63a89	7059
elmot	1:d0dfbce63a89	7060	/**
elmot	1:d0dfbce63a89	7061	* @brief Disable interruption ADC analog watchdog 3.
elmot	1:d0dfbce63a89	7062	* @rmtoll IER AWD3IE LL_ADC_DisableIT_AWD3
elmot	1:d0dfbce63a89	7063	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7064	* @retval None
elmot	1:d0dfbce63a89	7065	*/
elmot	1:d0dfbce63a89	7066	__STATIC_INLINE void LL_ADC_DisableIT_AWD3(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7067	{
elmot	1:d0dfbce63a89	7068	CLEAR_BIT(ADCx->IER, LL_ADC_IT_AWD3);
elmot	1:d0dfbce63a89	7069	}
elmot	1:d0dfbce63a89	7070
elmot	1:d0dfbce63a89	7071	/**
elmot	1:d0dfbce63a89	7072	* @brief Get state of interruption ADC ready
elmot	1:d0dfbce63a89	7073	* (0: interrupt disabled, 1: interrupt enabled).
elmot	1:d0dfbce63a89	7074	* @rmtoll IER ADRDYIE LL_ADC_IsEnabledIT_ADRDY
elmot	1:d0dfbce63a89	7075	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7076	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	7077	*/
elmot	1:d0dfbce63a89	7078	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_ADRDY(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7079	{
elmot	1:d0dfbce63a89	7080	return (READ_BIT(ADCx->IER, LL_ADC_IT_ADRDY) == (LL_ADC_IT_ADRDY));
elmot	1:d0dfbce63a89	7081	}
elmot	1:d0dfbce63a89	7082
elmot	1:d0dfbce63a89	7083	/**
elmot	1:d0dfbce63a89	7084	* @brief Get state of interruption ADC group regular end of unitary conversion
elmot	1:d0dfbce63a89	7085	* (0: interrupt disabled, 1: interrupt enabled).
elmot	1:d0dfbce63a89	7086	* @rmtoll IER EOCIE LL_ADC_IsEnabledIT_EOC
elmot	1:d0dfbce63a89	7087	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7088	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	7089	*/
elmot	1:d0dfbce63a89	7090	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOC(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7091	{
elmot	1:d0dfbce63a89	7092	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOC) == (LL_ADC_IT_EOC));
elmot	1:d0dfbce63a89	7093	}
elmot	1:d0dfbce63a89	7094
elmot	1:d0dfbce63a89	7095	/**
elmot	1:d0dfbce63a89	7096	* @brief Get state of interruption ADC group regular end of sequence conversions
elmot	1:d0dfbce63a89	7097	* (0: interrupt disabled, 1: interrupt enabled).
elmot	1:d0dfbce63a89	7098	* @rmtoll IER EOSIE LL_ADC_IsEnabledIT_EOS
elmot	1:d0dfbce63a89	7099	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7100	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	7101	*/
elmot	1:d0dfbce63a89	7102	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOS(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7103	{
elmot	1:d0dfbce63a89	7104	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOS) == (LL_ADC_IT_EOS));
elmot	1:d0dfbce63a89	7105	}
elmot	1:d0dfbce63a89	7106
elmot	1:d0dfbce63a89	7107	/**
elmot	1:d0dfbce63a89	7108	* @brief Get state of interruption ADC group regular overrun
elmot	1:d0dfbce63a89	7109	* (0: interrupt disabled, 1: interrupt enabled).
elmot	1:d0dfbce63a89	7110	* @rmtoll IER OVRIE LL_ADC_IsEnabledIT_OVR
elmot	1:d0dfbce63a89	7111	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7112	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	7113	*/
elmot	1:d0dfbce63a89	7114	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_OVR(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7115	{
elmot	1:d0dfbce63a89	7116	return (READ_BIT(ADCx->IER, LL_ADC_IT_OVR) == (LL_ADC_IT_OVR));
elmot	1:d0dfbce63a89	7117	}
elmot	1:d0dfbce63a89	7118
elmot	1:d0dfbce63a89	7119	/**
elmot	1:d0dfbce63a89	7120	* @brief Get state of interruption ADC group regular end of sampling
elmot	1:d0dfbce63a89	7121	* (0: interrupt disabled, 1: interrupt enabled).
elmot	1:d0dfbce63a89	7122	* @rmtoll IER EOSMPIE LL_ADC_IsEnabledIT_EOSMP
elmot	1:d0dfbce63a89	7123	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7124	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	7125	*/
elmot	1:d0dfbce63a89	7126	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOSMP(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7127	{
elmot	1:d0dfbce63a89	7128	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOSMP) == (LL_ADC_IT_EOSMP));
elmot	1:d0dfbce63a89	7129	}
elmot	1:d0dfbce63a89	7130
elmot	1:d0dfbce63a89	7131	/**
elmot	1:d0dfbce63a89	7132	* @brief Get state of interruption ADC group injected end of unitary conversion
elmot	1:d0dfbce63a89	7133	* (0: interrupt disabled, 1: interrupt enabled).
elmot	1:d0dfbce63a89	7134	* @rmtoll IER JEOCIE LL_ADC_IsEnabledIT_JEOC
elmot	1:d0dfbce63a89	7135	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7136	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	7137	*/
elmot	1:d0dfbce63a89	7138	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_JEOC(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7139	{
elmot	1:d0dfbce63a89	7140	return (READ_BIT(ADCx->IER, LL_ADC_IT_JEOC) == (LL_ADC_IT_JEOC));
elmot	1:d0dfbce63a89	7141	}
elmot	1:d0dfbce63a89	7142
elmot	1:d0dfbce63a89	7143	/**
elmot	1:d0dfbce63a89	7144	* @brief Get state of interruption ADC group injected end of sequence conversions
elmot	1:d0dfbce63a89	7145	* (0: interrupt disabled, 1: interrupt enabled).
elmot	1:d0dfbce63a89	7146	* @rmtoll IER JEOSIE LL_ADC_IsEnabledIT_JEOS
elmot	1:d0dfbce63a89	7147	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7148	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	7149	*/
elmot	1:d0dfbce63a89	7150	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_JEOS(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7151	{
elmot	1:d0dfbce63a89	7152	return (READ_BIT(ADCx->IER, LL_ADC_IT_JEOS) == (LL_ADC_IT_JEOS));
elmot	1:d0dfbce63a89	7153	}
elmot	1:d0dfbce63a89	7154
elmot	1:d0dfbce63a89	7155	/**
elmot	1:d0dfbce63a89	7156	* @brief Get state of interruption ADC group injected context queue overflow interrupt state
elmot	1:d0dfbce63a89	7157	* (0: interrupt disabled, 1: interrupt enabled).
elmot	1:d0dfbce63a89	7158	* @rmtoll IER JQOVFIE LL_ADC_IsEnabledIT_JQOVF
elmot	1:d0dfbce63a89	7159	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7160	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	7161	*/
elmot	1:d0dfbce63a89	7162	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_JQOVF(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7163	{
elmot	1:d0dfbce63a89	7164	return (READ_BIT(ADCx->IER, LL_ADC_IT_JQOVF) == (LL_ADC_IT_JQOVF));
elmot	1:d0dfbce63a89	7165	}
elmot	1:d0dfbce63a89	7166
elmot	1:d0dfbce63a89	7167	/**
elmot	1:d0dfbce63a89	7168	* @brief Get state of interruption ADC analog watchdog 1
elmot	1:d0dfbce63a89	7169	* (0: interrupt disabled, 1: interrupt enabled).
elmot	1:d0dfbce63a89	7170	* @rmtoll IER AWD1IE LL_ADC_IsEnabledIT_AWD1
elmot	1:d0dfbce63a89	7171	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7172	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	7173	*/
elmot	1:d0dfbce63a89	7174	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_AWD1(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7175	{
elmot	1:d0dfbce63a89	7176	return (READ_BIT(ADCx->IER, LL_ADC_IT_AWD1) == (LL_ADC_IT_AWD1));
elmot	1:d0dfbce63a89	7177	}
elmot	1:d0dfbce63a89	7178
elmot	1:d0dfbce63a89	7179	/**
elmot	1:d0dfbce63a89	7180	* @brief Get state of interruption Get ADC analog watchdog 2
elmot	1:d0dfbce63a89	7181	* (0: interrupt disabled, 1: interrupt enabled).
elmot	1:d0dfbce63a89	7182	* @rmtoll IER AWD2IE LL_ADC_IsEnabledIT_AWD2
elmot	1:d0dfbce63a89	7183	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7184	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	7185	*/
elmot	1:d0dfbce63a89	7186	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_AWD2(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7187	{
elmot	1:d0dfbce63a89	7188	return (READ_BIT(ADCx->IER, LL_ADC_IT_AWD2) == (LL_ADC_IT_AWD2));
elmot	1:d0dfbce63a89	7189	}
elmot	1:d0dfbce63a89	7190
elmot	1:d0dfbce63a89	7191	/**
elmot	1:d0dfbce63a89	7192	* @brief Get state of interruption Get ADC analog watchdog 3
elmot	1:d0dfbce63a89	7193	* (0: interrupt disabled, 1: interrupt enabled).
elmot	1:d0dfbce63a89	7194	* @rmtoll IER AWD3IE LL_ADC_IsEnabledIT_AWD3
elmot	1:d0dfbce63a89	7195	* @param ADCx ADC instance
elmot	1:d0dfbce63a89	7196	* @retval State of bit (1 or 0).
elmot	1:d0dfbce63a89	7197	*/
elmot	1:d0dfbce63a89	7198	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_AWD3(ADC_TypeDef *ADCx)
elmot	1:d0dfbce63a89	7199	{
elmot	1:d0dfbce63a89	7200	return (READ_BIT(ADCx->IER, LL_ADC_IT_AWD3) == (LL_ADC_IT_AWD3));
elmot	1:d0dfbce63a89	7201	}
elmot	1:d0dfbce63a89	7202
elmot	1:d0dfbce63a89	7203	/**
elmot	1:d0dfbce63a89	7204	* @}
elmot	1:d0dfbce63a89	7205	*/
elmot	1:d0dfbce63a89	7206
elmot	1:d0dfbce63a89	7207	#if defined(USE_FULL_LL_DRIVER)
elmot	1:d0dfbce63a89	7208	/** @defgroup ADC_LL_EF_Init Initialization and de-initialization functions
elmot	1:d0dfbce63a89	7209	* @{
elmot	1:d0dfbce63a89	7210	*/
elmot	1:d0dfbce63a89	7211
elmot	1:d0dfbce63a89	7212	/* Initialization of some features of ADC common parameters and multimode */
elmot	1:d0dfbce63a89	7213	ErrorStatus LL_ADC_CommonDeInit(ADC_Common_TypeDef *ADCxy_COMMON);
elmot	1:d0dfbce63a89	7214	ErrorStatus LL_ADC_CommonInit(ADC_Common_TypeDef ADCxy_COMMON, LL_ADC_CommonInitTypeDef ADC_CommonInitStruct);
elmot	1:d0dfbce63a89	7215	void LL_ADC_CommonStructInit(LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct);
elmot	1:d0dfbce63a89	7216
elmot	1:d0dfbce63a89	7217	/* De-initialization of ADC instance, ADC group regular and ADC group injected */
elmot	1:d0dfbce63a89	7218	/* (availability of ADC group injected depends on STM32 families) */
elmot	1:d0dfbce63a89	7219	ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx);
elmot	1:d0dfbce63a89	7220
elmot	1:d0dfbce63a89	7221	/* Initialization of some features of ADC instance */
elmot	1:d0dfbce63a89	7222	ErrorStatus LL_ADC_Init(ADC_TypeDef ADCx, LL_ADC_InitTypeDef ADC_InitStruct);
elmot	1:d0dfbce63a89	7223	void LL_ADC_StructInit(LL_ADC_InitTypeDef *ADC_InitStruct);
elmot	1:d0dfbce63a89	7224
elmot	1:d0dfbce63a89	7225	/* Initialization of some features of ADC instance and ADC group regular */
elmot	1:d0dfbce63a89	7226	ErrorStatus LL_ADC_REG_Init(ADC_TypeDef ADCx, LL_ADC_REG_InitTypeDef ADC_REG_InitStruct);
elmot	1:d0dfbce63a89	7227	void LL_ADC_REG_StructInit(LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct);
elmot	1:d0dfbce63a89	7228
elmot	1:d0dfbce63a89	7229	/* Initialization of some features of ADC instance and ADC group injected */
elmot	1:d0dfbce63a89	7230	ErrorStatus LL_ADC_INJ_Init(ADC_TypeDef ADCx, LL_ADC_INJ_InitTypeDef ADC_INJ_InitStruct);
elmot	1:d0dfbce63a89	7231	void LL_ADC_INJ_StructInit(LL_ADC_INJ_InitTypeDef *ADC_INJ_InitStruct);
elmot	1:d0dfbce63a89	7232
elmot	1:d0dfbce63a89	7233	/**
elmot	1:d0dfbce63a89	7234	* @}
elmot	1:d0dfbce63a89	7235	*/
elmot	1:d0dfbce63a89	7236	#endif /* USE_FULL_LL_DRIVER */
elmot	1:d0dfbce63a89	7237
elmot	1:d0dfbce63a89	7238	/**
elmot	1:d0dfbce63a89	7239	* @}
elmot	1:d0dfbce63a89	7240	*/
elmot	1:d0dfbce63a89	7241
elmot	1:d0dfbce63a89	7242	/**
elmot	1:d0dfbce63a89	7243	* @}
elmot	1:d0dfbce63a89	7244	*/
elmot	1:d0dfbce63a89	7245
elmot	1:d0dfbce63a89	7246	#endif /* ADC1 \|\| ADC2 \|\| ADC3 */
elmot	1:d0dfbce63a89	7247
elmot	1:d0dfbce63a89	7248	/**
elmot	1:d0dfbce63a89	7249	* @}
elmot	1:d0dfbce63a89	7250	*/
elmot	1:d0dfbce63a89	7251
elmot	1:d0dfbce63a89	7252	#ifdef __cplusplus
elmot	1:d0dfbce63a89	7253	}
elmot	1:d0dfbce63a89	7254	#endif
elmot	1:d0dfbce63a89	7255
elmot	1:d0dfbce63a89	7256	#endif /* __STM32L4xx_LL_ADC_H */
elmot	1:d0dfbce63a89	7257
elmot	1:d0dfbce63a89	7258	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Program
Created:	25 Feb 2017
Imports:	20
Forks:	1
Commits:	3
Dependents:	0
Dependencies:	0
Followers:	10

The code in this repository is Apache licensed.

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HAL_L476/stm32l4xx_ll_adc.h@1:d0dfbce63a89, 2017-02-24 (annotated)

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HAL_L476/stm32l4xx_ll_adc.h@1:d0dfbce63a89, 2017-02-24 (annotated)

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