TUKS MCU Introductory course / TUKS-COURSE-TIMER
Committer:
elmot
Date:
Fri Feb 24 21:13:56 2017 +0000
Revision:
1:d0dfbce63a89
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elmot 1:d0dfbce63a89 1 /**
elmot 1:d0dfbce63a89 2 ******************************************************************************
elmot 1:d0dfbce63a89 3 * @file stm32l4xx_hal_tim_ex.c
elmot 1:d0dfbce63a89 4 * @author MCD Application Team
elmot 1:d0dfbce63a89 5 * @version V1.5.1
elmot 1:d0dfbce63a89 6 * @date 31-May-2016
elmot 1:d0dfbce63a89 7 * @brief TIM HAL module driver.
elmot 1:d0dfbce63a89 8 * This file provides firmware functions to manage the following
elmot 1:d0dfbce63a89 9 * functionalities of the Timer Extended peripheral:
elmot 1:d0dfbce63a89 10 * + Time Hall Sensor Interface Initialization
elmot 1:d0dfbce63a89 11 * + Time Hall Sensor Interface Start
elmot 1:d0dfbce63a89 12 * + Time Complementary signal break and dead time configuration
elmot 1:d0dfbce63a89 13 * + Time Master and Slave synchronization configuration
elmot 1:d0dfbce63a89 14 * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6)
elmot 1:d0dfbce63a89 15 * + Time OCRef clear configuration
elmot 1:d0dfbce63a89 16 * + Timer remapping capabilities configuration
elmot 1:d0dfbce63a89 17 @verbatim
elmot 1:d0dfbce63a89 18 ==============================================================================
elmot 1:d0dfbce63a89 19 ##### TIMER Extended features #####
elmot 1:d0dfbce63a89 20 ==============================================================================
elmot 1:d0dfbce63a89 21 [..]
elmot 1:d0dfbce63a89 22 The Timer Extended features include:
elmot 1:d0dfbce63a89 23 (#) Complementary outputs with programmable dead-time for :
elmot 1:d0dfbce63a89 24 (++) Output Compare
elmot 1:d0dfbce63a89 25 (++) PWM generation (Edge and Center-aligned Mode)
elmot 1:d0dfbce63a89 26 (++) One-pulse mode output
elmot 1:d0dfbce63a89 27 (#) Synchronization circuit to control the timer with external signals and to
elmot 1:d0dfbce63a89 28 interconnect several timers together.
elmot 1:d0dfbce63a89 29 (#) Break input to put the timer output signals in reset state or in a known state.
elmot 1:d0dfbce63a89 30 (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
elmot 1:d0dfbce63a89 31 positioning purposes
elmot 1:d0dfbce63a89 32
elmot 1:d0dfbce63a89 33 ##### How to use this driver #####
elmot 1:d0dfbce63a89 34 ==============================================================================
elmot 1:d0dfbce63a89 35 [..]
elmot 1:d0dfbce63a89 36 (#) Initialize the TIM low level resources by implementing the following functions
elmot 1:d0dfbce63a89 37 depending on the selected feature:
elmot 1:d0dfbce63a89 38 (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
elmot 1:d0dfbce63a89 39
elmot 1:d0dfbce63a89 40 (#) Initialize the TIM low level resources :
elmot 1:d0dfbce63a89 41 (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
elmot 1:d0dfbce63a89 42 (##) TIM pins configuration
elmot 1:d0dfbce63a89 43 (+++) Enable the clock for the TIM GPIOs using the following function:
elmot 1:d0dfbce63a89 44 __HAL_RCC_GPIOx_CLK_ENABLE();
elmot 1:d0dfbce63a89 45 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
elmot 1:d0dfbce63a89 46
elmot 1:d0dfbce63a89 47 (#) The external Clock can be configured, if needed (the default clock is the
elmot 1:d0dfbce63a89 48 internal clock from the APBx), using the following function:
elmot 1:d0dfbce63a89 49 HAL_TIM_ConfigClockSource, the clock configuration should be done before
elmot 1:d0dfbce63a89 50 any start function.
elmot 1:d0dfbce63a89 51
elmot 1:d0dfbce63a89 52 (#) Configure the TIM in the desired functioning mode using one of the
elmot 1:d0dfbce63a89 53 initialization function of this driver:
elmot 1:d0dfbce63a89 54 (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutationEvent(): to use the
elmot 1:d0dfbce63a89 55 Timer Hall Sensor Interface and the commutation event with the corresponding
elmot 1:d0dfbce63a89 56 Interrupt and DMA request if needed (Note that One Timer is used to interface
elmot 1:d0dfbce63a89 57 with the Hall sensor Interface and another Timer should be used to use
elmot 1:d0dfbce63a89 58 the commutation event).
elmot 1:d0dfbce63a89 59
elmot 1:d0dfbce63a89 60 (#) Activate the TIM peripheral using one of the start functions:
elmot 1:d0dfbce63a89 61 (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT()
elmot 1:d0dfbce63a89 62 (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
elmot 1:d0dfbce63a89 63 (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
elmot 1:d0dfbce63a89 64 (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
elmot 1:d0dfbce63a89 65
elmot 1:d0dfbce63a89 66
elmot 1:d0dfbce63a89 67 @endverbatim
elmot 1:d0dfbce63a89 68 ******************************************************************************
elmot 1:d0dfbce63a89 69 * @attention
elmot 1:d0dfbce63a89 70 *
elmot 1:d0dfbce63a89 71 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot 1:d0dfbce63a89 72 *
elmot 1:d0dfbce63a89 73 * Redistribution and use in source and binary forms, with or without modification,
elmot 1:d0dfbce63a89 74 * are permitted provided that the following conditions are met:
elmot 1:d0dfbce63a89 75 * 1. Redistributions of source code must retain the above copyright notice,
elmot 1:d0dfbce63a89 76 * this list of conditions and the following disclaimer.
elmot 1:d0dfbce63a89 77 * 2. Redistributions in binary form must reproduce the above copyright notice,
elmot 1:d0dfbce63a89 78 * this list of conditions and the following disclaimer in the documentation
elmot 1:d0dfbce63a89 79 * and/or other materials provided with the distribution.
elmot 1:d0dfbce63a89 80 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot 1:d0dfbce63a89 81 * may be used to endorse or promote products derived from this software
elmot 1:d0dfbce63a89 82 * without specific prior written permission.
elmot 1:d0dfbce63a89 83 *
elmot 1:d0dfbce63a89 84 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot 1:d0dfbce63a89 85 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot 1:d0dfbce63a89 86 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot 1:d0dfbce63a89 87 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot 1:d0dfbce63a89 88 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot 1:d0dfbce63a89 89 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot 1:d0dfbce63a89 90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot 1:d0dfbce63a89 91 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot 1:d0dfbce63a89 92 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot 1:d0dfbce63a89 93 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot 1:d0dfbce63a89 94 *
elmot 1:d0dfbce63a89 95 ******************************************************************************
elmot 1:d0dfbce63a89 96 */
elmot 1:d0dfbce63a89 97
elmot 1:d0dfbce63a89 98 /* Includes ------------------------------------------------------------------*/
elmot 1:d0dfbce63a89 99 #include "stm32l4xx_hal.h"
elmot 1:d0dfbce63a89 100
elmot 1:d0dfbce63a89 101 /** @addtogroup STM32L4xx_HAL_Driver
elmot 1:d0dfbce63a89 102 * @{
elmot 1:d0dfbce63a89 103 */
elmot 1:d0dfbce63a89 104
elmot 1:d0dfbce63a89 105 /** @defgroup TIMEx TIMEx
elmot 1:d0dfbce63a89 106 * @brief TIM Extended HAL module driver
elmot 1:d0dfbce63a89 107 * @{
elmot 1:d0dfbce63a89 108 */
elmot 1:d0dfbce63a89 109
elmot 1:d0dfbce63a89 110 #ifdef HAL_TIM_MODULE_ENABLED
elmot 1:d0dfbce63a89 111
elmot 1:d0dfbce63a89 112 /* Private typedef -----------------------------------------------------------*/
elmot 1:d0dfbce63a89 113 /* Private define ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 114 #define BDTR_BKF_SHIFT (16)
elmot 1:d0dfbce63a89 115 #define BDTR_BK2F_SHIFT (20)
elmot 1:d0dfbce63a89 116 #define TIMx_ETRSEL_MASK ((uint32_t)0x0001C000)
elmot 1:d0dfbce63a89 117
elmot 1:d0dfbce63a89 118 /* Private macro -------------------------------------------------------------*/
elmot 1:d0dfbce63a89 119 /* Private variables ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 120 /* Private function prototypes -----------------------------------------------*/
elmot 1:d0dfbce63a89 121 static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState);
elmot 1:d0dfbce63a89 122
elmot 1:d0dfbce63a89 123 /* Private functions ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 124
elmot 1:d0dfbce63a89 125 /* Exported functions --------------------------------------------------------*/
elmot 1:d0dfbce63a89 126 /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
elmot 1:d0dfbce63a89 127 * @{
elmot 1:d0dfbce63a89 128 */
elmot 1:d0dfbce63a89 129
elmot 1:d0dfbce63a89 130 /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
elmot 1:d0dfbce63a89 131 * @brief Timer Hall Sensor functions
elmot 1:d0dfbce63a89 132 *
elmot 1:d0dfbce63a89 133 @verbatim
elmot 1:d0dfbce63a89 134 ==============================================================================
elmot 1:d0dfbce63a89 135 ##### Timer Hall Sensor functions #####
elmot 1:d0dfbce63a89 136 ==============================================================================
elmot 1:d0dfbce63a89 137 [..]
elmot 1:d0dfbce63a89 138 This section provides functions allowing to:
elmot 1:d0dfbce63a89 139 (+) Initialize and configure TIM HAL Sensor.
elmot 1:d0dfbce63a89 140 (+) De-initialize TIM HAL Sensor.
elmot 1:d0dfbce63a89 141 (+) Start the Hall Sensor Interface.
elmot 1:d0dfbce63a89 142 (+) Stop the Hall Sensor Interface.
elmot 1:d0dfbce63a89 143 (+) Start the Hall Sensor Interface and enable interrupts.
elmot 1:d0dfbce63a89 144 (+) Stop the Hall Sensor Interface and disable interrupts.
elmot 1:d0dfbce63a89 145 (+) Start the Hall Sensor Interface and enable DMA transfers.
elmot 1:d0dfbce63a89 146 (+) Stop the Hall Sensor Interface and disable DMA transfers.
elmot 1:d0dfbce63a89 147
elmot 1:d0dfbce63a89 148 @endverbatim
elmot 1:d0dfbce63a89 149 * @{
elmot 1:d0dfbce63a89 150 */
elmot 1:d0dfbce63a89 151 /**
elmot 1:d0dfbce63a89 152 * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
elmot 1:d0dfbce63a89 153 * @param htim: TIM Encoder Interface handle
elmot 1:d0dfbce63a89 154 * @param sConfig: TIM Hall Sensor configuration structure
elmot 1:d0dfbce63a89 155 * @retval HAL status
elmot 1:d0dfbce63a89 156 */
elmot 1:d0dfbce63a89 157 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig)
elmot 1:d0dfbce63a89 158 {
elmot 1:d0dfbce63a89 159 TIM_OC_InitTypeDef OC_Config;
elmot 1:d0dfbce63a89 160
elmot 1:d0dfbce63a89 161 /* Check the TIM handle allocation */
elmot 1:d0dfbce63a89 162 if(htim == NULL)
elmot 1:d0dfbce63a89 163 {
elmot 1:d0dfbce63a89 164 return HAL_ERROR;
elmot 1:d0dfbce63a89 165 }
elmot 1:d0dfbce63a89 166
elmot 1:d0dfbce63a89 167 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 168 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
elmot 1:d0dfbce63a89 169 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
elmot 1:d0dfbce63a89 170 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
elmot 1:d0dfbce63a89 171 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
elmot 1:d0dfbce63a89 172 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
elmot 1:d0dfbce63a89 173
elmot 1:d0dfbce63a89 174 if(htim->State == HAL_TIM_STATE_RESET)
elmot 1:d0dfbce63a89 175 {
elmot 1:d0dfbce63a89 176 /* Allocate lock resource and initialize it */
elmot 1:d0dfbce63a89 177 htim->Lock = HAL_UNLOCKED;
elmot 1:d0dfbce63a89 178
elmot 1:d0dfbce63a89 179 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
elmot 1:d0dfbce63a89 180 HAL_TIMEx_HallSensor_MspInit(htim);
elmot 1:d0dfbce63a89 181 }
elmot 1:d0dfbce63a89 182
elmot 1:d0dfbce63a89 183 /* Set the TIM state */
elmot 1:d0dfbce63a89 184 htim->State = HAL_TIM_STATE_BUSY;
elmot 1:d0dfbce63a89 185
elmot 1:d0dfbce63a89 186 /* Configure the Time base in the Encoder Mode */
elmot 1:d0dfbce63a89 187 TIM_Base_SetConfig(htim->Instance, &htim->Init);
elmot 1:d0dfbce63a89 188
elmot 1:d0dfbce63a89 189 /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
elmot 1:d0dfbce63a89 190 TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
elmot 1:d0dfbce63a89 191
elmot 1:d0dfbce63a89 192 /* Reset the IC1PSC Bits */
elmot 1:d0dfbce63a89 193 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
elmot 1:d0dfbce63a89 194 /* Set the IC1PSC value */
elmot 1:d0dfbce63a89 195 htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
elmot 1:d0dfbce63a89 196
elmot 1:d0dfbce63a89 197 /* Enable the Hall sensor interface (XOR function of the three inputs) */
elmot 1:d0dfbce63a89 198 htim->Instance->CR2 |= TIM_CR2_TI1S;
elmot 1:d0dfbce63a89 199
elmot 1:d0dfbce63a89 200 /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
elmot 1:d0dfbce63a89 201 htim->Instance->SMCR &= ~TIM_SMCR_TS;
elmot 1:d0dfbce63a89 202 htim->Instance->SMCR |= TIM_TS_TI1F_ED;
elmot 1:d0dfbce63a89 203
elmot 1:d0dfbce63a89 204 /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
elmot 1:d0dfbce63a89 205 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
elmot 1:d0dfbce63a89 206 htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
elmot 1:d0dfbce63a89 207
elmot 1:d0dfbce63a89 208 /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
elmot 1:d0dfbce63a89 209 OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
elmot 1:d0dfbce63a89 210 OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
elmot 1:d0dfbce63a89 211 OC_Config.OCMode = TIM_OCMODE_PWM2;
elmot 1:d0dfbce63a89 212 OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
elmot 1:d0dfbce63a89 213 OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
elmot 1:d0dfbce63a89 214 OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
elmot 1:d0dfbce63a89 215 OC_Config.Pulse = sConfig->Commutation_Delay;
elmot 1:d0dfbce63a89 216
elmot 1:d0dfbce63a89 217 TIM_OC2_SetConfig(htim->Instance, &OC_Config);
elmot 1:d0dfbce63a89 218
elmot 1:d0dfbce63a89 219 /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
elmot 1:d0dfbce63a89 220 register to 101 */
elmot 1:d0dfbce63a89 221 htim->Instance->CR2 &= ~TIM_CR2_MMS;
elmot 1:d0dfbce63a89 222 htim->Instance->CR2 |= TIM_TRGO_OC2REF;
elmot 1:d0dfbce63a89 223
elmot 1:d0dfbce63a89 224 /* Initialize the TIM state*/
elmot 1:d0dfbce63a89 225 htim->State= HAL_TIM_STATE_READY;
elmot 1:d0dfbce63a89 226
elmot 1:d0dfbce63a89 227 return HAL_OK;
elmot 1:d0dfbce63a89 228 }
elmot 1:d0dfbce63a89 229
elmot 1:d0dfbce63a89 230 /**
elmot 1:d0dfbce63a89 231 * @brief DeInitialize the TIM Hall Sensor interface
elmot 1:d0dfbce63a89 232 * @param htim: TIM Hall Sensor handle
elmot 1:d0dfbce63a89 233 * @retval HAL status
elmot 1:d0dfbce63a89 234 */
elmot 1:d0dfbce63a89 235 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
elmot 1:d0dfbce63a89 236 {
elmot 1:d0dfbce63a89 237 /* Check the parameters */
elmot 1:d0dfbce63a89 238 assert_param(IS_TIM_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 239
elmot 1:d0dfbce63a89 240 htim->State = HAL_TIM_STATE_BUSY;
elmot 1:d0dfbce63a89 241
elmot 1:d0dfbce63a89 242 /* Disable the TIM Peripheral Clock */
elmot 1:d0dfbce63a89 243 __HAL_TIM_DISABLE(htim);
elmot 1:d0dfbce63a89 244
elmot 1:d0dfbce63a89 245 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
elmot 1:d0dfbce63a89 246 HAL_TIMEx_HallSensor_MspDeInit(htim);
elmot 1:d0dfbce63a89 247
elmot 1:d0dfbce63a89 248 /* Change TIM state */
elmot 1:d0dfbce63a89 249 htim->State = HAL_TIM_STATE_RESET;
elmot 1:d0dfbce63a89 250
elmot 1:d0dfbce63a89 251 /* Release Lock */
elmot 1:d0dfbce63a89 252 __HAL_UNLOCK(htim);
elmot 1:d0dfbce63a89 253
elmot 1:d0dfbce63a89 254 return HAL_OK;
elmot 1:d0dfbce63a89 255 }
elmot 1:d0dfbce63a89 256
elmot 1:d0dfbce63a89 257 /**
elmot 1:d0dfbce63a89 258 * @brief Initializes the TIM Hall Sensor MSP.
elmot 1:d0dfbce63a89 259 * @param htim: TIM handle
elmot 1:d0dfbce63a89 260 * @retval None
elmot 1:d0dfbce63a89 261 */
elmot 1:d0dfbce63a89 262 __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
elmot 1:d0dfbce63a89 263 {
elmot 1:d0dfbce63a89 264 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 265 UNUSED(htim);
elmot 1:d0dfbce63a89 266
elmot 1:d0dfbce63a89 267 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 268 the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
elmot 1:d0dfbce63a89 269 */
elmot 1:d0dfbce63a89 270 }
elmot 1:d0dfbce63a89 271
elmot 1:d0dfbce63a89 272 /**
elmot 1:d0dfbce63a89 273 * @brief DeInitialize TIM Hall Sensor MSP.
elmot 1:d0dfbce63a89 274 * @param htim: TIM handle
elmot 1:d0dfbce63a89 275 * @retval None
elmot 1:d0dfbce63a89 276 */
elmot 1:d0dfbce63a89 277 __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
elmot 1:d0dfbce63a89 278 {
elmot 1:d0dfbce63a89 279 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 280 UNUSED(htim);
elmot 1:d0dfbce63a89 281
elmot 1:d0dfbce63a89 282 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 283 the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
elmot 1:d0dfbce63a89 284 */
elmot 1:d0dfbce63a89 285 }
elmot 1:d0dfbce63a89 286
elmot 1:d0dfbce63a89 287 /**
elmot 1:d0dfbce63a89 288 * @brief Starts the TIM Hall Sensor Interface.
elmot 1:d0dfbce63a89 289 * @param htim : TIM Hall Sensor handle
elmot 1:d0dfbce63a89 290 * @retval HAL status
elmot 1:d0dfbce63a89 291 */
elmot 1:d0dfbce63a89 292 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
elmot 1:d0dfbce63a89 293 {
elmot 1:d0dfbce63a89 294 /* Check the parameters */
elmot 1:d0dfbce63a89 295 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 296
elmot 1:d0dfbce63a89 297 /* Enable the Input Capture channels 1
elmot 1:d0dfbce63a89 298 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
elmot 1:d0dfbce63a89 299 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
elmot 1:d0dfbce63a89 300
elmot 1:d0dfbce63a89 301 /* Enable the Peripheral */
elmot 1:d0dfbce63a89 302 __HAL_TIM_ENABLE(htim);
elmot 1:d0dfbce63a89 303
elmot 1:d0dfbce63a89 304 /* Return function status */
elmot 1:d0dfbce63a89 305 return HAL_OK;
elmot 1:d0dfbce63a89 306 }
elmot 1:d0dfbce63a89 307
elmot 1:d0dfbce63a89 308 /**
elmot 1:d0dfbce63a89 309 * @brief Stops the TIM Hall sensor Interface.
elmot 1:d0dfbce63a89 310 * @param htim : TIM Hall Sensor handle
elmot 1:d0dfbce63a89 311 * @retval HAL status
elmot 1:d0dfbce63a89 312 */
elmot 1:d0dfbce63a89 313 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
elmot 1:d0dfbce63a89 314 {
elmot 1:d0dfbce63a89 315 /* Check the parameters */
elmot 1:d0dfbce63a89 316 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 317
elmot 1:d0dfbce63a89 318 /* Disable the Input Capture channels 1, 2 and 3
elmot 1:d0dfbce63a89 319 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
elmot 1:d0dfbce63a89 320 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
elmot 1:d0dfbce63a89 321
elmot 1:d0dfbce63a89 322 /* Disable the Peripheral */
elmot 1:d0dfbce63a89 323 __HAL_TIM_DISABLE(htim);
elmot 1:d0dfbce63a89 324
elmot 1:d0dfbce63a89 325 /* Return function status */
elmot 1:d0dfbce63a89 326 return HAL_OK;
elmot 1:d0dfbce63a89 327 }
elmot 1:d0dfbce63a89 328
elmot 1:d0dfbce63a89 329 /**
elmot 1:d0dfbce63a89 330 * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
elmot 1:d0dfbce63a89 331 * @param htim : TIM Hall Sensor handle
elmot 1:d0dfbce63a89 332 * @retval HAL status
elmot 1:d0dfbce63a89 333 */
elmot 1:d0dfbce63a89 334 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
elmot 1:d0dfbce63a89 335 {
elmot 1:d0dfbce63a89 336 /* Check the parameters */
elmot 1:d0dfbce63a89 337 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 338
elmot 1:d0dfbce63a89 339 /* Enable the capture compare Interrupts 1 event */
elmot 1:d0dfbce63a89 340 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
elmot 1:d0dfbce63a89 341
elmot 1:d0dfbce63a89 342 /* Enable the Input Capture channels 1
elmot 1:d0dfbce63a89 343 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
elmot 1:d0dfbce63a89 344 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
elmot 1:d0dfbce63a89 345
elmot 1:d0dfbce63a89 346 /* Enable the Peripheral */
elmot 1:d0dfbce63a89 347 __HAL_TIM_ENABLE(htim);
elmot 1:d0dfbce63a89 348
elmot 1:d0dfbce63a89 349 /* Return function status */
elmot 1:d0dfbce63a89 350 return HAL_OK;
elmot 1:d0dfbce63a89 351 }
elmot 1:d0dfbce63a89 352
elmot 1:d0dfbce63a89 353 /**
elmot 1:d0dfbce63a89 354 * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
elmot 1:d0dfbce63a89 355 * @param htim : TIM handle
elmot 1:d0dfbce63a89 356 * @retval HAL status
elmot 1:d0dfbce63a89 357 */
elmot 1:d0dfbce63a89 358 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
elmot 1:d0dfbce63a89 359 {
elmot 1:d0dfbce63a89 360 /* Check the parameters */
elmot 1:d0dfbce63a89 361 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 362
elmot 1:d0dfbce63a89 363 /* Disable the Input Capture channels 1
elmot 1:d0dfbce63a89 364 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
elmot 1:d0dfbce63a89 365 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
elmot 1:d0dfbce63a89 366
elmot 1:d0dfbce63a89 367 /* Disable the capture compare Interrupts event */
elmot 1:d0dfbce63a89 368 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
elmot 1:d0dfbce63a89 369
elmot 1:d0dfbce63a89 370 /* Disable the Peripheral */
elmot 1:d0dfbce63a89 371 __HAL_TIM_DISABLE(htim);
elmot 1:d0dfbce63a89 372
elmot 1:d0dfbce63a89 373 /* Return function status */
elmot 1:d0dfbce63a89 374 return HAL_OK;
elmot 1:d0dfbce63a89 375 }
elmot 1:d0dfbce63a89 376
elmot 1:d0dfbce63a89 377 /**
elmot 1:d0dfbce63a89 378 * @brief Starts the TIM Hall Sensor Interface in DMA mode.
elmot 1:d0dfbce63a89 379 * @param htim : TIM Hall Sensor handle
elmot 1:d0dfbce63a89 380 * @param pData: The destination Buffer address.
elmot 1:d0dfbce63a89 381 * @param Length: The length of data to be transferred from TIM peripheral to memory.
elmot 1:d0dfbce63a89 382 * @retval HAL status
elmot 1:d0dfbce63a89 383 */
elmot 1:d0dfbce63a89 384 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
elmot 1:d0dfbce63a89 385 {
elmot 1:d0dfbce63a89 386 /* Check the parameters */
elmot 1:d0dfbce63a89 387 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 388
elmot 1:d0dfbce63a89 389 if((htim->State == HAL_TIM_STATE_BUSY))
elmot 1:d0dfbce63a89 390 {
elmot 1:d0dfbce63a89 391 return HAL_BUSY;
elmot 1:d0dfbce63a89 392 }
elmot 1:d0dfbce63a89 393 else if((htim->State == HAL_TIM_STATE_READY))
elmot 1:d0dfbce63a89 394 {
elmot 1:d0dfbce63a89 395 if(((uint32_t)pData == 0 ) && (Length > 0))
elmot 1:d0dfbce63a89 396 {
elmot 1:d0dfbce63a89 397 return HAL_ERROR;
elmot 1:d0dfbce63a89 398 }
elmot 1:d0dfbce63a89 399 else
elmot 1:d0dfbce63a89 400 {
elmot 1:d0dfbce63a89 401 htim->State = HAL_TIM_STATE_BUSY;
elmot 1:d0dfbce63a89 402 }
elmot 1:d0dfbce63a89 403 }
elmot 1:d0dfbce63a89 404 /* Enable the Input Capture channels 1
elmot 1:d0dfbce63a89 405 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
elmot 1:d0dfbce63a89 406 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
elmot 1:d0dfbce63a89 407
elmot 1:d0dfbce63a89 408 /* Set the DMA Input Capture 1 Callback */
elmot 1:d0dfbce63a89 409 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
elmot 1:d0dfbce63a89 410 /* Set the DMA error callback */
elmot 1:d0dfbce63a89 411 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
elmot 1:d0dfbce63a89 412
elmot 1:d0dfbce63a89 413 /* Enable the DMA channel for Capture 1*/
elmot 1:d0dfbce63a89 414 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
elmot 1:d0dfbce63a89 415
elmot 1:d0dfbce63a89 416 /* Enable the capture compare 1 Interrupt */
elmot 1:d0dfbce63a89 417 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
elmot 1:d0dfbce63a89 418
elmot 1:d0dfbce63a89 419 /* Enable the Peripheral */
elmot 1:d0dfbce63a89 420 __HAL_TIM_ENABLE(htim);
elmot 1:d0dfbce63a89 421
elmot 1:d0dfbce63a89 422 /* Return function status */
elmot 1:d0dfbce63a89 423 return HAL_OK;
elmot 1:d0dfbce63a89 424 }
elmot 1:d0dfbce63a89 425
elmot 1:d0dfbce63a89 426 /**
elmot 1:d0dfbce63a89 427 * @brief Stops the TIM Hall Sensor Interface in DMA mode.
elmot 1:d0dfbce63a89 428 * @param htim : TIM handle
elmot 1:d0dfbce63a89 429 * @retval HAL status
elmot 1:d0dfbce63a89 430 */
elmot 1:d0dfbce63a89 431 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
elmot 1:d0dfbce63a89 432 {
elmot 1:d0dfbce63a89 433 /* Check the parameters */
elmot 1:d0dfbce63a89 434 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 435
elmot 1:d0dfbce63a89 436 /* Disable the Input Capture channels 1
elmot 1:d0dfbce63a89 437 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
elmot 1:d0dfbce63a89 438 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
elmot 1:d0dfbce63a89 439
elmot 1:d0dfbce63a89 440
elmot 1:d0dfbce63a89 441 /* Disable the capture compare Interrupts 1 event */
elmot 1:d0dfbce63a89 442 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
elmot 1:d0dfbce63a89 443
elmot 1:d0dfbce63a89 444 /* Disable the Peripheral */
elmot 1:d0dfbce63a89 445 __HAL_TIM_DISABLE(htim);
elmot 1:d0dfbce63a89 446
elmot 1:d0dfbce63a89 447 /* Return function status */
elmot 1:d0dfbce63a89 448 return HAL_OK;
elmot 1:d0dfbce63a89 449 }
elmot 1:d0dfbce63a89 450
elmot 1:d0dfbce63a89 451 /**
elmot 1:d0dfbce63a89 452 * @}
elmot 1:d0dfbce63a89 453 */
elmot 1:d0dfbce63a89 454
elmot 1:d0dfbce63a89 455 /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
elmot 1:d0dfbce63a89 456 * @brief Timer Complementary Output Compare functions
elmot 1:d0dfbce63a89 457 *
elmot 1:d0dfbce63a89 458 @verbatim
elmot 1:d0dfbce63a89 459 ==============================================================================
elmot 1:d0dfbce63a89 460 ##### Timer Complementary Output Compare functions #####
elmot 1:d0dfbce63a89 461 ==============================================================================
elmot 1:d0dfbce63a89 462 [..]
elmot 1:d0dfbce63a89 463 This section provides functions allowing to:
elmot 1:d0dfbce63a89 464 (+) Start the Complementary Output Compare/PWM.
elmot 1:d0dfbce63a89 465 (+) Stop the Complementary Output Compare/PWM.
elmot 1:d0dfbce63a89 466 (+) Start the Complementary Output Compare/PWM and enable interrupts.
elmot 1:d0dfbce63a89 467 (+) Stop the Complementary Output Compare/PWM and disable interrupts.
elmot 1:d0dfbce63a89 468 (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
elmot 1:d0dfbce63a89 469 (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
elmot 1:d0dfbce63a89 470
elmot 1:d0dfbce63a89 471 @endverbatim
elmot 1:d0dfbce63a89 472 * @{
elmot 1:d0dfbce63a89 473 */
elmot 1:d0dfbce63a89 474
elmot 1:d0dfbce63a89 475 /**
elmot 1:d0dfbce63a89 476 * @brief Starts the TIM Output Compare signal generation on the complementary
elmot 1:d0dfbce63a89 477 * output.
elmot 1:d0dfbce63a89 478 * @param htim : TIM Output Compare handle
elmot 1:d0dfbce63a89 479 * @param Channel : TIM Channel to be enabled
elmot 1:d0dfbce63a89 480 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 481 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 482 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 483 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
elmot 1:d0dfbce63a89 484 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
elmot 1:d0dfbce63a89 485 * @retval HAL status
elmot 1:d0dfbce63a89 486 */
elmot 1:d0dfbce63a89 487 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
elmot 1:d0dfbce63a89 488 {
elmot 1:d0dfbce63a89 489 /* Check the parameters */
elmot 1:d0dfbce63a89 490 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
elmot 1:d0dfbce63a89 491
elmot 1:d0dfbce63a89 492 /* Enable the Capture compare channel N */
elmot 1:d0dfbce63a89 493 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
elmot 1:d0dfbce63a89 494
elmot 1:d0dfbce63a89 495 /* Enable the Main Ouput */
elmot 1:d0dfbce63a89 496 __HAL_TIM_MOE_ENABLE(htim);
elmot 1:d0dfbce63a89 497
elmot 1:d0dfbce63a89 498 /* Enable the Peripheral */
elmot 1:d0dfbce63a89 499 __HAL_TIM_ENABLE(htim);
elmot 1:d0dfbce63a89 500
elmot 1:d0dfbce63a89 501 /* Return function status */
elmot 1:d0dfbce63a89 502 return HAL_OK;
elmot 1:d0dfbce63a89 503 }
elmot 1:d0dfbce63a89 504
elmot 1:d0dfbce63a89 505 /**
elmot 1:d0dfbce63a89 506 * @brief Stops the TIM Output Compare signal generation on the complementary
elmot 1:d0dfbce63a89 507 * output.
elmot 1:d0dfbce63a89 508 * @param htim : TIM handle
elmot 1:d0dfbce63a89 509 * @param Channel : TIM Channel to be disabled
elmot 1:d0dfbce63a89 510 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 511 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 512 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 513 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
elmot 1:d0dfbce63a89 514 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
elmot 1:d0dfbce63a89 515 * @retval HAL status
elmot 1:d0dfbce63a89 516 */
elmot 1:d0dfbce63a89 517 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
elmot 1:d0dfbce63a89 518 {
elmot 1:d0dfbce63a89 519 /* Check the parameters */
elmot 1:d0dfbce63a89 520 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
elmot 1:d0dfbce63a89 521
elmot 1:d0dfbce63a89 522 /* Disable the Capture compare channel N */
elmot 1:d0dfbce63a89 523 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
elmot 1:d0dfbce63a89 524
elmot 1:d0dfbce63a89 525 /* Disable the Main Ouput */
elmot 1:d0dfbce63a89 526 __HAL_TIM_MOE_DISABLE(htim);
elmot 1:d0dfbce63a89 527
elmot 1:d0dfbce63a89 528 /* Disable the Peripheral */
elmot 1:d0dfbce63a89 529 __HAL_TIM_DISABLE(htim);
elmot 1:d0dfbce63a89 530
elmot 1:d0dfbce63a89 531 /* Return function status */
elmot 1:d0dfbce63a89 532 return HAL_OK;
elmot 1:d0dfbce63a89 533 }
elmot 1:d0dfbce63a89 534
elmot 1:d0dfbce63a89 535 /**
elmot 1:d0dfbce63a89 536 * @brief Starts the TIM Output Compare signal generation in interrupt mode
elmot 1:d0dfbce63a89 537 * on the complementary output.
elmot 1:d0dfbce63a89 538 * @param htim : TIM OC handle
elmot 1:d0dfbce63a89 539 * @param Channel : TIM Channel to be enabled
elmot 1:d0dfbce63a89 540 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 541 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 542 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 543 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
elmot 1:d0dfbce63a89 544 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
elmot 1:d0dfbce63a89 545 * @retval HAL status
elmot 1:d0dfbce63a89 546 */
elmot 1:d0dfbce63a89 547 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
elmot 1:d0dfbce63a89 548 {
elmot 1:d0dfbce63a89 549 /* Check the parameters */
elmot 1:d0dfbce63a89 550 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
elmot 1:d0dfbce63a89 551
elmot 1:d0dfbce63a89 552 switch (Channel)
elmot 1:d0dfbce63a89 553 {
elmot 1:d0dfbce63a89 554 case TIM_CHANNEL_1:
elmot 1:d0dfbce63a89 555 {
elmot 1:d0dfbce63a89 556 /* Enable the TIM Output Compare interrupt */
elmot 1:d0dfbce63a89 557 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
elmot 1:d0dfbce63a89 558 }
elmot 1:d0dfbce63a89 559 break;
elmot 1:d0dfbce63a89 560
elmot 1:d0dfbce63a89 561 case TIM_CHANNEL_2:
elmot 1:d0dfbce63a89 562 {
elmot 1:d0dfbce63a89 563 /* Enable the TIM Output Compare interrupt */
elmot 1:d0dfbce63a89 564 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
elmot 1:d0dfbce63a89 565 }
elmot 1:d0dfbce63a89 566 break;
elmot 1:d0dfbce63a89 567
elmot 1:d0dfbce63a89 568 case TIM_CHANNEL_3:
elmot 1:d0dfbce63a89 569 {
elmot 1:d0dfbce63a89 570 /* Enable the TIM Output Compare interrupt */
elmot 1:d0dfbce63a89 571 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
elmot 1:d0dfbce63a89 572 }
elmot 1:d0dfbce63a89 573 break;
elmot 1:d0dfbce63a89 574
elmot 1:d0dfbce63a89 575 case TIM_CHANNEL_4:
elmot 1:d0dfbce63a89 576 {
elmot 1:d0dfbce63a89 577 /* Enable the TIM Output Compare interrupt */
elmot 1:d0dfbce63a89 578 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
elmot 1:d0dfbce63a89 579 }
elmot 1:d0dfbce63a89 580 break;
elmot 1:d0dfbce63a89 581
elmot 1:d0dfbce63a89 582 default:
elmot 1:d0dfbce63a89 583 break;
elmot 1:d0dfbce63a89 584 }
elmot 1:d0dfbce63a89 585
elmot 1:d0dfbce63a89 586 /* Enable the TIM Break interrupt */
elmot 1:d0dfbce63a89 587 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
elmot 1:d0dfbce63a89 588
elmot 1:d0dfbce63a89 589 /* Enable the Capture compare channel N */
elmot 1:d0dfbce63a89 590 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
elmot 1:d0dfbce63a89 591
elmot 1:d0dfbce63a89 592 /* Enable the Main Ouput */
elmot 1:d0dfbce63a89 593 __HAL_TIM_MOE_ENABLE(htim);
elmot 1:d0dfbce63a89 594
elmot 1:d0dfbce63a89 595 /* Enable the Peripheral */
elmot 1:d0dfbce63a89 596 __HAL_TIM_ENABLE(htim);
elmot 1:d0dfbce63a89 597
elmot 1:d0dfbce63a89 598 /* Return function status */
elmot 1:d0dfbce63a89 599 return HAL_OK;
elmot 1:d0dfbce63a89 600 }
elmot 1:d0dfbce63a89 601
elmot 1:d0dfbce63a89 602 /**
elmot 1:d0dfbce63a89 603 * @brief Stops the TIM Output Compare signal generation in interrupt mode
elmot 1:d0dfbce63a89 604 * on the complementary output.
elmot 1:d0dfbce63a89 605 * @param htim : TIM Output Compare handle
elmot 1:d0dfbce63a89 606 * @param Channel : TIM Channel to be disabled
elmot 1:d0dfbce63a89 607 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 608 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 609 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 610 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
elmot 1:d0dfbce63a89 611 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
elmot 1:d0dfbce63a89 612 * @retval HAL status
elmot 1:d0dfbce63a89 613 */
elmot 1:d0dfbce63a89 614 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
elmot 1:d0dfbce63a89 615 {
elmot 1:d0dfbce63a89 616 uint32_t tmpccer = 0;
elmot 1:d0dfbce63a89 617
elmot 1:d0dfbce63a89 618 /* Check the parameters */
elmot 1:d0dfbce63a89 619 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
elmot 1:d0dfbce63a89 620
elmot 1:d0dfbce63a89 621 switch (Channel)
elmot 1:d0dfbce63a89 622 {
elmot 1:d0dfbce63a89 623 case TIM_CHANNEL_1:
elmot 1:d0dfbce63a89 624 {
elmot 1:d0dfbce63a89 625 /* Disable the TIM Output Compare interrupt */
elmot 1:d0dfbce63a89 626 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
elmot 1:d0dfbce63a89 627 }
elmot 1:d0dfbce63a89 628 break;
elmot 1:d0dfbce63a89 629
elmot 1:d0dfbce63a89 630 case TIM_CHANNEL_2:
elmot 1:d0dfbce63a89 631 {
elmot 1:d0dfbce63a89 632 /* Disable the TIM Output Compare interrupt */
elmot 1:d0dfbce63a89 633 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
elmot 1:d0dfbce63a89 634 }
elmot 1:d0dfbce63a89 635 break;
elmot 1:d0dfbce63a89 636
elmot 1:d0dfbce63a89 637 case TIM_CHANNEL_3:
elmot 1:d0dfbce63a89 638 {
elmot 1:d0dfbce63a89 639 /* Disable the TIM Output Compare interrupt */
elmot 1:d0dfbce63a89 640 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
elmot 1:d0dfbce63a89 641 }
elmot 1:d0dfbce63a89 642 break;
elmot 1:d0dfbce63a89 643
elmot 1:d0dfbce63a89 644 case TIM_CHANNEL_4:
elmot 1:d0dfbce63a89 645 {
elmot 1:d0dfbce63a89 646 /* Disable the TIM Output Compare interrupt */
elmot 1:d0dfbce63a89 647 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
elmot 1:d0dfbce63a89 648 }
elmot 1:d0dfbce63a89 649 break;
elmot 1:d0dfbce63a89 650
elmot 1:d0dfbce63a89 651 default:
elmot 1:d0dfbce63a89 652 break;
elmot 1:d0dfbce63a89 653 }
elmot 1:d0dfbce63a89 654
elmot 1:d0dfbce63a89 655 /* Disable the Capture compare channel N */
elmot 1:d0dfbce63a89 656 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
elmot 1:d0dfbce63a89 657
elmot 1:d0dfbce63a89 658 /* Disable the TIM Break interrupt (only if no more channel is active) */
elmot 1:d0dfbce63a89 659 tmpccer = htim->Instance->CCER;
elmot 1:d0dfbce63a89 660 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET)
elmot 1:d0dfbce63a89 661 {
elmot 1:d0dfbce63a89 662 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
elmot 1:d0dfbce63a89 663 }
elmot 1:d0dfbce63a89 664
elmot 1:d0dfbce63a89 665 /* Disable the Main Ouput */
elmot 1:d0dfbce63a89 666 __HAL_TIM_MOE_DISABLE(htim);
elmot 1:d0dfbce63a89 667
elmot 1:d0dfbce63a89 668 /* Disable the Peripheral */
elmot 1:d0dfbce63a89 669 __HAL_TIM_DISABLE(htim);
elmot 1:d0dfbce63a89 670
elmot 1:d0dfbce63a89 671 /* Return function status */
elmot 1:d0dfbce63a89 672 return HAL_OK;
elmot 1:d0dfbce63a89 673 }
elmot 1:d0dfbce63a89 674
elmot 1:d0dfbce63a89 675 /**
elmot 1:d0dfbce63a89 676 * @brief Starts the TIM Output Compare signal generation in DMA mode
elmot 1:d0dfbce63a89 677 * on the complementary output.
elmot 1:d0dfbce63a89 678 * @param htim : TIM Output Compare handle
elmot 1:d0dfbce63a89 679 * @param Channel : TIM Channel to be enabled
elmot 1:d0dfbce63a89 680 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 681 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 682 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 683 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
elmot 1:d0dfbce63a89 684 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
elmot 1:d0dfbce63a89 685 * @param pData: The source Buffer address.
elmot 1:d0dfbce63a89 686 * @param Length: The length of data to be transferred from memory to TIM peripheral
elmot 1:d0dfbce63a89 687 * @retval HAL status
elmot 1:d0dfbce63a89 688 */
elmot 1:d0dfbce63a89 689 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
elmot 1:d0dfbce63a89 690 {
elmot 1:d0dfbce63a89 691 /* Check the parameters */
elmot 1:d0dfbce63a89 692 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
elmot 1:d0dfbce63a89 693
elmot 1:d0dfbce63a89 694 if((htim->State == HAL_TIM_STATE_BUSY))
elmot 1:d0dfbce63a89 695 {
elmot 1:d0dfbce63a89 696 return HAL_BUSY;
elmot 1:d0dfbce63a89 697 }
elmot 1:d0dfbce63a89 698 else if((htim->State == HAL_TIM_STATE_READY))
elmot 1:d0dfbce63a89 699 {
elmot 1:d0dfbce63a89 700 if(((uint32_t)pData == 0 ) && (Length > 0))
elmot 1:d0dfbce63a89 701 {
elmot 1:d0dfbce63a89 702 return HAL_ERROR;
elmot 1:d0dfbce63a89 703 }
elmot 1:d0dfbce63a89 704 else
elmot 1:d0dfbce63a89 705 {
elmot 1:d0dfbce63a89 706 htim->State = HAL_TIM_STATE_BUSY;
elmot 1:d0dfbce63a89 707 }
elmot 1:d0dfbce63a89 708 }
elmot 1:d0dfbce63a89 709 switch (Channel)
elmot 1:d0dfbce63a89 710 {
elmot 1:d0dfbce63a89 711 case TIM_CHANNEL_1:
elmot 1:d0dfbce63a89 712 {
elmot 1:d0dfbce63a89 713 /* Set the DMA Period elapsed callback */
elmot 1:d0dfbce63a89 714 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
elmot 1:d0dfbce63a89 715
elmot 1:d0dfbce63a89 716 /* Set the DMA error callback */
elmot 1:d0dfbce63a89 717 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
elmot 1:d0dfbce63a89 718
elmot 1:d0dfbce63a89 719 /* Enable the DMA channel */
elmot 1:d0dfbce63a89 720 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
elmot 1:d0dfbce63a89 721
elmot 1:d0dfbce63a89 722 /* Enable the TIM Output Compare DMA request */
elmot 1:d0dfbce63a89 723 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
elmot 1:d0dfbce63a89 724 }
elmot 1:d0dfbce63a89 725 break;
elmot 1:d0dfbce63a89 726
elmot 1:d0dfbce63a89 727 case TIM_CHANNEL_2:
elmot 1:d0dfbce63a89 728 {
elmot 1:d0dfbce63a89 729 /* Set the DMA Period elapsed callback */
elmot 1:d0dfbce63a89 730 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
elmot 1:d0dfbce63a89 731
elmot 1:d0dfbce63a89 732 /* Set the DMA error callback */
elmot 1:d0dfbce63a89 733 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
elmot 1:d0dfbce63a89 734
elmot 1:d0dfbce63a89 735 /* Enable the DMA channel */
elmot 1:d0dfbce63a89 736 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
elmot 1:d0dfbce63a89 737
elmot 1:d0dfbce63a89 738 /* Enable the TIM Output Compare DMA request */
elmot 1:d0dfbce63a89 739 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
elmot 1:d0dfbce63a89 740 }
elmot 1:d0dfbce63a89 741 break;
elmot 1:d0dfbce63a89 742
elmot 1:d0dfbce63a89 743 case TIM_CHANNEL_3:
elmot 1:d0dfbce63a89 744 {
elmot 1:d0dfbce63a89 745 /* Set the DMA Period elapsed callback */
elmot 1:d0dfbce63a89 746 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
elmot 1:d0dfbce63a89 747
elmot 1:d0dfbce63a89 748 /* Set the DMA error callback */
elmot 1:d0dfbce63a89 749 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
elmot 1:d0dfbce63a89 750
elmot 1:d0dfbce63a89 751 /* Enable the DMA channel */
elmot 1:d0dfbce63a89 752 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
elmot 1:d0dfbce63a89 753
elmot 1:d0dfbce63a89 754 /* Enable the TIM Output Compare DMA request */
elmot 1:d0dfbce63a89 755 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
elmot 1:d0dfbce63a89 756 }
elmot 1:d0dfbce63a89 757 break;
elmot 1:d0dfbce63a89 758
elmot 1:d0dfbce63a89 759 case TIM_CHANNEL_4:
elmot 1:d0dfbce63a89 760 {
elmot 1:d0dfbce63a89 761 /* Set the DMA Period elapsed callback */
elmot 1:d0dfbce63a89 762 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
elmot 1:d0dfbce63a89 763
elmot 1:d0dfbce63a89 764 /* Set the DMA error callback */
elmot 1:d0dfbce63a89 765 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
elmot 1:d0dfbce63a89 766
elmot 1:d0dfbce63a89 767 /* Enable the DMA channel */
elmot 1:d0dfbce63a89 768 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
elmot 1:d0dfbce63a89 769
elmot 1:d0dfbce63a89 770 /* Enable the TIM Output Compare DMA request */
elmot 1:d0dfbce63a89 771 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
elmot 1:d0dfbce63a89 772 }
elmot 1:d0dfbce63a89 773 break;
elmot 1:d0dfbce63a89 774
elmot 1:d0dfbce63a89 775 default:
elmot 1:d0dfbce63a89 776 break;
elmot 1:d0dfbce63a89 777 }
elmot 1:d0dfbce63a89 778
elmot 1:d0dfbce63a89 779 /* Enable the Capture compare channel N */
elmot 1:d0dfbce63a89 780 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
elmot 1:d0dfbce63a89 781
elmot 1:d0dfbce63a89 782 /* Enable the Main Ouput */
elmot 1:d0dfbce63a89 783 __HAL_TIM_MOE_ENABLE(htim);
elmot 1:d0dfbce63a89 784
elmot 1:d0dfbce63a89 785 /* Enable the Peripheral */
elmot 1:d0dfbce63a89 786 __HAL_TIM_ENABLE(htim);
elmot 1:d0dfbce63a89 787
elmot 1:d0dfbce63a89 788 /* Return function status */
elmot 1:d0dfbce63a89 789 return HAL_OK;
elmot 1:d0dfbce63a89 790 }
elmot 1:d0dfbce63a89 791
elmot 1:d0dfbce63a89 792 /**
elmot 1:d0dfbce63a89 793 * @brief Stops the TIM Output Compare signal generation in DMA mode
elmot 1:d0dfbce63a89 794 * on the complementary output.
elmot 1:d0dfbce63a89 795 * @param htim : TIM Output Compare handle
elmot 1:d0dfbce63a89 796 * @param Channel : TIM Channel to be disabled
elmot 1:d0dfbce63a89 797 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 798 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 799 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 800 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
elmot 1:d0dfbce63a89 801 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
elmot 1:d0dfbce63a89 802 * @retval HAL status
elmot 1:d0dfbce63a89 803 */
elmot 1:d0dfbce63a89 804 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
elmot 1:d0dfbce63a89 805 {
elmot 1:d0dfbce63a89 806 /* Check the parameters */
elmot 1:d0dfbce63a89 807 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
elmot 1:d0dfbce63a89 808
elmot 1:d0dfbce63a89 809 switch (Channel)
elmot 1:d0dfbce63a89 810 {
elmot 1:d0dfbce63a89 811 case TIM_CHANNEL_1:
elmot 1:d0dfbce63a89 812 {
elmot 1:d0dfbce63a89 813 /* Disable the TIM Output Compare DMA request */
elmot 1:d0dfbce63a89 814 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
elmot 1:d0dfbce63a89 815 }
elmot 1:d0dfbce63a89 816 break;
elmot 1:d0dfbce63a89 817
elmot 1:d0dfbce63a89 818 case TIM_CHANNEL_2:
elmot 1:d0dfbce63a89 819 {
elmot 1:d0dfbce63a89 820 /* Disable the TIM Output Compare DMA request */
elmot 1:d0dfbce63a89 821 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
elmot 1:d0dfbce63a89 822 }
elmot 1:d0dfbce63a89 823 break;
elmot 1:d0dfbce63a89 824
elmot 1:d0dfbce63a89 825 case TIM_CHANNEL_3:
elmot 1:d0dfbce63a89 826 {
elmot 1:d0dfbce63a89 827 /* Disable the TIM Output Compare DMA request */
elmot 1:d0dfbce63a89 828 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
elmot 1:d0dfbce63a89 829 }
elmot 1:d0dfbce63a89 830 break;
elmot 1:d0dfbce63a89 831
elmot 1:d0dfbce63a89 832 case TIM_CHANNEL_4:
elmot 1:d0dfbce63a89 833 {
elmot 1:d0dfbce63a89 834 /* Disable the TIM Output Compare interrupt */
elmot 1:d0dfbce63a89 835 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
elmot 1:d0dfbce63a89 836 }
elmot 1:d0dfbce63a89 837 break;
elmot 1:d0dfbce63a89 838
elmot 1:d0dfbce63a89 839 default:
elmot 1:d0dfbce63a89 840 break;
elmot 1:d0dfbce63a89 841 }
elmot 1:d0dfbce63a89 842
elmot 1:d0dfbce63a89 843 /* Disable the Capture compare channel N */
elmot 1:d0dfbce63a89 844 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
elmot 1:d0dfbce63a89 845
elmot 1:d0dfbce63a89 846 /* Disable the Main Ouput */
elmot 1:d0dfbce63a89 847 __HAL_TIM_MOE_DISABLE(htim);
elmot 1:d0dfbce63a89 848
elmot 1:d0dfbce63a89 849 /* Disable the Peripheral */
elmot 1:d0dfbce63a89 850 __HAL_TIM_DISABLE(htim);
elmot 1:d0dfbce63a89 851
elmot 1:d0dfbce63a89 852 /* Change the htim state */
elmot 1:d0dfbce63a89 853 htim->State = HAL_TIM_STATE_READY;
elmot 1:d0dfbce63a89 854
elmot 1:d0dfbce63a89 855 /* Return function status */
elmot 1:d0dfbce63a89 856 return HAL_OK;
elmot 1:d0dfbce63a89 857 }
elmot 1:d0dfbce63a89 858
elmot 1:d0dfbce63a89 859 /**
elmot 1:d0dfbce63a89 860 * @}
elmot 1:d0dfbce63a89 861 */
elmot 1:d0dfbce63a89 862
elmot 1:d0dfbce63a89 863 /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
elmot 1:d0dfbce63a89 864 * @brief Timer Complementary PWM functions
elmot 1:d0dfbce63a89 865 *
elmot 1:d0dfbce63a89 866 @verbatim
elmot 1:d0dfbce63a89 867 ==============================================================================
elmot 1:d0dfbce63a89 868 ##### Timer Complementary PWM functions #####
elmot 1:d0dfbce63a89 869 ==============================================================================
elmot 1:d0dfbce63a89 870 [..]
elmot 1:d0dfbce63a89 871 This section provides functions allowing to:
elmot 1:d0dfbce63a89 872 (+) Start the Complementary PWM.
elmot 1:d0dfbce63a89 873 (+) Stop the Complementary PWM.
elmot 1:d0dfbce63a89 874 (+) Start the Complementary PWM and enable interrupts.
elmot 1:d0dfbce63a89 875 (+) Stop the Complementary PWM and disable interrupts.
elmot 1:d0dfbce63a89 876 (+) Start the Complementary PWM and enable DMA transfers.
elmot 1:d0dfbce63a89 877 (+) Stop the Complementary PWM and disable DMA transfers.
elmot 1:d0dfbce63a89 878 (+) Start the Complementary Input Capture measurement.
elmot 1:d0dfbce63a89 879 (+) Stop the Complementary Input Capture.
elmot 1:d0dfbce63a89 880 (+) Start the Complementary Input Capture and enable interrupts.
elmot 1:d0dfbce63a89 881 (+) Stop the Complementary Input Capture and disable interrupts.
elmot 1:d0dfbce63a89 882 (+) Start the Complementary Input Capture and enable DMA transfers.
elmot 1:d0dfbce63a89 883 (+) Stop the Complementary Input Capture and disable DMA transfers.
elmot 1:d0dfbce63a89 884 (+) Start the Complementary One Pulse generation.
elmot 1:d0dfbce63a89 885 (+) Stop the Complementary One Pulse.
elmot 1:d0dfbce63a89 886 (+) Start the Complementary One Pulse and enable interrupts.
elmot 1:d0dfbce63a89 887 (+) Stop the Complementary One Pulse and disable interrupts.
elmot 1:d0dfbce63a89 888
elmot 1:d0dfbce63a89 889 @endverbatim
elmot 1:d0dfbce63a89 890 * @{
elmot 1:d0dfbce63a89 891 */
elmot 1:d0dfbce63a89 892
elmot 1:d0dfbce63a89 893 /**
elmot 1:d0dfbce63a89 894 * @brief Starts the PWM signal generation on the complementary output.
elmot 1:d0dfbce63a89 895 * @param htim : TIM handle
elmot 1:d0dfbce63a89 896 * @param Channel : TIM Channel to be enabled
elmot 1:d0dfbce63a89 897 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 898 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 899 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 900 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
elmot 1:d0dfbce63a89 901 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
elmot 1:d0dfbce63a89 902 * @retval HAL status
elmot 1:d0dfbce63a89 903 */
elmot 1:d0dfbce63a89 904 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
elmot 1:d0dfbce63a89 905 {
elmot 1:d0dfbce63a89 906 /* Check the parameters */
elmot 1:d0dfbce63a89 907 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
elmot 1:d0dfbce63a89 908
elmot 1:d0dfbce63a89 909 /* Enable the complementary PWM output */
elmot 1:d0dfbce63a89 910 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
elmot 1:d0dfbce63a89 911
elmot 1:d0dfbce63a89 912 /* Enable the Main Ouput */
elmot 1:d0dfbce63a89 913 __HAL_TIM_MOE_ENABLE(htim);
elmot 1:d0dfbce63a89 914
elmot 1:d0dfbce63a89 915 /* Enable the Peripheral */
elmot 1:d0dfbce63a89 916 __HAL_TIM_ENABLE(htim);
elmot 1:d0dfbce63a89 917
elmot 1:d0dfbce63a89 918 /* Return function status */
elmot 1:d0dfbce63a89 919 return HAL_OK;
elmot 1:d0dfbce63a89 920 }
elmot 1:d0dfbce63a89 921
elmot 1:d0dfbce63a89 922 /**
elmot 1:d0dfbce63a89 923 * @brief Stops the PWM signal generation on the complementary output.
elmot 1:d0dfbce63a89 924 * @param htim : TIM handle
elmot 1:d0dfbce63a89 925 * @param Channel : TIM Channel to be disabled
elmot 1:d0dfbce63a89 926 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 927 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 928 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 929 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
elmot 1:d0dfbce63a89 930 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
elmot 1:d0dfbce63a89 931 * @retval HAL status
elmot 1:d0dfbce63a89 932 */
elmot 1:d0dfbce63a89 933 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
elmot 1:d0dfbce63a89 934 {
elmot 1:d0dfbce63a89 935 /* Check the parameters */
elmot 1:d0dfbce63a89 936 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
elmot 1:d0dfbce63a89 937
elmot 1:d0dfbce63a89 938 /* Disable the complementary PWM output */
elmot 1:d0dfbce63a89 939 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
elmot 1:d0dfbce63a89 940
elmot 1:d0dfbce63a89 941 /* Disable the Main Ouput */
elmot 1:d0dfbce63a89 942 __HAL_TIM_MOE_DISABLE(htim);
elmot 1:d0dfbce63a89 943
elmot 1:d0dfbce63a89 944 /* Disable the Peripheral */
elmot 1:d0dfbce63a89 945 __HAL_TIM_DISABLE(htim);
elmot 1:d0dfbce63a89 946
elmot 1:d0dfbce63a89 947 /* Return function status */
elmot 1:d0dfbce63a89 948 return HAL_OK;
elmot 1:d0dfbce63a89 949 }
elmot 1:d0dfbce63a89 950
elmot 1:d0dfbce63a89 951 /**
elmot 1:d0dfbce63a89 952 * @brief Starts the PWM signal generation in interrupt mode on the
elmot 1:d0dfbce63a89 953 * complementary output.
elmot 1:d0dfbce63a89 954 * @param htim : TIM handle
elmot 1:d0dfbce63a89 955 * @param Channel : TIM Channel to be disabled
elmot 1:d0dfbce63a89 956 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 957 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 958 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 959 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
elmot 1:d0dfbce63a89 960 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
elmot 1:d0dfbce63a89 961 * @retval HAL status
elmot 1:d0dfbce63a89 962 */
elmot 1:d0dfbce63a89 963 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
elmot 1:d0dfbce63a89 964 {
elmot 1:d0dfbce63a89 965 /* Check the parameters */
elmot 1:d0dfbce63a89 966 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
elmot 1:d0dfbce63a89 967
elmot 1:d0dfbce63a89 968 switch (Channel)
elmot 1:d0dfbce63a89 969 {
elmot 1:d0dfbce63a89 970 case TIM_CHANNEL_1:
elmot 1:d0dfbce63a89 971 {
elmot 1:d0dfbce63a89 972 /* Enable the TIM Capture/Compare 1 interrupt */
elmot 1:d0dfbce63a89 973 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
elmot 1:d0dfbce63a89 974 }
elmot 1:d0dfbce63a89 975 break;
elmot 1:d0dfbce63a89 976
elmot 1:d0dfbce63a89 977 case TIM_CHANNEL_2:
elmot 1:d0dfbce63a89 978 {
elmot 1:d0dfbce63a89 979 /* Enable the TIM Capture/Compare 2 interrupt */
elmot 1:d0dfbce63a89 980 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
elmot 1:d0dfbce63a89 981 }
elmot 1:d0dfbce63a89 982 break;
elmot 1:d0dfbce63a89 983
elmot 1:d0dfbce63a89 984 case TIM_CHANNEL_3:
elmot 1:d0dfbce63a89 985 {
elmot 1:d0dfbce63a89 986 /* Enable the TIM Capture/Compare 3 interrupt */
elmot 1:d0dfbce63a89 987 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
elmot 1:d0dfbce63a89 988 }
elmot 1:d0dfbce63a89 989 break;
elmot 1:d0dfbce63a89 990
elmot 1:d0dfbce63a89 991 case TIM_CHANNEL_4:
elmot 1:d0dfbce63a89 992 {
elmot 1:d0dfbce63a89 993 /* Enable the TIM Capture/Compare 4 interrupt */
elmot 1:d0dfbce63a89 994 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
elmot 1:d0dfbce63a89 995 }
elmot 1:d0dfbce63a89 996 break;
elmot 1:d0dfbce63a89 997
elmot 1:d0dfbce63a89 998 default:
elmot 1:d0dfbce63a89 999 break;
elmot 1:d0dfbce63a89 1000 }
elmot 1:d0dfbce63a89 1001
elmot 1:d0dfbce63a89 1002 /* Enable the TIM Break interrupt */
elmot 1:d0dfbce63a89 1003 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
elmot 1:d0dfbce63a89 1004
elmot 1:d0dfbce63a89 1005 /* Enable the complementary PWM output */
elmot 1:d0dfbce63a89 1006 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
elmot 1:d0dfbce63a89 1007
elmot 1:d0dfbce63a89 1008 /* Enable the Main Ouput */
elmot 1:d0dfbce63a89 1009 __HAL_TIM_MOE_ENABLE(htim);
elmot 1:d0dfbce63a89 1010
elmot 1:d0dfbce63a89 1011 /* Enable the Peripheral */
elmot 1:d0dfbce63a89 1012 __HAL_TIM_ENABLE(htim);
elmot 1:d0dfbce63a89 1013
elmot 1:d0dfbce63a89 1014 /* Return function status */
elmot 1:d0dfbce63a89 1015 return HAL_OK;
elmot 1:d0dfbce63a89 1016 }
elmot 1:d0dfbce63a89 1017
elmot 1:d0dfbce63a89 1018 /**
elmot 1:d0dfbce63a89 1019 * @brief Stops the PWM signal generation in interrupt mode on the
elmot 1:d0dfbce63a89 1020 * complementary output.
elmot 1:d0dfbce63a89 1021 * @param htim : TIM handle
elmot 1:d0dfbce63a89 1022 * @param Channel : TIM Channel to be disabled
elmot 1:d0dfbce63a89 1023 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1024 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 1025 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 1026 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
elmot 1:d0dfbce63a89 1027 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
elmot 1:d0dfbce63a89 1028 * @retval HAL status
elmot 1:d0dfbce63a89 1029 */
elmot 1:d0dfbce63a89 1030 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
elmot 1:d0dfbce63a89 1031 {
elmot 1:d0dfbce63a89 1032 uint32_t tmpccer = 0;
elmot 1:d0dfbce63a89 1033
elmot 1:d0dfbce63a89 1034 /* Check the parameters */
elmot 1:d0dfbce63a89 1035 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
elmot 1:d0dfbce63a89 1036
elmot 1:d0dfbce63a89 1037 switch (Channel)
elmot 1:d0dfbce63a89 1038 {
elmot 1:d0dfbce63a89 1039 case TIM_CHANNEL_1:
elmot 1:d0dfbce63a89 1040 {
elmot 1:d0dfbce63a89 1041 /* Disable the TIM Capture/Compare 1 interrupt */
elmot 1:d0dfbce63a89 1042 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
elmot 1:d0dfbce63a89 1043 }
elmot 1:d0dfbce63a89 1044 break;
elmot 1:d0dfbce63a89 1045
elmot 1:d0dfbce63a89 1046 case TIM_CHANNEL_2:
elmot 1:d0dfbce63a89 1047 {
elmot 1:d0dfbce63a89 1048 /* Disable the TIM Capture/Compare 2 interrupt */
elmot 1:d0dfbce63a89 1049 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
elmot 1:d0dfbce63a89 1050 }
elmot 1:d0dfbce63a89 1051 break;
elmot 1:d0dfbce63a89 1052
elmot 1:d0dfbce63a89 1053 case TIM_CHANNEL_3:
elmot 1:d0dfbce63a89 1054 {
elmot 1:d0dfbce63a89 1055 /* Disable the TIM Capture/Compare 3 interrupt */
elmot 1:d0dfbce63a89 1056 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
elmot 1:d0dfbce63a89 1057 }
elmot 1:d0dfbce63a89 1058 break;
elmot 1:d0dfbce63a89 1059
elmot 1:d0dfbce63a89 1060 case TIM_CHANNEL_4:
elmot 1:d0dfbce63a89 1061 {
elmot 1:d0dfbce63a89 1062 /* Disable the TIM Capture/Compare 3 interrupt */
elmot 1:d0dfbce63a89 1063 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
elmot 1:d0dfbce63a89 1064 }
elmot 1:d0dfbce63a89 1065 break;
elmot 1:d0dfbce63a89 1066
elmot 1:d0dfbce63a89 1067 default:
elmot 1:d0dfbce63a89 1068 break;
elmot 1:d0dfbce63a89 1069 }
elmot 1:d0dfbce63a89 1070
elmot 1:d0dfbce63a89 1071 /* Disable the complementary PWM output */
elmot 1:d0dfbce63a89 1072 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
elmot 1:d0dfbce63a89 1073
elmot 1:d0dfbce63a89 1074
elmot 1:d0dfbce63a89 1075 /* Disable the TIM Break interrupt (only if no more channel is active) */
elmot 1:d0dfbce63a89 1076 tmpccer = htim->Instance->CCER;
elmot 1:d0dfbce63a89 1077 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET)
elmot 1:d0dfbce63a89 1078 {
elmot 1:d0dfbce63a89 1079 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
elmot 1:d0dfbce63a89 1080 }
elmot 1:d0dfbce63a89 1081
elmot 1:d0dfbce63a89 1082 /* Disable the Main Ouput */
elmot 1:d0dfbce63a89 1083 __HAL_TIM_MOE_DISABLE(htim);
elmot 1:d0dfbce63a89 1084
elmot 1:d0dfbce63a89 1085 /* Disable the Peripheral */
elmot 1:d0dfbce63a89 1086 __HAL_TIM_DISABLE(htim);
elmot 1:d0dfbce63a89 1087
elmot 1:d0dfbce63a89 1088 /* Return function status */
elmot 1:d0dfbce63a89 1089 return HAL_OK;
elmot 1:d0dfbce63a89 1090 }
elmot 1:d0dfbce63a89 1091
elmot 1:d0dfbce63a89 1092 /**
elmot 1:d0dfbce63a89 1093 * @brief Starts the TIM PWM signal generation in DMA mode on the
elmot 1:d0dfbce63a89 1094 * complementary output
elmot 1:d0dfbce63a89 1095 * @param htim : TIM handle
elmot 1:d0dfbce63a89 1096 * @param Channel : TIM Channel to be enabled
elmot 1:d0dfbce63a89 1097 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1098 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 1099 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 1100 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
elmot 1:d0dfbce63a89 1101 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
elmot 1:d0dfbce63a89 1102 * @param pData: The source Buffer address.
elmot 1:d0dfbce63a89 1103 * @param Length: The length of data to be transferred from memory to TIM peripheral
elmot 1:d0dfbce63a89 1104 * @retval HAL status
elmot 1:d0dfbce63a89 1105 */
elmot 1:d0dfbce63a89 1106 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
elmot 1:d0dfbce63a89 1107 {
elmot 1:d0dfbce63a89 1108 /* Check the parameters */
elmot 1:d0dfbce63a89 1109 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
elmot 1:d0dfbce63a89 1110
elmot 1:d0dfbce63a89 1111 if((htim->State == HAL_TIM_STATE_BUSY))
elmot 1:d0dfbce63a89 1112 {
elmot 1:d0dfbce63a89 1113 return HAL_BUSY;
elmot 1:d0dfbce63a89 1114 }
elmot 1:d0dfbce63a89 1115 else if((htim->State == HAL_TIM_STATE_READY))
elmot 1:d0dfbce63a89 1116 {
elmot 1:d0dfbce63a89 1117 if(((uint32_t)pData == 0 ) && (Length > 0))
elmot 1:d0dfbce63a89 1118 {
elmot 1:d0dfbce63a89 1119 return HAL_ERROR;
elmot 1:d0dfbce63a89 1120 }
elmot 1:d0dfbce63a89 1121 else
elmot 1:d0dfbce63a89 1122 {
elmot 1:d0dfbce63a89 1123 htim->State = HAL_TIM_STATE_BUSY;
elmot 1:d0dfbce63a89 1124 }
elmot 1:d0dfbce63a89 1125 }
elmot 1:d0dfbce63a89 1126 switch (Channel)
elmot 1:d0dfbce63a89 1127 {
elmot 1:d0dfbce63a89 1128 case TIM_CHANNEL_1:
elmot 1:d0dfbce63a89 1129 {
elmot 1:d0dfbce63a89 1130 /* Set the DMA Period elapsed callback */
elmot 1:d0dfbce63a89 1131 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
elmot 1:d0dfbce63a89 1132
elmot 1:d0dfbce63a89 1133 /* Set the DMA error callback */
elmot 1:d0dfbce63a89 1134 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
elmot 1:d0dfbce63a89 1135
elmot 1:d0dfbce63a89 1136 /* Enable the DMA channel */
elmot 1:d0dfbce63a89 1137 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
elmot 1:d0dfbce63a89 1138
elmot 1:d0dfbce63a89 1139 /* Enable the TIM Capture/Compare 1 DMA request */
elmot 1:d0dfbce63a89 1140 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
elmot 1:d0dfbce63a89 1141 }
elmot 1:d0dfbce63a89 1142 break;
elmot 1:d0dfbce63a89 1143
elmot 1:d0dfbce63a89 1144 case TIM_CHANNEL_2:
elmot 1:d0dfbce63a89 1145 {
elmot 1:d0dfbce63a89 1146 /* Set the DMA Period elapsed callback */
elmot 1:d0dfbce63a89 1147 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
elmot 1:d0dfbce63a89 1148
elmot 1:d0dfbce63a89 1149 /* Set the DMA error callback */
elmot 1:d0dfbce63a89 1150 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
elmot 1:d0dfbce63a89 1151
elmot 1:d0dfbce63a89 1152 /* Enable the DMA channel */
elmot 1:d0dfbce63a89 1153 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
elmot 1:d0dfbce63a89 1154
elmot 1:d0dfbce63a89 1155 /* Enable the TIM Capture/Compare 2 DMA request */
elmot 1:d0dfbce63a89 1156 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
elmot 1:d0dfbce63a89 1157 }
elmot 1:d0dfbce63a89 1158 break;
elmot 1:d0dfbce63a89 1159
elmot 1:d0dfbce63a89 1160 case TIM_CHANNEL_3:
elmot 1:d0dfbce63a89 1161 {
elmot 1:d0dfbce63a89 1162 /* Set the DMA Period elapsed callback */
elmot 1:d0dfbce63a89 1163 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
elmot 1:d0dfbce63a89 1164
elmot 1:d0dfbce63a89 1165 /* Set the DMA error callback */
elmot 1:d0dfbce63a89 1166 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
elmot 1:d0dfbce63a89 1167
elmot 1:d0dfbce63a89 1168 /* Enable the DMA channel */
elmot 1:d0dfbce63a89 1169 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
elmot 1:d0dfbce63a89 1170
elmot 1:d0dfbce63a89 1171 /* Enable the TIM Capture/Compare 3 DMA request */
elmot 1:d0dfbce63a89 1172 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
elmot 1:d0dfbce63a89 1173 }
elmot 1:d0dfbce63a89 1174 break;
elmot 1:d0dfbce63a89 1175
elmot 1:d0dfbce63a89 1176 case TIM_CHANNEL_4:
elmot 1:d0dfbce63a89 1177 {
elmot 1:d0dfbce63a89 1178 /* Set the DMA Period elapsed callback */
elmot 1:d0dfbce63a89 1179 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
elmot 1:d0dfbce63a89 1180
elmot 1:d0dfbce63a89 1181 /* Set the DMA error callback */
elmot 1:d0dfbce63a89 1182 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
elmot 1:d0dfbce63a89 1183
elmot 1:d0dfbce63a89 1184 /* Enable the DMA channel */
elmot 1:d0dfbce63a89 1185 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
elmot 1:d0dfbce63a89 1186
elmot 1:d0dfbce63a89 1187 /* Enable the TIM Capture/Compare 4 DMA request */
elmot 1:d0dfbce63a89 1188 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
elmot 1:d0dfbce63a89 1189 }
elmot 1:d0dfbce63a89 1190 break;
elmot 1:d0dfbce63a89 1191
elmot 1:d0dfbce63a89 1192 default:
elmot 1:d0dfbce63a89 1193 break;
elmot 1:d0dfbce63a89 1194 }
elmot 1:d0dfbce63a89 1195
elmot 1:d0dfbce63a89 1196 /* Enable the complementary PWM output */
elmot 1:d0dfbce63a89 1197 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
elmot 1:d0dfbce63a89 1198
elmot 1:d0dfbce63a89 1199 /* Enable the Main Ouput */
elmot 1:d0dfbce63a89 1200 __HAL_TIM_MOE_ENABLE(htim);
elmot 1:d0dfbce63a89 1201
elmot 1:d0dfbce63a89 1202 /* Enable the Peripheral */
elmot 1:d0dfbce63a89 1203 __HAL_TIM_ENABLE(htim);
elmot 1:d0dfbce63a89 1204
elmot 1:d0dfbce63a89 1205 /* Return function status */
elmot 1:d0dfbce63a89 1206 return HAL_OK;
elmot 1:d0dfbce63a89 1207 }
elmot 1:d0dfbce63a89 1208
elmot 1:d0dfbce63a89 1209 /**
elmot 1:d0dfbce63a89 1210 * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
elmot 1:d0dfbce63a89 1211 * output
elmot 1:d0dfbce63a89 1212 * @param htim : TIM handle
elmot 1:d0dfbce63a89 1213 * @param Channel : TIM Channel to be disabled
elmot 1:d0dfbce63a89 1214 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1215 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 1216 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 1217 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
elmot 1:d0dfbce63a89 1218 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
elmot 1:d0dfbce63a89 1219 * @retval HAL status
elmot 1:d0dfbce63a89 1220 */
elmot 1:d0dfbce63a89 1221 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
elmot 1:d0dfbce63a89 1222 {
elmot 1:d0dfbce63a89 1223 /* Check the parameters */
elmot 1:d0dfbce63a89 1224 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
elmot 1:d0dfbce63a89 1225
elmot 1:d0dfbce63a89 1226 switch (Channel)
elmot 1:d0dfbce63a89 1227 {
elmot 1:d0dfbce63a89 1228 case TIM_CHANNEL_1:
elmot 1:d0dfbce63a89 1229 {
elmot 1:d0dfbce63a89 1230 /* Disable the TIM Capture/Compare 1 DMA request */
elmot 1:d0dfbce63a89 1231 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
elmot 1:d0dfbce63a89 1232 }
elmot 1:d0dfbce63a89 1233 break;
elmot 1:d0dfbce63a89 1234
elmot 1:d0dfbce63a89 1235 case TIM_CHANNEL_2:
elmot 1:d0dfbce63a89 1236 {
elmot 1:d0dfbce63a89 1237 /* Disable the TIM Capture/Compare 2 DMA request */
elmot 1:d0dfbce63a89 1238 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
elmot 1:d0dfbce63a89 1239 }
elmot 1:d0dfbce63a89 1240 break;
elmot 1:d0dfbce63a89 1241
elmot 1:d0dfbce63a89 1242 case TIM_CHANNEL_3:
elmot 1:d0dfbce63a89 1243 {
elmot 1:d0dfbce63a89 1244 /* Disable the TIM Capture/Compare 3 DMA request */
elmot 1:d0dfbce63a89 1245 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
elmot 1:d0dfbce63a89 1246 }
elmot 1:d0dfbce63a89 1247 break;
elmot 1:d0dfbce63a89 1248
elmot 1:d0dfbce63a89 1249 case TIM_CHANNEL_4:
elmot 1:d0dfbce63a89 1250 {
elmot 1:d0dfbce63a89 1251 /* Disable the TIM Capture/Compare 4 DMA request */
elmot 1:d0dfbce63a89 1252 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
elmot 1:d0dfbce63a89 1253 }
elmot 1:d0dfbce63a89 1254 break;
elmot 1:d0dfbce63a89 1255
elmot 1:d0dfbce63a89 1256 default:
elmot 1:d0dfbce63a89 1257 break;
elmot 1:d0dfbce63a89 1258 }
elmot 1:d0dfbce63a89 1259
elmot 1:d0dfbce63a89 1260 /* Disable the complementary PWM output */
elmot 1:d0dfbce63a89 1261 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
elmot 1:d0dfbce63a89 1262
elmot 1:d0dfbce63a89 1263 /* Disable the Main Ouput */
elmot 1:d0dfbce63a89 1264 __HAL_TIM_MOE_DISABLE(htim);
elmot 1:d0dfbce63a89 1265
elmot 1:d0dfbce63a89 1266 /* Disable the Peripheral */
elmot 1:d0dfbce63a89 1267 __HAL_TIM_DISABLE(htim);
elmot 1:d0dfbce63a89 1268
elmot 1:d0dfbce63a89 1269 /* Change the htim state */
elmot 1:d0dfbce63a89 1270 htim->State = HAL_TIM_STATE_READY;
elmot 1:d0dfbce63a89 1271
elmot 1:d0dfbce63a89 1272 /* Return function status */
elmot 1:d0dfbce63a89 1273 return HAL_OK;
elmot 1:d0dfbce63a89 1274 }
elmot 1:d0dfbce63a89 1275
elmot 1:d0dfbce63a89 1276 /**
elmot 1:d0dfbce63a89 1277 * @}
elmot 1:d0dfbce63a89 1278 */
elmot 1:d0dfbce63a89 1279
elmot 1:d0dfbce63a89 1280 /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
elmot 1:d0dfbce63a89 1281 * @brief Timer Complementary One Pulse functions
elmot 1:d0dfbce63a89 1282 *
elmot 1:d0dfbce63a89 1283 @verbatim
elmot 1:d0dfbce63a89 1284 ==============================================================================
elmot 1:d0dfbce63a89 1285 ##### Timer Complementary One Pulse functions #####
elmot 1:d0dfbce63a89 1286 ==============================================================================
elmot 1:d0dfbce63a89 1287 [..]
elmot 1:d0dfbce63a89 1288 This section provides functions allowing to:
elmot 1:d0dfbce63a89 1289 (+) Start the Complementary One Pulse generation.
elmot 1:d0dfbce63a89 1290 (+) Stop the Complementary One Pulse.
elmot 1:d0dfbce63a89 1291 (+) Start the Complementary One Pulse and enable interrupts.
elmot 1:d0dfbce63a89 1292 (+) Stop the Complementary One Pulse and disable interrupts.
elmot 1:d0dfbce63a89 1293
elmot 1:d0dfbce63a89 1294 @endverbatim
elmot 1:d0dfbce63a89 1295 * @{
elmot 1:d0dfbce63a89 1296 */
elmot 1:d0dfbce63a89 1297
elmot 1:d0dfbce63a89 1298 /**
elmot 1:d0dfbce63a89 1299 * @brief Starts the TIM One Pulse signal generation on the complementary
elmot 1:d0dfbce63a89 1300 * output.
elmot 1:d0dfbce63a89 1301 * @param htim : TIM One Pulse handle
elmot 1:d0dfbce63a89 1302 * @param OutputChannel : TIM Channel to be enabled
elmot 1:d0dfbce63a89 1303 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1304 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 1305 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 1306 * @retval HAL status
elmot 1:d0dfbce63a89 1307 */
elmot 1:d0dfbce63a89 1308 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
elmot 1:d0dfbce63a89 1309 {
elmot 1:d0dfbce63a89 1310 /* Check the parameters */
elmot 1:d0dfbce63a89 1311 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
elmot 1:d0dfbce63a89 1312
elmot 1:d0dfbce63a89 1313 /* Enable the complementary One Pulse output */
elmot 1:d0dfbce63a89 1314 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
elmot 1:d0dfbce63a89 1315
elmot 1:d0dfbce63a89 1316 /* Enable the Main Ouput */
elmot 1:d0dfbce63a89 1317 __HAL_TIM_MOE_ENABLE(htim);
elmot 1:d0dfbce63a89 1318
elmot 1:d0dfbce63a89 1319 /* Return function status */
elmot 1:d0dfbce63a89 1320 return HAL_OK;
elmot 1:d0dfbce63a89 1321 }
elmot 1:d0dfbce63a89 1322
elmot 1:d0dfbce63a89 1323 /**
elmot 1:d0dfbce63a89 1324 * @brief Stops the TIM One Pulse signal generation on the complementary
elmot 1:d0dfbce63a89 1325 * output.
elmot 1:d0dfbce63a89 1326 * @param htim : TIM One Pulse handle
elmot 1:d0dfbce63a89 1327 * @param OutputChannel : TIM Channel to be disabled
elmot 1:d0dfbce63a89 1328 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1329 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 1330 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 1331 * @retval HAL status
elmot 1:d0dfbce63a89 1332 */
elmot 1:d0dfbce63a89 1333 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
elmot 1:d0dfbce63a89 1334 {
elmot 1:d0dfbce63a89 1335
elmot 1:d0dfbce63a89 1336 /* Check the parameters */
elmot 1:d0dfbce63a89 1337 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
elmot 1:d0dfbce63a89 1338
elmot 1:d0dfbce63a89 1339 /* Disable the complementary One Pulse output */
elmot 1:d0dfbce63a89 1340 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
elmot 1:d0dfbce63a89 1341
elmot 1:d0dfbce63a89 1342 /* Disable the Main Ouput */
elmot 1:d0dfbce63a89 1343 __HAL_TIM_MOE_DISABLE(htim);
elmot 1:d0dfbce63a89 1344
elmot 1:d0dfbce63a89 1345 /* Disable the Peripheral */
elmot 1:d0dfbce63a89 1346 __HAL_TIM_DISABLE(htim);
elmot 1:d0dfbce63a89 1347
elmot 1:d0dfbce63a89 1348 /* Return function status */
elmot 1:d0dfbce63a89 1349 return HAL_OK;
elmot 1:d0dfbce63a89 1350 }
elmot 1:d0dfbce63a89 1351
elmot 1:d0dfbce63a89 1352 /**
elmot 1:d0dfbce63a89 1353 * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
elmot 1:d0dfbce63a89 1354 * complementary channel.
elmot 1:d0dfbce63a89 1355 * @param htim : TIM One Pulse handle
elmot 1:d0dfbce63a89 1356 * @param OutputChannel : TIM Channel to be enabled
elmot 1:d0dfbce63a89 1357 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1358 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 1359 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 1360 * @retval HAL status
elmot 1:d0dfbce63a89 1361 */
elmot 1:d0dfbce63a89 1362 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
elmot 1:d0dfbce63a89 1363 {
elmot 1:d0dfbce63a89 1364 /* Check the parameters */
elmot 1:d0dfbce63a89 1365 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
elmot 1:d0dfbce63a89 1366
elmot 1:d0dfbce63a89 1367 /* Enable the TIM Capture/Compare 1 interrupt */
elmot 1:d0dfbce63a89 1368 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
elmot 1:d0dfbce63a89 1369
elmot 1:d0dfbce63a89 1370 /* Enable the TIM Capture/Compare 2 interrupt */
elmot 1:d0dfbce63a89 1371 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
elmot 1:d0dfbce63a89 1372
elmot 1:d0dfbce63a89 1373 /* Enable the complementary One Pulse output */
elmot 1:d0dfbce63a89 1374 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
elmot 1:d0dfbce63a89 1375
elmot 1:d0dfbce63a89 1376 /* Enable the Main Ouput */
elmot 1:d0dfbce63a89 1377 __HAL_TIM_MOE_ENABLE(htim);
elmot 1:d0dfbce63a89 1378
elmot 1:d0dfbce63a89 1379 /* Return function status */
elmot 1:d0dfbce63a89 1380 return HAL_OK;
elmot 1:d0dfbce63a89 1381 }
elmot 1:d0dfbce63a89 1382
elmot 1:d0dfbce63a89 1383 /**
elmot 1:d0dfbce63a89 1384 * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
elmot 1:d0dfbce63a89 1385 * complementary channel.
elmot 1:d0dfbce63a89 1386 * @param htim : TIM One Pulse handle
elmot 1:d0dfbce63a89 1387 * @param OutputChannel : TIM Channel to be disabled
elmot 1:d0dfbce63a89 1388 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1389 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 1390 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 1391 * @retval HAL status
elmot 1:d0dfbce63a89 1392 */
elmot 1:d0dfbce63a89 1393 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
elmot 1:d0dfbce63a89 1394 {
elmot 1:d0dfbce63a89 1395 /* Check the parameters */
elmot 1:d0dfbce63a89 1396 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
elmot 1:d0dfbce63a89 1397
elmot 1:d0dfbce63a89 1398 /* Disable the TIM Capture/Compare 1 interrupt */
elmot 1:d0dfbce63a89 1399 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
elmot 1:d0dfbce63a89 1400
elmot 1:d0dfbce63a89 1401 /* Disable the TIM Capture/Compare 2 interrupt */
elmot 1:d0dfbce63a89 1402 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
elmot 1:d0dfbce63a89 1403
elmot 1:d0dfbce63a89 1404 /* Disable the complementary One Pulse output */
elmot 1:d0dfbce63a89 1405 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
elmot 1:d0dfbce63a89 1406
elmot 1:d0dfbce63a89 1407 /* Disable the Main Ouput */
elmot 1:d0dfbce63a89 1408 __HAL_TIM_MOE_DISABLE(htim);
elmot 1:d0dfbce63a89 1409
elmot 1:d0dfbce63a89 1410 /* Disable the Peripheral */
elmot 1:d0dfbce63a89 1411 __HAL_TIM_DISABLE(htim);
elmot 1:d0dfbce63a89 1412
elmot 1:d0dfbce63a89 1413 /* Return function status */
elmot 1:d0dfbce63a89 1414 return HAL_OK;
elmot 1:d0dfbce63a89 1415 }
elmot 1:d0dfbce63a89 1416
elmot 1:d0dfbce63a89 1417 /**
elmot 1:d0dfbce63a89 1418 * @}
elmot 1:d0dfbce63a89 1419 */
elmot 1:d0dfbce63a89 1420
elmot 1:d0dfbce63a89 1421 /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
elmot 1:d0dfbce63a89 1422 * @brief Peripheral Control functions
elmot 1:d0dfbce63a89 1423 *
elmot 1:d0dfbce63a89 1424 @verbatim
elmot 1:d0dfbce63a89 1425 ==============================================================================
elmot 1:d0dfbce63a89 1426 ##### Peripheral Control functions #####
elmot 1:d0dfbce63a89 1427 ==============================================================================
elmot 1:d0dfbce63a89 1428 [..]
elmot 1:d0dfbce63a89 1429 This section provides functions allowing to:
elmot 1:d0dfbce63a89 1430 (+) Configure the commutation event in case of use of the Hall sensor interface.
elmot 1:d0dfbce63a89 1431 (+) Configure Output channels for OC and PWM mode.
elmot 1:d0dfbce63a89 1432
elmot 1:d0dfbce63a89 1433 (+) Configure Complementary channels, break features and dead time.
elmot 1:d0dfbce63a89 1434 (+) Configure Master synchronization.
elmot 1:d0dfbce63a89 1435 (+) Configure timer remapping capabilities.
elmot 1:d0dfbce63a89 1436 (+) Enable or disable channel grouping
elmot 1:d0dfbce63a89 1437
elmot 1:d0dfbce63a89 1438 @endverbatim
elmot 1:d0dfbce63a89 1439 * @{
elmot 1:d0dfbce63a89 1440 */
elmot 1:d0dfbce63a89 1441
elmot 1:d0dfbce63a89 1442 /**
elmot 1:d0dfbce63a89 1443 * @brief Configure the TIM commutation event sequence.
elmot 1:d0dfbce63a89 1444 * @note This function is mandatory to use the commutation event in order to
elmot 1:d0dfbce63a89 1445 * update the configuration at each commutation detection on the TRGI input of the Timer,
elmot 1:d0dfbce63a89 1446 * the typical use of this feature is with the use of another Timer(interface Timer)
elmot 1:d0dfbce63a89 1447 * configured in Hall sensor interface, this interface Timer will generate the
elmot 1:d0dfbce63a89 1448 * commutation at its TRGO output (connected to Timer used in this function) each time
elmot 1:d0dfbce63a89 1449 * the TI1 of the Interface Timer detect a commutation at its input TI1.
elmot 1:d0dfbce63a89 1450 * @param htim: TIM handle
elmot 1:d0dfbce63a89 1451 * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
elmot 1:d0dfbce63a89 1452 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1453 * @arg TIM_TS_ITR0: Internal trigger 0 selected
elmot 1:d0dfbce63a89 1454 * @arg TIM_TS_ITR1: Internal trigger 1 selected
elmot 1:d0dfbce63a89 1455 * @arg TIM_TS_ITR2: Internal trigger 2 selected
elmot 1:d0dfbce63a89 1456 * @arg TIM_TS_ITR3: Internal trigger 3 selected
elmot 1:d0dfbce63a89 1457 * @arg TIM_TS_NONE: No trigger is needed
elmot 1:d0dfbce63a89 1458 * @param CommutationSource : the Commutation Event source
elmot 1:d0dfbce63a89 1459 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1460 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
elmot 1:d0dfbce63a89 1461 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
elmot 1:d0dfbce63a89 1462 * @retval HAL status
elmot 1:d0dfbce63a89 1463 */
elmot 1:d0dfbce63a89 1464 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
elmot 1:d0dfbce63a89 1465 {
elmot 1:d0dfbce63a89 1466 /* Check the parameters */
elmot 1:d0dfbce63a89 1467 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 1468 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
elmot 1:d0dfbce63a89 1469
elmot 1:d0dfbce63a89 1470 __HAL_LOCK(htim);
elmot 1:d0dfbce63a89 1471
elmot 1:d0dfbce63a89 1472 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
elmot 1:d0dfbce63a89 1473 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
elmot 1:d0dfbce63a89 1474 {
elmot 1:d0dfbce63a89 1475 /* Select the Input trigger */
elmot 1:d0dfbce63a89 1476 htim->Instance->SMCR &= ~TIM_SMCR_TS;
elmot 1:d0dfbce63a89 1477 htim->Instance->SMCR |= InputTrigger;
elmot 1:d0dfbce63a89 1478 }
elmot 1:d0dfbce63a89 1479
elmot 1:d0dfbce63a89 1480 /* Select the Capture Compare preload feature */
elmot 1:d0dfbce63a89 1481 htim->Instance->CR2 |= TIM_CR2_CCPC;
elmot 1:d0dfbce63a89 1482 /* Select the Commutation event source */
elmot 1:d0dfbce63a89 1483 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
elmot 1:d0dfbce63a89 1484 htim->Instance->CR2 |= CommutationSource;
elmot 1:d0dfbce63a89 1485
elmot 1:d0dfbce63a89 1486 __HAL_UNLOCK(htim);
elmot 1:d0dfbce63a89 1487
elmot 1:d0dfbce63a89 1488 return HAL_OK;
elmot 1:d0dfbce63a89 1489 }
elmot 1:d0dfbce63a89 1490
elmot 1:d0dfbce63a89 1491 /**
elmot 1:d0dfbce63a89 1492 * @brief Configure the TIM commutation event sequence with interrupt.
elmot 1:d0dfbce63a89 1493 * @note This function is mandatory to use the commutation event in order to
elmot 1:d0dfbce63a89 1494 * update the configuration at each commutation detection on the TRGI input of the Timer,
elmot 1:d0dfbce63a89 1495 * the typical use of this feature is with the use of another Timer(interface Timer)
elmot 1:d0dfbce63a89 1496 * configured in Hall sensor interface, this interface Timer will generate the
elmot 1:d0dfbce63a89 1497 * commutation at its TRGO output (connected to Timer used in this function) each time
elmot 1:d0dfbce63a89 1498 * the TI1 of the Interface Timer detect a commutation at its input TI1.
elmot 1:d0dfbce63a89 1499 * @param htim: TIM handle
elmot 1:d0dfbce63a89 1500 * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
elmot 1:d0dfbce63a89 1501 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1502 * @arg TIM_TS_ITR0: Internal trigger 0 selected
elmot 1:d0dfbce63a89 1503 * @arg TIM_TS_ITR1: Internal trigger 1 selected
elmot 1:d0dfbce63a89 1504 * @arg TIM_TS_ITR2: Internal trigger 2 selected
elmot 1:d0dfbce63a89 1505 * @arg TIM_TS_ITR3: Internal trigger 3 selected
elmot 1:d0dfbce63a89 1506 * @arg TIM_TS_NONE: No trigger is needed
elmot 1:d0dfbce63a89 1507 * @param CommutationSource : the Commutation Event source
elmot 1:d0dfbce63a89 1508 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1509 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
elmot 1:d0dfbce63a89 1510 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
elmot 1:d0dfbce63a89 1511 * @retval HAL status
elmot 1:d0dfbce63a89 1512 */
elmot 1:d0dfbce63a89 1513 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
elmot 1:d0dfbce63a89 1514 {
elmot 1:d0dfbce63a89 1515 /* Check the parameters */
elmot 1:d0dfbce63a89 1516 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 1517 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
elmot 1:d0dfbce63a89 1518
elmot 1:d0dfbce63a89 1519 __HAL_LOCK(htim);
elmot 1:d0dfbce63a89 1520
elmot 1:d0dfbce63a89 1521 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
elmot 1:d0dfbce63a89 1522 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
elmot 1:d0dfbce63a89 1523 {
elmot 1:d0dfbce63a89 1524 /* Select the Input trigger */
elmot 1:d0dfbce63a89 1525 htim->Instance->SMCR &= ~TIM_SMCR_TS;
elmot 1:d0dfbce63a89 1526 htim->Instance->SMCR |= InputTrigger;
elmot 1:d0dfbce63a89 1527 }
elmot 1:d0dfbce63a89 1528
elmot 1:d0dfbce63a89 1529 /* Select the Capture Compare preload feature */
elmot 1:d0dfbce63a89 1530 htim->Instance->CR2 |= TIM_CR2_CCPC;
elmot 1:d0dfbce63a89 1531 /* Select the Commutation event source */
elmot 1:d0dfbce63a89 1532 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
elmot 1:d0dfbce63a89 1533 htim->Instance->CR2 |= CommutationSource;
elmot 1:d0dfbce63a89 1534
elmot 1:d0dfbce63a89 1535 /* Enable the Commutation Interrupt Request */
elmot 1:d0dfbce63a89 1536 __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
elmot 1:d0dfbce63a89 1537
elmot 1:d0dfbce63a89 1538 __HAL_UNLOCK(htim);
elmot 1:d0dfbce63a89 1539
elmot 1:d0dfbce63a89 1540 return HAL_OK;
elmot 1:d0dfbce63a89 1541 }
elmot 1:d0dfbce63a89 1542
elmot 1:d0dfbce63a89 1543 /**
elmot 1:d0dfbce63a89 1544 * @brief Configure the TIM commutation event sequence with DMA.
elmot 1:d0dfbce63a89 1545 * @note This function is mandatory to use the commutation event in order to
elmot 1:d0dfbce63a89 1546 * update the configuration at each commutation detection on the TRGI input of the Timer,
elmot 1:d0dfbce63a89 1547 * the typical use of this feature is with the use of another Timer(interface Timer)
elmot 1:d0dfbce63a89 1548 * configured in Hall sensor interface, this interface Timer will generate the
elmot 1:d0dfbce63a89 1549 * commutation at its TRGO output (connected to Timer used in this function) each time
elmot 1:d0dfbce63a89 1550 * the TI1 of the Interface Timer detect a commutation at its input TI1.
elmot 1:d0dfbce63a89 1551 * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
elmot 1:d0dfbce63a89 1552 * @param htim: TIM handle
elmot 1:d0dfbce63a89 1553 * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
elmot 1:d0dfbce63a89 1554 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1555 * @arg TIM_TS_ITR0: Internal trigger 0 selected
elmot 1:d0dfbce63a89 1556 * @arg TIM_TS_ITR1: Internal trigger 1 selected
elmot 1:d0dfbce63a89 1557 * @arg TIM_TS_ITR2: Internal trigger 2 selected
elmot 1:d0dfbce63a89 1558 * @arg TIM_TS_ITR3: Internal trigger 3 selected
elmot 1:d0dfbce63a89 1559 * @arg TIM_TS_NONE: No trigger is needed
elmot 1:d0dfbce63a89 1560 * @param CommutationSource : the Commutation Event source
elmot 1:d0dfbce63a89 1561 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1562 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
elmot 1:d0dfbce63a89 1563 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
elmot 1:d0dfbce63a89 1564 * @retval HAL status
elmot 1:d0dfbce63a89 1565 */
elmot 1:d0dfbce63a89 1566 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
elmot 1:d0dfbce63a89 1567 {
elmot 1:d0dfbce63a89 1568 /* Check the parameters */
elmot 1:d0dfbce63a89 1569 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 1570 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
elmot 1:d0dfbce63a89 1571
elmot 1:d0dfbce63a89 1572 __HAL_LOCK(htim);
elmot 1:d0dfbce63a89 1573
elmot 1:d0dfbce63a89 1574 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
elmot 1:d0dfbce63a89 1575 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
elmot 1:d0dfbce63a89 1576 {
elmot 1:d0dfbce63a89 1577 /* Select the Input trigger */
elmot 1:d0dfbce63a89 1578 htim->Instance->SMCR &= ~TIM_SMCR_TS;
elmot 1:d0dfbce63a89 1579 htim->Instance->SMCR |= InputTrigger;
elmot 1:d0dfbce63a89 1580 }
elmot 1:d0dfbce63a89 1581
elmot 1:d0dfbce63a89 1582 /* Select the Capture Compare preload feature */
elmot 1:d0dfbce63a89 1583 htim->Instance->CR2 |= TIM_CR2_CCPC;
elmot 1:d0dfbce63a89 1584 /* Select the Commutation event source */
elmot 1:d0dfbce63a89 1585 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
elmot 1:d0dfbce63a89 1586 htim->Instance->CR2 |= CommutationSource;
elmot 1:d0dfbce63a89 1587
elmot 1:d0dfbce63a89 1588 /* Enable the Commutation DMA Request */
elmot 1:d0dfbce63a89 1589 /* Set the DMA Commutation Callback */
elmot 1:d0dfbce63a89 1590 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
elmot 1:d0dfbce63a89 1591 /* Set the DMA error callback */
elmot 1:d0dfbce63a89 1592 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
elmot 1:d0dfbce63a89 1593
elmot 1:d0dfbce63a89 1594 /* Enable the Commutation DMA Request */
elmot 1:d0dfbce63a89 1595 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
elmot 1:d0dfbce63a89 1596
elmot 1:d0dfbce63a89 1597 __HAL_UNLOCK(htim);
elmot 1:d0dfbce63a89 1598
elmot 1:d0dfbce63a89 1599 return HAL_OK;
elmot 1:d0dfbce63a89 1600 }
elmot 1:d0dfbce63a89 1601
elmot 1:d0dfbce63a89 1602 /**
elmot 1:d0dfbce63a89 1603 * @brief Configures the TIM in master mode.
elmot 1:d0dfbce63a89 1604 * @param htim: TIM handle.
elmot 1:d0dfbce63a89 1605 * @param sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that
elmot 1:d0dfbce63a89 1606 * contains the selected trigger output (TRGO) and the Master/Slave
elmot 1:d0dfbce63a89 1607 * mode.
elmot 1:d0dfbce63a89 1608 * @retval HAL status
elmot 1:d0dfbce63a89 1609 */
elmot 1:d0dfbce63a89 1610 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
elmot 1:d0dfbce63a89 1611 TIM_MasterConfigTypeDef * sMasterConfig)
elmot 1:d0dfbce63a89 1612 {
elmot 1:d0dfbce63a89 1613 uint32_t tmpcr2;
elmot 1:d0dfbce63a89 1614 uint32_t tmpsmcr;
elmot 1:d0dfbce63a89 1615
elmot 1:d0dfbce63a89 1616 /* Check the parameters */
elmot 1:d0dfbce63a89 1617 assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 1618 assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
elmot 1:d0dfbce63a89 1619 assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
elmot 1:d0dfbce63a89 1620
elmot 1:d0dfbce63a89 1621 /* Check input state */
elmot 1:d0dfbce63a89 1622 __HAL_LOCK(htim);
elmot 1:d0dfbce63a89 1623
elmot 1:d0dfbce63a89 1624 /* Get the TIMx CR2 register value */
elmot 1:d0dfbce63a89 1625 tmpcr2 = htim->Instance->CR2;
elmot 1:d0dfbce63a89 1626
elmot 1:d0dfbce63a89 1627 /* Get the TIMx SMCR register value */
elmot 1:d0dfbce63a89 1628 tmpsmcr = htim->Instance->SMCR;
elmot 1:d0dfbce63a89 1629
elmot 1:d0dfbce63a89 1630 /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
elmot 1:d0dfbce63a89 1631 if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
elmot 1:d0dfbce63a89 1632 {
elmot 1:d0dfbce63a89 1633 /* Check the parameters */
elmot 1:d0dfbce63a89 1634 assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
elmot 1:d0dfbce63a89 1635
elmot 1:d0dfbce63a89 1636 /* Clear the MMS2 bits */
elmot 1:d0dfbce63a89 1637 tmpcr2 &= ~TIM_CR2_MMS2;
elmot 1:d0dfbce63a89 1638 /* Select the TRGO2 source*/
elmot 1:d0dfbce63a89 1639 tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
elmot 1:d0dfbce63a89 1640 }
elmot 1:d0dfbce63a89 1641
elmot 1:d0dfbce63a89 1642 /* Reset the MMS Bits */
elmot 1:d0dfbce63a89 1643 tmpcr2 &= ~TIM_CR2_MMS;
elmot 1:d0dfbce63a89 1644 /* Select the TRGO source */
elmot 1:d0dfbce63a89 1645 tmpcr2 |= sMasterConfig->MasterOutputTrigger;
elmot 1:d0dfbce63a89 1646
elmot 1:d0dfbce63a89 1647 /* Reset the MSM Bit */
elmot 1:d0dfbce63a89 1648 tmpsmcr &= ~TIM_SMCR_MSM;
elmot 1:d0dfbce63a89 1649 /* Set master mode */
elmot 1:d0dfbce63a89 1650 tmpsmcr |= sMasterConfig->MasterSlaveMode;
elmot 1:d0dfbce63a89 1651
elmot 1:d0dfbce63a89 1652 /* Update TIMx CR2 */
elmot 1:d0dfbce63a89 1653 htim->Instance->CR2 = tmpcr2;
elmot 1:d0dfbce63a89 1654
elmot 1:d0dfbce63a89 1655 /* Update TIMx SMCR */
elmot 1:d0dfbce63a89 1656 htim->Instance->SMCR = tmpsmcr;
elmot 1:d0dfbce63a89 1657
elmot 1:d0dfbce63a89 1658 __HAL_UNLOCK(htim);
elmot 1:d0dfbce63a89 1659
elmot 1:d0dfbce63a89 1660 return HAL_OK;
elmot 1:d0dfbce63a89 1661 }
elmot 1:d0dfbce63a89 1662
elmot 1:d0dfbce63a89 1663 /**
elmot 1:d0dfbce63a89 1664 * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
elmot 1:d0dfbce63a89 1665 * and the AOE(automatic output enable).
elmot 1:d0dfbce63a89 1666 * @param htim: TIM handle
elmot 1:d0dfbce63a89 1667 * @param sBreakDeadTimeConfig: pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
elmot 1:d0dfbce63a89 1668 * contains the BDTR Register configuration information for the TIM peripheral.
elmot 1:d0dfbce63a89 1669 * @retval HAL status
elmot 1:d0dfbce63a89 1670 */
elmot 1:d0dfbce63a89 1671 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
elmot 1:d0dfbce63a89 1672 TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig)
elmot 1:d0dfbce63a89 1673 {
elmot 1:d0dfbce63a89 1674 uint32_t tmpbdtr = 0;
elmot 1:d0dfbce63a89 1675
elmot 1:d0dfbce63a89 1676 /* Check the parameters */
elmot 1:d0dfbce63a89 1677 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 1678 assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
elmot 1:d0dfbce63a89 1679 assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
elmot 1:d0dfbce63a89 1680 assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
elmot 1:d0dfbce63a89 1681 assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
elmot 1:d0dfbce63a89 1682 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
elmot 1:d0dfbce63a89 1683 assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
elmot 1:d0dfbce63a89 1684 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
elmot 1:d0dfbce63a89 1685 assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
elmot 1:d0dfbce63a89 1686
elmot 1:d0dfbce63a89 1687 /* Check input state */
elmot 1:d0dfbce63a89 1688 __HAL_LOCK(htim);
elmot 1:d0dfbce63a89 1689
elmot 1:d0dfbce63a89 1690 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
elmot 1:d0dfbce63a89 1691 the OSSI State, the dead time value and the Automatic Output Enable Bit */
elmot 1:d0dfbce63a89 1692 if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
elmot 1:d0dfbce63a89 1693 {
elmot 1:d0dfbce63a89 1694 assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
elmot 1:d0dfbce63a89 1695 assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
elmot 1:d0dfbce63a89 1696 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
elmot 1:d0dfbce63a89 1697
elmot 1:d0dfbce63a89 1698 /* Clear the BDTR bits */
elmot 1:d0dfbce63a89 1699 tmpbdtr &= ~(TIM_BDTR_DTG | TIM_BDTR_LOCK | TIM_BDTR_OSSI |
elmot 1:d0dfbce63a89 1700 TIM_BDTR_OSSR | TIM_BDTR_BKE | TIM_BDTR_BKP |
elmot 1:d0dfbce63a89 1701 TIM_BDTR_AOE | TIM_BDTR_MOE | TIM_BDTR_BKF |
elmot 1:d0dfbce63a89 1702 TIM_BDTR_BK2F | TIM_BDTR_BK2E | TIM_BDTR_BK2P);
elmot 1:d0dfbce63a89 1703
elmot 1:d0dfbce63a89 1704 /* Set the BDTR bits */
elmot 1:d0dfbce63a89 1705 tmpbdtr |= sBreakDeadTimeConfig->DeadTime;
elmot 1:d0dfbce63a89 1706 tmpbdtr |= sBreakDeadTimeConfig->LockLevel;
elmot 1:d0dfbce63a89 1707 tmpbdtr |= sBreakDeadTimeConfig->OffStateIDLEMode;
elmot 1:d0dfbce63a89 1708 tmpbdtr |= sBreakDeadTimeConfig->OffStateRunMode;
elmot 1:d0dfbce63a89 1709 tmpbdtr |= sBreakDeadTimeConfig->BreakState;
elmot 1:d0dfbce63a89 1710 tmpbdtr |= sBreakDeadTimeConfig->BreakPolarity;
elmot 1:d0dfbce63a89 1711 tmpbdtr |= sBreakDeadTimeConfig->AutomaticOutput;
elmot 1:d0dfbce63a89 1712 tmpbdtr |= (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT);
elmot 1:d0dfbce63a89 1713 tmpbdtr |= (sBreakDeadTimeConfig->Break2Filter << BDTR_BK2F_SHIFT);
elmot 1:d0dfbce63a89 1714 tmpbdtr |= sBreakDeadTimeConfig->Break2State;
elmot 1:d0dfbce63a89 1715 tmpbdtr |= sBreakDeadTimeConfig->Break2Polarity;
elmot 1:d0dfbce63a89 1716 }
elmot 1:d0dfbce63a89 1717 else
elmot 1:d0dfbce63a89 1718 {
elmot 1:d0dfbce63a89 1719 /* Clear the BDTR bits */
elmot 1:d0dfbce63a89 1720 tmpbdtr &= ~(TIM_BDTR_DTG | TIM_BDTR_LOCK | TIM_BDTR_OSSI |
elmot 1:d0dfbce63a89 1721 TIM_BDTR_OSSR | TIM_BDTR_BKE | TIM_BDTR_BKP |
elmot 1:d0dfbce63a89 1722 TIM_BDTR_AOE | TIM_BDTR_MOE | TIM_BDTR_BKF);
elmot 1:d0dfbce63a89 1723
elmot 1:d0dfbce63a89 1724 /* Set the BDTR bits */
elmot 1:d0dfbce63a89 1725 tmpbdtr |= sBreakDeadTimeConfig->DeadTime;
elmot 1:d0dfbce63a89 1726 tmpbdtr |= sBreakDeadTimeConfig->LockLevel;
elmot 1:d0dfbce63a89 1727 tmpbdtr |= sBreakDeadTimeConfig->OffStateIDLEMode;
elmot 1:d0dfbce63a89 1728 tmpbdtr |= sBreakDeadTimeConfig->OffStateRunMode;
elmot 1:d0dfbce63a89 1729 tmpbdtr |= sBreakDeadTimeConfig->BreakState;
elmot 1:d0dfbce63a89 1730 tmpbdtr |= sBreakDeadTimeConfig->BreakPolarity;
elmot 1:d0dfbce63a89 1731 tmpbdtr |= sBreakDeadTimeConfig->AutomaticOutput;
elmot 1:d0dfbce63a89 1732 tmpbdtr |= (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT);
elmot 1:d0dfbce63a89 1733 }
elmot 1:d0dfbce63a89 1734
elmot 1:d0dfbce63a89 1735 /* Set TIMx_BDTR */
elmot 1:d0dfbce63a89 1736 htim->Instance->BDTR = tmpbdtr;
elmot 1:d0dfbce63a89 1737
elmot 1:d0dfbce63a89 1738 __HAL_UNLOCK(htim);
elmot 1:d0dfbce63a89 1739
elmot 1:d0dfbce63a89 1740 return HAL_OK;
elmot 1:d0dfbce63a89 1741 }
elmot 1:d0dfbce63a89 1742
elmot 1:d0dfbce63a89 1743 /**
elmot 1:d0dfbce63a89 1744 * @brief Configures the break input source.
elmot 1:d0dfbce63a89 1745 * @param htim: TIM handle.
elmot 1:d0dfbce63a89 1746 * @param BreakInput: Break input to configure
elmot 1:d0dfbce63a89 1747 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1748 * @arg TIM_BREAKINPUT_BRK: Timer break input
elmot 1:d0dfbce63a89 1749 * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
elmot 1:d0dfbce63a89 1750 * @param sBreakInputConfig: Break input source configuration
elmot 1:d0dfbce63a89 1751 * @retval HAL status
elmot 1:d0dfbce63a89 1752 */
elmot 1:d0dfbce63a89 1753 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
elmot 1:d0dfbce63a89 1754 uint32_t BreakInput,
elmot 1:d0dfbce63a89 1755 TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
elmot 1:d0dfbce63a89 1756
elmot 1:d0dfbce63a89 1757 {
elmot 1:d0dfbce63a89 1758 uint32_t tmporx = 0;
elmot 1:d0dfbce63a89 1759 uint32_t bkin_enable_mask = 0;
elmot 1:d0dfbce63a89 1760 uint32_t bkin_polarity_mask = 0;
elmot 1:d0dfbce63a89 1761 uint32_t bkin_enable_bitpos = 0;
elmot 1:d0dfbce63a89 1762 uint32_t bkin_polarity_bitpos = 0;
elmot 1:d0dfbce63a89 1763
elmot 1:d0dfbce63a89 1764 /* Check the parameters */
elmot 1:d0dfbce63a89 1765 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 1766 assert_param(IS_TIM_BREAKINPUT(BreakInput));
elmot 1:d0dfbce63a89 1767 assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source));
elmot 1:d0dfbce63a89 1768 assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable));
elmot 1:d0dfbce63a89 1769
elmot 1:d0dfbce63a89 1770 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
elmot 1:d0dfbce63a89 1771 if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
elmot 1:d0dfbce63a89 1772 {
elmot 1:d0dfbce63a89 1773 assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
elmot 1:d0dfbce63a89 1774 }
elmot 1:d0dfbce63a89 1775 #else
elmot 1:d0dfbce63a89 1776 assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
elmot 1:d0dfbce63a89 1777 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
elmot 1:d0dfbce63a89 1778
elmot 1:d0dfbce63a89 1779 /* Check input state */
elmot 1:d0dfbce63a89 1780 __HAL_LOCK(htim);
elmot 1:d0dfbce63a89 1781
elmot 1:d0dfbce63a89 1782 switch(sBreakInputConfig->Source)
elmot 1:d0dfbce63a89 1783 {
elmot 1:d0dfbce63a89 1784 case TIM_BREAKINPUTSOURCE_BKIN:
elmot 1:d0dfbce63a89 1785 {
elmot 1:d0dfbce63a89 1786 bkin_enable_mask = TIM1_OR2_BKINE;
elmot 1:d0dfbce63a89 1787 bkin_enable_bitpos = 0;
elmot 1:d0dfbce63a89 1788 bkin_polarity_mask = TIM1_OR2_BKINP;
elmot 1:d0dfbce63a89 1789 bkin_polarity_bitpos = 9;
elmot 1:d0dfbce63a89 1790 }
elmot 1:d0dfbce63a89 1791 break;
elmot 1:d0dfbce63a89 1792 case TIM_BREAKINPUTSOURCE_COMP1:
elmot 1:d0dfbce63a89 1793 {
elmot 1:d0dfbce63a89 1794 bkin_enable_mask = TIM1_OR2_BKCMP1E;
elmot 1:d0dfbce63a89 1795 bkin_enable_bitpos = 1;
elmot 1:d0dfbce63a89 1796 bkin_polarity_mask = TIM1_OR2_BKCMP1P;
elmot 1:d0dfbce63a89 1797 bkin_polarity_bitpos = 10;
elmot 1:d0dfbce63a89 1798 }
elmot 1:d0dfbce63a89 1799 break;
elmot 1:d0dfbce63a89 1800 case TIM_BREAKINPUTSOURCE_COMP2:
elmot 1:d0dfbce63a89 1801 {
elmot 1:d0dfbce63a89 1802 bkin_enable_mask = TIM1_OR2_BKCMP2E;
elmot 1:d0dfbce63a89 1803 bkin_enable_bitpos = 2;
elmot 1:d0dfbce63a89 1804 bkin_polarity_mask = TIM1_OR2_BKCMP2P;
elmot 1:d0dfbce63a89 1805 bkin_polarity_bitpos = 11;
elmot 1:d0dfbce63a89 1806 }
elmot 1:d0dfbce63a89 1807 break;
elmot 1:d0dfbce63a89 1808
elmot 1:d0dfbce63a89 1809 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
elmot 1:d0dfbce63a89 1810 case TIM_BREAKINPUTSOURCE_DFSDM1:
elmot 1:d0dfbce63a89 1811 {
elmot 1:d0dfbce63a89 1812 bkin_enable_mask = TIM1_OR2_BKDF1BK0E;
elmot 1:d0dfbce63a89 1813 bkin_enable_bitpos = 8;
elmot 1:d0dfbce63a89 1814 }
elmot 1:d0dfbce63a89 1815 break;
elmot 1:d0dfbce63a89 1816 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
elmot 1:d0dfbce63a89 1817
elmot 1:d0dfbce63a89 1818 default:
elmot 1:d0dfbce63a89 1819 break;
elmot 1:d0dfbce63a89 1820 }
elmot 1:d0dfbce63a89 1821
elmot 1:d0dfbce63a89 1822 switch(BreakInput)
elmot 1:d0dfbce63a89 1823 {
elmot 1:d0dfbce63a89 1824 case TIM_BREAKINPUT_BRK:
elmot 1:d0dfbce63a89 1825 {
elmot 1:d0dfbce63a89 1826 /* Get the TIMx_OR2 register value */
elmot 1:d0dfbce63a89 1827 tmporx = htim->Instance->OR2;
elmot 1:d0dfbce63a89 1828
elmot 1:d0dfbce63a89 1829 /* Enable the break input */
elmot 1:d0dfbce63a89 1830 tmporx &= ~bkin_enable_mask;
elmot 1:d0dfbce63a89 1831 tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
elmot 1:d0dfbce63a89 1832
elmot 1:d0dfbce63a89 1833 /* Set the break input polarity */
elmot 1:d0dfbce63a89 1834 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
elmot 1:d0dfbce63a89 1835 if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
elmot 1:d0dfbce63a89 1836 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
elmot 1:d0dfbce63a89 1837 {
elmot 1:d0dfbce63a89 1838 tmporx &= ~bkin_polarity_mask;
elmot 1:d0dfbce63a89 1839 tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
elmot 1:d0dfbce63a89 1840 }
elmot 1:d0dfbce63a89 1841
elmot 1:d0dfbce63a89 1842 /* Set TIMx_OR2 */
elmot 1:d0dfbce63a89 1843 htim->Instance->OR2 = tmporx;
elmot 1:d0dfbce63a89 1844 }
elmot 1:d0dfbce63a89 1845 break;
elmot 1:d0dfbce63a89 1846 case TIM_BREAKINPUT_BRK2:
elmot 1:d0dfbce63a89 1847 {
elmot 1:d0dfbce63a89 1848 /* Get the TIMx_OR3 register value */
elmot 1:d0dfbce63a89 1849 tmporx = htim->Instance->OR3;
elmot 1:d0dfbce63a89 1850
elmot 1:d0dfbce63a89 1851 /* Enable the break input */
elmot 1:d0dfbce63a89 1852 tmporx &= ~bkin_enable_mask;
elmot 1:d0dfbce63a89 1853 tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
elmot 1:d0dfbce63a89 1854
elmot 1:d0dfbce63a89 1855 /* Set the break input polarity */
elmot 1:d0dfbce63a89 1856 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
elmot 1:d0dfbce63a89 1857 if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
elmot 1:d0dfbce63a89 1858 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
elmot 1:d0dfbce63a89 1859 {
elmot 1:d0dfbce63a89 1860 tmporx &= ~bkin_polarity_mask;
elmot 1:d0dfbce63a89 1861 tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
elmot 1:d0dfbce63a89 1862 }
elmot 1:d0dfbce63a89 1863
elmot 1:d0dfbce63a89 1864 /* Set TIMx_OR3 */
elmot 1:d0dfbce63a89 1865 htim->Instance->OR3 = tmporx;
elmot 1:d0dfbce63a89 1866 }
elmot 1:d0dfbce63a89 1867 break;
elmot 1:d0dfbce63a89 1868 default:
elmot 1:d0dfbce63a89 1869 break;
elmot 1:d0dfbce63a89 1870 }
elmot 1:d0dfbce63a89 1871
elmot 1:d0dfbce63a89 1872 __HAL_UNLOCK(htim);
elmot 1:d0dfbce63a89 1873
elmot 1:d0dfbce63a89 1874 return HAL_OK;
elmot 1:d0dfbce63a89 1875 }
elmot 1:d0dfbce63a89 1876
elmot 1:d0dfbce63a89 1877 /**
elmot 1:d0dfbce63a89 1878 * @brief Configures the TIMx Remapping input capabilities.
elmot 1:d0dfbce63a89 1879 * @param htim: TIM handle.
elmot 1:d0dfbce63a89 1880 * @param Remap: specifies the TIM remapping source.
elmot 1:d0dfbce63a89 1881 *
elmot 1:d0dfbce63a89 1882 @if STM32L486xx
elmot 1:d0dfbce63a89 1883 * For TIM1, the parameter is a combination of 4 fields (field1 | field2 | field3 | field4):
elmot 1:d0dfbce63a89 1884 *
elmot 1:d0dfbce63a89 1885 * field1 can have the following values:
elmot 1:d0dfbce63a89 1886 * @arg TIM_TIM1_ETR_ADC1_NONE: TIM1_ETR is not connected to any ADC1 AWD (analog watchdog)
elmot 1:d0dfbce63a89 1887 * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1
elmot 1:d0dfbce63a89 1888 * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2
elmot 1:d0dfbce63a89 1889 * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3
elmot 1:d0dfbce63a89 1890 *
elmot 1:d0dfbce63a89 1891 * field2 can have the following values:
elmot 1:d0dfbce63a89 1892 * @arg TIM_TIM1_ETR_ADC3_NONE: TIM1_ETR is not connected to any ADC3 AWD (analog watchdog)
elmot 1:d0dfbce63a89 1893 * @arg TIM_TIM1_ETR_ADC3_AWD1: TIM1_ETR is connected to ADC3 AWD1
elmot 1:d0dfbce63a89 1894 * @arg TIM_TIM1_ETR_ADC3_AWD2: TIM1_ETR is connected to ADC3 AWD2
elmot 1:d0dfbce63a89 1895 * @arg TIM_TIM1_ETR_ADC3_AWD3: TIM1_ETR is connected to ADC3 AWD3
elmot 1:d0dfbce63a89 1896 *
elmot 1:d0dfbce63a89 1897 * field3 can have the following values:
elmot 1:d0dfbce63a89 1898 * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO
elmot 1:d0dfbce63a89 1899 * @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output
elmot 1:d0dfbce63a89 1900 *
elmot 1:d0dfbce63a89 1901 * field4 can have the following values:
elmot 1:d0dfbce63a89 1902 * @arg TIM_TIM1_ETR_COMP1: TIM1_ETR is connected to COMP1 output
elmot 1:d0dfbce63a89 1903 * @arg TIM_TIM1_ETR_COMP2: TIM1_ETR is connected to COMP2 output
elmot 1:d0dfbce63a89 1904 * @note When field4 is set to TIM_TIM1_ETR_COMP1 or TIM_TIM1_ETR_COMP2 field1 and field2 values are not significant
elmot 1:d0dfbce63a89 1905 @endif
elmot 1:d0dfbce63a89 1906 @if STM32L443xx
elmot 1:d0dfbce63a89 1907 * For TIM1, the parameter is a combination of 3 fields (field1 | field2 | field3):
elmot 1:d0dfbce63a89 1908 *
elmot 1:d0dfbce63a89 1909 * field1 can have the following values:
elmot 1:d0dfbce63a89 1910 * @arg TIM_TIM1_ETR_ADC1_NONE: TIM1_ETR is not connected to any ADC1 AWD (analog watchdog)
elmot 1:d0dfbce63a89 1911 * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1
elmot 1:d0dfbce63a89 1912 * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2
elmot 1:d0dfbce63a89 1913 * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3
elmot 1:d0dfbce63a89 1914 *
elmot 1:d0dfbce63a89 1915 * field2 can have the following values:
elmot 1:d0dfbce63a89 1916 * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO
elmot 1:d0dfbce63a89 1917 * @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output
elmot 1:d0dfbce63a89 1918 *
elmot 1:d0dfbce63a89 1919 * field3 can have the following values:
elmot 1:d0dfbce63a89 1920 * @arg TIM_TIM1_ETR_COMP1: TIM1_ETR is connected to COMP1 output
elmot 1:d0dfbce63a89 1921 * @arg TIM_TIM1_ETR_COMP2: TIM1_ETR is connected to COMP2 output
elmot 1:d0dfbce63a89 1922 *
elmot 1:d0dfbce63a89 1923 * @note When field3 is set to TIM_TIM1_ETR_COMP1 or TIM_TIM1_ETR_COMP2 field1 values is not significant
elmot 1:d0dfbce63a89 1924 *
elmot 1:d0dfbce63a89 1925 @endif
elmot 1:d0dfbce63a89 1926 @if STM32L486xx
elmot 1:d0dfbce63a89 1927 * For TIM2, the parameter is a combination of 3 fields (field1 | field2 | field3):
elmot 1:d0dfbce63a89 1928 *
elmot 1:d0dfbce63a89 1929 * field1 can have the following values:
elmot 1:d0dfbce63a89 1930 * @arg TIM_TIM2_ITR1_TIM8_TRGO: TIM2_ITR1 is connected to TIM8_TRGO
elmot 1:d0dfbce63a89 1931 * @arg TIM_TIM2_ITR1_OTG_FS_SOF: TIM2_ITR1 is connected to OTG_FS SOF
elmot 1:d0dfbce63a89 1932 *
elmot 1:d0dfbce63a89 1933 * field2 can have the following values:
elmot 1:d0dfbce63a89 1934 * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO
elmot 1:d0dfbce63a89 1935 * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE
elmot 1:d0dfbce63a89 1936 * @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output
elmot 1:d0dfbce63a89 1937 * @arg TIM_TIM2_ETR_COMP2: TIM2_ETR is connected to COMP2 output
elmot 1:d0dfbce63a89 1938 *
elmot 1:d0dfbce63a89 1939 * field3 can have the following values:
elmot 1:d0dfbce63a89 1940 * @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to GPIO
elmot 1:d0dfbce63a89 1941 * @arg TIM_TIM2_TI4_COMP1: TIM2 TI4 is connected to COMP1 output
elmot 1:d0dfbce63a89 1942 * @arg TIM_TIM2_TI4_COMP2: TIM2 TI4 is connected to COMP2 output
elmot 1:d0dfbce63a89 1943 * @arg TIM_TIM2_TI4_COMP1_COMP2: TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output
elmot 1:d0dfbce63a89 1944 @endif
elmot 1:d0dfbce63a89 1945 @if STM32L443xx
elmot 1:d0dfbce63a89 1946 * For TIM2, the parameter is a combination of 3 fields (field1 | field2 | field3):
elmot 1:d0dfbce63a89 1947 *
elmot 1:d0dfbce63a89 1948 * field1 can have the following values:
elmot 1:d0dfbce63a89 1949 * @arg TIM_TIM2_ITR1_NONE: No internal trigger on TIM2_ITR1
elmot 1:d0dfbce63a89 1950 * @arg TIM_TIM2_ITR1_USB_SOF: TIM2_ITR1 is connected to USB SOF
elmot 1:d0dfbce63a89 1951 *
elmot 1:d0dfbce63a89 1952 * field2 can have the following values:
elmot 1:d0dfbce63a89 1953 * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO
elmot 1:d0dfbce63a89 1954 * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE
elmot 1:d0dfbce63a89 1955 * @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output
elmot 1:d0dfbce63a89 1956 * @arg TIM_TIM2_ETR_COMP2: TIM2_ETR is connected to COMP2 output
elmot 1:d0dfbce63a89 1957 *
elmot 1:d0dfbce63a89 1958 * field3 can have the following values:
elmot 1:d0dfbce63a89 1959 * @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to GPIO
elmot 1:d0dfbce63a89 1960 * @arg TIM_TIM2_TI4_COMP1: TIM2 TI4 is connected to COMP1 output
elmot 1:d0dfbce63a89 1961 * @arg TIM_TIM2_TI4_COMP2: TIM2 TI4 is connected to COMP2 output
elmot 1:d0dfbce63a89 1962 * @arg TIM_TIM2_TI4_COMP1_COMP2: TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output
elmot 1:d0dfbce63a89 1963 *
elmot 1:d0dfbce63a89 1964 @endif
elmot 1:d0dfbce63a89 1965 @if STM32L486xx
elmot 1:d0dfbce63a89 1966 * For TIM3, the parameter is a combination 2 fields(field1 | field2):
elmot 1:d0dfbce63a89 1967 *
elmot 1:d0dfbce63a89 1968 * field1 can have the following values:
elmot 1:d0dfbce63a89 1969 * @arg TIM_TIM3_TI1_GPIO: TIM3 TI1 is connected to GPIO
elmot 1:d0dfbce63a89 1970 * @arg TIM_TIM3_TI1_COMP1: TIM3 TI1 is connected to COMP1 output
elmot 1:d0dfbce63a89 1971 * @arg TIM_TIM3_TI1_COMP2: TIM3 TI1 is connected to COMP2 output
elmot 1:d0dfbce63a89 1972 * @arg TIM_TIM3_TI1_COMP1_COMP2: TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output
elmot 1:d0dfbce63a89 1973 *
elmot 1:d0dfbce63a89 1974 * field2 can have the following values:
elmot 1:d0dfbce63a89 1975 * @arg TIM_TIM3_ETR_GPIO: TIM3_ETR is connected to GPIO
elmot 1:d0dfbce63a89 1976 * @arg TIM_TIM3_ETR_COMP1: TIM3_ETR is connected to COMP1 output
elmot 1:d0dfbce63a89 1977 *
elmot 1:d0dfbce63a89 1978 @endif
elmot 1:d0dfbce63a89 1979 @if STM32L486xx
elmot 1:d0dfbce63a89 1980 * For TIM8, the parameter is a combination of 3 fields (field1 | field2 | field3):
elmot 1:d0dfbce63a89 1981 *
elmot 1:d0dfbce63a89 1982 * field1 can have the following values:
elmot 1:d0dfbce63a89 1983 * @arg TIM_TIM8_ETR_ADC2_NONE: TIM8_ETR is not connected to any ADC2 AWD (analog watchdog)
elmot 1:d0dfbce63a89 1984 * @arg TIM_TIM8_ETR_ADC2_AWD1: TIM8_ETR is connected to ADC2 AWD1
elmot 1:d0dfbce63a89 1985 * @arg TIM_TIM8_ETR_ADC2_AWD2: TIM8_ETR is connected to ADC2 AWD2
elmot 1:d0dfbce63a89 1986 * @arg TIM_TIM8_ETR_ADC2_AWD3: TIM8_ETR is connected to ADC2 AWD3
elmot 1:d0dfbce63a89 1987 *
elmot 1:d0dfbce63a89 1988 * field2 can have the following values:
elmot 1:d0dfbce63a89 1989 * @arg TIM_TIM8_ETR_ADC3_NONE: TIM8_ETR is not connected to any ADC3 AWD (analog watchdog)
elmot 1:d0dfbce63a89 1990 * @arg TIM_TIM8_ETR_ADC3_AWD1: TIM8_ETR is connected to ADC3 AWD1
elmot 1:d0dfbce63a89 1991 * @arg TIM_TIM8_ETR_ADC3_AWD2: TIM8_ETR is connected to ADC3 AWD2
elmot 1:d0dfbce63a89 1992 * @arg TIM_TIM8_ETR_ADC3_AWD3: TIM8_ETR is connected to ADC3 AWD3
elmot 1:d0dfbce63a89 1993 *
elmot 1:d0dfbce63a89 1994 * field3 can have the following values:
elmot 1:d0dfbce63a89 1995 * @arg TIM_TIM8_TI1_GPIO: TIM8 TI1 is connected to GPIO
elmot 1:d0dfbce63a89 1996 * @arg TIM_TIM8_TI1_COMP2: TIM8 TI1 is connected to COMP2 output
elmot 1:d0dfbce63a89 1997 *
elmot 1:d0dfbce63a89 1998 * field4 can have the following values:
elmot 1:d0dfbce63a89 1999 * @arg TIM_TIM8_ETR_COMP1: TIM8_ETR is connected to COMP1 output
elmot 1:d0dfbce63a89 2000 * @arg TIM_TIM8_ETR_COMP2: TIM8_ETR is connected to COMP2 output
elmot 1:d0dfbce63a89 2001 * @note When field4 is set to TIM_TIM8_ETR_COMP1 or TIM_TIM8_ETR_COMP2 field1 and field2 values are not significant
elmot 1:d0dfbce63a89 2002 *
elmot 1:d0dfbce63a89 2003 @endif
elmot 1:d0dfbce63a89 2004 * For TIM15, the parameter is a combination of 3 fields (field1 | field2):
elmot 1:d0dfbce63a89 2005 *
elmot 1:d0dfbce63a89 2006 * field1 can have the following values:
elmot 1:d0dfbce63a89 2007 * @arg TIM_TIM15_TI1_GPIO: TIM15 TI1 is connected to GPIO
elmot 1:d0dfbce63a89 2008 * @arg TIM_TIM15_TI1_LSE: TIM15 TI1 is connected to LSE
elmot 1:d0dfbce63a89 2009 *
elmot 1:d0dfbce63a89 2010 * field2 can have the following values:
elmot 1:d0dfbce63a89 2011 * @arg TIM_TIM15_ENCODERMODE_NONE: No redirection
elmot 1:d0dfbce63a89 2012 * @arg TIM_TIM15_ENCODERMODE_TIM2: TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
elmot 1:d0dfbce63a89 2013 * @arg TIM_TIM15_ENCODERMODE_TIM3: TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
elmot 1:d0dfbce63a89 2014 * @arg TIM_TIM15_ENCODERMODE_TIM4: TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
elmot 1:d0dfbce63a89 2015 *
elmot 1:d0dfbce63a89 2016 @if STM32L486xx
elmot 1:d0dfbce63a89 2017 * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO
elmot 1:d0dfbce63a89 2018 * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI
elmot 1:d0dfbce63a89 2019 * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE
elmot 1:d0dfbce63a89 2020 * @arg TIM_TIM16_TI1_RTC: TIM16 TI1 is connected to RTC wakeup interrupt
elmot 1:d0dfbce63a89 2021 *
elmot 1:d0dfbce63a89 2022 @endif
elmot 1:d0dfbce63a89 2023 @if STM32L443xx
elmot 1:d0dfbce63a89 2024 * For TIM16, the parameter can have the following values:
elmot 1:d0dfbce63a89 2025 * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO
elmot 1:d0dfbce63a89 2026 * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI
elmot 1:d0dfbce63a89 2027 * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE
elmot 1:d0dfbce63a89 2028 * @arg TIM_TIM16_TI1_RTC: TIM16 TI1 is connected to RTC wakeup interrupt
elmot 1:d0dfbce63a89 2029 * @arg TIM_TIM16_TI1_MSI: TIM16 TI1 is connected to MSI (contraints: MSI clock < 1/4 TIM APB clock)
elmot 1:d0dfbce63a89 2030 * @arg TIM_TIM16_TI1_HSE_32: TIM16 TI1 is connected to HSE div 32 (note that HSE div 32 must be selected as RTC clock source)
elmot 1:d0dfbce63a89 2031 * @arg TIM_TIM16_TI1_MCO: TIM16 TI1 is connected to MCO
elmot 1:d0dfbce63a89 2032 *
elmot 1:d0dfbce63a89 2033 @endif
elmot 1:d0dfbce63a89 2034 @if STM32L486xx
elmot 1:d0dfbce63a89 2035 * For TIM17, the parameter can have the following values:
elmot 1:d0dfbce63a89 2036 * @arg TIM_TIM17_TI1_GPIO: TIM17 TI1 is connected to GPIO
elmot 1:d0dfbce63a89 2037 * @arg TIM_TIM17_TI1_MSI: TIM17 TI1 is connected to MSI (contraints: MSI clock < 1/4 TIM APB clock)
elmot 1:d0dfbce63a89 2038 * @arg TIM_TIM17_TI1_HSE_32: TIM17 TI1 is connected to HSE div 32
elmot 1:d0dfbce63a89 2039 * @arg TIM_TIM17_TI1_MCO: TIM17 TI1 is connected to MCO
elmot 1:d0dfbce63a89 2040 @endif
elmot 1:d0dfbce63a89 2041 *
elmot 1:d0dfbce63a89 2042 * @retval HAL status
elmot 1:d0dfbce63a89 2043 */
elmot 1:d0dfbce63a89 2044 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
elmot 1:d0dfbce63a89 2045 {
elmot 1:d0dfbce63a89 2046 uint32_t tmpor1 = 0;
elmot 1:d0dfbce63a89 2047 uint32_t tmpor2 = 0;
elmot 1:d0dfbce63a89 2048
elmot 1:d0dfbce63a89 2049 __HAL_LOCK(htim);
elmot 1:d0dfbce63a89 2050
elmot 1:d0dfbce63a89 2051 /* Check parameters */
elmot 1:d0dfbce63a89 2052 assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 2053 assert_param(IS_TIM_REMAP(Remap));
elmot 1:d0dfbce63a89 2054
elmot 1:d0dfbce63a89 2055 /* Set ETR_SEL bit field (if required) */
elmot 1:d0dfbce63a89 2056 if (IS_TIM_ETRSEL_INSTANCE(htim->Instance))
elmot 1:d0dfbce63a89 2057 {
elmot 1:d0dfbce63a89 2058 tmpor2 = htim->Instance->OR2;
elmot 1:d0dfbce63a89 2059 tmpor2 &= ~TIMx_ETRSEL_MASK;
elmot 1:d0dfbce63a89 2060 tmpor2 |= (Remap & TIMx_ETRSEL_MASK);
elmot 1:d0dfbce63a89 2061
elmot 1:d0dfbce63a89 2062 /* Set TIMx_OR2 */
elmot 1:d0dfbce63a89 2063 htim->Instance->OR2 = tmpor2;
elmot 1:d0dfbce63a89 2064 }
elmot 1:d0dfbce63a89 2065
elmot 1:d0dfbce63a89 2066 /* Set other remapping capabilities */
elmot 1:d0dfbce63a89 2067 tmpor1 = Remap;
elmot 1:d0dfbce63a89 2068 tmpor1 &= ~TIMx_ETRSEL_MASK;
elmot 1:d0dfbce63a89 2069
elmot 1:d0dfbce63a89 2070 /* Set TIMx_OR1 */
elmot 1:d0dfbce63a89 2071 htim->Instance->OR1 = Remap;
elmot 1:d0dfbce63a89 2072
elmot 1:d0dfbce63a89 2073 /* Set TIMx_OR1 */
elmot 1:d0dfbce63a89 2074 htim->Instance->OR1 = tmpor1;
elmot 1:d0dfbce63a89 2075
elmot 1:d0dfbce63a89 2076 htim->State = HAL_TIM_STATE_READY;
elmot 1:d0dfbce63a89 2077
elmot 1:d0dfbce63a89 2078 __HAL_UNLOCK(htim);
elmot 1:d0dfbce63a89 2079
elmot 1:d0dfbce63a89 2080 return HAL_OK;
elmot 1:d0dfbce63a89 2081 }
elmot 1:d0dfbce63a89 2082
elmot 1:d0dfbce63a89 2083 /**
elmot 1:d0dfbce63a89 2084 * @brief Group channel 5 and channel 1, 2 or 3
elmot 1:d0dfbce63a89 2085 * @param htim: TIM handle.
elmot 1:d0dfbce63a89 2086 * @param Channels: specifies the reference signal(s) the OC5REF is combined with.
elmot 1:d0dfbce63a89 2087 * This parameter can be any combination of the following values:
elmot 1:d0dfbce63a89 2088 * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC
elmot 1:d0dfbce63a89 2089 * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF
elmot 1:d0dfbce63a89 2090 * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF
elmot 1:d0dfbce63a89 2091 * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF
elmot 1:d0dfbce63a89 2092 * @retval HAL status
elmot 1:d0dfbce63a89 2093 */
elmot 1:d0dfbce63a89 2094 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels)
elmot 1:d0dfbce63a89 2095 {
elmot 1:d0dfbce63a89 2096 /* Check parameters */
elmot 1:d0dfbce63a89 2097 assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance));
elmot 1:d0dfbce63a89 2098 assert_param(IS_TIM_GROUPCH5(Channels));
elmot 1:d0dfbce63a89 2099
elmot 1:d0dfbce63a89 2100 /* Process Locked */
elmot 1:d0dfbce63a89 2101 __HAL_LOCK(htim);
elmot 1:d0dfbce63a89 2102
elmot 1:d0dfbce63a89 2103 htim->State = HAL_TIM_STATE_BUSY;
elmot 1:d0dfbce63a89 2104
elmot 1:d0dfbce63a89 2105 /* Clear GC5Cx bit fields */
elmot 1:d0dfbce63a89 2106 htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3|TIM_CCR5_GC5C2|TIM_CCR5_GC5C1);
elmot 1:d0dfbce63a89 2107
elmot 1:d0dfbce63a89 2108 /* Set GC5Cx bit fields */
elmot 1:d0dfbce63a89 2109 htim->Instance->CCR5 |= Channels;
elmot 1:d0dfbce63a89 2110
elmot 1:d0dfbce63a89 2111 htim->State = HAL_TIM_STATE_READY;
elmot 1:d0dfbce63a89 2112
elmot 1:d0dfbce63a89 2113 __HAL_UNLOCK(htim);
elmot 1:d0dfbce63a89 2114
elmot 1:d0dfbce63a89 2115 return HAL_OK;
elmot 1:d0dfbce63a89 2116 }
elmot 1:d0dfbce63a89 2117
elmot 1:d0dfbce63a89 2118 /**
elmot 1:d0dfbce63a89 2119 * @}
elmot 1:d0dfbce63a89 2120 */
elmot 1:d0dfbce63a89 2121
elmot 1:d0dfbce63a89 2122 /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
elmot 1:d0dfbce63a89 2123 * @brief Extended Callbacks functions
elmot 1:d0dfbce63a89 2124 *
elmot 1:d0dfbce63a89 2125 @verbatim
elmot 1:d0dfbce63a89 2126 ==============================================================================
elmot 1:d0dfbce63a89 2127 ##### Extended Callbacks functions #####
elmot 1:d0dfbce63a89 2128 ==============================================================================
elmot 1:d0dfbce63a89 2129 [..]
elmot 1:d0dfbce63a89 2130 This section provides Extended TIM callback functions:
elmot 1:d0dfbce63a89 2131 (+) Timer Commutation callback
elmot 1:d0dfbce63a89 2132 (+) Timer Break callback
elmot 1:d0dfbce63a89 2133
elmot 1:d0dfbce63a89 2134 @endverbatim
elmot 1:d0dfbce63a89 2135 * @{
elmot 1:d0dfbce63a89 2136 */
elmot 1:d0dfbce63a89 2137
elmot 1:d0dfbce63a89 2138 /**
elmot 1:d0dfbce63a89 2139 * @brief Hall commutation changed callback in non-blocking mode
elmot 1:d0dfbce63a89 2140 * @param htim : TIM handle
elmot 1:d0dfbce63a89 2141 * @retval None
elmot 1:d0dfbce63a89 2142 */
elmot 1:d0dfbce63a89 2143 __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim)
elmot 1:d0dfbce63a89 2144 {
elmot 1:d0dfbce63a89 2145 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 2146 UNUSED(htim);
elmot 1:d0dfbce63a89 2147
elmot 1:d0dfbce63a89 2148 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 2149 the HAL_TIMEx_CommutationCallback could be implemented in the user file
elmot 1:d0dfbce63a89 2150 */
elmot 1:d0dfbce63a89 2151 }
elmot 1:d0dfbce63a89 2152
elmot 1:d0dfbce63a89 2153 /**
elmot 1:d0dfbce63a89 2154 * @brief Hall Break detection callback in non-blocking mode
elmot 1:d0dfbce63a89 2155 * @param htim : TIM handle
elmot 1:d0dfbce63a89 2156 * @retval None
elmot 1:d0dfbce63a89 2157 */
elmot 1:d0dfbce63a89 2158 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
elmot 1:d0dfbce63a89 2159 {
elmot 1:d0dfbce63a89 2160 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 2161 UNUSED(htim);
elmot 1:d0dfbce63a89 2162
elmot 1:d0dfbce63a89 2163 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 2164 the HAL_TIMEx_BreakCallback could be implemented in the user file
elmot 1:d0dfbce63a89 2165 */
elmot 1:d0dfbce63a89 2166 }
elmot 1:d0dfbce63a89 2167
elmot 1:d0dfbce63a89 2168 /**
elmot 1:d0dfbce63a89 2169 * @}
elmot 1:d0dfbce63a89 2170 */
elmot 1:d0dfbce63a89 2171
elmot 1:d0dfbce63a89 2172 /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
elmot 1:d0dfbce63a89 2173 * @brief Extended Peripheral State functions
elmot 1:d0dfbce63a89 2174 *
elmot 1:d0dfbce63a89 2175 @verbatim
elmot 1:d0dfbce63a89 2176 ==============================================================================
elmot 1:d0dfbce63a89 2177 ##### Extended Peripheral State functions #####
elmot 1:d0dfbce63a89 2178 ==============================================================================
elmot 1:d0dfbce63a89 2179 [..]
elmot 1:d0dfbce63a89 2180 This subsection permits to get in run-time the status of the peripheral
elmot 1:d0dfbce63a89 2181 and the data flow.
elmot 1:d0dfbce63a89 2182
elmot 1:d0dfbce63a89 2183 @endverbatim
elmot 1:d0dfbce63a89 2184 * @{
elmot 1:d0dfbce63a89 2185 */
elmot 1:d0dfbce63a89 2186
elmot 1:d0dfbce63a89 2187 /**
elmot 1:d0dfbce63a89 2188 * @brief Return the TIM Hall Sensor interface handle state.
elmot 1:d0dfbce63a89 2189 * @param htim: TIM Hall Sensor handle
elmot 1:d0dfbce63a89 2190 * @retval HAL state
elmot 1:d0dfbce63a89 2191 */
elmot 1:d0dfbce63a89 2192 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
elmot 1:d0dfbce63a89 2193 {
elmot 1:d0dfbce63a89 2194 return htim->State;
elmot 1:d0dfbce63a89 2195 }
elmot 1:d0dfbce63a89 2196
elmot 1:d0dfbce63a89 2197 /**
elmot 1:d0dfbce63a89 2198 * @}
elmot 1:d0dfbce63a89 2199 */
elmot 1:d0dfbce63a89 2200
elmot 1:d0dfbce63a89 2201 /**
elmot 1:d0dfbce63a89 2202 * @brief TIM DMA Commutation callback.
elmot 1:d0dfbce63a89 2203 * @param hdma : pointer to DMA handle.
elmot 1:d0dfbce63a89 2204 * @retval None
elmot 1:d0dfbce63a89 2205 */
elmot 1:d0dfbce63a89 2206 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
elmot 1:d0dfbce63a89 2207 {
elmot 1:d0dfbce63a89 2208 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
elmot 1:d0dfbce63a89 2209
elmot 1:d0dfbce63a89 2210 htim->State= HAL_TIM_STATE_READY;
elmot 1:d0dfbce63a89 2211
elmot 1:d0dfbce63a89 2212 HAL_TIMEx_CommutationCallback(htim);
elmot 1:d0dfbce63a89 2213 }
elmot 1:d0dfbce63a89 2214
elmot 1:d0dfbce63a89 2215 /**
elmot 1:d0dfbce63a89 2216 * @brief Enables or disables the TIM Capture Compare Channel xN.
elmot 1:d0dfbce63a89 2217 * @param TIMx to select the TIM peripheral
elmot 1:d0dfbce63a89 2218 * @param Channel: specifies the TIM Channel
elmot 1:d0dfbce63a89 2219 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 2220 * @arg TIM_Channel_1: TIM Channel 1
elmot 1:d0dfbce63a89 2221 * @arg TIM_Channel_2: TIM Channel 2
elmot 1:d0dfbce63a89 2222 * @arg TIM_Channel_3: TIM Channel 3
elmot 1:d0dfbce63a89 2223 * @param ChannelNState: specifies the TIM Channel CCxNE bit new state.
elmot 1:d0dfbce63a89 2224 * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
elmot 1:d0dfbce63a89 2225 * @retval None
elmot 1:d0dfbce63a89 2226 */
elmot 1:d0dfbce63a89 2227 static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState)
elmot 1:d0dfbce63a89 2228 {
elmot 1:d0dfbce63a89 2229 uint32_t tmp = 0;
elmot 1:d0dfbce63a89 2230
elmot 1:d0dfbce63a89 2231 tmp = TIM_CCER_CC1NE << Channel;
elmot 1:d0dfbce63a89 2232
elmot 1:d0dfbce63a89 2233 /* Reset the CCxNE Bit */
elmot 1:d0dfbce63a89 2234 TIMx->CCER &= ~tmp;
elmot 1:d0dfbce63a89 2235
elmot 1:d0dfbce63a89 2236 /* Set or reset the CCxNE Bit */
elmot 1:d0dfbce63a89 2237 TIMx->CCER |= (uint32_t)(ChannelNState << Channel);
elmot 1:d0dfbce63a89 2238 }
elmot 1:d0dfbce63a89 2239
elmot 1:d0dfbce63a89 2240 /**
elmot 1:d0dfbce63a89 2241 * @}
elmot 1:d0dfbce63a89 2242 */
elmot 1:d0dfbce63a89 2243
elmot 1:d0dfbce63a89 2244 #endif /* HAL_TIM_MODULE_ENABLED */
elmot 1:d0dfbce63a89 2245 /**
elmot 1:d0dfbce63a89 2246 * @}
elmot 1:d0dfbce63a89 2247 */
elmot 1:d0dfbce63a89 2248
elmot 1:d0dfbce63a89 2249 /**
elmot 1:d0dfbce63a89 2250 * @}
elmot 1:d0dfbce63a89 2251 */
elmot 1:d0dfbce63a89 2252
elmot 1:d0dfbce63a89 2253 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/