TUKS MCU Introductory course / TUKS-COURSE-TIMER

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HAL_L476/stm32l4xx_hal_tim.h@1:d0dfbce63a89, 2017-02-24 (annotated)

Committer:
elmot
Date:
Fri Feb 24 21:13:56 2017 +0000
Revision:
1:d0dfbce63a89
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elmot 1:d0dfbce63a89 1 /**
elmot 1:d0dfbce63a89 2 ******************************************************************************
elmot 1:d0dfbce63a89 3 * @file stm32l4xx_hal_tim.h
elmot 1:d0dfbce63a89 4 * @author MCD Application Team
elmot 1:d0dfbce63a89 5 * @version V1.5.1
elmot 1:d0dfbce63a89 6 * @date 31-May-2016
elmot 1:d0dfbce63a89 7 * @brief Header file of TIM HAL module.
elmot 1:d0dfbce63a89 8 ******************************************************************************
elmot 1:d0dfbce63a89 9 * @attention
elmot 1:d0dfbce63a89 10 *
elmot 1:d0dfbce63a89 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot 1:d0dfbce63a89 12 *
elmot 1:d0dfbce63a89 13 * Redistribution and use in source and binary forms, with or without modification,
elmot 1:d0dfbce63a89 14 * are permitted provided that the following conditions are met:
elmot 1:d0dfbce63a89 15 * 1. Redistributions of source code must retain the above copyright notice,
elmot 1:d0dfbce63a89 16 * this list of conditions and the following disclaimer.
elmot 1:d0dfbce63a89 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
elmot 1:d0dfbce63a89 18 * this list of conditions and the following disclaimer in the documentation
elmot 1:d0dfbce63a89 19 * and/or other materials provided with the distribution.
elmot 1:d0dfbce63a89 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot 1:d0dfbce63a89 21 * may be used to endorse or promote products derived from this software
elmot 1:d0dfbce63a89 22 * without specific prior written permission.
elmot 1:d0dfbce63a89 23 *
elmot 1:d0dfbce63a89 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot 1:d0dfbce63a89 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot 1:d0dfbce63a89 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot 1:d0dfbce63a89 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot 1:d0dfbce63a89 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot 1:d0dfbce63a89 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot 1:d0dfbce63a89 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot 1:d0dfbce63a89 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot 1:d0dfbce63a89 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot 1:d0dfbce63a89 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot 1:d0dfbce63a89 34 *
elmot 1:d0dfbce63a89 35 ******************************************************************************
elmot 1:d0dfbce63a89 36 */
elmot 1:d0dfbce63a89 37
elmot 1:d0dfbce63a89 38 /* Define to prevent recursive inclusion -------------------------------------*/
elmot 1:d0dfbce63a89 39 #ifndef __STM32L4xx_HAL_TIM_H
elmot 1:d0dfbce63a89 40 #define __STM32L4xx_HAL_TIM_H
elmot 1:d0dfbce63a89 41
elmot 1:d0dfbce63a89 42 #ifdef __cplusplus
elmot 1:d0dfbce63a89 43 extern "C" {
elmot 1:d0dfbce63a89 44 #endif
elmot 1:d0dfbce63a89 45
elmot 1:d0dfbce63a89 46 /* Includes ------------------------------------------------------------------*/
elmot 1:d0dfbce63a89 47 #include "stm32l4xx_hal_def.h"
elmot 1:d0dfbce63a89 48
elmot 1:d0dfbce63a89 49 /** @addtogroup STM32L4xx_HAL_Driver
elmot 1:d0dfbce63a89 50 * @{
elmot 1:d0dfbce63a89 51 */
elmot 1:d0dfbce63a89 52
elmot 1:d0dfbce63a89 53 /** @addtogroup TIM
elmot 1:d0dfbce63a89 54 * @{
elmot 1:d0dfbce63a89 55 */
elmot 1:d0dfbce63a89 56
elmot 1:d0dfbce63a89 57 /* Exported types ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 58 /** @defgroup TIM_Exported_Types TIM Exported Types
elmot 1:d0dfbce63a89 59 * @{
elmot 1:d0dfbce63a89 60 */
elmot 1:d0dfbce63a89 61
elmot 1:d0dfbce63a89 62 /**
elmot 1:d0dfbce63a89 63 * @brief TIM Time base Configuration Structure definition
elmot 1:d0dfbce63a89 64 */
elmot 1:d0dfbce63a89 65 typedef struct
elmot 1:d0dfbce63a89 66 {
elmot 1:d0dfbce63a89 67 uint32_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
elmot 1:d0dfbce63a89 68 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
elmot 1:d0dfbce63a89 69
elmot 1:d0dfbce63a89 70 uint32_t CounterMode; /*!< Specifies the counter mode.
elmot 1:d0dfbce63a89 71 This parameter can be a value of @ref TIM_Counter_Mode */
elmot 1:d0dfbce63a89 72
elmot 1:d0dfbce63a89 73 uint32_t Period; /*!< Specifies the period value to be loaded into the active
elmot 1:d0dfbce63a89 74 Auto-Reload Register at the next update event.
elmot 1:d0dfbce63a89 75 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
elmot 1:d0dfbce63a89 76
elmot 1:d0dfbce63a89 77 uint32_t ClockDivision; /*!< Specifies the clock division.
elmot 1:d0dfbce63a89 78 This parameter can be a value of @ref TIM_ClockDivision */
elmot 1:d0dfbce63a89 79
elmot 1:d0dfbce63a89 80 uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
elmot 1:d0dfbce63a89 81 reaches zero, an update event is generated and counting restarts
elmot 1:d0dfbce63a89 82 from the RCR value (N).
elmot 1:d0dfbce63a89 83 This means in PWM mode that (N+1) corresponds to:
elmot 1:d0dfbce63a89 84 - the number of PWM periods in edge-aligned mode
elmot 1:d0dfbce63a89 85 - the number of half PWM period in center-aligned mode
elmot 1:d0dfbce63a89 86 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
elmot 1:d0dfbce63a89 87 @note This parameter is valid only for TIM1 and TIM8. */
elmot 1:d0dfbce63a89 88 } TIM_Base_InitTypeDef;
elmot 1:d0dfbce63a89 89
elmot 1:d0dfbce63a89 90 /**
elmot 1:d0dfbce63a89 91 * @brief TIM Output Compare Configuration Structure definition
elmot 1:d0dfbce63a89 92 */
elmot 1:d0dfbce63a89 93 typedef struct
elmot 1:d0dfbce63a89 94 {
elmot 1:d0dfbce63a89 95 uint32_t OCMode; /*!< Specifies the TIM mode.
elmot 1:d0dfbce63a89 96 This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
elmot 1:d0dfbce63a89 97
elmot 1:d0dfbce63a89 98 uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
elmot 1:d0dfbce63a89 99 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
elmot 1:d0dfbce63a89 100
elmot 1:d0dfbce63a89 101 uint32_t OCPolarity; /*!< Specifies the output polarity.
elmot 1:d0dfbce63a89 102 This parameter can be a value of @ref TIM_Output_Compare_Polarity */
elmot 1:d0dfbce63a89 103
elmot 1:d0dfbce63a89 104 uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
elmot 1:d0dfbce63a89 105 This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
elmot 1:d0dfbce63a89 106 @note This parameter is valid only for TIM1 and TIM8. */
elmot 1:d0dfbce63a89 107
elmot 1:d0dfbce63a89 108 uint32_t OCFastMode; /*!< Specifies the Fast mode state.
elmot 1:d0dfbce63a89 109 This parameter can be a value of @ref TIM_Output_Fast_State
elmot 1:d0dfbce63a89 110 @note This parameter is valid only in PWM1 and PWM2 mode. */
elmot 1:d0dfbce63a89 111
elmot 1:d0dfbce63a89 112
elmot 1:d0dfbce63a89 113 uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
elmot 1:d0dfbce63a89 114 This parameter can be a value of @ref TIM_Output_Compare_Idle_State
elmot 1:d0dfbce63a89 115 @note This parameter is valid only for TIM1 and TIM8. */
elmot 1:d0dfbce63a89 116
elmot 1:d0dfbce63a89 117 uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
elmot 1:d0dfbce63a89 118 This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
elmot 1:d0dfbce63a89 119 @note This parameter is valid only for TIM1 and TIM8. */
elmot 1:d0dfbce63a89 120 } TIM_OC_InitTypeDef;
elmot 1:d0dfbce63a89 121
elmot 1:d0dfbce63a89 122 /**
elmot 1:d0dfbce63a89 123 * @brief TIM One Pulse Mode Configuration Structure definition
elmot 1:d0dfbce63a89 124 */
elmot 1:d0dfbce63a89 125 typedef struct
elmot 1:d0dfbce63a89 126 {
elmot 1:d0dfbce63a89 127 uint32_t OCMode; /*!< Specifies the TIM mode.
elmot 1:d0dfbce63a89 128 This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
elmot 1:d0dfbce63a89 129
elmot 1:d0dfbce63a89 130 uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
elmot 1:d0dfbce63a89 131 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
elmot 1:d0dfbce63a89 132
elmot 1:d0dfbce63a89 133 uint32_t OCPolarity; /*!< Specifies the output polarity.
elmot 1:d0dfbce63a89 134 This parameter can be a value of @ref TIM_Output_Compare_Polarity */
elmot 1:d0dfbce63a89 135
elmot 1:d0dfbce63a89 136 uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
elmot 1:d0dfbce63a89 137 This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
elmot 1:d0dfbce63a89 138 @note This parameter is valid only for TIM1 and TIM8. */
elmot 1:d0dfbce63a89 139
elmot 1:d0dfbce63a89 140 uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
elmot 1:d0dfbce63a89 141 This parameter can be a value of @ref TIM_Output_Compare_Idle_State
elmot 1:d0dfbce63a89 142 @note This parameter is valid only for TIM1 and TIM8. */
elmot 1:d0dfbce63a89 143
elmot 1:d0dfbce63a89 144 uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
elmot 1:d0dfbce63a89 145 This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
elmot 1:d0dfbce63a89 146 @note This parameter is valid only for TIM1 and TIM8. */
elmot 1:d0dfbce63a89 147
elmot 1:d0dfbce63a89 148 uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
elmot 1:d0dfbce63a89 149 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
elmot 1:d0dfbce63a89 150
elmot 1:d0dfbce63a89 151 uint32_t ICSelection; /*!< Specifies the input.
elmot 1:d0dfbce63a89 152 This parameter can be a value of @ref TIM_Input_Capture_Selection */
elmot 1:d0dfbce63a89 153
elmot 1:d0dfbce63a89 154 uint32_t ICFilter; /*!< Specifies the input capture filter.
elmot 1:d0dfbce63a89 155 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
elmot 1:d0dfbce63a89 156 } TIM_OnePulse_InitTypeDef;
elmot 1:d0dfbce63a89 157
elmot 1:d0dfbce63a89 158
elmot 1:d0dfbce63a89 159 /**
elmot 1:d0dfbce63a89 160 * @brief TIM Input Capture Configuration Structure definition
elmot 1:d0dfbce63a89 161 */
elmot 1:d0dfbce63a89 162 typedef struct
elmot 1:d0dfbce63a89 163 {
elmot 1:d0dfbce63a89 164 uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
elmot 1:d0dfbce63a89 165 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
elmot 1:d0dfbce63a89 166
elmot 1:d0dfbce63a89 167 uint32_t ICSelection; /*!< Specifies the input.
elmot 1:d0dfbce63a89 168 This parameter can be a value of @ref TIM_Input_Capture_Selection */
elmot 1:d0dfbce63a89 169
elmot 1:d0dfbce63a89 170 uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
elmot 1:d0dfbce63a89 171 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
elmot 1:d0dfbce63a89 172
elmot 1:d0dfbce63a89 173 uint32_t ICFilter; /*!< Specifies the input capture filter.
elmot 1:d0dfbce63a89 174 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
elmot 1:d0dfbce63a89 175 } TIM_IC_InitTypeDef;
elmot 1:d0dfbce63a89 176
elmot 1:d0dfbce63a89 177 /**
elmot 1:d0dfbce63a89 178 * @brief TIM Encoder Configuration Structure definition
elmot 1:d0dfbce63a89 179 */
elmot 1:d0dfbce63a89 180 typedef struct
elmot 1:d0dfbce63a89 181 {
elmot 1:d0dfbce63a89 182 uint32_t EncoderMode; /*!< Specifies the active edge of the input signal.
elmot 1:d0dfbce63a89 183 This parameter can be a value of @ref TIM_Encoder_Mode */
elmot 1:d0dfbce63a89 184
elmot 1:d0dfbce63a89 185 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
elmot 1:d0dfbce63a89 186 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
elmot 1:d0dfbce63a89 187
elmot 1:d0dfbce63a89 188 uint32_t IC1Selection; /*!< Specifies the input.
elmot 1:d0dfbce63a89 189 This parameter can be a value of @ref TIM_Input_Capture_Selection */
elmot 1:d0dfbce63a89 190
elmot 1:d0dfbce63a89 191 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
elmot 1:d0dfbce63a89 192 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
elmot 1:d0dfbce63a89 193
elmot 1:d0dfbce63a89 194 uint32_t IC1Filter; /*!< Specifies the input capture filter.
elmot 1:d0dfbce63a89 195 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
elmot 1:d0dfbce63a89 196
elmot 1:d0dfbce63a89 197 uint32_t IC2Polarity; /*!< Specifies the active edge of the input signal.
elmot 1:d0dfbce63a89 198 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
elmot 1:d0dfbce63a89 199
elmot 1:d0dfbce63a89 200 uint32_t IC2Selection; /*!< Specifies the input.
elmot 1:d0dfbce63a89 201 This parameter can be a value of @ref TIM_Input_Capture_Selection */
elmot 1:d0dfbce63a89 202
elmot 1:d0dfbce63a89 203 uint32_t IC2Prescaler; /*!< Specifies the Input Capture Prescaler.
elmot 1:d0dfbce63a89 204 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
elmot 1:d0dfbce63a89 205
elmot 1:d0dfbce63a89 206 uint32_t IC2Filter; /*!< Specifies the input capture filter.
elmot 1:d0dfbce63a89 207 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
elmot 1:d0dfbce63a89 208 } TIM_Encoder_InitTypeDef;
elmot 1:d0dfbce63a89 209
elmot 1:d0dfbce63a89 210
elmot 1:d0dfbce63a89 211 /**
elmot 1:d0dfbce63a89 212 * @brief Clock Configuration Handle Structure definition
elmot 1:d0dfbce63a89 213 */
elmot 1:d0dfbce63a89 214 typedef struct
elmot 1:d0dfbce63a89 215 {
elmot 1:d0dfbce63a89 216 uint32_t ClockSource; /*!< TIM clock sources
elmot 1:d0dfbce63a89 217 This parameter can be a value of @ref TIM_Clock_Source */
elmot 1:d0dfbce63a89 218 uint32_t ClockPolarity; /*!< TIM clock polarity
elmot 1:d0dfbce63a89 219 This parameter can be a value of @ref TIM_Clock_Polarity */
elmot 1:d0dfbce63a89 220 uint32_t ClockPrescaler; /*!< TIM clock prescaler
elmot 1:d0dfbce63a89 221 This parameter can be a value of @ref TIM_Clock_Prescaler */
elmot 1:d0dfbce63a89 222 uint32_t ClockFilter; /*!< TIM clock filter
elmot 1:d0dfbce63a89 223 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
elmot 1:d0dfbce63a89 224 }TIM_ClockConfigTypeDef;
elmot 1:d0dfbce63a89 225
elmot 1:d0dfbce63a89 226 /**
elmot 1:d0dfbce63a89 227 * @brief Clear Input Configuration Handle Structure definition
elmot 1:d0dfbce63a89 228 */
elmot 1:d0dfbce63a89 229 typedef struct
elmot 1:d0dfbce63a89 230 {
elmot 1:d0dfbce63a89 231 uint32_t ClearInputState; /*!< TIM clear Input state
elmot 1:d0dfbce63a89 232 This parameter can be ENABLE or DISABLE */
elmot 1:d0dfbce63a89 233 uint32_t ClearInputSource; /*!< TIM clear Input sources
elmot 1:d0dfbce63a89 234 This parameter can be a value of @ref TIM_ClearInput_Source */
elmot 1:d0dfbce63a89 235 uint32_t ClearInputPolarity; /*!< TIM Clear Input polarity
elmot 1:d0dfbce63a89 236 This parameter can be a value of @ref TIM_ClearInput_Polarity */
elmot 1:d0dfbce63a89 237 uint32_t ClearInputPrescaler; /*!< TIM Clear Input prescaler
elmot 1:d0dfbce63a89 238 This parameter can be a value of @ref TIM_ClearInput_Prescaler */
elmot 1:d0dfbce63a89 239 uint32_t ClearInputFilter; /*!< TIM Clear Input filter
elmot 1:d0dfbce63a89 240 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
elmot 1:d0dfbce63a89 241 }TIM_ClearInputConfigTypeDef;
elmot 1:d0dfbce63a89 242
elmot 1:d0dfbce63a89 243 /**
elmot 1:d0dfbce63a89 244 * @brief TIM Master configuration Structure definition
elmot 1:d0dfbce63a89 245 * @note Advanced timers provide TRGO2 internal line which is redirected
elmot 1:d0dfbce63a89 246 * to the ADC
elmot 1:d0dfbce63a89 247 */
elmot 1:d0dfbce63a89 248 typedef struct {
elmot 1:d0dfbce63a89 249 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
elmot 1:d0dfbce63a89 250 This parameter can be a value of @ref TIM_Master_Mode_Selection */
elmot 1:d0dfbce63a89 251 uint32_t MasterOutputTrigger2; /*!< Trigger output2 (TRGO2) selection
elmot 1:d0dfbce63a89 252 This parameter can be a value of @ref TIM_Master_Mode_Selection_2 */
elmot 1:d0dfbce63a89 253 uint32_t MasterSlaveMode; /*!< Master/slave mode selection
elmot 1:d0dfbce63a89 254 This parameter can be a value of @ref TIM_Master_Slave_Mode */
elmot 1:d0dfbce63a89 255 }TIM_MasterConfigTypeDef;
elmot 1:d0dfbce63a89 256
elmot 1:d0dfbce63a89 257 /**
elmot 1:d0dfbce63a89 258 * @brief TIM Slave configuration Structure definition
elmot 1:d0dfbce63a89 259 */
elmot 1:d0dfbce63a89 260 typedef struct {
elmot 1:d0dfbce63a89 261 uint32_t SlaveMode; /*!< Slave mode selection
elmot 1:d0dfbce63a89 262 This parameter can be a value of @ref TIM_Slave_Mode */
elmot 1:d0dfbce63a89 263 uint32_t InputTrigger; /*!< Input Trigger source
elmot 1:d0dfbce63a89 264 This parameter can be a value of @ref TIM_Trigger_Selection */
elmot 1:d0dfbce63a89 265 uint32_t TriggerPolarity; /*!< Input Trigger polarity
elmot 1:d0dfbce63a89 266 This parameter can be a value of @ref TIM_Trigger_Polarity */
elmot 1:d0dfbce63a89 267 uint32_t TriggerPrescaler; /*!< Input trigger prescaler
elmot 1:d0dfbce63a89 268 This parameter can be a value of @ref TIM_Trigger_Prescaler */
elmot 1:d0dfbce63a89 269 uint32_t TriggerFilter; /*!< Input trigger filter
elmot 1:d0dfbce63a89 270 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
elmot 1:d0dfbce63a89 271
elmot 1:d0dfbce63a89 272 }TIM_SlaveConfigTypeDef;
elmot 1:d0dfbce63a89 273
elmot 1:d0dfbce63a89 274 /**
elmot 1:d0dfbce63a89 275 * @brief TIM Break input(s) and Dead time configuration Structure definition
elmot 1:d0dfbce63a89 276 * @note 2 break inputs can be configured (BKIN and BKIN2) with configurable
elmot 1:d0dfbce63a89 277 * filter and polarity.
elmot 1:d0dfbce63a89 278 */
elmot 1:d0dfbce63a89 279 typedef struct
elmot 1:d0dfbce63a89 280 {
elmot 1:d0dfbce63a89 281 uint32_t OffStateRunMode; /*!< TIM off state in run mode
elmot 1:d0dfbce63a89 282 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
elmot 1:d0dfbce63a89 283 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode
elmot 1:d0dfbce63a89 284 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
elmot 1:d0dfbce63a89 285 uint32_t LockLevel; /*!< TIM Lock level
elmot 1:d0dfbce63a89 286 This parameter can be a value of @ref TIM_Lock_level */
elmot 1:d0dfbce63a89 287 uint32_t DeadTime; /*!< TIM dead Time
elmot 1:d0dfbce63a89 288 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
elmot 1:d0dfbce63a89 289 uint32_t BreakState; /*!< TIM Break State
elmot 1:d0dfbce63a89 290 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
elmot 1:d0dfbce63a89 291 uint32_t BreakPolarity; /*!< TIM Break input polarity
elmot 1:d0dfbce63a89 292 This parameter can be a value of @ref TIM_Break_Polarity */
elmot 1:d0dfbce63a89 293 uint32_t BreakFilter; /*!< Specifies the break input filter.
elmot 1:d0dfbce63a89 294 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
elmot 1:d0dfbce63a89 295 uint32_t Break2State; /*!< TIM Break2 State
elmot 1:d0dfbce63a89 296 This parameter can be a value of @ref TIM_Break2_Input_enable_disable */
elmot 1:d0dfbce63a89 297 uint32_t Break2Polarity; /*!< TIM Break2 input polarity
elmot 1:d0dfbce63a89 298 This parameter can be a value of @ref TIM_Break2_Polarity */
elmot 1:d0dfbce63a89 299 uint32_t Break2Filter; /*!< TIM break2 input filter.
elmot 1:d0dfbce63a89 300 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
elmot 1:d0dfbce63a89 301 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state
elmot 1:d0dfbce63a89 302 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
elmot 1:d0dfbce63a89 303 } TIM_BreakDeadTimeConfigTypeDef;
elmot 1:d0dfbce63a89 304
elmot 1:d0dfbce63a89 305 /**
elmot 1:d0dfbce63a89 306 * @brief HAL State structures definition
elmot 1:d0dfbce63a89 307 */
elmot 1:d0dfbce63a89 308 typedef enum
elmot 1:d0dfbce63a89 309 {
elmot 1:d0dfbce63a89 310 HAL_TIM_STATE_RESET = 0x00, /*!< Peripheral not yet initialized or disabled */
elmot 1:d0dfbce63a89 311 HAL_TIM_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
elmot 1:d0dfbce63a89 312 HAL_TIM_STATE_BUSY = 0x02, /*!< An internal process is ongoing */
elmot 1:d0dfbce63a89 313 HAL_TIM_STATE_TIMEOUT = 0x03, /*!< Timeout state */
elmot 1:d0dfbce63a89 314 HAL_TIM_STATE_ERROR = 0x04 /*!< Reception process is ongoing */
elmot 1:d0dfbce63a89 315 }HAL_TIM_StateTypeDef;
elmot 1:d0dfbce63a89 316
elmot 1:d0dfbce63a89 317 /**
elmot 1:d0dfbce63a89 318 * @brief HAL Active channel structures definition
elmot 1:d0dfbce63a89 319 */
elmot 1:d0dfbce63a89 320 typedef enum
elmot 1:d0dfbce63a89 321 {
elmot 1:d0dfbce63a89 322 HAL_TIM_ACTIVE_CHANNEL_1 = 0x01, /*!< The active channel is 1 */
elmot 1:d0dfbce63a89 323 HAL_TIM_ACTIVE_CHANNEL_2 = 0x02, /*!< The active channel is 2 */
elmot 1:d0dfbce63a89 324 HAL_TIM_ACTIVE_CHANNEL_3 = 0x04, /*!< The active channel is 3 */
elmot 1:d0dfbce63a89 325 HAL_TIM_ACTIVE_CHANNEL_4 = 0x08, /*!< The active channel is 4 */
elmot 1:d0dfbce63a89 326 HAL_TIM_ACTIVE_CHANNEL_5 = 0x10, /*!< The active channel is 5 */
elmot 1:d0dfbce63a89 327 HAL_TIM_ACTIVE_CHANNEL_6 = 0x20, /*!< The active channel is 6 */
elmot 1:d0dfbce63a89 328 HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00 /*!< All active channels cleared */
elmot 1:d0dfbce63a89 329 }HAL_TIM_ActiveChannel;
elmot 1:d0dfbce63a89 330
elmot 1:d0dfbce63a89 331 /**
elmot 1:d0dfbce63a89 332 * @brief TIM Time Base Handle Structure definition
elmot 1:d0dfbce63a89 333 */
elmot 1:d0dfbce63a89 334 typedef struct
elmot 1:d0dfbce63a89 335 {
elmot 1:d0dfbce63a89 336 TIM_TypeDef *Instance; /*!< Register base address */
elmot 1:d0dfbce63a89 337 TIM_Base_InitTypeDef Init; /*!< TIM Time Base required parameters */
elmot 1:d0dfbce63a89 338 HAL_TIM_ActiveChannel Channel; /*!< Active channel */
elmot 1:d0dfbce63a89 339 DMA_HandleTypeDef *hdma[7]; /*!< DMA Handlers array
elmot 1:d0dfbce63a89 340 This array is accessed by a @ref DMA_Handle_index */
elmot 1:d0dfbce63a89 341 HAL_LockTypeDef Lock; /*!< Locking object */
elmot 1:d0dfbce63a89 342 __IO HAL_TIM_StateTypeDef State; /*!< TIM operation state */
elmot 1:d0dfbce63a89 343 }TIM_HandleTypeDef;
elmot 1:d0dfbce63a89 344
elmot 1:d0dfbce63a89 345 /**
elmot 1:d0dfbce63a89 346 * @}
elmot 1:d0dfbce63a89 347 */
elmot 1:d0dfbce63a89 348 /* End of exported types -----------------------------------------------------*/
elmot 1:d0dfbce63a89 349
elmot 1:d0dfbce63a89 350 /* Exported constants --------------------------------------------------------*/
elmot 1:d0dfbce63a89 351 /** @defgroup TIM_Exported_Constants TIM Exported Constants
elmot 1:d0dfbce63a89 352 * @{
elmot 1:d0dfbce63a89 353 */
elmot 1:d0dfbce63a89 354
elmot 1:d0dfbce63a89 355 /** @defgroup TIM_ClearInput_Source TIM Clear Input Source
elmot 1:d0dfbce63a89 356 * @{
elmot 1:d0dfbce63a89 357 */
elmot 1:d0dfbce63a89 358 #define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001)
elmot 1:d0dfbce63a89 359 #define TIM_CLEARINPUTSOURCE_OCREFCLR ((uint32_t)0x0002)
elmot 1:d0dfbce63a89 360 #define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 361 /**
elmot 1:d0dfbce63a89 362 * @}
elmot 1:d0dfbce63a89 363 */
elmot 1:d0dfbce63a89 364
elmot 1:d0dfbce63a89 365 /** @defgroup TIM_DMA_Base_address TIM DMA Base Address
elmot 1:d0dfbce63a89 366 * @{
elmot 1:d0dfbce63a89 367 */
elmot 1:d0dfbce63a89 368 #define TIM_DMABASE_CR1 (0x00000000)
elmot 1:d0dfbce63a89 369 #define TIM_DMABASE_CR2 (0x00000001)
elmot 1:d0dfbce63a89 370 #define TIM_DMABASE_SMCR (0x00000002)
elmot 1:d0dfbce63a89 371 #define TIM_DMABASE_DIER (0x00000003)
elmot 1:d0dfbce63a89 372 #define TIM_DMABASE_SR (0x00000004)
elmot 1:d0dfbce63a89 373 #define TIM_DMABASE_EGR (0x00000005)
elmot 1:d0dfbce63a89 374 #define TIM_DMABASE_CCMR1 (0x00000006)
elmot 1:d0dfbce63a89 375 #define TIM_DMABASE_CCMR2 (0x00000007)
elmot 1:d0dfbce63a89 376 #define TIM_DMABASE_CCER (0x00000008)
elmot 1:d0dfbce63a89 377 #define TIM_DMABASE_CNT (0x00000009)
elmot 1:d0dfbce63a89 378 #define TIM_DMABASE_PSC (0x0000000A)
elmot 1:d0dfbce63a89 379 #define TIM_DMABASE_ARR (0x0000000B)
elmot 1:d0dfbce63a89 380 #define TIM_DMABASE_RCR (0x0000000C)
elmot 1:d0dfbce63a89 381 #define TIM_DMABASE_CCR1 (0x0000000D)
elmot 1:d0dfbce63a89 382 #define TIM_DMABASE_CCR2 (0x0000000E)
elmot 1:d0dfbce63a89 383 #define TIM_DMABASE_CCR3 (0x0000000F)
elmot 1:d0dfbce63a89 384 #define TIM_DMABASE_CCR4 (0x00000010)
elmot 1:d0dfbce63a89 385 #define TIM_DMABASE_BDTR (0x00000011)
elmot 1:d0dfbce63a89 386 #define TIM_DMABASE_DCR (0x00000012)
elmot 1:d0dfbce63a89 387 #define TIM_DMABASE_DMAR (0x00000013)
elmot 1:d0dfbce63a89 388 #define TIM_DMABASE_OR1 (0x00000014)
elmot 1:d0dfbce63a89 389 #define TIM_DMABASE_CCMR3 (0x00000015)
elmot 1:d0dfbce63a89 390 #define TIM_DMABASE_CCR5 (0x00000016)
elmot 1:d0dfbce63a89 391 #define TIM_DMABASE_CCR6 (0x00000017)
elmot 1:d0dfbce63a89 392 #define TIM_DMABASE_OR2 (0x00000018)
elmot 1:d0dfbce63a89 393 #define TIM_DMABASE_OR3 (0x00000019)
elmot 1:d0dfbce63a89 394 /**
elmot 1:d0dfbce63a89 395 * @}
elmot 1:d0dfbce63a89 396 */
elmot 1:d0dfbce63a89 397
elmot 1:d0dfbce63a89 398 /** @defgroup TIM_Event_Source TIM Extended Event Source
elmot 1:d0dfbce63a89 399 * @{
elmot 1:d0dfbce63a89 400 */
elmot 1:d0dfbce63a89 401 #define TIM_EVENTSOURCE_UPDATE TIM_EGR_UG /*!< Reinitialize the counter and generates an update of the registers */
elmot 1:d0dfbce63a89 402 #define TIM_EVENTSOURCE_CC1 TIM_EGR_CC1G /*!< A capture/compare event is generated on channel 1 */
elmot 1:d0dfbce63a89 403 #define TIM_EVENTSOURCE_CC2 TIM_EGR_CC2G /*!< A capture/compare event is generated on channel 2 */
elmot 1:d0dfbce63a89 404 #define TIM_EVENTSOURCE_CC3 TIM_EGR_CC3G /*!< A capture/compare event is generated on channel 3 */
elmot 1:d0dfbce63a89 405 #define TIM_EVENTSOURCE_CC4 TIM_EGR_CC4G /*!< A capture/compare event is generated on channel 4 */
elmot 1:d0dfbce63a89 406 #define TIM_EVENTSOURCE_COM TIM_EGR_COMG /*!< A commutation event is generated */
elmot 1:d0dfbce63a89 407 #define TIM_EVENTSOURCE_TRIGGER TIM_EGR_TG /*!< A trigger event is generated */
elmot 1:d0dfbce63a89 408 #define TIM_EVENTSOURCE_BREAK TIM_EGR_BG /*!< A break event is generated */
elmot 1:d0dfbce63a89 409 #define TIM_EVENTSOURCE_BREAK2 TIM_EGR_B2G /*!< A break 2 event is generated */
elmot 1:d0dfbce63a89 410 /**
elmot 1:d0dfbce63a89 411 * @}
elmot 1:d0dfbce63a89 412 */
elmot 1:d0dfbce63a89 413
elmot 1:d0dfbce63a89 414 /** @defgroup TIM_Input_Channel_Polarity TIM Input Channel polarity
elmot 1:d0dfbce63a89 415 * @{
elmot 1:d0dfbce63a89 416 */
elmot 1:d0dfbce63a89 417 #define TIM_INPUTCHANNELPOLARITY_RISING ((uint32_t)0x00000000) /*!< Polarity for TIx source */
elmot 1:d0dfbce63a89 418 #define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /*!< Polarity for TIx source */
elmot 1:d0dfbce63a89 419 #define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< Polarity for TIx source */
elmot 1:d0dfbce63a89 420 /**
elmot 1:d0dfbce63a89 421 * @}
elmot 1:d0dfbce63a89 422 */
elmot 1:d0dfbce63a89 423
elmot 1:d0dfbce63a89 424 /** @defgroup TIM_ETR_Polarity TIM ETR Polarity
elmot 1:d0dfbce63a89 425 * @{
elmot 1:d0dfbce63a89 426 */
elmot 1:d0dfbce63a89 427 #define TIM_ETRPOLARITY_INVERTED (TIM_SMCR_ETP) /*!< Polarity for ETR source */
elmot 1:d0dfbce63a89 428 #define TIM_ETRPOLARITY_NONINVERTED ((uint32_t)0x0000) /*!< Polarity for ETR source */
elmot 1:d0dfbce63a89 429 /**
elmot 1:d0dfbce63a89 430 * @}
elmot 1:d0dfbce63a89 431 */
elmot 1:d0dfbce63a89 432
elmot 1:d0dfbce63a89 433 /** @defgroup TIM_ETR_Prescaler TIM ETR Prescaler
elmot 1:d0dfbce63a89 434 * @{
elmot 1:d0dfbce63a89 435 */
elmot 1:d0dfbce63a89 436 #define TIM_ETRPRESCALER_DIV1 ((uint32_t)0x0000) /*!< No prescaler is used */
elmot 1:d0dfbce63a89 437 #define TIM_ETRPRESCALER_DIV2 (TIM_SMCR_ETPS_0) /*!< ETR input source is divided by 2 */
elmot 1:d0dfbce63a89 438 #define TIM_ETRPRESCALER_DIV4 (TIM_SMCR_ETPS_1) /*!< ETR input source is divided by 4 */
elmot 1:d0dfbce63a89 439 #define TIM_ETRPRESCALER_DIV8 (TIM_SMCR_ETPS) /*!< ETR input source is divided by 8 */
elmot 1:d0dfbce63a89 440 /**
elmot 1:d0dfbce63a89 441 * @}
elmot 1:d0dfbce63a89 442 */
elmot 1:d0dfbce63a89 443
elmot 1:d0dfbce63a89 444 /** @defgroup TIM_Counter_Mode TIM Counter Mode
elmot 1:d0dfbce63a89 445 * @{
elmot 1:d0dfbce63a89 446 */
elmot 1:d0dfbce63a89 447 #define TIM_COUNTERMODE_UP ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 448 #define TIM_COUNTERMODE_DOWN TIM_CR1_DIR
elmot 1:d0dfbce63a89 449 #define TIM_COUNTERMODE_CENTERALIGNED1 TIM_CR1_CMS_0
elmot 1:d0dfbce63a89 450 #define TIM_COUNTERMODE_CENTERALIGNED2 TIM_CR1_CMS_1
elmot 1:d0dfbce63a89 451 #define TIM_COUNTERMODE_CENTERALIGNED3 TIM_CR1_CMS
elmot 1:d0dfbce63a89 452 /**
elmot 1:d0dfbce63a89 453 * @}
elmot 1:d0dfbce63a89 454 */
elmot 1:d0dfbce63a89 455
elmot 1:d0dfbce63a89 456 /** @defgroup TIM_ClockDivision TIM Clock Division
elmot 1:d0dfbce63a89 457 * @{
elmot 1:d0dfbce63a89 458 */
elmot 1:d0dfbce63a89 459 #define TIM_CLOCKDIVISION_DIV1 ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 460 #define TIM_CLOCKDIVISION_DIV2 (TIM_CR1_CKD_0)
elmot 1:d0dfbce63a89 461 #define TIM_CLOCKDIVISION_DIV4 (TIM_CR1_CKD_1)
elmot 1:d0dfbce63a89 462 /**
elmot 1:d0dfbce63a89 463 * @}
elmot 1:d0dfbce63a89 464 */
elmot 1:d0dfbce63a89 465
elmot 1:d0dfbce63a89 466 /** @defgroup TIM_Output_Compare_State TIM Output Compare State
elmot 1:d0dfbce63a89 467 * @{
elmot 1:d0dfbce63a89 468 */
elmot 1:d0dfbce63a89 469 #define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 470 #define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
elmot 1:d0dfbce63a89 471 /**
elmot 1:d0dfbce63a89 472 * @}
elmot 1:d0dfbce63a89 473 */
elmot 1:d0dfbce63a89 474
elmot 1:d0dfbce63a89 475 /** @defgroup TIM_Output_Fast_State TIM Output Fast State
elmot 1:d0dfbce63a89 476 * @{
elmot 1:d0dfbce63a89 477 */
elmot 1:d0dfbce63a89 478 #define TIM_OCFAST_DISABLE ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 479 #define TIM_OCFAST_ENABLE (TIM_CCMR1_OC1FE)
elmot 1:d0dfbce63a89 480 /**
elmot 1:d0dfbce63a89 481 * @}
elmot 1:d0dfbce63a89 482 */
elmot 1:d0dfbce63a89 483
elmot 1:d0dfbce63a89 484 /** @defgroup TIM_Output_Compare_N_State TIM Complementary Output Compare State
elmot 1:d0dfbce63a89 485 * @{
elmot 1:d0dfbce63a89 486 */
elmot 1:d0dfbce63a89 487 #define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 488 #define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE)
elmot 1:d0dfbce63a89 489 /**
elmot 1:d0dfbce63a89 490 * @}
elmot 1:d0dfbce63a89 491 */
elmot 1:d0dfbce63a89 492
elmot 1:d0dfbce63a89 493 /** @defgroup TIM_Output_Compare_Polarity TIM Output Compare Polarity
elmot 1:d0dfbce63a89 494 * @{
elmot 1:d0dfbce63a89 495 */
elmot 1:d0dfbce63a89 496 #define TIM_OCPOLARITY_HIGH ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 497 #define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P)
elmot 1:d0dfbce63a89 498 /**
elmot 1:d0dfbce63a89 499 * @}
elmot 1:d0dfbce63a89 500 */
elmot 1:d0dfbce63a89 501
elmot 1:d0dfbce63a89 502 /** @defgroup TIM_Output_Compare_N_Polarity TIM Complementary Output Compare Polarity
elmot 1:d0dfbce63a89 503 * @{
elmot 1:d0dfbce63a89 504 */
elmot 1:d0dfbce63a89 505 #define TIM_OCNPOLARITY_HIGH ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 506 #define TIM_OCNPOLARITY_LOW (TIM_CCER_CC1NP)
elmot 1:d0dfbce63a89 507 /**
elmot 1:d0dfbce63a89 508 * @}
elmot 1:d0dfbce63a89 509 */
elmot 1:d0dfbce63a89 510
elmot 1:d0dfbce63a89 511 /** @defgroup TIM_Output_Compare_Idle_State TIM Output Compare Idle State
elmot 1:d0dfbce63a89 512 * @{
elmot 1:d0dfbce63a89 513 */
elmot 1:d0dfbce63a89 514 #define TIM_OCIDLESTATE_SET (TIM_CR2_OIS1)
elmot 1:d0dfbce63a89 515 #define TIM_OCIDLESTATE_RESET ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 516 /**
elmot 1:d0dfbce63a89 517 * @}
elmot 1:d0dfbce63a89 518 */
elmot 1:d0dfbce63a89 519
elmot 1:d0dfbce63a89 520 /** @defgroup TIM_Output_Compare_N_Idle_State TIM Complementary Output Compare Idle State
elmot 1:d0dfbce63a89 521 * @{
elmot 1:d0dfbce63a89 522 */
elmot 1:d0dfbce63a89 523 #define TIM_OCNIDLESTATE_SET (TIM_CR2_OIS1N)
elmot 1:d0dfbce63a89 524 #define TIM_OCNIDLESTATE_RESET ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 525 /**
elmot 1:d0dfbce63a89 526 * @}
elmot 1:d0dfbce63a89 527 */
elmot 1:d0dfbce63a89 528
elmot 1:d0dfbce63a89 529 /** @defgroup TIM_Input_Capture_Polarity TIM Input Capture Polarity
elmot 1:d0dfbce63a89 530 * @{
elmot 1:d0dfbce63a89 531 */
elmot 1:d0dfbce63a89 532 #define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING
elmot 1:d0dfbce63a89 533 #define TIM_ICPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING
elmot 1:d0dfbce63a89 534 #define TIM_ICPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE
elmot 1:d0dfbce63a89 535 /**
elmot 1:d0dfbce63a89 536 * @}
elmot 1:d0dfbce63a89 537 */
elmot 1:d0dfbce63a89 538
elmot 1:d0dfbce63a89 539 /** @defgroup TIM_Input_Capture_Selection TIM Input Capture Selection
elmot 1:d0dfbce63a89 540 * @{
elmot 1:d0dfbce63a89 541 */
elmot 1:d0dfbce63a89 542 #define TIM_ICSELECTION_DIRECTTI (TIM_CCMR1_CC1S_0) /*!< TIM Input 1, 2, 3 or 4 is selected to be
elmot 1:d0dfbce63a89 543 connected to IC1, IC2, IC3 or IC4, respectively */
elmot 1:d0dfbce63a89 544 #define TIM_ICSELECTION_INDIRECTTI (TIM_CCMR1_CC1S_1) /*!< TIM Input 1, 2, 3 or 4 is selected to be
elmot 1:d0dfbce63a89 545 connected to IC2, IC1, IC4 or IC3, respectively */
elmot 1:d0dfbce63a89 546 #define TIM_ICSELECTION_TRC (TIM_CCMR1_CC1S) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC */
elmot 1:d0dfbce63a89 547 /**
elmot 1:d0dfbce63a89 548 * @}
elmot 1:d0dfbce63a89 549 */
elmot 1:d0dfbce63a89 550
elmot 1:d0dfbce63a89 551 /** @defgroup TIM_Input_Capture_Prescaler TIM Input Capture Prescaler
elmot 1:d0dfbce63a89 552 * @{
elmot 1:d0dfbce63a89 553 */
elmot 1:d0dfbce63a89 554 #define TIM_ICPSC_DIV1 ((uint32_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input */
elmot 1:d0dfbce63a89 555 #define TIM_ICPSC_DIV2 (TIM_CCMR1_IC1PSC_0) /*!< Capture performed once every 2 events */
elmot 1:d0dfbce63a89 556 #define TIM_ICPSC_DIV4 (TIM_CCMR1_IC1PSC_1) /*!< Capture performed once every 4 events */
elmot 1:d0dfbce63a89 557 #define TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC) /*!< Capture performed once every 8 events */
elmot 1:d0dfbce63a89 558 /**
elmot 1:d0dfbce63a89 559 * @}
elmot 1:d0dfbce63a89 560 */
elmot 1:d0dfbce63a89 561
elmot 1:d0dfbce63a89 562 /** @defgroup TIM_One_Pulse_Mode TIM One Pulse Mode
elmot 1:d0dfbce63a89 563 * @{
elmot 1:d0dfbce63a89 564 */
elmot 1:d0dfbce63a89 565 #define TIM_OPMODE_SINGLE (TIM_CR1_OPM)
elmot 1:d0dfbce63a89 566 #define TIM_OPMODE_REPETITIVE ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 567 /**
elmot 1:d0dfbce63a89 568 * @}
elmot 1:d0dfbce63a89 569 */
elmot 1:d0dfbce63a89 570
elmot 1:d0dfbce63a89 571 /** @defgroup TIM_Encoder_Mode TIM Encoder Mode
elmot 1:d0dfbce63a89 572 * @{
elmot 1:d0dfbce63a89 573 */
elmot 1:d0dfbce63a89 574 #define TIM_ENCODERMODE_TI1 (TIM_SMCR_SMS_0)
elmot 1:d0dfbce63a89 575 #define TIM_ENCODERMODE_TI2 (TIM_SMCR_SMS_1)
elmot 1:d0dfbce63a89 576 #define TIM_ENCODERMODE_TI12 (TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0)
elmot 1:d0dfbce63a89 577 /**
elmot 1:d0dfbce63a89 578 * @}
elmot 1:d0dfbce63a89 579 */
elmot 1:d0dfbce63a89 580
elmot 1:d0dfbce63a89 581 /** @defgroup TIM_Interrupt_definition TIM interrupt Definition
elmot 1:d0dfbce63a89 582 * @{
elmot 1:d0dfbce63a89 583 */
elmot 1:d0dfbce63a89 584 #define TIM_IT_UPDATE (TIM_DIER_UIE)
elmot 1:d0dfbce63a89 585 #define TIM_IT_CC1 (TIM_DIER_CC1IE)
elmot 1:d0dfbce63a89 586 #define TIM_IT_CC2 (TIM_DIER_CC2IE)
elmot 1:d0dfbce63a89 587 #define TIM_IT_CC3 (TIM_DIER_CC3IE)
elmot 1:d0dfbce63a89 588 #define TIM_IT_CC4 (TIM_DIER_CC4IE)
elmot 1:d0dfbce63a89 589 #define TIM_IT_COM (TIM_DIER_COMIE)
elmot 1:d0dfbce63a89 590 #define TIM_IT_TRIGGER (TIM_DIER_TIE)
elmot 1:d0dfbce63a89 591 #define TIM_IT_BREAK (TIM_DIER_BIE)
elmot 1:d0dfbce63a89 592 /**
elmot 1:d0dfbce63a89 593 * @}
elmot 1:d0dfbce63a89 594 */
elmot 1:d0dfbce63a89 595
elmot 1:d0dfbce63a89 596 /** @defgroup TIM_Commutation_Source TIM Commutation Source
elmot 1:d0dfbce63a89 597 * @{
elmot 1:d0dfbce63a89 598 */
elmot 1:d0dfbce63a89 599 #define TIM_COMMUTATION_TRGI (TIM_CR2_CCUS)
elmot 1:d0dfbce63a89 600 #define TIM_COMMUTATION_SOFTWARE ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 601 /**
elmot 1:d0dfbce63a89 602 * @}
elmot 1:d0dfbce63a89 603 */
elmot 1:d0dfbce63a89 604
elmot 1:d0dfbce63a89 605 /** @defgroup TIM_DMA_sources TIM DMA Sources
elmot 1:d0dfbce63a89 606 * @{
elmot 1:d0dfbce63a89 607 */
elmot 1:d0dfbce63a89 608 #define TIM_DMA_UPDATE (TIM_DIER_UDE)
elmot 1:d0dfbce63a89 609 #define TIM_DMA_CC1 (TIM_DIER_CC1DE)
elmot 1:d0dfbce63a89 610 #define TIM_DMA_CC2 (TIM_DIER_CC2DE)
elmot 1:d0dfbce63a89 611 #define TIM_DMA_CC3 (TIM_DIER_CC3DE)
elmot 1:d0dfbce63a89 612 #define TIM_DMA_CC4 (TIM_DIER_CC4DE)
elmot 1:d0dfbce63a89 613 #define TIM_DMA_COM (TIM_DIER_COMDE)
elmot 1:d0dfbce63a89 614 #define TIM_DMA_TRIGGER (TIM_DIER_TDE)
elmot 1:d0dfbce63a89 615 /**
elmot 1:d0dfbce63a89 616 * @}
elmot 1:d0dfbce63a89 617 */
elmot 1:d0dfbce63a89 618
elmot 1:d0dfbce63a89 619 /** @defgroup TIM_Flag_definition TIM Flag Definition
elmot 1:d0dfbce63a89 620 * @{
elmot 1:d0dfbce63a89 621 */
elmot 1:d0dfbce63a89 622 #define TIM_FLAG_UPDATE (TIM_SR_UIF)
elmot 1:d0dfbce63a89 623 #define TIM_FLAG_CC1 (TIM_SR_CC1IF)
elmot 1:d0dfbce63a89 624 #define TIM_FLAG_CC2 (TIM_SR_CC2IF)
elmot 1:d0dfbce63a89 625 #define TIM_FLAG_CC3 (TIM_SR_CC3IF)
elmot 1:d0dfbce63a89 626 #define TIM_FLAG_CC4 (TIM_SR_CC4IF)
elmot 1:d0dfbce63a89 627 #define TIM_FLAG_CC5 (TIM_SR_CC5IF)
elmot 1:d0dfbce63a89 628 #define TIM_FLAG_CC6 (TIM_SR_CC6IF)
elmot 1:d0dfbce63a89 629 #define TIM_FLAG_COM (TIM_SR_COMIF)
elmot 1:d0dfbce63a89 630 #define TIM_FLAG_TRIGGER (TIM_SR_TIF)
elmot 1:d0dfbce63a89 631 #define TIM_FLAG_BREAK (TIM_SR_BIF)
elmot 1:d0dfbce63a89 632 #define TIM_FLAG_BREAK2 (TIM_SR_B2IF)
elmot 1:d0dfbce63a89 633 #define TIM_FLAG_SYSTEM_BREAK (TIM_SR_SBIF)
elmot 1:d0dfbce63a89 634 #define TIM_FLAG_CC1OF (TIM_SR_CC1OF)
elmot 1:d0dfbce63a89 635 #define TIM_FLAG_CC2OF (TIM_SR_CC2OF)
elmot 1:d0dfbce63a89 636 #define TIM_FLAG_CC3OF (TIM_SR_CC3OF)
elmot 1:d0dfbce63a89 637 #define TIM_FLAG_CC4OF (TIM_SR_CC4OF)
elmot 1:d0dfbce63a89 638 /**
elmot 1:d0dfbce63a89 639 * @}
elmot 1:d0dfbce63a89 640 */
elmot 1:d0dfbce63a89 641
elmot 1:d0dfbce63a89 642 /** @defgroup TIM_Channel TIM Channel
elmot 1:d0dfbce63a89 643 * @{
elmot 1:d0dfbce63a89 644 */
elmot 1:d0dfbce63a89 645 #define TIM_CHANNEL_1 ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 646 #define TIM_CHANNEL_2 ((uint32_t)0x0004)
elmot 1:d0dfbce63a89 647 #define TIM_CHANNEL_3 ((uint32_t)0x0008)
elmot 1:d0dfbce63a89 648 #define TIM_CHANNEL_4 ((uint32_t)0x000C)
elmot 1:d0dfbce63a89 649 #define TIM_CHANNEL_5 ((uint32_t)0x0010)
elmot 1:d0dfbce63a89 650 #define TIM_CHANNEL_6 ((uint32_t)0x0014)
elmot 1:d0dfbce63a89 651 #define TIM_CHANNEL_ALL ((uint32_t)0x003C)
elmot 1:d0dfbce63a89 652 /**
elmot 1:d0dfbce63a89 653 * @}
elmot 1:d0dfbce63a89 654 */
elmot 1:d0dfbce63a89 655
elmot 1:d0dfbce63a89 656 /** @defgroup TIM_Clock_Source TIM Clock Source
elmot 1:d0dfbce63a89 657 * @{
elmot 1:d0dfbce63a89 658 */
elmot 1:d0dfbce63a89 659 #define TIM_CLOCKSOURCE_ETRMODE2 (TIM_SMCR_ETPS_1)
elmot 1:d0dfbce63a89 660 #define TIM_CLOCKSOURCE_INTERNAL (TIM_SMCR_ETPS_0)
elmot 1:d0dfbce63a89 661 #define TIM_CLOCKSOURCE_ITR0 ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 662 #define TIM_CLOCKSOURCE_ITR1 (TIM_SMCR_TS_0)
elmot 1:d0dfbce63a89 663 #define TIM_CLOCKSOURCE_ITR2 (TIM_SMCR_TS_1)
elmot 1:d0dfbce63a89 664 #define TIM_CLOCKSOURCE_ITR3 (TIM_SMCR_TS_0 | TIM_SMCR_TS_1)
elmot 1:d0dfbce63a89 665 #define TIM_CLOCKSOURCE_TI1ED (TIM_SMCR_TS_2)
elmot 1:d0dfbce63a89 666 #define TIM_CLOCKSOURCE_TI1 (TIM_SMCR_TS_0 | TIM_SMCR_TS_2)
elmot 1:d0dfbce63a89 667 #define TIM_CLOCKSOURCE_TI2 (TIM_SMCR_TS_1 | TIM_SMCR_TS_2)
elmot 1:d0dfbce63a89 668 #define TIM_CLOCKSOURCE_ETRMODE1 (TIM_SMCR_TS)
elmot 1:d0dfbce63a89 669 /**
elmot 1:d0dfbce63a89 670 * @}
elmot 1:d0dfbce63a89 671 */
elmot 1:d0dfbce63a89 672
elmot 1:d0dfbce63a89 673 /** @defgroup TIM_Clock_Polarity TIM Clock Polarity
elmot 1:d0dfbce63a89 674 * @{
elmot 1:d0dfbce63a89 675 */
elmot 1:d0dfbce63a89 676 #define TIM_CLOCKPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx clock sources */
elmot 1:d0dfbce63a89 677 #define TIM_CLOCKPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx clock sources */
elmot 1:d0dfbce63a89 678 #define TIM_CLOCKPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Polarity for TIx clock sources */
elmot 1:d0dfbce63a89 679 #define TIM_CLOCKPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /*!< Polarity for TIx clock sources */
elmot 1:d0dfbce63a89 680 #define TIM_CLOCKPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /*!< Polarity for TIx clock sources */
elmot 1:d0dfbce63a89 681 /**
elmot 1:d0dfbce63a89 682 * @}
elmot 1:d0dfbce63a89 683 */
elmot 1:d0dfbce63a89 684
elmot 1:d0dfbce63a89 685 /** @defgroup TIM_Clock_Prescaler TIM Clock Prescaler
elmot 1:d0dfbce63a89 686 * @{
elmot 1:d0dfbce63a89 687 */
elmot 1:d0dfbce63a89 688 #define TIM_CLOCKPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */
elmot 1:d0dfbce63a89 689 #define TIM_CLOCKPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR Clock: Capture performed once every 2 events. */
elmot 1:d0dfbce63a89 690 #define TIM_CLOCKPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR Clock: Capture performed once every 4 events. */
elmot 1:d0dfbce63a89 691 #define TIM_CLOCKPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR Clock: Capture performed once every 8 events. */
elmot 1:d0dfbce63a89 692 /**
elmot 1:d0dfbce63a89 693 * @}
elmot 1:d0dfbce63a89 694 */
elmot 1:d0dfbce63a89 695
elmot 1:d0dfbce63a89 696 /** @defgroup TIM_ClearInput_Polarity TIM Clear Input Polarity
elmot 1:d0dfbce63a89 697 * @{
elmot 1:d0dfbce63a89 698 */
elmot 1:d0dfbce63a89 699 #define TIM_CLEARINPUTPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx pin */
elmot 1:d0dfbce63a89 700 #define TIM_CLEARINPUTPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx pin */
elmot 1:d0dfbce63a89 701 /**
elmot 1:d0dfbce63a89 702 * @}
elmot 1:d0dfbce63a89 703 */
elmot 1:d0dfbce63a89 704
elmot 1:d0dfbce63a89 705 /** @defgroup TIM_ClearInput_Prescaler TIM Clear Input Prescaler
elmot 1:d0dfbce63a89 706 * @{
elmot 1:d0dfbce63a89 707 */
elmot 1:d0dfbce63a89 708 #define TIM_CLEARINPUTPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */
elmot 1:d0dfbce63a89 709 #define TIM_CLEARINPUTPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR pin: Capture performed once every 2 events. */
elmot 1:d0dfbce63a89 710 #define TIM_CLEARINPUTPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR pin: Capture performed once every 4 events. */
elmot 1:d0dfbce63a89 711 #define TIM_CLEARINPUTPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR pin: Capture performed once every 8 events. */
elmot 1:d0dfbce63a89 712 /**
elmot 1:d0dfbce63a89 713 * @}
elmot 1:d0dfbce63a89 714 */
elmot 1:d0dfbce63a89 715
elmot 1:d0dfbce63a89 716 /** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state TIM OSSR OffState Selection for Run mode state
elmot 1:d0dfbce63a89 717 * @{
elmot 1:d0dfbce63a89 718 */
elmot 1:d0dfbce63a89 719 #define TIM_OSSR_ENABLE (TIM_BDTR_OSSR)
elmot 1:d0dfbce63a89 720 #define TIM_OSSR_DISABLE ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 721 /**
elmot 1:d0dfbce63a89 722 * @}
elmot 1:d0dfbce63a89 723 */
elmot 1:d0dfbce63a89 724
elmot 1:d0dfbce63a89 725 /** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state TIM OSSI OffState Selection for Idle mode state
elmot 1:d0dfbce63a89 726 * @{
elmot 1:d0dfbce63a89 727 */
elmot 1:d0dfbce63a89 728 #define TIM_OSSI_ENABLE (TIM_BDTR_OSSI)
elmot 1:d0dfbce63a89 729 #define TIM_OSSI_DISABLE ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 730 /**
elmot 1:d0dfbce63a89 731 * @}
elmot 1:d0dfbce63a89 732 */
elmot 1:d0dfbce63a89 733 /** @defgroup TIM_Lock_level TIM Lock level
elmot 1:d0dfbce63a89 734 * @{
elmot 1:d0dfbce63a89 735 */
elmot 1:d0dfbce63a89 736 #define TIM_LOCKLEVEL_OFF ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 737 #define TIM_LOCKLEVEL_1 (TIM_BDTR_LOCK_0)
elmot 1:d0dfbce63a89 738 #define TIM_LOCKLEVEL_2 (TIM_BDTR_LOCK_1)
elmot 1:d0dfbce63a89 739 #define TIM_LOCKLEVEL_3 (TIM_BDTR_LOCK)
elmot 1:d0dfbce63a89 740 /**
elmot 1:d0dfbce63a89 741 * @}
elmot 1:d0dfbce63a89 742 */
elmot 1:d0dfbce63a89 743
elmot 1:d0dfbce63a89 744 /** @defgroup TIM_Break_Input_enable_disable TIM Break Input Enable
elmot 1:d0dfbce63a89 745 * @{
elmot 1:d0dfbce63a89 746 */
elmot 1:d0dfbce63a89 747 #define TIM_BREAK_ENABLE (TIM_BDTR_BKE)
elmot 1:d0dfbce63a89 748 #define TIM_BREAK_DISABLE ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 749 /**
elmot 1:d0dfbce63a89 750 * @}
elmot 1:d0dfbce63a89 751 */
elmot 1:d0dfbce63a89 752
elmot 1:d0dfbce63a89 753 /** @defgroup TIM_Break_Polarity TIM Break Input Polarity
elmot 1:d0dfbce63a89 754 * @{
elmot 1:d0dfbce63a89 755 */
elmot 1:d0dfbce63a89 756 #define TIM_BREAKPOLARITY_LOW ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 757 #define TIM_BREAKPOLARITY_HIGH (TIM_BDTR_BKP)
elmot 1:d0dfbce63a89 758 /**
elmot 1:d0dfbce63a89 759 * @}
elmot 1:d0dfbce63a89 760 */
elmot 1:d0dfbce63a89 761
elmot 1:d0dfbce63a89 762 /** @defgroup TIM_Break2_Input_enable_disable TIM Break input 2 Enable
elmot 1:d0dfbce63a89 763 * @{
elmot 1:d0dfbce63a89 764 */
elmot 1:d0dfbce63a89 765 #define TIM_BREAK2_DISABLE ((uint32_t)0x00000000)
elmot 1:d0dfbce63a89 766 #define TIM_BREAK2_ENABLE ((uint32_t)TIM_BDTR_BK2E)
elmot 1:d0dfbce63a89 767 /**
elmot 1:d0dfbce63a89 768 * @}
elmot 1:d0dfbce63a89 769 */
elmot 1:d0dfbce63a89 770
elmot 1:d0dfbce63a89 771 /** @defgroup TIM_Break2_Polarity TIM Break Input 2 Polarity
elmot 1:d0dfbce63a89 772 * @{
elmot 1:d0dfbce63a89 773 */
elmot 1:d0dfbce63a89 774 #define TIM_BREAK2POLARITY_LOW ((uint32_t)0x00000000)
elmot 1:d0dfbce63a89 775 #define TIM_BREAK2POLARITY_HIGH ((uint32_t)TIM_BDTR_BK2P)
elmot 1:d0dfbce63a89 776 /**
elmot 1:d0dfbce63a89 777 * @}
elmot 1:d0dfbce63a89 778 */
elmot 1:d0dfbce63a89 779
elmot 1:d0dfbce63a89 780 /** @defgroup TIM_AOE_Bit_Set_Reset TIM Automatic Output Enable
elmot 1:d0dfbce63a89 781 * @{
elmot 1:d0dfbce63a89 782 */
elmot 1:d0dfbce63a89 783 #define TIM_AUTOMATICOUTPUT_ENABLE (TIM_BDTR_AOE)
elmot 1:d0dfbce63a89 784 #define TIM_AUTOMATICOUTPUT_DISABLE ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 785 /**
elmot 1:d0dfbce63a89 786 * @}
elmot 1:d0dfbce63a89 787 */
elmot 1:d0dfbce63a89 788
elmot 1:d0dfbce63a89 789 /** @defgroup TIM_Group_Channel5 Group Channel 5 and Channel 1, 2 or 3
elmot 1:d0dfbce63a89 790 * @{
elmot 1:d0dfbce63a89 791 */
elmot 1:d0dfbce63a89 792 #define TIM_GROUPCH5_NONE (uint32_t)0x00000000 /* !< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */
elmot 1:d0dfbce63a89 793 #define TIM_GROUPCH5_OC1REFC (TIM_CCR5_GC5C1) /* !< OC1REFC is the logical AND of OC1REFC and OC5REF */
elmot 1:d0dfbce63a89 794 #define TIM_GROUPCH5_OC2REFC (TIM_CCR5_GC5C2) /* !< OC2REFC is the logical AND of OC2REFC and OC5REF */
elmot 1:d0dfbce63a89 795 #define TIM_GROUPCH5_OC3REFC (TIM_CCR5_GC5C3) /* !< OC3REFC is the logical AND of OC3REFC and OC5REF */
elmot 1:d0dfbce63a89 796 /**
elmot 1:d0dfbce63a89 797 * @}
elmot 1:d0dfbce63a89 798 */
elmot 1:d0dfbce63a89 799
elmot 1:d0dfbce63a89 800 /** @defgroup TIM_Master_Mode_Selection TIM Master Mode Selection
elmot 1:d0dfbce63a89 801 * @{
elmot 1:d0dfbce63a89 802 */
elmot 1:d0dfbce63a89 803 #define TIM_TRGO_RESET ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 804 #define TIM_TRGO_ENABLE (TIM_CR2_MMS_0)
elmot 1:d0dfbce63a89 805 #define TIM_TRGO_UPDATE (TIM_CR2_MMS_1)
elmot 1:d0dfbce63a89 806 #define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
elmot 1:d0dfbce63a89 807 #define TIM_TRGO_OC1REF (TIM_CR2_MMS_2)
elmot 1:d0dfbce63a89 808 #define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_0))
elmot 1:d0dfbce63a89 809 #define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1))
elmot 1:d0dfbce63a89 810 #define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
elmot 1:d0dfbce63a89 811 /**
elmot 1:d0dfbce63a89 812 * @}
elmot 1:d0dfbce63a89 813 */
elmot 1:d0dfbce63a89 814
elmot 1:d0dfbce63a89 815 /** @defgroup TIM_Master_Mode_Selection_2 TIM Master Mode Selection 2 (TRGO2)
elmot 1:d0dfbce63a89 816 * @{
elmot 1:d0dfbce63a89 817 */
elmot 1:d0dfbce63a89 818 #define TIM_TRGO2_RESET ((uint32_t)0x00000000)
elmot 1:d0dfbce63a89 819 #define TIM_TRGO2_ENABLE ((uint32_t)(TIM_CR2_MMS2_0))
elmot 1:d0dfbce63a89 820 #define TIM_TRGO2_UPDATE ((uint32_t)(TIM_CR2_MMS2_1))
elmot 1:d0dfbce63a89 821 #define TIM_TRGO2_OC1 ((uint32_t)(TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
elmot 1:d0dfbce63a89 822 #define TIM_TRGO2_OC1REF ((uint32_t)(TIM_CR2_MMS2_2))
elmot 1:d0dfbce63a89 823 #define TIM_TRGO2_OC2REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0))
elmot 1:d0dfbce63a89 824 #define TIM_TRGO2_OC3REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1))
elmot 1:d0dfbce63a89 825 #define TIM_TRGO2_OC4REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
elmot 1:d0dfbce63a89 826 #define TIM_TRGO2_OC5REF ((uint32_t)(TIM_CR2_MMS2_3))
elmot 1:d0dfbce63a89 827 #define TIM_TRGO2_OC6REF ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_0))
elmot 1:d0dfbce63a89 828 #define TIM_TRGO2_OC4REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1))
elmot 1:d0dfbce63a89 829 #define TIM_TRGO2_OC6REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
elmot 1:d0dfbce63a89 830 #define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2))
elmot 1:d0dfbce63a89 831 #define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0))
elmot 1:d0dfbce63a89 832 #define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 |TIM_CR2_MMS2_1))
elmot 1:d0dfbce63a89 833 #define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
elmot 1:d0dfbce63a89 834 /**
elmot 1:d0dfbce63a89 835 * @}
elmot 1:d0dfbce63a89 836 */
elmot 1:d0dfbce63a89 837
elmot 1:d0dfbce63a89 838 /** @defgroup TIM_Master_Slave_Mode TIM Master/Slave Mode
elmot 1:d0dfbce63a89 839 * @{
elmot 1:d0dfbce63a89 840 */
elmot 1:d0dfbce63a89 841 #define TIM_MASTERSLAVEMODE_ENABLE ((uint32_t)0x0080)
elmot 1:d0dfbce63a89 842 #define TIM_MASTERSLAVEMODE_DISABLE ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 843 /**
elmot 1:d0dfbce63a89 844 * @}
elmot 1:d0dfbce63a89 845 */
elmot 1:d0dfbce63a89 846
elmot 1:d0dfbce63a89 847 /** @defgroup TIM_Slave_Mode TIM Slave mode
elmot 1:d0dfbce63a89 848 * @{
elmot 1:d0dfbce63a89 849 */
elmot 1:d0dfbce63a89 850 #define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 851 #define TIM_SLAVEMODE_RESET ((uint32_t)(TIM_SMCR_SMS_2))
elmot 1:d0dfbce63a89 852 #define TIM_SLAVEMODE_GATED ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0))
elmot 1:d0dfbce63a89 853 #define TIM_SLAVEMODE_TRIGGER ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1))
elmot 1:d0dfbce63a89 854 #define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0))
elmot 1:d0dfbce63a89 855 #define TIM_SLAVEMODE_COMBINED_RESETTRIGGER ((uint32_t)(TIM_SMCR_SMS_3))
elmot 1:d0dfbce63a89 856 /**
elmot 1:d0dfbce63a89 857 * @}
elmot 1:d0dfbce63a89 858 */
elmot 1:d0dfbce63a89 859
elmot 1:d0dfbce63a89 860 /** @defgroup TIM_Output_Compare_and_PWM_modes TIM Output Compare and PWM Modes
elmot 1:d0dfbce63a89 861 * @{
elmot 1:d0dfbce63a89 862 */
elmot 1:d0dfbce63a89 863 #define TIM_OCMODE_TIMING ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 864 #define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0)
elmot 1:d0dfbce63a89 865 #define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1)
elmot 1:d0dfbce63a89 866 #define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
elmot 1:d0dfbce63a89 867 #define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)
elmot 1:d0dfbce63a89 868 #define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
elmot 1:d0dfbce63a89 869 #define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)
elmot 1:d0dfbce63a89 870 #define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2)
elmot 1:d0dfbce63a89 871
elmot 1:d0dfbce63a89 872 #define TIM_OCMODE_RETRIGERRABLE_OPM1 ((uint32_t)TIM_CCMR1_OC1M_3)
elmot 1:d0dfbce63a89 873 #define TIM_OCMODE_RETRIGERRABLE_OPM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0)
elmot 1:d0dfbce63a89 874 #define TIM_OCMODE_COMBINED_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2)
elmot 1:d0dfbce63a89 875 #define TIM_OCMODE_COMBINED_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2)
elmot 1:d0dfbce63a89 876 #define TIM_OCMODE_ASSYMETRIC_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2)
elmot 1:d0dfbce63a89 877 #define TIM_OCMODE_ASSYMETRIC_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M)
elmot 1:d0dfbce63a89 878 /**
elmot 1:d0dfbce63a89 879 * @}
elmot 1:d0dfbce63a89 880 */
elmot 1:d0dfbce63a89 881
elmot 1:d0dfbce63a89 882 /** @defgroup TIM_Trigger_Selection TIM Trigger Selection
elmot 1:d0dfbce63a89 883 * @{
elmot 1:d0dfbce63a89 884 */
elmot 1:d0dfbce63a89 885 #define TIM_TS_ITR0 ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 886 #define TIM_TS_ITR1 ((uint32_t)0x0010)
elmot 1:d0dfbce63a89 887 #define TIM_TS_ITR2 ((uint32_t)0x0020)
elmot 1:d0dfbce63a89 888 #define TIM_TS_ITR3 ((uint32_t)0x0030)
elmot 1:d0dfbce63a89 889 #define TIM_TS_TI1F_ED ((uint32_t)0x0040)
elmot 1:d0dfbce63a89 890 #define TIM_TS_TI1FP1 ((uint32_t)0x0050)
elmot 1:d0dfbce63a89 891 #define TIM_TS_TI2FP2 ((uint32_t)0x0060)
elmot 1:d0dfbce63a89 892 #define TIM_TS_ETRF ((uint32_t)0x0070)
elmot 1:d0dfbce63a89 893 #define TIM_TS_NONE ((uint32_t)0xFFFF)
elmot 1:d0dfbce63a89 894 /**
elmot 1:d0dfbce63a89 895 * @}
elmot 1:d0dfbce63a89 896 */
elmot 1:d0dfbce63a89 897
elmot 1:d0dfbce63a89 898 /** @defgroup TIM_Trigger_Polarity TIM Trigger Polarity
elmot 1:d0dfbce63a89 899 * @{
elmot 1:d0dfbce63a89 900 */
elmot 1:d0dfbce63a89 901 #define TIM_TRIGGERPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx trigger sources */
elmot 1:d0dfbce63a89 902 #define TIM_TRIGGERPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx trigger sources */
elmot 1:d0dfbce63a89 903 #define TIM_TRIGGERPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Polarity for TIxFPx or TI1_ED trigger sources */
elmot 1:d0dfbce63a89 904 #define TIM_TRIGGERPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /*!< Polarity for TIxFPx or TI1_ED trigger sources */
elmot 1:d0dfbce63a89 905 #define TIM_TRIGGERPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /*!< Polarity for TIxFPx or TI1_ED trigger sources */
elmot 1:d0dfbce63a89 906 /**
elmot 1:d0dfbce63a89 907 * @}
elmot 1:d0dfbce63a89 908 */
elmot 1:d0dfbce63a89 909
elmot 1:d0dfbce63a89 910 /** @defgroup TIM_Trigger_Prescaler TIM Trigger Prescaler
elmot 1:d0dfbce63a89 911 * @{
elmot 1:d0dfbce63a89 912 */
elmot 1:d0dfbce63a89 913 #define TIM_TRIGGERPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */
elmot 1:d0dfbce63a89 914 #define TIM_TRIGGERPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR Trigger: Capture performed once every 2 events. */
elmot 1:d0dfbce63a89 915 #define TIM_TRIGGERPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR Trigger: Capture performed once every 4 events. */
elmot 1:d0dfbce63a89 916 #define TIM_TRIGGERPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR Trigger: Capture performed once every 8 events. */
elmot 1:d0dfbce63a89 917 /**
elmot 1:d0dfbce63a89 918 * @}
elmot 1:d0dfbce63a89 919 */
elmot 1:d0dfbce63a89 920
elmot 1:d0dfbce63a89 921 /** @defgroup TIM_TI1_Selection TIM TI1 Input Selection
elmot 1:d0dfbce63a89 922 * @{
elmot 1:d0dfbce63a89 923 */
elmot 1:d0dfbce63a89 924 #define TIM_TI1SELECTION_CH1 ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 925 #define TIM_TI1SELECTION_XORCOMBINATION (TIM_CR2_TI1S)
elmot 1:d0dfbce63a89 926 /**
elmot 1:d0dfbce63a89 927 * @}
elmot 1:d0dfbce63a89 928 */
elmot 1:d0dfbce63a89 929
elmot 1:d0dfbce63a89 930 /** @defgroup TIM_DMA_Burst_Length TIM DMA Burst Length
elmot 1:d0dfbce63a89 931 * @{
elmot 1:d0dfbce63a89 932 */
elmot 1:d0dfbce63a89 933 #define TIM_DMABURSTLENGTH_1TRANSFER (0x00000000)
elmot 1:d0dfbce63a89 934 #define TIM_DMABURSTLENGTH_2TRANSFERS (0x00000100)
elmot 1:d0dfbce63a89 935 #define TIM_DMABURSTLENGTH_3TRANSFERS (0x00000200)
elmot 1:d0dfbce63a89 936 #define TIM_DMABURSTLENGTH_4TRANSFERS (0x00000300)
elmot 1:d0dfbce63a89 937 #define TIM_DMABURSTLENGTH_5TRANSFERS (0x00000400)
elmot 1:d0dfbce63a89 938 #define TIM_DMABURSTLENGTH_6TRANSFERS (0x00000500)
elmot 1:d0dfbce63a89 939 #define TIM_DMABURSTLENGTH_7TRANSFERS (0x00000600)
elmot 1:d0dfbce63a89 940 #define TIM_DMABURSTLENGTH_8TRANSFERS (0x00000700)
elmot 1:d0dfbce63a89 941 #define TIM_DMABURSTLENGTH_9TRANSFERS (0x00000800)
elmot 1:d0dfbce63a89 942 #define TIM_DMABURSTLENGTH_10TRANSFERS (0x00000900)
elmot 1:d0dfbce63a89 943 #define TIM_DMABURSTLENGTH_11TRANSFERS (0x00000A00)
elmot 1:d0dfbce63a89 944 #define TIM_DMABURSTLENGTH_12TRANSFERS (0x00000B00)
elmot 1:d0dfbce63a89 945 #define TIM_DMABURSTLENGTH_13TRANSFERS (0x00000C00)
elmot 1:d0dfbce63a89 946 #define TIM_DMABURSTLENGTH_14TRANSFERS (0x00000D00)
elmot 1:d0dfbce63a89 947 #define TIM_DMABURSTLENGTH_15TRANSFERS (0x00000E00)
elmot 1:d0dfbce63a89 948 #define TIM_DMABURSTLENGTH_16TRANSFERS (0x00000F00)
elmot 1:d0dfbce63a89 949 #define TIM_DMABURSTLENGTH_17TRANSFERS (0x00001000)
elmot 1:d0dfbce63a89 950 #define TIM_DMABURSTLENGTH_18TRANSFERS (0x00001100)
elmot 1:d0dfbce63a89 951 /**
elmot 1:d0dfbce63a89 952 * @}
elmot 1:d0dfbce63a89 953 */
elmot 1:d0dfbce63a89 954
elmot 1:d0dfbce63a89 955 /** @defgroup DMA_Handle_index TIM DMA Handle Index
elmot 1:d0dfbce63a89 956 * @{
elmot 1:d0dfbce63a89 957 */
elmot 1:d0dfbce63a89 958 #define TIM_DMA_ID_UPDATE ((uint16_t) 0x0) /*!< Index of the DMA handle used for Update DMA requests */
elmot 1:d0dfbce63a89 959 #define TIM_DMA_ID_CC1 ((uint16_t) 0x1) /*!< Index of the DMA handle used for Capture/Compare 1 DMA requests */
elmot 1:d0dfbce63a89 960 #define TIM_DMA_ID_CC2 ((uint16_t) 0x2) /*!< Index of the DMA handle used for Capture/Compare 2 DMA requests */
elmot 1:d0dfbce63a89 961 #define TIM_DMA_ID_CC3 ((uint16_t) 0x3) /*!< Index of the DMA handle used for Capture/Compare 3 DMA requests */
elmot 1:d0dfbce63a89 962 #define TIM_DMA_ID_CC4 ((uint16_t) 0x4) /*!< Index of the DMA handle used for Capture/Compare 4 DMA requests */
elmot 1:d0dfbce63a89 963 #define TIM_DMA_ID_COMMUTATION ((uint16_t) 0x5) /*!< Index of the DMA handle used for Commutation DMA requests */
elmot 1:d0dfbce63a89 964 #define TIM_DMA_ID_TRIGGER ((uint16_t) 0x6) /*!< Index of the DMA handle used for Trigger DMA requests */
elmot 1:d0dfbce63a89 965 /**
elmot 1:d0dfbce63a89 966 * @}
elmot 1:d0dfbce63a89 967 */
elmot 1:d0dfbce63a89 968
elmot 1:d0dfbce63a89 969 /** @defgroup Channel_CC_State TIM Capture/Compare Channel State
elmot 1:d0dfbce63a89 970 * @{
elmot 1:d0dfbce63a89 971 */
elmot 1:d0dfbce63a89 972 #define TIM_CCx_ENABLE ((uint32_t)0x0001)
elmot 1:d0dfbce63a89 973 #define TIM_CCx_DISABLE ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 974 #define TIM_CCxN_ENABLE ((uint32_t)0x0004)
elmot 1:d0dfbce63a89 975 #define TIM_CCxN_DISABLE ((uint32_t)0x0000)
elmot 1:d0dfbce63a89 976 /**
elmot 1:d0dfbce63a89 977 * @}
elmot 1:d0dfbce63a89 978 */
elmot 1:d0dfbce63a89 979
elmot 1:d0dfbce63a89 980 /** @defgroup TIM_Break_System TIM Break System
elmot 1:d0dfbce63a89 981 * @{
elmot 1:d0dfbce63a89 982 */
elmot 1:d0dfbce63a89 983 #define TIM_BREAK_SYSTEM_ECC SYSCFG_CFGR2_ECCL /*!< Enables and locks the ECC error signal with Break Input of TIM1/8/15/16/17 */
elmot 1:d0dfbce63a89 984 #define TIM_BREAK_SYSTEM_PVD SYSCFG_CFGR2_PVDL /*!< Enables and locks the PVD connection with TIM1/8/15/16/17 Break Input and also the PVDE and PLS bits of the Power Control Interface */
elmot 1:d0dfbce63a89 985 #define TIM_BREAK_SYSTEM_SRAM2_PARITY_ERROR SYSCFG_CFGR2_SPL /*!< Enables and locks the SRAM2_PARITY error signal with Break Input of TIM1/8/15/16/17 */
elmot 1:d0dfbce63a89 986 #define TIM_BREAK_SYSTEM_LOCKUP SYSCFG_CFGR2_CLL /*!< Enables and locks the LOCKUP output of CortexM4 with Break Input of TIM1/15/16/17 */
elmot 1:d0dfbce63a89 987 /**
elmot 1:d0dfbce63a89 988 * @}
elmot 1:d0dfbce63a89 989 */
elmot 1:d0dfbce63a89 990
elmot 1:d0dfbce63a89 991 /**
elmot 1:d0dfbce63a89 992 * @}
elmot 1:d0dfbce63a89 993 */
elmot 1:d0dfbce63a89 994 /* End of exported constants -------------------------------------------------*/
elmot 1:d0dfbce63a89 995
elmot 1:d0dfbce63a89 996 /* Exported macros -----------------------------------------------------------*/
elmot 1:d0dfbce63a89 997 /** @defgroup TIM_Exported_Macros TIM Exported Macros
elmot 1:d0dfbce63a89 998 * @{
elmot 1:d0dfbce63a89 999 */
elmot 1:d0dfbce63a89 1000
elmot 1:d0dfbce63a89 1001 /** @brief Reset TIM handle state.
elmot 1:d0dfbce63a89 1002 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1003 * @retval None
elmot 1:d0dfbce63a89 1004 */
elmot 1:d0dfbce63a89 1005 #define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TIM_STATE_RESET)
elmot 1:d0dfbce63a89 1006
elmot 1:d0dfbce63a89 1007 /**
elmot 1:d0dfbce63a89 1008 * @brief Enable the TIM peripheral.
elmot 1:d0dfbce63a89 1009 * @param __HANDLE__: TIM handle
elmot 1:d0dfbce63a89 1010 * @retval None
elmot 1:d0dfbce63a89 1011 */
elmot 1:d0dfbce63a89 1012 #define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1|=(TIM_CR1_CEN))
elmot 1:d0dfbce63a89 1013
elmot 1:d0dfbce63a89 1014 /**
elmot 1:d0dfbce63a89 1015 * @brief Enable the TIM main Output.
elmot 1:d0dfbce63a89 1016 * @param __HANDLE__: TIM handle
elmot 1:d0dfbce63a89 1017 * @retval None
elmot 1:d0dfbce63a89 1018 */
elmot 1:d0dfbce63a89 1019 #define __HAL_TIM_MOE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->BDTR|=(TIM_BDTR_MOE))
elmot 1:d0dfbce63a89 1020
elmot 1:d0dfbce63a89 1021 /**
elmot 1:d0dfbce63a89 1022 * @brief Disable the TIM peripheral.
elmot 1:d0dfbce63a89 1023 * @param __HANDLE__: TIM handle
elmot 1:d0dfbce63a89 1024 * @retval None
elmot 1:d0dfbce63a89 1025 */
elmot 1:d0dfbce63a89 1026 #define __HAL_TIM_DISABLE(__HANDLE__) \
elmot 1:d0dfbce63a89 1027 do { \
elmot 1:d0dfbce63a89 1028 if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \
elmot 1:d0dfbce63a89 1029 { \
elmot 1:d0dfbce63a89 1030 if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \
elmot 1:d0dfbce63a89 1031 { \
elmot 1:d0dfbce63a89 1032 (__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \
elmot 1:d0dfbce63a89 1033 } \
elmot 1:d0dfbce63a89 1034 } \
elmot 1:d0dfbce63a89 1035 } while(0)
elmot 1:d0dfbce63a89 1036
elmot 1:d0dfbce63a89 1037 /**
elmot 1:d0dfbce63a89 1038 * @brief Disable the TIM main Output.
elmot 1:d0dfbce63a89 1039 * @param __HANDLE__: TIM handle
elmot 1:d0dfbce63a89 1040 * @retval None
elmot 1:d0dfbce63a89 1041 * @note The Main Output Enable of a timer instance is disabled only if all the CCx and CCxN channels have been disabled
elmot 1:d0dfbce63a89 1042 */
elmot 1:d0dfbce63a89 1043 #define __HAL_TIM_MOE_DISABLE(__HANDLE__) \
elmot 1:d0dfbce63a89 1044 do { \
elmot 1:d0dfbce63a89 1045 if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \
elmot 1:d0dfbce63a89 1046 { \
elmot 1:d0dfbce63a89 1047 if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \
elmot 1:d0dfbce63a89 1048 { \
elmot 1:d0dfbce63a89 1049 (__HANDLE__)->Instance->BDTR &= ~(TIM_BDTR_MOE); \
elmot 1:d0dfbce63a89 1050 } \
elmot 1:d0dfbce63a89 1051 } \
elmot 1:d0dfbce63a89 1052 } while(0)
elmot 1:d0dfbce63a89 1053
elmot 1:d0dfbce63a89 1054 /** @brief Enable the specified TIM interrupt.
elmot 1:d0dfbce63a89 1055 * @param __HANDLE__: specifies the TIM Handle.
elmot 1:d0dfbce63a89 1056 * @param __INTERRUPT__: specifies the TIM interrupt source to enable.
elmot 1:d0dfbce63a89 1057 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1058 * @arg TIM_IT_UPDATE: Update interrupt
elmot 1:d0dfbce63a89 1059 * @arg TIM_IT_CC1: Capture/Compare 1 interrupt
elmot 1:d0dfbce63a89 1060 * @arg TIM_IT_CC2: Capture/Compare 2 interrupt
elmot 1:d0dfbce63a89 1061 * @arg TIM_IT_CC3: Capture/Compare 3 interrupt
elmot 1:d0dfbce63a89 1062 * @arg TIM_IT_CC4: Capture/Compare 4 interrupt
elmot 1:d0dfbce63a89 1063 * @arg TIM_IT_COM: Commutation interrupt
elmot 1:d0dfbce63a89 1064 * @arg TIM_IT_TRIGGER: Trigger interrupt
elmot 1:d0dfbce63a89 1065 * @arg TIM_IT_BREAK: Break interrupt
elmot 1:d0dfbce63a89 1066 * @retval None
elmot 1:d0dfbce63a89 1067 */
elmot 1:d0dfbce63a89 1068 #define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER |= (__INTERRUPT__))
elmot 1:d0dfbce63a89 1069
elmot 1:d0dfbce63a89 1070
elmot 1:d0dfbce63a89 1071 /** @brief Disable the specified TIM interrupt.
elmot 1:d0dfbce63a89 1072 * @param __HANDLE__: specifies the TIM Handle.
elmot 1:d0dfbce63a89 1073 * @param __INTERRUPT__: specifies the TIM interrupt source to disable.
elmot 1:d0dfbce63a89 1074 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1075 * @arg TIM_IT_UPDATE: Update interrupt
elmot 1:d0dfbce63a89 1076 * @arg TIM_IT_CC1: Capture/Compare 1 interrupt
elmot 1:d0dfbce63a89 1077 * @arg TIM_IT_CC2: Capture/Compare 2 interrupt
elmot 1:d0dfbce63a89 1078 * @arg TIM_IT_CC3: Capture/Compare 3 interrupt
elmot 1:d0dfbce63a89 1079 * @arg TIM_IT_CC4: Capture/Compare 4 interrupt
elmot 1:d0dfbce63a89 1080 * @arg TIM_IT_COM: Commutation interrupt
elmot 1:d0dfbce63a89 1081 * @arg TIM_IT_TRIGGER: Trigger interrupt
elmot 1:d0dfbce63a89 1082 * @arg TIM_IT_BREAK: Break interrupt
elmot 1:d0dfbce63a89 1083 * @retval None
elmot 1:d0dfbce63a89 1084 */
elmot 1:d0dfbce63a89 1085 #define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__))
elmot 1:d0dfbce63a89 1086
elmot 1:d0dfbce63a89 1087 /** @brief Enable the specified DMA request.
elmot 1:d0dfbce63a89 1088 * @param __HANDLE__: specifies the TIM Handle.
elmot 1:d0dfbce63a89 1089 * @param __DMA__: specifies the TIM DMA request to enable.
elmot 1:d0dfbce63a89 1090 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1091 * @arg TIM_DMA_UPDATE: Update DMA request
elmot 1:d0dfbce63a89 1092 * @arg TIM_DMA_CC1: Capture/Compare 1 DMA request
elmot 1:d0dfbce63a89 1093 * @arg TIM_DMA_CC2: Capture/Compare 2 DMA request
elmot 1:d0dfbce63a89 1094 * @arg TIM_DMA_CC3: Capture/Compare 3 DMA request
elmot 1:d0dfbce63a89 1095 * @arg TIM_DMA_CC4: Capture/Compare 4 DMA request
elmot 1:d0dfbce63a89 1096 * @arg TIM_DMA_COM: Commutation DMA request
elmot 1:d0dfbce63a89 1097 * @arg TIM_DMA_TRIGGER: Trigger DMA request
elmot 1:d0dfbce63a89 1098 * @arg TIM_DMA_BREAK: Break DMA request
elmot 1:d0dfbce63a89 1099 * @retval None
elmot 1:d0dfbce63a89 1100 */
elmot 1:d0dfbce63a89 1101 #define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER |= (__DMA__))
elmot 1:d0dfbce63a89 1102
elmot 1:d0dfbce63a89 1103 /** @brief Disable the specified DMA request.
elmot 1:d0dfbce63a89 1104 * @param __HANDLE__: specifies the TIM Handle.
elmot 1:d0dfbce63a89 1105 * @param __DMA__: specifies the TIM DMA request to disable.
elmot 1:d0dfbce63a89 1106 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1107 * @arg TIM_DMA_UPDATE: Update DMA request
elmot 1:d0dfbce63a89 1108 * @arg TIM_DMA_CC1: Capture/Compare 1 DMA request
elmot 1:d0dfbce63a89 1109 * @arg TIM_DMA_CC2: Capture/Compare 2 DMA request
elmot 1:d0dfbce63a89 1110 * @arg TIM_DMA_CC3: Capture/Compare 3 DMA request
elmot 1:d0dfbce63a89 1111 * @arg TIM_DMA_CC4: Capture/Compare 4 DMA request
elmot 1:d0dfbce63a89 1112 * @arg TIM_DMA_COM: Commutation DMA request
elmot 1:d0dfbce63a89 1113 * @arg TIM_DMA_TRIGGER: Trigger DMA request
elmot 1:d0dfbce63a89 1114 * @arg TIM_DMA_BREAK: Break DMA request
elmot 1:d0dfbce63a89 1115 * @retval None
elmot 1:d0dfbce63a89 1116 */
elmot 1:d0dfbce63a89 1117 #define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__))
elmot 1:d0dfbce63a89 1118
elmot 1:d0dfbce63a89 1119 /** @brief Check whether the specified TIM interrupt flag is set or not.
elmot 1:d0dfbce63a89 1120 * @param __HANDLE__: specifies the TIM Handle.
elmot 1:d0dfbce63a89 1121 * @param __FLAG__: specifies the TIM interrupt flag to check.
elmot 1:d0dfbce63a89 1122 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1123 * @arg TIM_FLAG_UPDATE: Update interrupt flag
elmot 1:d0dfbce63a89 1124 * @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag
elmot 1:d0dfbce63a89 1125 * @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag
elmot 1:d0dfbce63a89 1126 * @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag
elmot 1:d0dfbce63a89 1127 * @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag
elmot 1:d0dfbce63a89 1128 * @arg TIM_FLAG_CC5: Compare 5 interrupt flag
elmot 1:d0dfbce63a89 1129 * @arg TIM_FLAG_CC6: Compare 5 interrupt flag
elmot 1:d0dfbce63a89 1130 * @arg TIM_FLAG_COM: Commutation interrupt flag
elmot 1:d0dfbce63a89 1131 * @arg TIM_FLAG_TRIGGER: Trigger interrupt flag
elmot 1:d0dfbce63a89 1132 * @arg TIM_FLAG_BREAK: Break interrupt flag
elmot 1:d0dfbce63a89 1133 * @arg TIM_FLAG_BREAK2: Break 2 interrupt flag
elmot 1:d0dfbce63a89 1134 * @arg TIM_FLAG_SYSTEM_BREAK: System Break interrupt flag
elmot 1:d0dfbce63a89 1135 * @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag
elmot 1:d0dfbce63a89 1136 * @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag
elmot 1:d0dfbce63a89 1137 * @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag
elmot 1:d0dfbce63a89 1138 * @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag
elmot 1:d0dfbce63a89 1139 * @retval The new state of __FLAG__ (TRUE or FALSE).
elmot 1:d0dfbce63a89 1140 */
elmot 1:d0dfbce63a89 1141 #define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__))
elmot 1:d0dfbce63a89 1142
elmot 1:d0dfbce63a89 1143 /** @brief Clear the specified TIM interrupt flag.
elmot 1:d0dfbce63a89 1144 * @param __HANDLE__: specifies the TIM Handle.
elmot 1:d0dfbce63a89 1145 * @param __FLAG__: specifies the TIM interrupt flag to clear.
elmot 1:d0dfbce63a89 1146 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1147 * @arg TIM_FLAG_UPDATE: Update interrupt flag
elmot 1:d0dfbce63a89 1148 * @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag
elmot 1:d0dfbce63a89 1149 * @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag
elmot 1:d0dfbce63a89 1150 * @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag
elmot 1:d0dfbce63a89 1151 * @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag
elmot 1:d0dfbce63a89 1152 * @arg TIM_FLAG_CC5: Compare 5 interrupt flag
elmot 1:d0dfbce63a89 1153 * @arg TIM_FLAG_CC6: Compare 5 interrupt flag
elmot 1:d0dfbce63a89 1154 * @arg TIM_FLAG_COM: Commutation interrupt flag
elmot 1:d0dfbce63a89 1155 * @arg TIM_FLAG_TRIGGER: Trigger interrupt flag
elmot 1:d0dfbce63a89 1156 * @arg TIM_FLAG_BREAK: Break interrupt flag
elmot 1:d0dfbce63a89 1157 * @arg TIM_FLAG_BREAK2: Break 2 interrupt flag
elmot 1:d0dfbce63a89 1158 * @arg TIM_FLAG_SYSTEM_BREAK: System Break interrupt flag
elmot 1:d0dfbce63a89 1159 * @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag
elmot 1:d0dfbce63a89 1160 * @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag
elmot 1:d0dfbce63a89 1161 * @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag
elmot 1:d0dfbce63a89 1162 * @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag
elmot 1:d0dfbce63a89 1163 * @retval The new state of __FLAG__ (TRUE or FALSE).
elmot 1:d0dfbce63a89 1164 */
elmot 1:d0dfbce63a89 1165 #define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
elmot 1:d0dfbce63a89 1166
elmot 1:d0dfbce63a89 1167 /**
elmot 1:d0dfbce63a89 1168 * @brief Check whether the specified TIM interrupt source is enabled or not.
elmot 1:d0dfbce63a89 1169 * @param __HANDLE__: TIM handle
elmot 1:d0dfbce63a89 1170 * @param __INTERRUPT__: specifies the TIM interrupt source to check.
elmot 1:d0dfbce63a89 1171 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1172 * @arg TIM_IT_UPDATE: Update interrupt
elmot 1:d0dfbce63a89 1173 * @arg TIM_IT_CC1: Capture/Compare 1 interrupt
elmot 1:d0dfbce63a89 1174 * @arg TIM_IT_CC2: Capture/Compare 2 interrupt
elmot 1:d0dfbce63a89 1175 * @arg TIM_IT_CC3: Capture/Compare 3 interrupt
elmot 1:d0dfbce63a89 1176 * @arg TIM_IT_CC4: Capture/Compare 4 interrupt
elmot 1:d0dfbce63a89 1177 * @arg TIM_IT_COM: Commutation interrupt
elmot 1:d0dfbce63a89 1178 * @arg TIM_IT_TRIGGER: Trigger interrupt
elmot 1:d0dfbce63a89 1179 * @arg TIM_IT_BREAK: Break interrupt
elmot 1:d0dfbce63a89 1180 * @retval The state of TIM_IT (SET or RESET).
elmot 1:d0dfbce63a89 1181 */
elmot 1:d0dfbce63a89 1182 #define __HAL_TIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
elmot 1:d0dfbce63a89 1183
elmot 1:d0dfbce63a89 1184 /** @brief Clear the TIM interrupt pending bits.
elmot 1:d0dfbce63a89 1185 * @param __HANDLE__: TIM handle
elmot 1:d0dfbce63a89 1186 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
elmot 1:d0dfbce63a89 1187 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1188 * @arg TIM_IT_UPDATE: Update interrupt
elmot 1:d0dfbce63a89 1189 * @arg TIM_IT_CC1: Capture/Compare 1 interrupt
elmot 1:d0dfbce63a89 1190 * @arg TIM_IT_CC2: Capture/Compare 2 interrupt
elmot 1:d0dfbce63a89 1191 * @arg TIM_IT_CC3: Capture/Compare 3 interrupt
elmot 1:d0dfbce63a89 1192 * @arg TIM_IT_CC4: Capture/Compare 4 interrupt
elmot 1:d0dfbce63a89 1193 * @arg TIM_IT_COM: Commutation interrupt
elmot 1:d0dfbce63a89 1194 * @arg TIM_IT_TRIGGER: Trigger interrupt
elmot 1:d0dfbce63a89 1195 * @arg TIM_IT_BREAK: Break interrupt
elmot 1:d0dfbce63a89 1196 * @retval None
elmot 1:d0dfbce63a89 1197 */
elmot 1:d0dfbce63a89 1198 #define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__))
elmot 1:d0dfbce63a89 1199
elmot 1:d0dfbce63a89 1200 /**
elmot 1:d0dfbce63a89 1201 * @brief Indicates whether or not the TIM Counter is used as downcounter.
elmot 1:d0dfbce63a89 1202 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1203 * @retval False (Counter used as upcounter) or True (Counter used as downcounter)
elmot 1:d0dfbce63a89 1204 * @note This macro is particularly useful to get the counting mode when the timer operates in Center-aligned mode or Encoder
elmot 1:d0dfbce63a89 1205 mode.
elmot 1:d0dfbce63a89 1206 */
elmot 1:d0dfbce63a89 1207 #define __HAL_TIM_IS_TIM_COUNTING_DOWN(__HANDLE__) (((__HANDLE__)->Instance->CR1 &(TIM_CR1_DIR)) == (TIM_CR1_DIR))
elmot 1:d0dfbce63a89 1208
elmot 1:d0dfbce63a89 1209
elmot 1:d0dfbce63a89 1210 /**
elmot 1:d0dfbce63a89 1211 * @brief Set the TIM Prescaler on runtime.
elmot 1:d0dfbce63a89 1212 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1213 * @param __PRESC__: specifies the Prescaler new value.
elmot 1:d0dfbce63a89 1214 * @retval None
elmot 1:d0dfbce63a89 1215 */
elmot 1:d0dfbce63a89 1216 #define __HAL_TIM_SET_PRESCALER(__HANDLE__, __PRESC__) ((__HANDLE__)->Instance->PSC = (__PRESC__))
elmot 1:d0dfbce63a89 1217
elmot 1:d0dfbce63a89 1218 /**
elmot 1:d0dfbce63a89 1219 * @brief Set the TIM Counter Register value on runtime.
elmot 1:d0dfbce63a89 1220 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1221 * @param __COUNTER__: specifies the Counter register new value.
elmot 1:d0dfbce63a89 1222 * @retval None
elmot 1:d0dfbce63a89 1223 */
elmot 1:d0dfbce63a89 1224 #define __HAL_TIM_SET_COUNTER(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->CNT = (__COUNTER__))
elmot 1:d0dfbce63a89 1225
elmot 1:d0dfbce63a89 1226 /**
elmot 1:d0dfbce63a89 1227 * @brief Get the TIM Counter Register value on runtime.
elmot 1:d0dfbce63a89 1228 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1229 * @retval None
elmot 1:d0dfbce63a89 1230 */
elmot 1:d0dfbce63a89 1231 #define __HAL_TIM_GET_COUNTER(__HANDLE__) \
elmot 1:d0dfbce63a89 1232 ((__HANDLE__)->Instance->CNT)
elmot 1:d0dfbce63a89 1233
elmot 1:d0dfbce63a89 1234 /**
elmot 1:d0dfbce63a89 1235 * @brief Set the TIM Autoreload Register value on runtime without calling another time any Init function.
elmot 1:d0dfbce63a89 1236 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1237 * @param __AUTORELOAD__: specifies the Counter register new value.
elmot 1:d0dfbce63a89 1238 * @retval None
elmot 1:d0dfbce63a89 1239 */
elmot 1:d0dfbce63a89 1240 #define __HAL_TIM_SET_AUTORELOAD(__HANDLE__, __AUTORELOAD__) \
elmot 1:d0dfbce63a89 1241 do{ \
elmot 1:d0dfbce63a89 1242 (__HANDLE__)->Instance->ARR = (__AUTORELOAD__); \
elmot 1:d0dfbce63a89 1243 (__HANDLE__)->Init.Period = (__AUTORELOAD__); \
elmot 1:d0dfbce63a89 1244 } while(0)
elmot 1:d0dfbce63a89 1245
elmot 1:d0dfbce63a89 1246 /**
elmot 1:d0dfbce63a89 1247 * @brief Get the TIM Autoreload Register value on runtime.
elmot 1:d0dfbce63a89 1248 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1249 * @retval None
elmot 1:d0dfbce63a89 1250 */
elmot 1:d0dfbce63a89 1251 #define __HAL_TIM_GET_AUTORELOAD(__HANDLE__) \
elmot 1:d0dfbce63a89 1252 ((__HANDLE__)->Instance->ARR)
elmot 1:d0dfbce63a89 1253
elmot 1:d0dfbce63a89 1254 /**
elmot 1:d0dfbce63a89 1255 * @brief Set the TIM Clock Division value on runtime without calling another time any Init function.
elmot 1:d0dfbce63a89 1256 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1257 * @param __CKD__: specifies the clock division value.
elmot 1:d0dfbce63a89 1258 * This parameter can be one of the following value:
elmot 1:d0dfbce63a89 1259 * @arg TIM_CLOCKDIVISION_DIV1
elmot 1:d0dfbce63a89 1260 * @arg TIM_CLOCKDIVISION_DIV2
elmot 1:d0dfbce63a89 1261 * @arg TIM_CLOCKDIVISION_DIV4
elmot 1:d0dfbce63a89 1262 * @retval None
elmot 1:d0dfbce63a89 1263 */
elmot 1:d0dfbce63a89 1264 #define __HAL_TIM_SET_CLOCKDIVISION(__HANDLE__, __CKD__) \
elmot 1:d0dfbce63a89 1265 do{ \
elmot 1:d0dfbce63a89 1266 (__HANDLE__)->Instance->CR1 &= (uint16_t)(~TIM_CR1_CKD); \
elmot 1:d0dfbce63a89 1267 (__HANDLE__)->Instance->CR1 |= (__CKD__); \
elmot 1:d0dfbce63a89 1268 (__HANDLE__)->Init.ClockDivision = (__CKD__); \
elmot 1:d0dfbce63a89 1269 } while(0)
elmot 1:d0dfbce63a89 1270
elmot 1:d0dfbce63a89 1271 /**
elmot 1:d0dfbce63a89 1272 * @brief Get the TIM Clock Division value on runtime.
elmot 1:d0dfbce63a89 1273 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1274 * @retval None
elmot 1:d0dfbce63a89 1275 */
elmot 1:d0dfbce63a89 1276 #define __HAL_TIM_GET_CLOCKDIVISION(__HANDLE__) \
elmot 1:d0dfbce63a89 1277 ((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD)
elmot 1:d0dfbce63a89 1278
elmot 1:d0dfbce63a89 1279 /**
elmot 1:d0dfbce63a89 1280 * @brief Set the TIM Input Capture prescaler on runtime without calling another time HAL_TIM_IC_ConfigChannel() function.
elmot 1:d0dfbce63a89 1281 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1282 * @param __CHANNEL__: TIM Channels to be configured.
elmot 1:d0dfbce63a89 1283 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1284 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 1285 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 1286 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
elmot 1:d0dfbce63a89 1287 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
elmot 1:d0dfbce63a89 1288 * @param __ICPSC__: specifies the Input Capture4 prescaler new value.
elmot 1:d0dfbce63a89 1289 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1290 * @arg TIM_ICPSC_DIV1: no prescaler
elmot 1:d0dfbce63a89 1291 * @arg TIM_ICPSC_DIV2: capture is done once every 2 events
elmot 1:d0dfbce63a89 1292 * @arg TIM_ICPSC_DIV4: capture is done once every 4 events
elmot 1:d0dfbce63a89 1293 * @arg TIM_ICPSC_DIV8: capture is done once every 8 events
elmot 1:d0dfbce63a89 1294 * @retval None
elmot 1:d0dfbce63a89 1295 */
elmot 1:d0dfbce63a89 1296 #define __HAL_TIM_SET_ICPRESCALER(__HANDLE__, __CHANNEL__, __ICPSC__) \
elmot 1:d0dfbce63a89 1297 do{ \
elmot 1:d0dfbce63a89 1298 TIM_RESET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__)); \
elmot 1:d0dfbce63a89 1299 TIM_SET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__), (__ICPSC__)); \
elmot 1:d0dfbce63a89 1300 } while(0)
elmot 1:d0dfbce63a89 1301
elmot 1:d0dfbce63a89 1302 /**
elmot 1:d0dfbce63a89 1303 * @brief Get the TIM Input Capture prescaler on runtime.
elmot 1:d0dfbce63a89 1304 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1305 * @param __CHANNEL__: TIM Channels to be configured.
elmot 1:d0dfbce63a89 1306 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1307 * @arg TIM_CHANNEL_1: get input capture 1 prescaler value
elmot 1:d0dfbce63a89 1308 * @arg TIM_CHANNEL_2: get input capture 2 prescaler value
elmot 1:d0dfbce63a89 1309 * @arg TIM_CHANNEL_3: get input capture 3 prescaler value
elmot 1:d0dfbce63a89 1310 * @arg TIM_CHANNEL_4: get input capture 4 prescaler value
elmot 1:d0dfbce63a89 1311 * @retval None
elmot 1:d0dfbce63a89 1312 */
elmot 1:d0dfbce63a89 1313 #define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \
elmot 1:d0dfbce63a89 1314 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\
elmot 1:d0dfbce63a89 1315 ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8) :\
elmot 1:d0dfbce63a89 1316 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\
elmot 1:d0dfbce63a89 1317 (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8)
elmot 1:d0dfbce63a89 1318
elmot 1:d0dfbce63a89 1319 /**
elmot 1:d0dfbce63a89 1320 * @brief Set the TIM Capture Compare Register value on runtime without calling another time ConfigChannel function.
elmot 1:d0dfbce63a89 1321 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1322 * @param __CHANNEL__: TIM Channels to be configured.
elmot 1:d0dfbce63a89 1323 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1324 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 1325 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 1326 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
elmot 1:d0dfbce63a89 1327 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
elmot 1:d0dfbce63a89 1328 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
elmot 1:d0dfbce63a89 1329 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
elmot 1:d0dfbce63a89 1330 * @param __COMPARE__: specifies the Capture Compare register new value.
elmot 1:d0dfbce63a89 1331 * @retval None
elmot 1:d0dfbce63a89 1332 */
elmot 1:d0dfbce63a89 1333 #define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \
elmot 1:d0dfbce63a89 1334 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) :\
elmot 1:d0dfbce63a89 1335 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) :\
elmot 1:d0dfbce63a89 1336 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) :\
elmot 1:d0dfbce63a89 1337 ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4 = (__COMPARE__)) :\
elmot 1:d0dfbce63a89 1338 ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5 = (__COMPARE__)) :\
elmot 1:d0dfbce63a89 1339 ((__HANDLE__)->Instance->CCR6 = (__COMPARE__)))
elmot 1:d0dfbce63a89 1340
elmot 1:d0dfbce63a89 1341 /**
elmot 1:d0dfbce63a89 1342 * @brief Get the TIM Capture Compare Register value on runtime.
elmot 1:d0dfbce63a89 1343 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1344 * @param __CHANNEL__: TIM Channel associated with the capture compare register
elmot 1:d0dfbce63a89 1345 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1346 * @arg TIM_CHANNEL_1: get capture/compare 1 register value
elmot 1:d0dfbce63a89 1347 * @arg TIM_CHANNEL_2: get capture/compare 2 register value
elmot 1:d0dfbce63a89 1348 * @arg TIM_CHANNEL_3: get capture/compare 3 register value
elmot 1:d0dfbce63a89 1349 * @arg TIM_CHANNEL_4: get capture/compare 4 register value
elmot 1:d0dfbce63a89 1350 * @arg TIM_CHANNEL_5: get capture/compare 5 register value
elmot 1:d0dfbce63a89 1351 * @arg TIM_CHANNEL_6: get capture/compare 6 register value
elmot 1:d0dfbce63a89 1352 * @retval None
elmot 1:d0dfbce63a89 1353 */
elmot 1:d0dfbce63a89 1354 #define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \
elmot 1:d0dfbce63a89 1355 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) :\
elmot 1:d0dfbce63a89 1356 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) :\
elmot 1:d0dfbce63a89 1357 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) :\
elmot 1:d0dfbce63a89 1358 ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4) :\
elmot 1:d0dfbce63a89 1359 ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5) :\
elmot 1:d0dfbce63a89 1360 ((__HANDLE__)->Instance->CCR6))
elmot 1:d0dfbce63a89 1361
elmot 1:d0dfbce63a89 1362 /**
elmot 1:d0dfbce63a89 1363 * @brief Set the Update Request Source (URS) bit of the TIMx_CR1 register.
elmot 1:d0dfbce63a89 1364 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1365 * @note When the USR bit of the TIMx_CR1 register is set, only counter
elmot 1:d0dfbce63a89 1366 * overflow/underflow generates an update interrupt or DMA request (if
elmot 1:d0dfbce63a89 1367 * enabled)
elmot 1:d0dfbce63a89 1368 * @retval None
elmot 1:d0dfbce63a89 1369 */
elmot 1:d0dfbce63a89 1370 #define __HAL_TIM_URS_ENABLE(__HANDLE__) \
elmot 1:d0dfbce63a89 1371 ((__HANDLE__)->Instance->CR1|= (TIM_CR1_URS))
elmot 1:d0dfbce63a89 1372
elmot 1:d0dfbce63a89 1373 /**
elmot 1:d0dfbce63a89 1374 * @brief Reset the Update Request Source (URS) bit of the TIMx_CR1 register.
elmot 1:d0dfbce63a89 1375 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1376 * @note When the USR bit of the TIMx_CR1 register is reset, any of the
elmot 1:d0dfbce63a89 1377 * following events generate an update interrupt or DMA request (if
elmot 1:d0dfbce63a89 1378 * enabled):
elmot 1:d0dfbce63a89 1379 * _ Counter overflow underflow
elmot 1:d0dfbce63a89 1380 * _ Setting the UG bit
elmot 1:d0dfbce63a89 1381 * _ Update generation through the slave mode controller
elmot 1:d0dfbce63a89 1382 * @retval None
elmot 1:d0dfbce63a89 1383 */
elmot 1:d0dfbce63a89 1384 #define __HAL_TIM_URS_DISABLE(__HANDLE__) \
elmot 1:d0dfbce63a89 1385 ((__HANDLE__)->Instance->CR1&=~(TIM_CR1_URS))
elmot 1:d0dfbce63a89 1386
elmot 1:d0dfbce63a89 1387 /**
elmot 1:d0dfbce63a89 1388 * @brief Set the TIM Capture x input polarity on runtime.
elmot 1:d0dfbce63a89 1389 * @param __HANDLE__: TIM handle.
elmot 1:d0dfbce63a89 1390 * @param __CHANNEL__: TIM Channels to be configured.
elmot 1:d0dfbce63a89 1391 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1392 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
elmot 1:d0dfbce63a89 1393 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
elmot 1:d0dfbce63a89 1394 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
elmot 1:d0dfbce63a89 1395 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
elmot 1:d0dfbce63a89 1396 * @param __POLARITY__: Polarity for TIx source
elmot 1:d0dfbce63a89 1397 * @arg TIM_INPUTCHANNELPOLARITY_RISING: Rising Edge
elmot 1:d0dfbce63a89 1398 * @arg TIM_INPUTCHANNELPOLARITY_FALLING: Falling Edge
elmot 1:d0dfbce63a89 1399 * @arg TIM_INPUTCHANNELPOLARITY_BOTHEDGE: Rising and Falling Edge
elmot 1:d0dfbce63a89 1400 * @retval None
elmot 1:d0dfbce63a89 1401 */
elmot 1:d0dfbce63a89 1402 #define __HAL_TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \
elmot 1:d0dfbce63a89 1403 do{ \
elmot 1:d0dfbce63a89 1404 TIM_RESET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__)); \
elmot 1:d0dfbce63a89 1405 TIM_SET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__), (__POLARITY__)); \
elmot 1:d0dfbce63a89 1406 }while(0)
elmot 1:d0dfbce63a89 1407
elmot 1:d0dfbce63a89 1408 /**
elmot 1:d0dfbce63a89 1409 * @}
elmot 1:d0dfbce63a89 1410 */
elmot 1:d0dfbce63a89 1411 /* End of exported macros ----------------------------------------------------*/
elmot 1:d0dfbce63a89 1412
elmot 1:d0dfbce63a89 1413 /* Private constants ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 1414 /** @defgroup TIM_Private_Constants TIM Private Constants
elmot 1:d0dfbce63a89 1415 * @{
elmot 1:d0dfbce63a89 1416 */
elmot 1:d0dfbce63a89 1417 /* The counter of a timer instance is disabled only if all the CCx and CCxN
elmot 1:d0dfbce63a89 1418 channels have been disabled */
elmot 1:d0dfbce63a89 1419 #define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E))
elmot 1:d0dfbce63a89 1420 #define TIM_CCER_CCxNE_MASK ((uint32_t)(TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE))
elmot 1:d0dfbce63a89 1421 /**
elmot 1:d0dfbce63a89 1422 * @}
elmot 1:d0dfbce63a89 1423 */
elmot 1:d0dfbce63a89 1424 /* End of private constants --------------------------------------------------*/
elmot 1:d0dfbce63a89 1425
elmot 1:d0dfbce63a89 1426 /* Private macros ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 1427 /** @defgroup TIM_Private_Macros TIM Private Macros
elmot 1:d0dfbce63a89 1428 * @{
elmot 1:d0dfbce63a89 1429 */
elmot 1:d0dfbce63a89 1430
elmot 1:d0dfbce63a89 1431 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \
elmot 1:d0dfbce63a89 1432 ((__MODE__) == TIM_CLEARINPUTSOURCE_OCREFCLR) || \
elmot 1:d0dfbce63a89 1433 ((__MODE__) == TIM_CLEARINPUTSOURCE_NONE))
elmot 1:d0dfbce63a89 1434
elmot 1:d0dfbce63a89 1435 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \
elmot 1:d0dfbce63a89 1436 ((__BASE__) == TIM_DMABASE_CR2) || \
elmot 1:d0dfbce63a89 1437 ((__BASE__) == TIM_DMABASE_SMCR) || \
elmot 1:d0dfbce63a89 1438 ((__BASE__) == TIM_DMABASE_DIER) || \
elmot 1:d0dfbce63a89 1439 ((__BASE__) == TIM_DMABASE_SR) || \
elmot 1:d0dfbce63a89 1440 ((__BASE__) == TIM_DMABASE_EGR) || \
elmot 1:d0dfbce63a89 1441 ((__BASE__) == TIM_DMABASE_CCMR1) || \
elmot 1:d0dfbce63a89 1442 ((__BASE__) == TIM_DMABASE_CCMR2) || \
elmot 1:d0dfbce63a89 1443 ((__BASE__) == TIM_DMABASE_CCER) || \
elmot 1:d0dfbce63a89 1444 ((__BASE__) == TIM_DMABASE_CNT) || \
elmot 1:d0dfbce63a89 1445 ((__BASE__) == TIM_DMABASE_PSC) || \
elmot 1:d0dfbce63a89 1446 ((__BASE__) == TIM_DMABASE_ARR) || \
elmot 1:d0dfbce63a89 1447 ((__BASE__) == TIM_DMABASE_RCR) || \
elmot 1:d0dfbce63a89 1448 ((__BASE__) == TIM_DMABASE_CCR1) || \
elmot 1:d0dfbce63a89 1449 ((__BASE__) == TIM_DMABASE_CCR2) || \
elmot 1:d0dfbce63a89 1450 ((__BASE__) == TIM_DMABASE_CCR3) || \
elmot 1:d0dfbce63a89 1451 ((__BASE__) == TIM_DMABASE_CCR4) || \
elmot 1:d0dfbce63a89 1452 ((__BASE__) == TIM_DMABASE_BDTR) || \
elmot 1:d0dfbce63a89 1453 ((__BASE__) == TIM_DMABASE_CCMR3) || \
elmot 1:d0dfbce63a89 1454 ((__BASE__) == TIM_DMABASE_CCR5) || \
elmot 1:d0dfbce63a89 1455 ((__BASE__) == TIM_DMABASE_CCR6) || \
elmot 1:d0dfbce63a89 1456 ((__BASE__) == TIM_DMABASE_OR1) || \
elmot 1:d0dfbce63a89 1457 ((__BASE__) == TIM_DMABASE_OR2) || \
elmot 1:d0dfbce63a89 1458 ((__BASE__) == TIM_DMABASE_OR3))
elmot 1:d0dfbce63a89 1459
elmot 1:d0dfbce63a89 1460
elmot 1:d0dfbce63a89 1461 #define IS_TIM_EVENT_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFFFE00) == 0x00000000) && ((__SOURCE__) != 0x00000000))
elmot 1:d0dfbce63a89 1462
elmot 1:d0dfbce63a89 1463
elmot 1:d0dfbce63a89 1464 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \
elmot 1:d0dfbce63a89 1465 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
elmot 1:d0dfbce63a89 1466 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
elmot 1:d0dfbce63a89 1467 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
elmot 1:d0dfbce63a89 1468 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
elmot 1:d0dfbce63a89 1469
elmot 1:d0dfbce63a89 1470 #define IS_TIM_CLOCKDIVISION_DIV(__DIV__) (((__DIV__) == TIM_CLOCKDIVISION_DIV1) || \
elmot 1:d0dfbce63a89 1471 ((__DIV__) == TIM_CLOCKDIVISION_DIV2) || \
elmot 1:d0dfbce63a89 1472 ((__DIV__) == TIM_CLOCKDIVISION_DIV4))
elmot 1:d0dfbce63a89 1473
elmot 1:d0dfbce63a89 1474 #define IS_TIM_FAST_STATE(__STATE__) (((__STATE__) == TIM_OCFAST_DISABLE) || \
elmot 1:d0dfbce63a89 1475 ((__STATE__) == TIM_OCFAST_ENABLE))
elmot 1:d0dfbce63a89 1476
elmot 1:d0dfbce63a89 1477 #define IS_TIM_OC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_OCPOLARITY_HIGH) || \
elmot 1:d0dfbce63a89 1478 ((__POLARITY__) == TIM_OCPOLARITY_LOW))
elmot 1:d0dfbce63a89 1479
elmot 1:d0dfbce63a89 1480 #define IS_TIM_OCN_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_OCNPOLARITY_HIGH) || \
elmot 1:d0dfbce63a89 1481 ((__POLARITY__) == TIM_OCNPOLARITY_LOW))
elmot 1:d0dfbce63a89 1482
elmot 1:d0dfbce63a89 1483 #define IS_TIM_OCIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCIDLESTATE_SET) || \
elmot 1:d0dfbce63a89 1484 ((__STATE__) == TIM_OCIDLESTATE_RESET))
elmot 1:d0dfbce63a89 1485
elmot 1:d0dfbce63a89 1486 #define IS_TIM_OCNIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCNIDLESTATE_SET) || \
elmot 1:d0dfbce63a89 1487 ((__STATE__) == TIM_OCNIDLESTATE_RESET))
elmot 1:d0dfbce63a89 1488
elmot 1:d0dfbce63a89 1489 #define IS_TIM_IC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_ICPOLARITY_RISING) || \
elmot 1:d0dfbce63a89 1490 ((__POLARITY__) == TIM_ICPOLARITY_FALLING) || \
elmot 1:d0dfbce63a89 1491 ((__POLARITY__) == TIM_ICPOLARITY_BOTHEDGE))
elmot 1:d0dfbce63a89 1492
elmot 1:d0dfbce63a89 1493 #define IS_TIM_IC_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_ICSELECTION_DIRECTTI) || \
elmot 1:d0dfbce63a89 1494 ((__SELECTION__) == TIM_ICSELECTION_INDIRECTTI) || \
elmot 1:d0dfbce63a89 1495 ((__SELECTION__) == TIM_ICSELECTION_TRC))
elmot 1:d0dfbce63a89 1496
elmot 1:d0dfbce63a89 1497 #define IS_TIM_IC_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_ICPSC_DIV1) || \
elmot 1:d0dfbce63a89 1498 ((__PRESCALER__) == TIM_ICPSC_DIV2) || \
elmot 1:d0dfbce63a89 1499 ((__PRESCALER__) == TIM_ICPSC_DIV4) || \
elmot 1:d0dfbce63a89 1500 ((__PRESCALER__) == TIM_ICPSC_DIV8))
elmot 1:d0dfbce63a89 1501
elmot 1:d0dfbce63a89 1502 #define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \
elmot 1:d0dfbce63a89 1503 ((__MODE__) == TIM_OPMODE_REPETITIVE))
elmot 1:d0dfbce63a89 1504
elmot 1:d0dfbce63a89 1505 #define IS_TIM_ENCODER_MODE(__MODE__) (((__MODE__) == TIM_ENCODERMODE_TI1) || \
elmot 1:d0dfbce63a89 1506 ((__MODE__) == TIM_ENCODERMODE_TI2) || \
elmot 1:d0dfbce63a89 1507 ((__MODE__) == TIM_ENCODERMODE_TI12))
elmot 1:d0dfbce63a89 1508
elmot 1:d0dfbce63a89 1509 #define IS_TIM_DMA_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFF80FF) == 0x00000000) && ((__SOURCE__) != 0x00000000))
elmot 1:d0dfbce63a89 1510
elmot 1:d0dfbce63a89 1511 #define IS_TIM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
elmot 1:d0dfbce63a89 1512 ((__CHANNEL__) == TIM_CHANNEL_2) || \
elmot 1:d0dfbce63a89 1513 ((__CHANNEL__) == TIM_CHANNEL_3) || \
elmot 1:d0dfbce63a89 1514 ((__CHANNEL__) == TIM_CHANNEL_4) || \
elmot 1:d0dfbce63a89 1515 ((__CHANNEL__) == TIM_CHANNEL_5) || \
elmot 1:d0dfbce63a89 1516 ((__CHANNEL__) == TIM_CHANNEL_6) || \
elmot 1:d0dfbce63a89 1517 ((__CHANNEL__) == TIM_CHANNEL_ALL))
elmot 1:d0dfbce63a89 1518
elmot 1:d0dfbce63a89 1519 #define IS_TIM_OPM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
elmot 1:d0dfbce63a89 1520 ((__CHANNEL__) == TIM_CHANNEL_2))
elmot 1:d0dfbce63a89 1521
elmot 1:d0dfbce63a89 1522 #define IS_TIM_COMPLEMENTARY_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
elmot 1:d0dfbce63a89 1523 ((__CHANNEL__) == TIM_CHANNEL_2) || \
elmot 1:d0dfbce63a89 1524 ((__CHANNEL__) == TIM_CHANNEL_3))
elmot 1:d0dfbce63a89 1525
elmot 1:d0dfbce63a89 1526 #define IS_TIM_CLOCKSOURCE(__CLOCK__) (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
elmot 1:d0dfbce63a89 1527 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
elmot 1:d0dfbce63a89 1528 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
elmot 1:d0dfbce63a89 1529 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
elmot 1:d0dfbce63a89 1530 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
elmot 1:d0dfbce63a89 1531 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
elmot 1:d0dfbce63a89 1532 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
elmot 1:d0dfbce63a89 1533 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
elmot 1:d0dfbce63a89 1534 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
elmot 1:d0dfbce63a89 1535 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1))
elmot 1:d0dfbce63a89 1536
elmot 1:d0dfbce63a89 1537 #define IS_TIM_CLOCKPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLOCKPOLARITY_INVERTED) || \
elmot 1:d0dfbce63a89 1538 ((__POLARITY__) == TIM_CLOCKPOLARITY_NONINVERTED) || \
elmot 1:d0dfbce63a89 1539 ((__POLARITY__) == TIM_CLOCKPOLARITY_RISING) || \
elmot 1:d0dfbce63a89 1540 ((__POLARITY__) == TIM_CLOCKPOLARITY_FALLING) || \
elmot 1:d0dfbce63a89 1541 ((__POLARITY__) == TIM_CLOCKPOLARITY_BOTHEDGE))
elmot 1:d0dfbce63a89 1542
elmot 1:d0dfbce63a89 1543 #define IS_TIM_CLOCKPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV1) || \
elmot 1:d0dfbce63a89 1544 ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV2) || \
elmot 1:d0dfbce63a89 1545 ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV4) || \
elmot 1:d0dfbce63a89 1546 ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV8))
elmot 1:d0dfbce63a89 1547
elmot 1:d0dfbce63a89 1548 #define IS_TIM_CLOCKFILTER(ICFILTER) ((ICFILTER) <= 0xF)
elmot 1:d0dfbce63a89 1549
elmot 1:d0dfbce63a89 1550 #define IS_TIM_CLEARINPUT_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLEARINPUTPOLARITY_INVERTED) || \
elmot 1:d0dfbce63a89 1551 ((__POLARITY__) == TIM_CLEARINPUTPOLARITY_NONINVERTED))
elmot 1:d0dfbce63a89 1552
elmot 1:d0dfbce63a89 1553 #define IS_TIM_CLEARINPUT_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV1) || \
elmot 1:d0dfbce63a89 1554 ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV2) || \
elmot 1:d0dfbce63a89 1555 ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV4) || \
elmot 1:d0dfbce63a89 1556 ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV8))
elmot 1:d0dfbce63a89 1557
elmot 1:d0dfbce63a89 1558 #define IS_TIM_CLEARINPUT_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF)
elmot 1:d0dfbce63a89 1559
elmot 1:d0dfbce63a89 1560
elmot 1:d0dfbce63a89 1561 #define IS_TIM_OSSR_STATE(__STATE__) (((__STATE__) == TIM_OSSR_ENABLE) || \
elmot 1:d0dfbce63a89 1562 ((__STATE__) == TIM_OSSR_DISABLE))
elmot 1:d0dfbce63a89 1563
elmot 1:d0dfbce63a89 1564 #define IS_TIM_OSSI_STATE(__STATE__) (((__STATE__) == TIM_OSSI_ENABLE) || \
elmot 1:d0dfbce63a89 1565 ((__STATE__) == TIM_OSSI_DISABLE))
elmot 1:d0dfbce63a89 1566
elmot 1:d0dfbce63a89 1567 #define IS_TIM_LOCK_LEVEL(__LEVEL__) (((__LEVEL__) == TIM_LOCKLEVEL_OFF) || \
elmot 1:d0dfbce63a89 1568 ((__LEVEL__) == TIM_LOCKLEVEL_1) || \
elmot 1:d0dfbce63a89 1569 ((__LEVEL__) == TIM_LOCKLEVEL_2) || \
elmot 1:d0dfbce63a89 1570 ((__LEVEL__) == TIM_LOCKLEVEL_3))
elmot 1:d0dfbce63a89 1571
elmot 1:d0dfbce63a89 1572 #define IS_TIM_BREAK_FILTER(__BRKFILTER__) ((__BRKFILTER__) <= 0xF)
elmot 1:d0dfbce63a89 1573
elmot 1:d0dfbce63a89 1574
elmot 1:d0dfbce63a89 1575 #define IS_TIM_BREAK_STATE(__STATE__) (((__STATE__) == TIM_BREAK_ENABLE) || \
elmot 1:d0dfbce63a89 1576 ((__STATE__) == TIM_BREAK_DISABLE))
elmot 1:d0dfbce63a89 1577
elmot 1:d0dfbce63a89 1578 #define IS_TIM_BREAK_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKPOLARITY_LOW) || \
elmot 1:d0dfbce63a89 1579 ((__POLARITY__) == TIM_BREAKPOLARITY_HIGH))
elmot 1:d0dfbce63a89 1580
elmot 1:d0dfbce63a89 1581 #define IS_TIM_BREAK2_STATE(__STATE__) (((__STATE__) == TIM_BREAK2_ENABLE) || \
elmot 1:d0dfbce63a89 1582 ((__STATE__) == TIM_BREAK2_DISABLE))
elmot 1:d0dfbce63a89 1583
elmot 1:d0dfbce63a89 1584 #define IS_TIM_BREAK2_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAK2POLARITY_LOW) || \
elmot 1:d0dfbce63a89 1585 ((__POLARITY__) == TIM_BREAK2POLARITY_HIGH))
elmot 1:d0dfbce63a89 1586
elmot 1:d0dfbce63a89 1587 #define IS_TIM_AUTOMATIC_OUTPUT_STATE(__STATE__) (((__STATE__) == TIM_AUTOMATICOUTPUT_ENABLE) || \
elmot 1:d0dfbce63a89 1588 ((__STATE__) == TIM_AUTOMATICOUTPUT_DISABLE))
elmot 1:d0dfbce63a89 1589
elmot 1:d0dfbce63a89 1590 #define IS_TIM_GROUPCH5(__OCREF__) ((((__OCREF__) & 0x1FFFFFFF) == 0x00000000))
elmot 1:d0dfbce63a89 1591
elmot 1:d0dfbce63a89 1592 #define IS_TIM_TRGO_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO_RESET) || \
elmot 1:d0dfbce63a89 1593 ((__SOURCE__) == TIM_TRGO_ENABLE) || \
elmot 1:d0dfbce63a89 1594 ((__SOURCE__) == TIM_TRGO_UPDATE) || \
elmot 1:d0dfbce63a89 1595 ((__SOURCE__) == TIM_TRGO_OC1) || \
elmot 1:d0dfbce63a89 1596 ((__SOURCE__) == TIM_TRGO_OC1REF) || \
elmot 1:d0dfbce63a89 1597 ((__SOURCE__) == TIM_TRGO_OC2REF) || \
elmot 1:d0dfbce63a89 1598 ((__SOURCE__) == TIM_TRGO_OC3REF) || \
elmot 1:d0dfbce63a89 1599 ((__SOURCE__) == TIM_TRGO_OC4REF))
elmot 1:d0dfbce63a89 1600
elmot 1:d0dfbce63a89 1601 #define IS_TIM_TRGO2_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO2_RESET) || \
elmot 1:d0dfbce63a89 1602 ((__SOURCE__) == TIM_TRGO2_ENABLE) || \
elmot 1:d0dfbce63a89 1603 ((__SOURCE__) == TIM_TRGO2_UPDATE) || \
elmot 1:d0dfbce63a89 1604 ((__SOURCE__) == TIM_TRGO2_OC1) || \
elmot 1:d0dfbce63a89 1605 ((__SOURCE__) == TIM_TRGO2_OC1REF) || \
elmot 1:d0dfbce63a89 1606 ((__SOURCE__) == TIM_TRGO2_OC2REF) || \
elmot 1:d0dfbce63a89 1607 ((__SOURCE__) == TIM_TRGO2_OC3REF) || \
elmot 1:d0dfbce63a89 1608 ((__SOURCE__) == TIM_TRGO2_OC3REF) || \
elmot 1:d0dfbce63a89 1609 ((__SOURCE__) == TIM_TRGO2_OC4REF) || \
elmot 1:d0dfbce63a89 1610 ((__SOURCE__) == TIM_TRGO2_OC5REF) || \
elmot 1:d0dfbce63a89 1611 ((__SOURCE__) == TIM_TRGO2_OC6REF) || \
elmot 1:d0dfbce63a89 1612 ((__SOURCE__) == TIM_TRGO2_OC4REF_RISINGFALLING) || \
elmot 1:d0dfbce63a89 1613 ((__SOURCE__) == TIM_TRGO2_OC6REF_RISINGFALLING) || \
elmot 1:d0dfbce63a89 1614 ((__SOURCE__) == TIM_TRGO2_OC4REF_RISING_OC6REF_RISING) || \
elmot 1:d0dfbce63a89 1615 ((__SOURCE__) == TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING) || \
elmot 1:d0dfbce63a89 1616 ((__SOURCE__) == TIM_TRGO2_OC5REF_RISING_OC6REF_RISING) || \
elmot 1:d0dfbce63a89 1617 ((__SOURCE__) == TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING))
elmot 1:d0dfbce63a89 1618
elmot 1:d0dfbce63a89 1619 #define IS_TIM_MSM_STATE(__STATE__) (((__STATE__) == TIM_MASTERSLAVEMODE_ENABLE) || \
elmot 1:d0dfbce63a89 1620 ((__STATE__) == TIM_MASTERSLAVEMODE_DISABLE))
elmot 1:d0dfbce63a89 1621
elmot 1:d0dfbce63a89 1622 #define IS_TIM_SLAVE_MODE(__MODE__) (((__MODE__) == TIM_SLAVEMODE_DISABLE) || \
elmot 1:d0dfbce63a89 1623 ((__MODE__) == TIM_SLAVEMODE_RESET) || \
elmot 1:d0dfbce63a89 1624 ((__MODE__) == TIM_SLAVEMODE_GATED) || \
elmot 1:d0dfbce63a89 1625 ((__MODE__) == TIM_SLAVEMODE_TRIGGER) || \
elmot 1:d0dfbce63a89 1626 ((__MODE__) == TIM_SLAVEMODE_EXTERNAL1) || \
elmot 1:d0dfbce63a89 1627 ((__MODE__) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER))
elmot 1:d0dfbce63a89 1628
elmot 1:d0dfbce63a89 1629 #define IS_TIM_PWM_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_PWM1) || \
elmot 1:d0dfbce63a89 1630 ((__MODE__) == TIM_OCMODE_PWM2) || \
elmot 1:d0dfbce63a89 1631 ((__MODE__) == TIM_OCMODE_COMBINED_PWM1) || \
elmot 1:d0dfbce63a89 1632 ((__MODE__) == TIM_OCMODE_COMBINED_PWM2) || \
elmot 1:d0dfbce63a89 1633 ((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM1) || \
elmot 1:d0dfbce63a89 1634 ((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM2))
elmot 1:d0dfbce63a89 1635
elmot 1:d0dfbce63a89 1636 #define IS_TIM_OC_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_TIMING) || \
elmot 1:d0dfbce63a89 1637 ((__MODE__) == TIM_OCMODE_ACTIVE) || \
elmot 1:d0dfbce63a89 1638 ((__MODE__) == TIM_OCMODE_INACTIVE) || \
elmot 1:d0dfbce63a89 1639 ((__MODE__) == TIM_OCMODE_TOGGLE) || \
elmot 1:d0dfbce63a89 1640 ((__MODE__) == TIM_OCMODE_FORCED_ACTIVE) || \
elmot 1:d0dfbce63a89 1641 ((__MODE__) == TIM_OCMODE_FORCED_INACTIVE) || \
elmot 1:d0dfbce63a89 1642 ((__MODE__) == TIM_OCMODE_RETRIGERRABLE_OPM1) || \
elmot 1:d0dfbce63a89 1643 ((__MODE__) == TIM_OCMODE_RETRIGERRABLE_OPM2))
elmot 1:d0dfbce63a89 1644
elmot 1:d0dfbce63a89 1645 #define IS_TIM_TRIGGER_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
elmot 1:d0dfbce63a89 1646 ((__SELECTION__) == TIM_TS_ITR1) || \
elmot 1:d0dfbce63a89 1647 ((__SELECTION__) == TIM_TS_ITR2) || \
elmot 1:d0dfbce63a89 1648 ((__SELECTION__) == TIM_TS_ITR3) || \
elmot 1:d0dfbce63a89 1649 ((__SELECTION__) == TIM_TS_TI1F_ED) || \
elmot 1:d0dfbce63a89 1650 ((__SELECTION__) == TIM_TS_TI1FP1) || \
elmot 1:d0dfbce63a89 1651 ((__SELECTION__) == TIM_TS_TI2FP2) || \
elmot 1:d0dfbce63a89 1652 ((__SELECTION__) == TIM_TS_ETRF))
elmot 1:d0dfbce63a89 1653
elmot 1:d0dfbce63a89 1654 #define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
elmot 1:d0dfbce63a89 1655 ((__SELECTION__) == TIM_TS_ITR1) || \
elmot 1:d0dfbce63a89 1656 ((__SELECTION__) == TIM_TS_ITR2) || \
elmot 1:d0dfbce63a89 1657 ((__SELECTION__) == TIM_TS_ITR3) || \
elmot 1:d0dfbce63a89 1658 ((__SELECTION__) == TIM_TS_NONE))
elmot 1:d0dfbce63a89 1659
elmot 1:d0dfbce63a89 1660
elmot 1:d0dfbce63a89 1661 #define IS_TIM_TRIGGERPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_TRIGGERPOLARITY_INVERTED ) || \
elmot 1:d0dfbce63a89 1662 ((__POLARITY__) == TIM_TRIGGERPOLARITY_NONINVERTED) || \
elmot 1:d0dfbce63a89 1663 ((__POLARITY__) == TIM_TRIGGERPOLARITY_RISING ) || \
elmot 1:d0dfbce63a89 1664 ((__POLARITY__) == TIM_TRIGGERPOLARITY_FALLING ) || \
elmot 1:d0dfbce63a89 1665 ((__POLARITY__) == TIM_TRIGGERPOLARITY_BOTHEDGE ))
elmot 1:d0dfbce63a89 1666
elmot 1:d0dfbce63a89 1667 #define IS_TIM_TRIGGERPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV1) || \
elmot 1:d0dfbce63a89 1668 ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV2) || \
elmot 1:d0dfbce63a89 1669 ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV4) || \
elmot 1:d0dfbce63a89 1670 ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV8))
elmot 1:d0dfbce63a89 1671
elmot 1:d0dfbce63a89 1672 #define IS_TIM_TRIGGERFILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF)
elmot 1:d0dfbce63a89 1673
elmot 1:d0dfbce63a89 1674 #define IS_TIM_TI1SELECTION(__TI1SELECTION__) (((__TI1SELECTION__) == TIM_TI1SELECTION_CH1) || \
elmot 1:d0dfbce63a89 1675 ((__TI1SELECTION__) == TIM_TI1SELECTION_XORCOMBINATION))
elmot 1:d0dfbce63a89 1676
elmot 1:d0dfbce63a89 1677 #define IS_TIM_DMA_LENGTH(__LENGTH__) (((__LENGTH__) == TIM_DMABURSTLENGTH_1TRANSFER) || \
elmot 1:d0dfbce63a89 1678 ((__LENGTH__) == TIM_DMABURSTLENGTH_2TRANSFERS) || \
elmot 1:d0dfbce63a89 1679 ((__LENGTH__) == TIM_DMABURSTLENGTH_3TRANSFERS) || \
elmot 1:d0dfbce63a89 1680 ((__LENGTH__) == TIM_DMABURSTLENGTH_4TRANSFERS) || \
elmot 1:d0dfbce63a89 1681 ((__LENGTH__) == TIM_DMABURSTLENGTH_5TRANSFERS) || \
elmot 1:d0dfbce63a89 1682 ((__LENGTH__) == TIM_DMABURSTLENGTH_6TRANSFERS) || \
elmot 1:d0dfbce63a89 1683 ((__LENGTH__) == TIM_DMABURSTLENGTH_7TRANSFERS) || \
elmot 1:d0dfbce63a89 1684 ((__LENGTH__) == TIM_DMABURSTLENGTH_8TRANSFERS) || \
elmot 1:d0dfbce63a89 1685 ((__LENGTH__) == TIM_DMABURSTLENGTH_9TRANSFERS) || \
elmot 1:d0dfbce63a89 1686 ((__LENGTH__) == TIM_DMABURSTLENGTH_10TRANSFERS) || \
elmot 1:d0dfbce63a89 1687 ((__LENGTH__) == TIM_DMABURSTLENGTH_11TRANSFERS) || \
elmot 1:d0dfbce63a89 1688 ((__LENGTH__) == TIM_DMABURSTLENGTH_12TRANSFERS) || \
elmot 1:d0dfbce63a89 1689 ((__LENGTH__) == TIM_DMABURSTLENGTH_13TRANSFERS) || \
elmot 1:d0dfbce63a89 1690 ((__LENGTH__) == TIM_DMABURSTLENGTH_14TRANSFERS) || \
elmot 1:d0dfbce63a89 1691 ((__LENGTH__) == TIM_DMABURSTLENGTH_15TRANSFERS) || \
elmot 1:d0dfbce63a89 1692 ((__LENGTH__) == TIM_DMABURSTLENGTH_16TRANSFERS) || \
elmot 1:d0dfbce63a89 1693 ((__LENGTH__) == TIM_DMABURSTLENGTH_17TRANSFERS) || \
elmot 1:d0dfbce63a89 1694 ((__LENGTH__) == TIM_DMABURSTLENGTH_18TRANSFERS))
elmot 1:d0dfbce63a89 1695
elmot 1:d0dfbce63a89 1696 #define IS_TIM_IC_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF)
elmot 1:d0dfbce63a89 1697
elmot 1:d0dfbce63a89 1698 #define IS_TIM_DEADTIME(__DEADTIME__) ((__DEADTIME__) <= 0xFF)
elmot 1:d0dfbce63a89 1699
elmot 1:d0dfbce63a89 1700 #define IS_TIM_BREAK_SYSTEM(__CONFIG__) (((__CONFIG__) == TIM_BREAK_SYSTEM_ECC) || \
elmot 1:d0dfbce63a89 1701 ((__CONFIG__) == TIM_BREAK_SYSTEM_PVD) || \
elmot 1:d0dfbce63a89 1702 ((__CONFIG__) == TIM_BREAK_SYSTEM_SRAM2_PARITY_ERROR) || \
elmot 1:d0dfbce63a89 1703 ((__CONFIG__) == TIM_BREAK_SYSTEM_LOCKUP))
elmot 1:d0dfbce63a89 1704
elmot 1:d0dfbce63a89 1705 #define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \
elmot 1:d0dfbce63a89 1706 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) :\
elmot 1:d0dfbce63a89 1707 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8)) :\
elmot 1:d0dfbce63a89 1708 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) :\
elmot 1:d0dfbce63a89 1709 ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8)))
elmot 1:d0dfbce63a89 1710
elmot 1:d0dfbce63a89 1711 #define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \
elmot 1:d0dfbce63a89 1712 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC1PSC) :\
elmot 1:d0dfbce63a89 1713 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC2PSC) :\
elmot 1:d0dfbce63a89 1714 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC3PSC) :\
elmot 1:d0dfbce63a89 1715 ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC4PSC))
elmot 1:d0dfbce63a89 1716
elmot 1:d0dfbce63a89 1717 #define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \
elmot 1:d0dfbce63a89 1718 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) :\
elmot 1:d0dfbce63a89 1719 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4)) :\
elmot 1:d0dfbce63a89 1720 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8)) :\
elmot 1:d0dfbce63a89 1721 ((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12))))
elmot 1:d0dfbce63a89 1722
elmot 1:d0dfbce63a89 1723 #define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \
elmot 1:d0dfbce63a89 1724 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) :\
elmot 1:d0dfbce63a89 1725 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) :\
elmot 1:d0dfbce63a89 1726 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC3P | TIM_CCER_CC3NP)) :\
elmot 1:d0dfbce63a89 1727 ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC4P | TIM_CCER_CC4NP)))
elmot 1:d0dfbce63a89 1728
elmot 1:d0dfbce63a89 1729 /**
elmot 1:d0dfbce63a89 1730 * @}
elmot 1:d0dfbce63a89 1731 */
elmot 1:d0dfbce63a89 1732 /* End of private macros -----------------------------------------------------*/
elmot 1:d0dfbce63a89 1733
elmot 1:d0dfbce63a89 1734 /* Include TIM HAL Extended module */
elmot 1:d0dfbce63a89 1735 #include "stm32l4xx_hal_tim_ex.h"
elmot 1:d0dfbce63a89 1736
elmot 1:d0dfbce63a89 1737 /* Exported functions --------------------------------------------------------*/
elmot 1:d0dfbce63a89 1738 /** @addtogroup TIM_Exported_Functions TIM Exported Functions
elmot 1:d0dfbce63a89 1739 * @{
elmot 1:d0dfbce63a89 1740 */
elmot 1:d0dfbce63a89 1741
elmot 1:d0dfbce63a89 1742 /** @addtogroup TIM_Exported_Functions_Group1 Time Base functions
elmot 1:d0dfbce63a89 1743 * @brief Time Base functions
elmot 1:d0dfbce63a89 1744 * @{
elmot 1:d0dfbce63a89 1745 */
elmot 1:d0dfbce63a89 1746 /* Time Base functions ********************************************************/
elmot 1:d0dfbce63a89 1747 HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1748 HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1749 void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1750 void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1751 /* Blocking mode: Polling */
elmot 1:d0dfbce63a89 1752 HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1753 HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1754 /* Non-Blocking mode: Interrupt */
elmot 1:d0dfbce63a89 1755 HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1756 HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1757 /* Non-Blocking mode: DMA */
elmot 1:d0dfbce63a89 1758 HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
elmot 1:d0dfbce63a89 1759 HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1760 /**
elmot 1:d0dfbce63a89 1761 * @}
elmot 1:d0dfbce63a89 1762 */
elmot 1:d0dfbce63a89 1763
elmot 1:d0dfbce63a89 1764 /** @addtogroup TIM_Exported_Functions_Group2 Time Output Compare functions
elmot 1:d0dfbce63a89 1765 * @brief Time Output Compare functions
elmot 1:d0dfbce63a89 1766 * @{
elmot 1:d0dfbce63a89 1767 */
elmot 1:d0dfbce63a89 1768 /* Timer Output Compare functions *********************************************/
elmot 1:d0dfbce63a89 1769 HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1770 HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1771 void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1772 void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1773 /* Blocking mode: Polling */
elmot 1:d0dfbce63a89 1774 HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1775 HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1776 /* Non-Blocking mode: Interrupt */
elmot 1:d0dfbce63a89 1777 HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1778 HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1779 /* Non-Blocking mode: DMA */
elmot 1:d0dfbce63a89 1780 HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
elmot 1:d0dfbce63a89 1781 HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1782 /**
elmot 1:d0dfbce63a89 1783 * @}
elmot 1:d0dfbce63a89 1784 */
elmot 1:d0dfbce63a89 1785
elmot 1:d0dfbce63a89 1786 /** @addtogroup TIM_Exported_Functions_Group3 Time PWM functions
elmot 1:d0dfbce63a89 1787 * @brief Time PWM functions
elmot 1:d0dfbce63a89 1788 * @{
elmot 1:d0dfbce63a89 1789 */
elmot 1:d0dfbce63a89 1790 /* Timer PWM functions ********************************************************/
elmot 1:d0dfbce63a89 1791 HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1792 HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1793 void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1794 void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1795 /* Blocking mode: Polling */
elmot 1:d0dfbce63a89 1796 HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1797 HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1798 /* Non-Blocking mode: Interrupt */
elmot 1:d0dfbce63a89 1799 HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1800 HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1801 /* Non-Blocking mode: DMA */
elmot 1:d0dfbce63a89 1802 HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
elmot 1:d0dfbce63a89 1803 HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1804 /**
elmot 1:d0dfbce63a89 1805 * @}
elmot 1:d0dfbce63a89 1806 */
elmot 1:d0dfbce63a89 1807
elmot 1:d0dfbce63a89 1808 /** @addtogroup TIM_Exported_Functions_Group4 Time Input Capture functions
elmot 1:d0dfbce63a89 1809 * @brief Time Input Capture functions
elmot 1:d0dfbce63a89 1810 * @{
elmot 1:d0dfbce63a89 1811 */
elmot 1:d0dfbce63a89 1812 /* Timer Input Capture functions **********************************************/
elmot 1:d0dfbce63a89 1813 HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1814 HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1815 void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1816 void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1817 /* Blocking mode: Polling */
elmot 1:d0dfbce63a89 1818 HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1819 HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1820 /* Non-Blocking mode: Interrupt */
elmot 1:d0dfbce63a89 1821 HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1822 HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1823 /* Non-Blocking mode: DMA */
elmot 1:d0dfbce63a89 1824 HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
elmot 1:d0dfbce63a89 1825 HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1826 /**
elmot 1:d0dfbce63a89 1827 * @}
elmot 1:d0dfbce63a89 1828 */
elmot 1:d0dfbce63a89 1829
elmot 1:d0dfbce63a89 1830 /** @addtogroup TIM_Exported_Functions_Group5 Time One Pulse functions
elmot 1:d0dfbce63a89 1831 * @brief Time One Pulse functions
elmot 1:d0dfbce63a89 1832 * @{
elmot 1:d0dfbce63a89 1833 */
elmot 1:d0dfbce63a89 1834 /* Timer One Pulse functions **************************************************/
elmot 1:d0dfbce63a89 1835 HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode);
elmot 1:d0dfbce63a89 1836 HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1837 void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1838 void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1839 /* Blocking mode: Polling */
elmot 1:d0dfbce63a89 1840 HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
elmot 1:d0dfbce63a89 1841 HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
elmot 1:d0dfbce63a89 1842 /* Non-Blocking mode: Interrupt */
elmot 1:d0dfbce63a89 1843 HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
elmot 1:d0dfbce63a89 1844 HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
elmot 1:d0dfbce63a89 1845 /**
elmot 1:d0dfbce63a89 1846 * @}
elmot 1:d0dfbce63a89 1847 */
elmot 1:d0dfbce63a89 1848
elmot 1:d0dfbce63a89 1849 /** @addtogroup TIM_Exported_Functions_Group6 Time Encoder functions
elmot 1:d0dfbce63a89 1850 * @brief Time Encoder functions
elmot 1:d0dfbce63a89 1851 * @{
elmot 1:d0dfbce63a89 1852 */
elmot 1:d0dfbce63a89 1853 /* Timer Encoder functions ****************************************************/
elmot 1:d0dfbce63a89 1854 HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef* sConfig);
elmot 1:d0dfbce63a89 1855 HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1856 void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1857 void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1858 /* Blocking mode: Polling */
elmot 1:d0dfbce63a89 1859 HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1860 HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1861 /* Non-Blocking mode: Interrupt */
elmot 1:d0dfbce63a89 1862 HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1863 HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1864 /* Non-Blocking mode: DMA */
elmot 1:d0dfbce63a89 1865 HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length);
elmot 1:d0dfbce63a89 1866 HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1867 /**
elmot 1:d0dfbce63a89 1868 * @}
elmot 1:d0dfbce63a89 1869 */
elmot 1:d0dfbce63a89 1870
elmot 1:d0dfbce63a89 1871 /** @addtogroup TIM_Exported_Functions_Group7 TIM IRQ handler management
elmot 1:d0dfbce63a89 1872 * @brief IRQ handler management
elmot 1:d0dfbce63a89 1873 * @{
elmot 1:d0dfbce63a89 1874 */
elmot 1:d0dfbce63a89 1875 /* Interrupt Handler functions ***********************************************/
elmot 1:d0dfbce63a89 1876 void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1877 /**
elmot 1:d0dfbce63a89 1878 * @}
elmot 1:d0dfbce63a89 1879 */
elmot 1:d0dfbce63a89 1880
elmot 1:d0dfbce63a89 1881 /** @defgroup TIM_Exported_Functions_Group8 Peripheral Control functions
elmot 1:d0dfbce63a89 1882 * @brief Peripheral Control functions
elmot 1:d0dfbce63a89 1883 * @{
elmot 1:d0dfbce63a89 1884 */
elmot 1:d0dfbce63a89 1885 /* Control functions *********************************************************/
elmot 1:d0dfbce63a89 1886 HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel);
elmot 1:d0dfbce63a89 1887 HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel);
elmot 1:d0dfbce63a89 1888 HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef* sConfig, uint32_t Channel);
elmot 1:d0dfbce63a89 1889 HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef* sConfig, uint32_t OutputChannel, uint32_t InputChannel);
elmot 1:d0dfbce63a89 1890 HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef * sClearInputConfig, uint32_t Channel);
elmot 1:d0dfbce63a89 1891 HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef * sClockSourceConfig);
elmot 1:d0dfbce63a89 1892 HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection);
elmot 1:d0dfbce63a89 1893 HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig);
elmot 1:d0dfbce63a89 1894 HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig);
elmot 1:d0dfbce63a89 1895 HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
elmot 1:d0dfbce63a89 1896 uint32_t *BurstBuffer, uint32_t BurstLength);
elmot 1:d0dfbce63a89 1897 HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
elmot 1:d0dfbce63a89 1898 HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
elmot 1:d0dfbce63a89 1899 uint32_t *BurstBuffer, uint32_t BurstLength);
elmot 1:d0dfbce63a89 1900 HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
elmot 1:d0dfbce63a89 1901 HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource);
elmot 1:d0dfbce63a89 1902 uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel);
elmot 1:d0dfbce63a89 1903 /**
elmot 1:d0dfbce63a89 1904 * @}
elmot 1:d0dfbce63a89 1905 */
elmot 1:d0dfbce63a89 1906
elmot 1:d0dfbce63a89 1907 /** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions
elmot 1:d0dfbce63a89 1908 * @brief TIM Callbacks functions
elmot 1:d0dfbce63a89 1909 * @{
elmot 1:d0dfbce63a89 1910 */
elmot 1:d0dfbce63a89 1911 /* Callback in non blocking modes (Interrupt and DMA) *************************/
elmot 1:d0dfbce63a89 1912 void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1913 void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1914 void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1915 void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1916 void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1917 void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1918 /**
elmot 1:d0dfbce63a89 1919 * @}
elmot 1:d0dfbce63a89 1920 */
elmot 1:d0dfbce63a89 1921
elmot 1:d0dfbce63a89 1922 /** @defgroup TIM_Exported_Functions_Group10 Peripheral State functions
elmot 1:d0dfbce63a89 1923 * @brief Peripheral State functions
elmot 1:d0dfbce63a89 1924 * @{
elmot 1:d0dfbce63a89 1925 */
elmot 1:d0dfbce63a89 1926 /* Peripheral State functions ************************************************/
elmot 1:d0dfbce63a89 1927 HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1928 HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1929 HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1930 HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1931 HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1932 HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim);
elmot 1:d0dfbce63a89 1933 /**
elmot 1:d0dfbce63a89 1934 * @}
elmot 1:d0dfbce63a89 1935 */
elmot 1:d0dfbce63a89 1936
elmot 1:d0dfbce63a89 1937 /**
elmot 1:d0dfbce63a89 1938 * @}
elmot 1:d0dfbce63a89 1939 */
elmot 1:d0dfbce63a89 1940 /* End of exported functions -------------------------------------------------*/
elmot 1:d0dfbce63a89 1941
elmot 1:d0dfbce63a89 1942 /* Private functions----------------------------------------------------------*/
elmot 1:d0dfbce63a89 1943 /** @defgroup TIM_Private_Functions TIM Private Functions
elmot 1:d0dfbce63a89 1944 * @{
elmot 1:d0dfbce63a89 1945 */
elmot 1:d0dfbce63a89 1946 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure);
elmot 1:d0dfbce63a89 1947 void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
elmot 1:d0dfbce63a89 1948 void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
elmot 1:d0dfbce63a89 1949 void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler,
elmot 1:d0dfbce63a89 1950 uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter);
elmot 1:d0dfbce63a89 1951
elmot 1:d0dfbce63a89 1952 void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma);
elmot 1:d0dfbce63a89 1953 void TIM_DMAError(DMA_HandleTypeDef *hdma);
elmot 1:d0dfbce63a89 1954 void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma);
elmot 1:d0dfbce63a89 1955 void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState);
elmot 1:d0dfbce63a89 1956 /**
elmot 1:d0dfbce63a89 1957 * @}
elmot 1:d0dfbce63a89 1958 */
elmot 1:d0dfbce63a89 1959 /* End of private functions --------------------------------------------------*/
elmot 1:d0dfbce63a89 1960
elmot 1:d0dfbce63a89 1961 /**
elmot 1:d0dfbce63a89 1962 * @}
elmot 1:d0dfbce63a89 1963 */
elmot 1:d0dfbce63a89 1964
elmot 1:d0dfbce63a89 1965 /**
elmot 1:d0dfbce63a89 1966 * @}
elmot 1:d0dfbce63a89 1967 */
elmot 1:d0dfbce63a89 1968
elmot 1:d0dfbce63a89 1969 #ifdef __cplusplus
elmot 1:d0dfbce63a89 1970 }
elmot 1:d0dfbce63a89 1971 #endif
elmot 1:d0dfbce63a89 1972
elmot 1:d0dfbce63a89 1973 #endif /* __STM32L4xx_HAL_TIM_H */
elmot 1:d0dfbce63a89 1974
elmot 1:d0dfbce63a89 1975 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/