TUKS MCU Introductory course / TUKS-COURSE-TIMER
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elmot
Date:
Fri Feb 24 21:13:56 2017 +0000
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elmot 1:d0dfbce63a89 1 /**
elmot 1:d0dfbce63a89 2 ******************************************************************************
elmot 1:d0dfbce63a89 3 * @file stm32l4xx_hal_i2c.h
elmot 1:d0dfbce63a89 4 * @author MCD Application Team
elmot 1:d0dfbce63a89 5 * @version V1.5.1
elmot 1:d0dfbce63a89 6 * @date 31-May-2016
elmot 1:d0dfbce63a89 7 * @brief Header file of I2C HAL module.
elmot 1:d0dfbce63a89 8 ******************************************************************************
elmot 1:d0dfbce63a89 9 * @attention
elmot 1:d0dfbce63a89 10 *
elmot 1:d0dfbce63a89 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot 1:d0dfbce63a89 12 *
elmot 1:d0dfbce63a89 13 * Redistribution and use in source and binary forms, with or without modification,
elmot 1:d0dfbce63a89 14 * are permitted provided that the following conditions are met:
elmot 1:d0dfbce63a89 15 * 1. Redistributions of source code must retain the above copyright notice,
elmot 1:d0dfbce63a89 16 * this list of conditions and the following disclaimer.
elmot 1:d0dfbce63a89 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
elmot 1:d0dfbce63a89 18 * this list of conditions and the following disclaimer in the documentation
elmot 1:d0dfbce63a89 19 * and/or other materials provided with the distribution.
elmot 1:d0dfbce63a89 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot 1:d0dfbce63a89 21 * may be used to endorse or promote products derived from this software
elmot 1:d0dfbce63a89 22 * without specific prior written permission.
elmot 1:d0dfbce63a89 23 *
elmot 1:d0dfbce63a89 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot 1:d0dfbce63a89 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot 1:d0dfbce63a89 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot 1:d0dfbce63a89 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot 1:d0dfbce63a89 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot 1:d0dfbce63a89 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot 1:d0dfbce63a89 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot 1:d0dfbce63a89 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot 1:d0dfbce63a89 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot 1:d0dfbce63a89 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot 1:d0dfbce63a89 34 *
elmot 1:d0dfbce63a89 35 ******************************************************************************
elmot 1:d0dfbce63a89 36 */
elmot 1:d0dfbce63a89 37
elmot 1:d0dfbce63a89 38 /* Define to prevent recursive inclusion -------------------------------------*/
elmot 1:d0dfbce63a89 39 #ifndef __STM32L4xx_HAL_I2C_H
elmot 1:d0dfbce63a89 40 #define __STM32L4xx_HAL_I2C_H
elmot 1:d0dfbce63a89 41
elmot 1:d0dfbce63a89 42 #ifdef __cplusplus
elmot 1:d0dfbce63a89 43 extern "C" {
elmot 1:d0dfbce63a89 44 #endif
elmot 1:d0dfbce63a89 45
elmot 1:d0dfbce63a89 46 /* Includes ------------------------------------------------------------------*/
elmot 1:d0dfbce63a89 47 #include "stm32l4xx_hal_def.h"
elmot 1:d0dfbce63a89 48
elmot 1:d0dfbce63a89 49 /** @addtogroup STM32L4xx_HAL_Driver
elmot 1:d0dfbce63a89 50 * @{
elmot 1:d0dfbce63a89 51 */
elmot 1:d0dfbce63a89 52
elmot 1:d0dfbce63a89 53 /** @addtogroup I2C
elmot 1:d0dfbce63a89 54 * @{
elmot 1:d0dfbce63a89 55 */
elmot 1:d0dfbce63a89 56
elmot 1:d0dfbce63a89 57 /* Exported types ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 58 /** @defgroup I2C_Exported_Types I2C Exported Types
elmot 1:d0dfbce63a89 59 * @{
elmot 1:d0dfbce63a89 60 */
elmot 1:d0dfbce63a89 61
elmot 1:d0dfbce63a89 62 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
elmot 1:d0dfbce63a89 63 * @brief I2C Configuration Structure definition
elmot 1:d0dfbce63a89 64 * @{
elmot 1:d0dfbce63a89 65 */
elmot 1:d0dfbce63a89 66 typedef struct
elmot 1:d0dfbce63a89 67 {
elmot 1:d0dfbce63a89 68 uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value.
elmot 1:d0dfbce63a89 69 This parameter calculated by referring to I2C initialization
elmot 1:d0dfbce63a89 70 section in Reference manual */
elmot 1:d0dfbce63a89 71
elmot 1:d0dfbce63a89 72 uint32_t OwnAddress1; /*!< Specifies the first device own address.
elmot 1:d0dfbce63a89 73 This parameter can be a 7-bit or 10-bit address. */
elmot 1:d0dfbce63a89 74
elmot 1:d0dfbce63a89 75 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
elmot 1:d0dfbce63a89 76 This parameter can be a value of @ref I2C_ADDRESSING_MODE */
elmot 1:d0dfbce63a89 77
elmot 1:d0dfbce63a89 78 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
elmot 1:d0dfbce63a89 79 This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */
elmot 1:d0dfbce63a89 80
elmot 1:d0dfbce63a89 81 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
elmot 1:d0dfbce63a89 82 This parameter can be a 7-bit address. */
elmot 1:d0dfbce63a89 83
elmot 1:d0dfbce63a89 84 uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected
elmot 1:d0dfbce63a89 85 This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */
elmot 1:d0dfbce63a89 86
elmot 1:d0dfbce63a89 87 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
elmot 1:d0dfbce63a89 88 This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */
elmot 1:d0dfbce63a89 89
elmot 1:d0dfbce63a89 90 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
elmot 1:d0dfbce63a89 91 This parameter can be a value of @ref I2C_NOSTRETCH_MODE */
elmot 1:d0dfbce63a89 92
elmot 1:d0dfbce63a89 93 }I2C_InitTypeDef;
elmot 1:d0dfbce63a89 94
elmot 1:d0dfbce63a89 95 /**
elmot 1:d0dfbce63a89 96 * @}
elmot 1:d0dfbce63a89 97 */
elmot 1:d0dfbce63a89 98
elmot 1:d0dfbce63a89 99 /** @defgroup HAL_state_structure_definition HAL state structure definition
elmot 1:d0dfbce63a89 100 * @brief HAL State structure definition
elmot 1:d0dfbce63a89 101 * @note HAL I2C State value coding follow below described bitmap :\n
elmot 1:d0dfbce63a89 102 * b7-b6 Error information\n
elmot 1:d0dfbce63a89 103 * 00 : No Error\n
elmot 1:d0dfbce63a89 104 * 01 : Abort (Abort user request on going)\n
elmot 1:d0dfbce63a89 105 * 10 : Timeout\n
elmot 1:d0dfbce63a89 106 * 11 : Error\n
elmot 1:d0dfbce63a89 107 * b5 IP initilisation status\n
elmot 1:d0dfbce63a89 108 * 0 : Reset (IP not initialized)\n
elmot 1:d0dfbce63a89 109 * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)\n
elmot 1:d0dfbce63a89 110 * b4 (not used)\n
elmot 1:d0dfbce63a89 111 * x : Should be set to 0\n
elmot 1:d0dfbce63a89 112 * b3\n
elmot 1:d0dfbce63a89 113 * 0 : Ready or Busy (No Listen mode ongoing)\n
elmot 1:d0dfbce63a89 114 * 1 : Listen (IP in Address Listen Mode)\n
elmot 1:d0dfbce63a89 115 * b2 Intrinsic process state\n
elmot 1:d0dfbce63a89 116 * 0 : Ready\n
elmot 1:d0dfbce63a89 117 * 1 : Busy (IP busy with some configuration or internal operations)\n
elmot 1:d0dfbce63a89 118 * b1 Rx state\n
elmot 1:d0dfbce63a89 119 * 0 : Ready (no Rx operation ongoing)\n
elmot 1:d0dfbce63a89 120 * 1 : Busy (Rx operation ongoing)\n
elmot 1:d0dfbce63a89 121 * b0 Tx state\n
elmot 1:d0dfbce63a89 122 * 0 : Ready (no Tx operation ongoing)\n
elmot 1:d0dfbce63a89 123 * 1 : Busy (Tx operation ongoing)
elmot 1:d0dfbce63a89 124 * @{
elmot 1:d0dfbce63a89 125 */
elmot 1:d0dfbce63a89 126 typedef enum
elmot 1:d0dfbce63a89 127 {
elmot 1:d0dfbce63a89 128 HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
elmot 1:d0dfbce63a89 129 HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
elmot 1:d0dfbce63a89 130 HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
elmot 1:d0dfbce63a89 131 HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
elmot 1:d0dfbce63a89 132 HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
elmot 1:d0dfbce63a89 133 HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
elmot 1:d0dfbce63a89 134 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
elmot 1:d0dfbce63a89 135 process is ongoing */
elmot 1:d0dfbce63a89 136 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
elmot 1:d0dfbce63a89 137 process is ongoing */
elmot 1:d0dfbce63a89 138 HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
elmot 1:d0dfbce63a89 139 HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
elmot 1:d0dfbce63a89 140 HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
elmot 1:d0dfbce63a89 141
elmot 1:d0dfbce63a89 142 }HAL_I2C_StateTypeDef;
elmot 1:d0dfbce63a89 143
elmot 1:d0dfbce63a89 144 /**
elmot 1:d0dfbce63a89 145 * @}
elmot 1:d0dfbce63a89 146 */
elmot 1:d0dfbce63a89 147
elmot 1:d0dfbce63a89 148 /** @defgroup HAL_mode_structure_definition HAL mode structure definition
elmot 1:d0dfbce63a89 149 * @brief HAL Mode structure definition
elmot 1:d0dfbce63a89 150 * @note HAL I2C Mode value coding follow below described bitmap :\n
elmot 1:d0dfbce63a89 151 * b7 (not used)\n
elmot 1:d0dfbce63a89 152 * x : Should be set to 0\n
elmot 1:d0dfbce63a89 153 * b6\n
elmot 1:d0dfbce63a89 154 * 0 : None\n
elmot 1:d0dfbce63a89 155 * 1 : Memory (HAL I2C communication is in Memory Mode)\n
elmot 1:d0dfbce63a89 156 * b5\n
elmot 1:d0dfbce63a89 157 * 0 : None\n
elmot 1:d0dfbce63a89 158 * 1 : Slave (HAL I2C communication is in Slave Mode)\n
elmot 1:d0dfbce63a89 159 * b4\n
elmot 1:d0dfbce63a89 160 * 0 : None\n
elmot 1:d0dfbce63a89 161 * 1 : Master (HAL I2C communication is in Master Mode)\n
elmot 1:d0dfbce63a89 162 * b3-b2-b1-b0 (not used)\n
elmot 1:d0dfbce63a89 163 * xxxx : Should be set to 0000
elmot 1:d0dfbce63a89 164 * @{
elmot 1:d0dfbce63a89 165 */
elmot 1:d0dfbce63a89 166 typedef enum
elmot 1:d0dfbce63a89 167 {
elmot 1:d0dfbce63a89 168 HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
elmot 1:d0dfbce63a89 169 HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
elmot 1:d0dfbce63a89 170 HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
elmot 1:d0dfbce63a89 171 HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
elmot 1:d0dfbce63a89 172
elmot 1:d0dfbce63a89 173 }HAL_I2C_ModeTypeDef;
elmot 1:d0dfbce63a89 174
elmot 1:d0dfbce63a89 175 /**
elmot 1:d0dfbce63a89 176 * @}
elmot 1:d0dfbce63a89 177 */
elmot 1:d0dfbce63a89 178
elmot 1:d0dfbce63a89 179 /** @defgroup I2C_Error_Code_definition I2C Error Code definition
elmot 1:d0dfbce63a89 180 * @brief I2C Error Code definition
elmot 1:d0dfbce63a89 181 * @{
elmot 1:d0dfbce63a89 182 */
elmot 1:d0dfbce63a89 183 #define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */
elmot 1:d0dfbce63a89 184 #define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */
elmot 1:d0dfbce63a89 185 #define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */
elmot 1:d0dfbce63a89 186 #define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */
elmot 1:d0dfbce63a89 187 #define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */
elmot 1:d0dfbce63a89 188 #define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
elmot 1:d0dfbce63a89 189 #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */
elmot 1:d0dfbce63a89 190 #define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */
elmot 1:d0dfbce63a89 191 /**
elmot 1:d0dfbce63a89 192 * @}
elmot 1:d0dfbce63a89 193 */
elmot 1:d0dfbce63a89 194
elmot 1:d0dfbce63a89 195 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
elmot 1:d0dfbce63a89 196 * @brief I2C handle Structure definition
elmot 1:d0dfbce63a89 197 * @{
elmot 1:d0dfbce63a89 198 */
elmot 1:d0dfbce63a89 199 typedef struct __I2C_HandleTypeDef
elmot 1:d0dfbce63a89 200 {
elmot 1:d0dfbce63a89 201 I2C_TypeDef *Instance; /*!< I2C registers base address */
elmot 1:d0dfbce63a89 202
elmot 1:d0dfbce63a89 203 I2C_InitTypeDef Init; /*!< I2C communication parameters */
elmot 1:d0dfbce63a89 204
elmot 1:d0dfbce63a89 205 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
elmot 1:d0dfbce63a89 206
elmot 1:d0dfbce63a89 207 uint16_t XferSize; /*!< I2C transfer size */
elmot 1:d0dfbce63a89 208
elmot 1:d0dfbce63a89 209 __IO uint16_t XferCount; /*!< I2C transfer counter */
elmot 1:d0dfbce63a89 210
elmot 1:d0dfbce63a89 211 __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can
elmot 1:d0dfbce63a89 212 be a value of @ref I2C_XFEROPTIONS */
elmot 1:d0dfbce63a89 213
elmot 1:d0dfbce63a89 214 __IO uint32_t PreviousState; /*!< I2C communication Previous state */
elmot 1:d0dfbce63a89 215
elmot 1:d0dfbce63a89 216 HAL_StatusTypeDef (*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */
elmot 1:d0dfbce63a89 217
elmot 1:d0dfbce63a89 218 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
elmot 1:d0dfbce63a89 219
elmot 1:d0dfbce63a89 220 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
elmot 1:d0dfbce63a89 221
elmot 1:d0dfbce63a89 222 HAL_LockTypeDef Lock; /*!< I2C locking object */
elmot 1:d0dfbce63a89 223
elmot 1:d0dfbce63a89 224 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
elmot 1:d0dfbce63a89 225
elmot 1:d0dfbce63a89 226 __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
elmot 1:d0dfbce63a89 227
elmot 1:d0dfbce63a89 228 __IO uint32_t ErrorCode; /*!< I2C Error code */
elmot 1:d0dfbce63a89 229
elmot 1:d0dfbce63a89 230 __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */
elmot 1:d0dfbce63a89 231 }I2C_HandleTypeDef;
elmot 1:d0dfbce63a89 232 /**
elmot 1:d0dfbce63a89 233 * @}
elmot 1:d0dfbce63a89 234 */
elmot 1:d0dfbce63a89 235
elmot 1:d0dfbce63a89 236 /**
elmot 1:d0dfbce63a89 237 * @}
elmot 1:d0dfbce63a89 238 */
elmot 1:d0dfbce63a89 239 /* Exported constants --------------------------------------------------------*/
elmot 1:d0dfbce63a89 240
elmot 1:d0dfbce63a89 241 /** @defgroup I2C_Exported_Constants I2C Exported Constants
elmot 1:d0dfbce63a89 242 * @{
elmot 1:d0dfbce63a89 243 */
elmot 1:d0dfbce63a89 244
elmot 1:d0dfbce63a89 245 /** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options
elmot 1:d0dfbce63a89 246 * @{
elmot 1:d0dfbce63a89 247 */
elmot 1:d0dfbce63a89 248 #define I2C_NO_OPTION_FRAME (0xFFFF0000U)
elmot 1:d0dfbce63a89 249 #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
elmot 1:d0dfbce63a89 250 #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
elmot 1:d0dfbce63a89 251 #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
elmot 1:d0dfbce63a89 252 #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
elmot 1:d0dfbce63a89 253 /**
elmot 1:d0dfbce63a89 254 * @}
elmot 1:d0dfbce63a89 255 */
elmot 1:d0dfbce63a89 256
elmot 1:d0dfbce63a89 257 /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode
elmot 1:d0dfbce63a89 258 * @{
elmot 1:d0dfbce63a89 259 */
elmot 1:d0dfbce63a89 260 #define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
elmot 1:d0dfbce63a89 261 #define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
elmot 1:d0dfbce63a89 262 /**
elmot 1:d0dfbce63a89 263 * @}
elmot 1:d0dfbce63a89 264 */
elmot 1:d0dfbce63a89 265
elmot 1:d0dfbce63a89 266 /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode
elmot 1:d0dfbce63a89 267 * @{
elmot 1:d0dfbce63a89 268 */
elmot 1:d0dfbce63a89 269 #define I2C_DUALADDRESS_DISABLE (0x00000000U)
elmot 1:d0dfbce63a89 270 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
elmot 1:d0dfbce63a89 271 /**
elmot 1:d0dfbce63a89 272 * @}
elmot 1:d0dfbce63a89 273 */
elmot 1:d0dfbce63a89 274
elmot 1:d0dfbce63a89 275 /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks
elmot 1:d0dfbce63a89 276 * @{
elmot 1:d0dfbce63a89 277 */
elmot 1:d0dfbce63a89 278 #define I2C_OA2_NOMASK ((uint8_t)0x00U)
elmot 1:d0dfbce63a89 279 #define I2C_OA2_MASK01 ((uint8_t)0x01U)
elmot 1:d0dfbce63a89 280 #define I2C_OA2_MASK02 ((uint8_t)0x02U)
elmot 1:d0dfbce63a89 281 #define I2C_OA2_MASK03 ((uint8_t)0x03U)
elmot 1:d0dfbce63a89 282 #define I2C_OA2_MASK04 ((uint8_t)0x04U)
elmot 1:d0dfbce63a89 283 #define I2C_OA2_MASK05 ((uint8_t)0x05U)
elmot 1:d0dfbce63a89 284 #define I2C_OA2_MASK06 ((uint8_t)0x06U)
elmot 1:d0dfbce63a89 285 #define I2C_OA2_MASK07 ((uint8_t)0x07U)
elmot 1:d0dfbce63a89 286 /**
elmot 1:d0dfbce63a89 287 * @}
elmot 1:d0dfbce63a89 288 */
elmot 1:d0dfbce63a89 289
elmot 1:d0dfbce63a89 290 /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode
elmot 1:d0dfbce63a89 291 * @{
elmot 1:d0dfbce63a89 292 */
elmot 1:d0dfbce63a89 293 #define I2C_GENERALCALL_DISABLE (0x00000000U)
elmot 1:d0dfbce63a89 294 #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
elmot 1:d0dfbce63a89 295 /**
elmot 1:d0dfbce63a89 296 * @}
elmot 1:d0dfbce63a89 297 */
elmot 1:d0dfbce63a89 298
elmot 1:d0dfbce63a89 299 /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode
elmot 1:d0dfbce63a89 300 * @{
elmot 1:d0dfbce63a89 301 */
elmot 1:d0dfbce63a89 302 #define I2C_NOSTRETCH_DISABLE (0x00000000U)
elmot 1:d0dfbce63a89 303 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
elmot 1:d0dfbce63a89 304 /**
elmot 1:d0dfbce63a89 305 * @}
elmot 1:d0dfbce63a89 306 */
elmot 1:d0dfbce63a89 307
elmot 1:d0dfbce63a89 308 /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size
elmot 1:d0dfbce63a89 309 * @{
elmot 1:d0dfbce63a89 310 */
elmot 1:d0dfbce63a89 311 #define I2C_MEMADD_SIZE_8BIT (0x00000001U)
elmot 1:d0dfbce63a89 312 #define I2C_MEMADD_SIZE_16BIT (0x00000002U)
elmot 1:d0dfbce63a89 313 /**
elmot 1:d0dfbce63a89 314 * @}
elmot 1:d0dfbce63a89 315 */
elmot 1:d0dfbce63a89 316
elmot 1:d0dfbce63a89 317 /** @defgroup I2C_XferDirection I2C Transfer Direction
elmot 1:d0dfbce63a89 318 * @{
elmot 1:d0dfbce63a89 319 */
elmot 1:d0dfbce63a89 320 #define I2C_DIRECTION_TRANSMIT (0x00000000U)
elmot 1:d0dfbce63a89 321 #define I2C_DIRECTION_RECEIVE (0x00000001U)
elmot 1:d0dfbce63a89 322 /**
elmot 1:d0dfbce63a89 323 * @}
elmot 1:d0dfbce63a89 324 */
elmot 1:d0dfbce63a89 325
elmot 1:d0dfbce63a89 326 /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode
elmot 1:d0dfbce63a89 327 * @{
elmot 1:d0dfbce63a89 328 */
elmot 1:d0dfbce63a89 329 #define I2C_RELOAD_MODE I2C_CR2_RELOAD
elmot 1:d0dfbce63a89 330 #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
elmot 1:d0dfbce63a89 331 #define I2C_SOFTEND_MODE (0x00000000U)
elmot 1:d0dfbce63a89 332 /**
elmot 1:d0dfbce63a89 333 * @}
elmot 1:d0dfbce63a89 334 */
elmot 1:d0dfbce63a89 335
elmot 1:d0dfbce63a89 336 /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode
elmot 1:d0dfbce63a89 337 * @{
elmot 1:d0dfbce63a89 338 */
elmot 1:d0dfbce63a89 339 #define I2C_NO_STARTSTOP (0x00000000U)
elmot 1:d0dfbce63a89 340 #define I2C_GENERATE_STOP I2C_CR2_STOP
elmot 1:d0dfbce63a89 341 #define I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
elmot 1:d0dfbce63a89 342 #define I2C_GENERATE_START_WRITE I2C_CR2_START
elmot 1:d0dfbce63a89 343 /**
elmot 1:d0dfbce63a89 344 * @}
elmot 1:d0dfbce63a89 345 */
elmot 1:d0dfbce63a89 346
elmot 1:d0dfbce63a89 347 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
elmot 1:d0dfbce63a89 348 * @brief I2C Interrupt definition
elmot 1:d0dfbce63a89 349 * Elements values convention: 0xXXXXXXXX
elmot 1:d0dfbce63a89 350 * - XXXXXXXX : Interrupt control mask
elmot 1:d0dfbce63a89 351 * @{
elmot 1:d0dfbce63a89 352 */
elmot 1:d0dfbce63a89 353 #define I2C_IT_ERRI I2C_CR1_ERRIE
elmot 1:d0dfbce63a89 354 #define I2C_IT_TCI I2C_CR1_TCIE
elmot 1:d0dfbce63a89 355 #define I2C_IT_STOPI I2C_CR1_STOPIE
elmot 1:d0dfbce63a89 356 #define I2C_IT_NACKI I2C_CR1_NACKIE
elmot 1:d0dfbce63a89 357 #define I2C_IT_ADDRI I2C_CR1_ADDRIE
elmot 1:d0dfbce63a89 358 #define I2C_IT_RXI I2C_CR1_RXIE
elmot 1:d0dfbce63a89 359 #define I2C_IT_TXI I2C_CR1_TXIE
elmot 1:d0dfbce63a89 360 /**
elmot 1:d0dfbce63a89 361 * @}
elmot 1:d0dfbce63a89 362 */
elmot 1:d0dfbce63a89 363
elmot 1:d0dfbce63a89 364 /** @defgroup I2C_Flag_definition I2C Flag definition
elmot 1:d0dfbce63a89 365 * @{
elmot 1:d0dfbce63a89 366 */
elmot 1:d0dfbce63a89 367 #define I2C_FLAG_TXE I2C_ISR_TXE
elmot 1:d0dfbce63a89 368 #define I2C_FLAG_TXIS I2C_ISR_TXIS
elmot 1:d0dfbce63a89 369 #define I2C_FLAG_RXNE I2C_ISR_RXNE
elmot 1:d0dfbce63a89 370 #define I2C_FLAG_ADDR I2C_ISR_ADDR
elmot 1:d0dfbce63a89 371 #define I2C_FLAG_AF I2C_ISR_NACKF
elmot 1:d0dfbce63a89 372 #define I2C_FLAG_STOPF I2C_ISR_STOPF
elmot 1:d0dfbce63a89 373 #define I2C_FLAG_TC I2C_ISR_TC
elmot 1:d0dfbce63a89 374 #define I2C_FLAG_TCR I2C_ISR_TCR
elmot 1:d0dfbce63a89 375 #define I2C_FLAG_BERR I2C_ISR_BERR
elmot 1:d0dfbce63a89 376 #define I2C_FLAG_ARLO I2C_ISR_ARLO
elmot 1:d0dfbce63a89 377 #define I2C_FLAG_OVR I2C_ISR_OVR
elmot 1:d0dfbce63a89 378 #define I2C_FLAG_PECERR I2C_ISR_PECERR
elmot 1:d0dfbce63a89 379 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
elmot 1:d0dfbce63a89 380 #define I2C_FLAG_ALERT I2C_ISR_ALERT
elmot 1:d0dfbce63a89 381 #define I2C_FLAG_BUSY I2C_ISR_BUSY
elmot 1:d0dfbce63a89 382 #define I2C_FLAG_DIR I2C_ISR_DIR
elmot 1:d0dfbce63a89 383 /**
elmot 1:d0dfbce63a89 384 * @}
elmot 1:d0dfbce63a89 385 */
elmot 1:d0dfbce63a89 386
elmot 1:d0dfbce63a89 387 /**
elmot 1:d0dfbce63a89 388 * @}
elmot 1:d0dfbce63a89 389 */
elmot 1:d0dfbce63a89 390
elmot 1:d0dfbce63a89 391 /* Exported macros -----------------------------------------------------------*/
elmot 1:d0dfbce63a89 392
elmot 1:d0dfbce63a89 393 /** @defgroup I2C_Exported_Macros I2C Exported Macros
elmot 1:d0dfbce63a89 394 * @{
elmot 1:d0dfbce63a89 395 */
elmot 1:d0dfbce63a89 396
elmot 1:d0dfbce63a89 397 /** @brief Reset I2C handle state.
elmot 1:d0dfbce63a89 398 * @param __HANDLE__ specifies the I2C Handle.
elmot 1:d0dfbce63a89 399 * @retval None
elmot 1:d0dfbce63a89 400 */
elmot 1:d0dfbce63a89 401 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
elmot 1:d0dfbce63a89 402
elmot 1:d0dfbce63a89 403 /** @brief Enable the specified I2C interrupt.
elmot 1:d0dfbce63a89 404 * @param __HANDLE__ specifies the I2C Handle.
elmot 1:d0dfbce63a89 405 * @param __INTERRUPT__ specifies the interrupt source to enable.
elmot 1:d0dfbce63a89 406 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 407 * @arg @ref I2C_IT_ERRI Errors interrupt enable
elmot 1:d0dfbce63a89 408 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
elmot 1:d0dfbce63a89 409 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
elmot 1:d0dfbce63a89 410 * @arg @ref I2C_IT_NACKI NACK received interrupt enable
elmot 1:d0dfbce63a89 411 * @arg @ref I2C_IT_ADDRI Address match interrupt enable
elmot 1:d0dfbce63a89 412 * @arg @ref I2C_IT_RXI RX interrupt enable
elmot 1:d0dfbce63a89 413 * @arg @ref I2C_IT_TXI TX interrupt enable
elmot 1:d0dfbce63a89 414 *
elmot 1:d0dfbce63a89 415 * @retval None
elmot 1:d0dfbce63a89 416 */
elmot 1:d0dfbce63a89 417 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
elmot 1:d0dfbce63a89 418
elmot 1:d0dfbce63a89 419 /** @brief Disable the specified I2C interrupt.
elmot 1:d0dfbce63a89 420 * @param __HANDLE__ specifies the I2C Handle.
elmot 1:d0dfbce63a89 421 * @param __INTERRUPT__ specifies the interrupt source to disable.
elmot 1:d0dfbce63a89 422 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 423 * @arg @ref I2C_IT_ERRI Errors interrupt enable
elmot 1:d0dfbce63a89 424 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
elmot 1:d0dfbce63a89 425 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
elmot 1:d0dfbce63a89 426 * @arg @ref I2C_IT_NACKI NACK received interrupt enable
elmot 1:d0dfbce63a89 427 * @arg @ref I2C_IT_ADDRI Address match interrupt enable
elmot 1:d0dfbce63a89 428 * @arg @ref I2C_IT_RXI RX interrupt enable
elmot 1:d0dfbce63a89 429 * @arg @ref I2C_IT_TXI TX interrupt enable
elmot 1:d0dfbce63a89 430 *
elmot 1:d0dfbce63a89 431 * @retval None
elmot 1:d0dfbce63a89 432 */
elmot 1:d0dfbce63a89 433 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
elmot 1:d0dfbce63a89 434
elmot 1:d0dfbce63a89 435 /** @brief Check whether the specified I2C interrupt source is enabled or not.
elmot 1:d0dfbce63a89 436 * @param __HANDLE__ specifies the I2C Handle.
elmot 1:d0dfbce63a89 437 * @param __INTERRUPT__ specifies the I2C interrupt source to check.
elmot 1:d0dfbce63a89 438 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 439 * @arg @ref I2C_IT_ERRI Errors interrupt enable
elmot 1:d0dfbce63a89 440 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
elmot 1:d0dfbce63a89 441 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
elmot 1:d0dfbce63a89 442 * @arg @ref I2C_IT_NACKI NACK received interrupt enable
elmot 1:d0dfbce63a89 443 * @arg @ref I2C_IT_ADDRI Address match interrupt enable
elmot 1:d0dfbce63a89 444 * @arg @ref I2C_IT_RXI RX interrupt enable
elmot 1:d0dfbce63a89 445 * @arg @ref I2C_IT_TXI TX interrupt enable
elmot 1:d0dfbce63a89 446 *
elmot 1:d0dfbce63a89 447 * @retval The new state of __INTERRUPT__ (SET or RESET).
elmot 1:d0dfbce63a89 448 */
elmot 1:d0dfbce63a89 449 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
elmot 1:d0dfbce63a89 450
elmot 1:d0dfbce63a89 451 /** @brief Check whether the specified I2C flag is set or not.
elmot 1:d0dfbce63a89 452 * @param __HANDLE__ specifies the I2C Handle.
elmot 1:d0dfbce63a89 453 * @param __FLAG__ specifies the flag to check.
elmot 1:d0dfbce63a89 454 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 455 * @arg @ref I2C_FLAG_TXE Transmit data register empty
elmot 1:d0dfbce63a89 456 * @arg @ref I2C_FLAG_TXIS Transmit interrupt status
elmot 1:d0dfbce63a89 457 * @arg @ref I2C_FLAG_RXNE Receive data register not empty
elmot 1:d0dfbce63a89 458 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
elmot 1:d0dfbce63a89 459 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag
elmot 1:d0dfbce63a89 460 * @arg @ref I2C_FLAG_STOPF STOP detection flag
elmot 1:d0dfbce63a89 461 * @arg @ref I2C_FLAG_TC Transfer complete (master mode)
elmot 1:d0dfbce63a89 462 * @arg @ref I2C_FLAG_TCR Transfer complete reload
elmot 1:d0dfbce63a89 463 * @arg @ref I2C_FLAG_BERR Bus error
elmot 1:d0dfbce63a89 464 * @arg @ref I2C_FLAG_ARLO Arbitration lost
elmot 1:d0dfbce63a89 465 * @arg @ref I2C_FLAG_OVR Overrun/Underrun
elmot 1:d0dfbce63a89 466 * @arg @ref I2C_FLAG_PECERR PEC error in reception
elmot 1:d0dfbce63a89 467 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
elmot 1:d0dfbce63a89 468 * @arg @ref I2C_FLAG_ALERT SMBus alert
elmot 1:d0dfbce63a89 469 * @arg @ref I2C_FLAG_BUSY Bus busy
elmot 1:d0dfbce63a89 470 * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode)
elmot 1:d0dfbce63a89 471 *
elmot 1:d0dfbce63a89 472 * @retval The new state of __FLAG__ (SET or RESET).
elmot 1:d0dfbce63a89 473 */
elmot 1:d0dfbce63a89 474 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
elmot 1:d0dfbce63a89 475
elmot 1:d0dfbce63a89 476 /** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
elmot 1:d0dfbce63a89 477 * @param __HANDLE__ specifies the I2C Handle.
elmot 1:d0dfbce63a89 478 * @param __FLAG__ specifies the flag to clear.
elmot 1:d0dfbce63a89 479 * This parameter can be any combination of the following values:
elmot 1:d0dfbce63a89 480 * @arg @ref I2C_FLAG_TXE Transmit data register empty
elmot 1:d0dfbce63a89 481 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
elmot 1:d0dfbce63a89 482 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag
elmot 1:d0dfbce63a89 483 * @arg @ref I2C_FLAG_STOPF STOP detection flag
elmot 1:d0dfbce63a89 484 * @arg @ref I2C_FLAG_BERR Bus error
elmot 1:d0dfbce63a89 485 * @arg @ref I2C_FLAG_ARLO Arbitration lost
elmot 1:d0dfbce63a89 486 * @arg @ref I2C_FLAG_OVR Overrun/Underrun
elmot 1:d0dfbce63a89 487 * @arg @ref I2C_FLAG_PECERR PEC error in reception
elmot 1:d0dfbce63a89 488 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
elmot 1:d0dfbce63a89 489 * @arg @ref I2C_FLAG_ALERT SMBus alert
elmot 1:d0dfbce63a89 490 *
elmot 1:d0dfbce63a89 491 * @retval None
elmot 1:d0dfbce63a89 492 */
elmot 1:d0dfbce63a89 493 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \
elmot 1:d0dfbce63a89 494 : ((__HANDLE__)->Instance->ICR = (__FLAG__)))
elmot 1:d0dfbce63a89 495
elmot 1:d0dfbce63a89 496 /** @brief Enable the specified I2C peripheral.
elmot 1:d0dfbce63a89 497 * @param __HANDLE__ specifies the I2C Handle.
elmot 1:d0dfbce63a89 498 * @retval None
elmot 1:d0dfbce63a89 499 */
elmot 1:d0dfbce63a89 500 #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
elmot 1:d0dfbce63a89 501
elmot 1:d0dfbce63a89 502 /** @brief Disable the specified I2C peripheral.
elmot 1:d0dfbce63a89 503 * @param __HANDLE__ specifies the I2C Handle.
elmot 1:d0dfbce63a89 504 * @retval None
elmot 1:d0dfbce63a89 505 */
elmot 1:d0dfbce63a89 506 #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
elmot 1:d0dfbce63a89 507
elmot 1:d0dfbce63a89 508 /** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode.
elmot 1:d0dfbce63a89 509 * @param __HANDLE__: specifies the I2C Handle.
elmot 1:d0dfbce63a89 510 * @retval None
elmot 1:d0dfbce63a89 511 */
elmot 1:d0dfbce63a89 512 #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
elmot 1:d0dfbce63a89 513 /**
elmot 1:d0dfbce63a89 514 * @}
elmot 1:d0dfbce63a89 515 */
elmot 1:d0dfbce63a89 516
elmot 1:d0dfbce63a89 517 /* Include I2C HAL Extended module */
elmot 1:d0dfbce63a89 518 #include "stm32l4xx_hal_i2c_ex.h"
elmot 1:d0dfbce63a89 519
elmot 1:d0dfbce63a89 520 /* Exported functions --------------------------------------------------------*/
elmot 1:d0dfbce63a89 521 /** @addtogroup I2C_Exported_Functions
elmot 1:d0dfbce63a89 522 * @{
elmot 1:d0dfbce63a89 523 */
elmot 1:d0dfbce63a89 524
elmot 1:d0dfbce63a89 525 /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
elmot 1:d0dfbce63a89 526 * @{
elmot 1:d0dfbce63a89 527 */
elmot 1:d0dfbce63a89 528 /* Initialization and de-initialization functions******************************/
elmot 1:d0dfbce63a89 529 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 530 HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 531 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 532 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 533 /**
elmot 1:d0dfbce63a89 534 * @}
elmot 1:d0dfbce63a89 535 */
elmot 1:d0dfbce63a89 536
elmot 1:d0dfbce63a89 537 /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
elmot 1:d0dfbce63a89 538 * @{
elmot 1:d0dfbce63a89 539 */
elmot 1:d0dfbce63a89 540 /* IO operation functions ****************************************************/
elmot 1:d0dfbce63a89 541 /******* Blocking mode: Polling */
elmot 1:d0dfbce63a89 542 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
elmot 1:d0dfbce63a89 543 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
elmot 1:d0dfbce63a89 544 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
elmot 1:d0dfbce63a89 545 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
elmot 1:d0dfbce63a89 546 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
elmot 1:d0dfbce63a89 547 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
elmot 1:d0dfbce63a89 548 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
elmot 1:d0dfbce63a89 549
elmot 1:d0dfbce63a89 550 /******* Non-Blocking mode: Interrupt */
elmot 1:d0dfbce63a89 551 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
elmot 1:d0dfbce63a89 552 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
elmot 1:d0dfbce63a89 553 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
elmot 1:d0dfbce63a89 554 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
elmot 1:d0dfbce63a89 555 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
elmot 1:d0dfbce63a89 556 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
elmot 1:d0dfbce63a89 557
elmot 1:d0dfbce63a89 558 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
elmot 1:d0dfbce63a89 559 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
elmot 1:d0dfbce63a89 560 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
elmot 1:d0dfbce63a89 561 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
elmot 1:d0dfbce63a89 562 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 563 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 564 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
elmot 1:d0dfbce63a89 565
elmot 1:d0dfbce63a89 566 /******* Non-Blocking mode: DMA */
elmot 1:d0dfbce63a89 567 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
elmot 1:d0dfbce63a89 568 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
elmot 1:d0dfbce63a89 569 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
elmot 1:d0dfbce63a89 570 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
elmot 1:d0dfbce63a89 571 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
elmot 1:d0dfbce63a89 572 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
elmot 1:d0dfbce63a89 573 /**
elmot 1:d0dfbce63a89 574 * @}
elmot 1:d0dfbce63a89 575 */
elmot 1:d0dfbce63a89 576
elmot 1:d0dfbce63a89 577 /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
elmot 1:d0dfbce63a89 578 * @{
elmot 1:d0dfbce63a89 579 */
elmot 1:d0dfbce63a89 580 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
elmot 1:d0dfbce63a89 581 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 582 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 583 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 584 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 585 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 586 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 587 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
elmot 1:d0dfbce63a89 588 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 589 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 590 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 591 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 592 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 593 /**
elmot 1:d0dfbce63a89 594 * @}
elmot 1:d0dfbce63a89 595 */
elmot 1:d0dfbce63a89 596
elmot 1:d0dfbce63a89 597 /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
elmot 1:d0dfbce63a89 598 * @{
elmot 1:d0dfbce63a89 599 */
elmot 1:d0dfbce63a89 600 /* Peripheral State, Mode and Error functions *********************************/
elmot 1:d0dfbce63a89 601 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 602 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 603 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
elmot 1:d0dfbce63a89 604
elmot 1:d0dfbce63a89 605 /**
elmot 1:d0dfbce63a89 606 * @}
elmot 1:d0dfbce63a89 607 */
elmot 1:d0dfbce63a89 608
elmot 1:d0dfbce63a89 609 /**
elmot 1:d0dfbce63a89 610 * @}
elmot 1:d0dfbce63a89 611 */
elmot 1:d0dfbce63a89 612
elmot 1:d0dfbce63a89 613 /* Private constants ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 614 /** @defgroup I2C_Private_Constants I2C Private Constants
elmot 1:d0dfbce63a89 615 * @{
elmot 1:d0dfbce63a89 616 */
elmot 1:d0dfbce63a89 617
elmot 1:d0dfbce63a89 618 /**
elmot 1:d0dfbce63a89 619 * @}
elmot 1:d0dfbce63a89 620 */
elmot 1:d0dfbce63a89 621
elmot 1:d0dfbce63a89 622 /* Private macros ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 623 /** @defgroup I2C_Private_Macro I2C Private Macros
elmot 1:d0dfbce63a89 624 * @{
elmot 1:d0dfbce63a89 625 */
elmot 1:d0dfbce63a89 626
elmot 1:d0dfbce63a89 627 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
elmot 1:d0dfbce63a89 628 ((MODE) == I2C_ADDRESSINGMODE_10BIT))
elmot 1:d0dfbce63a89 629
elmot 1:d0dfbce63a89 630 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
elmot 1:d0dfbce63a89 631 ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
elmot 1:d0dfbce63a89 632
elmot 1:d0dfbce63a89 633 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
elmot 1:d0dfbce63a89 634 ((MASK) == I2C_OA2_MASK01) || \
elmot 1:d0dfbce63a89 635 ((MASK) == I2C_OA2_MASK02) || \
elmot 1:d0dfbce63a89 636 ((MASK) == I2C_OA2_MASK03) || \
elmot 1:d0dfbce63a89 637 ((MASK) == I2C_OA2_MASK04) || \
elmot 1:d0dfbce63a89 638 ((MASK) == I2C_OA2_MASK05) || \
elmot 1:d0dfbce63a89 639 ((MASK) == I2C_OA2_MASK06) || \
elmot 1:d0dfbce63a89 640 ((MASK) == I2C_OA2_MASK07))
elmot 1:d0dfbce63a89 641
elmot 1:d0dfbce63a89 642 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
elmot 1:d0dfbce63a89 643 ((CALL) == I2C_GENERALCALL_ENABLE))
elmot 1:d0dfbce63a89 644
elmot 1:d0dfbce63a89 645 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
elmot 1:d0dfbce63a89 646 ((STRETCH) == I2C_NOSTRETCH_ENABLE))
elmot 1:d0dfbce63a89 647
elmot 1:d0dfbce63a89 648 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
elmot 1:d0dfbce63a89 649 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
elmot 1:d0dfbce63a89 650
elmot 1:d0dfbce63a89 651 #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
elmot 1:d0dfbce63a89 652 ((MODE) == I2C_AUTOEND_MODE) || \
elmot 1:d0dfbce63a89 653 ((MODE) == I2C_SOFTEND_MODE))
elmot 1:d0dfbce63a89 654
elmot 1:d0dfbce63a89 655 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
elmot 1:d0dfbce63a89 656 ((REQUEST) == I2C_GENERATE_START_READ) || \
elmot 1:d0dfbce63a89 657 ((REQUEST) == I2C_GENERATE_START_WRITE) || \
elmot 1:d0dfbce63a89 658 ((REQUEST) == I2C_NO_STARTSTOP))
elmot 1:d0dfbce63a89 659
elmot 1:d0dfbce63a89 660 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
elmot 1:d0dfbce63a89 661 ((REQUEST) == I2C_NEXT_FRAME) || \
elmot 1:d0dfbce63a89 662 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
elmot 1:d0dfbce63a89 663 ((REQUEST) == I2C_LAST_FRAME))
elmot 1:d0dfbce63a89 664
elmot 1:d0dfbce63a89 665 #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
elmot 1:d0dfbce63a89 666
elmot 1:d0dfbce63a89 667 #define I2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U)
elmot 1:d0dfbce63a89 668 #define I2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)
elmot 1:d0dfbce63a89 669 #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
elmot 1:d0dfbce63a89 670 #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)
elmot 1:d0dfbce63a89 671 #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)
elmot 1:d0dfbce63a89 672
elmot 1:d0dfbce63a89 673 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
elmot 1:d0dfbce63a89 674 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
elmot 1:d0dfbce63a89 675
elmot 1:d0dfbce63a89 676 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))
elmot 1:d0dfbce63a89 677 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
elmot 1:d0dfbce63a89 678
elmot 1:d0dfbce63a89 679 #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
elmot 1:d0dfbce63a89 680 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
elmot 1:d0dfbce63a89 681 /**
elmot 1:d0dfbce63a89 682 * @}
elmot 1:d0dfbce63a89 683 */
elmot 1:d0dfbce63a89 684
elmot 1:d0dfbce63a89 685 /* Private Functions ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 686 /** @defgroup I2C_Private_Functions I2C Private Functions
elmot 1:d0dfbce63a89 687 * @{
elmot 1:d0dfbce63a89 688 */
elmot 1:d0dfbce63a89 689 /* Private functions are defined in stm32l4xx_hal_i2c.c file */
elmot 1:d0dfbce63a89 690 /**
elmot 1:d0dfbce63a89 691 * @}
elmot 1:d0dfbce63a89 692 */
elmot 1:d0dfbce63a89 693
elmot 1:d0dfbce63a89 694 /**
elmot 1:d0dfbce63a89 695 * @}
elmot 1:d0dfbce63a89 696 */
elmot 1:d0dfbce63a89 697
elmot 1:d0dfbce63a89 698 /**
elmot 1:d0dfbce63a89 699 * @}
elmot 1:d0dfbce63a89 700 */
elmot 1:d0dfbce63a89 701
elmot 1:d0dfbce63a89 702 #ifdef __cplusplus
elmot 1:d0dfbce63a89 703 }
elmot 1:d0dfbce63a89 704 #endif
elmot 1:d0dfbce63a89 705
elmot 1:d0dfbce63a89 706
elmot 1:d0dfbce63a89 707 #endif /* __STM32L4xx_HAL_I2C_H */
elmot 1:d0dfbce63a89 708
elmot 1:d0dfbce63a89 709 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/