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HAL_L476/stm32l4xx_hal_i2c.c@1:d0dfbce63a89, 2017-02-24 (annotated)

Committer:: elmot
Date:: Fri Feb 24 21:13:56 2017 +0000
Revision:: 1:d0dfbce63a89

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elmot	1:d0dfbce63a89	1	/**
elmot	1:d0dfbce63a89	2	******************************************************************************
elmot	1:d0dfbce63a89	3	* @file stm32l4xx_hal_i2c.c
elmot	1:d0dfbce63a89	4	* @author MCD Application Team
elmot	1:d0dfbce63a89	5	* @version V1.5.1
elmot	1:d0dfbce63a89	6	* @date 31-May-2016
elmot	1:d0dfbce63a89	7	* @brief I2C HAL module driver.
elmot	1:d0dfbce63a89	8	* This file provides firmware functions to manage the following
elmot	1:d0dfbce63a89	9	* functionalities of the Inter Integrated Circuit (I2C) peripheral:
elmot	1:d0dfbce63a89	10	* + Initialization and de-initialization functions
elmot	1:d0dfbce63a89	11	* + IO operation functions
elmot	1:d0dfbce63a89	12	* + Peripheral State and Errors functions
elmot	1:d0dfbce63a89	13	*
elmot	1:d0dfbce63a89	14	@verbatim
elmot	1:d0dfbce63a89	15	==============================================================================
elmot	1:d0dfbce63a89	16	##### How to use this driver #####
elmot	1:d0dfbce63a89	17	==============================================================================
elmot	1:d0dfbce63a89	18	[..]
elmot	1:d0dfbce63a89	19	The I2C HAL driver can be used as follows:
elmot	1:d0dfbce63a89	20
elmot	1:d0dfbce63a89	21	(#) Declare a I2C_HandleTypeDef handle structure, for example:
elmot	1:d0dfbce63a89	22	I2C_HandleTypeDef hi2c;
elmot	1:d0dfbce63a89	23
elmot	1:d0dfbce63a89	24	(#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
elmot	1:d0dfbce63a89	25	(##) Enable the I2Cx interface clock
elmot	1:d0dfbce63a89	26	(##) I2C pins configuration
elmot	1:d0dfbce63a89	27	(+++) Enable the clock for the I2C GPIOs
elmot	1:d0dfbce63a89	28	(+++) Configure I2C pins as alternate function open-drain
elmot	1:d0dfbce63a89	29	(##) NVIC configuration if you need to use interrupt process
elmot	1:d0dfbce63a89	30	(+++) Configure the I2Cx interrupt priority
elmot	1:d0dfbce63a89	31	(+++) Enable the NVIC I2C IRQ Channel
elmot	1:d0dfbce63a89	32	(##) DMA Configuration if you need to use DMA process
elmot	1:d0dfbce63a89	33	(+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
elmot	1:d0dfbce63a89	34	(+++) Enable the DMAx interface clock using
elmot	1:d0dfbce63a89	35	(+++) Configure the DMA handle parameters
elmot	1:d0dfbce63a89	36	(+++) Configure the DMA Tx or Rx channel
elmot	1:d0dfbce63a89	37	(+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
elmot	1:d0dfbce63a89	38	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
elmot	1:d0dfbce63a89	39	the DMA Tx or Rx channel
elmot	1:d0dfbce63a89	40
elmot	1:d0dfbce63a89	41	(#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addressing mode,
elmot	1:d0dfbce63a89	42	Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure.
elmot	1:d0dfbce63a89	43
elmot	1:d0dfbce63a89	44	(#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
elmot	1:d0dfbce63a89	45	(GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
elmot	1:d0dfbce63a89	46
elmot	1:d0dfbce63a89	47	(#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
elmot	1:d0dfbce63a89	48
elmot	1:d0dfbce63a89	49	(#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
elmot	1:d0dfbce63a89	50
elmot	1:d0dfbce63a89	51	* Polling mode IO operation *
elmot	1:d0dfbce63a89	52	=================================
elmot	1:d0dfbce63a89	53	[..]
elmot	1:d0dfbce63a89	54	(+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
elmot	1:d0dfbce63a89	55	(+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
elmot	1:d0dfbce63a89	56	(+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
elmot	1:d0dfbce63a89	57	(+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
elmot	1:d0dfbce63a89	58
elmot	1:d0dfbce63a89	59	* Polling mode IO MEM operation *
elmot	1:d0dfbce63a89	60	=====================================
elmot	1:d0dfbce63a89	61	[..]
elmot	1:d0dfbce63a89	62	(+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
elmot	1:d0dfbce63a89	63	(+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
elmot	1:d0dfbce63a89	64
elmot	1:d0dfbce63a89	65
elmot	1:d0dfbce63a89	66	* Interrupt mode IO operation *
elmot	1:d0dfbce63a89	67	===================================
elmot	1:d0dfbce63a89	68	[..]
elmot	1:d0dfbce63a89	69	(+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT()
elmot	1:d0dfbce63a89	70	(+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	71	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
elmot	1:d0dfbce63a89	72	(+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT()
elmot	1:d0dfbce63a89	73	(+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	74	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
elmot	1:d0dfbce63a89	75	(+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT()
elmot	1:d0dfbce63a89	76	(+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	77	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
elmot	1:d0dfbce63a89	78	(+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT()
elmot	1:d0dfbce63a89	79	(+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	80	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
elmot	1:d0dfbce63a89	81	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
elmot	1:d0dfbce63a89	82	add his own code by customization of function pointer HAL_I2C_ErrorCallback()
elmot	1:d0dfbce63a89	83	(+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
elmot	1:d0dfbce63a89	84	(+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	85	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
elmot	1:d0dfbce63a89	86	(+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
elmot	1:d0dfbce63a89	87	This action will inform Master to generate a Stop condition to discard the communication.
elmot	1:d0dfbce63a89	88
elmot	1:d0dfbce63a89	89
elmot	1:d0dfbce63a89	90	* Interrupt mode IO sequential operation *
elmot	1:d0dfbce63a89	91	===================================
elmot	1:d0dfbce63a89	92	[..]
elmot	1:d0dfbce63a89	93	(@) These interfaces allow to manage a sequential transfer with a repeated start condition
elmot	1:d0dfbce63a89	94	when a direction change during transfer
elmot	1:d0dfbce63a89	95	[..]
elmot	1:d0dfbce63a89	96	(+) A specific option field manage the different steps of a sequential transfer
elmot	1:d0dfbce63a89	97	(+) Option field values are defined through I2C_XFEROPTIONS and are listed below:
elmot	1:d0dfbce63a89	98	(++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
elmot	1:d0dfbce63a89	99	(++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
elmot	1:d0dfbce63a89	100	and data to transfer without a final stop condition
elmot	1:d0dfbce63a89	101	(++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
elmot	1:d0dfbce63a89	102	and with new data to transfer if the direction change or manage only the new data to transfer
elmot	1:d0dfbce63a89	103	if no direction change and without a final stop condition in both cases
elmot	1:d0dfbce63a89	104	(++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
elmot	1:d0dfbce63a89	105	and with new data to transfer if the direction change or manage only the new data to transfer
elmot	1:d0dfbce63a89	106	if no direction change and with a final stop condition in both cases
elmot	1:d0dfbce63a89	107
elmot	1:d0dfbce63a89	108	(+) Differents sequential I2C interfaces are listed below:
elmot	1:d0dfbce63a89	109	(++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
elmot	1:d0dfbce63a89	110	(+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	111	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
elmot	1:d0dfbce63a89	112	(++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
elmot	1:d0dfbce63a89	113	(+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	114	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
elmot	1:d0dfbce63a89	115	(++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
elmot	1:d0dfbce63a89	116	(+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	117	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
elmot	1:d0dfbce63a89	118	(+++) mean HAL_I2C_MasterTxCpltCallback() in case of previous state was master transmit
elmot	1:d0dfbce63a89	119	(+++) mean HAL_I2c_MasterRxCpltCallback() in case of previous state was master receive
elmot	1:d0dfbce63a89	120	(++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
elmot	1:d0dfbce63a89	121	(+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
elmot	1:d0dfbce63a89	122	add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
elmot	1:d0dfbce63a89	123	(+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	124	add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
elmot	1:d0dfbce63a89	125	(++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
elmot	1:d0dfbce63a89	126	(+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	127	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
elmot	1:d0dfbce63a89	128	(++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
elmot	1:d0dfbce63a89	129	(+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	130	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
elmot	1:d0dfbce63a89	131	(++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
elmot	1:d0dfbce63a89	132	add his own code by customization of function pointer HAL_I2C_ErrorCallback()
elmot	1:d0dfbce63a89	133	(++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
elmot	1:d0dfbce63a89	134	(++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	135	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
elmot	1:d0dfbce63a89	136	(++) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
elmot	1:d0dfbce63a89	137	This action will inform Master to generate a Stop condition to discard the communication.
elmot	1:d0dfbce63a89	138
elmot	1:d0dfbce63a89	139	* Interrupt mode IO MEM operation *
elmot	1:d0dfbce63a89	140	=======================================
elmot	1:d0dfbce63a89	141	[..]
elmot	1:d0dfbce63a89	142	(+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
elmot	1:d0dfbce63a89	143	HAL_I2C_Mem_Write_IT()
elmot	1:d0dfbce63a89	144	(+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	145	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
elmot	1:d0dfbce63a89	146	(+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
elmot	1:d0dfbce63a89	147	HAL_I2C_Mem_Read_IT()
elmot	1:d0dfbce63a89	148	(+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	149	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
elmot	1:d0dfbce63a89	150	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
elmot	1:d0dfbce63a89	151	add his own code by customization of function pointer HAL_I2C_ErrorCallback()
elmot	1:d0dfbce63a89	152
elmot	1:d0dfbce63a89	153	* DMA mode IO operation *
elmot	1:d0dfbce63a89	154	==============================
elmot	1:d0dfbce63a89	155	[..]
elmot	1:d0dfbce63a89	156	(+) Transmit in master mode an amount of data in non-blocking mode (DMA) using
elmot	1:d0dfbce63a89	157	HAL_I2C_Master_Transmit_DMA()
elmot	1:d0dfbce63a89	158	(+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	159	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
elmot	1:d0dfbce63a89	160	(+) Receive in master mode an amount of data in non-blocking mode (DMA) using
elmot	1:d0dfbce63a89	161	HAL_I2C_Master_Receive_DMA()
elmot	1:d0dfbce63a89	162	(+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	163	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
elmot	1:d0dfbce63a89	164	(+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using
elmot	1:d0dfbce63a89	165	HAL_I2C_Slave_Transmit_DMA()
elmot	1:d0dfbce63a89	166	(+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	167	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
elmot	1:d0dfbce63a89	168	(+) Receive in slave mode an amount of data in non-blocking mode (DMA) using
elmot	1:d0dfbce63a89	169	HAL_I2C_Slave_Receive_DMA()
elmot	1:d0dfbce63a89	170	(+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	171	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
elmot	1:d0dfbce63a89	172	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
elmot	1:d0dfbce63a89	173	add his own code by customization of function pointer HAL_I2C_ErrorCallback()
elmot	1:d0dfbce63a89	174	(+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
elmot	1:d0dfbce63a89	175	(+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	176	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
elmot	1:d0dfbce63a89	177	(+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
elmot	1:d0dfbce63a89	178	This action will inform Master to generate a Stop condition to discard the communication.
elmot	1:d0dfbce63a89	179
elmot	1:d0dfbce63a89	180	* DMA mode IO MEM operation *
elmot	1:d0dfbce63a89	181	=================================
elmot	1:d0dfbce63a89	182	[..]
elmot	1:d0dfbce63a89	183	(+) Write an amount of data in non-blocking mode with DMA to a specific memory address using
elmot	1:d0dfbce63a89	184	HAL_I2C_Mem_Write_DMA()
elmot	1:d0dfbce63a89	185	(+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	186	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
elmot	1:d0dfbce63a89	187	(+) Read an amount of data in non-blocking mode with DMA from a specific memory address using
elmot	1:d0dfbce63a89	188	HAL_I2C_Mem_Read_DMA()
elmot	1:d0dfbce63a89	189	(+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
elmot	1:d0dfbce63a89	190	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
elmot	1:d0dfbce63a89	191	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
elmot	1:d0dfbce63a89	192	add his own code by customization of function pointer HAL_I2C_ErrorCallback()
elmot	1:d0dfbce63a89	193
elmot	1:d0dfbce63a89	194
elmot	1:d0dfbce63a89	195	* I2C HAL driver macros list *
elmot	1:d0dfbce63a89	196	==================================
elmot	1:d0dfbce63a89	197	[..]
elmot	1:d0dfbce63a89	198	Below the list of most used macros in I2C HAL driver.
elmot	1:d0dfbce63a89	199
elmot	1:d0dfbce63a89	200	(+) __HAL_I2C_ENABLE: Enable the I2C peripheral
elmot	1:d0dfbce63a89	201	(+) __HAL_I2C_DISABLE: Disable the I2C peripheral
elmot	1:d0dfbce63a89	202	(+) __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode
elmot	1:d0dfbce63a89	203	(+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not
elmot	1:d0dfbce63a89	204	(+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
elmot	1:d0dfbce63a89	205	(+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
elmot	1:d0dfbce63a89	206	(+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
elmot	1:d0dfbce63a89	207
elmot	1:d0dfbce63a89	208	[..]
elmot	1:d0dfbce63a89	209	(@) You can refer to the I2C HAL driver header file for more useful macros
elmot	1:d0dfbce63a89	210
elmot	1:d0dfbce63a89	211	@endverbatim
elmot	1:d0dfbce63a89	212	******************************************************************************
elmot	1:d0dfbce63a89	213	* @attention
elmot	1:d0dfbce63a89	214	*
elmot	1:d0dfbce63a89	215	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot	1:d0dfbce63a89	216	*
elmot	1:d0dfbce63a89	217	* Redistribution and use in source and binary forms, with or without modification,
elmot	1:d0dfbce63a89	218	* are permitted provided that the following conditions are met:
elmot	1:d0dfbce63a89	219	* 1. Redistributions of source code must retain the above copyright notice,
elmot	1:d0dfbce63a89	220	* this list of conditions and the following disclaimer.
elmot	1:d0dfbce63a89	221	* 2. Redistributions in binary form must reproduce the above copyright notice,
elmot	1:d0dfbce63a89	222	* this list of conditions and the following disclaimer in the documentation
elmot	1:d0dfbce63a89	223	* and/or other materials provided with the distribution.
elmot	1:d0dfbce63a89	224	* 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot	1:d0dfbce63a89	225	* may be used to endorse or promote products derived from this software
elmot	1:d0dfbce63a89	226	* without specific prior written permission.
elmot	1:d0dfbce63a89	227	*
elmot	1:d0dfbce63a89	228	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot	1:d0dfbce63a89	229	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot	1:d0dfbce63a89	230	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot	1:d0dfbce63a89	231	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot	1:d0dfbce63a89	232	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot	1:d0dfbce63a89	233	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot	1:d0dfbce63a89	234	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot	1:d0dfbce63a89	235	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot	1:d0dfbce63a89	236	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot	1:d0dfbce63a89	237	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot	1:d0dfbce63a89	238	*
elmot	1:d0dfbce63a89	239	******************************************************************************
elmot	1:d0dfbce63a89	240	*/
elmot	1:d0dfbce63a89	241
elmot	1:d0dfbce63a89	242	/* Includes ------------------------------------------------------------------*/
elmot	1:d0dfbce63a89	243	#include "stm32l4xx_hal.h"
elmot	1:d0dfbce63a89	244
elmot	1:d0dfbce63a89	245	/** @addtogroup STM32L4xx_HAL_Driver
elmot	1:d0dfbce63a89	246	* @{
elmot	1:d0dfbce63a89	247	*/
elmot	1:d0dfbce63a89	248
elmot	1:d0dfbce63a89	249	/** @defgroup I2C I2C
elmot	1:d0dfbce63a89	250	* @brief I2C HAL module driver
elmot	1:d0dfbce63a89	251	* @{
elmot	1:d0dfbce63a89	252	*/
elmot	1:d0dfbce63a89	253
elmot	1:d0dfbce63a89	254	#ifdef HAL_I2C_MODULE_ENABLED
elmot	1:d0dfbce63a89	255
elmot	1:d0dfbce63a89	256	/* Private typedef -----------------------------------------------------------*/
elmot	1:d0dfbce63a89	257	/* Private define ------------------------------------------------------------*/
elmot	1:d0dfbce63a89	258
elmot	1:d0dfbce63a89	259	/** @defgroup I2C_Private_Define I2C Private Define
elmot	1:d0dfbce63a89	260	* @{
elmot	1:d0dfbce63a89	261	*/
elmot	1:d0dfbce63a89	262	#define TIMING_CLEAR_MASK (0xF0FFFFFFU) /!< I2C TIMING clear register Mask /
elmot	1:d0dfbce63a89	263	#define I2C_TIMEOUT_ADDR (10000U) /!< 10 s /
elmot	1:d0dfbce63a89	264	#define I2C_TIMEOUT_BUSY (25U) /!< 25 ms /
elmot	1:d0dfbce63a89	265	#define I2C_TIMEOUT_DIR (25U) /!< 25 ms /
elmot	1:d0dfbce63a89	266	#define I2C_TIMEOUT_RXNE (25U) /!< 25 ms /
elmot	1:d0dfbce63a89	267	#define I2C_TIMEOUT_STOPF (25U) /!< 25 ms /
elmot	1:d0dfbce63a89	268	#define I2C_TIMEOUT_TC (25U) /!< 25 ms /
elmot	1:d0dfbce63a89	269	#define I2C_TIMEOUT_TCR (25U) /!< 25 ms /
elmot	1:d0dfbce63a89	270	#define I2C_TIMEOUT_TXIS (25U) /!< 25 ms /
elmot	1:d0dfbce63a89	271	#define I2C_TIMEOUT_FLAG (25U) /!< 25 ms /
elmot	1:d0dfbce63a89	272
elmot	1:d0dfbce63a89	273	#define MAX_NBYTE_SIZE 255U
elmot	1:d0dfbce63a89	274	#define SlaveAddr_SHIFT 7U
elmot	1:d0dfbce63a89	275	#define SlaveAddr_MSK 0x06U
elmot	1:d0dfbce63a89	276
elmot	1:d0dfbce63a89	277	/* Private define for @ref PreviousState usage */
elmot	1:d0dfbce63a89	278	#define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX \| HAL_I2C_STATE_BUSY_RX) & (uint32_t)(~HAL_I2C_STATE_READY))) /!< Mask State define, keep only RX and TX bits /
elmot	1:d0dfbce63a89	279	#define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /!< Default Value /
elmot	1:d0dfbce63a89	280	#define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) \| HAL_I2C_MODE_MASTER)) /!< Master Busy TX, combinaison of State LSB and Mode enum /
elmot	1:d0dfbce63a89	281	#define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) \| HAL_I2C_MODE_MASTER)) /!< Master Busy RX, combinaison of State LSB and Mode enum /
elmot	1:d0dfbce63a89	282	#define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) \| HAL_I2C_MODE_SLAVE)) /!< Slave Busy TX, combinaison of State LSB and Mode enum /
elmot	1:d0dfbce63a89	283	#define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) \| HAL_I2C_MODE_SLAVE)) /!< Slave Busy RX, combinaison of State LSB and Mode enum /
elmot	1:d0dfbce63a89	284	#define I2C_STATE_MEM_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) \| HAL_I2C_MODE_MEM)) /!< Memory Busy TX, combinaison of State LSB and Mode enum /
elmot	1:d0dfbce63a89	285	#define I2C_STATE_MEM_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) \| HAL_I2C_MODE_MEM)) /!< Memory Busy RX, combinaison of State LSB and Mode enum /
elmot	1:d0dfbce63a89	286
elmot	1:d0dfbce63a89	287
elmot	1:d0dfbce63a89	288	/* Private define to centralize the enable/disable of Interrupts */
elmot	1:d0dfbce63a89	289	#define I2C_XFER_TX_IT (0x00000001U)
elmot	1:d0dfbce63a89	290	#define I2C_XFER_RX_IT (0x00000002U)
elmot	1:d0dfbce63a89	291	#define I2C_XFER_LISTEN_IT (0x00000004U)
elmot	1:d0dfbce63a89	292
elmot	1:d0dfbce63a89	293	#define I2C_XFER_ERROR_IT (0x00000011U)
elmot	1:d0dfbce63a89	294	#define I2C_XFER_CPLT_IT (0x00000012U)
elmot	1:d0dfbce63a89	295	#define I2C_XFER_RELOAD_IT (0x00000012U)
elmot	1:d0dfbce63a89	296	/**
elmot	1:d0dfbce63a89	297	* @}
elmot	1:d0dfbce63a89	298	*/
elmot	1:d0dfbce63a89	299
elmot	1:d0dfbce63a89	300	/* Private macro -------------------------------------------------------------*/
elmot	1:d0dfbce63a89	301	#define I2C_GET_DMA_REMAIN_DATA(__HANDLE__) ((((__HANDLE__)->State) == HAL_I2C_STATE_BUSY_TX) ? \
elmot	1:d0dfbce63a89	302	((uint32_t)((__HANDLE__)->hdmatx->Instance->CNDTR)) : \
elmot	1:d0dfbce63a89	303	((uint32_t)((__HANDLE__)->hdmarx->Instance->CNDTR)))
elmot	1:d0dfbce63a89	304
elmot	1:d0dfbce63a89	305	/* Private variables ---------------------------------------------------------*/
elmot	1:d0dfbce63a89	306	/* Private function prototypes -----------------------------------------------*/
elmot	1:d0dfbce63a89	307
elmot	1:d0dfbce63a89	308	/** @defgroup I2C_Private_Functions I2C Private Functions
elmot	1:d0dfbce63a89	309	* @{
elmot	1:d0dfbce63a89	310	*/
elmot	1:d0dfbce63a89	311	/* Private functions to handle DMA transfer */
elmot	1:d0dfbce63a89	312	static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
elmot	1:d0dfbce63a89	313	static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
elmot	1:d0dfbce63a89	314	static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
elmot	1:d0dfbce63a89	315	static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
elmot	1:d0dfbce63a89	316	static void I2C_DMAError(DMA_HandleTypeDef *hdma);
elmot	1:d0dfbce63a89	317	static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
elmot	1:d0dfbce63a89	318
elmot	1:d0dfbce63a89	319	/* Private functions to handle IT transfer */
elmot	1:d0dfbce63a89	320	static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
elmot	1:d0dfbce63a89	321	static void I2C_ITMasterSequentialCplt(I2C_HandleTypeDef *hi2c);
elmot	1:d0dfbce63a89	322	static void I2C_ITSlaveSequentialCplt(I2C_HandleTypeDef *hi2c);
elmot	1:d0dfbce63a89	323	static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
elmot	1:d0dfbce63a89	324	static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
elmot	1:d0dfbce63a89	325	static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
elmot	1:d0dfbce63a89	326	static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode);
elmot	1:d0dfbce63a89	327
elmot	1:d0dfbce63a89	328	/* Private functions to handle IT transfer */
elmot	1:d0dfbce63a89	329	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
elmot	1:d0dfbce63a89	330	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
elmot	1:d0dfbce63a89	331
elmot	1:d0dfbce63a89	332	/* Private functions for I2C transfer IRQ handler */
elmot	1:d0dfbce63a89	333	static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
elmot	1:d0dfbce63a89	334	static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
elmot	1:d0dfbce63a89	335	static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
elmot	1:d0dfbce63a89	336	static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
elmot	1:d0dfbce63a89	337
elmot	1:d0dfbce63a89	338	/* Private functions to handle flags during polling transfer */
elmot	1:d0dfbce63a89	339	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
elmot	1:d0dfbce63a89	340	static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
elmot	1:d0dfbce63a89	341	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
elmot	1:d0dfbce63a89	342	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
elmot	1:d0dfbce63a89	343	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
elmot	1:d0dfbce63a89	344
elmot	1:d0dfbce63a89	345	/* Private functions to centralize the enable/disable of Interrupts */
elmot	1:d0dfbce63a89	346	static HAL_StatusTypeDef I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest);
elmot	1:d0dfbce63a89	347	static HAL_StatusTypeDef I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest);
elmot	1:d0dfbce63a89	348
elmot	1:d0dfbce63a89	349	/* Private functions to flush TXDR register */
elmot	1:d0dfbce63a89	350	static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c);
elmot	1:d0dfbce63a89	351
elmot	1:d0dfbce63a89	352	/* Private functions to handle start, restart or stop a transfer */
elmot	1:d0dfbce63a89	353	static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
elmot	1:d0dfbce63a89	354	/**
elmot	1:d0dfbce63a89	355	* @}
elmot	1:d0dfbce63a89	356	*/
elmot	1:d0dfbce63a89	357
elmot	1:d0dfbce63a89	358	/* Exported functions --------------------------------------------------------*/
elmot	1:d0dfbce63a89	359
elmot	1:d0dfbce63a89	360	/** @defgroup I2C_Exported_Functions I2C Exported Functions
elmot	1:d0dfbce63a89	361	* @{
elmot	1:d0dfbce63a89	362	*/
elmot	1:d0dfbce63a89	363
elmot	1:d0dfbce63a89	364	/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
elmot	1:d0dfbce63a89	365	* @brief Initialization and Configuration functions
elmot	1:d0dfbce63a89	366	*
elmot	1:d0dfbce63a89	367	@verbatim
elmot	1:d0dfbce63a89	368	===============================================================================
elmot	1:d0dfbce63a89	369	##### Initialization and de-initialization functions #####
elmot	1:d0dfbce63a89	370	===============================================================================
elmot	1:d0dfbce63a89	371	[..] This subsection provides a set of functions allowing to initialize and
elmot	1:d0dfbce63a89	372	deinitialize the I2Cx peripheral:
elmot	1:d0dfbce63a89	373
elmot	1:d0dfbce63a89	374	(+) User must Implement HAL_I2C_MspInit() function in which he configures
elmot	1:d0dfbce63a89	375	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
elmot	1:d0dfbce63a89	376
elmot	1:d0dfbce63a89	377	(+) Call the function HAL_I2C_Init() to configure the selected device with
elmot	1:d0dfbce63a89	378	the selected configuration:
elmot	1:d0dfbce63a89	379	(++) Clock Timing
elmot	1:d0dfbce63a89	380	(++) Own Address 1
elmot	1:d0dfbce63a89	381	(++) Addressing mode (Master, Slave)
elmot	1:d0dfbce63a89	382	(++) Dual Addressing mode
elmot	1:d0dfbce63a89	383	(++) Own Address 2
elmot	1:d0dfbce63a89	384	(++) Own Address 2 Mask
elmot	1:d0dfbce63a89	385	(++) General call mode
elmot	1:d0dfbce63a89	386	(++) Nostretch mode
elmot	1:d0dfbce63a89	387
elmot	1:d0dfbce63a89	388	(+) Call the function HAL_I2C_DeInit() to restore the default configuration
elmot	1:d0dfbce63a89	389	of the selected I2Cx peripheral.
elmot	1:d0dfbce63a89	390
elmot	1:d0dfbce63a89	391	@endverbatim
elmot	1:d0dfbce63a89	392	* @{
elmot	1:d0dfbce63a89	393	*/
elmot	1:d0dfbce63a89	394
elmot	1:d0dfbce63a89	395	/**
elmot	1:d0dfbce63a89	396	* @brief Initializes the I2C according to the specified parameters
elmot	1:d0dfbce63a89	397	* in the I2C_InitTypeDef and initialize the associated handle.
elmot	1:d0dfbce63a89	398	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	399	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	400	* @retval HAL status
elmot	1:d0dfbce63a89	401	*/
elmot	1:d0dfbce63a89	402	HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	403	{
elmot	1:d0dfbce63a89	404	/* Check the I2C handle allocation */
elmot	1:d0dfbce63a89	405	if(hi2c == NULL)
elmot	1:d0dfbce63a89	406	{
elmot	1:d0dfbce63a89	407	return HAL_ERROR;
elmot	1:d0dfbce63a89	408	}
elmot	1:d0dfbce63a89	409
elmot	1:d0dfbce63a89	410	/* Check the parameters */
elmot	1:d0dfbce63a89	411	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
elmot	1:d0dfbce63a89	412	assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
elmot	1:d0dfbce63a89	413	assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
elmot	1:d0dfbce63a89	414	assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
elmot	1:d0dfbce63a89	415	assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
elmot	1:d0dfbce63a89	416	assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks));
elmot	1:d0dfbce63a89	417	assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
elmot	1:d0dfbce63a89	418	assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
elmot	1:d0dfbce63a89	419
elmot	1:d0dfbce63a89	420	if(hi2c->State == HAL_I2C_STATE_RESET)
elmot	1:d0dfbce63a89	421	{
elmot	1:d0dfbce63a89	422	/* Allocate lock resource and initialize it */
elmot	1:d0dfbce63a89	423	hi2c->Lock = HAL_UNLOCKED;
elmot	1:d0dfbce63a89	424
elmot	1:d0dfbce63a89	425	/* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
elmot	1:d0dfbce63a89	426	HAL_I2C_MspInit(hi2c);
elmot	1:d0dfbce63a89	427	}
elmot	1:d0dfbce63a89	428
elmot	1:d0dfbce63a89	429	hi2c->State = HAL_I2C_STATE_BUSY;
elmot	1:d0dfbce63a89	430
elmot	1:d0dfbce63a89	431	/* Disable the selected I2C peripheral */
elmot	1:d0dfbce63a89	432	__HAL_I2C_DISABLE(hi2c);
elmot	1:d0dfbce63a89	433
elmot	1:d0dfbce63a89	434	/---------------------------- I2Cx TIMINGR Configuration ------------------/
elmot	1:d0dfbce63a89	435	/* Configure I2Cx: Frequency range */
elmot	1:d0dfbce63a89	436	hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK;
elmot	1:d0dfbce63a89	437
elmot	1:d0dfbce63a89	438	/---------------------------- I2Cx OAR1 Configuration ---------------------/
elmot	1:d0dfbce63a89	439	/* Configure I2Cx: Own Address1 and ack own address1 mode */
elmot	1:d0dfbce63a89	440	hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
elmot	1:d0dfbce63a89	441	if(hi2c->Init.OwnAddress1 != 0U)
elmot	1:d0dfbce63a89	442	{
elmot	1:d0dfbce63a89	443	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
elmot	1:d0dfbce63a89	444	{
elmot	1:d0dfbce63a89	445	hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN \| hi2c->Init.OwnAddress1);
elmot	1:d0dfbce63a89	446	}
elmot	1:d0dfbce63a89	447	else /* I2C_ADDRESSINGMODE_10BIT */
elmot	1:d0dfbce63a89	448	{
elmot	1:d0dfbce63a89	449	hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN \| I2C_OAR1_OA1MODE \| hi2c->Init.OwnAddress1);
elmot	1:d0dfbce63a89	450	}
elmot	1:d0dfbce63a89	451	}
elmot	1:d0dfbce63a89	452
elmot	1:d0dfbce63a89	453	/---------------------------- I2Cx CR2 Configuration ----------------------/
elmot	1:d0dfbce63a89	454	/* Configure I2Cx: Addressing Master mode */
elmot	1:d0dfbce63a89	455	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
elmot	1:d0dfbce63a89	456	{
elmot	1:d0dfbce63a89	457	hi2c->Instance->CR2 = (I2C_CR2_ADD10);
elmot	1:d0dfbce63a89	458	}
elmot	1:d0dfbce63a89	459	/* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */
elmot	1:d0dfbce63a89	460	hi2c->Instance->CR2 \|= (I2C_CR2_AUTOEND \| I2C_CR2_NACK);
elmot	1:d0dfbce63a89	461
elmot	1:d0dfbce63a89	462	/---------------------------- I2Cx OAR2 Configuration ---------------------/
elmot	1:d0dfbce63a89	463	/* Configure I2Cx: Dual mode and Own Address2 */
elmot	1:d0dfbce63a89	464	hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode \| hi2c->Init.OwnAddress2 \| (hi2c->Init.OwnAddress2Masks << 8));
elmot	1:d0dfbce63a89	465
elmot	1:d0dfbce63a89	466	/---------------------------- I2Cx CR1 Configuration ----------------------/
elmot	1:d0dfbce63a89	467	/* Configure I2Cx: Generalcall and NoStretch mode */
elmot	1:d0dfbce63a89	468	hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode \| hi2c->Init.NoStretchMode);
elmot	1:d0dfbce63a89	469
elmot	1:d0dfbce63a89	470	/* Enable the selected I2C peripheral */
elmot	1:d0dfbce63a89	471	__HAL_I2C_ENABLE(hi2c);
elmot	1:d0dfbce63a89	472
elmot	1:d0dfbce63a89	473	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	474	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	475	hi2c->PreviousState = I2C_STATE_NONE;
elmot	1:d0dfbce63a89	476	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	477
elmot	1:d0dfbce63a89	478	return HAL_OK;
elmot	1:d0dfbce63a89	479	}
elmot	1:d0dfbce63a89	480
elmot	1:d0dfbce63a89	481	/**
elmot	1:d0dfbce63a89	482	* @brief DeInitialize the I2C peripheral.
elmot	1:d0dfbce63a89	483	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	484	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	485	* @retval HAL status
elmot	1:d0dfbce63a89	486	*/
elmot	1:d0dfbce63a89	487	HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	488	{
elmot	1:d0dfbce63a89	489	/* Check the I2C handle allocation */
elmot	1:d0dfbce63a89	490	if(hi2c == NULL)
elmot	1:d0dfbce63a89	491	{
elmot	1:d0dfbce63a89	492	return HAL_ERROR;
elmot	1:d0dfbce63a89	493	}
elmot	1:d0dfbce63a89	494
elmot	1:d0dfbce63a89	495	/* Check the parameters */
elmot	1:d0dfbce63a89	496	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
elmot	1:d0dfbce63a89	497
elmot	1:d0dfbce63a89	498	hi2c->State = HAL_I2C_STATE_BUSY;
elmot	1:d0dfbce63a89	499
elmot	1:d0dfbce63a89	500	/* Disable the I2C Peripheral Clock */
elmot	1:d0dfbce63a89	501	__HAL_I2C_DISABLE(hi2c);
elmot	1:d0dfbce63a89	502
elmot	1:d0dfbce63a89	503	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
elmot	1:d0dfbce63a89	504	HAL_I2C_MspDeInit(hi2c);
elmot	1:d0dfbce63a89	505
elmot	1:d0dfbce63a89	506	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	507	hi2c->State = HAL_I2C_STATE_RESET;
elmot	1:d0dfbce63a89	508	hi2c->PreviousState = I2C_STATE_NONE;
elmot	1:d0dfbce63a89	509	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	510
elmot	1:d0dfbce63a89	511	/* Release Lock */
elmot	1:d0dfbce63a89	512	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	513
elmot	1:d0dfbce63a89	514	return HAL_OK;
elmot	1:d0dfbce63a89	515	}
elmot	1:d0dfbce63a89	516
elmot	1:d0dfbce63a89	517	/**
elmot	1:d0dfbce63a89	518	* @brief Initialize the I2C MSP.
elmot	1:d0dfbce63a89	519	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	520	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	521	* @retval None
elmot	1:d0dfbce63a89	522	*/
elmot	1:d0dfbce63a89	523	__weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	524	{
elmot	1:d0dfbce63a89	525	/* Prevent unused argument(s) compilation warning */
elmot	1:d0dfbce63a89	526	UNUSED(hi2c);
elmot	1:d0dfbce63a89	527
elmot	1:d0dfbce63a89	528	/* NOTE : This function should not be modified, when the callback is needed,
elmot	1:d0dfbce63a89	529	the HAL_I2C_MspInit could be implemented in the user file
elmot	1:d0dfbce63a89	530	*/
elmot	1:d0dfbce63a89	531	}
elmot	1:d0dfbce63a89	532
elmot	1:d0dfbce63a89	533	/**
elmot	1:d0dfbce63a89	534	* @brief DeInitialize the I2C MSP.
elmot	1:d0dfbce63a89	535	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	536	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	537	* @retval None
elmot	1:d0dfbce63a89	538	*/
elmot	1:d0dfbce63a89	539	__weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	540	{
elmot	1:d0dfbce63a89	541	/* Prevent unused argument(s) compilation warning */
elmot	1:d0dfbce63a89	542	UNUSED(hi2c);
elmot	1:d0dfbce63a89	543
elmot	1:d0dfbce63a89	544	/* NOTE : This function should not be modified, when the callback is needed,
elmot	1:d0dfbce63a89	545	the HAL_I2C_MspDeInit could be implemented in the user file
elmot	1:d0dfbce63a89	546	*/
elmot	1:d0dfbce63a89	547	}
elmot	1:d0dfbce63a89	548
elmot	1:d0dfbce63a89	549	/**
elmot	1:d0dfbce63a89	550	* @}
elmot	1:d0dfbce63a89	551	*/
elmot	1:d0dfbce63a89	552
elmot	1:d0dfbce63a89	553	/** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
elmot	1:d0dfbce63a89	554	* @brief Data transfers functions
elmot	1:d0dfbce63a89	555	*
elmot	1:d0dfbce63a89	556	@verbatim
elmot	1:d0dfbce63a89	557	===============================================================================
elmot	1:d0dfbce63a89	558	##### IO operation functions #####
elmot	1:d0dfbce63a89	559	===============================================================================
elmot	1:d0dfbce63a89	560	[..]
elmot	1:d0dfbce63a89	561	This subsection provides a set of functions allowing to manage the I2C data
elmot	1:d0dfbce63a89	562	transfers.
elmot	1:d0dfbce63a89	563
elmot	1:d0dfbce63a89	564	(#) There are two modes of transfer:
elmot	1:d0dfbce63a89	565	(++) Blocking mode : The communication is performed in the polling mode.
elmot	1:d0dfbce63a89	566	The status of all data processing is returned by the same function
elmot	1:d0dfbce63a89	567	after finishing transfer.
elmot	1:d0dfbce63a89	568	(++) No-Blocking mode : The communication is performed using Interrupts
elmot	1:d0dfbce63a89	569	or DMA. These functions return the status of the transfer startup.
elmot	1:d0dfbce63a89	570	The end of the data processing will be indicated through the
elmot	1:d0dfbce63a89	571	dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
elmot	1:d0dfbce63a89	572	using DMA mode.
elmot	1:d0dfbce63a89	573
elmot	1:d0dfbce63a89	574	(#) Blocking mode functions are :
elmot	1:d0dfbce63a89	575	(++) HAL_I2C_Master_Transmit()
elmot	1:d0dfbce63a89	576	(++) HAL_I2C_Master_Receive()
elmot	1:d0dfbce63a89	577	(++) HAL_I2C_Slave_Transmit()
elmot	1:d0dfbce63a89	578	(++) HAL_I2C_Slave_Receive()
elmot	1:d0dfbce63a89	579	(++) HAL_I2C_Mem_Write()
elmot	1:d0dfbce63a89	580	(++) HAL_I2C_Mem_Read()
elmot	1:d0dfbce63a89	581	(++) HAL_I2C_IsDeviceReady()
elmot	1:d0dfbce63a89	582
elmot	1:d0dfbce63a89	583	(#) No-Blocking mode functions with Interrupt are :
elmot	1:d0dfbce63a89	584	(++) HAL_I2C_Master_Transmit_IT()
elmot	1:d0dfbce63a89	585	(++) HAL_I2C_Master_Receive_IT()
elmot	1:d0dfbce63a89	586	(++) HAL_I2C_Slave_Transmit_IT()
elmot	1:d0dfbce63a89	587	(++) HAL_I2C_Slave_Receive_IT()
elmot	1:d0dfbce63a89	588	(++) HAL_I2C_Mem_Write_IT()
elmot	1:d0dfbce63a89	589	(++) HAL_I2C_Mem_Read_IT()
elmot	1:d0dfbce63a89	590
elmot	1:d0dfbce63a89	591	(#) No-Blocking mode functions with DMA are :
elmot	1:d0dfbce63a89	592	(++) HAL_I2C_Master_Transmit_DMA()
elmot	1:d0dfbce63a89	593	(++) HAL_I2C_Master_Receive_DMA()
elmot	1:d0dfbce63a89	594	(++) HAL_I2C_Slave_Transmit_DMA()
elmot	1:d0dfbce63a89	595	(++) HAL_I2C_Slave_Receive_DMA()
elmot	1:d0dfbce63a89	596	(++) HAL_I2C_Mem_Write_DMA()
elmot	1:d0dfbce63a89	597	(++) HAL_I2C_Mem_Read_DMA()
elmot	1:d0dfbce63a89	598
elmot	1:d0dfbce63a89	599	(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
elmot	1:d0dfbce63a89	600	(++) HAL_I2C_MemTxCpltCallback()
elmot	1:d0dfbce63a89	601	(++) HAL_I2C_MemRxCpltCallback()
elmot	1:d0dfbce63a89	602	(++) HAL_I2C_MasterTxCpltCallback()
elmot	1:d0dfbce63a89	603	(++) HAL_I2C_MasterRxCpltCallback()
elmot	1:d0dfbce63a89	604	(++) HAL_I2C_SlaveTxCpltCallback()
elmot	1:d0dfbce63a89	605	(++) HAL_I2C_SlaveRxCpltCallback()
elmot	1:d0dfbce63a89	606	(++) HAL_I2C_ErrorCallback()
elmot	1:d0dfbce63a89	607
elmot	1:d0dfbce63a89	608	@endverbatim
elmot	1:d0dfbce63a89	609	* @{
elmot	1:d0dfbce63a89	610	*/
elmot	1:d0dfbce63a89	611
elmot	1:d0dfbce63a89	612	/**
elmot	1:d0dfbce63a89	613	* @brief Transmits in master mode an amount of data in blocking mode.
elmot	1:d0dfbce63a89	614	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	615	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	616	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	617	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	618	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	619	* @param Timeout Timeout duration
elmot	1:d0dfbce63a89	620	* @retval HAL status
elmot	1:d0dfbce63a89	621	*/
elmot	1:d0dfbce63a89	622	HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
elmot	1:d0dfbce63a89	623	{
elmot	1:d0dfbce63a89	624	uint32_t tickstart = 0U;
elmot	1:d0dfbce63a89	625
elmot	1:d0dfbce63a89	626	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	627	{
elmot	1:d0dfbce63a89	628	/* Process Locked */
elmot	1:d0dfbce63a89	629	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	630
elmot	1:d0dfbce63a89	631	/* Init tickstart for timeout management*/
elmot	1:d0dfbce63a89	632	tickstart = HAL_GetTick();
elmot	1:d0dfbce63a89	633
elmot	1:d0dfbce63a89	634	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	635	{
elmot	1:d0dfbce63a89	636	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	637	}
elmot	1:d0dfbce63a89	638
elmot	1:d0dfbce63a89	639	hi2c->State = HAL_I2C_STATE_BUSY_TX;
elmot	1:d0dfbce63a89	640	hi2c->Mode = HAL_I2C_MODE_MASTER;
elmot	1:d0dfbce63a89	641	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	642
elmot	1:d0dfbce63a89	643	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	644	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	645	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	646	hi2c->XferISR = NULL;
elmot	1:d0dfbce63a89	647
elmot	1:d0dfbce63a89	648	/* Send Slave Address */
elmot	1:d0dfbce63a89	649	/* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
elmot	1:d0dfbce63a89	650	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	651	{
elmot	1:d0dfbce63a89	652	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	653	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
elmot	1:d0dfbce63a89	654	}
elmot	1:d0dfbce63a89	655	else
elmot	1:d0dfbce63a89	656	{
elmot	1:d0dfbce63a89	657	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	658	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
elmot	1:d0dfbce63a89	659	}
elmot	1:d0dfbce63a89	660
elmot	1:d0dfbce63a89	661	while(hi2c->XferCount > 0U)
elmot	1:d0dfbce63a89	662	{
elmot	1:d0dfbce63a89	663	/* Wait until TXIS flag is set */
elmot	1:d0dfbce63a89	664	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	665	{
elmot	1:d0dfbce63a89	666	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	667	{
elmot	1:d0dfbce63a89	668	return HAL_ERROR;
elmot	1:d0dfbce63a89	669	}
elmot	1:d0dfbce63a89	670	else
elmot	1:d0dfbce63a89	671	{
elmot	1:d0dfbce63a89	672	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	673	}
elmot	1:d0dfbce63a89	674	}
elmot	1:d0dfbce63a89	675	/* Write data to TXDR */
elmot	1:d0dfbce63a89	676	hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
elmot	1:d0dfbce63a89	677	hi2c->XferCount--;
elmot	1:d0dfbce63a89	678	hi2c->XferSize--;
elmot	1:d0dfbce63a89	679
elmot	1:d0dfbce63a89	680	if((hi2c->XferSize == 0U) && (hi2c->XferCount!=0U))
elmot	1:d0dfbce63a89	681	{
elmot	1:d0dfbce63a89	682	/* Wait until TCR flag is set */
elmot	1:d0dfbce63a89	683	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	684	{
elmot	1:d0dfbce63a89	685	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	686	}
elmot	1:d0dfbce63a89	687
elmot	1:d0dfbce63a89	688	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	689	{
elmot	1:d0dfbce63a89	690	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	691	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	692	}
elmot	1:d0dfbce63a89	693	else
elmot	1:d0dfbce63a89	694	{
elmot	1:d0dfbce63a89	695	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	696	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	697	}
elmot	1:d0dfbce63a89	698	}
elmot	1:d0dfbce63a89	699	}
elmot	1:d0dfbce63a89	700
elmot	1:d0dfbce63a89	701	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
elmot	1:d0dfbce63a89	702	/* Wait until STOPF flag is set */
elmot	1:d0dfbce63a89	703	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	704	{
elmot	1:d0dfbce63a89	705	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	706	{
elmot	1:d0dfbce63a89	707	return HAL_ERROR;
elmot	1:d0dfbce63a89	708	}
elmot	1:d0dfbce63a89	709	else
elmot	1:d0dfbce63a89	710	{
elmot	1:d0dfbce63a89	711	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	712	}
elmot	1:d0dfbce63a89	713	}
elmot	1:d0dfbce63a89	714
elmot	1:d0dfbce63a89	715	/* Clear STOP Flag */
elmot	1:d0dfbce63a89	716	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
elmot	1:d0dfbce63a89	717
elmot	1:d0dfbce63a89	718	/* Clear Configuration Register 2 */
elmot	1:d0dfbce63a89	719	I2C_RESET_CR2(hi2c);
elmot	1:d0dfbce63a89	720
elmot	1:d0dfbce63a89	721	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	722	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	723
elmot	1:d0dfbce63a89	724	/* Process Unlocked */
elmot	1:d0dfbce63a89	725	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	726
elmot	1:d0dfbce63a89	727	return HAL_OK;
elmot	1:d0dfbce63a89	728	}
elmot	1:d0dfbce63a89	729	else
elmot	1:d0dfbce63a89	730	{
elmot	1:d0dfbce63a89	731	return HAL_BUSY;
elmot	1:d0dfbce63a89	732	}
elmot	1:d0dfbce63a89	733	}
elmot	1:d0dfbce63a89	734
elmot	1:d0dfbce63a89	735	/**
elmot	1:d0dfbce63a89	736	* @brief Receives in master mode an amount of data in blocking mode.
elmot	1:d0dfbce63a89	737	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	738	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	739	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	740	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	741	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	742	* @param Timeout Timeout duration
elmot	1:d0dfbce63a89	743	* @retval HAL status
elmot	1:d0dfbce63a89	744	*/
elmot	1:d0dfbce63a89	745	HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
elmot	1:d0dfbce63a89	746	{
elmot	1:d0dfbce63a89	747	uint32_t tickstart = 0U;
elmot	1:d0dfbce63a89	748
elmot	1:d0dfbce63a89	749	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	750	{
elmot	1:d0dfbce63a89	751	/* Process Locked */
elmot	1:d0dfbce63a89	752	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	753
elmot	1:d0dfbce63a89	754	/* Init tickstart for timeout management*/
elmot	1:d0dfbce63a89	755	tickstart = HAL_GetTick();
elmot	1:d0dfbce63a89	756
elmot	1:d0dfbce63a89	757	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	758	{
elmot	1:d0dfbce63a89	759	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	760	}
elmot	1:d0dfbce63a89	761
elmot	1:d0dfbce63a89	762	hi2c->State = HAL_I2C_STATE_BUSY_RX;
elmot	1:d0dfbce63a89	763	hi2c->Mode = HAL_I2C_MODE_MASTER;
elmot	1:d0dfbce63a89	764	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	765
elmot	1:d0dfbce63a89	766	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	767	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	768	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	769	hi2c->XferISR = NULL;
elmot	1:d0dfbce63a89	770
elmot	1:d0dfbce63a89	771	/* Send Slave Address */
elmot	1:d0dfbce63a89	772	/* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
elmot	1:d0dfbce63a89	773	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	774	{
elmot	1:d0dfbce63a89	775	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	776	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
elmot	1:d0dfbce63a89	777	}
elmot	1:d0dfbce63a89	778	else
elmot	1:d0dfbce63a89	779	{
elmot	1:d0dfbce63a89	780	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	781	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
elmot	1:d0dfbce63a89	782	}
elmot	1:d0dfbce63a89	783
elmot	1:d0dfbce63a89	784	while(hi2c->XferCount > 0U)
elmot	1:d0dfbce63a89	785	{
elmot	1:d0dfbce63a89	786	/* Wait until RXNE flag is set */
elmot	1:d0dfbce63a89	787	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	788	{
elmot	1:d0dfbce63a89	789	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	790	{
elmot	1:d0dfbce63a89	791	return HAL_ERROR;
elmot	1:d0dfbce63a89	792	}
elmot	1:d0dfbce63a89	793	else
elmot	1:d0dfbce63a89	794	{
elmot	1:d0dfbce63a89	795	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	796	}
elmot	1:d0dfbce63a89	797	}
elmot	1:d0dfbce63a89	798
elmot	1:d0dfbce63a89	799	/* Read data from RXDR */
elmot	1:d0dfbce63a89	800	(*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
elmot	1:d0dfbce63a89	801	hi2c->XferSize--;
elmot	1:d0dfbce63a89	802	hi2c->XferCount--;
elmot	1:d0dfbce63a89	803
elmot	1:d0dfbce63a89	804	if((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
elmot	1:d0dfbce63a89	805	{
elmot	1:d0dfbce63a89	806	/* Wait until TCR flag is set */
elmot	1:d0dfbce63a89	807	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	808	{
elmot	1:d0dfbce63a89	809	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	810	}
elmot	1:d0dfbce63a89	811
elmot	1:d0dfbce63a89	812	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	813	{
elmot	1:d0dfbce63a89	814	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	815	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	816	}
elmot	1:d0dfbce63a89	817	else
elmot	1:d0dfbce63a89	818	{
elmot	1:d0dfbce63a89	819	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	820	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	821	}
elmot	1:d0dfbce63a89	822	}
elmot	1:d0dfbce63a89	823	}
elmot	1:d0dfbce63a89	824
elmot	1:d0dfbce63a89	825	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
elmot	1:d0dfbce63a89	826	/* Wait until STOPF flag is set */
elmot	1:d0dfbce63a89	827	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	828	{
elmot	1:d0dfbce63a89	829	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	830	{
elmot	1:d0dfbce63a89	831	return HAL_ERROR;
elmot	1:d0dfbce63a89	832	}
elmot	1:d0dfbce63a89	833	else
elmot	1:d0dfbce63a89	834	{
elmot	1:d0dfbce63a89	835	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	836	}
elmot	1:d0dfbce63a89	837	}
elmot	1:d0dfbce63a89	838
elmot	1:d0dfbce63a89	839	/* Clear STOP Flag */
elmot	1:d0dfbce63a89	840	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
elmot	1:d0dfbce63a89	841
elmot	1:d0dfbce63a89	842	/* Clear Configuration Register 2 */
elmot	1:d0dfbce63a89	843	I2C_RESET_CR2(hi2c);
elmot	1:d0dfbce63a89	844
elmot	1:d0dfbce63a89	845	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	846	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	847
elmot	1:d0dfbce63a89	848	/* Process Unlocked */
elmot	1:d0dfbce63a89	849	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	850
elmot	1:d0dfbce63a89	851	return HAL_OK;
elmot	1:d0dfbce63a89	852	}
elmot	1:d0dfbce63a89	853	else
elmot	1:d0dfbce63a89	854	{
elmot	1:d0dfbce63a89	855	return HAL_BUSY;
elmot	1:d0dfbce63a89	856	}
elmot	1:d0dfbce63a89	857	}
elmot	1:d0dfbce63a89	858
elmot	1:d0dfbce63a89	859	/**
elmot	1:d0dfbce63a89	860	* @brief Transmits in slave mode an amount of data in blocking mode.
elmot	1:d0dfbce63a89	861	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	862	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	863	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	864	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	865	* @param Timeout Timeout duration
elmot	1:d0dfbce63a89	866	* @retval HAL status
elmot	1:d0dfbce63a89	867	*/
elmot	1:d0dfbce63a89	868	HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
elmot	1:d0dfbce63a89	869	{
elmot	1:d0dfbce63a89	870	uint32_t tickstart = 0U;
elmot	1:d0dfbce63a89	871
elmot	1:d0dfbce63a89	872	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	873	{
elmot	1:d0dfbce63a89	874	if((pData == NULL) \|\| (Size == 0U))
elmot	1:d0dfbce63a89	875	{
elmot	1:d0dfbce63a89	876	return HAL_ERROR;
elmot	1:d0dfbce63a89	877	}
elmot	1:d0dfbce63a89	878	/* Process Locked */
elmot	1:d0dfbce63a89	879	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	880
elmot	1:d0dfbce63a89	881	/* Init tickstart for timeout management*/
elmot	1:d0dfbce63a89	882	tickstart = HAL_GetTick();
elmot	1:d0dfbce63a89	883
elmot	1:d0dfbce63a89	884	hi2c->State = HAL_I2C_STATE_BUSY_TX;
elmot	1:d0dfbce63a89	885	hi2c->Mode = HAL_I2C_MODE_SLAVE;
elmot	1:d0dfbce63a89	886	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	887
elmot	1:d0dfbce63a89	888	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	889	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	890	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	891	hi2c->XferISR = NULL;
elmot	1:d0dfbce63a89	892
elmot	1:d0dfbce63a89	893	/* Enable Address Acknowledge */
elmot	1:d0dfbce63a89	894	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
elmot	1:d0dfbce63a89	895
elmot	1:d0dfbce63a89	896	/* Wait until ADDR flag is set */
elmot	1:d0dfbce63a89	897	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	898	{
elmot	1:d0dfbce63a89	899	/* Disable Address Acknowledge */
elmot	1:d0dfbce63a89	900	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	901	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	902	}
elmot	1:d0dfbce63a89	903
elmot	1:d0dfbce63a89	904	/* Clear ADDR flag */
elmot	1:d0dfbce63a89	905	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
elmot	1:d0dfbce63a89	906
elmot	1:d0dfbce63a89	907	/* If 10bit addressing mode is selected */
elmot	1:d0dfbce63a89	908	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
elmot	1:d0dfbce63a89	909	{
elmot	1:d0dfbce63a89	910	/* Wait until ADDR flag is set */
elmot	1:d0dfbce63a89	911	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	912	{
elmot	1:d0dfbce63a89	913	/* Disable Address Acknowledge */
elmot	1:d0dfbce63a89	914	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	915	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	916	}
elmot	1:d0dfbce63a89	917
elmot	1:d0dfbce63a89	918	/* Clear ADDR flag */
elmot	1:d0dfbce63a89	919	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
elmot	1:d0dfbce63a89	920	}
elmot	1:d0dfbce63a89	921
elmot	1:d0dfbce63a89	922	/* Wait until DIR flag is set Transmitter mode */
elmot	1:d0dfbce63a89	923	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	924	{
elmot	1:d0dfbce63a89	925	/* Disable Address Acknowledge */
elmot	1:d0dfbce63a89	926	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	927	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	928	}
elmot	1:d0dfbce63a89	929
elmot	1:d0dfbce63a89	930	while(hi2c->XferCount > 0U)
elmot	1:d0dfbce63a89	931	{
elmot	1:d0dfbce63a89	932	/* Wait until TXIS flag is set */
elmot	1:d0dfbce63a89	933	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	934	{
elmot	1:d0dfbce63a89	935	/* Disable Address Acknowledge */
elmot	1:d0dfbce63a89	936	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	937
elmot	1:d0dfbce63a89	938	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	939	{
elmot	1:d0dfbce63a89	940	return HAL_ERROR;
elmot	1:d0dfbce63a89	941	}
elmot	1:d0dfbce63a89	942	else
elmot	1:d0dfbce63a89	943	{
elmot	1:d0dfbce63a89	944	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	945	}
elmot	1:d0dfbce63a89	946	}
elmot	1:d0dfbce63a89	947
elmot	1:d0dfbce63a89	948	/* Write data to TXDR */
elmot	1:d0dfbce63a89	949	hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
elmot	1:d0dfbce63a89	950	hi2c->XferCount--;
elmot	1:d0dfbce63a89	951	}
elmot	1:d0dfbce63a89	952
elmot	1:d0dfbce63a89	953	/* Wait until STOP flag is set */
elmot	1:d0dfbce63a89	954	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	955	{
elmot	1:d0dfbce63a89	956	/* Disable Address Acknowledge */
elmot	1:d0dfbce63a89	957	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	958
elmot	1:d0dfbce63a89	959	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	960	{
elmot	1:d0dfbce63a89	961	/* Normal use case for Transmitter mode */
elmot	1:d0dfbce63a89	962	/* A NACK is generated to confirm the end of transfer */
elmot	1:d0dfbce63a89	963	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	964	}
elmot	1:d0dfbce63a89	965	else
elmot	1:d0dfbce63a89	966	{
elmot	1:d0dfbce63a89	967	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	968	}
elmot	1:d0dfbce63a89	969	}
elmot	1:d0dfbce63a89	970
elmot	1:d0dfbce63a89	971	/* Clear STOP flag */
elmot	1:d0dfbce63a89	972	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF);
elmot	1:d0dfbce63a89	973
elmot	1:d0dfbce63a89	974	/* Wait until BUSY flag is reset */
elmot	1:d0dfbce63a89	975	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	976	{
elmot	1:d0dfbce63a89	977	/* Disable Address Acknowledge */
elmot	1:d0dfbce63a89	978	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	979	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	980	}
elmot	1:d0dfbce63a89	981
elmot	1:d0dfbce63a89	982	/* Disable Address Acknowledge */
elmot	1:d0dfbce63a89	983	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	984
elmot	1:d0dfbce63a89	985	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	986	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	987
elmot	1:d0dfbce63a89	988	/* Process Unlocked */
elmot	1:d0dfbce63a89	989	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	990
elmot	1:d0dfbce63a89	991	return HAL_OK;
elmot	1:d0dfbce63a89	992	}
elmot	1:d0dfbce63a89	993	else
elmot	1:d0dfbce63a89	994	{
elmot	1:d0dfbce63a89	995	return HAL_BUSY;
elmot	1:d0dfbce63a89	996	}
elmot	1:d0dfbce63a89	997	}
elmot	1:d0dfbce63a89	998
elmot	1:d0dfbce63a89	999	/**
elmot	1:d0dfbce63a89	1000	* @brief Receive in slave mode an amount of data in blocking mode
elmot	1:d0dfbce63a89	1001	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	1002	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	1003	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	1004	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	1005	* @param Timeout Timeout duration
elmot	1:d0dfbce63a89	1006	* @retval HAL status
elmot	1:d0dfbce63a89	1007	*/
elmot	1:d0dfbce63a89	1008	HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
elmot	1:d0dfbce63a89	1009	{
elmot	1:d0dfbce63a89	1010	uint32_t tickstart = 0U;
elmot	1:d0dfbce63a89	1011
elmot	1:d0dfbce63a89	1012	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	1013	{
elmot	1:d0dfbce63a89	1014	if((pData == NULL) \|\| (Size == 0U))
elmot	1:d0dfbce63a89	1015	{
elmot	1:d0dfbce63a89	1016	return HAL_ERROR;
elmot	1:d0dfbce63a89	1017	}
elmot	1:d0dfbce63a89	1018	/* Process Locked */
elmot	1:d0dfbce63a89	1019	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	1020
elmot	1:d0dfbce63a89	1021	/* Init tickstart for timeout management*/
elmot	1:d0dfbce63a89	1022	tickstart = HAL_GetTick();
elmot	1:d0dfbce63a89	1023
elmot	1:d0dfbce63a89	1024	hi2c->State = HAL_I2C_STATE_BUSY_RX;
elmot	1:d0dfbce63a89	1025	hi2c->Mode = HAL_I2C_MODE_SLAVE;
elmot	1:d0dfbce63a89	1026	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	1027
elmot	1:d0dfbce63a89	1028	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	1029	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	1030	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	1031	hi2c->XferISR = NULL;
elmot	1:d0dfbce63a89	1032
elmot	1:d0dfbce63a89	1033	/* Enable Address Acknowledge */
elmot	1:d0dfbce63a89	1034	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
elmot	1:d0dfbce63a89	1035
elmot	1:d0dfbce63a89	1036	/* Wait until ADDR flag is set */
elmot	1:d0dfbce63a89	1037	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	1038	{
elmot	1:d0dfbce63a89	1039	/* Disable Address Acknowledge */
elmot	1:d0dfbce63a89	1040	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	1041	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	1042	}
elmot	1:d0dfbce63a89	1043
elmot	1:d0dfbce63a89	1044	/* Clear ADDR flag */
elmot	1:d0dfbce63a89	1045	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
elmot	1:d0dfbce63a89	1046
elmot	1:d0dfbce63a89	1047	/* Wait until DIR flag is reset Receiver mode */
elmot	1:d0dfbce63a89	1048	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	1049	{
elmot	1:d0dfbce63a89	1050	/* Disable Address Acknowledge */
elmot	1:d0dfbce63a89	1051	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	1052	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	1053	}
elmot	1:d0dfbce63a89	1054
elmot	1:d0dfbce63a89	1055	while(hi2c->XferCount > 0U)
elmot	1:d0dfbce63a89	1056	{
elmot	1:d0dfbce63a89	1057	/* Wait until RXNE flag is set */
elmot	1:d0dfbce63a89	1058	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	1059	{
elmot	1:d0dfbce63a89	1060	/* Disable Address Acknowledge */
elmot	1:d0dfbce63a89	1061	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	1062
elmot	1:d0dfbce63a89	1063	/* Store Last receive data if any */
elmot	1:d0dfbce63a89	1064	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
elmot	1:d0dfbce63a89	1065	{
elmot	1:d0dfbce63a89	1066	/* Read data from RXDR */
elmot	1:d0dfbce63a89	1067	(*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
elmot	1:d0dfbce63a89	1068	hi2c->XferCount--;
elmot	1:d0dfbce63a89	1069	}
elmot	1:d0dfbce63a89	1070
elmot	1:d0dfbce63a89	1071	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
elmot	1:d0dfbce63a89	1072	{
elmot	1:d0dfbce63a89	1073	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	1074	}
elmot	1:d0dfbce63a89	1075	else
elmot	1:d0dfbce63a89	1076	{
elmot	1:d0dfbce63a89	1077	return HAL_ERROR;
elmot	1:d0dfbce63a89	1078	}
elmot	1:d0dfbce63a89	1079	}
elmot	1:d0dfbce63a89	1080
elmot	1:d0dfbce63a89	1081	/* Read data from RXDR */
elmot	1:d0dfbce63a89	1082	(*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
elmot	1:d0dfbce63a89	1083	hi2c->XferCount--;
elmot	1:d0dfbce63a89	1084	}
elmot	1:d0dfbce63a89	1085
elmot	1:d0dfbce63a89	1086	/* Wait until STOP flag is set */
elmot	1:d0dfbce63a89	1087	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	1088	{
elmot	1:d0dfbce63a89	1089	/* Disable Address Acknowledge */
elmot	1:d0dfbce63a89	1090	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	1091
elmot	1:d0dfbce63a89	1092	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	1093	{
elmot	1:d0dfbce63a89	1094	return HAL_ERROR;
elmot	1:d0dfbce63a89	1095	}
elmot	1:d0dfbce63a89	1096	else
elmot	1:d0dfbce63a89	1097	{
elmot	1:d0dfbce63a89	1098	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	1099	}
elmot	1:d0dfbce63a89	1100	}
elmot	1:d0dfbce63a89	1101
elmot	1:d0dfbce63a89	1102	/* Clear STOP flag */
elmot	1:d0dfbce63a89	1103	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF);
elmot	1:d0dfbce63a89	1104
elmot	1:d0dfbce63a89	1105	/* Wait until BUSY flag is reset */
elmot	1:d0dfbce63a89	1106	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	1107	{
elmot	1:d0dfbce63a89	1108	/* Disable Address Acknowledge */
elmot	1:d0dfbce63a89	1109	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	1110	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	1111	}
elmot	1:d0dfbce63a89	1112
elmot	1:d0dfbce63a89	1113	/* Disable Address Acknowledge */
elmot	1:d0dfbce63a89	1114	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	1115
elmot	1:d0dfbce63a89	1116	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	1117	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	1118
elmot	1:d0dfbce63a89	1119	/* Process Unlocked */
elmot	1:d0dfbce63a89	1120	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1121
elmot	1:d0dfbce63a89	1122	return HAL_OK;
elmot	1:d0dfbce63a89	1123	}
elmot	1:d0dfbce63a89	1124	else
elmot	1:d0dfbce63a89	1125	{
elmot	1:d0dfbce63a89	1126	return HAL_BUSY;
elmot	1:d0dfbce63a89	1127	}
elmot	1:d0dfbce63a89	1128	}
elmot	1:d0dfbce63a89	1129
elmot	1:d0dfbce63a89	1130	/**
elmot	1:d0dfbce63a89	1131	* @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
elmot	1:d0dfbce63a89	1132	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	1133	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	1134	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	1135	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	1136	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	1137	* @retval HAL status
elmot	1:d0dfbce63a89	1138	*/
elmot	1:d0dfbce63a89	1139	HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
elmot	1:d0dfbce63a89	1140	{
elmot	1:d0dfbce63a89	1141	uint32_t xfermode = 0U;
elmot	1:d0dfbce63a89	1142
elmot	1:d0dfbce63a89	1143	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	1144	{
elmot	1:d0dfbce63a89	1145	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
elmot	1:d0dfbce63a89	1146	{
elmot	1:d0dfbce63a89	1147	return HAL_BUSY;
elmot	1:d0dfbce63a89	1148	}
elmot	1:d0dfbce63a89	1149
elmot	1:d0dfbce63a89	1150	/* Process Locked */
elmot	1:d0dfbce63a89	1151	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	1152
elmot	1:d0dfbce63a89	1153	hi2c->State = HAL_I2C_STATE_BUSY_TX;
elmot	1:d0dfbce63a89	1154	hi2c->Mode = HAL_I2C_MODE_MASTER;
elmot	1:d0dfbce63a89	1155	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	1156
elmot	1:d0dfbce63a89	1157	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	1158	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	1159	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	1160	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	1161	hi2c->XferISR = I2C_Master_ISR_IT;
elmot	1:d0dfbce63a89	1162
elmot	1:d0dfbce63a89	1163	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	1164	{
elmot	1:d0dfbce63a89	1165	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	1166	xfermode = I2C_RELOAD_MODE;
elmot	1:d0dfbce63a89	1167	}
elmot	1:d0dfbce63a89	1168	else
elmot	1:d0dfbce63a89	1169	{
elmot	1:d0dfbce63a89	1170	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	1171	xfermode = I2C_AUTOEND_MODE;
elmot	1:d0dfbce63a89	1172	}
elmot	1:d0dfbce63a89	1173
elmot	1:d0dfbce63a89	1174	/* Send Slave Address */
elmot	1:d0dfbce63a89	1175	/* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */
elmot	1:d0dfbce63a89	1176	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE);
elmot	1:d0dfbce63a89	1177
elmot	1:d0dfbce63a89	1178	/* Process Unlocked */
elmot	1:d0dfbce63a89	1179	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1180
elmot	1:d0dfbce63a89	1181	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	1182	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	1183	process unlock */
elmot	1:d0dfbce63a89	1184
elmot	1:d0dfbce63a89	1185	/* Enable ERR, TC, STOP, NACK, TXI interrupt */
elmot	1:d0dfbce63a89	1186	/* possible to enable all of these */
elmot	1:d0dfbce63a89	1187	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
elmot	1:d0dfbce63a89	1188	I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
elmot	1:d0dfbce63a89	1189
elmot	1:d0dfbce63a89	1190	return HAL_OK;
elmot	1:d0dfbce63a89	1191	}
elmot	1:d0dfbce63a89	1192	else
elmot	1:d0dfbce63a89	1193	{
elmot	1:d0dfbce63a89	1194	return HAL_BUSY;
elmot	1:d0dfbce63a89	1195	}
elmot	1:d0dfbce63a89	1196	}
elmot	1:d0dfbce63a89	1197
elmot	1:d0dfbce63a89	1198	/**
elmot	1:d0dfbce63a89	1199	* @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
elmot	1:d0dfbce63a89	1200	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	1201	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	1202	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	1203	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	1204	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	1205	* @retval HAL status
elmot	1:d0dfbce63a89	1206	*/
elmot	1:d0dfbce63a89	1207	HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
elmot	1:d0dfbce63a89	1208	{
elmot	1:d0dfbce63a89	1209	uint32_t xfermode = 0U;
elmot	1:d0dfbce63a89	1210
elmot	1:d0dfbce63a89	1211	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	1212	{
elmot	1:d0dfbce63a89	1213	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
elmot	1:d0dfbce63a89	1214	{
elmot	1:d0dfbce63a89	1215	return HAL_BUSY;
elmot	1:d0dfbce63a89	1216	}
elmot	1:d0dfbce63a89	1217
elmot	1:d0dfbce63a89	1218	/* Process Locked */
elmot	1:d0dfbce63a89	1219	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	1220
elmot	1:d0dfbce63a89	1221	hi2c->State = HAL_I2C_STATE_BUSY_RX;
elmot	1:d0dfbce63a89	1222	hi2c->Mode = HAL_I2C_MODE_MASTER;
elmot	1:d0dfbce63a89	1223	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	1224
elmot	1:d0dfbce63a89	1225	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	1226	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	1227	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	1228	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	1229	hi2c->XferISR = I2C_Master_ISR_IT;
elmot	1:d0dfbce63a89	1230
elmot	1:d0dfbce63a89	1231	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	1232	{
elmot	1:d0dfbce63a89	1233	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	1234	xfermode = I2C_RELOAD_MODE;
elmot	1:d0dfbce63a89	1235	}
elmot	1:d0dfbce63a89	1236	else
elmot	1:d0dfbce63a89	1237	{
elmot	1:d0dfbce63a89	1238	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	1239	xfermode = I2C_AUTOEND_MODE;
elmot	1:d0dfbce63a89	1240	}
elmot	1:d0dfbce63a89	1241
elmot	1:d0dfbce63a89	1242	/* Send Slave Address */
elmot	1:d0dfbce63a89	1243	/* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */
elmot	1:d0dfbce63a89	1244	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);
elmot	1:d0dfbce63a89	1245
elmot	1:d0dfbce63a89	1246	/* Process Unlocked */
elmot	1:d0dfbce63a89	1247	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1248
elmot	1:d0dfbce63a89	1249	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	1250	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	1251	process unlock */
elmot	1:d0dfbce63a89	1252
elmot	1:d0dfbce63a89	1253	/* Enable ERR, TC, STOP, NACK, RXI interrupt */
elmot	1:d0dfbce63a89	1254	/* possible to enable all of these */
elmot	1:d0dfbce63a89	1255	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
elmot	1:d0dfbce63a89	1256	I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);
elmot	1:d0dfbce63a89	1257
elmot	1:d0dfbce63a89	1258	return HAL_OK;
elmot	1:d0dfbce63a89	1259	}
elmot	1:d0dfbce63a89	1260	else
elmot	1:d0dfbce63a89	1261	{
elmot	1:d0dfbce63a89	1262	return HAL_BUSY;
elmot	1:d0dfbce63a89	1263	}
elmot	1:d0dfbce63a89	1264	}
elmot	1:d0dfbce63a89	1265
elmot	1:d0dfbce63a89	1266	/**
elmot	1:d0dfbce63a89	1267	* @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
elmot	1:d0dfbce63a89	1268	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	1269	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	1270	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	1271	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	1272	* @retval HAL status
elmot	1:d0dfbce63a89	1273	*/
elmot	1:d0dfbce63a89	1274	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
elmot	1:d0dfbce63a89	1275	{
elmot	1:d0dfbce63a89	1276	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	1277	{
elmot	1:d0dfbce63a89	1278	/* Process Locked */
elmot	1:d0dfbce63a89	1279	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	1280
elmot	1:d0dfbce63a89	1281	hi2c->State = HAL_I2C_STATE_BUSY_TX;
elmot	1:d0dfbce63a89	1282	hi2c->Mode = HAL_I2C_MODE_SLAVE;
elmot	1:d0dfbce63a89	1283	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	1284
elmot	1:d0dfbce63a89	1285	/* Enable Address Acknowledge */
elmot	1:d0dfbce63a89	1286	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
elmot	1:d0dfbce63a89	1287
elmot	1:d0dfbce63a89	1288	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	1289	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	1290	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	1291	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	1292	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	1293	hi2c->XferISR = I2C_Slave_ISR_IT;
elmot	1:d0dfbce63a89	1294
elmot	1:d0dfbce63a89	1295	/* Process Unlocked */
elmot	1:d0dfbce63a89	1296	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1297
elmot	1:d0dfbce63a89	1298	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	1299	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	1300	process unlock */
elmot	1:d0dfbce63a89	1301
elmot	1:d0dfbce63a89	1302	/* Enable ERR, TC, STOP, NACK, TXI interrupt */
elmot	1:d0dfbce63a89	1303	/* possible to enable all of these */
elmot	1:d0dfbce63a89	1304	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
elmot	1:d0dfbce63a89	1305	I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT \| I2C_XFER_LISTEN_IT);
elmot	1:d0dfbce63a89	1306
elmot	1:d0dfbce63a89	1307	return HAL_OK;
elmot	1:d0dfbce63a89	1308	}
elmot	1:d0dfbce63a89	1309	else
elmot	1:d0dfbce63a89	1310	{
elmot	1:d0dfbce63a89	1311	return HAL_BUSY;
elmot	1:d0dfbce63a89	1312	}
elmot	1:d0dfbce63a89	1313	}
elmot	1:d0dfbce63a89	1314
elmot	1:d0dfbce63a89	1315	/**
elmot	1:d0dfbce63a89	1316	* @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
elmot	1:d0dfbce63a89	1317	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	1318	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	1319	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	1320	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	1321	* @retval HAL status
elmot	1:d0dfbce63a89	1322	*/
elmot	1:d0dfbce63a89	1323	HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
elmot	1:d0dfbce63a89	1324	{
elmot	1:d0dfbce63a89	1325	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	1326	{
elmot	1:d0dfbce63a89	1327	/* Process Locked */
elmot	1:d0dfbce63a89	1328	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	1329
elmot	1:d0dfbce63a89	1330	hi2c->State = HAL_I2C_STATE_BUSY_RX;
elmot	1:d0dfbce63a89	1331	hi2c->Mode = HAL_I2C_MODE_SLAVE;
elmot	1:d0dfbce63a89	1332	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	1333
elmot	1:d0dfbce63a89	1334	/* Enable Address Acknowledge */
elmot	1:d0dfbce63a89	1335	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
elmot	1:d0dfbce63a89	1336
elmot	1:d0dfbce63a89	1337	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	1338	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	1339	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	1340	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	1341	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	1342	hi2c->XferISR = I2C_Slave_ISR_IT;
elmot	1:d0dfbce63a89	1343
elmot	1:d0dfbce63a89	1344	/* Process Unlocked */
elmot	1:d0dfbce63a89	1345	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1346
elmot	1:d0dfbce63a89	1347	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	1348	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	1349	process unlock */
elmot	1:d0dfbce63a89	1350
elmot	1:d0dfbce63a89	1351	/* Enable ERR, TC, STOP, NACK, RXI interrupt */
elmot	1:d0dfbce63a89	1352	/* possible to enable all of these */
elmot	1:d0dfbce63a89	1353	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
elmot	1:d0dfbce63a89	1354	I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT \| I2C_XFER_LISTEN_IT);
elmot	1:d0dfbce63a89	1355
elmot	1:d0dfbce63a89	1356	return HAL_OK;
elmot	1:d0dfbce63a89	1357	}
elmot	1:d0dfbce63a89	1358	else
elmot	1:d0dfbce63a89	1359	{
elmot	1:d0dfbce63a89	1360	return HAL_BUSY;
elmot	1:d0dfbce63a89	1361	}
elmot	1:d0dfbce63a89	1362	}
elmot	1:d0dfbce63a89	1363
elmot	1:d0dfbce63a89	1364	/**
elmot	1:d0dfbce63a89	1365	* @brief Transmit in master mode an amount of data in non-blocking mode with DMA
elmot	1:d0dfbce63a89	1366	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	1367	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	1368	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	1369	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	1370	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	1371	* @retval HAL status
elmot	1:d0dfbce63a89	1372	*/
elmot	1:d0dfbce63a89	1373	HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
elmot	1:d0dfbce63a89	1374	{
elmot	1:d0dfbce63a89	1375	uint32_t xfermode = 0U;
elmot	1:d0dfbce63a89	1376
elmot	1:d0dfbce63a89	1377	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	1378	{
elmot	1:d0dfbce63a89	1379	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
elmot	1:d0dfbce63a89	1380	{
elmot	1:d0dfbce63a89	1381	return HAL_BUSY;
elmot	1:d0dfbce63a89	1382	}
elmot	1:d0dfbce63a89	1383
elmot	1:d0dfbce63a89	1384	/* Process Locked */
elmot	1:d0dfbce63a89	1385	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	1386
elmot	1:d0dfbce63a89	1387	hi2c->State = HAL_I2C_STATE_BUSY_TX;
elmot	1:d0dfbce63a89	1388	hi2c->Mode = HAL_I2C_MODE_MASTER;
elmot	1:d0dfbce63a89	1389	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	1390
elmot	1:d0dfbce63a89	1391	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	1392	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	1393	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	1394	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	1395	hi2c->XferISR = I2C_Master_ISR_DMA;
elmot	1:d0dfbce63a89	1396
elmot	1:d0dfbce63a89	1397	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	1398	{
elmot	1:d0dfbce63a89	1399	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	1400	xfermode = I2C_RELOAD_MODE;
elmot	1:d0dfbce63a89	1401	}
elmot	1:d0dfbce63a89	1402	else
elmot	1:d0dfbce63a89	1403	{
elmot	1:d0dfbce63a89	1404	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	1405	xfermode = I2C_AUTOEND_MODE;
elmot	1:d0dfbce63a89	1406	}
elmot	1:d0dfbce63a89	1407
elmot	1:d0dfbce63a89	1408	if(hi2c->XferSize > 0U)
elmot	1:d0dfbce63a89	1409	{
elmot	1:d0dfbce63a89	1410	/* Set the I2C DMA transfer complete callback */
elmot	1:d0dfbce63a89	1411	hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
elmot	1:d0dfbce63a89	1412
elmot	1:d0dfbce63a89	1413	/* Set the DMA error callback */
elmot	1:d0dfbce63a89	1414	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
elmot	1:d0dfbce63a89	1415
elmot	1:d0dfbce63a89	1416	/* Set the unused DMA callbacks to NULL */
elmot	1:d0dfbce63a89	1417	hi2c->hdmatx->XferHalfCpltCallback = NULL;
elmot	1:d0dfbce63a89	1418	hi2c->hdmatx->XferAbortCallback = NULL;
elmot	1:d0dfbce63a89	1419
elmot	1:d0dfbce63a89	1420	/* Enable the DMA channel */
elmot	1:d0dfbce63a89	1421	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
elmot	1:d0dfbce63a89	1422
elmot	1:d0dfbce63a89	1423	/* Send Slave Address */
elmot	1:d0dfbce63a89	1424	/* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
elmot	1:d0dfbce63a89	1425	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE);
elmot	1:d0dfbce63a89	1426
elmot	1:d0dfbce63a89	1427	/* Update XferCount value */
elmot	1:d0dfbce63a89	1428	hi2c->XferCount -= hi2c->XferSize;
elmot	1:d0dfbce63a89	1429
elmot	1:d0dfbce63a89	1430	/* Process Unlocked */
elmot	1:d0dfbce63a89	1431	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1432
elmot	1:d0dfbce63a89	1433	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	1434	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	1435	process unlock */
elmot	1:d0dfbce63a89	1436	/* Enable ERR and NACK interrupts */
elmot	1:d0dfbce63a89	1437	I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);
elmot	1:d0dfbce63a89	1438
elmot	1:d0dfbce63a89	1439	/* Enable DMA Request */
elmot	1:d0dfbce63a89	1440	hi2c->Instance->CR1 \|= I2C_CR1_TXDMAEN;
elmot	1:d0dfbce63a89	1441	}
elmot	1:d0dfbce63a89	1442	else
elmot	1:d0dfbce63a89	1443	{
elmot	1:d0dfbce63a89	1444	/* Update Transfer ISR function pointer */
elmot	1:d0dfbce63a89	1445	hi2c->XferISR = I2C_Master_ISR_IT;
elmot	1:d0dfbce63a89	1446
elmot	1:d0dfbce63a89	1447	/* Send Slave Address */
elmot	1:d0dfbce63a89	1448	/* Set NBYTES to write and generate START condition */
elmot	1:d0dfbce63a89	1449	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
elmot	1:d0dfbce63a89	1450
elmot	1:d0dfbce63a89	1451	/* Process Unlocked */
elmot	1:d0dfbce63a89	1452	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1453
elmot	1:d0dfbce63a89	1454	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	1455	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	1456	process unlock */
elmot	1:d0dfbce63a89	1457	/* Enable ERR, TC, STOP, NACK, TXI interrupt */
elmot	1:d0dfbce63a89	1458	/* possible to enable all of these */
elmot	1:d0dfbce63a89	1459	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
elmot	1:d0dfbce63a89	1460	I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
elmot	1:d0dfbce63a89	1461	}
elmot	1:d0dfbce63a89	1462
elmot	1:d0dfbce63a89	1463	return HAL_OK;
elmot	1:d0dfbce63a89	1464	}
elmot	1:d0dfbce63a89	1465	else
elmot	1:d0dfbce63a89	1466	{
elmot	1:d0dfbce63a89	1467	return HAL_BUSY;
elmot	1:d0dfbce63a89	1468	}
elmot	1:d0dfbce63a89	1469	}
elmot	1:d0dfbce63a89	1470
elmot	1:d0dfbce63a89	1471	/**
elmot	1:d0dfbce63a89	1472	* @brief Receive in master mode an amount of data in non-blocking mode with DMA
elmot	1:d0dfbce63a89	1473	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	1474	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	1475	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	1476	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	1477	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	1478	* @retval HAL status
elmot	1:d0dfbce63a89	1479	*/
elmot	1:d0dfbce63a89	1480	HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
elmot	1:d0dfbce63a89	1481	{
elmot	1:d0dfbce63a89	1482	uint32_t xfermode = 0U;
elmot	1:d0dfbce63a89	1483
elmot	1:d0dfbce63a89	1484	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	1485	{
elmot	1:d0dfbce63a89	1486	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
elmot	1:d0dfbce63a89	1487	{
elmot	1:d0dfbce63a89	1488	return HAL_BUSY;
elmot	1:d0dfbce63a89	1489	}
elmot	1:d0dfbce63a89	1490
elmot	1:d0dfbce63a89	1491	/* Process Locked */
elmot	1:d0dfbce63a89	1492	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	1493
elmot	1:d0dfbce63a89	1494	hi2c->State = HAL_I2C_STATE_BUSY_RX;
elmot	1:d0dfbce63a89	1495	hi2c->Mode = HAL_I2C_MODE_MASTER;
elmot	1:d0dfbce63a89	1496	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	1497
elmot	1:d0dfbce63a89	1498	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	1499	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	1500	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	1501	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	1502	hi2c->XferISR = I2C_Master_ISR_DMA;
elmot	1:d0dfbce63a89	1503
elmot	1:d0dfbce63a89	1504	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	1505	{
elmot	1:d0dfbce63a89	1506	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	1507	xfermode = I2C_RELOAD_MODE;
elmot	1:d0dfbce63a89	1508	}
elmot	1:d0dfbce63a89	1509	else
elmot	1:d0dfbce63a89	1510	{
elmot	1:d0dfbce63a89	1511	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	1512	xfermode = I2C_AUTOEND_MODE;
elmot	1:d0dfbce63a89	1513	}
elmot	1:d0dfbce63a89	1514
elmot	1:d0dfbce63a89	1515	if(hi2c->XferSize > 0U)
elmot	1:d0dfbce63a89	1516	{
elmot	1:d0dfbce63a89	1517	/* Set the I2C DMA transfer complete callback */
elmot	1:d0dfbce63a89	1518	hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
elmot	1:d0dfbce63a89	1519
elmot	1:d0dfbce63a89	1520	/* Set the DMA error callback */
elmot	1:d0dfbce63a89	1521	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
elmot	1:d0dfbce63a89	1522
elmot	1:d0dfbce63a89	1523	/* Set the unused DMA callbacks to NULL */
elmot	1:d0dfbce63a89	1524	hi2c->hdmarx->XferHalfCpltCallback = NULL;
elmot	1:d0dfbce63a89	1525	hi2c->hdmarx->XferAbortCallback = NULL;
elmot	1:d0dfbce63a89	1526
elmot	1:d0dfbce63a89	1527	/* Enable the DMA channel */
elmot	1:d0dfbce63a89	1528	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
elmot	1:d0dfbce63a89	1529
elmot	1:d0dfbce63a89	1530	/* Send Slave Address */
elmot	1:d0dfbce63a89	1531	/* Set NBYTES to read and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
elmot	1:d0dfbce63a89	1532	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);
elmot	1:d0dfbce63a89	1533
elmot	1:d0dfbce63a89	1534	/* Update XferCount value */
elmot	1:d0dfbce63a89	1535	hi2c->XferCount -= hi2c->XferSize;
elmot	1:d0dfbce63a89	1536
elmot	1:d0dfbce63a89	1537	/* Process Unlocked */
elmot	1:d0dfbce63a89	1538	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1539
elmot	1:d0dfbce63a89	1540	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	1541	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	1542	process unlock */
elmot	1:d0dfbce63a89	1543	/* Enable ERR and NACK interrupts */
elmot	1:d0dfbce63a89	1544	I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);
elmot	1:d0dfbce63a89	1545
elmot	1:d0dfbce63a89	1546	/* Enable DMA Request */
elmot	1:d0dfbce63a89	1547	hi2c->Instance->CR1 \|= I2C_CR1_RXDMAEN;
elmot	1:d0dfbce63a89	1548	}
elmot	1:d0dfbce63a89	1549	else
elmot	1:d0dfbce63a89	1550	{
elmot	1:d0dfbce63a89	1551	/* Update Transfer ISR function pointer */
elmot	1:d0dfbce63a89	1552	hi2c->XferISR = I2C_Master_ISR_IT;
elmot	1:d0dfbce63a89	1553
elmot	1:d0dfbce63a89	1554	/* Send Slave Address */
elmot	1:d0dfbce63a89	1555	/* Set NBYTES to read and generate START condition */
elmot	1:d0dfbce63a89	1556	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
elmot	1:d0dfbce63a89	1557
elmot	1:d0dfbce63a89	1558	/* Process Unlocked */
elmot	1:d0dfbce63a89	1559	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1560
elmot	1:d0dfbce63a89	1561	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	1562	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	1563	process unlock */
elmot	1:d0dfbce63a89	1564	/* Enable ERR, TC, STOP, NACK, TXI interrupt */
elmot	1:d0dfbce63a89	1565	/* possible to enable all of these */
elmot	1:d0dfbce63a89	1566	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
elmot	1:d0dfbce63a89	1567	I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
elmot	1:d0dfbce63a89	1568	}
elmot	1:d0dfbce63a89	1569	return HAL_OK;
elmot	1:d0dfbce63a89	1570	}
elmot	1:d0dfbce63a89	1571	else
elmot	1:d0dfbce63a89	1572	{
elmot	1:d0dfbce63a89	1573	return HAL_BUSY;
elmot	1:d0dfbce63a89	1574	}
elmot	1:d0dfbce63a89	1575	}
elmot	1:d0dfbce63a89	1576
elmot	1:d0dfbce63a89	1577	/**
elmot	1:d0dfbce63a89	1578	* @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
elmot	1:d0dfbce63a89	1579	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	1580	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	1581	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	1582	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	1583	* @retval HAL status
elmot	1:d0dfbce63a89	1584	*/
elmot	1:d0dfbce63a89	1585	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
elmot	1:d0dfbce63a89	1586	{
elmot	1:d0dfbce63a89	1587	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	1588	{
elmot	1:d0dfbce63a89	1589	if((pData == NULL) \|\| (Size == 0U))
elmot	1:d0dfbce63a89	1590	{
elmot	1:d0dfbce63a89	1591	return HAL_ERROR;
elmot	1:d0dfbce63a89	1592	}
elmot	1:d0dfbce63a89	1593	/* Process Locked */
elmot	1:d0dfbce63a89	1594	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	1595
elmot	1:d0dfbce63a89	1596	hi2c->State = HAL_I2C_STATE_BUSY_TX;
elmot	1:d0dfbce63a89	1597	hi2c->Mode = HAL_I2C_MODE_SLAVE;
elmot	1:d0dfbce63a89	1598	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	1599
elmot	1:d0dfbce63a89	1600	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	1601	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	1602	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	1603	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	1604	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	1605	hi2c->XferISR = I2C_Slave_ISR_DMA;
elmot	1:d0dfbce63a89	1606
elmot	1:d0dfbce63a89	1607	/* Set the I2C DMA transfer complete callback */
elmot	1:d0dfbce63a89	1608	hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
elmot	1:d0dfbce63a89	1609
elmot	1:d0dfbce63a89	1610	/* Set the DMA error callback */
elmot	1:d0dfbce63a89	1611	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
elmot	1:d0dfbce63a89	1612
elmot	1:d0dfbce63a89	1613	/* Set the unused DMA callbacks to NULL */
elmot	1:d0dfbce63a89	1614	hi2c->hdmatx->XferHalfCpltCallback = NULL;
elmot	1:d0dfbce63a89	1615	hi2c->hdmatx->XferAbortCallback = NULL;
elmot	1:d0dfbce63a89	1616
elmot	1:d0dfbce63a89	1617	/* Enable the DMA channel */
elmot	1:d0dfbce63a89	1618	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
elmot	1:d0dfbce63a89	1619
elmot	1:d0dfbce63a89	1620	/* Enable Address Acknowledge */
elmot	1:d0dfbce63a89	1621	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
elmot	1:d0dfbce63a89	1622
elmot	1:d0dfbce63a89	1623	/* Process Unlocked */
elmot	1:d0dfbce63a89	1624	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1625
elmot	1:d0dfbce63a89	1626	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	1627	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	1628	process unlock */
elmot	1:d0dfbce63a89	1629	/* Enable ERR, STOP, NACK, ADDR interrupts */
elmot	1:d0dfbce63a89	1630	I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
elmot	1:d0dfbce63a89	1631
elmot	1:d0dfbce63a89	1632	/* Enable DMA Request */
elmot	1:d0dfbce63a89	1633	hi2c->Instance->CR1 \|= I2C_CR1_TXDMAEN;
elmot	1:d0dfbce63a89	1634
elmot	1:d0dfbce63a89	1635	return HAL_OK;
elmot	1:d0dfbce63a89	1636	}
elmot	1:d0dfbce63a89	1637	else
elmot	1:d0dfbce63a89	1638	{
elmot	1:d0dfbce63a89	1639	return HAL_BUSY;
elmot	1:d0dfbce63a89	1640	}
elmot	1:d0dfbce63a89	1641	}
elmot	1:d0dfbce63a89	1642
elmot	1:d0dfbce63a89	1643	/**
elmot	1:d0dfbce63a89	1644	* @brief Receive in slave mode an amount of data in non-blocking mode with DMA
elmot	1:d0dfbce63a89	1645	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	1646	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	1647	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	1648	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	1649	* @retval HAL status
elmot	1:d0dfbce63a89	1650	*/
elmot	1:d0dfbce63a89	1651	HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
elmot	1:d0dfbce63a89	1652	{
elmot	1:d0dfbce63a89	1653	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	1654	{
elmot	1:d0dfbce63a89	1655	if((pData == NULL) \|\| (Size == 0U))
elmot	1:d0dfbce63a89	1656	{
elmot	1:d0dfbce63a89	1657	return HAL_ERROR;
elmot	1:d0dfbce63a89	1658	}
elmot	1:d0dfbce63a89	1659	/* Process Locked */
elmot	1:d0dfbce63a89	1660	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	1661
elmot	1:d0dfbce63a89	1662	hi2c->State = HAL_I2C_STATE_BUSY_RX;
elmot	1:d0dfbce63a89	1663	hi2c->Mode = HAL_I2C_MODE_SLAVE;
elmot	1:d0dfbce63a89	1664	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	1665
elmot	1:d0dfbce63a89	1666	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	1667	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	1668	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	1669	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	1670	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	1671	hi2c->XferISR = I2C_Slave_ISR_DMA;
elmot	1:d0dfbce63a89	1672
elmot	1:d0dfbce63a89	1673	/* Set the I2C DMA transfer complete callback */
elmot	1:d0dfbce63a89	1674	hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
elmot	1:d0dfbce63a89	1675
elmot	1:d0dfbce63a89	1676	/* Set the DMA error callback */
elmot	1:d0dfbce63a89	1677	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
elmot	1:d0dfbce63a89	1678
elmot	1:d0dfbce63a89	1679	/* Set the unused DMA callbacks to NULL */
elmot	1:d0dfbce63a89	1680	hi2c->hdmarx->XferHalfCpltCallback = NULL;
elmot	1:d0dfbce63a89	1681	hi2c->hdmarx->XferAbortCallback = NULL;
elmot	1:d0dfbce63a89	1682
elmot	1:d0dfbce63a89	1683	/* Enable the DMA channel */
elmot	1:d0dfbce63a89	1684	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
elmot	1:d0dfbce63a89	1685
elmot	1:d0dfbce63a89	1686	/* Enable Address Acknowledge */
elmot	1:d0dfbce63a89	1687	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
elmot	1:d0dfbce63a89	1688
elmot	1:d0dfbce63a89	1689	/* Process Unlocked */
elmot	1:d0dfbce63a89	1690	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1691
elmot	1:d0dfbce63a89	1692	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	1693	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	1694	process unlock */
elmot	1:d0dfbce63a89	1695	/* Enable ERR, STOP, NACK, ADDR interrupts */
elmot	1:d0dfbce63a89	1696	I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
elmot	1:d0dfbce63a89	1697
elmot	1:d0dfbce63a89	1698	/* Enable DMA Request */
elmot	1:d0dfbce63a89	1699	hi2c->Instance->CR1 \|= I2C_CR1_RXDMAEN;
elmot	1:d0dfbce63a89	1700
elmot	1:d0dfbce63a89	1701	return HAL_OK;
elmot	1:d0dfbce63a89	1702	}
elmot	1:d0dfbce63a89	1703	else
elmot	1:d0dfbce63a89	1704	{
elmot	1:d0dfbce63a89	1705	return HAL_BUSY;
elmot	1:d0dfbce63a89	1706	}
elmot	1:d0dfbce63a89	1707	}
elmot	1:d0dfbce63a89	1708	/**
elmot	1:d0dfbce63a89	1709	* @brief Write an amount of data in blocking mode to a specific memory address
elmot	1:d0dfbce63a89	1710	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	1711	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	1712	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	1713	* @param MemAddress Internal memory address
elmot	1:d0dfbce63a89	1714	* @param MemAddSize Size of internal memory address
elmot	1:d0dfbce63a89	1715	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	1716	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	1717	* @param Timeout Timeout duration
elmot	1:d0dfbce63a89	1718	* @retval HAL status
elmot	1:d0dfbce63a89	1719	*/
elmot	1:d0dfbce63a89	1720	HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
elmot	1:d0dfbce63a89	1721	{
elmot	1:d0dfbce63a89	1722	uint32_t tickstart = 0U;
elmot	1:d0dfbce63a89	1723
elmot	1:d0dfbce63a89	1724	/* Check the parameters */
elmot	1:d0dfbce63a89	1725	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
elmot	1:d0dfbce63a89	1726
elmot	1:d0dfbce63a89	1727	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	1728	{
elmot	1:d0dfbce63a89	1729	if((pData == NULL) \|\| (Size == 0U))
elmot	1:d0dfbce63a89	1730	{
elmot	1:d0dfbce63a89	1731	return HAL_ERROR;
elmot	1:d0dfbce63a89	1732	}
elmot	1:d0dfbce63a89	1733
elmot	1:d0dfbce63a89	1734	/* Process Locked */
elmot	1:d0dfbce63a89	1735	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	1736
elmot	1:d0dfbce63a89	1737	/* Init tickstart for timeout management*/
elmot	1:d0dfbce63a89	1738	tickstart = HAL_GetTick();
elmot	1:d0dfbce63a89	1739
elmot	1:d0dfbce63a89	1740	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	1741	{
elmot	1:d0dfbce63a89	1742	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	1743	}
elmot	1:d0dfbce63a89	1744
elmot	1:d0dfbce63a89	1745	hi2c->State = HAL_I2C_STATE_BUSY_TX;
elmot	1:d0dfbce63a89	1746	hi2c->Mode = HAL_I2C_MODE_MEM;
elmot	1:d0dfbce63a89	1747	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	1748
elmot	1:d0dfbce63a89	1749	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	1750	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	1751	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	1752	hi2c->XferISR = NULL;
elmot	1:d0dfbce63a89	1753
elmot	1:d0dfbce63a89	1754	/* Send Slave Address and Memory Address */
elmot	1:d0dfbce63a89	1755	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	1756	{
elmot	1:d0dfbce63a89	1757	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	1758	{
elmot	1:d0dfbce63a89	1759	/* Process Unlocked */
elmot	1:d0dfbce63a89	1760	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1761	return HAL_ERROR;
elmot	1:d0dfbce63a89	1762	}
elmot	1:d0dfbce63a89	1763	else
elmot	1:d0dfbce63a89	1764	{
elmot	1:d0dfbce63a89	1765	/* Process Unlocked */
elmot	1:d0dfbce63a89	1766	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1767	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	1768	}
elmot	1:d0dfbce63a89	1769	}
elmot	1:d0dfbce63a89	1770
elmot	1:d0dfbce63a89	1771	/* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */
elmot	1:d0dfbce63a89	1772	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	1773	{
elmot	1:d0dfbce63a89	1774	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	1775	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	1776	}
elmot	1:d0dfbce63a89	1777	else
elmot	1:d0dfbce63a89	1778	{
elmot	1:d0dfbce63a89	1779	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	1780	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	1781	}
elmot	1:d0dfbce63a89	1782
elmot	1:d0dfbce63a89	1783	do
elmot	1:d0dfbce63a89	1784	{
elmot	1:d0dfbce63a89	1785	/* Wait until TXIS flag is set */
elmot	1:d0dfbce63a89	1786	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	1787	{
elmot	1:d0dfbce63a89	1788	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	1789	{
elmot	1:d0dfbce63a89	1790	return HAL_ERROR;
elmot	1:d0dfbce63a89	1791	}
elmot	1:d0dfbce63a89	1792	else
elmot	1:d0dfbce63a89	1793	{
elmot	1:d0dfbce63a89	1794	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	1795	}
elmot	1:d0dfbce63a89	1796	}
elmot	1:d0dfbce63a89	1797
elmot	1:d0dfbce63a89	1798	/* Write data to TXDR */
elmot	1:d0dfbce63a89	1799	hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
elmot	1:d0dfbce63a89	1800	hi2c->XferCount--;
elmot	1:d0dfbce63a89	1801	hi2c->XferSize--;
elmot	1:d0dfbce63a89	1802
elmot	1:d0dfbce63a89	1803	if((hi2c->XferSize == 0U) && (hi2c->XferCount!=0U))
elmot	1:d0dfbce63a89	1804	{
elmot	1:d0dfbce63a89	1805	/* Wait until TCR flag is set */
elmot	1:d0dfbce63a89	1806	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	1807	{
elmot	1:d0dfbce63a89	1808	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	1809	}
elmot	1:d0dfbce63a89	1810
elmot	1:d0dfbce63a89	1811	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	1812	{
elmot	1:d0dfbce63a89	1813	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	1814	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	1815	}
elmot	1:d0dfbce63a89	1816	else
elmot	1:d0dfbce63a89	1817	{
elmot	1:d0dfbce63a89	1818	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	1819	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	1820	}
elmot	1:d0dfbce63a89	1821	}
elmot	1:d0dfbce63a89	1822
elmot	1:d0dfbce63a89	1823	}while(hi2c->XferCount > 0U);
elmot	1:d0dfbce63a89	1824
elmot	1:d0dfbce63a89	1825	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
elmot	1:d0dfbce63a89	1826	/* Wait until STOPF flag is reset */
elmot	1:d0dfbce63a89	1827	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	1828	{
elmot	1:d0dfbce63a89	1829	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	1830	{
elmot	1:d0dfbce63a89	1831	return HAL_ERROR;
elmot	1:d0dfbce63a89	1832	}
elmot	1:d0dfbce63a89	1833	else
elmot	1:d0dfbce63a89	1834	{
elmot	1:d0dfbce63a89	1835	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	1836	}
elmot	1:d0dfbce63a89	1837	}
elmot	1:d0dfbce63a89	1838
elmot	1:d0dfbce63a89	1839	/* Clear STOP Flag */
elmot	1:d0dfbce63a89	1840	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
elmot	1:d0dfbce63a89	1841
elmot	1:d0dfbce63a89	1842	/* Clear Configuration Register 2 */
elmot	1:d0dfbce63a89	1843	I2C_RESET_CR2(hi2c);
elmot	1:d0dfbce63a89	1844
elmot	1:d0dfbce63a89	1845	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	1846	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	1847
elmot	1:d0dfbce63a89	1848	/* Process Unlocked */
elmot	1:d0dfbce63a89	1849	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1850
elmot	1:d0dfbce63a89	1851	return HAL_OK;
elmot	1:d0dfbce63a89	1852	}
elmot	1:d0dfbce63a89	1853	else
elmot	1:d0dfbce63a89	1854	{
elmot	1:d0dfbce63a89	1855	return HAL_BUSY;
elmot	1:d0dfbce63a89	1856	}
elmot	1:d0dfbce63a89	1857	}
elmot	1:d0dfbce63a89	1858
elmot	1:d0dfbce63a89	1859	/**
elmot	1:d0dfbce63a89	1860	* @brief Read an amount of data in blocking mode from a specific memory address
elmot	1:d0dfbce63a89	1861	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	1862	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	1863	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	1864	* @param MemAddress Internal memory address
elmot	1:d0dfbce63a89	1865	* @param MemAddSize Size of internal memory address
elmot	1:d0dfbce63a89	1866	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	1867	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	1868	* @param Timeout Timeout duration
elmot	1:d0dfbce63a89	1869	* @retval HAL status
elmot	1:d0dfbce63a89	1870	*/
elmot	1:d0dfbce63a89	1871	HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
elmot	1:d0dfbce63a89	1872	{
elmot	1:d0dfbce63a89	1873	uint32_t tickstart = 0U;
elmot	1:d0dfbce63a89	1874
elmot	1:d0dfbce63a89	1875	/* Check the parameters */
elmot	1:d0dfbce63a89	1876	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
elmot	1:d0dfbce63a89	1877
elmot	1:d0dfbce63a89	1878	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	1879	{
elmot	1:d0dfbce63a89	1880	if((pData == NULL) \|\| (Size == 0U))
elmot	1:d0dfbce63a89	1881	{
elmot	1:d0dfbce63a89	1882	return HAL_ERROR;
elmot	1:d0dfbce63a89	1883	}
elmot	1:d0dfbce63a89	1884
elmot	1:d0dfbce63a89	1885	/* Process Locked */
elmot	1:d0dfbce63a89	1886	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	1887
elmot	1:d0dfbce63a89	1888	/* Init tickstart for timeout management*/
elmot	1:d0dfbce63a89	1889	tickstart = HAL_GetTick();
elmot	1:d0dfbce63a89	1890
elmot	1:d0dfbce63a89	1891	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	1892	{
elmot	1:d0dfbce63a89	1893	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	1894	}
elmot	1:d0dfbce63a89	1895
elmot	1:d0dfbce63a89	1896	hi2c->State = HAL_I2C_STATE_BUSY_RX;
elmot	1:d0dfbce63a89	1897	hi2c->Mode = HAL_I2C_MODE_MEM;
elmot	1:d0dfbce63a89	1898	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	1899
elmot	1:d0dfbce63a89	1900	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	1901	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	1902	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	1903	hi2c->XferISR = NULL;
elmot	1:d0dfbce63a89	1904
elmot	1:d0dfbce63a89	1905	/* Send Slave Address and Memory Address */
elmot	1:d0dfbce63a89	1906	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	1907	{
elmot	1:d0dfbce63a89	1908	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	1909	{
elmot	1:d0dfbce63a89	1910	/* Process Unlocked */
elmot	1:d0dfbce63a89	1911	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1912	return HAL_ERROR;
elmot	1:d0dfbce63a89	1913	}
elmot	1:d0dfbce63a89	1914	else
elmot	1:d0dfbce63a89	1915	{
elmot	1:d0dfbce63a89	1916	/* Process Unlocked */
elmot	1:d0dfbce63a89	1917	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1918	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	1919	}
elmot	1:d0dfbce63a89	1920	}
elmot	1:d0dfbce63a89	1921
elmot	1:d0dfbce63a89	1922	/* Send Slave Address */
elmot	1:d0dfbce63a89	1923	/* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
elmot	1:d0dfbce63a89	1924	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	1925	{
elmot	1:d0dfbce63a89	1926	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	1927	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
elmot	1:d0dfbce63a89	1928	}
elmot	1:d0dfbce63a89	1929	else
elmot	1:d0dfbce63a89	1930	{
elmot	1:d0dfbce63a89	1931	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	1932	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
elmot	1:d0dfbce63a89	1933	}
elmot	1:d0dfbce63a89	1934
elmot	1:d0dfbce63a89	1935	do
elmot	1:d0dfbce63a89	1936	{
elmot	1:d0dfbce63a89	1937	/* Wait until RXNE flag is set */
elmot	1:d0dfbce63a89	1938	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	1939	{
elmot	1:d0dfbce63a89	1940	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	1941	}
elmot	1:d0dfbce63a89	1942
elmot	1:d0dfbce63a89	1943	/* Read data from RXDR */
elmot	1:d0dfbce63a89	1944	(*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
elmot	1:d0dfbce63a89	1945	hi2c->XferSize--;
elmot	1:d0dfbce63a89	1946	hi2c->XferCount--;
elmot	1:d0dfbce63a89	1947
elmot	1:d0dfbce63a89	1948	if((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
elmot	1:d0dfbce63a89	1949	{
elmot	1:d0dfbce63a89	1950	/* Wait until TCR flag is set */
elmot	1:d0dfbce63a89	1951	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	1952	{
elmot	1:d0dfbce63a89	1953	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	1954	}
elmot	1:d0dfbce63a89	1955
elmot	1:d0dfbce63a89	1956	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	1957	{
elmot	1:d0dfbce63a89	1958	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	1959	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	1960	}
elmot	1:d0dfbce63a89	1961	else
elmot	1:d0dfbce63a89	1962	{
elmot	1:d0dfbce63a89	1963	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	1964	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	1965	}
elmot	1:d0dfbce63a89	1966	}
elmot	1:d0dfbce63a89	1967	}while(hi2c->XferCount > 0U);
elmot	1:d0dfbce63a89	1968
elmot	1:d0dfbce63a89	1969	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
elmot	1:d0dfbce63a89	1970	/* Wait until STOPF flag is reset */
elmot	1:d0dfbce63a89	1971	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	1972	{
elmot	1:d0dfbce63a89	1973	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	1974	{
elmot	1:d0dfbce63a89	1975	return HAL_ERROR;
elmot	1:d0dfbce63a89	1976	}
elmot	1:d0dfbce63a89	1977	else
elmot	1:d0dfbce63a89	1978	{
elmot	1:d0dfbce63a89	1979	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	1980	}
elmot	1:d0dfbce63a89	1981	}
elmot	1:d0dfbce63a89	1982
elmot	1:d0dfbce63a89	1983	/* Clear STOP Flag */
elmot	1:d0dfbce63a89	1984	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
elmot	1:d0dfbce63a89	1985
elmot	1:d0dfbce63a89	1986	/* Clear Configuration Register 2 */
elmot	1:d0dfbce63a89	1987	I2C_RESET_CR2(hi2c);
elmot	1:d0dfbce63a89	1988
elmot	1:d0dfbce63a89	1989	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	1990	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	1991
elmot	1:d0dfbce63a89	1992	/* Process Unlocked */
elmot	1:d0dfbce63a89	1993	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	1994
elmot	1:d0dfbce63a89	1995	return HAL_OK;
elmot	1:d0dfbce63a89	1996	}
elmot	1:d0dfbce63a89	1997	else
elmot	1:d0dfbce63a89	1998	{
elmot	1:d0dfbce63a89	1999	return HAL_BUSY;
elmot	1:d0dfbce63a89	2000	}
elmot	1:d0dfbce63a89	2001	}
elmot	1:d0dfbce63a89	2002	/**
elmot	1:d0dfbce63a89	2003	* @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
elmot	1:d0dfbce63a89	2004	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2005	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	2006	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	2007	* @param MemAddress Internal memory address
elmot	1:d0dfbce63a89	2008	* @param MemAddSize Size of internal memory address
elmot	1:d0dfbce63a89	2009	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	2010	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	2011	* @retval HAL status
elmot	1:d0dfbce63a89	2012	*/
elmot	1:d0dfbce63a89	2013	HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
elmot	1:d0dfbce63a89	2014	{
elmot	1:d0dfbce63a89	2015	uint32_t tickstart = 0U;
elmot	1:d0dfbce63a89	2016	uint32_t xfermode = 0U;
elmot	1:d0dfbce63a89	2017
elmot	1:d0dfbce63a89	2018	/* Check the parameters */
elmot	1:d0dfbce63a89	2019	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
elmot	1:d0dfbce63a89	2020
elmot	1:d0dfbce63a89	2021	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	2022	{
elmot	1:d0dfbce63a89	2023	if((pData == NULL) \|\| (Size == 0U))
elmot	1:d0dfbce63a89	2024	{
elmot	1:d0dfbce63a89	2025	return HAL_ERROR;
elmot	1:d0dfbce63a89	2026	}
elmot	1:d0dfbce63a89	2027
elmot	1:d0dfbce63a89	2028	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
elmot	1:d0dfbce63a89	2029	{
elmot	1:d0dfbce63a89	2030	return HAL_BUSY;
elmot	1:d0dfbce63a89	2031	}
elmot	1:d0dfbce63a89	2032
elmot	1:d0dfbce63a89	2033	/* Process Locked */
elmot	1:d0dfbce63a89	2034	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	2035
elmot	1:d0dfbce63a89	2036	/* Init tickstart for timeout management*/
elmot	1:d0dfbce63a89	2037	tickstart = HAL_GetTick();
elmot	1:d0dfbce63a89	2038
elmot	1:d0dfbce63a89	2039	hi2c->State = HAL_I2C_STATE_BUSY_TX;
elmot	1:d0dfbce63a89	2040	hi2c->Mode = HAL_I2C_MODE_MEM;
elmot	1:d0dfbce63a89	2041	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	2042
elmot	1:d0dfbce63a89	2043	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	2044	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	2045	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	2046	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	2047	hi2c->XferISR = I2C_Master_ISR_IT;
elmot	1:d0dfbce63a89	2048
elmot	1:d0dfbce63a89	2049	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	2050	{
elmot	1:d0dfbce63a89	2051	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	2052	xfermode = I2C_RELOAD_MODE;
elmot	1:d0dfbce63a89	2053	}
elmot	1:d0dfbce63a89	2054	else
elmot	1:d0dfbce63a89	2055	{
elmot	1:d0dfbce63a89	2056	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	2057	xfermode = I2C_AUTOEND_MODE;
elmot	1:d0dfbce63a89	2058	}
elmot	1:d0dfbce63a89	2059
elmot	1:d0dfbce63a89	2060	/* Send Slave Address and Memory Address */
elmot	1:d0dfbce63a89	2061	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	2062	{
elmot	1:d0dfbce63a89	2063	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	2064	{
elmot	1:d0dfbce63a89	2065	/* Process Unlocked */
elmot	1:d0dfbce63a89	2066	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2067	return HAL_ERROR;
elmot	1:d0dfbce63a89	2068	}
elmot	1:d0dfbce63a89	2069	else
elmot	1:d0dfbce63a89	2070	{
elmot	1:d0dfbce63a89	2071	/* Process Unlocked */
elmot	1:d0dfbce63a89	2072	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2073	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	2074	}
elmot	1:d0dfbce63a89	2075	}
elmot	1:d0dfbce63a89	2076
elmot	1:d0dfbce63a89	2077	/* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
elmot	1:d0dfbce63a89	2078	I2C_TransferConfig(hi2c,DevAddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	2079
elmot	1:d0dfbce63a89	2080	/* Process Unlocked */
elmot	1:d0dfbce63a89	2081	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2082
elmot	1:d0dfbce63a89	2083	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	2084	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	2085	process unlock */
elmot	1:d0dfbce63a89	2086
elmot	1:d0dfbce63a89	2087	/* Enable ERR, TC, STOP, NACK, TXI interrupt */
elmot	1:d0dfbce63a89	2088	/* possible to enable all of these */
elmot	1:d0dfbce63a89	2089	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
elmot	1:d0dfbce63a89	2090	I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
elmot	1:d0dfbce63a89	2091
elmot	1:d0dfbce63a89	2092	return HAL_OK;
elmot	1:d0dfbce63a89	2093	}
elmot	1:d0dfbce63a89	2094	else
elmot	1:d0dfbce63a89	2095	{
elmot	1:d0dfbce63a89	2096	return HAL_BUSY;
elmot	1:d0dfbce63a89	2097	}
elmot	1:d0dfbce63a89	2098	}
elmot	1:d0dfbce63a89	2099
elmot	1:d0dfbce63a89	2100	/**
elmot	1:d0dfbce63a89	2101	* @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
elmot	1:d0dfbce63a89	2102	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2103	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	2104	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	2105	* @param MemAddress Internal memory address
elmot	1:d0dfbce63a89	2106	* @param MemAddSize Size of internal memory address
elmot	1:d0dfbce63a89	2107	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	2108	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	2109	* @retval HAL status
elmot	1:d0dfbce63a89	2110	*/
elmot	1:d0dfbce63a89	2111	HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
elmot	1:d0dfbce63a89	2112	{
elmot	1:d0dfbce63a89	2113	uint32_t tickstart = 0U;
elmot	1:d0dfbce63a89	2114	uint32_t xfermode = 0U;
elmot	1:d0dfbce63a89	2115
elmot	1:d0dfbce63a89	2116	/* Check the parameters */
elmot	1:d0dfbce63a89	2117	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
elmot	1:d0dfbce63a89	2118
elmot	1:d0dfbce63a89	2119	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	2120	{
elmot	1:d0dfbce63a89	2121	if((pData == NULL) \|\| (Size == 0U))
elmot	1:d0dfbce63a89	2122	{
elmot	1:d0dfbce63a89	2123	return HAL_ERROR;
elmot	1:d0dfbce63a89	2124	}
elmot	1:d0dfbce63a89	2125
elmot	1:d0dfbce63a89	2126	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
elmot	1:d0dfbce63a89	2127	{
elmot	1:d0dfbce63a89	2128	return HAL_BUSY;
elmot	1:d0dfbce63a89	2129	}
elmot	1:d0dfbce63a89	2130
elmot	1:d0dfbce63a89	2131	/* Process Locked */
elmot	1:d0dfbce63a89	2132	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	2133
elmot	1:d0dfbce63a89	2134	/* Init tickstart for timeout management*/
elmot	1:d0dfbce63a89	2135	tickstart = HAL_GetTick();
elmot	1:d0dfbce63a89	2136
elmot	1:d0dfbce63a89	2137	hi2c->State = HAL_I2C_STATE_BUSY_RX;
elmot	1:d0dfbce63a89	2138	hi2c->Mode = HAL_I2C_MODE_MEM;
elmot	1:d0dfbce63a89	2139	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	2140
elmot	1:d0dfbce63a89	2141	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	2142	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	2143	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	2144	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	2145	hi2c->XferISR = I2C_Master_ISR_IT;
elmot	1:d0dfbce63a89	2146
elmot	1:d0dfbce63a89	2147	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	2148	{
elmot	1:d0dfbce63a89	2149	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	2150	xfermode = I2C_RELOAD_MODE;
elmot	1:d0dfbce63a89	2151	}
elmot	1:d0dfbce63a89	2152	else
elmot	1:d0dfbce63a89	2153	{
elmot	1:d0dfbce63a89	2154	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	2155	xfermode = I2C_AUTOEND_MODE;
elmot	1:d0dfbce63a89	2156	}
elmot	1:d0dfbce63a89	2157
elmot	1:d0dfbce63a89	2158	/* Send Slave Address and Memory Address */
elmot	1:d0dfbce63a89	2159	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	2160	{
elmot	1:d0dfbce63a89	2161	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	2162	{
elmot	1:d0dfbce63a89	2163	/* Process Unlocked */
elmot	1:d0dfbce63a89	2164	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2165	return HAL_ERROR;
elmot	1:d0dfbce63a89	2166	}
elmot	1:d0dfbce63a89	2167	else
elmot	1:d0dfbce63a89	2168	{
elmot	1:d0dfbce63a89	2169	/* Process Unlocked */
elmot	1:d0dfbce63a89	2170	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2171	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	2172	}
elmot	1:d0dfbce63a89	2173	}
elmot	1:d0dfbce63a89	2174
elmot	1:d0dfbce63a89	2175	/* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
elmot	1:d0dfbce63a89	2176	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);
elmot	1:d0dfbce63a89	2177
elmot	1:d0dfbce63a89	2178	/* Process Unlocked */
elmot	1:d0dfbce63a89	2179	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2180
elmot	1:d0dfbce63a89	2181	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	2182	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	2183	process unlock */
elmot	1:d0dfbce63a89	2184
elmot	1:d0dfbce63a89	2185	/* Enable ERR, TC, STOP, NACK, RXI interrupt */
elmot	1:d0dfbce63a89	2186	/* possible to enable all of these */
elmot	1:d0dfbce63a89	2187	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
elmot	1:d0dfbce63a89	2188	I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);
elmot	1:d0dfbce63a89	2189
elmot	1:d0dfbce63a89	2190	return HAL_OK;
elmot	1:d0dfbce63a89	2191	}
elmot	1:d0dfbce63a89	2192	else
elmot	1:d0dfbce63a89	2193	{
elmot	1:d0dfbce63a89	2194	return HAL_BUSY;
elmot	1:d0dfbce63a89	2195	}
elmot	1:d0dfbce63a89	2196	}
elmot	1:d0dfbce63a89	2197	/**
elmot	1:d0dfbce63a89	2198	* @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
elmot	1:d0dfbce63a89	2199	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2200	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	2201	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	2202	* @param MemAddress Internal memory address
elmot	1:d0dfbce63a89	2203	* @param MemAddSize Size of internal memory address
elmot	1:d0dfbce63a89	2204	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	2205	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	2206	* @retval HAL status
elmot	1:d0dfbce63a89	2207	*/
elmot	1:d0dfbce63a89	2208	HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
elmot	1:d0dfbce63a89	2209	{
elmot	1:d0dfbce63a89	2210	uint32_t tickstart = 0U;
elmot	1:d0dfbce63a89	2211	uint32_t xfermode = 0U;
elmot	1:d0dfbce63a89	2212
elmot	1:d0dfbce63a89	2213	/* Check the parameters */
elmot	1:d0dfbce63a89	2214	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
elmot	1:d0dfbce63a89	2215
elmot	1:d0dfbce63a89	2216	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	2217	{
elmot	1:d0dfbce63a89	2218	if((pData == NULL) \|\| (Size == 0U))
elmot	1:d0dfbce63a89	2219	{
elmot	1:d0dfbce63a89	2220	return HAL_ERROR;
elmot	1:d0dfbce63a89	2221	}
elmot	1:d0dfbce63a89	2222
elmot	1:d0dfbce63a89	2223	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
elmot	1:d0dfbce63a89	2224	{
elmot	1:d0dfbce63a89	2225	return HAL_BUSY;
elmot	1:d0dfbce63a89	2226	}
elmot	1:d0dfbce63a89	2227
elmot	1:d0dfbce63a89	2228	/* Process Locked */
elmot	1:d0dfbce63a89	2229	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	2230
elmot	1:d0dfbce63a89	2231	/* Init tickstart for timeout management*/
elmot	1:d0dfbce63a89	2232	tickstart = HAL_GetTick();
elmot	1:d0dfbce63a89	2233
elmot	1:d0dfbce63a89	2234	hi2c->State = HAL_I2C_STATE_BUSY_TX;
elmot	1:d0dfbce63a89	2235	hi2c->Mode = HAL_I2C_MODE_MEM;
elmot	1:d0dfbce63a89	2236	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	2237
elmot	1:d0dfbce63a89	2238	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	2239	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	2240	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	2241	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	2242	hi2c->XferISR = I2C_Master_ISR_DMA;
elmot	1:d0dfbce63a89	2243
elmot	1:d0dfbce63a89	2244	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	2245	{
elmot	1:d0dfbce63a89	2246	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	2247	xfermode = I2C_RELOAD_MODE;
elmot	1:d0dfbce63a89	2248	}
elmot	1:d0dfbce63a89	2249	else
elmot	1:d0dfbce63a89	2250	{
elmot	1:d0dfbce63a89	2251	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	2252	xfermode = I2C_AUTOEND_MODE;
elmot	1:d0dfbce63a89	2253	}
elmot	1:d0dfbce63a89	2254
elmot	1:d0dfbce63a89	2255	/* Send Slave Address and Memory Address */
elmot	1:d0dfbce63a89	2256	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	2257	{
elmot	1:d0dfbce63a89	2258	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	2259	{
elmot	1:d0dfbce63a89	2260	/* Process Unlocked */
elmot	1:d0dfbce63a89	2261	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2262	return HAL_ERROR;
elmot	1:d0dfbce63a89	2263	}
elmot	1:d0dfbce63a89	2264	else
elmot	1:d0dfbce63a89	2265	{
elmot	1:d0dfbce63a89	2266	/* Process Unlocked */
elmot	1:d0dfbce63a89	2267	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2268	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	2269	}
elmot	1:d0dfbce63a89	2270	}
elmot	1:d0dfbce63a89	2271
elmot	1:d0dfbce63a89	2272	/* Set the I2C DMA transfer complete callback */
elmot	1:d0dfbce63a89	2273	hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
elmot	1:d0dfbce63a89	2274
elmot	1:d0dfbce63a89	2275	/* Set the DMA error callback */
elmot	1:d0dfbce63a89	2276	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
elmot	1:d0dfbce63a89	2277
elmot	1:d0dfbce63a89	2278	/* Set the unused DMA callbacks to NULL */
elmot	1:d0dfbce63a89	2279	hi2c->hdmatx->XferHalfCpltCallback = NULL;
elmot	1:d0dfbce63a89	2280	hi2c->hdmatx->XferAbortCallback = NULL;
elmot	1:d0dfbce63a89	2281
elmot	1:d0dfbce63a89	2282	/* Enable the DMA channel */
elmot	1:d0dfbce63a89	2283	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
elmot	1:d0dfbce63a89	2284
elmot	1:d0dfbce63a89	2285	/* Send Slave Address */
elmot	1:d0dfbce63a89	2286	/* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
elmot	1:d0dfbce63a89	2287	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	2288
elmot	1:d0dfbce63a89	2289	/* Update XferCount value */
elmot	1:d0dfbce63a89	2290	hi2c->XferCount -= hi2c->XferSize;
elmot	1:d0dfbce63a89	2291
elmot	1:d0dfbce63a89	2292	/* Process Unlocked */
elmot	1:d0dfbce63a89	2293	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2294
elmot	1:d0dfbce63a89	2295	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	2296	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	2297	process unlock */
elmot	1:d0dfbce63a89	2298	/* Enable ERR and NACK interrupts */
elmot	1:d0dfbce63a89	2299	I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);
elmot	1:d0dfbce63a89	2300
elmot	1:d0dfbce63a89	2301	/* Enable DMA Request */
elmot	1:d0dfbce63a89	2302	hi2c->Instance->CR1 \|= I2C_CR1_TXDMAEN;
elmot	1:d0dfbce63a89	2303
elmot	1:d0dfbce63a89	2304	return HAL_OK;
elmot	1:d0dfbce63a89	2305	}
elmot	1:d0dfbce63a89	2306	else
elmot	1:d0dfbce63a89	2307	{
elmot	1:d0dfbce63a89	2308	return HAL_BUSY;
elmot	1:d0dfbce63a89	2309	}
elmot	1:d0dfbce63a89	2310	}
elmot	1:d0dfbce63a89	2311
elmot	1:d0dfbce63a89	2312	/**
elmot	1:d0dfbce63a89	2313	* @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
elmot	1:d0dfbce63a89	2314	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2315	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	2316	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	2317	* @param MemAddress Internal memory address
elmot	1:d0dfbce63a89	2318	* @param MemAddSize Size of internal memory address
elmot	1:d0dfbce63a89	2319	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	2320	* @param Size Amount of data to be read
elmot	1:d0dfbce63a89	2321	* @retval HAL status
elmot	1:d0dfbce63a89	2322	*/
elmot	1:d0dfbce63a89	2323	HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
elmot	1:d0dfbce63a89	2324	{
elmot	1:d0dfbce63a89	2325	uint32_t tickstart = 0U;
elmot	1:d0dfbce63a89	2326	uint32_t xfermode = 0U;
elmot	1:d0dfbce63a89	2327
elmot	1:d0dfbce63a89	2328	/* Check the parameters */
elmot	1:d0dfbce63a89	2329	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
elmot	1:d0dfbce63a89	2330
elmot	1:d0dfbce63a89	2331	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	2332	{
elmot	1:d0dfbce63a89	2333	if((pData == NULL) \|\| (Size == 0U))
elmot	1:d0dfbce63a89	2334	{
elmot	1:d0dfbce63a89	2335	return HAL_ERROR;
elmot	1:d0dfbce63a89	2336	}
elmot	1:d0dfbce63a89	2337
elmot	1:d0dfbce63a89	2338	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
elmot	1:d0dfbce63a89	2339	{
elmot	1:d0dfbce63a89	2340	return HAL_BUSY;
elmot	1:d0dfbce63a89	2341	}
elmot	1:d0dfbce63a89	2342
elmot	1:d0dfbce63a89	2343	/* Process Locked */
elmot	1:d0dfbce63a89	2344	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	2345
elmot	1:d0dfbce63a89	2346	/* Init tickstart for timeout management*/
elmot	1:d0dfbce63a89	2347	tickstart = HAL_GetTick();
elmot	1:d0dfbce63a89	2348
elmot	1:d0dfbce63a89	2349	hi2c->State = HAL_I2C_STATE_BUSY_RX;
elmot	1:d0dfbce63a89	2350	hi2c->Mode = HAL_I2C_MODE_MEM;
elmot	1:d0dfbce63a89	2351	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	2352
elmot	1:d0dfbce63a89	2353	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	2354	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	2355	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	2356	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	2357	hi2c->XferISR = I2C_Master_ISR_DMA;
elmot	1:d0dfbce63a89	2358
elmot	1:d0dfbce63a89	2359	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	2360	{
elmot	1:d0dfbce63a89	2361	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	2362	xfermode = I2C_RELOAD_MODE;
elmot	1:d0dfbce63a89	2363	}
elmot	1:d0dfbce63a89	2364	else
elmot	1:d0dfbce63a89	2365	{
elmot	1:d0dfbce63a89	2366	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	2367	xfermode = I2C_AUTOEND_MODE;
elmot	1:d0dfbce63a89	2368	}
elmot	1:d0dfbce63a89	2369
elmot	1:d0dfbce63a89	2370	/* Send Slave Address and Memory Address */
elmot	1:d0dfbce63a89	2371	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	2372	{
elmot	1:d0dfbce63a89	2373	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	2374	{
elmot	1:d0dfbce63a89	2375	/* Process Unlocked */
elmot	1:d0dfbce63a89	2376	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2377	return HAL_ERROR;
elmot	1:d0dfbce63a89	2378	}
elmot	1:d0dfbce63a89	2379	else
elmot	1:d0dfbce63a89	2380	{
elmot	1:d0dfbce63a89	2381	/* Process Unlocked */
elmot	1:d0dfbce63a89	2382	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2383	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	2384	}
elmot	1:d0dfbce63a89	2385	}
elmot	1:d0dfbce63a89	2386
elmot	1:d0dfbce63a89	2387	/* Set the I2C DMA transfer complete callback */
elmot	1:d0dfbce63a89	2388	hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
elmot	1:d0dfbce63a89	2389
elmot	1:d0dfbce63a89	2390	/* Set the DMA error callback */
elmot	1:d0dfbce63a89	2391	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
elmot	1:d0dfbce63a89	2392
elmot	1:d0dfbce63a89	2393	/* Set the unused DMA callbacks to NULL */
elmot	1:d0dfbce63a89	2394	hi2c->hdmarx->XferHalfCpltCallback = NULL;
elmot	1:d0dfbce63a89	2395	hi2c->hdmarx->XferAbortCallback = NULL;
elmot	1:d0dfbce63a89	2396
elmot	1:d0dfbce63a89	2397	/* Enable the DMA channel */
elmot	1:d0dfbce63a89	2398	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
elmot	1:d0dfbce63a89	2399
elmot	1:d0dfbce63a89	2400	/* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
elmot	1:d0dfbce63a89	2401	I2C_TransferConfig(hi2c,DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);
elmot	1:d0dfbce63a89	2402
elmot	1:d0dfbce63a89	2403	/* Update XferCount value */
elmot	1:d0dfbce63a89	2404	hi2c->XferCount -= hi2c->XferSize;
elmot	1:d0dfbce63a89	2405
elmot	1:d0dfbce63a89	2406	/* Process Unlocked */
elmot	1:d0dfbce63a89	2407	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2408
elmot	1:d0dfbce63a89	2409	/* Enable DMA Request */
elmot	1:d0dfbce63a89	2410	hi2c->Instance->CR1 \|= I2C_CR1_RXDMAEN;
elmot	1:d0dfbce63a89	2411
elmot	1:d0dfbce63a89	2412	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	2413	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	2414	process unlock */
elmot	1:d0dfbce63a89	2415	/* Enable ERR and NACK interrupts */
elmot	1:d0dfbce63a89	2416	I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);
elmot	1:d0dfbce63a89	2417
elmot	1:d0dfbce63a89	2418	return HAL_OK;
elmot	1:d0dfbce63a89	2419	}
elmot	1:d0dfbce63a89	2420	else
elmot	1:d0dfbce63a89	2421	{
elmot	1:d0dfbce63a89	2422	return HAL_BUSY;
elmot	1:d0dfbce63a89	2423	}
elmot	1:d0dfbce63a89	2424	}
elmot	1:d0dfbce63a89	2425
elmot	1:d0dfbce63a89	2426	/**
elmot	1:d0dfbce63a89	2427	* @brief Checks if target device is ready for communication.
elmot	1:d0dfbce63a89	2428	* @note This function is used with Memory devices
elmot	1:d0dfbce63a89	2429	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2430	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	2431	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	2432	* @param Trials Number of trials
elmot	1:d0dfbce63a89	2433	* @param Timeout Timeout duration
elmot	1:d0dfbce63a89	2434	* @retval HAL status
elmot	1:d0dfbce63a89	2435	*/
elmot	1:d0dfbce63a89	2436	HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
elmot	1:d0dfbce63a89	2437	{
elmot	1:d0dfbce63a89	2438	uint32_t tickstart = 0U;
elmot	1:d0dfbce63a89	2439
elmot	1:d0dfbce63a89	2440	__IO uint32_t I2C_Trials = 0U;
elmot	1:d0dfbce63a89	2441
elmot	1:d0dfbce63a89	2442	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	2443	{
elmot	1:d0dfbce63a89	2444	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
elmot	1:d0dfbce63a89	2445	{
elmot	1:d0dfbce63a89	2446	return HAL_BUSY;
elmot	1:d0dfbce63a89	2447	}
elmot	1:d0dfbce63a89	2448
elmot	1:d0dfbce63a89	2449	/* Process Locked */
elmot	1:d0dfbce63a89	2450	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	2451
elmot	1:d0dfbce63a89	2452	hi2c->State = HAL_I2C_STATE_BUSY;
elmot	1:d0dfbce63a89	2453	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	2454
elmot	1:d0dfbce63a89	2455	do
elmot	1:d0dfbce63a89	2456	{
elmot	1:d0dfbce63a89	2457	/* Generate Start */
elmot	1:d0dfbce63a89	2458	hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode,DevAddress);
elmot	1:d0dfbce63a89	2459
elmot	1:d0dfbce63a89	2460	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
elmot	1:d0dfbce63a89	2461	/* Wait until STOPF flag is set or a NACK flag is set*/
elmot	1:d0dfbce63a89	2462	tickstart = HAL_GetTick();
elmot	1:d0dfbce63a89	2463	while((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) && (hi2c->State != HAL_I2C_STATE_TIMEOUT))
elmot	1:d0dfbce63a89	2464	{
elmot	1:d0dfbce63a89	2465	if(Timeout != HAL_MAX_DELAY)
elmot	1:d0dfbce63a89	2466	{
elmot	1:d0dfbce63a89	2467	if((Timeout == 0U) \|\| ((HAL_GetTick() - tickstart) > Timeout))
elmot	1:d0dfbce63a89	2468	{
elmot	1:d0dfbce63a89	2469	/* Device is ready */
elmot	1:d0dfbce63a89	2470	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	2471	/* Process Unlocked */
elmot	1:d0dfbce63a89	2472	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2473	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	2474	}
elmot	1:d0dfbce63a89	2475	}
elmot	1:d0dfbce63a89	2476	}
elmot	1:d0dfbce63a89	2477
elmot	1:d0dfbce63a89	2478	/* Check if the NACKF flag has not been set */
elmot	1:d0dfbce63a89	2479	if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET)
elmot	1:d0dfbce63a89	2480	{
elmot	1:d0dfbce63a89	2481	/* Wait until STOPF flag is reset */
elmot	1:d0dfbce63a89	2482	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	2483	{
elmot	1:d0dfbce63a89	2484	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	2485	}
elmot	1:d0dfbce63a89	2486
elmot	1:d0dfbce63a89	2487	/* Clear STOP Flag */
elmot	1:d0dfbce63a89	2488	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
elmot	1:d0dfbce63a89	2489
elmot	1:d0dfbce63a89	2490	/* Device is ready */
elmot	1:d0dfbce63a89	2491	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	2492
elmot	1:d0dfbce63a89	2493	/* Process Unlocked */
elmot	1:d0dfbce63a89	2494	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2495
elmot	1:d0dfbce63a89	2496	return HAL_OK;
elmot	1:d0dfbce63a89	2497	}
elmot	1:d0dfbce63a89	2498	else
elmot	1:d0dfbce63a89	2499	{
elmot	1:d0dfbce63a89	2500	/* Wait until STOPF flag is reset */
elmot	1:d0dfbce63a89	2501	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	2502	{
elmot	1:d0dfbce63a89	2503	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	2504	}
elmot	1:d0dfbce63a89	2505
elmot	1:d0dfbce63a89	2506	/* Clear NACK Flag */
elmot	1:d0dfbce63a89	2507	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
elmot	1:d0dfbce63a89	2508
elmot	1:d0dfbce63a89	2509	/* Clear STOP Flag, auto generated with autoend*/
elmot	1:d0dfbce63a89	2510	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
elmot	1:d0dfbce63a89	2511	}
elmot	1:d0dfbce63a89	2512
elmot	1:d0dfbce63a89	2513	/* Check if the maximum allowed number of trials has been reached */
elmot	1:d0dfbce63a89	2514	if (I2C_Trials++ == Trials)
elmot	1:d0dfbce63a89	2515	{
elmot	1:d0dfbce63a89	2516	/* Generate Stop */
elmot	1:d0dfbce63a89	2517	hi2c->Instance->CR2 \|= I2C_CR2_STOP;
elmot	1:d0dfbce63a89	2518
elmot	1:d0dfbce63a89	2519	/* Wait until STOPF flag is reset */
elmot	1:d0dfbce63a89	2520	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	2521	{
elmot	1:d0dfbce63a89	2522	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	2523	}
elmot	1:d0dfbce63a89	2524
elmot	1:d0dfbce63a89	2525	/* Clear STOP Flag */
elmot	1:d0dfbce63a89	2526	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
elmot	1:d0dfbce63a89	2527	}
elmot	1:d0dfbce63a89	2528	}while(I2C_Trials < Trials);
elmot	1:d0dfbce63a89	2529
elmot	1:d0dfbce63a89	2530	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	2531
elmot	1:d0dfbce63a89	2532	/* Process Unlocked */
elmot	1:d0dfbce63a89	2533	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2534
elmot	1:d0dfbce63a89	2535	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	2536	}
elmot	1:d0dfbce63a89	2537	else
elmot	1:d0dfbce63a89	2538	{
elmot	1:d0dfbce63a89	2539	return HAL_BUSY;
elmot	1:d0dfbce63a89	2540	}
elmot	1:d0dfbce63a89	2541	}
elmot	1:d0dfbce63a89	2542
elmot	1:d0dfbce63a89	2543	/**
elmot	1:d0dfbce63a89	2544	* @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with Interrupt.
elmot	1:d0dfbce63a89	2545	* @note This interface allow to manage repeated start condition when a direction change during transfer
elmot	1:d0dfbce63a89	2546	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2547	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	2548	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	2549	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	2550	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	2551	* @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
elmot	1:d0dfbce63a89	2552	* @retval HAL status
elmot	1:d0dfbce63a89	2553	*/
elmot	1:d0dfbce63a89	2554	HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions)
elmot	1:d0dfbce63a89	2555	{
elmot	1:d0dfbce63a89	2556	uint32_t xfermode = 0U;
elmot	1:d0dfbce63a89	2557	uint32_t xferrequest = I2C_GENERATE_START_WRITE;
elmot	1:d0dfbce63a89	2558
elmot	1:d0dfbce63a89	2559	/* Check the parameters */
elmot	1:d0dfbce63a89	2560	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
elmot	1:d0dfbce63a89	2561
elmot	1:d0dfbce63a89	2562	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	2563	{
elmot	1:d0dfbce63a89	2564	/* Process Locked */
elmot	1:d0dfbce63a89	2565	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	2566
elmot	1:d0dfbce63a89	2567	hi2c->State = HAL_I2C_STATE_BUSY_TX;
elmot	1:d0dfbce63a89	2568	hi2c->Mode = HAL_I2C_MODE_MASTER;
elmot	1:d0dfbce63a89	2569	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	2570
elmot	1:d0dfbce63a89	2571	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	2572	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	2573	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	2574	hi2c->XferOptions = (XferOptions & (~I2C_RELOAD_MODE));
elmot	1:d0dfbce63a89	2575	hi2c->XferISR = I2C_Master_ISR_IT;
elmot	1:d0dfbce63a89	2576
elmot	1:d0dfbce63a89	2577	/* If size > MAX_NBYTE_SIZE, use reload mode */
elmot	1:d0dfbce63a89	2578	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	2579	{
elmot	1:d0dfbce63a89	2580	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	2581	xfermode = I2C_RELOAD_MODE;
elmot	1:d0dfbce63a89	2582	}
elmot	1:d0dfbce63a89	2583	else
elmot	1:d0dfbce63a89	2584	{
elmot	1:d0dfbce63a89	2585	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	2586	xfermode = hi2c->XferOptions;
elmot	1:d0dfbce63a89	2587	}
elmot	1:d0dfbce63a89	2588
elmot	1:d0dfbce63a89	2589	/* Send Slave Address and set NBYTES to write */
elmot	1:d0dfbce63a89	2590	I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, xferrequest);
elmot	1:d0dfbce63a89	2591
elmot	1:d0dfbce63a89	2592	/* Process Unlocked */
elmot	1:d0dfbce63a89	2593	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2594
elmot	1:d0dfbce63a89	2595	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	2596	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	2597	process unlock */
elmot	1:d0dfbce63a89	2598	I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
elmot	1:d0dfbce63a89	2599
elmot	1:d0dfbce63a89	2600	return HAL_OK;
elmot	1:d0dfbce63a89	2601	}
elmot	1:d0dfbce63a89	2602	else
elmot	1:d0dfbce63a89	2603	{
elmot	1:d0dfbce63a89	2604	return HAL_BUSY;
elmot	1:d0dfbce63a89	2605	}
elmot	1:d0dfbce63a89	2606	}
elmot	1:d0dfbce63a89	2607
elmot	1:d0dfbce63a89	2608	/**
elmot	1:d0dfbce63a89	2609	* @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with Interrupt
elmot	1:d0dfbce63a89	2610	* @note This interface allow to manage repeated start condition when a direction change during transfer
elmot	1:d0dfbce63a89	2611	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2612	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	2613	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	2614	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	2615	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	2616	* @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
elmot	1:d0dfbce63a89	2617	* @retval HAL status
elmot	1:d0dfbce63a89	2618	*/
elmot	1:d0dfbce63a89	2619	HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions)
elmot	1:d0dfbce63a89	2620	{
elmot	1:d0dfbce63a89	2621	uint32_t xfermode = 0U;
elmot	1:d0dfbce63a89	2622	uint32_t xferrequest = I2C_GENERATE_START_READ;
elmot	1:d0dfbce63a89	2623
elmot	1:d0dfbce63a89	2624	/* Check the parameters */
elmot	1:d0dfbce63a89	2625	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
elmot	1:d0dfbce63a89	2626
elmot	1:d0dfbce63a89	2627	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	2628	{
elmot	1:d0dfbce63a89	2629	/* Process Locked */
elmot	1:d0dfbce63a89	2630	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	2631
elmot	1:d0dfbce63a89	2632	hi2c->State = HAL_I2C_STATE_BUSY_RX;
elmot	1:d0dfbce63a89	2633	hi2c->Mode = HAL_I2C_MODE_MASTER;
elmot	1:d0dfbce63a89	2634	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	2635
elmot	1:d0dfbce63a89	2636	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	2637	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	2638	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	2639	hi2c->XferOptions = (XferOptions & (~I2C_RELOAD_MODE));
elmot	1:d0dfbce63a89	2640	hi2c->XferISR = I2C_Master_ISR_IT;
elmot	1:d0dfbce63a89	2641
elmot	1:d0dfbce63a89	2642	/* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */
elmot	1:d0dfbce63a89	2643	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	2644	{
elmot	1:d0dfbce63a89	2645	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	2646	xfermode = I2C_RELOAD_MODE;
elmot	1:d0dfbce63a89	2647	}
elmot	1:d0dfbce63a89	2648	else
elmot	1:d0dfbce63a89	2649	{
elmot	1:d0dfbce63a89	2650	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	2651	xfermode = hi2c->XferOptions;
elmot	1:d0dfbce63a89	2652	}
elmot	1:d0dfbce63a89	2653
elmot	1:d0dfbce63a89	2654	/* Send Slave Address and set NBYTES to read */
elmot	1:d0dfbce63a89	2655	I2C_TransferConfig(hi2c,DevAddress, hi2c->XferSize, xfermode, xferrequest);
elmot	1:d0dfbce63a89	2656
elmot	1:d0dfbce63a89	2657	/* Process Unlocked */
elmot	1:d0dfbce63a89	2658	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2659
elmot	1:d0dfbce63a89	2660	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	2661	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	2662	process unlock */
elmot	1:d0dfbce63a89	2663	I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);
elmot	1:d0dfbce63a89	2664
elmot	1:d0dfbce63a89	2665	return HAL_OK;
elmot	1:d0dfbce63a89	2666	}
elmot	1:d0dfbce63a89	2667	else
elmot	1:d0dfbce63a89	2668	{
elmot	1:d0dfbce63a89	2669	return HAL_BUSY;
elmot	1:d0dfbce63a89	2670	}
elmot	1:d0dfbce63a89	2671	}
elmot	1:d0dfbce63a89	2672
elmot	1:d0dfbce63a89	2673	/**
elmot	1:d0dfbce63a89	2674	* @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode with Interrupt
elmot	1:d0dfbce63a89	2675	* @note This interface allow to manage repeated start condition when a direction change during transfer
elmot	1:d0dfbce63a89	2676	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2677	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	2678	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	2679	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	2680	* @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
elmot	1:d0dfbce63a89	2681	* @retval HAL status
elmot	1:d0dfbce63a89	2682	*/
elmot	1:d0dfbce63a89	2683	HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions)
elmot	1:d0dfbce63a89	2684	{
elmot	1:d0dfbce63a89	2685	/* Check the parameters */
elmot	1:d0dfbce63a89	2686	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
elmot	1:d0dfbce63a89	2687
elmot	1:d0dfbce63a89	2688	if(hi2c->State == HAL_I2C_STATE_LISTEN)
elmot	1:d0dfbce63a89	2689	{
elmot	1:d0dfbce63a89	2690	if((pData == NULL) \|\| (Size == 0U))
elmot	1:d0dfbce63a89	2691	{
elmot	1:d0dfbce63a89	2692	return HAL_ERROR;
elmot	1:d0dfbce63a89	2693	}
elmot	1:d0dfbce63a89	2694
elmot	1:d0dfbce63a89	2695	/* Disable Interrupts, to prevent preemption during treatment in case of multicall */
elmot	1:d0dfbce63a89	2696	I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT \| I2C_XFER_TX_IT);
elmot	1:d0dfbce63a89	2697
elmot	1:d0dfbce63a89	2698	/* Process Locked */
elmot	1:d0dfbce63a89	2699	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	2700
elmot	1:d0dfbce63a89	2701	hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
elmot	1:d0dfbce63a89	2702	hi2c->Mode = HAL_I2C_MODE_SLAVE;
elmot	1:d0dfbce63a89	2703	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	2704
elmot	1:d0dfbce63a89	2705	/* Enable Address Acknowledge */
elmot	1:d0dfbce63a89	2706	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
elmot	1:d0dfbce63a89	2707
elmot	1:d0dfbce63a89	2708	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	2709	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	2710	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	2711	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	2712	hi2c->XferOptions = XferOptions;
elmot	1:d0dfbce63a89	2713	hi2c->XferISR = I2C_Slave_ISR_IT;
elmot	1:d0dfbce63a89	2714
elmot	1:d0dfbce63a89	2715	if(I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE)
elmot	1:d0dfbce63a89	2716	{
elmot	1:d0dfbce63a89	2717	/* Clear ADDR flag after prepare the transfer parameters */
elmot	1:d0dfbce63a89	2718	/* This action will generate an acknowledge to the Master */
elmot	1:d0dfbce63a89	2719	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
elmot	1:d0dfbce63a89	2720	}
elmot	1:d0dfbce63a89	2721
elmot	1:d0dfbce63a89	2722	/* Process Unlocked */
elmot	1:d0dfbce63a89	2723	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2724
elmot	1:d0dfbce63a89	2725	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	2726	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	2727	process unlock */
elmot	1:d0dfbce63a89	2728	/* REnable ADDR interrupt */
elmot	1:d0dfbce63a89	2729	I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT \| I2C_XFER_LISTEN_IT);
elmot	1:d0dfbce63a89	2730
elmot	1:d0dfbce63a89	2731	return HAL_OK;
elmot	1:d0dfbce63a89	2732	}
elmot	1:d0dfbce63a89	2733	else
elmot	1:d0dfbce63a89	2734	{
elmot	1:d0dfbce63a89	2735	return HAL_ERROR;
elmot	1:d0dfbce63a89	2736	}
elmot	1:d0dfbce63a89	2737	}
elmot	1:d0dfbce63a89	2738
elmot	1:d0dfbce63a89	2739	/**
elmot	1:d0dfbce63a89	2740	* @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with Interrupt
elmot	1:d0dfbce63a89	2741	* @note This interface allow to manage repeated start condition when a direction change during transfer
elmot	1:d0dfbce63a89	2742	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2743	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	2744	* @param pData Pointer to data buffer
elmot	1:d0dfbce63a89	2745	* @param Size Amount of data to be sent
elmot	1:d0dfbce63a89	2746	* @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
elmot	1:d0dfbce63a89	2747	* @retval HAL status
elmot	1:d0dfbce63a89	2748	*/
elmot	1:d0dfbce63a89	2749	HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions)
elmot	1:d0dfbce63a89	2750	{
elmot	1:d0dfbce63a89	2751	/* Check the parameters */
elmot	1:d0dfbce63a89	2752	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
elmot	1:d0dfbce63a89	2753
elmot	1:d0dfbce63a89	2754	if(hi2c->State == HAL_I2C_STATE_LISTEN)
elmot	1:d0dfbce63a89	2755	{
elmot	1:d0dfbce63a89	2756	if((pData == NULL) \|\| (Size == 0U))
elmot	1:d0dfbce63a89	2757	{
elmot	1:d0dfbce63a89	2758	return HAL_ERROR;
elmot	1:d0dfbce63a89	2759	}
elmot	1:d0dfbce63a89	2760
elmot	1:d0dfbce63a89	2761	/* Disable Interrupts, to prevent preemption during treatment in case of multicall */
elmot	1:d0dfbce63a89	2762	I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT \| I2C_XFER_RX_IT);
elmot	1:d0dfbce63a89	2763
elmot	1:d0dfbce63a89	2764	/* Process Locked */
elmot	1:d0dfbce63a89	2765	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	2766
elmot	1:d0dfbce63a89	2767	hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
elmot	1:d0dfbce63a89	2768	hi2c->Mode = HAL_I2C_MODE_SLAVE;
elmot	1:d0dfbce63a89	2769	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	2770
elmot	1:d0dfbce63a89	2771	/* Enable Address Acknowledge */
elmot	1:d0dfbce63a89	2772	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
elmot	1:d0dfbce63a89	2773
elmot	1:d0dfbce63a89	2774	/* Prepare transfer parameters */
elmot	1:d0dfbce63a89	2775	hi2c->pBuffPtr = pData;
elmot	1:d0dfbce63a89	2776	hi2c->XferCount = Size;
elmot	1:d0dfbce63a89	2777	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	2778	hi2c->XferOptions = XferOptions;
elmot	1:d0dfbce63a89	2779	hi2c->XferISR = I2C_Slave_ISR_IT;
elmot	1:d0dfbce63a89	2780
elmot	1:d0dfbce63a89	2781	if(I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT)
elmot	1:d0dfbce63a89	2782	{
elmot	1:d0dfbce63a89	2783	/* Clear ADDR flag after prepare the transfer parameters */
elmot	1:d0dfbce63a89	2784	/* This action will generate an acknowledge to the Master */
elmot	1:d0dfbce63a89	2785	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
elmot	1:d0dfbce63a89	2786	}
elmot	1:d0dfbce63a89	2787
elmot	1:d0dfbce63a89	2788	/* Process Unlocked */
elmot	1:d0dfbce63a89	2789	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2790
elmot	1:d0dfbce63a89	2791	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	2792	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	2793	process unlock */
elmot	1:d0dfbce63a89	2794	/* REnable ADDR interrupt */
elmot	1:d0dfbce63a89	2795	I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT \| I2C_XFER_LISTEN_IT);
elmot	1:d0dfbce63a89	2796
elmot	1:d0dfbce63a89	2797	return HAL_OK;
elmot	1:d0dfbce63a89	2798	}
elmot	1:d0dfbce63a89	2799	else
elmot	1:d0dfbce63a89	2800	{
elmot	1:d0dfbce63a89	2801	return HAL_ERROR;
elmot	1:d0dfbce63a89	2802	}
elmot	1:d0dfbce63a89	2803	}
elmot	1:d0dfbce63a89	2804
elmot	1:d0dfbce63a89	2805	/**
elmot	1:d0dfbce63a89	2806	* @brief Enable the Address listen mode with Interrupt.
elmot	1:d0dfbce63a89	2807	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2808	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	2809	* @retval HAL status
elmot	1:d0dfbce63a89	2810	*/
elmot	1:d0dfbce63a89	2811	HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	2812	{
elmot	1:d0dfbce63a89	2813	if(hi2c->State == HAL_I2C_STATE_READY)
elmot	1:d0dfbce63a89	2814	{
elmot	1:d0dfbce63a89	2815	hi2c->State = HAL_I2C_STATE_LISTEN;
elmot	1:d0dfbce63a89	2816	hi2c->XferISR = I2C_Slave_ISR_IT;
elmot	1:d0dfbce63a89	2817
elmot	1:d0dfbce63a89	2818	/* Enable the Address Match interrupt */
elmot	1:d0dfbce63a89	2819	I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
elmot	1:d0dfbce63a89	2820
elmot	1:d0dfbce63a89	2821	return HAL_OK;
elmot	1:d0dfbce63a89	2822	}
elmot	1:d0dfbce63a89	2823	else
elmot	1:d0dfbce63a89	2824	{
elmot	1:d0dfbce63a89	2825	return HAL_BUSY;
elmot	1:d0dfbce63a89	2826	}
elmot	1:d0dfbce63a89	2827	}
elmot	1:d0dfbce63a89	2828
elmot	1:d0dfbce63a89	2829	/**
elmot	1:d0dfbce63a89	2830	* @brief Disable the Address listen mode with Interrupt.
elmot	1:d0dfbce63a89	2831	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2832	* the configuration information for the specified I2C
elmot	1:d0dfbce63a89	2833	* @retval HAL status
elmot	1:d0dfbce63a89	2834	*/
elmot	1:d0dfbce63a89	2835	HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	2836	{
elmot	1:d0dfbce63a89	2837	/* Declaration of tmp to prevent undefined behavior of volatile usage */
elmot	1:d0dfbce63a89	2838	uint32_t tmp;
elmot	1:d0dfbce63a89	2839
elmot	1:d0dfbce63a89	2840	/* Disable Address listen mode only if a transfer is not ongoing */
elmot	1:d0dfbce63a89	2841	if(hi2c->State == HAL_I2C_STATE_LISTEN)
elmot	1:d0dfbce63a89	2842	{
elmot	1:d0dfbce63a89	2843	tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
elmot	1:d0dfbce63a89	2844	hi2c->PreviousState = tmp \| (uint32_t)(hi2c->Mode);
elmot	1:d0dfbce63a89	2845	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	2846	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	2847	hi2c->XferISR = NULL;
elmot	1:d0dfbce63a89	2848
elmot	1:d0dfbce63a89	2849	/* Disable the Address Match interrupt */
elmot	1:d0dfbce63a89	2850	I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
elmot	1:d0dfbce63a89	2851
elmot	1:d0dfbce63a89	2852	return HAL_OK;
elmot	1:d0dfbce63a89	2853	}
elmot	1:d0dfbce63a89	2854	else
elmot	1:d0dfbce63a89	2855	{
elmot	1:d0dfbce63a89	2856	return HAL_BUSY;
elmot	1:d0dfbce63a89	2857	}
elmot	1:d0dfbce63a89	2858	}
elmot	1:d0dfbce63a89	2859
elmot	1:d0dfbce63a89	2860	/**
elmot	1:d0dfbce63a89	2861	* @brief Abort a master I2C IT or DMA process communication with Interrupt.
elmot	1:d0dfbce63a89	2862	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2863	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	2864	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	2865	* @retval HAL status
elmot	1:d0dfbce63a89	2866	*/
elmot	1:d0dfbce63a89	2867	HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
elmot	1:d0dfbce63a89	2868	{
elmot	1:d0dfbce63a89	2869	if(hi2c->Mode == HAL_I2C_MODE_MASTER)
elmot	1:d0dfbce63a89	2870	{
elmot	1:d0dfbce63a89	2871	/* Process Locked */
elmot	1:d0dfbce63a89	2872	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	2873
elmot	1:d0dfbce63a89	2874	/* Disable Interrupts */
elmot	1:d0dfbce63a89	2875	I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);
elmot	1:d0dfbce63a89	2876	I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);
elmot	1:d0dfbce63a89	2877
elmot	1:d0dfbce63a89	2878	/* Set State at HAL_I2C_STATE_ABORT */
elmot	1:d0dfbce63a89	2879	hi2c->State = HAL_I2C_STATE_ABORT;
elmot	1:d0dfbce63a89	2880
elmot	1:d0dfbce63a89	2881	/* Set NBYTES to 1 to generate a dummy read on I2C peripheral */
elmot	1:d0dfbce63a89	2882	/* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
elmot	1:d0dfbce63a89	2883	I2C_TransferConfig(hi2c, DevAddress, 1, I2C_AUTOEND_MODE, I2C_GENERATE_STOP);
elmot	1:d0dfbce63a89	2884
elmot	1:d0dfbce63a89	2885	/* Process Unlocked */
elmot	1:d0dfbce63a89	2886	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	2887
elmot	1:d0dfbce63a89	2888	/* Note : The I2C interrupts must be enabled after unlocking current process
elmot	1:d0dfbce63a89	2889	to avoid the risk of I2C interrupt handle execution before current
elmot	1:d0dfbce63a89	2890	process unlock */
elmot	1:d0dfbce63a89	2891	I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);
elmot	1:d0dfbce63a89	2892
elmot	1:d0dfbce63a89	2893	return HAL_OK;
elmot	1:d0dfbce63a89	2894	}
elmot	1:d0dfbce63a89	2895	else
elmot	1:d0dfbce63a89	2896	{
elmot	1:d0dfbce63a89	2897	/* Wrong usage of abort function */
elmot	1:d0dfbce63a89	2898	/* This function should be used only in case of abort monitored by master device */
elmot	1:d0dfbce63a89	2899	return HAL_ERROR;
elmot	1:d0dfbce63a89	2900	}
elmot	1:d0dfbce63a89	2901	}
elmot	1:d0dfbce63a89	2902
elmot	1:d0dfbce63a89	2903	/**
elmot	1:d0dfbce63a89	2904	* @}
elmot	1:d0dfbce63a89	2905	*/
elmot	1:d0dfbce63a89	2906
elmot	1:d0dfbce63a89	2907	/** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
elmot	1:d0dfbce63a89	2908	* @{
elmot	1:d0dfbce63a89	2909	*/
elmot	1:d0dfbce63a89	2910
elmot	1:d0dfbce63a89	2911	/**
elmot	1:d0dfbce63a89	2912	* @brief This function handles I2C event interrupt request.
elmot	1:d0dfbce63a89	2913	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2914	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	2915	* @retval None
elmot	1:d0dfbce63a89	2916	*/
elmot	1:d0dfbce63a89	2917	void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	2918	{
elmot	1:d0dfbce63a89	2919	/* Get current IT Flags and IT sources value */
elmot	1:d0dfbce63a89	2920	uint32_t itflags = READ_REG(hi2c->Instance->ISR);
elmot	1:d0dfbce63a89	2921	uint32_t itsources = READ_REG(hi2c->Instance->CR1);
elmot	1:d0dfbce63a89	2922
elmot	1:d0dfbce63a89	2923	/* I2C events treatment -------------------------------------*/
elmot	1:d0dfbce63a89	2924	if(hi2c->XferISR != NULL)
elmot	1:d0dfbce63a89	2925	{
elmot	1:d0dfbce63a89	2926	hi2c->XferISR(hi2c, itflags, itsources);
elmot	1:d0dfbce63a89	2927	}
elmot	1:d0dfbce63a89	2928	}
elmot	1:d0dfbce63a89	2929
elmot	1:d0dfbce63a89	2930	/**
elmot	1:d0dfbce63a89	2931	* @brief This function handles I2C error interrupt request.
elmot	1:d0dfbce63a89	2932	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2933	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	2934	* @retval None
elmot	1:d0dfbce63a89	2935	*/
elmot	1:d0dfbce63a89	2936	void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	2937	{
elmot	1:d0dfbce63a89	2938	uint32_t itflags = READ_REG(hi2c->Instance->ISR);
elmot	1:d0dfbce63a89	2939	uint32_t itsources = READ_REG(hi2c->Instance->CR1);
elmot	1:d0dfbce63a89	2940
elmot	1:d0dfbce63a89	2941	/* I2C Bus error interrupt occurred ------------------------------------*/
elmot	1:d0dfbce63a89	2942	if(((itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERRI) != RESET))
elmot	1:d0dfbce63a89	2943	{
elmot	1:d0dfbce63a89	2944	hi2c->ErrorCode \|= HAL_I2C_ERROR_BERR;
elmot	1:d0dfbce63a89	2945
elmot	1:d0dfbce63a89	2946	/* Clear BERR flag */
elmot	1:d0dfbce63a89	2947	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
elmot	1:d0dfbce63a89	2948	}
elmot	1:d0dfbce63a89	2949
elmot	1:d0dfbce63a89	2950	/* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/
elmot	1:d0dfbce63a89	2951	if(((itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERRI) != RESET))
elmot	1:d0dfbce63a89	2952	{
elmot	1:d0dfbce63a89	2953	hi2c->ErrorCode \|= HAL_I2C_ERROR_OVR;
elmot	1:d0dfbce63a89	2954
elmot	1:d0dfbce63a89	2955	/* Clear OVR flag */
elmot	1:d0dfbce63a89	2956	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
elmot	1:d0dfbce63a89	2957	}
elmot	1:d0dfbce63a89	2958
elmot	1:d0dfbce63a89	2959	/* I2C Arbitration Loss error interrupt occurred -------------------------------------*/
elmot	1:d0dfbce63a89	2960	if(((itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERRI) != RESET))
elmot	1:d0dfbce63a89	2961	{
elmot	1:d0dfbce63a89	2962	hi2c->ErrorCode \|= HAL_I2C_ERROR_ARLO;
elmot	1:d0dfbce63a89	2963
elmot	1:d0dfbce63a89	2964	/* Clear ARLO flag */
elmot	1:d0dfbce63a89	2965	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
elmot	1:d0dfbce63a89	2966	}
elmot	1:d0dfbce63a89	2967
elmot	1:d0dfbce63a89	2968	/* Call the Error Callback in case of Error detected */
elmot	1:d0dfbce63a89	2969	if((hi2c->ErrorCode & (HAL_I2C_ERROR_BERR \| HAL_I2C_ERROR_OVR \| HAL_I2C_ERROR_ARLO)) != HAL_I2C_ERROR_NONE)
elmot	1:d0dfbce63a89	2970	{
elmot	1:d0dfbce63a89	2971	I2C_ITError(hi2c, hi2c->ErrorCode);
elmot	1:d0dfbce63a89	2972	}
elmot	1:d0dfbce63a89	2973	}
elmot	1:d0dfbce63a89	2974
elmot	1:d0dfbce63a89	2975	/**
elmot	1:d0dfbce63a89	2976	* @brief Master Tx Transfer completed callback.
elmot	1:d0dfbce63a89	2977	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2978	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	2979	* @retval None
elmot	1:d0dfbce63a89	2980	*/
elmot	1:d0dfbce63a89	2981	__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	2982	{
elmot	1:d0dfbce63a89	2983	/* Prevent unused argument(s) compilation warning */
elmot	1:d0dfbce63a89	2984	UNUSED(hi2c);
elmot	1:d0dfbce63a89	2985
elmot	1:d0dfbce63a89	2986	/* NOTE : This function should not be modified, when the callback is needed,
elmot	1:d0dfbce63a89	2987	the HAL_I2C_MasterTxCpltCallback could be implemented in the user file
elmot	1:d0dfbce63a89	2988	*/
elmot	1:d0dfbce63a89	2989	}
elmot	1:d0dfbce63a89	2990
elmot	1:d0dfbce63a89	2991	/**
elmot	1:d0dfbce63a89	2992	* @brief Master Rx Transfer completed callback.
elmot	1:d0dfbce63a89	2993	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	2994	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	2995	* @retval None
elmot	1:d0dfbce63a89	2996	*/
elmot	1:d0dfbce63a89	2997	__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	2998	{
elmot	1:d0dfbce63a89	2999	/* Prevent unused argument(s) compilation warning */
elmot	1:d0dfbce63a89	3000	UNUSED(hi2c);
elmot	1:d0dfbce63a89	3001
elmot	1:d0dfbce63a89	3002	/* NOTE : This function should not be modified, when the callback is needed,
elmot	1:d0dfbce63a89	3003	the HAL_I2C_MasterRxCpltCallback could be implemented in the user file
elmot	1:d0dfbce63a89	3004	*/
elmot	1:d0dfbce63a89	3005	}
elmot	1:d0dfbce63a89	3006
elmot	1:d0dfbce63a89	3007	/** @brief Slave Tx Transfer completed callback.
elmot	1:d0dfbce63a89	3008	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3009	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3010	* @retval None
elmot	1:d0dfbce63a89	3011	*/
elmot	1:d0dfbce63a89	3012	__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	3013	{
elmot	1:d0dfbce63a89	3014	/* Prevent unused argument(s) compilation warning */
elmot	1:d0dfbce63a89	3015	UNUSED(hi2c);
elmot	1:d0dfbce63a89	3016
elmot	1:d0dfbce63a89	3017	/* NOTE : This function should not be modified, when the callback is needed,
elmot	1:d0dfbce63a89	3018	the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file
elmot	1:d0dfbce63a89	3019	*/
elmot	1:d0dfbce63a89	3020	}
elmot	1:d0dfbce63a89	3021
elmot	1:d0dfbce63a89	3022	/**
elmot	1:d0dfbce63a89	3023	* @brief Slave Rx Transfer completed callback.
elmot	1:d0dfbce63a89	3024	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3025	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3026	* @retval None
elmot	1:d0dfbce63a89	3027	*/
elmot	1:d0dfbce63a89	3028	__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	3029	{
elmot	1:d0dfbce63a89	3030	/* Prevent unused argument(s) compilation warning */
elmot	1:d0dfbce63a89	3031	UNUSED(hi2c);
elmot	1:d0dfbce63a89	3032
elmot	1:d0dfbce63a89	3033	/* NOTE : This function should not be modified, when the callback is needed,
elmot	1:d0dfbce63a89	3034	the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file
elmot	1:d0dfbce63a89	3035	*/
elmot	1:d0dfbce63a89	3036	}
elmot	1:d0dfbce63a89	3037
elmot	1:d0dfbce63a89	3038	/**
elmot	1:d0dfbce63a89	3039	* @brief Slave Address Match callback.
elmot	1:d0dfbce63a89	3040	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3041	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3042	* @param TransferDirection: Master request Transfer Direction (Write/Read), value of @ref I2C_XFEROPTIONS
elmot	1:d0dfbce63a89	3043	* @param AddrMatchCode: Address Match Code
elmot	1:d0dfbce63a89	3044	* @retval None
elmot	1:d0dfbce63a89	3045	*/
elmot	1:d0dfbce63a89	3046	__weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
elmot	1:d0dfbce63a89	3047	{
elmot	1:d0dfbce63a89	3048	/* Prevent unused argument(s) compilation warning */
elmot	1:d0dfbce63a89	3049	UNUSED(hi2c);
elmot	1:d0dfbce63a89	3050	UNUSED(TransferDirection);
elmot	1:d0dfbce63a89	3051	UNUSED(AddrMatchCode);
elmot	1:d0dfbce63a89	3052
elmot	1:d0dfbce63a89	3053	/* NOTE : This function should not be modified, when the callback is needed,
elmot	1:d0dfbce63a89	3054	the HAL_I2C_AddrCallback() could be implemented in the user file
elmot	1:d0dfbce63a89	3055	*/
elmot	1:d0dfbce63a89	3056	}
elmot	1:d0dfbce63a89	3057
elmot	1:d0dfbce63a89	3058	/**
elmot	1:d0dfbce63a89	3059	* @brief Listen Complete callback.
elmot	1:d0dfbce63a89	3060	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3061	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3062	* @retval None
elmot	1:d0dfbce63a89	3063	*/
elmot	1:d0dfbce63a89	3064	__weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	3065	{
elmot	1:d0dfbce63a89	3066	/* Prevent unused argument(s) compilation warning */
elmot	1:d0dfbce63a89	3067	UNUSED(hi2c);
elmot	1:d0dfbce63a89	3068
elmot	1:d0dfbce63a89	3069	/* NOTE : This function should not be modified, when the callback is needed,
elmot	1:d0dfbce63a89	3070	the HAL_I2C_ListenCpltCallback() could be implemented in the user file
elmot	1:d0dfbce63a89	3071	*/
elmot	1:d0dfbce63a89	3072	}
elmot	1:d0dfbce63a89	3073
elmot	1:d0dfbce63a89	3074	/**
elmot	1:d0dfbce63a89	3075	* @brief Memory Tx Transfer completed callback.
elmot	1:d0dfbce63a89	3076	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3077	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3078	* @retval None
elmot	1:d0dfbce63a89	3079	*/
elmot	1:d0dfbce63a89	3080	__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	3081	{
elmot	1:d0dfbce63a89	3082	/* Prevent unused argument(s) compilation warning */
elmot	1:d0dfbce63a89	3083	UNUSED(hi2c);
elmot	1:d0dfbce63a89	3084
elmot	1:d0dfbce63a89	3085	/* NOTE : This function should not be modified, when the callback is needed,
elmot	1:d0dfbce63a89	3086	the HAL_I2C_MemTxCpltCallback could be implemented in the user file
elmot	1:d0dfbce63a89	3087	*/
elmot	1:d0dfbce63a89	3088	}
elmot	1:d0dfbce63a89	3089
elmot	1:d0dfbce63a89	3090	/**
elmot	1:d0dfbce63a89	3091	* @brief Memory Rx Transfer completed callback.
elmot	1:d0dfbce63a89	3092	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3093	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3094	* @retval None
elmot	1:d0dfbce63a89	3095	*/
elmot	1:d0dfbce63a89	3096	__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	3097	{
elmot	1:d0dfbce63a89	3098	/* Prevent unused argument(s) compilation warning */
elmot	1:d0dfbce63a89	3099	UNUSED(hi2c);
elmot	1:d0dfbce63a89	3100
elmot	1:d0dfbce63a89	3101	/* NOTE : This function should not be modified, when the callback is needed,
elmot	1:d0dfbce63a89	3102	the HAL_I2C_MemRxCpltCallback could be implemented in the user file
elmot	1:d0dfbce63a89	3103	*/
elmot	1:d0dfbce63a89	3104	}
elmot	1:d0dfbce63a89	3105
elmot	1:d0dfbce63a89	3106	/**
elmot	1:d0dfbce63a89	3107	* @brief I2C error callback.
elmot	1:d0dfbce63a89	3108	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3109	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3110	* @retval None
elmot	1:d0dfbce63a89	3111	*/
elmot	1:d0dfbce63a89	3112	__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	3113	{
elmot	1:d0dfbce63a89	3114	/* Prevent unused argument(s) compilation warning */
elmot	1:d0dfbce63a89	3115	UNUSED(hi2c);
elmot	1:d0dfbce63a89	3116
elmot	1:d0dfbce63a89	3117	/* NOTE : This function should not be modified, when the callback is needed,
elmot	1:d0dfbce63a89	3118	the HAL_I2C_ErrorCallback could be implemented in the user file
elmot	1:d0dfbce63a89	3119	*/
elmot	1:d0dfbce63a89	3120	}
elmot	1:d0dfbce63a89	3121
elmot	1:d0dfbce63a89	3122	/**
elmot	1:d0dfbce63a89	3123	* @brief I2C abort callback.
elmot	1:d0dfbce63a89	3124	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3125	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3126	* @retval None
elmot	1:d0dfbce63a89	3127	*/
elmot	1:d0dfbce63a89	3128	__weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	3129	{
elmot	1:d0dfbce63a89	3130	/* Prevent unused argument(s) compilation warning */
elmot	1:d0dfbce63a89	3131	UNUSED(hi2c);
elmot	1:d0dfbce63a89	3132
elmot	1:d0dfbce63a89	3133	/* NOTE : This function should not be modified, when the callback is needed,
elmot	1:d0dfbce63a89	3134	the HAL_I2C_AbortCpltCallback could be implemented in the user file
elmot	1:d0dfbce63a89	3135	*/
elmot	1:d0dfbce63a89	3136	}
elmot	1:d0dfbce63a89	3137
elmot	1:d0dfbce63a89	3138	/**
elmot	1:d0dfbce63a89	3139	* @}
elmot	1:d0dfbce63a89	3140	*/
elmot	1:d0dfbce63a89	3141
elmot	1:d0dfbce63a89	3142	/** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
elmot	1:d0dfbce63a89	3143	* @brief Peripheral State, Mode and Error functions
elmot	1:d0dfbce63a89	3144	*
elmot	1:d0dfbce63a89	3145	@verbatim
elmot	1:d0dfbce63a89	3146	===============================================================================
elmot	1:d0dfbce63a89	3147	##### Peripheral State, Mode and Error functions #####
elmot	1:d0dfbce63a89	3148	===============================================================================
elmot	1:d0dfbce63a89	3149	[..]
elmot	1:d0dfbce63a89	3150	This subsection permit to get in run-time the status of the peripheral
elmot	1:d0dfbce63a89	3151	and the data flow.
elmot	1:d0dfbce63a89	3152
elmot	1:d0dfbce63a89	3153	@endverbatim
elmot	1:d0dfbce63a89	3154	* @{
elmot	1:d0dfbce63a89	3155	*/
elmot	1:d0dfbce63a89	3156
elmot	1:d0dfbce63a89	3157	/**
elmot	1:d0dfbce63a89	3158	* @brief Return the I2C handle state.
elmot	1:d0dfbce63a89	3159	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3160	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3161	* @retval HAL state
elmot	1:d0dfbce63a89	3162	*/
elmot	1:d0dfbce63a89	3163	HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	3164	{
elmot	1:d0dfbce63a89	3165	/* Return I2C handle state */
elmot	1:d0dfbce63a89	3166	return hi2c->State;
elmot	1:d0dfbce63a89	3167	}
elmot	1:d0dfbce63a89	3168
elmot	1:d0dfbce63a89	3169	/**
elmot	1:d0dfbce63a89	3170	* @brief Returns the I2C Master, Slave, Memory or no mode.
elmot	1:d0dfbce63a89	3171	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3172	* the configuration information for I2C module
elmot	1:d0dfbce63a89	3173	* @retval HAL mode
elmot	1:d0dfbce63a89	3174	*/
elmot	1:d0dfbce63a89	3175	HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	3176	{
elmot	1:d0dfbce63a89	3177	return hi2c->Mode;
elmot	1:d0dfbce63a89	3178	}
elmot	1:d0dfbce63a89	3179
elmot	1:d0dfbce63a89	3180	/**
elmot	1:d0dfbce63a89	3181	* @brief Return the I2C error code.
elmot	1:d0dfbce63a89	3182	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3183	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3184	* @retval I2C Error Code
elmot	1:d0dfbce63a89	3185	*/
elmot	1:d0dfbce63a89	3186	uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	3187	{
elmot	1:d0dfbce63a89	3188	return hi2c->ErrorCode;
elmot	1:d0dfbce63a89	3189	}
elmot	1:d0dfbce63a89	3190
elmot	1:d0dfbce63a89	3191	/**
elmot	1:d0dfbce63a89	3192	* @}
elmot	1:d0dfbce63a89	3193	*/
elmot	1:d0dfbce63a89	3194
elmot	1:d0dfbce63a89	3195	/**
elmot	1:d0dfbce63a89	3196	* @}
elmot	1:d0dfbce63a89	3197	*/
elmot	1:d0dfbce63a89	3198
elmot	1:d0dfbce63a89	3199	/** @addtogroup I2C_Private_Functions
elmot	1:d0dfbce63a89	3200	* @{
elmot	1:d0dfbce63a89	3201	*/
elmot	1:d0dfbce63a89	3202
elmot	1:d0dfbce63a89	3203	/**
elmot	1:d0dfbce63a89	3204	* @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt.
elmot	1:d0dfbce63a89	3205	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3206	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3207	* @param ITFlags Interrupt flags to handle.
elmot	1:d0dfbce63a89	3208	* @param ITSources Interrupt sources enabled.
elmot	1:d0dfbce63a89	3209	* @retval HAL status
elmot	1:d0dfbce63a89	3210	*/
elmot	1:d0dfbce63a89	3211	static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
elmot	1:d0dfbce63a89	3212	{
elmot	1:d0dfbce63a89	3213	uint16_t devaddress = 0U;
elmot	1:d0dfbce63a89	3214
elmot	1:d0dfbce63a89	3215	/* Process Locked */
elmot	1:d0dfbce63a89	3216	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	3217
elmot	1:d0dfbce63a89	3218	if(((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET))
elmot	1:d0dfbce63a89	3219	{
elmot	1:d0dfbce63a89	3220	/* Clear NACK Flag */
elmot	1:d0dfbce63a89	3221	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
elmot	1:d0dfbce63a89	3222
elmot	1:d0dfbce63a89	3223	/* Set corresponding Error Code */
elmot	1:d0dfbce63a89	3224	/* No need to generate STOP, it is automatically done */
elmot	1:d0dfbce63a89	3225	/* Error callback will be send during stop flag treatment */
elmot	1:d0dfbce63a89	3226	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
elmot	1:d0dfbce63a89	3227
elmot	1:d0dfbce63a89	3228	/* Flush TX register */
elmot	1:d0dfbce63a89	3229	I2C_Flush_TXDR(hi2c);
elmot	1:d0dfbce63a89	3230	}
elmot	1:d0dfbce63a89	3231	else if(((ITFlags & I2C_FLAG_RXNE) != RESET) && ((ITSources & I2C_IT_RXI) != RESET))
elmot	1:d0dfbce63a89	3232	{
elmot	1:d0dfbce63a89	3233	/* Read data from RXDR */
elmot	1:d0dfbce63a89	3234	(*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
elmot	1:d0dfbce63a89	3235	hi2c->XferSize--;
elmot	1:d0dfbce63a89	3236	hi2c->XferCount--;
elmot	1:d0dfbce63a89	3237	}
elmot	1:d0dfbce63a89	3238	else if(((ITFlags & I2C_FLAG_TXIS) != RESET) && ((ITSources & I2C_IT_TXI) != RESET))
elmot	1:d0dfbce63a89	3239	{
elmot	1:d0dfbce63a89	3240	/* Write data to TXDR */
elmot	1:d0dfbce63a89	3241	hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
elmot	1:d0dfbce63a89	3242	hi2c->XferSize--;
elmot	1:d0dfbce63a89	3243	hi2c->XferCount--;
elmot	1:d0dfbce63a89	3244	}
elmot	1:d0dfbce63a89	3245	else if(((ITFlags & I2C_FLAG_TCR) != RESET) && ((ITSources & I2C_IT_TCI) != RESET))
elmot	1:d0dfbce63a89	3246	{
elmot	1:d0dfbce63a89	3247	if((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
elmot	1:d0dfbce63a89	3248	{
elmot	1:d0dfbce63a89	3249	devaddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
elmot	1:d0dfbce63a89	3250
elmot	1:d0dfbce63a89	3251	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	3252	{
elmot	1:d0dfbce63a89	3253	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	3254	I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	3255	}
elmot	1:d0dfbce63a89	3256	else
elmot	1:d0dfbce63a89	3257	{
elmot	1:d0dfbce63a89	3258	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	3259	if(hi2c->XferOptions != I2C_NO_OPTION_FRAME)
elmot	1:d0dfbce63a89	3260	{
elmot	1:d0dfbce63a89	3261	I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, hi2c->XferOptions, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	3262	}
elmot	1:d0dfbce63a89	3263	else
elmot	1:d0dfbce63a89	3264	{
elmot	1:d0dfbce63a89	3265	I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	3266	}
elmot	1:d0dfbce63a89	3267	}
elmot	1:d0dfbce63a89	3268	}
elmot	1:d0dfbce63a89	3269	else
elmot	1:d0dfbce63a89	3270	{
elmot	1:d0dfbce63a89	3271	/* Call TxCpltCallback() if no stop mode is set */
elmot	1:d0dfbce63a89	3272	if(I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE)
elmot	1:d0dfbce63a89	3273	{
elmot	1:d0dfbce63a89	3274	/* Call I2C Master Sequential complete process */
elmot	1:d0dfbce63a89	3275	I2C_ITMasterSequentialCplt(hi2c);
elmot	1:d0dfbce63a89	3276	}
elmot	1:d0dfbce63a89	3277	else
elmot	1:d0dfbce63a89	3278	{
elmot	1:d0dfbce63a89	3279	/* Wrong size Status regarding TCR flag event */
elmot	1:d0dfbce63a89	3280	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	3281	I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
elmot	1:d0dfbce63a89	3282	}
elmot	1:d0dfbce63a89	3283	}
elmot	1:d0dfbce63a89	3284	}
elmot	1:d0dfbce63a89	3285	else if(((ITFlags & I2C_FLAG_TC) != RESET) && ((ITSources & I2C_IT_TCI) != RESET))
elmot	1:d0dfbce63a89	3286	{
elmot	1:d0dfbce63a89	3287	if(hi2c->XferCount == 0U)
elmot	1:d0dfbce63a89	3288	{
elmot	1:d0dfbce63a89	3289	if(I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE)
elmot	1:d0dfbce63a89	3290	{
elmot	1:d0dfbce63a89	3291	/* Generate a stop condition in case of no transfer option */
elmot	1:d0dfbce63a89	3292	if(hi2c->XferOptions == I2C_NO_OPTION_FRAME)
elmot	1:d0dfbce63a89	3293	{
elmot	1:d0dfbce63a89	3294	/* Generate Stop */
elmot	1:d0dfbce63a89	3295	hi2c->Instance->CR2 \|= I2C_CR2_STOP;
elmot	1:d0dfbce63a89	3296	}
elmot	1:d0dfbce63a89	3297	else
elmot	1:d0dfbce63a89	3298	{
elmot	1:d0dfbce63a89	3299	/* Call I2C Master Sequential complete process */
elmot	1:d0dfbce63a89	3300	I2C_ITMasterSequentialCplt(hi2c);
elmot	1:d0dfbce63a89	3301	}
elmot	1:d0dfbce63a89	3302	}
elmot	1:d0dfbce63a89	3303	}
elmot	1:d0dfbce63a89	3304	else
elmot	1:d0dfbce63a89	3305	{
elmot	1:d0dfbce63a89	3306	/* Wrong size Status regarding TC flag event */
elmot	1:d0dfbce63a89	3307	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	3308	I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
elmot	1:d0dfbce63a89	3309	}
elmot	1:d0dfbce63a89	3310	}
elmot	1:d0dfbce63a89	3311
elmot	1:d0dfbce63a89	3312	if(((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET))
elmot	1:d0dfbce63a89	3313	{
elmot	1:d0dfbce63a89	3314	/* Call I2C Master complete process */
elmot	1:d0dfbce63a89	3315	I2C_ITMasterCplt(hi2c, ITFlags);
elmot	1:d0dfbce63a89	3316	}
elmot	1:d0dfbce63a89	3317
elmot	1:d0dfbce63a89	3318	/* Process Unlocked */
elmot	1:d0dfbce63a89	3319	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3320
elmot	1:d0dfbce63a89	3321	return HAL_OK;
elmot	1:d0dfbce63a89	3322	}
elmot	1:d0dfbce63a89	3323
elmot	1:d0dfbce63a89	3324	/**
elmot	1:d0dfbce63a89	3325	* @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with Interrupt.
elmot	1:d0dfbce63a89	3326	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3327	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3328	* @param ITFlags Interrupt flags to handle.
elmot	1:d0dfbce63a89	3329	* @param ITSources Interrupt sources enabled.
elmot	1:d0dfbce63a89	3330	* @retval HAL status
elmot	1:d0dfbce63a89	3331	*/
elmot	1:d0dfbce63a89	3332	static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
elmot	1:d0dfbce63a89	3333	{
elmot	1:d0dfbce63a89	3334	/* Process locked */
elmot	1:d0dfbce63a89	3335	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	3336
elmot	1:d0dfbce63a89	3337	if(((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET))
elmot	1:d0dfbce63a89	3338	{
elmot	1:d0dfbce63a89	3339	/* Check that I2C transfer finished */
elmot	1:d0dfbce63a89	3340	/* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
elmot	1:d0dfbce63a89	3341	/* Mean XferCount == 0*/
elmot	1:d0dfbce63a89	3342	/* So clear Flag NACKF only */
elmot	1:d0dfbce63a89	3343	if(hi2c->XferCount == 0U)
elmot	1:d0dfbce63a89	3344	{
elmot	1:d0dfbce63a89	3345	if(((hi2c->XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (hi2c->XferOptions == I2C_LAST_FRAME)) && \
elmot	1:d0dfbce63a89	3346	(hi2c->State == HAL_I2C_STATE_LISTEN))
elmot	1:d0dfbce63a89	3347	{
elmot	1:d0dfbce63a89	3348	/* Call I2C Listen complete process */
elmot	1:d0dfbce63a89	3349	I2C_ITListenCplt(hi2c, ITFlags);
elmot	1:d0dfbce63a89	3350	}
elmot	1:d0dfbce63a89	3351	else if((hi2c->XferOptions != I2C_NO_OPTION_FRAME) && (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN))
elmot	1:d0dfbce63a89	3352	{
elmot	1:d0dfbce63a89	3353	/* Clear NACK Flag */
elmot	1:d0dfbce63a89	3354	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
elmot	1:d0dfbce63a89	3355
elmot	1:d0dfbce63a89	3356	/* Flush TX register */
elmot	1:d0dfbce63a89	3357	I2C_Flush_TXDR(hi2c);
elmot	1:d0dfbce63a89	3358
elmot	1:d0dfbce63a89	3359	/* Last Byte is Transmitted */
elmot	1:d0dfbce63a89	3360	/* Call I2C Slave Sequential complete process */
elmot	1:d0dfbce63a89	3361	I2C_ITSlaveSequentialCplt(hi2c);
elmot	1:d0dfbce63a89	3362	}
elmot	1:d0dfbce63a89	3363	else
elmot	1:d0dfbce63a89	3364	{
elmot	1:d0dfbce63a89	3365	/* Clear NACK Flag */
elmot	1:d0dfbce63a89	3366	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
elmot	1:d0dfbce63a89	3367	}
elmot	1:d0dfbce63a89	3368	}
elmot	1:d0dfbce63a89	3369	else
elmot	1:d0dfbce63a89	3370	{
elmot	1:d0dfbce63a89	3371	/* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/
elmot	1:d0dfbce63a89	3372	/* Clear NACK Flag */
elmot	1:d0dfbce63a89	3373	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
elmot	1:d0dfbce63a89	3374
elmot	1:d0dfbce63a89	3375	/* Set ErrorCode corresponding to a Non-Acknowledge */
elmot	1:d0dfbce63a89	3376	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
elmot	1:d0dfbce63a89	3377	}
elmot	1:d0dfbce63a89	3378	}
elmot	1:d0dfbce63a89	3379	else if(((ITFlags & I2C_FLAG_RXNE) != RESET) && ((ITSources & I2C_IT_RXI) != RESET))
elmot	1:d0dfbce63a89	3380	{
elmot	1:d0dfbce63a89	3381	if(hi2c->XferCount > 0U)
elmot	1:d0dfbce63a89	3382	{
elmot	1:d0dfbce63a89	3383	/* Read data from RXDR */
elmot	1:d0dfbce63a89	3384	(*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
elmot	1:d0dfbce63a89	3385	hi2c->XferSize--;
elmot	1:d0dfbce63a89	3386	hi2c->XferCount--;
elmot	1:d0dfbce63a89	3387	}
elmot	1:d0dfbce63a89	3388
elmot	1:d0dfbce63a89	3389	if((hi2c->XferCount == 0U) && \
elmot	1:d0dfbce63a89	3390	(hi2c->XferOptions != I2C_NO_OPTION_FRAME))
elmot	1:d0dfbce63a89	3391	{
elmot	1:d0dfbce63a89	3392	/* Call I2C Slave Sequential complete process */
elmot	1:d0dfbce63a89	3393	I2C_ITSlaveSequentialCplt(hi2c);
elmot	1:d0dfbce63a89	3394	}
elmot	1:d0dfbce63a89	3395	}
elmot	1:d0dfbce63a89	3396	else if(((ITFlags & I2C_FLAG_ADDR) != RESET) && ((ITSources & I2C_IT_ADDRI) != RESET))
elmot	1:d0dfbce63a89	3397	{
elmot	1:d0dfbce63a89	3398	I2C_ITAddrCplt(hi2c, ITFlags);
elmot	1:d0dfbce63a89	3399	}
elmot	1:d0dfbce63a89	3400	else if(((ITFlags & I2C_FLAG_TXIS) != RESET) && ((ITSources & I2C_IT_TXI) != RESET))
elmot	1:d0dfbce63a89	3401	{
elmot	1:d0dfbce63a89	3402	/* Write data to TXDR only if XferCount not reach "0" */
elmot	1:d0dfbce63a89	3403	/* A TXIS flag can be set, during STOP treatment */
elmot	1:d0dfbce63a89	3404	/* Check if all Datas have already been sent */
elmot	1:d0dfbce63a89	3405	/* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
elmot	1:d0dfbce63a89	3406	if(hi2c->XferCount > 0U)
elmot	1:d0dfbce63a89	3407	{
elmot	1:d0dfbce63a89	3408	/* Write data to TXDR */
elmot	1:d0dfbce63a89	3409	hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
elmot	1:d0dfbce63a89	3410	hi2c->XferCount--;
elmot	1:d0dfbce63a89	3411	hi2c->XferSize--;
elmot	1:d0dfbce63a89	3412	}
elmot	1:d0dfbce63a89	3413	else
elmot	1:d0dfbce63a89	3414	{
elmot	1:d0dfbce63a89	3415	if((hi2c->XferOptions == I2C_NEXT_FRAME) \|\| (hi2c->XferOptions == I2C_FIRST_FRAME))
elmot	1:d0dfbce63a89	3416	{
elmot	1:d0dfbce63a89	3417	/* Last Byte is Transmitted */
elmot	1:d0dfbce63a89	3418	/* Call I2C Slave Sequential complete process */
elmot	1:d0dfbce63a89	3419	I2C_ITSlaveSequentialCplt(hi2c);
elmot	1:d0dfbce63a89	3420	}
elmot	1:d0dfbce63a89	3421	}
elmot	1:d0dfbce63a89	3422	}
elmot	1:d0dfbce63a89	3423
elmot	1:d0dfbce63a89	3424	/* Check if STOPF is set */
elmot	1:d0dfbce63a89	3425	if(((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET))
elmot	1:d0dfbce63a89	3426	{
elmot	1:d0dfbce63a89	3427	/* Call I2C Slave complete process */
elmot	1:d0dfbce63a89	3428	I2C_ITSlaveCplt(hi2c, ITFlags);
elmot	1:d0dfbce63a89	3429	}
elmot	1:d0dfbce63a89	3430
elmot	1:d0dfbce63a89	3431	/* Process Unlocked */
elmot	1:d0dfbce63a89	3432	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3433
elmot	1:d0dfbce63a89	3434	return HAL_OK;
elmot	1:d0dfbce63a89	3435	}
elmot	1:d0dfbce63a89	3436
elmot	1:d0dfbce63a89	3437	/**
elmot	1:d0dfbce63a89	3438	* @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA.
elmot	1:d0dfbce63a89	3439	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3440	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3441	* @param ITFlags Interrupt flags to handle.
elmot	1:d0dfbce63a89	3442	* @param ITSources Interrupt sources enabled.
elmot	1:d0dfbce63a89	3443	* @retval HAL status
elmot	1:d0dfbce63a89	3444	*/
elmot	1:d0dfbce63a89	3445	static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
elmot	1:d0dfbce63a89	3446	{
elmot	1:d0dfbce63a89	3447	uint16_t devaddress = 0U;
elmot	1:d0dfbce63a89	3448	uint32_t xfermode = 0U;
elmot	1:d0dfbce63a89	3449
elmot	1:d0dfbce63a89	3450	/* Process Locked */
elmot	1:d0dfbce63a89	3451	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	3452
elmot	1:d0dfbce63a89	3453	if(((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET))
elmot	1:d0dfbce63a89	3454	{
elmot	1:d0dfbce63a89	3455	/* Clear NACK Flag */
elmot	1:d0dfbce63a89	3456	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
elmot	1:d0dfbce63a89	3457
elmot	1:d0dfbce63a89	3458	/* Set corresponding Error Code */
elmot	1:d0dfbce63a89	3459	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
elmot	1:d0dfbce63a89	3460
elmot	1:d0dfbce63a89	3461	/* No need to generate STOP, it is automatically done */
elmot	1:d0dfbce63a89	3462	/* But enable STOP interrupt, to treat it */
elmot	1:d0dfbce63a89	3463	/* Error callback will be send during stop flag treatment */
elmot	1:d0dfbce63a89	3464	I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);
elmot	1:d0dfbce63a89	3465
elmot	1:d0dfbce63a89	3466	/* Flush TX register */
elmot	1:d0dfbce63a89	3467	I2C_Flush_TXDR(hi2c);
elmot	1:d0dfbce63a89	3468	}
elmot	1:d0dfbce63a89	3469	else if(((ITFlags & I2C_FLAG_TCR) != RESET) && ((ITSources & I2C_IT_TCI) != RESET))
elmot	1:d0dfbce63a89	3470	{
elmot	1:d0dfbce63a89	3471	/* Disable TC interrupt */
elmot	1:d0dfbce63a89	3472	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI);
elmot	1:d0dfbce63a89	3473
elmot	1:d0dfbce63a89	3474	if(hi2c->XferCount != 0U)
elmot	1:d0dfbce63a89	3475	{
elmot	1:d0dfbce63a89	3476	/* Recover Slave address */
elmot	1:d0dfbce63a89	3477	devaddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
elmot	1:d0dfbce63a89	3478
elmot	1:d0dfbce63a89	3479	/* Prepare the new XferSize to transfer */
elmot	1:d0dfbce63a89	3480	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	3481	{
elmot	1:d0dfbce63a89	3482	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	3483	xfermode = I2C_RELOAD_MODE;
elmot	1:d0dfbce63a89	3484	}
elmot	1:d0dfbce63a89	3485	else
elmot	1:d0dfbce63a89	3486	{
elmot	1:d0dfbce63a89	3487	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	3488	xfermode = I2C_AUTOEND_MODE;
elmot	1:d0dfbce63a89	3489	}
elmot	1:d0dfbce63a89	3490
elmot	1:d0dfbce63a89	3491	/* Set the new XferSize in Nbytes register */
elmot	1:d0dfbce63a89	3492	I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP);
elmot	1:d0dfbce63a89	3493
elmot	1:d0dfbce63a89	3494	/* Update XferCount value */
elmot	1:d0dfbce63a89	3495	hi2c->XferCount -= hi2c->XferSize;
elmot	1:d0dfbce63a89	3496
elmot	1:d0dfbce63a89	3497	/* Enable DMA Request */
elmot	1:d0dfbce63a89	3498	if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
elmot	1:d0dfbce63a89	3499	{
elmot	1:d0dfbce63a89	3500	hi2c->Instance->CR1 \|= I2C_CR1_RXDMAEN;
elmot	1:d0dfbce63a89	3501	}
elmot	1:d0dfbce63a89	3502	else
elmot	1:d0dfbce63a89	3503	{
elmot	1:d0dfbce63a89	3504	hi2c->Instance->CR1 \|= I2C_CR1_TXDMAEN;
elmot	1:d0dfbce63a89	3505	}
elmot	1:d0dfbce63a89	3506	}
elmot	1:d0dfbce63a89	3507	else
elmot	1:d0dfbce63a89	3508	{
elmot	1:d0dfbce63a89	3509	/* Wrong size Status regarding TCR flag event */
elmot	1:d0dfbce63a89	3510	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	3511	I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
elmot	1:d0dfbce63a89	3512	}
elmot	1:d0dfbce63a89	3513	}
elmot	1:d0dfbce63a89	3514	else if(((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET))
elmot	1:d0dfbce63a89	3515	{
elmot	1:d0dfbce63a89	3516	/* Call I2C Master complete process */
elmot	1:d0dfbce63a89	3517	I2C_ITMasterCplt(hi2c, ITFlags);
elmot	1:d0dfbce63a89	3518	}
elmot	1:d0dfbce63a89	3519
elmot	1:d0dfbce63a89	3520	/* Process Unlocked */
elmot	1:d0dfbce63a89	3521	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3522
elmot	1:d0dfbce63a89	3523	return HAL_OK;
elmot	1:d0dfbce63a89	3524	}
elmot	1:d0dfbce63a89	3525
elmot	1:d0dfbce63a89	3526	/**
elmot	1:d0dfbce63a89	3527	* @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with DMA.
elmot	1:d0dfbce63a89	3528	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3529	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3530	* @param ITFlags Interrupt flags to handle.
elmot	1:d0dfbce63a89	3531	* @param ITSources Interrupt sources enabled.
elmot	1:d0dfbce63a89	3532	* @retval HAL status
elmot	1:d0dfbce63a89	3533	*/
elmot	1:d0dfbce63a89	3534	static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
elmot	1:d0dfbce63a89	3535	{
elmot	1:d0dfbce63a89	3536	/* Process locked */
elmot	1:d0dfbce63a89	3537	__HAL_LOCK(hi2c);
elmot	1:d0dfbce63a89	3538
elmot	1:d0dfbce63a89	3539	if(((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET))
elmot	1:d0dfbce63a89	3540	{
elmot	1:d0dfbce63a89	3541	/* Check that I2C transfer finished */
elmot	1:d0dfbce63a89	3542	/* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
elmot	1:d0dfbce63a89	3543	/* Mean XferCount == 0 */
elmot	1:d0dfbce63a89	3544	/* So clear Flag NACKF only */
elmot	1:d0dfbce63a89	3545	if(I2C_GET_DMA_REMAIN_DATA(hi2c) == 0U)
elmot	1:d0dfbce63a89	3546	{
elmot	1:d0dfbce63a89	3547	/* Clear NACK Flag */
elmot	1:d0dfbce63a89	3548	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
elmot	1:d0dfbce63a89	3549	}
elmot	1:d0dfbce63a89	3550	else
elmot	1:d0dfbce63a89	3551	{
elmot	1:d0dfbce63a89	3552	/* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/
elmot	1:d0dfbce63a89	3553	/* Clear NACK Flag */
elmot	1:d0dfbce63a89	3554	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
elmot	1:d0dfbce63a89	3555
elmot	1:d0dfbce63a89	3556	/* Set ErrorCode corresponding to a Non-Acknowledge */
elmot	1:d0dfbce63a89	3557	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
elmot	1:d0dfbce63a89	3558	}
elmot	1:d0dfbce63a89	3559	}
elmot	1:d0dfbce63a89	3560	else if(((ITFlags & I2C_FLAG_ADDR) != RESET) && ((ITSources & I2C_IT_ADDRI) != RESET))
elmot	1:d0dfbce63a89	3561	{
elmot	1:d0dfbce63a89	3562	/* Clear ADDR flag */
elmot	1:d0dfbce63a89	3563	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
elmot	1:d0dfbce63a89	3564	}
elmot	1:d0dfbce63a89	3565	else if(((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET))
elmot	1:d0dfbce63a89	3566	{
elmot	1:d0dfbce63a89	3567	/* Call I2C Slave complete process */
elmot	1:d0dfbce63a89	3568	I2C_ITSlaveCplt(hi2c, ITFlags);
elmot	1:d0dfbce63a89	3569	}
elmot	1:d0dfbce63a89	3570
elmot	1:d0dfbce63a89	3571	/* Process Unlocked */
elmot	1:d0dfbce63a89	3572	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3573
elmot	1:d0dfbce63a89	3574	return HAL_OK;
elmot	1:d0dfbce63a89	3575	}
elmot	1:d0dfbce63a89	3576
elmot	1:d0dfbce63a89	3577	/**
elmot	1:d0dfbce63a89	3578	* @brief Master sends target device address followed by internal memory address for write request.
elmot	1:d0dfbce63a89	3579	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3580	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3581	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	3582	* @param MemAddress Internal memory address
elmot	1:d0dfbce63a89	3583	* @param MemAddSize Size of internal memory address
elmot	1:d0dfbce63a89	3584	* @param Timeout Timeout duration
elmot	1:d0dfbce63a89	3585	* @param Tickstart Tick start value
elmot	1:d0dfbce63a89	3586	* @retval HAL status
elmot	1:d0dfbce63a89	3587	*/
elmot	1:d0dfbce63a89	3588	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
elmot	1:d0dfbce63a89	3589	{
elmot	1:d0dfbce63a89	3590	I2C_TransferConfig(hi2c,DevAddress,MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
elmot	1:d0dfbce63a89	3591
elmot	1:d0dfbce63a89	3592	/* Wait until TXIS flag is set */
elmot	1:d0dfbce63a89	3593	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	3594	{
elmot	1:d0dfbce63a89	3595	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	3596	{
elmot	1:d0dfbce63a89	3597	return HAL_ERROR;
elmot	1:d0dfbce63a89	3598	}
elmot	1:d0dfbce63a89	3599	else
elmot	1:d0dfbce63a89	3600	{
elmot	1:d0dfbce63a89	3601	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	3602	}
elmot	1:d0dfbce63a89	3603	}
elmot	1:d0dfbce63a89	3604
elmot	1:d0dfbce63a89	3605	/* If Memory address size is 8Bit */
elmot	1:d0dfbce63a89	3606	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
elmot	1:d0dfbce63a89	3607	{
elmot	1:d0dfbce63a89	3608	/* Send Memory Address */
elmot	1:d0dfbce63a89	3609	hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
elmot	1:d0dfbce63a89	3610	}
elmot	1:d0dfbce63a89	3611	/* If Memory address size is 16Bit */
elmot	1:d0dfbce63a89	3612	else
elmot	1:d0dfbce63a89	3613	{
elmot	1:d0dfbce63a89	3614	/* Send MSB of Memory Address */
elmot	1:d0dfbce63a89	3615	hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
elmot	1:d0dfbce63a89	3616
elmot	1:d0dfbce63a89	3617	/* Wait until TXIS flag is set */
elmot	1:d0dfbce63a89	3618	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	3619	{
elmot	1:d0dfbce63a89	3620	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	3621	{
elmot	1:d0dfbce63a89	3622	return HAL_ERROR;
elmot	1:d0dfbce63a89	3623	}
elmot	1:d0dfbce63a89	3624	else
elmot	1:d0dfbce63a89	3625	{
elmot	1:d0dfbce63a89	3626	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	3627	}
elmot	1:d0dfbce63a89	3628	}
elmot	1:d0dfbce63a89	3629
elmot	1:d0dfbce63a89	3630	/* Send LSB of Memory Address */
elmot	1:d0dfbce63a89	3631	hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
elmot	1:d0dfbce63a89	3632	}
elmot	1:d0dfbce63a89	3633
elmot	1:d0dfbce63a89	3634	/* Wait until TCR flag is set */
elmot	1:d0dfbce63a89	3635	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	3636	{
elmot	1:d0dfbce63a89	3637	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	3638	}
elmot	1:d0dfbce63a89	3639
elmot	1:d0dfbce63a89	3640	return HAL_OK;
elmot	1:d0dfbce63a89	3641	}
elmot	1:d0dfbce63a89	3642
elmot	1:d0dfbce63a89	3643	/**
elmot	1:d0dfbce63a89	3644	* @brief Master sends target device address followed by internal memory address for read request.
elmot	1:d0dfbce63a89	3645	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	3646	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	3647	* @param DevAddress Target device address
elmot	1:d0dfbce63a89	3648	* @param MemAddress Internal memory address
elmot	1:d0dfbce63a89	3649	* @param MemAddSize Size of internal memory address
elmot	1:d0dfbce63a89	3650	* @param Timeout Timeout duration
elmot	1:d0dfbce63a89	3651	* @param Tickstart Tick start value
elmot	1:d0dfbce63a89	3652	* @retval HAL status
elmot	1:d0dfbce63a89	3653	*/
elmot	1:d0dfbce63a89	3654	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
elmot	1:d0dfbce63a89	3655	{
elmot	1:d0dfbce63a89	3656	I2C_TransferConfig(hi2c,DevAddress,MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE);
elmot	1:d0dfbce63a89	3657
elmot	1:d0dfbce63a89	3658	/* Wait until TXIS flag is set */
elmot	1:d0dfbce63a89	3659	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	3660	{
elmot	1:d0dfbce63a89	3661	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	3662	{
elmot	1:d0dfbce63a89	3663	return HAL_ERROR;
elmot	1:d0dfbce63a89	3664	}
elmot	1:d0dfbce63a89	3665	else
elmot	1:d0dfbce63a89	3666	{
elmot	1:d0dfbce63a89	3667	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	3668	}
elmot	1:d0dfbce63a89	3669	}
elmot	1:d0dfbce63a89	3670
elmot	1:d0dfbce63a89	3671	/* If Memory address size is 8Bit */
elmot	1:d0dfbce63a89	3672	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
elmot	1:d0dfbce63a89	3673	{
elmot	1:d0dfbce63a89	3674	/* Send Memory Address */
elmot	1:d0dfbce63a89	3675	hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
elmot	1:d0dfbce63a89	3676	}
elmot	1:d0dfbce63a89	3677	/* If Memory address size is 16Bit */
elmot	1:d0dfbce63a89	3678	else
elmot	1:d0dfbce63a89	3679	{
elmot	1:d0dfbce63a89	3680	/* Send MSB of Memory Address */
elmot	1:d0dfbce63a89	3681	hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
elmot	1:d0dfbce63a89	3682
elmot	1:d0dfbce63a89	3683	/* Wait until TXIS flag is set */
elmot	1:d0dfbce63a89	3684	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	3685	{
elmot	1:d0dfbce63a89	3686	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
elmot	1:d0dfbce63a89	3687	{
elmot	1:d0dfbce63a89	3688	return HAL_ERROR;
elmot	1:d0dfbce63a89	3689	}
elmot	1:d0dfbce63a89	3690	else
elmot	1:d0dfbce63a89	3691	{
elmot	1:d0dfbce63a89	3692	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	3693	}
elmot	1:d0dfbce63a89	3694	}
elmot	1:d0dfbce63a89	3695
elmot	1:d0dfbce63a89	3696	/* Send LSB of Memory Address */
elmot	1:d0dfbce63a89	3697	hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
elmot	1:d0dfbce63a89	3698	}
elmot	1:d0dfbce63a89	3699
elmot	1:d0dfbce63a89	3700	/* Wait until TC flag is set */
elmot	1:d0dfbce63a89	3701	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	3702	{
elmot	1:d0dfbce63a89	3703	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	3704	}
elmot	1:d0dfbce63a89	3705
elmot	1:d0dfbce63a89	3706	return HAL_OK;
elmot	1:d0dfbce63a89	3707	}
elmot	1:d0dfbce63a89	3708
elmot	1:d0dfbce63a89	3709	/**
elmot	1:d0dfbce63a89	3710	* @brief I2C Address complete process callback.
elmot	1:d0dfbce63a89	3711	* @param hi2c I2C handle.
elmot	1:d0dfbce63a89	3712	* @param ITFlags Interrupt flags to handle.
elmot	1:d0dfbce63a89	3713	* @retval None
elmot	1:d0dfbce63a89	3714	*/
elmot	1:d0dfbce63a89	3715	static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
elmot	1:d0dfbce63a89	3716	{
elmot	1:d0dfbce63a89	3717	uint8_t transferdirection = 0U;
elmot	1:d0dfbce63a89	3718	uint16_t slaveaddrcode = 0U;
elmot	1:d0dfbce63a89	3719	uint16_t ownadd1code = 0U;
elmot	1:d0dfbce63a89	3720	uint16_t ownadd2code = 0U;
elmot	1:d0dfbce63a89	3721
elmot	1:d0dfbce63a89	3722	/* In case of Listen state, need to inform upper layer of address match code event */
elmot	1:d0dfbce63a89	3723	if((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN)
elmot	1:d0dfbce63a89	3724	{
elmot	1:d0dfbce63a89	3725	transferdirection = I2C_GET_DIR(hi2c);
elmot	1:d0dfbce63a89	3726	slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c);
elmot	1:d0dfbce63a89	3727	ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c);
elmot	1:d0dfbce63a89	3728	ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c);
elmot	1:d0dfbce63a89	3729
elmot	1:d0dfbce63a89	3730	/* If 10bits addressing mode is selected */
elmot	1:d0dfbce63a89	3731	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
elmot	1:d0dfbce63a89	3732	{
elmot	1:d0dfbce63a89	3733	if((slaveaddrcode & SlaveAddr_MSK) == ((ownadd1code >> SlaveAddr_SHIFT) & SlaveAddr_MSK))
elmot	1:d0dfbce63a89	3734	{
elmot	1:d0dfbce63a89	3735	slaveaddrcode = ownadd1code;
elmot	1:d0dfbce63a89	3736	hi2c->AddrEventCount++;
elmot	1:d0dfbce63a89	3737	if(hi2c->AddrEventCount == 2U)
elmot	1:d0dfbce63a89	3738	{
elmot	1:d0dfbce63a89	3739	/* Reset Address Event counter */
elmot	1:d0dfbce63a89	3740	hi2c->AddrEventCount = 0U;
elmot	1:d0dfbce63a89	3741
elmot	1:d0dfbce63a89	3742	/* Clear ADDR flag */
elmot	1:d0dfbce63a89	3743	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
elmot	1:d0dfbce63a89	3744
elmot	1:d0dfbce63a89	3745	/* Process Unlocked */
elmot	1:d0dfbce63a89	3746	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3747
elmot	1:d0dfbce63a89	3748	/* Call Slave Addr callback */
elmot	1:d0dfbce63a89	3749	HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode);
elmot	1:d0dfbce63a89	3750	}
elmot	1:d0dfbce63a89	3751	}
elmot	1:d0dfbce63a89	3752	else
elmot	1:d0dfbce63a89	3753	{
elmot	1:d0dfbce63a89	3754	slaveaddrcode = ownadd2code;
elmot	1:d0dfbce63a89	3755
elmot	1:d0dfbce63a89	3756	/* Disable ADDR Interrupts */
elmot	1:d0dfbce63a89	3757	I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
elmot	1:d0dfbce63a89	3758
elmot	1:d0dfbce63a89	3759	/* Process Unlocked */
elmot	1:d0dfbce63a89	3760	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3761
elmot	1:d0dfbce63a89	3762	/* Call Slave Addr callback */
elmot	1:d0dfbce63a89	3763	HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode);
elmot	1:d0dfbce63a89	3764	}
elmot	1:d0dfbce63a89	3765	}
elmot	1:d0dfbce63a89	3766	/* else 7 bits addressing mode is selected */
elmot	1:d0dfbce63a89	3767	else
elmot	1:d0dfbce63a89	3768	{
elmot	1:d0dfbce63a89	3769	/* Disable ADDR Interrupts */
elmot	1:d0dfbce63a89	3770	I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
elmot	1:d0dfbce63a89	3771
elmot	1:d0dfbce63a89	3772	/* Process Unlocked */
elmot	1:d0dfbce63a89	3773	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3774
elmot	1:d0dfbce63a89	3775	/* Call Slave Addr callback */
elmot	1:d0dfbce63a89	3776	HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode);
elmot	1:d0dfbce63a89	3777	}
elmot	1:d0dfbce63a89	3778	}
elmot	1:d0dfbce63a89	3779	/* Else clear address flag only */
elmot	1:d0dfbce63a89	3780	else
elmot	1:d0dfbce63a89	3781	{
elmot	1:d0dfbce63a89	3782	/* Clear ADDR flag */
elmot	1:d0dfbce63a89	3783	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
elmot	1:d0dfbce63a89	3784
elmot	1:d0dfbce63a89	3785	/* Process Unlocked */
elmot	1:d0dfbce63a89	3786	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3787	}
elmot	1:d0dfbce63a89	3788	}
elmot	1:d0dfbce63a89	3789
elmot	1:d0dfbce63a89	3790	/**
elmot	1:d0dfbce63a89	3791	* @brief I2C Master sequential complete process.
elmot	1:d0dfbce63a89	3792	* @param hi2c I2C handle.
elmot	1:d0dfbce63a89	3793	* @retval None
elmot	1:d0dfbce63a89	3794	*/
elmot	1:d0dfbce63a89	3795	static void I2C_ITMasterSequentialCplt(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	3796	{
elmot	1:d0dfbce63a89	3797	/* Reset I2C handle mode */
elmot	1:d0dfbce63a89	3798	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	3799
elmot	1:d0dfbce63a89	3800	/* No Generate Stop, to permit restart mode */
elmot	1:d0dfbce63a89	3801	/* The stop will be done at the end of transfer, when I2C_AUTOEND_MODE enable */
elmot	1:d0dfbce63a89	3802	if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
elmot	1:d0dfbce63a89	3803	{
elmot	1:d0dfbce63a89	3804	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	3805	hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
elmot	1:d0dfbce63a89	3806	hi2c->XferISR = NULL;
elmot	1:d0dfbce63a89	3807
elmot	1:d0dfbce63a89	3808	/* Disable Interrupts */
elmot	1:d0dfbce63a89	3809	I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);
elmot	1:d0dfbce63a89	3810
elmot	1:d0dfbce63a89	3811	/* Process Unlocked */
elmot	1:d0dfbce63a89	3812	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3813
elmot	1:d0dfbce63a89	3814	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	3815	HAL_I2C_MasterTxCpltCallback(hi2c);
elmot	1:d0dfbce63a89	3816	}
elmot	1:d0dfbce63a89	3817	/* hi2c->State == HAL_I2C_STATE_BUSY_RX */
elmot	1:d0dfbce63a89	3818	else
elmot	1:d0dfbce63a89	3819	{
elmot	1:d0dfbce63a89	3820	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	3821	hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
elmot	1:d0dfbce63a89	3822	hi2c->XferISR = NULL;
elmot	1:d0dfbce63a89	3823
elmot	1:d0dfbce63a89	3824	/* Disable Interrupts */
elmot	1:d0dfbce63a89	3825	I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);
elmot	1:d0dfbce63a89	3826
elmot	1:d0dfbce63a89	3827	/* Process Unlocked */
elmot	1:d0dfbce63a89	3828	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3829
elmot	1:d0dfbce63a89	3830	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	3831	HAL_I2C_MasterRxCpltCallback(hi2c);
elmot	1:d0dfbce63a89	3832	}
elmot	1:d0dfbce63a89	3833	}
elmot	1:d0dfbce63a89	3834
elmot	1:d0dfbce63a89	3835	/**
elmot	1:d0dfbce63a89	3836	* @brief I2C Slave sequential complete process.
elmot	1:d0dfbce63a89	3837	* @param hi2c I2C handle.
elmot	1:d0dfbce63a89	3838	* @retval None
elmot	1:d0dfbce63a89	3839	*/
elmot	1:d0dfbce63a89	3840	static void I2C_ITSlaveSequentialCplt(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	3841	{
elmot	1:d0dfbce63a89	3842	/* Reset I2C handle mode */
elmot	1:d0dfbce63a89	3843	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	3844
elmot	1:d0dfbce63a89	3845	if(hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)
elmot	1:d0dfbce63a89	3846	{
elmot	1:d0dfbce63a89	3847	/* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */
elmot	1:d0dfbce63a89	3848	hi2c->State = HAL_I2C_STATE_LISTEN;
elmot	1:d0dfbce63a89	3849	hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
elmot	1:d0dfbce63a89	3850
elmot	1:d0dfbce63a89	3851	/* Disable Interrupts */
elmot	1:d0dfbce63a89	3852	I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);
elmot	1:d0dfbce63a89	3853
elmot	1:d0dfbce63a89	3854	/* Process Unlocked */
elmot	1:d0dfbce63a89	3855	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3856
elmot	1:d0dfbce63a89	3857	/* Call the Tx complete callback to inform upper layer of the end of transmit process */
elmot	1:d0dfbce63a89	3858	HAL_I2C_SlaveTxCpltCallback(hi2c);
elmot	1:d0dfbce63a89	3859	}
elmot	1:d0dfbce63a89	3860
elmot	1:d0dfbce63a89	3861	else if(hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)
elmot	1:d0dfbce63a89	3862	{
elmot	1:d0dfbce63a89	3863	/* Remove HAL_I2C_STATE_SLAVE_BUSY_RX, keep only HAL_I2C_STATE_LISTEN */
elmot	1:d0dfbce63a89	3864	hi2c->State = HAL_I2C_STATE_LISTEN;
elmot	1:d0dfbce63a89	3865	hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
elmot	1:d0dfbce63a89	3866
elmot	1:d0dfbce63a89	3867	/* Disable Interrupts */
elmot	1:d0dfbce63a89	3868	I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);
elmot	1:d0dfbce63a89	3869
elmot	1:d0dfbce63a89	3870	/* Process Unlocked */
elmot	1:d0dfbce63a89	3871	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3872
elmot	1:d0dfbce63a89	3873	/* Call the Rx complete callback to inform upper layer of the end of receive process */
elmot	1:d0dfbce63a89	3874	HAL_I2C_SlaveRxCpltCallback(hi2c);
elmot	1:d0dfbce63a89	3875	}
elmot	1:d0dfbce63a89	3876	}
elmot	1:d0dfbce63a89	3877
elmot	1:d0dfbce63a89	3878	/**
elmot	1:d0dfbce63a89	3879	* @brief I2C Master complete process.
elmot	1:d0dfbce63a89	3880	* @param hi2c I2C handle.
elmot	1:d0dfbce63a89	3881	* @param ITFlags Interrupt flags to handle.
elmot	1:d0dfbce63a89	3882	* @retval None
elmot	1:d0dfbce63a89	3883	*/
elmot	1:d0dfbce63a89	3884	static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
elmot	1:d0dfbce63a89	3885	{
elmot	1:d0dfbce63a89	3886	/* Clear STOP Flag */
elmot	1:d0dfbce63a89	3887	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
elmot	1:d0dfbce63a89	3888
elmot	1:d0dfbce63a89	3889	/* Clear Configuration Register 2 */
elmot	1:d0dfbce63a89	3890	I2C_RESET_CR2(hi2c);
elmot	1:d0dfbce63a89	3891
elmot	1:d0dfbce63a89	3892	/* Reset handle parameters */
elmot	1:d0dfbce63a89	3893	hi2c->PreviousState = I2C_STATE_NONE;
elmot	1:d0dfbce63a89	3894	hi2c->XferISR = NULL;
elmot	1:d0dfbce63a89	3895	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	3896
elmot	1:d0dfbce63a89	3897	if((ITFlags & I2C_FLAG_AF) != RESET)
elmot	1:d0dfbce63a89	3898	{
elmot	1:d0dfbce63a89	3899	/* Clear NACK Flag */
elmot	1:d0dfbce63a89	3900	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
elmot	1:d0dfbce63a89	3901
elmot	1:d0dfbce63a89	3902	/* Set acknowledge error code */
elmot	1:d0dfbce63a89	3903	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
elmot	1:d0dfbce63a89	3904	}
elmot	1:d0dfbce63a89	3905
elmot	1:d0dfbce63a89	3906	/* Flush TX register */
elmot	1:d0dfbce63a89	3907	I2C_Flush_TXDR(hi2c);
elmot	1:d0dfbce63a89	3908
elmot	1:d0dfbce63a89	3909	/* Disable Interrupts */
elmot	1:d0dfbce63a89	3910	I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT\| I2C_XFER_RX_IT);
elmot	1:d0dfbce63a89	3911
elmot	1:d0dfbce63a89	3912	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	3913	if((hi2c->ErrorCode != HAL_I2C_ERROR_NONE) \|\| (hi2c->State == HAL_I2C_STATE_ABORT))
elmot	1:d0dfbce63a89	3914	{
elmot	1:d0dfbce63a89	3915	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	3916	I2C_ITError(hi2c, hi2c->ErrorCode);
elmot	1:d0dfbce63a89	3917	}
elmot	1:d0dfbce63a89	3918	/* hi2c->State == HAL_I2C_STATE_BUSY_TX */
elmot	1:d0dfbce63a89	3919	else if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
elmot	1:d0dfbce63a89	3920	{
elmot	1:d0dfbce63a89	3921	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	3922
elmot	1:d0dfbce63a89	3923	if (hi2c->Mode == HAL_I2C_MODE_MEM)
elmot	1:d0dfbce63a89	3924	{
elmot	1:d0dfbce63a89	3925	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	3926
elmot	1:d0dfbce63a89	3927	/* Process Unlocked */
elmot	1:d0dfbce63a89	3928	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3929
elmot	1:d0dfbce63a89	3930	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	3931	HAL_I2C_MemTxCpltCallback(hi2c);
elmot	1:d0dfbce63a89	3932	}
elmot	1:d0dfbce63a89	3933	else
elmot	1:d0dfbce63a89	3934	{
elmot	1:d0dfbce63a89	3935	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	3936
elmot	1:d0dfbce63a89	3937	/* Process Unlocked */
elmot	1:d0dfbce63a89	3938	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3939
elmot	1:d0dfbce63a89	3940	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	3941	HAL_I2C_MasterTxCpltCallback(hi2c);
elmot	1:d0dfbce63a89	3942	}
elmot	1:d0dfbce63a89	3943	}
elmot	1:d0dfbce63a89	3944	/* hi2c->State == HAL_I2C_STATE_BUSY_RX */
elmot	1:d0dfbce63a89	3945	else if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
elmot	1:d0dfbce63a89	3946	{
elmot	1:d0dfbce63a89	3947	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	3948
elmot	1:d0dfbce63a89	3949	if (hi2c->Mode == HAL_I2C_MODE_MEM)
elmot	1:d0dfbce63a89	3950	{
elmot	1:d0dfbce63a89	3951	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	3952
elmot	1:d0dfbce63a89	3953	/* Process Unlocked */
elmot	1:d0dfbce63a89	3954	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3955
elmot	1:d0dfbce63a89	3956	HAL_I2C_MemRxCpltCallback(hi2c);
elmot	1:d0dfbce63a89	3957	}
elmot	1:d0dfbce63a89	3958	else
elmot	1:d0dfbce63a89	3959	{
elmot	1:d0dfbce63a89	3960	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	3961
elmot	1:d0dfbce63a89	3962	/* Process Unlocked */
elmot	1:d0dfbce63a89	3963	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	3964
elmot	1:d0dfbce63a89	3965	HAL_I2C_MasterRxCpltCallback(hi2c);
elmot	1:d0dfbce63a89	3966	}
elmot	1:d0dfbce63a89	3967	}
elmot	1:d0dfbce63a89	3968	}
elmot	1:d0dfbce63a89	3969
elmot	1:d0dfbce63a89	3970	/**
elmot	1:d0dfbce63a89	3971	* @brief I2C Slave complete process.
elmot	1:d0dfbce63a89	3972	* @param hi2c I2C handle.
elmot	1:d0dfbce63a89	3973	* @param ITFlags Interrupt flags to handle.
elmot	1:d0dfbce63a89	3974	* @retval None
elmot	1:d0dfbce63a89	3975	*/
elmot	1:d0dfbce63a89	3976	static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
elmot	1:d0dfbce63a89	3977	{
elmot	1:d0dfbce63a89	3978	/* Clear STOP Flag */
elmot	1:d0dfbce63a89	3979	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
elmot	1:d0dfbce63a89	3980
elmot	1:d0dfbce63a89	3981	/* Clear ADDR flag */
elmot	1:d0dfbce63a89	3982	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
elmot	1:d0dfbce63a89	3983
elmot	1:d0dfbce63a89	3984	/* Disable all interrupts */
elmot	1:d0dfbce63a89	3985	I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT \| I2C_XFER_TX_IT \| I2C_XFER_RX_IT);
elmot	1:d0dfbce63a89	3986
elmot	1:d0dfbce63a89	3987	/* Disable Address Acknowledge */
elmot	1:d0dfbce63a89	3988	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	3989
elmot	1:d0dfbce63a89	3990	/* Clear Configuration Register 2 */
elmot	1:d0dfbce63a89	3991	I2C_RESET_CR2(hi2c);
elmot	1:d0dfbce63a89	3992
elmot	1:d0dfbce63a89	3993	/* Flush TX register */
elmot	1:d0dfbce63a89	3994	I2C_Flush_TXDR(hi2c);
elmot	1:d0dfbce63a89	3995
elmot	1:d0dfbce63a89	3996	/* If a DMA is ongoing, Update handle size context */
elmot	1:d0dfbce63a89	3997	if(((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) \|\|
elmot	1:d0dfbce63a89	3998	((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN))
elmot	1:d0dfbce63a89	3999	{
elmot	1:d0dfbce63a89	4000	hi2c->XferCount = I2C_GET_DMA_REMAIN_DATA(hi2c);
elmot	1:d0dfbce63a89	4001	}
elmot	1:d0dfbce63a89	4002
elmot	1:d0dfbce63a89	4003	/* All data are not transferred, so set error code accordingly */
elmot	1:d0dfbce63a89	4004	if(hi2c->XferCount != 0U)
elmot	1:d0dfbce63a89	4005	{
elmot	1:d0dfbce63a89	4006	/* Set ErrorCode corresponding to a Non-Acknowledge */
elmot	1:d0dfbce63a89	4007	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
elmot	1:d0dfbce63a89	4008	}
elmot	1:d0dfbce63a89	4009
elmot	1:d0dfbce63a89	4010	/* Store Last receive data if any */
elmot	1:d0dfbce63a89	4011	if(((ITFlags & I2C_FLAG_RXNE) != RESET))
elmot	1:d0dfbce63a89	4012	{
elmot	1:d0dfbce63a89	4013	/* Read data from RXDR */
elmot	1:d0dfbce63a89	4014	(*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
elmot	1:d0dfbce63a89	4015
elmot	1:d0dfbce63a89	4016	if((hi2c->XferSize > 0U))
elmot	1:d0dfbce63a89	4017	{
elmot	1:d0dfbce63a89	4018	hi2c->XferSize--;
elmot	1:d0dfbce63a89	4019	hi2c->XferCount--;
elmot	1:d0dfbce63a89	4020
elmot	1:d0dfbce63a89	4021	/* Set ErrorCode corresponding to a Non-Acknowledge */
elmot	1:d0dfbce63a89	4022	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
elmot	1:d0dfbce63a89	4023	}
elmot	1:d0dfbce63a89	4024	}
elmot	1:d0dfbce63a89	4025
elmot	1:d0dfbce63a89	4026	hi2c->PreviousState = I2C_STATE_NONE;
elmot	1:d0dfbce63a89	4027	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	4028	hi2c->XferISR = NULL;
elmot	1:d0dfbce63a89	4029
elmot	1:d0dfbce63a89	4030	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
elmot	1:d0dfbce63a89	4031	{
elmot	1:d0dfbce63a89	4032	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	4033	I2C_ITError(hi2c, hi2c->ErrorCode);
elmot	1:d0dfbce63a89	4034
elmot	1:d0dfbce63a89	4035	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
elmot	1:d0dfbce63a89	4036	if(hi2c->State == HAL_I2C_STATE_LISTEN)
elmot	1:d0dfbce63a89	4037	{
elmot	1:d0dfbce63a89	4038	/* Call I2C Listen complete process */
elmot	1:d0dfbce63a89	4039	I2C_ITListenCplt(hi2c, ITFlags);
elmot	1:d0dfbce63a89	4040	}
elmot	1:d0dfbce63a89	4041	}
elmot	1:d0dfbce63a89	4042	else if(hi2c->XferOptions != I2C_NO_OPTION_FRAME)
elmot	1:d0dfbce63a89	4043	{
elmot	1:d0dfbce63a89	4044	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	4045	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	4046
elmot	1:d0dfbce63a89	4047	/* Process Unlocked */
elmot	1:d0dfbce63a89	4048	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	4049
elmot	1:d0dfbce63a89	4050	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
elmot	1:d0dfbce63a89	4051	HAL_I2C_ListenCpltCallback(hi2c);
elmot	1:d0dfbce63a89	4052	}
elmot	1:d0dfbce63a89	4053	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	4054	else if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
elmot	1:d0dfbce63a89	4055	{
elmot	1:d0dfbce63a89	4056	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	4057
elmot	1:d0dfbce63a89	4058	/* Process Unlocked */
elmot	1:d0dfbce63a89	4059	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	4060
elmot	1:d0dfbce63a89	4061	/* Call the Slave Rx Complete callback */
elmot	1:d0dfbce63a89	4062	HAL_I2C_SlaveRxCpltCallback(hi2c);
elmot	1:d0dfbce63a89	4063	}
elmot	1:d0dfbce63a89	4064	else
elmot	1:d0dfbce63a89	4065	{
elmot	1:d0dfbce63a89	4066	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	4067
elmot	1:d0dfbce63a89	4068	/* Process Unlocked */
elmot	1:d0dfbce63a89	4069	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	4070
elmot	1:d0dfbce63a89	4071	/* Call the Slave Tx Complete callback */
elmot	1:d0dfbce63a89	4072	HAL_I2C_SlaveTxCpltCallback(hi2c);
elmot	1:d0dfbce63a89	4073	}
elmot	1:d0dfbce63a89	4074	}
elmot	1:d0dfbce63a89	4075
elmot	1:d0dfbce63a89	4076	/**
elmot	1:d0dfbce63a89	4077	* @brief I2C Listen complete process.
elmot	1:d0dfbce63a89	4078	* @param hi2c I2C handle.
elmot	1:d0dfbce63a89	4079	* @param ITFlags Interrupt flags to handle.
elmot	1:d0dfbce63a89	4080	* @retval None
elmot	1:d0dfbce63a89	4081	*/
elmot	1:d0dfbce63a89	4082	static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
elmot	1:d0dfbce63a89	4083	{
elmot	1:d0dfbce63a89	4084	/* Reset handle parameters */
elmot	1:d0dfbce63a89	4085	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	4086	hi2c->PreviousState = I2C_STATE_NONE;
elmot	1:d0dfbce63a89	4087	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	4088	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	4089	hi2c->XferISR = NULL;
elmot	1:d0dfbce63a89	4090
elmot	1:d0dfbce63a89	4091	/* Store Last receive data if any */
elmot	1:d0dfbce63a89	4092	if(((ITFlags & I2C_FLAG_RXNE) != RESET))
elmot	1:d0dfbce63a89	4093	{
elmot	1:d0dfbce63a89	4094	/* Read data from RXDR */
elmot	1:d0dfbce63a89	4095	(*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
elmot	1:d0dfbce63a89	4096
elmot	1:d0dfbce63a89	4097	if((hi2c->XferSize > 0U))
elmot	1:d0dfbce63a89	4098	{
elmot	1:d0dfbce63a89	4099	hi2c->XferSize--;
elmot	1:d0dfbce63a89	4100	hi2c->XferCount--;
elmot	1:d0dfbce63a89	4101
elmot	1:d0dfbce63a89	4102	/* Set ErrorCode corresponding to a Non-Acknowledge */
elmot	1:d0dfbce63a89	4103	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
elmot	1:d0dfbce63a89	4104	}
elmot	1:d0dfbce63a89	4105	}
elmot	1:d0dfbce63a89	4106
elmot	1:d0dfbce63a89	4107	/* Disable all Interrupts*/
elmot	1:d0dfbce63a89	4108	I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT \| I2C_XFER_RX_IT \| I2C_XFER_TX_IT);
elmot	1:d0dfbce63a89	4109
elmot	1:d0dfbce63a89	4110	/* Clear NACK Flag */
elmot	1:d0dfbce63a89	4111	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
elmot	1:d0dfbce63a89	4112
elmot	1:d0dfbce63a89	4113	/* Process Unlocked */
elmot	1:d0dfbce63a89	4114	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	4115
elmot	1:d0dfbce63a89	4116	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
elmot	1:d0dfbce63a89	4117	HAL_I2C_ListenCpltCallback(hi2c);
elmot	1:d0dfbce63a89	4118	}
elmot	1:d0dfbce63a89	4119
elmot	1:d0dfbce63a89	4120	/**
elmot	1:d0dfbce63a89	4121	* @brief I2C interrupts error process.
elmot	1:d0dfbce63a89	4122	* @param hi2c I2C handle.
elmot	1:d0dfbce63a89	4123	* @param ErrorCode Error code to handle.
elmot	1:d0dfbce63a89	4124	* @retval None
elmot	1:d0dfbce63a89	4125	*/
elmot	1:d0dfbce63a89	4126	static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode)
elmot	1:d0dfbce63a89	4127	{
elmot	1:d0dfbce63a89	4128	/* Reset handle parameters */
elmot	1:d0dfbce63a89	4129	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	4130	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
elmot	1:d0dfbce63a89	4131	hi2c->XferCount = 0U;
elmot	1:d0dfbce63a89	4132
elmot	1:d0dfbce63a89	4133	/* Set new error code */
elmot	1:d0dfbce63a89	4134	hi2c->ErrorCode \|= ErrorCode;
elmot	1:d0dfbce63a89	4135
elmot	1:d0dfbce63a89	4136	/* Disable Interrupts */
elmot	1:d0dfbce63a89	4137	if((hi2c->State == HAL_I2C_STATE_LISTEN) \|\|
elmot	1:d0dfbce63a89	4138	(hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) \|\|
elmot	1:d0dfbce63a89	4139	(hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN))
elmot	1:d0dfbce63a89	4140	{
elmot	1:d0dfbce63a89	4141	/* Disable all interrupts, except interrupts related to LISTEN state */
elmot	1:d0dfbce63a89	4142	I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT \| I2C_XFER_TX_IT);
elmot	1:d0dfbce63a89	4143
elmot	1:d0dfbce63a89	4144	/* keep HAL_I2C_STATE_LISTEN if set */
elmot	1:d0dfbce63a89	4145	hi2c->State = HAL_I2C_STATE_LISTEN;
elmot	1:d0dfbce63a89	4146	hi2c->PreviousState = I2C_STATE_NONE;
elmot	1:d0dfbce63a89	4147	hi2c->XferISR = I2C_Slave_ISR_IT;
elmot	1:d0dfbce63a89	4148	}
elmot	1:d0dfbce63a89	4149	else
elmot	1:d0dfbce63a89	4150	{
elmot	1:d0dfbce63a89	4151	/* Disable all interrupts */
elmot	1:d0dfbce63a89	4152	I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT \| I2C_XFER_RX_IT \| I2C_XFER_TX_IT);
elmot	1:d0dfbce63a89	4153
elmot	1:d0dfbce63a89	4154	/* If state is an abort treatment on goind, don't change state */
elmot	1:d0dfbce63a89	4155	/* This change will be do later */
elmot	1:d0dfbce63a89	4156	if(hi2c->State != HAL_I2C_STATE_ABORT)
elmot	1:d0dfbce63a89	4157	{
elmot	1:d0dfbce63a89	4158	/* Set HAL_I2C_STATE_READY */
elmot	1:d0dfbce63a89	4159	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	4160	}
elmot	1:d0dfbce63a89	4161	hi2c->PreviousState = I2C_STATE_NONE;
elmot	1:d0dfbce63a89	4162	hi2c->XferISR = NULL;
elmot	1:d0dfbce63a89	4163	}
elmot	1:d0dfbce63a89	4164
elmot	1:d0dfbce63a89	4165	/* Abort DMA TX transfer if any */
elmot	1:d0dfbce63a89	4166	if((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN)
elmot	1:d0dfbce63a89	4167	{
elmot	1:d0dfbce63a89	4168	hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
elmot	1:d0dfbce63a89	4169
elmot	1:d0dfbce63a89	4170	/* Set the I2C DMA Abort callback :
elmot	1:d0dfbce63a89	4171	will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
elmot	1:d0dfbce63a89	4172	hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
elmot	1:d0dfbce63a89	4173
elmot	1:d0dfbce63a89	4174	/* Process Unlocked */
elmot	1:d0dfbce63a89	4175	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	4176
elmot	1:d0dfbce63a89	4177	/* Abort DMA TX */
elmot	1:d0dfbce63a89	4178	if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
elmot	1:d0dfbce63a89	4179	{
elmot	1:d0dfbce63a89	4180	/* Call Directly XferAbortCallback function in case of error */
elmot	1:d0dfbce63a89	4181	hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
elmot	1:d0dfbce63a89	4182	}
elmot	1:d0dfbce63a89	4183	}
elmot	1:d0dfbce63a89	4184	/* Abort DMA RX transfer if any */
elmot	1:d0dfbce63a89	4185	else if((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN)
elmot	1:d0dfbce63a89	4186	{
elmot	1:d0dfbce63a89	4187	hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
elmot	1:d0dfbce63a89	4188
elmot	1:d0dfbce63a89	4189	/* Set the I2C DMA Abort callback :
elmot	1:d0dfbce63a89	4190	will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
elmot	1:d0dfbce63a89	4191	hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
elmot	1:d0dfbce63a89	4192
elmot	1:d0dfbce63a89	4193	/* Process Unlocked */
elmot	1:d0dfbce63a89	4194	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	4195
elmot	1:d0dfbce63a89	4196	/* Abort DMA RX */
elmot	1:d0dfbce63a89	4197	if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
elmot	1:d0dfbce63a89	4198	{
elmot	1:d0dfbce63a89	4199	/* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
elmot	1:d0dfbce63a89	4200	hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
elmot	1:d0dfbce63a89	4201	}
elmot	1:d0dfbce63a89	4202	}
elmot	1:d0dfbce63a89	4203	else if(hi2c->State == HAL_I2C_STATE_ABORT)
elmot	1:d0dfbce63a89	4204	{
elmot	1:d0dfbce63a89	4205	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	4206
elmot	1:d0dfbce63a89	4207	/* Process Unlocked */
elmot	1:d0dfbce63a89	4208	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	4209
elmot	1:d0dfbce63a89	4210	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	4211	HAL_I2C_AbortCpltCallback(hi2c);
elmot	1:d0dfbce63a89	4212	}
elmot	1:d0dfbce63a89	4213	else
elmot	1:d0dfbce63a89	4214	{
elmot	1:d0dfbce63a89	4215	/* Process Unlocked */
elmot	1:d0dfbce63a89	4216	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	4217
elmot	1:d0dfbce63a89	4218	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	4219	HAL_I2C_ErrorCallback(hi2c);
elmot	1:d0dfbce63a89	4220	}
elmot	1:d0dfbce63a89	4221	}
elmot	1:d0dfbce63a89	4222
elmot	1:d0dfbce63a89	4223	/**
elmot	1:d0dfbce63a89	4224	* @brief I2C Tx data register flush process.
elmot	1:d0dfbce63a89	4225	* @param hi2c I2C handle.
elmot	1:d0dfbce63a89	4226	* @retval None
elmot	1:d0dfbce63a89	4227	*/
elmot	1:d0dfbce63a89	4228	static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c)
elmot	1:d0dfbce63a89	4229	{
elmot	1:d0dfbce63a89	4230	/* If a pending TXIS flag is set */
elmot	1:d0dfbce63a89	4231	/* Write a dummy data in TXDR to clear it */
elmot	1:d0dfbce63a89	4232	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET)
elmot	1:d0dfbce63a89	4233	{
elmot	1:d0dfbce63a89	4234	hi2c->Instance->TXDR = 0x00U;
elmot	1:d0dfbce63a89	4235	}
elmot	1:d0dfbce63a89	4236
elmot	1:d0dfbce63a89	4237	/* Flush TX register if not empty */
elmot	1:d0dfbce63a89	4238	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
elmot	1:d0dfbce63a89	4239	{
elmot	1:d0dfbce63a89	4240	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE);
elmot	1:d0dfbce63a89	4241	}
elmot	1:d0dfbce63a89	4242	}
elmot	1:d0dfbce63a89	4243
elmot	1:d0dfbce63a89	4244	/**
elmot	1:d0dfbce63a89	4245	* @brief DMA I2C master transmit process complete callback.
elmot	1:d0dfbce63a89	4246	* @param hdma DMA handle
elmot	1:d0dfbce63a89	4247	* @retval None
elmot	1:d0dfbce63a89	4248	*/
elmot	1:d0dfbce63a89	4249	static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
elmot	1:d0dfbce63a89	4250	{
elmot	1:d0dfbce63a89	4251	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
elmot	1:d0dfbce63a89	4252
elmot	1:d0dfbce63a89	4253	/* Disable DMA Request */
elmot	1:d0dfbce63a89	4254	hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
elmot	1:d0dfbce63a89	4255
elmot	1:d0dfbce63a89	4256	/* If last transfer, enable STOP interrupt */
elmot	1:d0dfbce63a89	4257	if(hi2c->XferCount == 0U)
elmot	1:d0dfbce63a89	4258	{
elmot	1:d0dfbce63a89	4259	/* Enable STOP interrupt */
elmot	1:d0dfbce63a89	4260	I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);
elmot	1:d0dfbce63a89	4261	}
elmot	1:d0dfbce63a89	4262	/* else prepare a new DMA transfer and enable TCReload interrupt */
elmot	1:d0dfbce63a89	4263	else
elmot	1:d0dfbce63a89	4264	{
elmot	1:d0dfbce63a89	4265	/* Update Buffer pointer */
elmot	1:d0dfbce63a89	4266	hi2c->pBuffPtr += hi2c->XferSize;
elmot	1:d0dfbce63a89	4267
elmot	1:d0dfbce63a89	4268	/* Set the XferSize to transfer */
elmot	1:d0dfbce63a89	4269	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	4270	{
elmot	1:d0dfbce63a89	4271	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	4272	}
elmot	1:d0dfbce63a89	4273	else
elmot	1:d0dfbce63a89	4274	{
elmot	1:d0dfbce63a89	4275	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	4276	}
elmot	1:d0dfbce63a89	4277
elmot	1:d0dfbce63a89	4278	/* Enable the DMA channel */
elmot	1:d0dfbce63a89	4279	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
elmot	1:d0dfbce63a89	4280
elmot	1:d0dfbce63a89	4281	/* Enable TC interrupts */
elmot	1:d0dfbce63a89	4282	I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT);
elmot	1:d0dfbce63a89	4283	}
elmot	1:d0dfbce63a89	4284	}
elmot	1:d0dfbce63a89	4285
elmot	1:d0dfbce63a89	4286	/**
elmot	1:d0dfbce63a89	4287	* @brief DMA I2C slave transmit process complete callback.
elmot	1:d0dfbce63a89	4288	* @param hdma DMA handle
elmot	1:d0dfbce63a89	4289	* @retval None
elmot	1:d0dfbce63a89	4290	*/
elmot	1:d0dfbce63a89	4291	static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
elmot	1:d0dfbce63a89	4292	{
elmot	1:d0dfbce63a89	4293	/* No specific action, Master fully manage the generation of STOP condition */
elmot	1:d0dfbce63a89	4294	/* Mean that this generation can arrive at any time, at the end or during DMA process */
elmot	1:d0dfbce63a89	4295	/* So STOP condition should be manage through Interrupt treatment */
elmot	1:d0dfbce63a89	4296	}
elmot	1:d0dfbce63a89	4297
elmot	1:d0dfbce63a89	4298	/**
elmot	1:d0dfbce63a89	4299	* @brief DMA I2C master receive process complete callback.
elmot	1:d0dfbce63a89	4300	* @param hdma DMA handle
elmot	1:d0dfbce63a89	4301	* @retval None
elmot	1:d0dfbce63a89	4302	*/
elmot	1:d0dfbce63a89	4303	static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
elmot	1:d0dfbce63a89	4304	{
elmot	1:d0dfbce63a89	4305	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
elmot	1:d0dfbce63a89	4306
elmot	1:d0dfbce63a89	4307	/* Disable DMA Request */
elmot	1:d0dfbce63a89	4308	hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
elmot	1:d0dfbce63a89	4309
elmot	1:d0dfbce63a89	4310	/* If last transfer, enable STOP interrupt */
elmot	1:d0dfbce63a89	4311	if(hi2c->XferCount == 0U)
elmot	1:d0dfbce63a89	4312	{
elmot	1:d0dfbce63a89	4313	/* Enable STOP interrupt */
elmot	1:d0dfbce63a89	4314	I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);
elmot	1:d0dfbce63a89	4315	}
elmot	1:d0dfbce63a89	4316	/* else prepare a new DMA transfer and enable TCReload interrupt */
elmot	1:d0dfbce63a89	4317	else
elmot	1:d0dfbce63a89	4318	{
elmot	1:d0dfbce63a89	4319	/* Update Buffer pointer */
elmot	1:d0dfbce63a89	4320	hi2c->pBuffPtr += hi2c->XferSize;
elmot	1:d0dfbce63a89	4321
elmot	1:d0dfbce63a89	4322	/* Set the XferSize to transfer */
elmot	1:d0dfbce63a89	4323	if(hi2c->XferCount > MAX_NBYTE_SIZE)
elmot	1:d0dfbce63a89	4324	{
elmot	1:d0dfbce63a89	4325	hi2c->XferSize = MAX_NBYTE_SIZE;
elmot	1:d0dfbce63a89	4326	}
elmot	1:d0dfbce63a89	4327	else
elmot	1:d0dfbce63a89	4328	{
elmot	1:d0dfbce63a89	4329	hi2c->XferSize = hi2c->XferCount;
elmot	1:d0dfbce63a89	4330	}
elmot	1:d0dfbce63a89	4331
elmot	1:d0dfbce63a89	4332	/* Enable the DMA channel */
elmot	1:d0dfbce63a89	4333	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
elmot	1:d0dfbce63a89	4334
elmot	1:d0dfbce63a89	4335	/* Enable TC interrupts */
elmot	1:d0dfbce63a89	4336	I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT);
elmot	1:d0dfbce63a89	4337	}
elmot	1:d0dfbce63a89	4338	}
elmot	1:d0dfbce63a89	4339
elmot	1:d0dfbce63a89	4340	/**
elmot	1:d0dfbce63a89	4341	* @brief DMA I2C slave receive process complete callback.
elmot	1:d0dfbce63a89	4342	* @param hdma DMA handle
elmot	1:d0dfbce63a89	4343	* @retval None
elmot	1:d0dfbce63a89	4344	*/
elmot	1:d0dfbce63a89	4345	static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
elmot	1:d0dfbce63a89	4346	{
elmot	1:d0dfbce63a89	4347	/* No specific action, Master fully manage the generation of STOP condition */
elmot	1:d0dfbce63a89	4348	/* Mean that this generation can arrive at any time, at the end or during DMA process */
elmot	1:d0dfbce63a89	4349	/* So STOP condition should be manage through Interrupt treatment */
elmot	1:d0dfbce63a89	4350	}
elmot	1:d0dfbce63a89	4351
elmot	1:d0dfbce63a89	4352	/**
elmot	1:d0dfbce63a89	4353	* @brief DMA I2C communication error callback.
elmot	1:d0dfbce63a89	4354	* @param hdma DMA handle
elmot	1:d0dfbce63a89	4355	* @retval None
elmot	1:d0dfbce63a89	4356	*/
elmot	1:d0dfbce63a89	4357	static void I2C_DMAError(DMA_HandleTypeDef *hdma)
elmot	1:d0dfbce63a89	4358	{
elmot	1:d0dfbce63a89	4359	I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
elmot	1:d0dfbce63a89	4360
elmot	1:d0dfbce63a89	4361	/* Disable Acknowledge */
elmot	1:d0dfbce63a89	4362	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	4363
elmot	1:d0dfbce63a89	4364	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	4365	I2C_ITError(hi2c, HAL_I2C_ERROR_DMA);
elmot	1:d0dfbce63a89	4366	}
elmot	1:d0dfbce63a89	4367
elmot	1:d0dfbce63a89	4368	/**
elmot	1:d0dfbce63a89	4369	* @brief DMA I2C communication abort callback
elmot	1:d0dfbce63a89	4370	* (To be called at end of DMA Abort procedure).
elmot	1:d0dfbce63a89	4371	* @param hdma: DMA handle.
elmot	1:d0dfbce63a89	4372	* @retval None
elmot	1:d0dfbce63a89	4373	*/
elmot	1:d0dfbce63a89	4374	static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
elmot	1:d0dfbce63a89	4375	{
elmot	1:d0dfbce63a89	4376	I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
elmot	1:d0dfbce63a89	4377
elmot	1:d0dfbce63a89	4378	/* Disable Acknowledge */
elmot	1:d0dfbce63a89	4379	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
elmot	1:d0dfbce63a89	4380
elmot	1:d0dfbce63a89	4381	/* Reset AbortCpltCallback */
elmot	1:d0dfbce63a89	4382	hi2c->hdmatx->XferAbortCallback = NULL;
elmot	1:d0dfbce63a89	4383	hi2c->hdmarx->XferAbortCallback = NULL;
elmot	1:d0dfbce63a89	4384
elmot	1:d0dfbce63a89	4385	/* Check if come from abort from user */
elmot	1:d0dfbce63a89	4386	if(hi2c->State == HAL_I2C_STATE_ABORT)
elmot	1:d0dfbce63a89	4387	{
elmot	1:d0dfbce63a89	4388	hi2c->State = HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	4389
elmot	1:d0dfbce63a89	4390	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	4391	HAL_I2C_AbortCpltCallback(hi2c);
elmot	1:d0dfbce63a89	4392	}
elmot	1:d0dfbce63a89	4393	else
elmot	1:d0dfbce63a89	4394	{
elmot	1:d0dfbce63a89	4395	/* Call the corresponding callback to inform upper layer of End of Transfer */
elmot	1:d0dfbce63a89	4396	HAL_I2C_ErrorCallback(hi2c);
elmot	1:d0dfbce63a89	4397	}
elmot	1:d0dfbce63a89	4398	}
elmot	1:d0dfbce63a89	4399
elmot	1:d0dfbce63a89	4400	/**
elmot	1:d0dfbce63a89	4401	* @brief This function handles I2C Communication Timeout.
elmot	1:d0dfbce63a89	4402	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	4403	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	4404	* @param Flag Specifies the I2C flag to check.
elmot	1:d0dfbce63a89	4405	* @param Status The new Flag status (SET or RESET).
elmot	1:d0dfbce63a89	4406	* @param Timeout Timeout duration
elmot	1:d0dfbce63a89	4407	* @param Tickstart Tick start value
elmot	1:d0dfbce63a89	4408	* @retval HAL status
elmot	1:d0dfbce63a89	4409	*/
elmot	1:d0dfbce63a89	4410	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
elmot	1:d0dfbce63a89	4411	{
elmot	1:d0dfbce63a89	4412	while(__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
elmot	1:d0dfbce63a89	4413	{
elmot	1:d0dfbce63a89	4414	/* Check for the Timeout */
elmot	1:d0dfbce63a89	4415	if(Timeout != HAL_MAX_DELAY)
elmot	1:d0dfbce63a89	4416	{
elmot	1:d0dfbce63a89	4417	if((Timeout == 0U)\|\|((HAL_GetTick() - Tickstart ) > Timeout))
elmot	1:d0dfbce63a89	4418	{
elmot	1:d0dfbce63a89	4419	hi2c->State= HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	4420	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	4421
elmot	1:d0dfbce63a89	4422	/* Process Unlocked */
elmot	1:d0dfbce63a89	4423	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	4424	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	4425	}
elmot	1:d0dfbce63a89	4426	}
elmot	1:d0dfbce63a89	4427	}
elmot	1:d0dfbce63a89	4428	return HAL_OK;
elmot	1:d0dfbce63a89	4429	}
elmot	1:d0dfbce63a89	4430
elmot	1:d0dfbce63a89	4431	/**
elmot	1:d0dfbce63a89	4432	* @brief This function handles I2C Communication Timeout for specific usage of TXIS flag.
elmot	1:d0dfbce63a89	4433	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	4434	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	4435	* @param Timeout Timeout duration
elmot	1:d0dfbce63a89	4436	* @param Tickstart Tick start value
elmot	1:d0dfbce63a89	4437	* @retval HAL status
elmot	1:d0dfbce63a89	4438	*/
elmot	1:d0dfbce63a89	4439	static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
elmot	1:d0dfbce63a89	4440	{
elmot	1:d0dfbce63a89	4441	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
elmot	1:d0dfbce63a89	4442	{
elmot	1:d0dfbce63a89	4443	/* Check if a NACK is detected */
elmot	1:d0dfbce63a89	4444	if(I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	4445	{
elmot	1:d0dfbce63a89	4446	return HAL_ERROR;
elmot	1:d0dfbce63a89	4447	}
elmot	1:d0dfbce63a89	4448
elmot	1:d0dfbce63a89	4449	/* Check for the Timeout */
elmot	1:d0dfbce63a89	4450	if(Timeout != HAL_MAX_DELAY)
elmot	1:d0dfbce63a89	4451	{
elmot	1:d0dfbce63a89	4452	if((Timeout == 0U)\|\|((HAL_GetTick() - Tickstart) > Timeout))
elmot	1:d0dfbce63a89	4453	{
elmot	1:d0dfbce63a89	4454	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
elmot	1:d0dfbce63a89	4455	hi2c->State= HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	4456	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	4457
elmot	1:d0dfbce63a89	4458	/* Process Unlocked */
elmot	1:d0dfbce63a89	4459	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	4460
elmot	1:d0dfbce63a89	4461	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	4462	}
elmot	1:d0dfbce63a89	4463	}
elmot	1:d0dfbce63a89	4464	}
elmot	1:d0dfbce63a89	4465	return HAL_OK;
elmot	1:d0dfbce63a89	4466	}
elmot	1:d0dfbce63a89	4467
elmot	1:d0dfbce63a89	4468	/**
elmot	1:d0dfbce63a89	4469	* @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
elmot	1:d0dfbce63a89	4470	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	4471	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	4472	* @param Timeout Timeout duration
elmot	1:d0dfbce63a89	4473	* @param Tickstart Tick start value
elmot	1:d0dfbce63a89	4474	* @retval HAL status
elmot	1:d0dfbce63a89	4475	*/
elmot	1:d0dfbce63a89	4476	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
elmot	1:d0dfbce63a89	4477	{
elmot	1:d0dfbce63a89	4478	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
elmot	1:d0dfbce63a89	4479	{
elmot	1:d0dfbce63a89	4480	/* Check if a NACK is detected */
elmot	1:d0dfbce63a89	4481	if(I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	4482	{
elmot	1:d0dfbce63a89	4483	return HAL_ERROR;
elmot	1:d0dfbce63a89	4484	}
elmot	1:d0dfbce63a89	4485
elmot	1:d0dfbce63a89	4486	/* Check for the Timeout */
elmot	1:d0dfbce63a89	4487	if((Timeout == 0U)\|\|((HAL_GetTick() - Tickstart) > Timeout))
elmot	1:d0dfbce63a89	4488	{
elmot	1:d0dfbce63a89	4489	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
elmot	1:d0dfbce63a89	4490	hi2c->State= HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	4491	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	4492
elmot	1:d0dfbce63a89	4493	/* Process Unlocked */
elmot	1:d0dfbce63a89	4494	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	4495
elmot	1:d0dfbce63a89	4496	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	4497	}
elmot	1:d0dfbce63a89	4498	}
elmot	1:d0dfbce63a89	4499	return HAL_OK;
elmot	1:d0dfbce63a89	4500	}
elmot	1:d0dfbce63a89	4501
elmot	1:d0dfbce63a89	4502	/**
elmot	1:d0dfbce63a89	4503	* @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
elmot	1:d0dfbce63a89	4504	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	4505	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	4506	* @param Timeout Timeout duration
elmot	1:d0dfbce63a89	4507	* @param Tickstart Tick start value
elmot	1:d0dfbce63a89	4508	* @retval HAL status
elmot	1:d0dfbce63a89	4509	*/
elmot	1:d0dfbce63a89	4510	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
elmot	1:d0dfbce63a89	4511	{
elmot	1:d0dfbce63a89	4512	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
elmot	1:d0dfbce63a89	4513	{
elmot	1:d0dfbce63a89	4514	/* Check if a NACK is detected */
elmot	1:d0dfbce63a89	4515	if(I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
elmot	1:d0dfbce63a89	4516	{
elmot	1:d0dfbce63a89	4517	return HAL_ERROR;
elmot	1:d0dfbce63a89	4518	}
elmot	1:d0dfbce63a89	4519
elmot	1:d0dfbce63a89	4520	/* Check if a STOPF is detected */
elmot	1:d0dfbce63a89	4521	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
elmot	1:d0dfbce63a89	4522	{
elmot	1:d0dfbce63a89	4523	/* Clear STOP Flag */
elmot	1:d0dfbce63a89	4524	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
elmot	1:d0dfbce63a89	4525
elmot	1:d0dfbce63a89	4526	/* Clear Configuration Register 2 */
elmot	1:d0dfbce63a89	4527	I2C_RESET_CR2(hi2c);
elmot	1:d0dfbce63a89	4528
elmot	1:d0dfbce63a89	4529	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
elmot	1:d0dfbce63a89	4530	hi2c->State= HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	4531	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	4532
elmot	1:d0dfbce63a89	4533	/* Process Unlocked */
elmot	1:d0dfbce63a89	4534	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	4535
elmot	1:d0dfbce63a89	4536	return HAL_ERROR;
elmot	1:d0dfbce63a89	4537	}
elmot	1:d0dfbce63a89	4538
elmot	1:d0dfbce63a89	4539	/* Check for the Timeout */
elmot	1:d0dfbce63a89	4540	if((Timeout == 0U)\|\|((HAL_GetTick() - Tickstart) > Timeout))
elmot	1:d0dfbce63a89	4541	{
elmot	1:d0dfbce63a89	4542	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
elmot	1:d0dfbce63a89	4543	hi2c->State= HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	4544
elmot	1:d0dfbce63a89	4545	/* Process Unlocked */
elmot	1:d0dfbce63a89	4546	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	4547
elmot	1:d0dfbce63a89	4548	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	4549	}
elmot	1:d0dfbce63a89	4550	}
elmot	1:d0dfbce63a89	4551	return HAL_OK;
elmot	1:d0dfbce63a89	4552	}
elmot	1:d0dfbce63a89	4553
elmot	1:d0dfbce63a89	4554	/**
elmot	1:d0dfbce63a89	4555	* @brief This function handles Acknowledge failed detection during an I2C Communication.
elmot	1:d0dfbce63a89	4556	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	4557	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	4558	* @param Timeout Timeout duration
elmot	1:d0dfbce63a89	4559	* @param Tickstart Tick start value
elmot	1:d0dfbce63a89	4560	* @retval HAL status
elmot	1:d0dfbce63a89	4561	*/
elmot	1:d0dfbce63a89	4562	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
elmot	1:d0dfbce63a89	4563	{
elmot	1:d0dfbce63a89	4564	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
elmot	1:d0dfbce63a89	4565	{
elmot	1:d0dfbce63a89	4566	/* Wait until STOP Flag is reset */
elmot	1:d0dfbce63a89	4567	/* AutoEnd should be initiate after AF */
elmot	1:d0dfbce63a89	4568	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
elmot	1:d0dfbce63a89	4569	{
elmot	1:d0dfbce63a89	4570	/* Check for the Timeout */
elmot	1:d0dfbce63a89	4571	if(Timeout != HAL_MAX_DELAY)
elmot	1:d0dfbce63a89	4572	{
elmot	1:d0dfbce63a89	4573	if((Timeout == 0U)\|\|((HAL_GetTick() - Tickstart) > Timeout))
elmot	1:d0dfbce63a89	4574	{
elmot	1:d0dfbce63a89	4575	hi2c->State= HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	4576	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	4577
elmot	1:d0dfbce63a89	4578	/* Process Unlocked */
elmot	1:d0dfbce63a89	4579	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	4580	return HAL_TIMEOUT;
elmot	1:d0dfbce63a89	4581	}
elmot	1:d0dfbce63a89	4582	}
elmot	1:d0dfbce63a89	4583	}
elmot	1:d0dfbce63a89	4584
elmot	1:d0dfbce63a89	4585	/* Clear NACKF Flag */
elmot	1:d0dfbce63a89	4586	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
elmot	1:d0dfbce63a89	4587
elmot	1:d0dfbce63a89	4588	/* Clear STOP Flag */
elmot	1:d0dfbce63a89	4589	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
elmot	1:d0dfbce63a89	4590
elmot	1:d0dfbce63a89	4591	/* Flush TX register */
elmot	1:d0dfbce63a89	4592	I2C_Flush_TXDR(hi2c);
elmot	1:d0dfbce63a89	4593
elmot	1:d0dfbce63a89	4594	/* Clear Configuration Register 2 */
elmot	1:d0dfbce63a89	4595	I2C_RESET_CR2(hi2c);
elmot	1:d0dfbce63a89	4596
elmot	1:d0dfbce63a89	4597	hi2c->ErrorCode = HAL_I2C_ERROR_AF;
elmot	1:d0dfbce63a89	4598	hi2c->State= HAL_I2C_STATE_READY;
elmot	1:d0dfbce63a89	4599	hi2c->Mode = HAL_I2C_MODE_NONE;
elmot	1:d0dfbce63a89	4600
elmot	1:d0dfbce63a89	4601	/* Process Unlocked */
elmot	1:d0dfbce63a89	4602	__HAL_UNLOCK(hi2c);
elmot	1:d0dfbce63a89	4603
elmot	1:d0dfbce63a89	4604	return HAL_ERROR;
elmot	1:d0dfbce63a89	4605	}
elmot	1:d0dfbce63a89	4606	return HAL_OK;
elmot	1:d0dfbce63a89	4607	}
elmot	1:d0dfbce63a89	4608
elmot	1:d0dfbce63a89	4609	/**
elmot	1:d0dfbce63a89	4610	* @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
elmot	1:d0dfbce63a89	4611	* @param hi2c I2C handle.
elmot	1:d0dfbce63a89	4612	* @param DevAddress Specifies the slave address to be programmed.
elmot	1:d0dfbce63a89	4613	* @param Size Specifies the number of bytes to be programmed.
elmot	1:d0dfbce63a89	4614	* This parameter must be a value between 0 and 255.
elmot	1:d0dfbce63a89	4615	* @param Mode New state of the I2C START condition generation.
elmot	1:d0dfbce63a89	4616	* This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4617	* @arg @ref I2C_RELOAD_MODE Enable Reload mode .
elmot	1:d0dfbce63a89	4618	* @arg @ref I2C_AUTOEND_MODE Enable Automatic end mode.
elmot	1:d0dfbce63a89	4619	* @arg @ref I2C_SOFTEND_MODE Enable Software end mode.
elmot	1:d0dfbce63a89	4620	* @param Request New state of the I2C START condition generation.
elmot	1:d0dfbce63a89	4621	* This parameter can be one of the following values:
elmot	1:d0dfbce63a89	4622	* @arg @ref I2C_NO_STARTSTOP Don't Generate stop and start condition.
elmot	1:d0dfbce63a89	4623	* @arg @ref I2C_GENERATE_STOP Generate stop condition (Size should be set to 0).
elmot	1:d0dfbce63a89	4624	* @arg @ref I2C_GENERATE_START_READ Generate Restart for read request.
elmot	1:d0dfbce63a89	4625	* @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request.
elmot	1:d0dfbce63a89	4626	* @retval None
elmot	1:d0dfbce63a89	4627	*/
elmot	1:d0dfbce63a89	4628	static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
elmot	1:d0dfbce63a89	4629	{
elmot	1:d0dfbce63a89	4630	uint32_t tmpreg = 0U;
elmot	1:d0dfbce63a89	4631
elmot	1:d0dfbce63a89	4632	/* Check the parameters */
elmot	1:d0dfbce63a89	4633	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
elmot	1:d0dfbce63a89	4634	assert_param(IS_TRANSFER_MODE(Mode));
elmot	1:d0dfbce63a89	4635	assert_param(IS_TRANSFER_REQUEST(Request));
elmot	1:d0dfbce63a89	4636
elmot	1:d0dfbce63a89	4637	/* Get the CR2 register value */
elmot	1:d0dfbce63a89	4638	tmpreg = hi2c->Instance->CR2;
elmot	1:d0dfbce63a89	4639
elmot	1:d0dfbce63a89	4640	/* clear tmpreg specific bits */
elmot	1:d0dfbce63a89	4641	tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD \| I2C_CR2_NBYTES \| I2C_CR2_RELOAD \| I2C_CR2_AUTOEND \| I2C_CR2_RD_WRN \| I2C_CR2_START \| I2C_CR2_STOP));
elmot	1:d0dfbce63a89	4642
elmot	1:d0dfbce63a89	4643	/* update tmpreg */
elmot	1:d0dfbce63a89	4644	tmpreg \|= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) \| (((uint32_t)Size << 16 ) & I2C_CR2_NBYTES) \| \
elmot	1:d0dfbce63a89	4645	(uint32_t)Mode \| (uint32_t)Request);
elmot	1:d0dfbce63a89	4646
elmot	1:d0dfbce63a89	4647	/* update CR2 register */
elmot	1:d0dfbce63a89	4648	hi2c->Instance->CR2 = tmpreg;
elmot	1:d0dfbce63a89	4649	}
elmot	1:d0dfbce63a89	4650
elmot	1:d0dfbce63a89	4651	/**
elmot	1:d0dfbce63a89	4652	* @brief Manage the enabling of Interrupts.
elmot	1:d0dfbce63a89	4653	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	4654	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	4655	* @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition.
elmot	1:d0dfbce63a89	4656	* @retval HAL status
elmot	1:d0dfbce63a89	4657	*/
elmot	1:d0dfbce63a89	4658	static HAL_StatusTypeDef I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest)
elmot	1:d0dfbce63a89	4659	{
elmot	1:d0dfbce63a89	4660	uint32_t tmpisr = 0U;
elmot	1:d0dfbce63a89	4661
elmot	1:d0dfbce63a89	4662	if((hi2c->XferISR == I2C_Master_ISR_DMA) \|\| \
elmot	1:d0dfbce63a89	4663	(hi2c->XferISR == I2C_Slave_ISR_DMA))
elmot	1:d0dfbce63a89	4664	{
elmot	1:d0dfbce63a89	4665	if((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT)
elmot	1:d0dfbce63a89	4666	{
elmot	1:d0dfbce63a89	4667	/* Enable ERR, STOP, NACK and ADDR interrupts */
elmot	1:d0dfbce63a89	4668	tmpisr \|= I2C_IT_ADDRI \| I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_ERRI;
elmot	1:d0dfbce63a89	4669	}
elmot	1:d0dfbce63a89	4670
elmot	1:d0dfbce63a89	4671	if((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT)
elmot	1:d0dfbce63a89	4672	{
elmot	1:d0dfbce63a89	4673	/* Enable ERR and NACK interrupts */
elmot	1:d0dfbce63a89	4674	tmpisr \|= I2C_IT_ERRI \| I2C_IT_NACKI;
elmot	1:d0dfbce63a89	4675	}
elmot	1:d0dfbce63a89	4676
elmot	1:d0dfbce63a89	4677	if((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT)
elmot	1:d0dfbce63a89	4678	{
elmot	1:d0dfbce63a89	4679	/* Enable STOP interrupts */
elmot	1:d0dfbce63a89	4680	tmpisr \|= I2C_IT_STOPI;
elmot	1:d0dfbce63a89	4681	}
elmot	1:d0dfbce63a89	4682
elmot	1:d0dfbce63a89	4683	if((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT)
elmot	1:d0dfbce63a89	4684	{
elmot	1:d0dfbce63a89	4685	/* Enable TC interrupts */
elmot	1:d0dfbce63a89	4686	tmpisr \|= I2C_IT_TCI;
elmot	1:d0dfbce63a89	4687	}
elmot	1:d0dfbce63a89	4688	}
elmot	1:d0dfbce63a89	4689	else
elmot	1:d0dfbce63a89	4690	{
elmot	1:d0dfbce63a89	4691	if((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT)
elmot	1:d0dfbce63a89	4692	{
elmot	1:d0dfbce63a89	4693	/* Enable ERR, STOP, NACK, and ADDR interrupts */
elmot	1:d0dfbce63a89	4694	tmpisr \|= I2C_IT_ADDRI \| I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_ERRI;
elmot	1:d0dfbce63a89	4695	}
elmot	1:d0dfbce63a89	4696
elmot	1:d0dfbce63a89	4697	if((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT)
elmot	1:d0dfbce63a89	4698	{
elmot	1:d0dfbce63a89	4699	/* Enable ERR, TC, STOP, NACK and RXI interrupts */
elmot	1:d0dfbce63a89	4700	tmpisr \|= I2C_IT_ERRI \| I2C_IT_TCI \| I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_TXI;
elmot	1:d0dfbce63a89	4701	}
elmot	1:d0dfbce63a89	4702
elmot	1:d0dfbce63a89	4703	if((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT)
elmot	1:d0dfbce63a89	4704	{
elmot	1:d0dfbce63a89	4705	/* Enable ERR, TC, STOP, NACK and TXI interrupts */
elmot	1:d0dfbce63a89	4706	tmpisr \|= I2C_IT_ERRI \| I2C_IT_TCI \| I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_RXI;
elmot	1:d0dfbce63a89	4707	}
elmot	1:d0dfbce63a89	4708
elmot	1:d0dfbce63a89	4709	if((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT)
elmot	1:d0dfbce63a89	4710	{
elmot	1:d0dfbce63a89	4711	/* Enable STOP interrupts */
elmot	1:d0dfbce63a89	4712	tmpisr \|= I2C_IT_STOPI;
elmot	1:d0dfbce63a89	4713	}
elmot	1:d0dfbce63a89	4714	}
elmot	1:d0dfbce63a89	4715
elmot	1:d0dfbce63a89	4716	/* Enable interrupts only at the end */
elmot	1:d0dfbce63a89	4717	/* to avoid the risk of I2C interrupt handle execution before */
elmot	1:d0dfbce63a89	4718	/* all interrupts requested done */
elmot	1:d0dfbce63a89	4719	__HAL_I2C_ENABLE_IT(hi2c, tmpisr);
elmot	1:d0dfbce63a89	4720
elmot	1:d0dfbce63a89	4721	return HAL_OK;
elmot	1:d0dfbce63a89	4722	}
elmot	1:d0dfbce63a89	4723
elmot	1:d0dfbce63a89	4724	/**
elmot	1:d0dfbce63a89	4725	* @brief Manage the disabling of Interrupts.
elmot	1:d0dfbce63a89	4726	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
elmot	1:d0dfbce63a89	4727	* the configuration information for the specified I2C.
elmot	1:d0dfbce63a89	4728	* @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition.
elmot	1:d0dfbce63a89	4729	* @retval HAL status
elmot	1:d0dfbce63a89	4730	*/
elmot	1:d0dfbce63a89	4731	static HAL_StatusTypeDef I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest)
elmot	1:d0dfbce63a89	4732	{
elmot	1:d0dfbce63a89	4733	uint32_t tmpisr = 0U;
elmot	1:d0dfbce63a89	4734
elmot	1:d0dfbce63a89	4735	if((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT)
elmot	1:d0dfbce63a89	4736	{
elmot	1:d0dfbce63a89	4737	/* Disable TC and TXI interrupts */
elmot	1:d0dfbce63a89	4738	tmpisr \|= I2C_IT_TCI \| I2C_IT_TXI;
elmot	1:d0dfbce63a89	4739
elmot	1:d0dfbce63a89	4740	if((hi2c->State & HAL_I2C_STATE_LISTEN) != HAL_I2C_STATE_LISTEN)
elmot	1:d0dfbce63a89	4741	{
elmot	1:d0dfbce63a89	4742	/* Disable NACK and STOP interrupts */
elmot	1:d0dfbce63a89	4743	tmpisr \|= I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_ERRI;
elmot	1:d0dfbce63a89	4744	}
elmot	1:d0dfbce63a89	4745	}
elmot	1:d0dfbce63a89	4746
elmot	1:d0dfbce63a89	4747	if((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT)
elmot	1:d0dfbce63a89	4748	{
elmot	1:d0dfbce63a89	4749	/* Disable TC and RXI interrupts */
elmot	1:d0dfbce63a89	4750	tmpisr \|= I2C_IT_TCI \| I2C_IT_RXI;
elmot	1:d0dfbce63a89	4751
elmot	1:d0dfbce63a89	4752	if((hi2c->State & HAL_I2C_STATE_LISTEN) != HAL_I2C_STATE_LISTEN)
elmot	1:d0dfbce63a89	4753	{
elmot	1:d0dfbce63a89	4754	/* Disable NACK and STOP interrupts */
elmot	1:d0dfbce63a89	4755	tmpisr \|= I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_ERRI;
elmot	1:d0dfbce63a89	4756	}
elmot	1:d0dfbce63a89	4757	}
elmot	1:d0dfbce63a89	4758
elmot	1:d0dfbce63a89	4759	if((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT)
elmot	1:d0dfbce63a89	4760	{
elmot	1:d0dfbce63a89	4761	/* Disable ADDR, NACK and STOP interrupts */
elmot	1:d0dfbce63a89	4762	tmpisr \|= I2C_IT_ADDRI \| I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_ERRI;
elmot	1:d0dfbce63a89	4763	}
elmot	1:d0dfbce63a89	4764
elmot	1:d0dfbce63a89	4765	if((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT)
elmot	1:d0dfbce63a89	4766	{
elmot	1:d0dfbce63a89	4767	/* Enable ERR and NACK interrupts */
elmot	1:d0dfbce63a89	4768	tmpisr \|= I2C_IT_ERRI \| I2C_IT_NACKI;
elmot	1:d0dfbce63a89	4769	}
elmot	1:d0dfbce63a89	4770
elmot	1:d0dfbce63a89	4771	if((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT)
elmot	1:d0dfbce63a89	4772	{
elmot	1:d0dfbce63a89	4773	/* Enable STOP interrupts */
elmot	1:d0dfbce63a89	4774	tmpisr \|= I2C_IT_STOPI;
elmot	1:d0dfbce63a89	4775	}
elmot	1:d0dfbce63a89	4776
elmot	1:d0dfbce63a89	4777	if((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT)
elmot	1:d0dfbce63a89	4778	{
elmot	1:d0dfbce63a89	4779	/* Enable TC interrupts */
elmot	1:d0dfbce63a89	4780	tmpisr \|= I2C_IT_TCI;
elmot	1:d0dfbce63a89	4781	}
elmot	1:d0dfbce63a89	4782
elmot	1:d0dfbce63a89	4783	/* Disable interrupts only at the end */
elmot	1:d0dfbce63a89	4784	/* to avoid a breaking situation like at "t" time */
elmot	1:d0dfbce63a89	4785	/* all disable interrupts request are not done */
elmot	1:d0dfbce63a89	4786	__HAL_I2C_DISABLE_IT(hi2c, tmpisr);
elmot	1:d0dfbce63a89	4787
elmot	1:d0dfbce63a89	4788	return HAL_OK;
elmot	1:d0dfbce63a89	4789	}
elmot	1:d0dfbce63a89	4790
elmot	1:d0dfbce63a89	4791	/**
elmot	1:d0dfbce63a89	4792	* @}
elmot	1:d0dfbce63a89	4793	*/
elmot	1:d0dfbce63a89	4794
elmot	1:d0dfbce63a89	4795	#endif /* HAL_I2C_MODULE_ENABLED */
elmot	1:d0dfbce63a89	4796	/**
elmot	1:d0dfbce63a89	4797	* @}
elmot	1:d0dfbce63a89	4798	*/
elmot	1:d0dfbce63a89	4799
elmot	1:d0dfbce63a89	4800	/**
elmot	1:d0dfbce63a89	4801	* @}
elmot	1:d0dfbce63a89	4802	*/
elmot	1:d0dfbce63a89	4803
elmot	1:d0dfbce63a89	4804	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Program
Created:	25 Feb 2017
Imports:	20
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