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HAL_L476/stm32l4xx_hal_flash_ex.c@1:d0dfbce63a89, 2017-02-24 (annotated)
- Committer:
- elmot
- Date:
- Fri Feb 24 21:13:56 2017 +0000
- Revision:
- 1:d0dfbce63a89
Ready-to-copy
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| elmot | 1:d0dfbce63a89 | 1 | /** |
| elmot | 1:d0dfbce63a89 | 2 | ****************************************************************************** |
| elmot | 1:d0dfbce63a89 | 3 | * @file stm32l4xx_hal_flash_ex.c |
| elmot | 1:d0dfbce63a89 | 4 | * @author MCD Application Team |
| elmot | 1:d0dfbce63a89 | 5 | * @version V1.5.1 |
| elmot | 1:d0dfbce63a89 | 6 | * @date 31-May-2016 |
| elmot | 1:d0dfbce63a89 | 7 | * @brief Extended FLASH HAL module driver. |
| elmot | 1:d0dfbce63a89 | 8 | * This file provides firmware functions to manage the following |
| elmot | 1:d0dfbce63a89 | 9 | * functionalities of the FLASH extended peripheral: |
| elmot | 1:d0dfbce63a89 | 10 | * + Extended programming operations functions |
| elmot | 1:d0dfbce63a89 | 11 | * |
| elmot | 1:d0dfbce63a89 | 12 | @verbatim |
| elmot | 1:d0dfbce63a89 | 13 | ============================================================================== |
| elmot | 1:d0dfbce63a89 | 14 | ##### Flash Extended features ##### |
| elmot | 1:d0dfbce63a89 | 15 | ============================================================================== |
| elmot | 1:d0dfbce63a89 | 16 | |
| elmot | 1:d0dfbce63a89 | 17 | [..] Comparing to other previous devices, the FLASH interface for STM32L4xx |
| elmot | 1:d0dfbce63a89 | 18 | devices contains the following additional features |
| elmot | 1:d0dfbce63a89 | 19 | |
| elmot | 1:d0dfbce63a89 | 20 | (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write |
| elmot | 1:d0dfbce63a89 | 21 | capability (RWW) |
| elmot | 1:d0dfbce63a89 | 22 | (+) Dual bank memory organization |
| elmot | 1:d0dfbce63a89 | 23 | (+) PCROP protection for all banks |
| elmot | 1:d0dfbce63a89 | 24 | |
| elmot | 1:d0dfbce63a89 | 25 | ##### How to use this driver ##### |
| elmot | 1:d0dfbce63a89 | 26 | ============================================================================== |
| elmot | 1:d0dfbce63a89 | 27 | [..] This driver provides functions to configure and program the FLASH memory |
| elmot | 1:d0dfbce63a89 | 28 | of all STM32L4xx devices. It includes |
| elmot | 1:d0dfbce63a89 | 29 | (#) Flash Memory Erase functions: |
| elmot | 1:d0dfbce63a89 | 30 | (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and |
| elmot | 1:d0dfbce63a89 | 31 | HAL_FLASH_Lock() functions |
| elmot | 1:d0dfbce63a89 | 32 | (++) Erase function: Erase page, erase all sectors |
| elmot | 1:d0dfbce63a89 | 33 | (++) There are two modes of erase : |
| elmot | 1:d0dfbce63a89 | 34 | (+++) Polling Mode using HAL_FLASHEx_Erase() |
| elmot | 1:d0dfbce63a89 | 35 | (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT() |
| elmot | 1:d0dfbce63a89 | 36 | |
| elmot | 1:d0dfbce63a89 | 37 | (#) Option Bytes Programming function: Use HAL_FLASHEx_OBProgram() to : |
| elmot | 1:d0dfbce63a89 | 38 | (++) Set/Reset the write protection |
| elmot | 1:d0dfbce63a89 | 39 | (++) Set the Read protection Level |
| elmot | 1:d0dfbce63a89 | 40 | (++) Program the user Option Bytes |
| elmot | 1:d0dfbce63a89 | 41 | (++) Configure the PCROP protection |
| elmot | 1:d0dfbce63a89 | 42 | |
| elmot | 1:d0dfbce63a89 | 43 | (#) Get Option Bytes Configuration function: Use HAL_FLASHEx_OBGetConfig() to : |
| elmot | 1:d0dfbce63a89 | 44 | (++) Get the value of a write protection area |
| elmot | 1:d0dfbce63a89 | 45 | (++) Know if the read protection is activated |
| elmot | 1:d0dfbce63a89 | 46 | (++) Get the value of the user Option Bytes |
| elmot | 1:d0dfbce63a89 | 47 | (++) Get the value of a PCROP area |
| elmot | 1:d0dfbce63a89 | 48 | |
| elmot | 1:d0dfbce63a89 | 49 | @endverbatim |
| elmot | 1:d0dfbce63a89 | 50 | ****************************************************************************** |
| elmot | 1:d0dfbce63a89 | 51 | * @attention |
| elmot | 1:d0dfbce63a89 | 52 | * |
| elmot | 1:d0dfbce63a89 | 53 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| elmot | 1:d0dfbce63a89 | 54 | * |
| elmot | 1:d0dfbce63a89 | 55 | * Redistribution and use in source and binary forms, with or without modification, |
| elmot | 1:d0dfbce63a89 | 56 | * are permitted provided that the following conditions are met: |
| elmot | 1:d0dfbce63a89 | 57 | * 1. Redistributions of source code must retain the above copyright notice, |
| elmot | 1:d0dfbce63a89 | 58 | * this list of conditions and the following disclaimer. |
| elmot | 1:d0dfbce63a89 | 59 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| elmot | 1:d0dfbce63a89 | 60 | * this list of conditions and the following disclaimer in the documentation |
| elmot | 1:d0dfbce63a89 | 61 | * and/or other materials provided with the distribution. |
| elmot | 1:d0dfbce63a89 | 62 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| elmot | 1:d0dfbce63a89 | 63 | * may be used to endorse or promote products derived from this software |
| elmot | 1:d0dfbce63a89 | 64 | * without specific prior written permission. |
| elmot | 1:d0dfbce63a89 | 65 | * |
| elmot | 1:d0dfbce63a89 | 66 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| elmot | 1:d0dfbce63a89 | 67 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| elmot | 1:d0dfbce63a89 | 68 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| elmot | 1:d0dfbce63a89 | 69 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| elmot | 1:d0dfbce63a89 | 70 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| elmot | 1:d0dfbce63a89 | 71 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| elmot | 1:d0dfbce63a89 | 72 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| elmot | 1:d0dfbce63a89 | 73 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| elmot | 1:d0dfbce63a89 | 74 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| elmot | 1:d0dfbce63a89 | 75 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| elmot | 1:d0dfbce63a89 | 76 | * |
| elmot | 1:d0dfbce63a89 | 77 | ****************************************************************************** |
| elmot | 1:d0dfbce63a89 | 78 | */ |
| elmot | 1:d0dfbce63a89 | 79 | |
| elmot | 1:d0dfbce63a89 | 80 | /* Includes ------------------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 81 | #include "stm32l4xx_hal.h" |
| elmot | 1:d0dfbce63a89 | 82 | |
| elmot | 1:d0dfbce63a89 | 83 | /** @addtogroup STM32L4xx_HAL_Driver |
| elmot | 1:d0dfbce63a89 | 84 | * @{ |
| elmot | 1:d0dfbce63a89 | 85 | */ |
| elmot | 1:d0dfbce63a89 | 86 | |
| elmot | 1:d0dfbce63a89 | 87 | /** @defgroup FLASHEx FLASHEx |
| elmot | 1:d0dfbce63a89 | 88 | * @brief FALSH Extended HAL module driver |
| elmot | 1:d0dfbce63a89 | 89 | * @{ |
| elmot | 1:d0dfbce63a89 | 90 | */ |
| elmot | 1:d0dfbce63a89 | 91 | |
| elmot | 1:d0dfbce63a89 | 92 | #ifdef HAL_FLASH_MODULE_ENABLED |
| elmot | 1:d0dfbce63a89 | 93 | |
| elmot | 1:d0dfbce63a89 | 94 | /* Private typedef -----------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 95 | /* Private define ------------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 96 | /* Private macro -------------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 97 | /* Private variables ---------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 98 | /** @defgroup FLASHEx_Private_Variables FLASHEx Private Variables |
| elmot | 1:d0dfbce63a89 | 99 | * @{ |
| elmot | 1:d0dfbce63a89 | 100 | */ |
| elmot | 1:d0dfbce63a89 | 101 | extern FLASH_ProcessTypeDef pFlash; |
| elmot | 1:d0dfbce63a89 | 102 | /** |
| elmot | 1:d0dfbce63a89 | 103 | * @} |
| elmot | 1:d0dfbce63a89 | 104 | */ |
| elmot | 1:d0dfbce63a89 | 105 | |
| elmot | 1:d0dfbce63a89 | 106 | /* Private function prototypes -----------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 107 | /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions |
| elmot | 1:d0dfbce63a89 | 108 | * @{ |
| elmot | 1:d0dfbce63a89 | 109 | */ |
| elmot | 1:d0dfbce63a89 | 110 | extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); |
| elmot | 1:d0dfbce63a89 | 111 | void FLASH_PageErase(uint32_t Page, uint32_t Banks); |
| elmot | 1:d0dfbce63a89 | 112 | static void FLASH_MassErase(uint32_t Banks); |
| elmot | 1:d0dfbce63a89 | 113 | void FLASH_FlushCaches(void); |
| elmot | 1:d0dfbce63a89 | 114 | static HAL_StatusTypeDef FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRDPEndOffset); |
| elmot | 1:d0dfbce63a89 | 115 | static HAL_StatusTypeDef FLASH_OB_RDPConfig(uint32_t RDPLevel); |
| elmot | 1:d0dfbce63a89 | 116 | static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig); |
| elmot | 1:d0dfbce63a89 | 117 | static HAL_StatusTypeDef FLASH_OB_PCROPConfig(uint32_t PCROPConfig, uint32_t PCROPStartAddr, uint32_t PCROPEndAddr); |
| elmot | 1:d0dfbce63a89 | 118 | static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t * WRPStartOffset, uint32_t * WRDPEndOffset); |
| elmot | 1:d0dfbce63a89 | 119 | static uint32_t FLASH_OB_GetRDP(void); |
| elmot | 1:d0dfbce63a89 | 120 | static uint32_t FLASH_OB_GetUser(void); |
| elmot | 1:d0dfbce63a89 | 121 | static void FLASH_OB_GetPCROP(uint32_t * PCROPConfig, uint32_t * PCROPStartAddr, uint32_t * PCROPEndAddr); |
| elmot | 1:d0dfbce63a89 | 122 | /** |
| elmot | 1:d0dfbce63a89 | 123 | * @} |
| elmot | 1:d0dfbce63a89 | 124 | */ |
| elmot | 1:d0dfbce63a89 | 125 | |
| elmot | 1:d0dfbce63a89 | 126 | /* Exported functions -------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 127 | /** @defgroup FLASHEx_Exported_Functions FLASH Extended Exported Functions |
| elmot | 1:d0dfbce63a89 | 128 | * @{ |
| elmot | 1:d0dfbce63a89 | 129 | */ |
| elmot | 1:d0dfbce63a89 | 130 | |
| elmot | 1:d0dfbce63a89 | 131 | /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions |
| elmot | 1:d0dfbce63a89 | 132 | * @brief Extended IO operation functions |
| elmot | 1:d0dfbce63a89 | 133 | * |
| elmot | 1:d0dfbce63a89 | 134 | @verbatim |
| elmot | 1:d0dfbce63a89 | 135 | =============================================================================== |
| elmot | 1:d0dfbce63a89 | 136 | ##### Extended programming operation functions ##### |
| elmot | 1:d0dfbce63a89 | 137 | =============================================================================== |
| elmot | 1:d0dfbce63a89 | 138 | [..] |
| elmot | 1:d0dfbce63a89 | 139 | This subsection provides a set of functions allowing to manage the Extended FLASH |
| elmot | 1:d0dfbce63a89 | 140 | programming operations Operations. |
| elmot | 1:d0dfbce63a89 | 141 | |
| elmot | 1:d0dfbce63a89 | 142 | @endverbatim |
| elmot | 1:d0dfbce63a89 | 143 | * @{ |
| elmot | 1:d0dfbce63a89 | 144 | */ |
| elmot | 1:d0dfbce63a89 | 145 | /** |
| elmot | 1:d0dfbce63a89 | 146 | * @brief Perform a mass erase or erase the specified FLASH memory pages. |
| elmot | 1:d0dfbce63a89 | 147 | * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that |
| elmot | 1:d0dfbce63a89 | 148 | * contains the configuration information for the erasing. |
| elmot | 1:d0dfbce63a89 | 149 | * |
| elmot | 1:d0dfbce63a89 | 150 | * @param[out] PageError : pointer to variable that contains the configuration |
| elmot | 1:d0dfbce63a89 | 151 | * information on faulty page in case of error (0xFFFFFFFF means that all |
| elmot | 1:d0dfbce63a89 | 152 | * the pages have been correctly erased) |
| elmot | 1:d0dfbce63a89 | 153 | * |
| elmot | 1:d0dfbce63a89 | 154 | * @retval HAL Status |
| elmot | 1:d0dfbce63a89 | 155 | */ |
| elmot | 1:d0dfbce63a89 | 156 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) |
| elmot | 1:d0dfbce63a89 | 157 | { |
| elmot | 1:d0dfbce63a89 | 158 | HAL_StatusTypeDef status = HAL_ERROR; |
| elmot | 1:d0dfbce63a89 | 159 | uint32_t page_index = 0; |
| elmot | 1:d0dfbce63a89 | 160 | |
| elmot | 1:d0dfbce63a89 | 161 | /* Process Locked */ |
| elmot | 1:d0dfbce63a89 | 162 | __HAL_LOCK(&pFlash); |
| elmot | 1:d0dfbce63a89 | 163 | |
| elmot | 1:d0dfbce63a89 | 164 | /* Check the parameters */ |
| elmot | 1:d0dfbce63a89 | 165 | assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); |
| elmot | 1:d0dfbce63a89 | 166 | |
| elmot | 1:d0dfbce63a89 | 167 | /* Wait for last operation to be completed */ |
| elmot | 1:d0dfbce63a89 | 168 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| elmot | 1:d0dfbce63a89 | 169 | |
| elmot | 1:d0dfbce63a89 | 170 | if (status == HAL_OK) |
| elmot | 1:d0dfbce63a89 | 171 | { |
| elmot | 1:d0dfbce63a89 | 172 | pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; |
| elmot | 1:d0dfbce63a89 | 173 | |
| elmot | 1:d0dfbce63a89 | 174 | if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) |
| elmot | 1:d0dfbce63a89 | 175 | { |
| elmot | 1:d0dfbce63a89 | 176 | /* Mass erase to be done */ |
| elmot | 1:d0dfbce63a89 | 177 | FLASH_MassErase(pEraseInit->Banks); |
| elmot | 1:d0dfbce63a89 | 178 | |
| elmot | 1:d0dfbce63a89 | 179 | /* Wait for last operation to be completed */ |
| elmot | 1:d0dfbce63a89 | 180 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| elmot | 1:d0dfbce63a89 | 181 | |
| elmot | 1:d0dfbce63a89 | 182 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 183 | /* If the erase operation is completed, disable the MER1 and MER2 Bits */ |
| elmot | 1:d0dfbce63a89 | 184 | CLEAR_BIT(FLASH->CR, (FLASH_CR_MER1 | FLASH_CR_MER2)); |
| elmot | 1:d0dfbce63a89 | 185 | #else |
| elmot | 1:d0dfbce63a89 | 186 | /* If the erase operation is completed, disable the MER1 Bit */ |
| elmot | 1:d0dfbce63a89 | 187 | CLEAR_BIT(FLASH->CR, (FLASH_CR_MER1)); |
| elmot | 1:d0dfbce63a89 | 188 | #endif |
| elmot | 1:d0dfbce63a89 | 189 | } |
| elmot | 1:d0dfbce63a89 | 190 | else |
| elmot | 1:d0dfbce63a89 | 191 | { |
| elmot | 1:d0dfbce63a89 | 192 | /*Initialization of PageError variable*/ |
| elmot | 1:d0dfbce63a89 | 193 | *PageError = 0xFFFFFFFF; |
| elmot | 1:d0dfbce63a89 | 194 | |
| elmot | 1:d0dfbce63a89 | 195 | for(page_index = pEraseInit->Page; page_index < (pEraseInit->Page + pEraseInit->NbPages); page_index++) |
| elmot | 1:d0dfbce63a89 | 196 | { |
| elmot | 1:d0dfbce63a89 | 197 | FLASH_PageErase(page_index, pEraseInit->Banks); |
| elmot | 1:d0dfbce63a89 | 198 | |
| elmot | 1:d0dfbce63a89 | 199 | /* Wait for last operation to be completed */ |
| elmot | 1:d0dfbce63a89 | 200 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| elmot | 1:d0dfbce63a89 | 201 | |
| elmot | 1:d0dfbce63a89 | 202 | /* If the erase operation is completed, disable the PER Bit */ |
| elmot | 1:d0dfbce63a89 | 203 | CLEAR_BIT(FLASH->CR, (FLASH_CR_PER | FLASH_CR_PNB)); |
| elmot | 1:d0dfbce63a89 | 204 | |
| elmot | 1:d0dfbce63a89 | 205 | if (status != HAL_OK) |
| elmot | 1:d0dfbce63a89 | 206 | { |
| elmot | 1:d0dfbce63a89 | 207 | /* In case of error, stop erase procedure and return the faulty address */ |
| elmot | 1:d0dfbce63a89 | 208 | *PageError = page_index; |
| elmot | 1:d0dfbce63a89 | 209 | break; |
| elmot | 1:d0dfbce63a89 | 210 | } |
| elmot | 1:d0dfbce63a89 | 211 | } |
| elmot | 1:d0dfbce63a89 | 212 | } |
| elmot | 1:d0dfbce63a89 | 213 | |
| elmot | 1:d0dfbce63a89 | 214 | /* Flush the caches to be sure of the data consistency */ |
| elmot | 1:d0dfbce63a89 | 215 | FLASH_FlushCaches(); |
| elmot | 1:d0dfbce63a89 | 216 | } |
| elmot | 1:d0dfbce63a89 | 217 | |
| elmot | 1:d0dfbce63a89 | 218 | /* Process Unlocked */ |
| elmot | 1:d0dfbce63a89 | 219 | __HAL_UNLOCK(&pFlash); |
| elmot | 1:d0dfbce63a89 | 220 | |
| elmot | 1:d0dfbce63a89 | 221 | return status; |
| elmot | 1:d0dfbce63a89 | 222 | } |
| elmot | 1:d0dfbce63a89 | 223 | |
| elmot | 1:d0dfbce63a89 | 224 | /** |
| elmot | 1:d0dfbce63a89 | 225 | * @brief Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled. |
| elmot | 1:d0dfbce63a89 | 226 | * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that |
| elmot | 1:d0dfbce63a89 | 227 | * contains the configuration information for the erasing. |
| elmot | 1:d0dfbce63a89 | 228 | * |
| elmot | 1:d0dfbce63a89 | 229 | * @retval HAL Status |
| elmot | 1:d0dfbce63a89 | 230 | */ |
| elmot | 1:d0dfbce63a89 | 231 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) |
| elmot | 1:d0dfbce63a89 | 232 | { |
| elmot | 1:d0dfbce63a89 | 233 | HAL_StatusTypeDef status = HAL_OK; |
| elmot | 1:d0dfbce63a89 | 234 | |
| elmot | 1:d0dfbce63a89 | 235 | /* Process Locked */ |
| elmot | 1:d0dfbce63a89 | 236 | __HAL_LOCK(&pFlash); |
| elmot | 1:d0dfbce63a89 | 237 | |
| elmot | 1:d0dfbce63a89 | 238 | /* Check the parameters */ |
| elmot | 1:d0dfbce63a89 | 239 | assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); |
| elmot | 1:d0dfbce63a89 | 240 | |
| elmot | 1:d0dfbce63a89 | 241 | pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; |
| elmot | 1:d0dfbce63a89 | 242 | |
| elmot | 1:d0dfbce63a89 | 243 | /* Enable End of Operation and Error interrupts */ |
| elmot | 1:d0dfbce63a89 | 244 | __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_OPERR); |
| elmot | 1:d0dfbce63a89 | 245 | |
| elmot | 1:d0dfbce63a89 | 246 | pFlash.Bank = pEraseInit->Banks; |
| elmot | 1:d0dfbce63a89 | 247 | |
| elmot | 1:d0dfbce63a89 | 248 | if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) |
| elmot | 1:d0dfbce63a89 | 249 | { |
| elmot | 1:d0dfbce63a89 | 250 | /* Mass erase to be done */ |
| elmot | 1:d0dfbce63a89 | 251 | pFlash.ProcedureOnGoing = FLASH_PROC_MASS_ERASE; |
| elmot | 1:d0dfbce63a89 | 252 | FLASH_MassErase(pEraseInit->Banks); |
| elmot | 1:d0dfbce63a89 | 253 | } |
| elmot | 1:d0dfbce63a89 | 254 | else |
| elmot | 1:d0dfbce63a89 | 255 | { |
| elmot | 1:d0dfbce63a89 | 256 | /* Erase by page to be done */ |
| elmot | 1:d0dfbce63a89 | 257 | pFlash.ProcedureOnGoing = FLASH_PROC_PAGE_ERASE; |
| elmot | 1:d0dfbce63a89 | 258 | pFlash.NbPagesToErase = pEraseInit->NbPages; |
| elmot | 1:d0dfbce63a89 | 259 | pFlash.Page = pEraseInit->Page; |
| elmot | 1:d0dfbce63a89 | 260 | |
| elmot | 1:d0dfbce63a89 | 261 | /*Erase 1st page and wait for IT */ |
| elmot | 1:d0dfbce63a89 | 262 | FLASH_PageErase(pEraseInit->Page, pEraseInit->Banks); |
| elmot | 1:d0dfbce63a89 | 263 | } |
| elmot | 1:d0dfbce63a89 | 264 | |
| elmot | 1:d0dfbce63a89 | 265 | return status; |
| elmot | 1:d0dfbce63a89 | 266 | } |
| elmot | 1:d0dfbce63a89 | 267 | |
| elmot | 1:d0dfbce63a89 | 268 | /** |
| elmot | 1:d0dfbce63a89 | 269 | * @brief Program Option bytes. |
| elmot | 1:d0dfbce63a89 | 270 | * @param pOBInit: pointer to an FLASH_OBInitStruct structure that |
| elmot | 1:d0dfbce63a89 | 271 | * contains the configuration information for the programming. |
| elmot | 1:d0dfbce63a89 | 272 | * |
| elmot | 1:d0dfbce63a89 | 273 | * @retval HAL Status |
| elmot | 1:d0dfbce63a89 | 274 | */ |
| elmot | 1:d0dfbce63a89 | 275 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit) |
| elmot | 1:d0dfbce63a89 | 276 | { |
| elmot | 1:d0dfbce63a89 | 277 | HAL_StatusTypeDef status = HAL_ERROR; |
| elmot | 1:d0dfbce63a89 | 278 | |
| elmot | 1:d0dfbce63a89 | 279 | /* Process Locked */ |
| elmot | 1:d0dfbce63a89 | 280 | __HAL_LOCK(&pFlash); |
| elmot | 1:d0dfbce63a89 | 281 | |
| elmot | 1:d0dfbce63a89 | 282 | /* Check the parameters */ |
| elmot | 1:d0dfbce63a89 | 283 | assert_param(IS_OPTIONBYTE(pOBInit->OptionType)); |
| elmot | 1:d0dfbce63a89 | 284 | |
| elmot | 1:d0dfbce63a89 | 285 | pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; |
| elmot | 1:d0dfbce63a89 | 286 | |
| elmot | 1:d0dfbce63a89 | 287 | /* Write protection configuration */ |
| elmot | 1:d0dfbce63a89 | 288 | if((pOBInit->OptionType & OPTIONBYTE_WRP) != RESET) |
| elmot | 1:d0dfbce63a89 | 289 | { |
| elmot | 1:d0dfbce63a89 | 290 | /* Configure of Write protection on the selected area */ |
| elmot | 1:d0dfbce63a89 | 291 | status = FLASH_OB_WRPConfig(pOBInit->WRPArea, pOBInit->WRPStartOffset, pOBInit->WRPEndOffset); |
| elmot | 1:d0dfbce63a89 | 292 | } |
| elmot | 1:d0dfbce63a89 | 293 | |
| elmot | 1:d0dfbce63a89 | 294 | /* Read protection configuration */ |
| elmot | 1:d0dfbce63a89 | 295 | if((pOBInit->OptionType & OPTIONBYTE_RDP) != RESET) |
| elmot | 1:d0dfbce63a89 | 296 | { |
| elmot | 1:d0dfbce63a89 | 297 | /* Configure the Read protection level */ |
| elmot | 1:d0dfbce63a89 | 298 | status = FLASH_OB_RDPConfig(pOBInit->RDPLevel); |
| elmot | 1:d0dfbce63a89 | 299 | } |
| elmot | 1:d0dfbce63a89 | 300 | |
| elmot | 1:d0dfbce63a89 | 301 | /* User Configuration */ |
| elmot | 1:d0dfbce63a89 | 302 | if((pOBInit->OptionType & OPTIONBYTE_USER) != RESET) |
| elmot | 1:d0dfbce63a89 | 303 | { |
| elmot | 1:d0dfbce63a89 | 304 | /* Configure the user option bytes */ |
| elmot | 1:d0dfbce63a89 | 305 | status = FLASH_OB_UserConfig(pOBInit->USERType, pOBInit->USERConfig); |
| elmot | 1:d0dfbce63a89 | 306 | } |
| elmot | 1:d0dfbce63a89 | 307 | |
| elmot | 1:d0dfbce63a89 | 308 | /* PCROP Configuration */ |
| elmot | 1:d0dfbce63a89 | 309 | if((pOBInit->OptionType & OPTIONBYTE_PCROP) != RESET) |
| elmot | 1:d0dfbce63a89 | 310 | { |
| elmot | 1:d0dfbce63a89 | 311 | /* Configure the Proprietary code readout protection */ |
| elmot | 1:d0dfbce63a89 | 312 | status = FLASH_OB_PCROPConfig(pOBInit->PCROPConfig, pOBInit->PCROPStartAddr, pOBInit->PCROPEndAddr); |
| elmot | 1:d0dfbce63a89 | 313 | } |
| elmot | 1:d0dfbce63a89 | 314 | |
| elmot | 1:d0dfbce63a89 | 315 | /* Process Unlocked */ |
| elmot | 1:d0dfbce63a89 | 316 | __HAL_UNLOCK(&pFlash); |
| elmot | 1:d0dfbce63a89 | 317 | |
| elmot | 1:d0dfbce63a89 | 318 | return status; |
| elmot | 1:d0dfbce63a89 | 319 | } |
| elmot | 1:d0dfbce63a89 | 320 | |
| elmot | 1:d0dfbce63a89 | 321 | /** |
| elmot | 1:d0dfbce63a89 | 322 | * @brief Get the Option bytes configuration. |
| elmot | 1:d0dfbce63a89 | 323 | * @param pOBInit: pointer to an FLASH_OBInitStruct structure that contains the |
| elmot | 1:d0dfbce63a89 | 324 | * configuration information. The fields pOBInit->WRPArea and |
| elmot | 1:d0dfbce63a89 | 325 | * pOBInit->PCROPConfig should indicate which area is requested |
| elmot | 1:d0dfbce63a89 | 326 | * for the WRP and PCROP |
| elmot | 1:d0dfbce63a89 | 327 | * |
| elmot | 1:d0dfbce63a89 | 328 | * @retval None |
| elmot | 1:d0dfbce63a89 | 329 | */ |
| elmot | 1:d0dfbce63a89 | 330 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) |
| elmot | 1:d0dfbce63a89 | 331 | { |
| elmot | 1:d0dfbce63a89 | 332 | pOBInit->OptionType = (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_PCROP); |
| elmot | 1:d0dfbce63a89 | 333 | |
| elmot | 1:d0dfbce63a89 | 334 | /* Get write protection on the selected area */ |
| elmot | 1:d0dfbce63a89 | 335 | FLASH_OB_GetWRP(pOBInit->WRPArea, &(pOBInit->WRPStartOffset), &(pOBInit->WRPEndOffset)); |
| elmot | 1:d0dfbce63a89 | 336 | |
| elmot | 1:d0dfbce63a89 | 337 | /* Get Read protection level */ |
| elmot | 1:d0dfbce63a89 | 338 | pOBInit->RDPLevel = FLASH_OB_GetRDP(); |
| elmot | 1:d0dfbce63a89 | 339 | |
| elmot | 1:d0dfbce63a89 | 340 | /* Get the user option bytes */ |
| elmot | 1:d0dfbce63a89 | 341 | pOBInit->USERConfig = FLASH_OB_GetUser(); |
| elmot | 1:d0dfbce63a89 | 342 | |
| elmot | 1:d0dfbce63a89 | 343 | /* Get the Proprietary code readout protection */ |
| elmot | 1:d0dfbce63a89 | 344 | FLASH_OB_GetPCROP(&(pOBInit->PCROPConfig), &(pOBInit->PCROPStartAddr), &(pOBInit->PCROPEndAddr)); |
| elmot | 1:d0dfbce63a89 | 345 | |
| elmot | 1:d0dfbce63a89 | 346 | } |
| elmot | 1:d0dfbce63a89 | 347 | |
| elmot | 1:d0dfbce63a89 | 348 | /** |
| elmot | 1:d0dfbce63a89 | 349 | * @} |
| elmot | 1:d0dfbce63a89 | 350 | */ |
| elmot | 1:d0dfbce63a89 | 351 | |
| elmot | 1:d0dfbce63a89 | 352 | /** |
| elmot | 1:d0dfbce63a89 | 353 | * @} |
| elmot | 1:d0dfbce63a89 | 354 | */ |
| elmot | 1:d0dfbce63a89 | 355 | |
| elmot | 1:d0dfbce63a89 | 356 | /* Private functions ---------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 357 | |
| elmot | 1:d0dfbce63a89 | 358 | /** @addtogroup FLASHEx_Private_Functions |
| elmot | 1:d0dfbce63a89 | 359 | * @{ |
| elmot | 1:d0dfbce63a89 | 360 | */ |
| elmot | 1:d0dfbce63a89 | 361 | /** |
| elmot | 1:d0dfbce63a89 | 362 | * @brief Mass erase of FLASH memory. |
| elmot | 1:d0dfbce63a89 | 363 | * @param Banks: Banks to be erased |
| elmot | 1:d0dfbce63a89 | 364 | * This parameter can be one of the following values: |
| elmot | 1:d0dfbce63a89 | 365 | * @arg FLASH_BANK_1: Bank1 to be erased |
| elmot | 1:d0dfbce63a89 | 366 | * @arg FLASH_BANK_2: Bank2 to be erased |
| elmot | 1:d0dfbce63a89 | 367 | * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased |
| elmot | 1:d0dfbce63a89 | 368 | * @retval None |
| elmot | 1:d0dfbce63a89 | 369 | */ |
| elmot | 1:d0dfbce63a89 | 370 | static void FLASH_MassErase(uint32_t Banks) |
| elmot | 1:d0dfbce63a89 | 371 | { |
| elmot | 1:d0dfbce63a89 | 372 | /* Check the parameters */ |
| elmot | 1:d0dfbce63a89 | 373 | assert_param(IS_FLASH_BANK(Banks)); |
| elmot | 1:d0dfbce63a89 | 374 | |
| elmot | 1:d0dfbce63a89 | 375 | /* Set the Mass Erase Bit for the bank 1 if requested */ |
| elmot | 1:d0dfbce63a89 | 376 | if((Banks & FLASH_BANK_1) != RESET) |
| elmot | 1:d0dfbce63a89 | 377 | { |
| elmot | 1:d0dfbce63a89 | 378 | SET_BIT(FLASH->CR, FLASH_CR_MER1); |
| elmot | 1:d0dfbce63a89 | 379 | } |
| elmot | 1:d0dfbce63a89 | 380 | |
| elmot | 1:d0dfbce63a89 | 381 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 382 | /* Set the Mass Erase Bit for the bank 2 if requested */ |
| elmot | 1:d0dfbce63a89 | 383 | if((Banks & FLASH_BANK_2) != RESET) |
| elmot | 1:d0dfbce63a89 | 384 | { |
| elmot | 1:d0dfbce63a89 | 385 | SET_BIT(FLASH->CR, FLASH_CR_MER2); |
| elmot | 1:d0dfbce63a89 | 386 | } |
| elmot | 1:d0dfbce63a89 | 387 | #endif |
| elmot | 1:d0dfbce63a89 | 388 | |
| elmot | 1:d0dfbce63a89 | 389 | /* Proceed to erase all sectors */ |
| elmot | 1:d0dfbce63a89 | 390 | SET_BIT(FLASH->CR, FLASH_CR_STRT); |
| elmot | 1:d0dfbce63a89 | 391 | } |
| elmot | 1:d0dfbce63a89 | 392 | |
| elmot | 1:d0dfbce63a89 | 393 | /** |
| elmot | 1:d0dfbce63a89 | 394 | * @brief Erase the specified FLASH memory page. |
| elmot | 1:d0dfbce63a89 | 395 | * @param Page: FLASH page to erase |
| elmot | 1:d0dfbce63a89 | 396 | * This parameter must be a value between 0 and (max number of pages in the bank - 1) |
| elmot | 1:d0dfbce63a89 | 397 | * @param Banks: Bank(s) where the page will be erased |
| elmot | 1:d0dfbce63a89 | 398 | * This parameter can be one or a combination of the following values: |
| elmot | 1:d0dfbce63a89 | 399 | * @arg FLASH_BANK_1: Page in bank 1 to be erased |
| elmot | 1:d0dfbce63a89 | 400 | * @arg FLASH_BANK_2: Page in bank 2 to be erased |
| elmot | 1:d0dfbce63a89 | 401 | * @retval None |
| elmot | 1:d0dfbce63a89 | 402 | */ |
| elmot | 1:d0dfbce63a89 | 403 | void FLASH_PageErase(uint32_t Page, uint32_t Banks) |
| elmot | 1:d0dfbce63a89 | 404 | { |
| elmot | 1:d0dfbce63a89 | 405 | /* Check the parameters */ |
| elmot | 1:d0dfbce63a89 | 406 | assert_param(IS_FLASH_PAGE(Page)); |
| elmot | 1:d0dfbce63a89 | 407 | assert_param(IS_FLASH_BANK_EXCLUSIVE(Banks)); |
| elmot | 1:d0dfbce63a89 | 408 | |
| elmot | 1:d0dfbce63a89 | 409 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 410 | if((Banks & FLASH_BANK_1) != RESET) |
| elmot | 1:d0dfbce63a89 | 411 | { |
| elmot | 1:d0dfbce63a89 | 412 | CLEAR_BIT(FLASH->CR, FLASH_CR_BKER); |
| elmot | 1:d0dfbce63a89 | 413 | } |
| elmot | 1:d0dfbce63a89 | 414 | else |
| elmot | 1:d0dfbce63a89 | 415 | { |
| elmot | 1:d0dfbce63a89 | 416 | SET_BIT(FLASH->CR, FLASH_CR_BKER); |
| elmot | 1:d0dfbce63a89 | 417 | } |
| elmot | 1:d0dfbce63a89 | 418 | #endif |
| elmot | 1:d0dfbce63a89 | 419 | |
| elmot | 1:d0dfbce63a89 | 420 | /* Proceed to erase the page */ |
| elmot | 1:d0dfbce63a89 | 421 | MODIFY_REG(FLASH->CR, FLASH_CR_PNB, (Page << 3)); |
| elmot | 1:d0dfbce63a89 | 422 | SET_BIT(FLASH->CR, FLASH_CR_PER); |
| elmot | 1:d0dfbce63a89 | 423 | SET_BIT(FLASH->CR, FLASH_CR_STRT); |
| elmot | 1:d0dfbce63a89 | 424 | } |
| elmot | 1:d0dfbce63a89 | 425 | |
| elmot | 1:d0dfbce63a89 | 426 | /** |
| elmot | 1:d0dfbce63a89 | 427 | * @brief Flush the instruction and data caches. |
| elmot | 1:d0dfbce63a89 | 428 | * @retval None |
| elmot | 1:d0dfbce63a89 | 429 | */ |
| elmot | 1:d0dfbce63a89 | 430 | void FLASH_FlushCaches(void) |
| elmot | 1:d0dfbce63a89 | 431 | { |
| elmot | 1:d0dfbce63a89 | 432 | /* Flush instruction cache */ |
| elmot | 1:d0dfbce63a89 | 433 | if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != RESET) |
| elmot | 1:d0dfbce63a89 | 434 | { |
| elmot | 1:d0dfbce63a89 | 435 | /* Disable instruction cache */ |
| elmot | 1:d0dfbce63a89 | 436 | __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); |
| elmot | 1:d0dfbce63a89 | 437 | /* Reset instruction cache */ |
| elmot | 1:d0dfbce63a89 | 438 | __HAL_FLASH_INSTRUCTION_CACHE_RESET(); |
| elmot | 1:d0dfbce63a89 | 439 | /* Enable instruction cache */ |
| elmot | 1:d0dfbce63a89 | 440 | __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); |
| elmot | 1:d0dfbce63a89 | 441 | } |
| elmot | 1:d0dfbce63a89 | 442 | |
| elmot | 1:d0dfbce63a89 | 443 | /* Flush data cache */ |
| elmot | 1:d0dfbce63a89 | 444 | if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) |
| elmot | 1:d0dfbce63a89 | 445 | { |
| elmot | 1:d0dfbce63a89 | 446 | /* Disable data cache */ |
| elmot | 1:d0dfbce63a89 | 447 | __HAL_FLASH_DATA_CACHE_DISABLE(); |
| elmot | 1:d0dfbce63a89 | 448 | /* Reset data cache */ |
| elmot | 1:d0dfbce63a89 | 449 | __HAL_FLASH_DATA_CACHE_RESET(); |
| elmot | 1:d0dfbce63a89 | 450 | /* Enable data cache */ |
| elmot | 1:d0dfbce63a89 | 451 | __HAL_FLASH_DATA_CACHE_ENABLE(); |
| elmot | 1:d0dfbce63a89 | 452 | } |
| elmot | 1:d0dfbce63a89 | 453 | } |
| elmot | 1:d0dfbce63a89 | 454 | |
| elmot | 1:d0dfbce63a89 | 455 | /** |
| elmot | 1:d0dfbce63a89 | 456 | * @brief Configure the write protection of the desired pages. |
| elmot | 1:d0dfbce63a89 | 457 | * |
| elmot | 1:d0dfbce63a89 | 458 | * @note When the memory read protection level is selected (RDP level = 1), |
| elmot | 1:d0dfbce63a89 | 459 | * it is not possible to program or erase Flash memory if the CPU debug |
| elmot | 1:d0dfbce63a89 | 460 | * features are connected (JTAG or single wire) or boot code is being |
| elmot | 1:d0dfbce63a89 | 461 | * executed from RAM or System flash, even if WRP is not activated. |
| elmot | 1:d0dfbce63a89 | 462 | * @note To configure the WRP options, the option lock bit OPTLOCK must be |
| elmot | 1:d0dfbce63a89 | 463 | * cleared with the call of the HAL_FLASH_OB_Unlock() function. |
| elmot | 1:d0dfbce63a89 | 464 | * @note To validate the WRP options, the option bytes must be reloaded |
| elmot | 1:d0dfbce63a89 | 465 | * through the call of the HAL_FLASH_OB_Launch() function. |
| elmot | 1:d0dfbce63a89 | 466 | * |
| elmot | 1:d0dfbce63a89 | 467 | * @param WRPArea: specifies the area to be configured. |
| elmot | 1:d0dfbce63a89 | 468 | * This parameter can be one of the following values: |
| elmot | 1:d0dfbce63a89 | 469 | * @arg OB_WRPAREA_BANK1_AREAA: Flash Bank 1 Area A |
| elmot | 1:d0dfbce63a89 | 470 | * @arg OB_WRPAREA_BANK1_AREAB: Flash Bank 1 Area B |
| elmot | 1:d0dfbce63a89 | 471 | * @arg OB_WRPAREA_BANK2_AREAA: Flash Bank 2 Area A (don't apply for STM32L43x/STM32L44x devices) |
| elmot | 1:d0dfbce63a89 | 472 | * @arg OB_WRPAREA_BANK2_AREAB: Flash Bank 2 Area B (don't apply for STM32L43x/STM32L44x devices) |
| elmot | 1:d0dfbce63a89 | 473 | * |
| elmot | 1:d0dfbce63a89 | 474 | * @param WRPStartOffset: specifies the start page of the write protected area |
| elmot | 1:d0dfbce63a89 | 475 | * This parameter can be page number between 0 and (max number of pages in the bank - 1) |
| elmot | 1:d0dfbce63a89 | 476 | * |
| elmot | 1:d0dfbce63a89 | 477 | * @param WRDPEndOffset: specifies the end page of the write protected area |
| elmot | 1:d0dfbce63a89 | 478 | * This parameter can be page number between WRPStartOffset and (max number of pages in the bank - 1) |
| elmot | 1:d0dfbce63a89 | 479 | * |
| elmot | 1:d0dfbce63a89 | 480 | * @retval HAL Status |
| elmot | 1:d0dfbce63a89 | 481 | */ |
| elmot | 1:d0dfbce63a89 | 482 | static HAL_StatusTypeDef FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRDPEndOffset) |
| elmot | 1:d0dfbce63a89 | 483 | { |
| elmot | 1:d0dfbce63a89 | 484 | HAL_StatusTypeDef status = HAL_OK; |
| elmot | 1:d0dfbce63a89 | 485 | |
| elmot | 1:d0dfbce63a89 | 486 | /* Check the parameters */ |
| elmot | 1:d0dfbce63a89 | 487 | assert_param(IS_OB_WRPAREA(WRPArea)); |
| elmot | 1:d0dfbce63a89 | 488 | assert_param(IS_FLASH_PAGE(WRPStartOffset)); |
| elmot | 1:d0dfbce63a89 | 489 | assert_param(IS_FLASH_PAGE(WRDPEndOffset)); |
| elmot | 1:d0dfbce63a89 | 490 | |
| elmot | 1:d0dfbce63a89 | 491 | /* Wait for last operation to be completed */ |
| elmot | 1:d0dfbce63a89 | 492 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| elmot | 1:d0dfbce63a89 | 493 | |
| elmot | 1:d0dfbce63a89 | 494 | if(status == HAL_OK) |
| elmot | 1:d0dfbce63a89 | 495 | { |
| elmot | 1:d0dfbce63a89 | 496 | /* Configure the write protected area */ |
| elmot | 1:d0dfbce63a89 | 497 | if(WRPArea == OB_WRPAREA_BANK1_AREAA) |
| elmot | 1:d0dfbce63a89 | 498 | { |
| elmot | 1:d0dfbce63a89 | 499 | MODIFY_REG(FLASH->WRP1AR, (FLASH_WRP1AR_WRP1A_STRT | FLASH_WRP1AR_WRP1A_END), |
| elmot | 1:d0dfbce63a89 | 500 | (WRPStartOffset | (WRDPEndOffset << 16))); |
| elmot | 1:d0dfbce63a89 | 501 | } |
| elmot | 1:d0dfbce63a89 | 502 | else if(WRPArea == OB_WRPAREA_BANK1_AREAB) |
| elmot | 1:d0dfbce63a89 | 503 | { |
| elmot | 1:d0dfbce63a89 | 504 | MODIFY_REG(FLASH->WRP1BR, (FLASH_WRP1BR_WRP1B_STRT | FLASH_WRP1BR_WRP1B_END), |
| elmot | 1:d0dfbce63a89 | 505 | (WRPStartOffset | (WRDPEndOffset << 16))); |
| elmot | 1:d0dfbce63a89 | 506 | } |
| elmot | 1:d0dfbce63a89 | 507 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 508 | else if(WRPArea == OB_WRPAREA_BANK2_AREAA) |
| elmot | 1:d0dfbce63a89 | 509 | { |
| elmot | 1:d0dfbce63a89 | 510 | MODIFY_REG(FLASH->WRP2AR, (FLASH_WRP2AR_WRP2A_STRT | FLASH_WRP2AR_WRP2A_END), |
| elmot | 1:d0dfbce63a89 | 511 | (WRPStartOffset | (WRDPEndOffset << 16))); |
| elmot | 1:d0dfbce63a89 | 512 | } |
| elmot | 1:d0dfbce63a89 | 513 | else if(WRPArea == OB_WRPAREA_BANK2_AREAB) |
| elmot | 1:d0dfbce63a89 | 514 | { |
| elmot | 1:d0dfbce63a89 | 515 | MODIFY_REG(FLASH->WRP2BR, (FLASH_WRP2BR_WRP2B_STRT | FLASH_WRP2BR_WRP2B_END), |
| elmot | 1:d0dfbce63a89 | 516 | (WRPStartOffset | (WRDPEndOffset << 16))); |
| elmot | 1:d0dfbce63a89 | 517 | } |
| elmot | 1:d0dfbce63a89 | 518 | #endif |
| elmot | 1:d0dfbce63a89 | 519 | |
| elmot | 1:d0dfbce63a89 | 520 | /* Set OPTSTRT Bit */ |
| elmot | 1:d0dfbce63a89 | 521 | SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); |
| elmot | 1:d0dfbce63a89 | 522 | |
| elmot | 1:d0dfbce63a89 | 523 | /* Wait for last operation to be completed */ |
| elmot | 1:d0dfbce63a89 | 524 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| elmot | 1:d0dfbce63a89 | 525 | |
| elmot | 1:d0dfbce63a89 | 526 | /* If the option byte program operation is completed, disable the OPTSTRT Bit */ |
| elmot | 1:d0dfbce63a89 | 527 | CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); |
| elmot | 1:d0dfbce63a89 | 528 | } |
| elmot | 1:d0dfbce63a89 | 529 | |
| elmot | 1:d0dfbce63a89 | 530 | return status; |
| elmot | 1:d0dfbce63a89 | 531 | } |
| elmot | 1:d0dfbce63a89 | 532 | |
| elmot | 1:d0dfbce63a89 | 533 | /** |
| elmot | 1:d0dfbce63a89 | 534 | * @brief Set the read protection level. |
| elmot | 1:d0dfbce63a89 | 535 | * |
| elmot | 1:d0dfbce63a89 | 536 | * @note To configure the RDP level, the option lock bit OPTLOCK must be |
| elmot | 1:d0dfbce63a89 | 537 | * cleared with the call of the HAL_FLASH_OB_Unlock() function. |
| elmot | 1:d0dfbce63a89 | 538 | * @note To validate the RDP level, the option bytes must be reloaded |
| elmot | 1:d0dfbce63a89 | 539 | * through the call of the HAL_FLASH_OB_Launch() function. |
| elmot | 1:d0dfbce63a89 | 540 | * @note !!! Warning : When enabling OB_RDP level 2 it's no more possible |
| elmot | 1:d0dfbce63a89 | 541 | * to go back to level 1 or 0 !!! |
| elmot | 1:d0dfbce63a89 | 542 | * |
| elmot | 1:d0dfbce63a89 | 543 | * @param RDPLevel: specifies the read protection level. |
| elmot | 1:d0dfbce63a89 | 544 | * This parameter can be one of the following values: |
| elmot | 1:d0dfbce63a89 | 545 | * @arg OB_RDP_LEVEL_0: No protection |
| elmot | 1:d0dfbce63a89 | 546 | * @arg OB_RDP_LEVEL_1: Read protection of the memory |
| elmot | 1:d0dfbce63a89 | 547 | * @arg OB_RDP_LEVEL_2: Full chip protection |
| elmot | 1:d0dfbce63a89 | 548 | * |
| elmot | 1:d0dfbce63a89 | 549 | * @retval HAL status |
| elmot | 1:d0dfbce63a89 | 550 | */ |
| elmot | 1:d0dfbce63a89 | 551 | static HAL_StatusTypeDef FLASH_OB_RDPConfig(uint32_t RDPLevel) |
| elmot | 1:d0dfbce63a89 | 552 | { |
| elmot | 1:d0dfbce63a89 | 553 | HAL_StatusTypeDef status = HAL_OK; |
| elmot | 1:d0dfbce63a89 | 554 | |
| elmot | 1:d0dfbce63a89 | 555 | /* Check the parameters */ |
| elmot | 1:d0dfbce63a89 | 556 | assert_param(IS_OB_RDP_LEVEL(RDPLevel)); |
| elmot | 1:d0dfbce63a89 | 557 | |
| elmot | 1:d0dfbce63a89 | 558 | /* Wait for last operation to be completed */ |
| elmot | 1:d0dfbce63a89 | 559 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| elmot | 1:d0dfbce63a89 | 560 | |
| elmot | 1:d0dfbce63a89 | 561 | if(status == HAL_OK) |
| elmot | 1:d0dfbce63a89 | 562 | { |
| elmot | 1:d0dfbce63a89 | 563 | /* Configure the RDP level in the option bytes register */ |
| elmot | 1:d0dfbce63a89 | 564 | MODIFY_REG(FLASH->OPTR, FLASH_OPTR_RDP, RDPLevel); |
| elmot | 1:d0dfbce63a89 | 565 | |
| elmot | 1:d0dfbce63a89 | 566 | /* Set OPTSTRT Bit */ |
| elmot | 1:d0dfbce63a89 | 567 | SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); |
| elmot | 1:d0dfbce63a89 | 568 | |
| elmot | 1:d0dfbce63a89 | 569 | /* Wait for last operation to be completed */ |
| elmot | 1:d0dfbce63a89 | 570 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| elmot | 1:d0dfbce63a89 | 571 | |
| elmot | 1:d0dfbce63a89 | 572 | /* If the option byte program operation is completed, disable the OPTSTRT Bit */ |
| elmot | 1:d0dfbce63a89 | 573 | CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); |
| elmot | 1:d0dfbce63a89 | 574 | } |
| elmot | 1:d0dfbce63a89 | 575 | |
| elmot | 1:d0dfbce63a89 | 576 | return status; |
| elmot | 1:d0dfbce63a89 | 577 | } |
| elmot | 1:d0dfbce63a89 | 578 | |
| elmot | 1:d0dfbce63a89 | 579 | /** |
| elmot | 1:d0dfbce63a89 | 580 | * @brief Program the FLASH User Option Byte. |
| elmot | 1:d0dfbce63a89 | 581 | * |
| elmot | 1:d0dfbce63a89 | 582 | * @note To configure the user option bytes, the option lock bit OPTLOCK must |
| elmot | 1:d0dfbce63a89 | 583 | * be cleared with the call of the HAL_FLASH_OB_Unlock() function. |
| elmot | 1:d0dfbce63a89 | 584 | * @note To validate the user option bytes, the option bytes must be reloaded |
| elmot | 1:d0dfbce63a89 | 585 | * through the call of the HAL_FLASH_OB_Launch() function. |
| elmot | 1:d0dfbce63a89 | 586 | * |
| elmot | 1:d0dfbce63a89 | 587 | * @param UserType: The FLASH User Option Bytes to be modified |
| elmot | 1:d0dfbce63a89 | 588 | * @param UserConfig: The FLASH User Option Bytes values: |
| elmot | 1:d0dfbce63a89 | 589 | * BOR_LEV(Bit8-10), nRST_STOP(Bit12), nRST_STDBY(Bit13), IWDG_SW(Bit16), |
| elmot | 1:d0dfbce63a89 | 590 | * IWDG_STOP(Bit17), IWDG_STDBY(Bit18), WWDG_SW(Bit19), BFB2(Bit20), |
| elmot | 1:d0dfbce63a89 | 591 | * DUALBANK(Bit21), nBOOT1(Bit23), SRAM2_PE(Bit24) and SRAM2_RST(Bit25). |
| elmot | 1:d0dfbce63a89 | 592 | * |
| elmot | 1:d0dfbce63a89 | 593 | * @retval HAL status |
| elmot | 1:d0dfbce63a89 | 594 | */ |
| elmot | 1:d0dfbce63a89 | 595 | static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig) |
| elmot | 1:d0dfbce63a89 | 596 | { |
| elmot | 1:d0dfbce63a89 | 597 | uint32_t optr_reg_val = 0; |
| elmot | 1:d0dfbce63a89 | 598 | uint32_t optr_reg_mask = 0; |
| elmot | 1:d0dfbce63a89 | 599 | HAL_StatusTypeDef status = HAL_OK; |
| elmot | 1:d0dfbce63a89 | 600 | |
| elmot | 1:d0dfbce63a89 | 601 | /* Check the parameters */ |
| elmot | 1:d0dfbce63a89 | 602 | assert_param(IS_OB_USER_TYPE(UserType)); |
| elmot | 1:d0dfbce63a89 | 603 | |
| elmot | 1:d0dfbce63a89 | 604 | /* Wait for last operation to be completed */ |
| elmot | 1:d0dfbce63a89 | 605 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| elmot | 1:d0dfbce63a89 | 606 | |
| elmot | 1:d0dfbce63a89 | 607 | if(status == HAL_OK) |
| elmot | 1:d0dfbce63a89 | 608 | { |
| elmot | 1:d0dfbce63a89 | 609 | if((UserType & OB_USER_BOR_LEV) != RESET) |
| elmot | 1:d0dfbce63a89 | 610 | { |
| elmot | 1:d0dfbce63a89 | 611 | /* BOR level option byte should be modified */ |
| elmot | 1:d0dfbce63a89 | 612 | assert_param(IS_OB_USER_BOR_LEVEL(UserConfig & FLASH_OPTR_BOR_LEV)); |
| elmot | 1:d0dfbce63a89 | 613 | |
| elmot | 1:d0dfbce63a89 | 614 | /* Set value and mask for BOR level option byte */ |
| elmot | 1:d0dfbce63a89 | 615 | optr_reg_val |= (UserConfig & FLASH_OPTR_BOR_LEV); |
| elmot | 1:d0dfbce63a89 | 616 | optr_reg_mask |= FLASH_OPTR_BOR_LEV; |
| elmot | 1:d0dfbce63a89 | 617 | } |
| elmot | 1:d0dfbce63a89 | 618 | |
| elmot | 1:d0dfbce63a89 | 619 | if((UserType & OB_USER_nRST_STOP) != RESET) |
| elmot | 1:d0dfbce63a89 | 620 | { |
| elmot | 1:d0dfbce63a89 | 621 | /* nRST_STOP option byte should be modified */ |
| elmot | 1:d0dfbce63a89 | 622 | assert_param(IS_OB_USER_STOP(UserConfig & FLASH_OPTR_nRST_STOP)); |
| elmot | 1:d0dfbce63a89 | 623 | |
| elmot | 1:d0dfbce63a89 | 624 | /* Set value and mask for nRST_STOP option byte */ |
| elmot | 1:d0dfbce63a89 | 625 | optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STOP); |
| elmot | 1:d0dfbce63a89 | 626 | optr_reg_mask |= FLASH_OPTR_nRST_STOP; |
| elmot | 1:d0dfbce63a89 | 627 | } |
| elmot | 1:d0dfbce63a89 | 628 | |
| elmot | 1:d0dfbce63a89 | 629 | if((UserType & OB_USER_nRST_STDBY) != RESET) |
| elmot | 1:d0dfbce63a89 | 630 | { |
| elmot | 1:d0dfbce63a89 | 631 | /* nRST_STDBY option byte should be modified */ |
| elmot | 1:d0dfbce63a89 | 632 | assert_param(IS_OB_USER_STANDBY(UserConfig & FLASH_OPTR_nRST_STDBY)); |
| elmot | 1:d0dfbce63a89 | 633 | |
| elmot | 1:d0dfbce63a89 | 634 | /* Set value and mask for nRST_STDBY option byte */ |
| elmot | 1:d0dfbce63a89 | 635 | optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STDBY); |
| elmot | 1:d0dfbce63a89 | 636 | optr_reg_mask |= FLASH_OPTR_nRST_STDBY; |
| elmot | 1:d0dfbce63a89 | 637 | } |
| elmot | 1:d0dfbce63a89 | 638 | |
| elmot | 1:d0dfbce63a89 | 639 | if((UserType & OB_USER_nRST_SHDW) != RESET) |
| elmot | 1:d0dfbce63a89 | 640 | { |
| elmot | 1:d0dfbce63a89 | 641 | /* nRST_SHDW option byte should be modified */ |
| elmot | 1:d0dfbce63a89 | 642 | assert_param(IS_OB_USER_SHUTDOWN(UserConfig & FLASH_OPTR_nRST_SHDW)); |
| elmot | 1:d0dfbce63a89 | 643 | |
| elmot | 1:d0dfbce63a89 | 644 | /* Set value and mask for nRST_SHDW option byte */ |
| elmot | 1:d0dfbce63a89 | 645 | optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_SHDW); |
| elmot | 1:d0dfbce63a89 | 646 | optr_reg_mask |= FLASH_OPTR_nRST_SHDW; |
| elmot | 1:d0dfbce63a89 | 647 | } |
| elmot | 1:d0dfbce63a89 | 648 | |
| elmot | 1:d0dfbce63a89 | 649 | if((UserType & OB_USER_IWDG_SW) != RESET) |
| elmot | 1:d0dfbce63a89 | 650 | { |
| elmot | 1:d0dfbce63a89 | 651 | /* IWDG_SW option byte should be modified */ |
| elmot | 1:d0dfbce63a89 | 652 | assert_param(IS_OB_USER_IWDG(UserConfig & FLASH_OPTR_IWDG_SW)); |
| elmot | 1:d0dfbce63a89 | 653 | |
| elmot | 1:d0dfbce63a89 | 654 | /* Set value and mask for IWDG_SW option byte */ |
| elmot | 1:d0dfbce63a89 | 655 | optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_SW); |
| elmot | 1:d0dfbce63a89 | 656 | optr_reg_mask |= FLASH_OPTR_IWDG_SW; |
| elmot | 1:d0dfbce63a89 | 657 | } |
| elmot | 1:d0dfbce63a89 | 658 | |
| elmot | 1:d0dfbce63a89 | 659 | if((UserType & OB_USER_IWDG_STOP) != RESET) |
| elmot | 1:d0dfbce63a89 | 660 | { |
| elmot | 1:d0dfbce63a89 | 661 | /* IWDG_STOP option byte should be modified */ |
| elmot | 1:d0dfbce63a89 | 662 | assert_param(IS_OB_USER_IWDG_STOP(UserConfig & FLASH_OPTR_IWDG_STOP)); |
| elmot | 1:d0dfbce63a89 | 663 | |
| elmot | 1:d0dfbce63a89 | 664 | /* Set value and mask for IWDG_STOP option byte */ |
| elmot | 1:d0dfbce63a89 | 665 | optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STOP); |
| elmot | 1:d0dfbce63a89 | 666 | optr_reg_mask |= FLASH_OPTR_IWDG_STOP; |
| elmot | 1:d0dfbce63a89 | 667 | } |
| elmot | 1:d0dfbce63a89 | 668 | |
| elmot | 1:d0dfbce63a89 | 669 | if((UserType & OB_USER_IWDG_STDBY) != RESET) |
| elmot | 1:d0dfbce63a89 | 670 | { |
| elmot | 1:d0dfbce63a89 | 671 | /* IWDG_STDBY option byte should be modified */ |
| elmot | 1:d0dfbce63a89 | 672 | assert_param(IS_OB_USER_IWDG_STDBY(UserConfig & FLASH_OPTR_IWDG_STDBY)); |
| elmot | 1:d0dfbce63a89 | 673 | |
| elmot | 1:d0dfbce63a89 | 674 | /* Set value and mask for IWDG_STDBY option byte */ |
| elmot | 1:d0dfbce63a89 | 675 | optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STDBY); |
| elmot | 1:d0dfbce63a89 | 676 | optr_reg_mask |= FLASH_OPTR_IWDG_STDBY; |
| elmot | 1:d0dfbce63a89 | 677 | } |
| elmot | 1:d0dfbce63a89 | 678 | |
| elmot | 1:d0dfbce63a89 | 679 | if((UserType & OB_USER_WWDG_SW) != RESET) |
| elmot | 1:d0dfbce63a89 | 680 | { |
| elmot | 1:d0dfbce63a89 | 681 | /* WWDG_SW option byte should be modified */ |
| elmot | 1:d0dfbce63a89 | 682 | assert_param(IS_OB_USER_WWDG(UserConfig & FLASH_OPTR_WWDG_SW)); |
| elmot | 1:d0dfbce63a89 | 683 | |
| elmot | 1:d0dfbce63a89 | 684 | /* Set value and mask for WWDG_SW option byte */ |
| elmot | 1:d0dfbce63a89 | 685 | optr_reg_val |= (UserConfig & FLASH_OPTR_WWDG_SW); |
| elmot | 1:d0dfbce63a89 | 686 | optr_reg_mask |= FLASH_OPTR_WWDG_SW; |
| elmot | 1:d0dfbce63a89 | 687 | } |
| elmot | 1:d0dfbce63a89 | 688 | |
| elmot | 1:d0dfbce63a89 | 689 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 690 | if((UserType & OB_USER_BFB2) != RESET) |
| elmot | 1:d0dfbce63a89 | 691 | { |
| elmot | 1:d0dfbce63a89 | 692 | /* BFB2 option byte should be modified */ |
| elmot | 1:d0dfbce63a89 | 693 | assert_param(IS_OB_USER_BFB2(UserConfig & FLASH_OPTR_BFB2)); |
| elmot | 1:d0dfbce63a89 | 694 | |
| elmot | 1:d0dfbce63a89 | 695 | /* Set value and mask for BFB2 option byte */ |
| elmot | 1:d0dfbce63a89 | 696 | optr_reg_val |= (UserConfig & FLASH_OPTR_BFB2); |
| elmot | 1:d0dfbce63a89 | 697 | optr_reg_mask |= FLASH_OPTR_BFB2; |
| elmot | 1:d0dfbce63a89 | 698 | } |
| elmot | 1:d0dfbce63a89 | 699 | |
| elmot | 1:d0dfbce63a89 | 700 | if((UserType & OB_USER_DUALBANK) != RESET) |
| elmot | 1:d0dfbce63a89 | 701 | { |
| elmot | 1:d0dfbce63a89 | 702 | /* DUALBANK option byte should be modified */ |
| elmot | 1:d0dfbce63a89 | 703 | assert_param(IS_OB_USER_DUALBANK(UserConfig & FLASH_OPTR_DUALBANK)); |
| elmot | 1:d0dfbce63a89 | 704 | |
| elmot | 1:d0dfbce63a89 | 705 | /* Set value and mask for DUALBANK option byte */ |
| elmot | 1:d0dfbce63a89 | 706 | optr_reg_val |= (UserConfig & FLASH_OPTR_DUALBANK); |
| elmot | 1:d0dfbce63a89 | 707 | optr_reg_mask |= FLASH_OPTR_DUALBANK; |
| elmot | 1:d0dfbce63a89 | 708 | } |
| elmot | 1:d0dfbce63a89 | 709 | #endif |
| elmot | 1:d0dfbce63a89 | 710 | |
| elmot | 1:d0dfbce63a89 | 711 | if((UserType & OB_USER_nBOOT1) != RESET) |
| elmot | 1:d0dfbce63a89 | 712 | { |
| elmot | 1:d0dfbce63a89 | 713 | /* nBOOT1 option byte should be modified */ |
| elmot | 1:d0dfbce63a89 | 714 | assert_param(IS_OB_USER_BOOT1(UserConfig & FLASH_OPTR_nBOOT1)); |
| elmot | 1:d0dfbce63a89 | 715 | |
| elmot | 1:d0dfbce63a89 | 716 | /* Set value and mask for nBOOT1 option byte */ |
| elmot | 1:d0dfbce63a89 | 717 | optr_reg_val |= (UserConfig & FLASH_OPTR_nBOOT1); |
| elmot | 1:d0dfbce63a89 | 718 | optr_reg_mask |= FLASH_OPTR_nBOOT1; |
| elmot | 1:d0dfbce63a89 | 719 | } |
| elmot | 1:d0dfbce63a89 | 720 | |
| elmot | 1:d0dfbce63a89 | 721 | if((UserType & OB_USER_SRAM2_PE) != RESET) |
| elmot | 1:d0dfbce63a89 | 722 | { |
| elmot | 1:d0dfbce63a89 | 723 | /* SRAM2_PE option byte should be modified */ |
| elmot | 1:d0dfbce63a89 | 724 | assert_param(IS_OB_USER_SRAM2_PARITY(UserConfig & FLASH_OPTR_SRAM2_PE)); |
| elmot | 1:d0dfbce63a89 | 725 | |
| elmot | 1:d0dfbce63a89 | 726 | /* Set value and mask for SRAM2_PE option byte */ |
| elmot | 1:d0dfbce63a89 | 727 | optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_PE); |
| elmot | 1:d0dfbce63a89 | 728 | optr_reg_mask |= FLASH_OPTR_SRAM2_PE; |
| elmot | 1:d0dfbce63a89 | 729 | } |
| elmot | 1:d0dfbce63a89 | 730 | |
| elmot | 1:d0dfbce63a89 | 731 | if((UserType & OB_USER_SRAM2_RST) != RESET) |
| elmot | 1:d0dfbce63a89 | 732 | { |
| elmot | 1:d0dfbce63a89 | 733 | /* SRAM2_RST option byte should be modified */ |
| elmot | 1:d0dfbce63a89 | 734 | assert_param(IS_OB_USER_SRAM2_RST(UserConfig & FLASH_OPTR_SRAM2_RST)); |
| elmot | 1:d0dfbce63a89 | 735 | |
| elmot | 1:d0dfbce63a89 | 736 | /* Set value and mask for SRAM2_RST option byte */ |
| elmot | 1:d0dfbce63a89 | 737 | optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_RST); |
| elmot | 1:d0dfbce63a89 | 738 | optr_reg_mask |= FLASH_OPTR_SRAM2_RST; |
| elmot | 1:d0dfbce63a89 | 739 | } |
| elmot | 1:d0dfbce63a89 | 740 | |
| elmot | 1:d0dfbce63a89 | 741 | #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) |
| elmot | 1:d0dfbce63a89 | 742 | if((UserType & OB_USER_nSWBOOT0) != RESET) |
| elmot | 1:d0dfbce63a89 | 743 | { |
| elmot | 1:d0dfbce63a89 | 744 | /* nSWBOOT0 option byte should be modified */ |
| elmot | 1:d0dfbce63a89 | 745 | assert_param(IS_OB_USER_SWBOOT0(UserConfig & FLASH_OPTR_nSWBOOT0)); |
| elmot | 1:d0dfbce63a89 | 746 | |
| elmot | 1:d0dfbce63a89 | 747 | /* Set value and mask for nSWBOOT0 option byte */ |
| elmot | 1:d0dfbce63a89 | 748 | optr_reg_val |= (UserConfig & FLASH_OPTR_nSWBOOT0); |
| elmot | 1:d0dfbce63a89 | 749 | optr_reg_mask |= FLASH_OPTR_nSWBOOT0; |
| elmot | 1:d0dfbce63a89 | 750 | } |
| elmot | 1:d0dfbce63a89 | 751 | |
| elmot | 1:d0dfbce63a89 | 752 | if((UserType & OB_USER_nBOOT0) != RESET) |
| elmot | 1:d0dfbce63a89 | 753 | { |
| elmot | 1:d0dfbce63a89 | 754 | /* nBOOT0 option byte should be modified */ |
| elmot | 1:d0dfbce63a89 | 755 | assert_param(IS_OB_USER_BOOT0(UserConfig & FLASH_OPTR_nBOOT0)); |
| elmot | 1:d0dfbce63a89 | 756 | |
| elmot | 1:d0dfbce63a89 | 757 | /* Set value and mask for nBOOT0 option byte */ |
| elmot | 1:d0dfbce63a89 | 758 | optr_reg_val |= (UserConfig & FLASH_OPTR_nBOOT0); |
| elmot | 1:d0dfbce63a89 | 759 | optr_reg_mask |= FLASH_OPTR_nBOOT0; |
| elmot | 1:d0dfbce63a89 | 760 | } |
| elmot | 1:d0dfbce63a89 | 761 | #endif |
| elmot | 1:d0dfbce63a89 | 762 | |
| elmot | 1:d0dfbce63a89 | 763 | /* Configure the option bytes register */ |
| elmot | 1:d0dfbce63a89 | 764 | MODIFY_REG(FLASH->OPTR, optr_reg_mask, optr_reg_val); |
| elmot | 1:d0dfbce63a89 | 765 | |
| elmot | 1:d0dfbce63a89 | 766 | /* Set OPTSTRT Bit */ |
| elmot | 1:d0dfbce63a89 | 767 | SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); |
| elmot | 1:d0dfbce63a89 | 768 | |
| elmot | 1:d0dfbce63a89 | 769 | /* Wait for last operation to be completed */ |
| elmot | 1:d0dfbce63a89 | 770 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| elmot | 1:d0dfbce63a89 | 771 | |
| elmot | 1:d0dfbce63a89 | 772 | /* If the option byte program operation is completed, disable the OPTSTRT Bit */ |
| elmot | 1:d0dfbce63a89 | 773 | CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); |
| elmot | 1:d0dfbce63a89 | 774 | } |
| elmot | 1:d0dfbce63a89 | 775 | |
| elmot | 1:d0dfbce63a89 | 776 | return status; |
| elmot | 1:d0dfbce63a89 | 777 | } |
| elmot | 1:d0dfbce63a89 | 778 | |
| elmot | 1:d0dfbce63a89 | 779 | /** |
| elmot | 1:d0dfbce63a89 | 780 | * @brief Configure the Proprietary code readout protection of the desired addresses. |
| elmot | 1:d0dfbce63a89 | 781 | * |
| elmot | 1:d0dfbce63a89 | 782 | * @note To configure the PCROP options, the option lock bit OPTLOCK must be |
| elmot | 1:d0dfbce63a89 | 783 | * cleared with the call of the HAL_FLASH_OB_Unlock() function. |
| elmot | 1:d0dfbce63a89 | 784 | * @note To validate the PCROP options, the option bytes must be reloaded |
| elmot | 1:d0dfbce63a89 | 785 | * through the call of the HAL_FLASH_OB_Launch() function. |
| elmot | 1:d0dfbce63a89 | 786 | * |
| elmot | 1:d0dfbce63a89 | 787 | * @param PCROPConfig: specifies the configuration (Bank to be configured and PCROP_RDP option). |
| elmot | 1:d0dfbce63a89 | 788 | * This parameter must be a combination of FLASH_BANK_1 or FLASH_BANK_2 |
| elmot | 1:d0dfbce63a89 | 789 | * with OB_PCROP_RDP_NOT_ERASE or OB_PCROP_RDP_ERASE |
| elmot | 1:d0dfbce63a89 | 790 | * |
| elmot | 1:d0dfbce63a89 | 791 | * @param PCROPStartAddr: specifies the start address of the Proprietary code readout protection |
| elmot | 1:d0dfbce63a89 | 792 | * This parameter can be an address between begin and end of the bank |
| elmot | 1:d0dfbce63a89 | 793 | * |
| elmot | 1:d0dfbce63a89 | 794 | * @param PCROPEndAddr: specifies the end address of the Proprietary code readout protection |
| elmot | 1:d0dfbce63a89 | 795 | * This parameter can be an address between PCROPStartAddr and end of the bank |
| elmot | 1:d0dfbce63a89 | 796 | * |
| elmot | 1:d0dfbce63a89 | 797 | * @retval HAL Status |
| elmot | 1:d0dfbce63a89 | 798 | */ |
| elmot | 1:d0dfbce63a89 | 799 | static HAL_StatusTypeDef FLASH_OB_PCROPConfig(uint32_t PCROPConfig, uint32_t PCROPStartAddr, uint32_t PCROPEndAddr) |
| elmot | 1:d0dfbce63a89 | 800 | { |
| elmot | 1:d0dfbce63a89 | 801 | HAL_StatusTypeDef status = HAL_OK; |
| elmot | 1:d0dfbce63a89 | 802 | uint32_t reg_value = 0; |
| elmot | 1:d0dfbce63a89 | 803 | uint32_t bank1_addr; |
| elmot | 1:d0dfbce63a89 | 804 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 805 | uint32_t bank2_addr; |
| elmot | 1:d0dfbce63a89 | 806 | #endif |
| elmot | 1:d0dfbce63a89 | 807 | |
| elmot | 1:d0dfbce63a89 | 808 | /* Check the parameters */ |
| elmot | 1:d0dfbce63a89 | 809 | assert_param(IS_FLASH_BANK_EXCLUSIVE(PCROPConfig & FLASH_BANK_BOTH)); |
| elmot | 1:d0dfbce63a89 | 810 | assert_param(IS_OB_PCROP_RDP(PCROPConfig & FLASH_PCROP1ER_PCROP_RDP)); |
| elmot | 1:d0dfbce63a89 | 811 | assert_param(IS_FLASH_MAIN_MEM_ADDRESS(PCROPStartAddr)); |
| elmot | 1:d0dfbce63a89 | 812 | assert_param(IS_FLASH_MAIN_MEM_ADDRESS(PCROPEndAddr)); |
| elmot | 1:d0dfbce63a89 | 813 | |
| elmot | 1:d0dfbce63a89 | 814 | /* Wait for last operation to be completed */ |
| elmot | 1:d0dfbce63a89 | 815 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| elmot | 1:d0dfbce63a89 | 816 | |
| elmot | 1:d0dfbce63a89 | 817 | if(status == HAL_OK) |
| elmot | 1:d0dfbce63a89 | 818 | { |
| elmot | 1:d0dfbce63a89 | 819 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 820 | /* Get the information about the bank swapping */ |
| elmot | 1:d0dfbce63a89 | 821 | if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0) |
| elmot | 1:d0dfbce63a89 | 822 | { |
| elmot | 1:d0dfbce63a89 | 823 | bank1_addr = FLASH_BASE; |
| elmot | 1:d0dfbce63a89 | 824 | bank2_addr = FLASH_BASE + FLASH_BANK_SIZE; |
| elmot | 1:d0dfbce63a89 | 825 | } |
| elmot | 1:d0dfbce63a89 | 826 | else |
| elmot | 1:d0dfbce63a89 | 827 | { |
| elmot | 1:d0dfbce63a89 | 828 | bank1_addr = FLASH_BASE + FLASH_BANK_SIZE; |
| elmot | 1:d0dfbce63a89 | 829 | bank2_addr = FLASH_BASE; |
| elmot | 1:d0dfbce63a89 | 830 | } |
| elmot | 1:d0dfbce63a89 | 831 | #else |
| elmot | 1:d0dfbce63a89 | 832 | bank1_addr = FLASH_BASE; |
| elmot | 1:d0dfbce63a89 | 833 | #endif |
| elmot | 1:d0dfbce63a89 | 834 | |
| elmot | 1:d0dfbce63a89 | 835 | /* Configure the Proprietary code readout protection */ |
| elmot | 1:d0dfbce63a89 | 836 | if((PCROPConfig & FLASH_BANK_BOTH) == FLASH_BANK_1) |
| elmot | 1:d0dfbce63a89 | 837 | { |
| elmot | 1:d0dfbce63a89 | 838 | reg_value = ((PCROPStartAddr - bank1_addr) >> 3); |
| elmot | 1:d0dfbce63a89 | 839 | MODIFY_REG(FLASH->PCROP1SR, FLASH_PCROP1SR_PCROP1_STRT, reg_value); |
| elmot | 1:d0dfbce63a89 | 840 | |
| elmot | 1:d0dfbce63a89 | 841 | reg_value = ((PCROPEndAddr - bank1_addr) >> 3); |
| elmot | 1:d0dfbce63a89 | 842 | MODIFY_REG(FLASH->PCROP1ER, FLASH_PCROP1ER_PCROP1_END, reg_value); |
| elmot | 1:d0dfbce63a89 | 843 | } |
| elmot | 1:d0dfbce63a89 | 844 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 845 | else if((PCROPConfig & FLASH_BANK_BOTH) == FLASH_BANK_2) |
| elmot | 1:d0dfbce63a89 | 846 | { |
| elmot | 1:d0dfbce63a89 | 847 | reg_value = ((PCROPStartAddr - bank2_addr) >> 3); |
| elmot | 1:d0dfbce63a89 | 848 | MODIFY_REG(FLASH->PCROP2SR, FLASH_PCROP2SR_PCROP2_STRT, reg_value); |
| elmot | 1:d0dfbce63a89 | 849 | |
| elmot | 1:d0dfbce63a89 | 850 | reg_value = ((PCROPEndAddr - bank2_addr) >> 3); |
| elmot | 1:d0dfbce63a89 | 851 | MODIFY_REG(FLASH->PCROP2ER, FLASH_PCROP2ER_PCROP2_END, reg_value); |
| elmot | 1:d0dfbce63a89 | 852 | } |
| elmot | 1:d0dfbce63a89 | 853 | #endif |
| elmot | 1:d0dfbce63a89 | 854 | |
| elmot | 1:d0dfbce63a89 | 855 | MODIFY_REG(FLASH->PCROP1ER, FLASH_PCROP1ER_PCROP_RDP, (PCROPConfig & FLASH_PCROP1ER_PCROP_RDP)); |
| elmot | 1:d0dfbce63a89 | 856 | |
| elmot | 1:d0dfbce63a89 | 857 | /* Set OPTSTRT Bit */ |
| elmot | 1:d0dfbce63a89 | 858 | SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); |
| elmot | 1:d0dfbce63a89 | 859 | |
| elmot | 1:d0dfbce63a89 | 860 | /* Wait for last operation to be completed */ |
| elmot | 1:d0dfbce63a89 | 861 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| elmot | 1:d0dfbce63a89 | 862 | |
| elmot | 1:d0dfbce63a89 | 863 | /* If the option byte program operation is completed, disable the OPTSTRT Bit */ |
| elmot | 1:d0dfbce63a89 | 864 | CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); |
| elmot | 1:d0dfbce63a89 | 865 | } |
| elmot | 1:d0dfbce63a89 | 866 | |
| elmot | 1:d0dfbce63a89 | 867 | return status; |
| elmot | 1:d0dfbce63a89 | 868 | } |
| elmot | 1:d0dfbce63a89 | 869 | |
| elmot | 1:d0dfbce63a89 | 870 | /** |
| elmot | 1:d0dfbce63a89 | 871 | * @brief Return the FLASH Write Protection Option Bytes value. |
| elmot | 1:d0dfbce63a89 | 872 | * |
| elmot | 1:d0dfbce63a89 | 873 | * @param[in] WRPArea: specifies the area to be returned. |
| elmot | 1:d0dfbce63a89 | 874 | * This parameter can be one of the following values: |
| elmot | 1:d0dfbce63a89 | 875 | * @arg OB_WRPAREA_BANK1_AREAA: Flash Bank 1 Area A |
| elmot | 1:d0dfbce63a89 | 876 | * @arg OB_WRPAREA_BANK1_AREAB: Flash Bank 1 Area B |
| elmot | 1:d0dfbce63a89 | 877 | * @arg OB_WRPAREA_BANK2_AREAA: Flash Bank 2 Area A (don't apply to STM32L43x/STM32L44x devices) |
| elmot | 1:d0dfbce63a89 | 878 | * @arg OB_WRPAREA_BANK2_AREAB: Flash Bank 2 Area B (don't apply to STM32L43x/STM32L44x devices) |
| elmot | 1:d0dfbce63a89 | 879 | * |
| elmot | 1:d0dfbce63a89 | 880 | * @param[out] WRPStartOffset: specifies the address where to copied the start page |
| elmot | 1:d0dfbce63a89 | 881 | * of the write protected area |
| elmot | 1:d0dfbce63a89 | 882 | * |
| elmot | 1:d0dfbce63a89 | 883 | * @param[out] WRDPEndOffset: specifies the address where to copied the end page of |
| elmot | 1:d0dfbce63a89 | 884 | * the write protected area |
| elmot | 1:d0dfbce63a89 | 885 | * |
| elmot | 1:d0dfbce63a89 | 886 | * @retval None |
| elmot | 1:d0dfbce63a89 | 887 | */ |
| elmot | 1:d0dfbce63a89 | 888 | static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t * WRPStartOffset, uint32_t * WRDPEndOffset) |
| elmot | 1:d0dfbce63a89 | 889 | { |
| elmot | 1:d0dfbce63a89 | 890 | /* Check the parameters */ |
| elmot | 1:d0dfbce63a89 | 891 | assert_param(IS_OB_WRPAREA(WRPArea)); |
| elmot | 1:d0dfbce63a89 | 892 | |
| elmot | 1:d0dfbce63a89 | 893 | /* Get the configuration of the write protected area */ |
| elmot | 1:d0dfbce63a89 | 894 | if(WRPArea == OB_WRPAREA_BANK1_AREAA) |
| elmot | 1:d0dfbce63a89 | 895 | { |
| elmot | 1:d0dfbce63a89 | 896 | *WRPStartOffset = READ_BIT(FLASH->WRP1AR, FLASH_WRP1AR_WRP1A_STRT); |
| elmot | 1:d0dfbce63a89 | 897 | *WRDPEndOffset = (READ_BIT(FLASH->WRP1AR, FLASH_WRP1AR_WRP1A_END) >> 16); |
| elmot | 1:d0dfbce63a89 | 898 | } |
| elmot | 1:d0dfbce63a89 | 899 | else if(WRPArea == OB_WRPAREA_BANK1_AREAB) |
| elmot | 1:d0dfbce63a89 | 900 | { |
| elmot | 1:d0dfbce63a89 | 901 | *WRPStartOffset = READ_BIT(FLASH->WRP1BR, FLASH_WRP1BR_WRP1B_STRT); |
| elmot | 1:d0dfbce63a89 | 902 | *WRDPEndOffset = (READ_BIT(FLASH->WRP1BR, FLASH_WRP1BR_WRP1B_END) >> 16); |
| elmot | 1:d0dfbce63a89 | 903 | } |
| elmot | 1:d0dfbce63a89 | 904 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 905 | else if(WRPArea == OB_WRPAREA_BANK2_AREAA) |
| elmot | 1:d0dfbce63a89 | 906 | { |
| elmot | 1:d0dfbce63a89 | 907 | *WRPStartOffset = READ_BIT(FLASH->WRP2AR, FLASH_WRP2AR_WRP2A_STRT); |
| elmot | 1:d0dfbce63a89 | 908 | *WRDPEndOffset = (READ_BIT(FLASH->WRP2AR, FLASH_WRP2AR_WRP2A_END) >> 16); |
| elmot | 1:d0dfbce63a89 | 909 | } |
| elmot | 1:d0dfbce63a89 | 910 | else if(WRPArea == OB_WRPAREA_BANK2_AREAB) |
| elmot | 1:d0dfbce63a89 | 911 | { |
| elmot | 1:d0dfbce63a89 | 912 | *WRPStartOffset = READ_BIT(FLASH->WRP2BR, FLASH_WRP2BR_WRP2B_STRT); |
| elmot | 1:d0dfbce63a89 | 913 | *WRDPEndOffset = (READ_BIT(FLASH->WRP2BR, FLASH_WRP2BR_WRP2B_END) >> 16); |
| elmot | 1:d0dfbce63a89 | 914 | } |
| elmot | 1:d0dfbce63a89 | 915 | #endif |
| elmot | 1:d0dfbce63a89 | 916 | } |
| elmot | 1:d0dfbce63a89 | 917 | |
| elmot | 1:d0dfbce63a89 | 918 | /** |
| elmot | 1:d0dfbce63a89 | 919 | * @brief Return the FLASH Read Protection level. |
| elmot | 1:d0dfbce63a89 | 920 | * @retval FLASH ReadOut Protection Status: |
| elmot | 1:d0dfbce63a89 | 921 | * This return value can be one of the following values: |
| elmot | 1:d0dfbce63a89 | 922 | * @arg OB_RDP_LEVEL_0: No protection |
| elmot | 1:d0dfbce63a89 | 923 | * @arg OB_RDP_LEVEL_1: Read protection of the memory |
| elmot | 1:d0dfbce63a89 | 924 | * @arg OB_RDP_LEVEL_2: Full chip protection |
| elmot | 1:d0dfbce63a89 | 925 | */ |
| elmot | 1:d0dfbce63a89 | 926 | static uint32_t FLASH_OB_GetRDP(void) |
| elmot | 1:d0dfbce63a89 | 927 | { |
| elmot | 1:d0dfbce63a89 | 928 | if ((READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP) != OB_RDP_LEVEL_0) && |
| elmot | 1:d0dfbce63a89 | 929 | (READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP) != OB_RDP_LEVEL_2)) |
| elmot | 1:d0dfbce63a89 | 930 | { |
| elmot | 1:d0dfbce63a89 | 931 | return (OB_RDP_LEVEL_1); |
| elmot | 1:d0dfbce63a89 | 932 | } |
| elmot | 1:d0dfbce63a89 | 933 | else |
| elmot | 1:d0dfbce63a89 | 934 | { |
| elmot | 1:d0dfbce63a89 | 935 | return (READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP)); |
| elmot | 1:d0dfbce63a89 | 936 | } |
| elmot | 1:d0dfbce63a89 | 937 | } |
| elmot | 1:d0dfbce63a89 | 938 | |
| elmot | 1:d0dfbce63a89 | 939 | /** |
| elmot | 1:d0dfbce63a89 | 940 | * @brief Return the FLASH User Option Byte value. |
| elmot | 1:d0dfbce63a89 | 941 | * @retval The FLASH User Option Bytes values: |
| elmot | 1:d0dfbce63a89 | 942 | * For STM32L47x/STM32L48x devices : |
| elmot | 1:d0dfbce63a89 | 943 | * BOR_LEV(Bit8-10), nRST_STOP(Bit12), nRST_STDBY(Bit13), nRST_SHDW(Bit14), |
| elmot | 1:d0dfbce63a89 | 944 | * IWDG_SW(Bit16), IWDG_STOP(Bit17), IWDG_STDBY(Bit18), WWDG_SW(Bit19), |
| elmot | 1:d0dfbce63a89 | 945 | * BFB2(Bit20), DUALBANK(Bit21), nBOOT1(Bit23), SRAM2_PE(Bit24) and SRAM2_RST(Bit25). |
| elmot | 1:d0dfbce63a89 | 946 | * For STM32L43x/STM32L44x devices : |
| elmot | 1:d0dfbce63a89 | 947 | * BOR_LEV(Bit8-10), nRST_STOP(Bit12), nRST_STDBY(Bit13), nRST_SHDW(Bit14), |
| elmot | 1:d0dfbce63a89 | 948 | * IWDG_SW(Bit16), IWDG_STOP(Bit17), IWDG_STDBY(Bit18), WWDG_SW(Bit19), |
| elmot | 1:d0dfbce63a89 | 949 | * nBOOT1(Bit23), SRAM2_PE(Bit24), SRAM2_RST(Bit25), nSWBOOT0(Bit26) and nBOOT0(Bit27). |
| elmot | 1:d0dfbce63a89 | 950 | */ |
| elmot | 1:d0dfbce63a89 | 951 | static uint32_t FLASH_OB_GetUser(void) |
| elmot | 1:d0dfbce63a89 | 952 | { |
| elmot | 1:d0dfbce63a89 | 953 | uint32_t user_config = READ_REG(FLASH->OPTR); |
| elmot | 1:d0dfbce63a89 | 954 | CLEAR_BIT(user_config, FLASH_OPTR_RDP); |
| elmot | 1:d0dfbce63a89 | 955 | |
| elmot | 1:d0dfbce63a89 | 956 | return user_config; |
| elmot | 1:d0dfbce63a89 | 957 | } |
| elmot | 1:d0dfbce63a89 | 958 | |
| elmot | 1:d0dfbce63a89 | 959 | /** |
| elmot | 1:d0dfbce63a89 | 960 | * @brief Return the FLASH Write Protection Option Bytes value. |
| elmot | 1:d0dfbce63a89 | 961 | * |
| elmot | 1:d0dfbce63a89 | 962 | * @param PCROPConfig [inout]: specifies the configuration (Bank to be configured and PCROP_RDP option). |
| elmot | 1:d0dfbce63a89 | 963 | * This parameter must be a combination of FLASH_BANK_1 or FLASH_BANK_2 |
| elmot | 1:d0dfbce63a89 | 964 | * with OB_PCROP_RDP_NOT_ERASE or OB_PCROP_RDP_ERASE |
| elmot | 1:d0dfbce63a89 | 965 | * |
| elmot | 1:d0dfbce63a89 | 966 | * @param PCROPStartAddr [out]: specifies the address where to copied the start address |
| elmot | 1:d0dfbce63a89 | 967 | * of the Proprietary code readout protection |
| elmot | 1:d0dfbce63a89 | 968 | * |
| elmot | 1:d0dfbce63a89 | 969 | * @param PCROPEndAddr [out]: specifies the address where to copied the end address of |
| elmot | 1:d0dfbce63a89 | 970 | * the Proprietary code readout protection |
| elmot | 1:d0dfbce63a89 | 971 | * |
| elmot | 1:d0dfbce63a89 | 972 | * @retval None |
| elmot | 1:d0dfbce63a89 | 973 | */ |
| elmot | 1:d0dfbce63a89 | 974 | static void FLASH_OB_GetPCROP(uint32_t * PCROPConfig, uint32_t * PCROPStartAddr, uint32_t * PCROPEndAddr) |
| elmot | 1:d0dfbce63a89 | 975 | { |
| elmot | 1:d0dfbce63a89 | 976 | uint32_t reg_value = 0; |
| elmot | 1:d0dfbce63a89 | 977 | uint32_t bank1_addr; |
| elmot | 1:d0dfbce63a89 | 978 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 979 | uint32_t bank2_addr; |
| elmot | 1:d0dfbce63a89 | 980 | #endif |
| elmot | 1:d0dfbce63a89 | 981 | |
| elmot | 1:d0dfbce63a89 | 982 | /* Check the parameters */ |
| elmot | 1:d0dfbce63a89 | 983 | assert_param(IS_FLASH_BANK_EXCLUSIVE((*PCROPConfig) & FLASH_BANK_BOTH)); |
| elmot | 1:d0dfbce63a89 | 984 | |
| elmot | 1:d0dfbce63a89 | 985 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 986 | /* Get the information about the bank swapping */ |
| elmot | 1:d0dfbce63a89 | 987 | if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0) |
| elmot | 1:d0dfbce63a89 | 988 | { |
| elmot | 1:d0dfbce63a89 | 989 | bank1_addr = FLASH_BASE; |
| elmot | 1:d0dfbce63a89 | 990 | bank2_addr = FLASH_BASE + FLASH_BANK_SIZE; |
| elmot | 1:d0dfbce63a89 | 991 | } |
| elmot | 1:d0dfbce63a89 | 992 | else |
| elmot | 1:d0dfbce63a89 | 993 | { |
| elmot | 1:d0dfbce63a89 | 994 | bank1_addr = FLASH_BASE + FLASH_BANK_SIZE; |
| elmot | 1:d0dfbce63a89 | 995 | bank2_addr = FLASH_BASE; |
| elmot | 1:d0dfbce63a89 | 996 | } |
| elmot | 1:d0dfbce63a89 | 997 | #else |
| elmot | 1:d0dfbce63a89 | 998 | bank1_addr = FLASH_BASE; |
| elmot | 1:d0dfbce63a89 | 999 | #endif |
| elmot | 1:d0dfbce63a89 | 1000 | |
| elmot | 1:d0dfbce63a89 | 1001 | if(((*PCROPConfig) & FLASH_BANK_BOTH) == FLASH_BANK_1) |
| elmot | 1:d0dfbce63a89 | 1002 | { |
| elmot | 1:d0dfbce63a89 | 1003 | reg_value = (READ_REG(FLASH->PCROP1SR) & FLASH_PCROP1SR_PCROP1_STRT); |
| elmot | 1:d0dfbce63a89 | 1004 | *PCROPStartAddr = (reg_value << 3) + bank1_addr; |
| elmot | 1:d0dfbce63a89 | 1005 | |
| elmot | 1:d0dfbce63a89 | 1006 | reg_value = (READ_REG(FLASH->PCROP1ER) & FLASH_PCROP1ER_PCROP1_END); |
| elmot | 1:d0dfbce63a89 | 1007 | *PCROPEndAddr = (reg_value << 3) + bank1_addr; |
| elmot | 1:d0dfbce63a89 | 1008 | } |
| elmot | 1:d0dfbce63a89 | 1009 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 1010 | else if(((*PCROPConfig) & FLASH_BANK_BOTH) == FLASH_BANK_2) |
| elmot | 1:d0dfbce63a89 | 1011 | { |
| elmot | 1:d0dfbce63a89 | 1012 | reg_value = (READ_REG(FLASH->PCROP2SR) & FLASH_PCROP2SR_PCROP2_STRT); |
| elmot | 1:d0dfbce63a89 | 1013 | *PCROPStartAddr = (reg_value << 3) + bank2_addr; |
| elmot | 1:d0dfbce63a89 | 1014 | |
| elmot | 1:d0dfbce63a89 | 1015 | reg_value = (READ_REG(FLASH->PCROP2ER) & FLASH_PCROP2ER_PCROP2_END); |
| elmot | 1:d0dfbce63a89 | 1016 | *PCROPEndAddr = (reg_value << 3) + bank2_addr; |
| elmot | 1:d0dfbce63a89 | 1017 | } |
| elmot | 1:d0dfbce63a89 | 1018 | #endif |
| elmot | 1:d0dfbce63a89 | 1019 | |
| elmot | 1:d0dfbce63a89 | 1020 | *PCROPConfig |= (READ_REG(FLASH->PCROP1ER) & FLASH_PCROP1ER_PCROP_RDP); |
| elmot | 1:d0dfbce63a89 | 1021 | } |
| elmot | 1:d0dfbce63a89 | 1022 | /** |
| elmot | 1:d0dfbce63a89 | 1023 | * @} |
| elmot | 1:d0dfbce63a89 | 1024 | */ |
| elmot | 1:d0dfbce63a89 | 1025 | |
| elmot | 1:d0dfbce63a89 | 1026 | /** |
| elmot | 1:d0dfbce63a89 | 1027 | * @} |
| elmot | 1:d0dfbce63a89 | 1028 | */ |
| elmot | 1:d0dfbce63a89 | 1029 | |
| elmot | 1:d0dfbce63a89 | 1030 | #endif /* HAL_FLASH_MODULE_ENABLED */ |
| elmot | 1:d0dfbce63a89 | 1031 | |
| elmot | 1:d0dfbce63a89 | 1032 | /** |
| elmot | 1:d0dfbce63a89 | 1033 | * @} |
| elmot | 1:d0dfbce63a89 | 1034 | */ |
| elmot | 1:d0dfbce63a89 | 1035 | |
| elmot | 1:d0dfbce63a89 | 1036 | /** |
| elmot | 1:d0dfbce63a89 | 1037 | * @} |
| elmot | 1:d0dfbce63a89 | 1038 | */ |
| elmot | 1:d0dfbce63a89 | 1039 | |
| elmot | 1:d0dfbce63a89 | 1040 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |