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HAL_L476/stm32l4xx_hal_flash.h@1:d0dfbce63a89, 2017-02-24 (annotated)
- Committer:
- elmot
- Date:
- Fri Feb 24 21:13:56 2017 +0000
- Revision:
- 1:d0dfbce63a89
Ready-to-copy
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| elmot | 1:d0dfbce63a89 | 1 | /** |
| elmot | 1:d0dfbce63a89 | 2 | ****************************************************************************** |
| elmot | 1:d0dfbce63a89 | 3 | * @file stm32l4xx_hal_flash.h |
| elmot | 1:d0dfbce63a89 | 4 | * @author MCD Application Team |
| elmot | 1:d0dfbce63a89 | 5 | * @version V1.5.1 |
| elmot | 1:d0dfbce63a89 | 6 | * @date 31-May-2016 |
| elmot | 1:d0dfbce63a89 | 7 | * @brief Header file of FLASH HAL module. |
| elmot | 1:d0dfbce63a89 | 8 | ****************************************************************************** |
| elmot | 1:d0dfbce63a89 | 9 | * @attention |
| elmot | 1:d0dfbce63a89 | 10 | * |
| elmot | 1:d0dfbce63a89 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| elmot | 1:d0dfbce63a89 | 12 | * |
| elmot | 1:d0dfbce63a89 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| elmot | 1:d0dfbce63a89 | 14 | * are permitted provided that the following conditions are met: |
| elmot | 1:d0dfbce63a89 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| elmot | 1:d0dfbce63a89 | 16 | * this list of conditions and the following disclaimer. |
| elmot | 1:d0dfbce63a89 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| elmot | 1:d0dfbce63a89 | 18 | * this list of conditions and the following disclaimer in the documentation |
| elmot | 1:d0dfbce63a89 | 19 | * and/or other materials provided with the distribution. |
| elmot | 1:d0dfbce63a89 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| elmot | 1:d0dfbce63a89 | 21 | * may be used to endorse or promote products derived from this software |
| elmot | 1:d0dfbce63a89 | 22 | * without specific prior written permission. |
| elmot | 1:d0dfbce63a89 | 23 | * |
| elmot | 1:d0dfbce63a89 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| elmot | 1:d0dfbce63a89 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| elmot | 1:d0dfbce63a89 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| elmot | 1:d0dfbce63a89 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| elmot | 1:d0dfbce63a89 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| elmot | 1:d0dfbce63a89 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| elmot | 1:d0dfbce63a89 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| elmot | 1:d0dfbce63a89 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| elmot | 1:d0dfbce63a89 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| elmot | 1:d0dfbce63a89 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| elmot | 1:d0dfbce63a89 | 34 | * |
| elmot | 1:d0dfbce63a89 | 35 | ****************************************************************************** |
| elmot | 1:d0dfbce63a89 | 36 | */ |
| elmot | 1:d0dfbce63a89 | 37 | |
| elmot | 1:d0dfbce63a89 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 39 | #ifndef __STM32L4xx_HAL_FLASH_H |
| elmot | 1:d0dfbce63a89 | 40 | #define __STM32L4xx_HAL_FLASH_H |
| elmot | 1:d0dfbce63a89 | 41 | |
| elmot | 1:d0dfbce63a89 | 42 | #ifdef __cplusplus |
| elmot | 1:d0dfbce63a89 | 43 | extern "C" { |
| elmot | 1:d0dfbce63a89 | 44 | #endif |
| elmot | 1:d0dfbce63a89 | 45 | |
| elmot | 1:d0dfbce63a89 | 46 | /* Includes ------------------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 47 | #include "stm32l4xx_hal_def.h" |
| elmot | 1:d0dfbce63a89 | 48 | |
| elmot | 1:d0dfbce63a89 | 49 | /** @addtogroup STM32L4xx_HAL_Driver |
| elmot | 1:d0dfbce63a89 | 50 | * @{ |
| elmot | 1:d0dfbce63a89 | 51 | */ |
| elmot | 1:d0dfbce63a89 | 52 | |
| elmot | 1:d0dfbce63a89 | 53 | /** @addtogroup FLASH |
| elmot | 1:d0dfbce63a89 | 54 | * @{ |
| elmot | 1:d0dfbce63a89 | 55 | */ |
| elmot | 1:d0dfbce63a89 | 56 | |
| elmot | 1:d0dfbce63a89 | 57 | /* Exported types ------------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 58 | /** @defgroup FLASH_Exported_Types FLASH Exported Types |
| elmot | 1:d0dfbce63a89 | 59 | * @{ |
| elmot | 1:d0dfbce63a89 | 60 | */ |
| elmot | 1:d0dfbce63a89 | 61 | |
| elmot | 1:d0dfbce63a89 | 62 | /** |
| elmot | 1:d0dfbce63a89 | 63 | * @brief FLASH Erase structure definition |
| elmot | 1:d0dfbce63a89 | 64 | */ |
| elmot | 1:d0dfbce63a89 | 65 | typedef struct |
| elmot | 1:d0dfbce63a89 | 66 | { |
| elmot | 1:d0dfbce63a89 | 67 | uint32_t TypeErase; /*!< Mass erase or page erase. |
| elmot | 1:d0dfbce63a89 | 68 | This parameter can be a value of @ref FLASH_Type_Erase */ |
| elmot | 1:d0dfbce63a89 | 69 | uint32_t Banks; /*!< Select bank to erase. |
| elmot | 1:d0dfbce63a89 | 70 | This parameter must be a value of @ref FLASH_Banks |
| elmot | 1:d0dfbce63a89 | 71 | (FLASH_BANK_BOTH should be used only for mass erase) */ |
| elmot | 1:d0dfbce63a89 | 72 | uint32_t Page; /*!< Initial Flash page to erase when page erase is disabled |
| elmot | 1:d0dfbce63a89 | 73 | This parameter must be a value between 0 and (max number of pages in the bank - 1) |
| elmot | 1:d0dfbce63a89 | 74 | (eg : 255 for 1MB dual bank) */ |
| elmot | 1:d0dfbce63a89 | 75 | uint32_t NbPages; /*!< Number of pages to be erased. |
| elmot | 1:d0dfbce63a89 | 76 | This parameter must be a value between 1 and (max number of pages in the bank - value of initial page)*/ |
| elmot | 1:d0dfbce63a89 | 77 | } FLASH_EraseInitTypeDef; |
| elmot | 1:d0dfbce63a89 | 78 | |
| elmot | 1:d0dfbce63a89 | 79 | /** |
| elmot | 1:d0dfbce63a89 | 80 | * @brief FLASH Option Bytes Program structure definition |
| elmot | 1:d0dfbce63a89 | 81 | */ |
| elmot | 1:d0dfbce63a89 | 82 | typedef struct |
| elmot | 1:d0dfbce63a89 | 83 | { |
| elmot | 1:d0dfbce63a89 | 84 | uint32_t OptionType; /*!< Option byte to be configured. |
| elmot | 1:d0dfbce63a89 | 85 | This parameter can be a combination of the values of @ref FLASH_OB_Type */ |
| elmot | 1:d0dfbce63a89 | 86 | uint32_t WRPArea; /*!< Write protection area to be programmed (used for OPTIONBYTE_WRP). |
| elmot | 1:d0dfbce63a89 | 87 | Only one WRP area could be programmed at the same time. |
| elmot | 1:d0dfbce63a89 | 88 | This parameter can be value of @ref FLASH_OB_WRP_Area */ |
| elmot | 1:d0dfbce63a89 | 89 | uint32_t WRPStartOffset; /*!< Write protection start offset (used for OPTIONBYTE_WRP). |
| elmot | 1:d0dfbce63a89 | 90 | This parameter must be a value between 0 and (max number of pages in the bank - 1) |
| elmot | 1:d0dfbce63a89 | 91 | (eg : 25 for 1MB dual bank) */ |
| elmot | 1:d0dfbce63a89 | 92 | uint32_t WRPEndOffset; /*!< Write protection end offset (used for OPTIONBYTE_WRP). |
| elmot | 1:d0dfbce63a89 | 93 | This parameter must be a value between WRPStartOffset and (max number of pages in the bank - 1) */ |
| elmot | 1:d0dfbce63a89 | 94 | uint32_t RDPLevel; /*!< Set the read protection level.. (used for OPTIONBYTE_RDP). |
| elmot | 1:d0dfbce63a89 | 95 | This parameter can be a value of @ref FLASH_OB_Read_Protection */ |
| elmot | 1:d0dfbce63a89 | 96 | uint32_t USERType; /*!< User option byte(s) to be configured (used for OPTIONBYTE_USER). |
| elmot | 1:d0dfbce63a89 | 97 | This parameter can be a combination of @ref FLASH_OB_USER_Type */ |
| elmot | 1:d0dfbce63a89 | 98 | uint32_t USERConfig; /*!< Value of the user option byte (used for OPTIONBYTE_USER). |
| elmot | 1:d0dfbce63a89 | 99 | This parameter can be a combination of @ref FLASH_OB_USER_BOR_LEVEL, |
| elmot | 1:d0dfbce63a89 | 100 | @ref FLASH_OB_USER_nRST_STOP, @ref FLASH_OB_USER_nRST_STANDBY, |
| elmot | 1:d0dfbce63a89 | 101 | @ref FLASH_OB_USER_nRST_SHUTDOWN, @ref FLASH_OB_USER_IWDG_SW, |
| elmot | 1:d0dfbce63a89 | 102 | @ref FLASH_OB_USER_IWDG_STOP, @ref FLASH_OB_USER_IWDG_STANDBY, |
| elmot | 1:d0dfbce63a89 | 103 | @ref FLASH_OB_USER_WWDG_SW, @ref FLASH_OB_USER_BFB2, |
| elmot | 1:d0dfbce63a89 | 104 | @ref FLASH_OB_USER_DUALBANK, @ref FLASH_OB_USER_nBOOT1, |
| elmot | 1:d0dfbce63a89 | 105 | @ref FLASH_OB_USER_SRAM2_PE and @ref FLASH_OB_USER_SRAM2_RST */ |
| elmot | 1:d0dfbce63a89 | 106 | uint32_t PCROPConfig; /*!< Configuration of the PCROP (used for OPTIONBYTE_PCROP). |
| elmot | 1:d0dfbce63a89 | 107 | This parameter must be a combination of @ref FLASH_Banks (except FLASH_BANK_BOTH) |
| elmot | 1:d0dfbce63a89 | 108 | and @ref FLASH_OB_PCROP_RDP */ |
| elmot | 1:d0dfbce63a89 | 109 | uint32_t PCROPStartAddr; /*!< PCROP Start address (used for OPTIONBYTE_PCROP). |
| elmot | 1:d0dfbce63a89 | 110 | This parameter must be a value between begin and end of bank |
| elmot | 1:d0dfbce63a89 | 111 | => Be careful of the bank swapping for the address */ |
| elmot | 1:d0dfbce63a89 | 112 | uint32_t PCROPEndAddr; /*!< PCROP End address (used for OPTIONBYTE_PCROP). |
| elmot | 1:d0dfbce63a89 | 113 | This parameter must be a value between PCROP Start address and end of bank */ |
| elmot | 1:d0dfbce63a89 | 114 | } FLASH_OBProgramInitTypeDef; |
| elmot | 1:d0dfbce63a89 | 115 | |
| elmot | 1:d0dfbce63a89 | 116 | /** |
| elmot | 1:d0dfbce63a89 | 117 | * @brief FLASH Procedure structure definition |
| elmot | 1:d0dfbce63a89 | 118 | */ |
| elmot | 1:d0dfbce63a89 | 119 | typedef enum |
| elmot | 1:d0dfbce63a89 | 120 | { |
| elmot | 1:d0dfbce63a89 | 121 | FLASH_PROC_NONE = 0, |
| elmot | 1:d0dfbce63a89 | 122 | FLASH_PROC_PAGE_ERASE, |
| elmot | 1:d0dfbce63a89 | 123 | FLASH_PROC_MASS_ERASE, |
| elmot | 1:d0dfbce63a89 | 124 | FLASH_PROC_PROGRAM, |
| elmot | 1:d0dfbce63a89 | 125 | FLASH_PROC_PROGRAM_LAST |
| elmot | 1:d0dfbce63a89 | 126 | } FLASH_ProcedureTypeDef; |
| elmot | 1:d0dfbce63a89 | 127 | |
| elmot | 1:d0dfbce63a89 | 128 | /** |
| elmot | 1:d0dfbce63a89 | 129 | * @brief FLASH handle Structure definition |
| elmot | 1:d0dfbce63a89 | 130 | */ |
| elmot | 1:d0dfbce63a89 | 131 | typedef struct |
| elmot | 1:d0dfbce63a89 | 132 | { |
| elmot | 1:d0dfbce63a89 | 133 | HAL_LockTypeDef Lock; /* FLASH locking object */ |
| elmot | 1:d0dfbce63a89 | 134 | __IO uint32_t ErrorCode; /* FLASH error code */ |
| elmot | 1:d0dfbce63a89 | 135 | __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /* Internal variable to indicate which procedure is ongoing or not in IT context */ |
| elmot | 1:d0dfbce63a89 | 136 | __IO uint32_t Address; /* Internal variable to save address selected for program in IT context */ |
| elmot | 1:d0dfbce63a89 | 137 | __IO uint32_t Bank; /* Internal variable to save current bank selected during erase in IT context */ |
| elmot | 1:d0dfbce63a89 | 138 | __IO uint32_t Page; /* Internal variable to define the current page which is erasing in IT context */ |
| elmot | 1:d0dfbce63a89 | 139 | __IO uint32_t NbPagesToErase; /* Internal variable to save the remaining pages to erase in IT context */ |
| elmot | 1:d0dfbce63a89 | 140 | }FLASH_ProcessTypeDef; |
| elmot | 1:d0dfbce63a89 | 141 | |
| elmot | 1:d0dfbce63a89 | 142 | /** |
| elmot | 1:d0dfbce63a89 | 143 | * @} |
| elmot | 1:d0dfbce63a89 | 144 | */ |
| elmot | 1:d0dfbce63a89 | 145 | |
| elmot | 1:d0dfbce63a89 | 146 | /* Exported constants --------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 147 | /** @defgroup FLASH_Exported_Constants FLASH Exported Constants |
| elmot | 1:d0dfbce63a89 | 148 | * @{ |
| elmot | 1:d0dfbce63a89 | 149 | */ |
| elmot | 1:d0dfbce63a89 | 150 | |
| elmot | 1:d0dfbce63a89 | 151 | /** @defgroup FLASH_Error FLASH Error |
| elmot | 1:d0dfbce63a89 | 152 | * @{ |
| elmot | 1:d0dfbce63a89 | 153 | */ |
| elmot | 1:d0dfbce63a89 | 154 | #define HAL_FLASH_ERROR_NONE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 155 | #define HAL_FLASH_ERROR_OP ((uint32_t)0x00000001) |
| elmot | 1:d0dfbce63a89 | 156 | #define HAL_FLASH_ERROR_PROG ((uint32_t)0x00000002) |
| elmot | 1:d0dfbce63a89 | 157 | #define HAL_FLASH_ERROR_WRP ((uint32_t)0x00000004) |
| elmot | 1:d0dfbce63a89 | 158 | #define HAL_FLASH_ERROR_PGA ((uint32_t)0x00000008) |
| elmot | 1:d0dfbce63a89 | 159 | #define HAL_FLASH_ERROR_SIZ ((uint32_t)0x00000010) |
| elmot | 1:d0dfbce63a89 | 160 | #define HAL_FLASH_ERROR_PGS ((uint32_t)0x00000020) |
| elmot | 1:d0dfbce63a89 | 161 | #define HAL_FLASH_ERROR_MIS ((uint32_t)0x00000040) |
| elmot | 1:d0dfbce63a89 | 162 | #define HAL_FLASH_ERROR_FAST ((uint32_t)0x00000080) |
| elmot | 1:d0dfbce63a89 | 163 | #define HAL_FLASH_ERROR_RD ((uint32_t)0x00000100) |
| elmot | 1:d0dfbce63a89 | 164 | #define HAL_FLASH_ERROR_OPTV ((uint32_t)0x00000200) |
| elmot | 1:d0dfbce63a89 | 165 | #define HAL_FLASH_ERROR_ECCD ((uint32_t)0x00000400) |
| elmot | 1:d0dfbce63a89 | 166 | #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) |
| elmot | 1:d0dfbce63a89 | 167 | #define HAL_FLASH_ERROR_PEMPTY ((uint32_t)0x00000800) |
| elmot | 1:d0dfbce63a89 | 168 | #endif |
| elmot | 1:d0dfbce63a89 | 169 | /** |
| elmot | 1:d0dfbce63a89 | 170 | * @} |
| elmot | 1:d0dfbce63a89 | 171 | */ |
| elmot | 1:d0dfbce63a89 | 172 | |
| elmot | 1:d0dfbce63a89 | 173 | /** @defgroup FLASH_Type_Erase FLASH Erase Type |
| elmot | 1:d0dfbce63a89 | 174 | * @{ |
| elmot | 1:d0dfbce63a89 | 175 | */ |
| elmot | 1:d0dfbce63a89 | 176 | #define FLASH_TYPEERASE_PAGES ((uint32_t)0x00) /*!<Pages erase only*/ |
| elmot | 1:d0dfbce63a89 | 177 | #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01) /*!<Flash mass erase activation*/ |
| elmot | 1:d0dfbce63a89 | 178 | /** |
| elmot | 1:d0dfbce63a89 | 179 | * @} |
| elmot | 1:d0dfbce63a89 | 180 | */ |
| elmot | 1:d0dfbce63a89 | 181 | |
| elmot | 1:d0dfbce63a89 | 182 | /** @defgroup FLASH_Banks FLASH Banks |
| elmot | 1:d0dfbce63a89 | 183 | * @{ |
| elmot | 1:d0dfbce63a89 | 184 | */ |
| elmot | 1:d0dfbce63a89 | 185 | #define FLASH_BANK_1 ((uint32_t)0x01) /*!< Bank 1 */ |
| elmot | 1:d0dfbce63a89 | 186 | #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 187 | #define FLASH_BANK_2 ((uint32_t)0x02) /*!< Bank 2 */ |
| elmot | 1:d0dfbce63a89 | 188 | #define FLASH_BANK_BOTH ((uint32_t)(FLASH_BANK_1 | FLASH_BANK_2)) /*!< Bank1 and Bank2 */ |
| elmot | 1:d0dfbce63a89 | 189 | #else |
| elmot | 1:d0dfbce63a89 | 190 | #define FLASH_BANK_BOTH ((uint32_t)(FLASH_BANK_1)) /*!< Bank 1 */ |
| elmot | 1:d0dfbce63a89 | 191 | #endif |
| elmot | 1:d0dfbce63a89 | 192 | /** |
| elmot | 1:d0dfbce63a89 | 193 | * @} |
| elmot | 1:d0dfbce63a89 | 194 | */ |
| elmot | 1:d0dfbce63a89 | 195 | |
| elmot | 1:d0dfbce63a89 | 196 | |
| elmot | 1:d0dfbce63a89 | 197 | /** @defgroup FLASH_Type_Program FLASH Program Type |
| elmot | 1:d0dfbce63a89 | 198 | * @{ |
| elmot | 1:d0dfbce63a89 | 199 | */ |
| elmot | 1:d0dfbce63a89 | 200 | #define FLASH_TYPEPROGRAM_DOUBLEWORD ((uint32_t)0x00) /*!<Program a double-word (64-bit) at a specified address.*/ |
| elmot | 1:d0dfbce63a89 | 201 | #define FLASH_TYPEPROGRAM_FAST ((uint32_t)0x01) /*!<Fast program a 32 row double-word (64-bit) at a specified address. |
| elmot | 1:d0dfbce63a89 | 202 | And another 32 row double-word (64-bit) will be programmed */ |
| elmot | 1:d0dfbce63a89 | 203 | #define FLASH_TYPEPROGRAM_FAST_AND_LAST ((uint32_t)0x02) /*!<Fast program a 32 row double-word (64-bit) at a specified address. |
| elmot | 1:d0dfbce63a89 | 204 | And this is the last 32 row double-word (64-bit) programmed */ |
| elmot | 1:d0dfbce63a89 | 205 | /** |
| elmot | 1:d0dfbce63a89 | 206 | * @} |
| elmot | 1:d0dfbce63a89 | 207 | */ |
| elmot | 1:d0dfbce63a89 | 208 | |
| elmot | 1:d0dfbce63a89 | 209 | /** @defgroup FLASH_OB_Type FLASH Option Bytes Type |
| elmot | 1:d0dfbce63a89 | 210 | * @{ |
| elmot | 1:d0dfbce63a89 | 211 | */ |
| elmot | 1:d0dfbce63a89 | 212 | #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!< WRP option byte configuration */ |
| elmot | 1:d0dfbce63a89 | 213 | #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!< RDP option byte configuration */ |
| elmot | 1:d0dfbce63a89 | 214 | #define OPTIONBYTE_USER ((uint32_t)0x04) /*!< USER option byte configuration */ |
| elmot | 1:d0dfbce63a89 | 215 | #define OPTIONBYTE_PCROP ((uint32_t)0x08) /*!< PCROP option byte configuration */ |
| elmot | 1:d0dfbce63a89 | 216 | /** |
| elmot | 1:d0dfbce63a89 | 217 | * @} |
| elmot | 1:d0dfbce63a89 | 218 | */ |
| elmot | 1:d0dfbce63a89 | 219 | |
| elmot | 1:d0dfbce63a89 | 220 | /** @defgroup FLASH_OB_WRP_Area FLASH WRP Area |
| elmot | 1:d0dfbce63a89 | 221 | * @{ |
| elmot | 1:d0dfbce63a89 | 222 | */ |
| elmot | 1:d0dfbce63a89 | 223 | #define OB_WRPAREA_BANK1_AREAA ((uint32_t)0x00) /*!< Flash Bank 1 Area A */ |
| elmot | 1:d0dfbce63a89 | 224 | #define OB_WRPAREA_BANK1_AREAB ((uint32_t)0x01) /*!< Flash Bank 1 Area B */ |
| elmot | 1:d0dfbce63a89 | 225 | #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 226 | #define OB_WRPAREA_BANK2_AREAA ((uint32_t)0x02) /*!< Flash Bank 2 Area A */ |
| elmot | 1:d0dfbce63a89 | 227 | #define OB_WRPAREA_BANK2_AREAB ((uint32_t)0x04) /*!< Flash Bank 2 Area B */ |
| elmot | 1:d0dfbce63a89 | 228 | #endif |
| elmot | 1:d0dfbce63a89 | 229 | /** |
| elmot | 1:d0dfbce63a89 | 230 | * @} |
| elmot | 1:d0dfbce63a89 | 231 | */ |
| elmot | 1:d0dfbce63a89 | 232 | |
| elmot | 1:d0dfbce63a89 | 233 | /** @defgroup FLASH_OB_Read_Protection FLASH Option Bytes Read Protection |
| elmot | 1:d0dfbce63a89 | 234 | * @{ |
| elmot | 1:d0dfbce63a89 | 235 | */ |
| elmot | 1:d0dfbce63a89 | 236 | #define OB_RDP_LEVEL_0 ((uint32_t)0xAA) |
| elmot | 1:d0dfbce63a89 | 237 | #define OB_RDP_LEVEL_1 ((uint32_t)0xBB) |
| elmot | 1:d0dfbce63a89 | 238 | #define OB_RDP_LEVEL_2 ((uint32_t)0xCC) /*!< Warning: When enabling read protection level 2 |
| elmot | 1:d0dfbce63a89 | 239 | it's no more possible to go back to level 1 or 0 */ |
| elmot | 1:d0dfbce63a89 | 240 | /** |
| elmot | 1:d0dfbce63a89 | 241 | * @} |
| elmot | 1:d0dfbce63a89 | 242 | */ |
| elmot | 1:d0dfbce63a89 | 243 | |
| elmot | 1:d0dfbce63a89 | 244 | /** @defgroup FLASH_OB_USER_Type FLASH Option Bytes User Type |
| elmot | 1:d0dfbce63a89 | 245 | * @{ |
| elmot | 1:d0dfbce63a89 | 246 | */ |
| elmot | 1:d0dfbce63a89 | 247 | #define OB_USER_BOR_LEV ((uint32_t)0x0001) /*!< BOR reset Level */ |
| elmot | 1:d0dfbce63a89 | 248 | #define OB_USER_nRST_STOP ((uint32_t)0x0002) /*!< Reset generated when entering the stop mode */ |
| elmot | 1:d0dfbce63a89 | 249 | #define OB_USER_nRST_STDBY ((uint32_t)0x0004) /*!< Reset generated when entering the standby mode */ |
| elmot | 1:d0dfbce63a89 | 250 | #define OB_USER_IWDG_SW ((uint32_t)0x0008) /*!< Independent watchdog selection */ |
| elmot | 1:d0dfbce63a89 | 251 | #define OB_USER_IWDG_STOP ((uint32_t)0x0010) /*!< Independent watchdog counter freeze in stop mode */ |
| elmot | 1:d0dfbce63a89 | 252 | #define OB_USER_IWDG_STDBY ((uint32_t)0x0020) /*!< Independent watchdog counter freeze in standby mode */ |
| elmot | 1:d0dfbce63a89 | 253 | #define OB_USER_WWDG_SW ((uint32_t)0x0040) /*!< Window watchdog selection */ |
| elmot | 1:d0dfbce63a89 | 254 | #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 255 | #define OB_USER_BFB2 ((uint32_t)0x0080) /*!< Dual-bank boot */ |
| elmot | 1:d0dfbce63a89 | 256 | #define OB_USER_DUALBANK ((uint32_t)0x0100) /*!< Dual-Bank on 512KB or 256KB Flash memory devices */ |
| elmot | 1:d0dfbce63a89 | 257 | #endif |
| elmot | 1:d0dfbce63a89 | 258 | #define OB_USER_nBOOT1 ((uint32_t)0x0200) /*!< Boot configuration */ |
| elmot | 1:d0dfbce63a89 | 259 | #define OB_USER_SRAM2_PE ((uint32_t)0x0400) /*!< SRAM2 parity check enable */ |
| elmot | 1:d0dfbce63a89 | 260 | #define OB_USER_SRAM2_RST ((uint32_t)0x0800) /*!< SRAM2 Erase when system reset */ |
| elmot | 1:d0dfbce63a89 | 261 | #define OB_USER_nRST_SHDW ((uint32_t)0x1000) /*!< Reset generated when entering the shutdown mode */ |
| elmot | 1:d0dfbce63a89 | 262 | #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) |
| elmot | 1:d0dfbce63a89 | 263 | #define OB_USER_nSWBOOT0 ((uint32_t)0x2000) /*!< Software BOOT0 */ |
| elmot | 1:d0dfbce63a89 | 264 | #define OB_USER_nBOOT0 ((uint32_t)0x4000) /*!< nBOOT0 option bit */ |
| elmot | 1:d0dfbce63a89 | 265 | #endif |
| elmot | 1:d0dfbce63a89 | 266 | /** |
| elmot | 1:d0dfbce63a89 | 267 | * @} |
| elmot | 1:d0dfbce63a89 | 268 | */ |
| elmot | 1:d0dfbce63a89 | 269 | |
| elmot | 1:d0dfbce63a89 | 270 | /** @defgroup FLASH_OB_USER_BOR_LEVEL FLASH Option Bytes User BOR Level |
| elmot | 1:d0dfbce63a89 | 271 | * @{ |
| elmot | 1:d0dfbce63a89 | 272 | */ |
| elmot | 1:d0dfbce63a89 | 273 | #define OB_BOR_LEVEL_0 ((uint32_t)FLASH_OPTR_BOR_LEV_0) /*!< Reset level threshold is around 1.7V */ |
| elmot | 1:d0dfbce63a89 | 274 | #define OB_BOR_LEVEL_1 ((uint32_t)FLASH_OPTR_BOR_LEV_1) /*!< Reset level threshold is around 2.0V */ |
| elmot | 1:d0dfbce63a89 | 275 | #define OB_BOR_LEVEL_2 ((uint32_t)FLASH_OPTR_BOR_LEV_2) /*!< Reset level threshold is around 2.2V */ |
| elmot | 1:d0dfbce63a89 | 276 | #define OB_BOR_LEVEL_3 ((uint32_t)FLASH_OPTR_BOR_LEV_3) /*!< Reset level threshold is around 2.5V */ |
| elmot | 1:d0dfbce63a89 | 277 | #define OB_BOR_LEVEL_4 ((uint32_t)FLASH_OPTR_BOR_LEV_4) /*!< Reset level threshold is around 2.8V */ |
| elmot | 1:d0dfbce63a89 | 278 | /** |
| elmot | 1:d0dfbce63a89 | 279 | * @} |
| elmot | 1:d0dfbce63a89 | 280 | */ |
| elmot | 1:d0dfbce63a89 | 281 | |
| elmot | 1:d0dfbce63a89 | 282 | /** @defgroup FLASH_OB_USER_nRST_STOP FLASH Option Bytes User Reset On Stop |
| elmot | 1:d0dfbce63a89 | 283 | * @{ |
| elmot | 1:d0dfbce63a89 | 284 | */ |
| elmot | 1:d0dfbce63a89 | 285 | #define OB_STOP_RST ((uint32_t)0x0000) /*!< Reset generated when entering the stop mode */ |
| elmot | 1:d0dfbce63a89 | 286 | #define OB_STOP_NORST ((uint32_t)FLASH_OPTR_nRST_STOP) /*!< No reset generated when entering the stop mode */ |
| elmot | 1:d0dfbce63a89 | 287 | /** |
| elmot | 1:d0dfbce63a89 | 288 | * @} |
| elmot | 1:d0dfbce63a89 | 289 | */ |
| elmot | 1:d0dfbce63a89 | 290 | |
| elmot | 1:d0dfbce63a89 | 291 | /** @defgroup FLASH_OB_USER_nRST_STANDBY FLASH Option Bytes User Reset On Standby |
| elmot | 1:d0dfbce63a89 | 292 | * @{ |
| elmot | 1:d0dfbce63a89 | 293 | */ |
| elmot | 1:d0dfbce63a89 | 294 | #define OB_STANDBY_RST ((uint32_t)0x0000) /*!< Reset generated when entering the standby mode */ |
| elmot | 1:d0dfbce63a89 | 295 | #define OB_STANDBY_NORST ((uint32_t)FLASH_OPTR_nRST_STDBY) /*!< No reset generated when entering the standby mode */ |
| elmot | 1:d0dfbce63a89 | 296 | /** |
| elmot | 1:d0dfbce63a89 | 297 | * @} |
| elmot | 1:d0dfbce63a89 | 298 | */ |
| elmot | 1:d0dfbce63a89 | 299 | |
| elmot | 1:d0dfbce63a89 | 300 | /** @defgroup FLASH_OB_USER_nRST_SHUTDOWN FLASH Option Bytes User Reset On Shutdown |
| elmot | 1:d0dfbce63a89 | 301 | * @{ |
| elmot | 1:d0dfbce63a89 | 302 | */ |
| elmot | 1:d0dfbce63a89 | 303 | #define OB_SHUTDOWN_RST ((uint32_t)0x0000) /*!< Reset generated when entering the shutdown mode */ |
| elmot | 1:d0dfbce63a89 | 304 | #define OB_SHUTDOWN_NORST ((uint32_t)FLASH_OPTR_nRST_SHDW) /*!< No reset generated when entering the shutdown mode */ |
| elmot | 1:d0dfbce63a89 | 305 | /** |
| elmot | 1:d0dfbce63a89 | 306 | * @} |
| elmot | 1:d0dfbce63a89 | 307 | */ |
| elmot | 1:d0dfbce63a89 | 308 | |
| elmot | 1:d0dfbce63a89 | 309 | /** @defgroup FLASH_OB_USER_IWDG_SW FLASH Option Bytes User IWDG Type |
| elmot | 1:d0dfbce63a89 | 310 | * @{ |
| elmot | 1:d0dfbce63a89 | 311 | */ |
| elmot | 1:d0dfbce63a89 | 312 | #define OB_IWDG_HW ((uint32_t)0x00000) /*!< Hardware independent watchdog */ |
| elmot | 1:d0dfbce63a89 | 313 | #define OB_IWDG_SW ((uint32_t)FLASH_OPTR_IWDG_SW) /*!< Software independent watchdog */ |
| elmot | 1:d0dfbce63a89 | 314 | /** |
| elmot | 1:d0dfbce63a89 | 315 | * @} |
| elmot | 1:d0dfbce63a89 | 316 | */ |
| elmot | 1:d0dfbce63a89 | 317 | |
| elmot | 1:d0dfbce63a89 | 318 | /** @defgroup FLASH_OB_USER_IWDG_STOP FLASH Option Bytes User IWDG Mode On Stop |
| elmot | 1:d0dfbce63a89 | 319 | * @{ |
| elmot | 1:d0dfbce63a89 | 320 | */ |
| elmot | 1:d0dfbce63a89 | 321 | #define OB_IWDG_STOP_FREEZE ((uint32_t)0x00000) /*!< Independent watchdog counter is frozen in Stop mode */ |
| elmot | 1:d0dfbce63a89 | 322 | #define OB_IWDG_STOP_RUN ((uint32_t)FLASH_OPTR_IWDG_STOP) /*!< Independent watchdog counter is running in Stop mode */ |
| elmot | 1:d0dfbce63a89 | 323 | /** |
| elmot | 1:d0dfbce63a89 | 324 | * @} |
| elmot | 1:d0dfbce63a89 | 325 | */ |
| elmot | 1:d0dfbce63a89 | 326 | |
| elmot | 1:d0dfbce63a89 | 327 | /** @defgroup FLASH_OB_USER_IWDG_STANDBY FLASH Option Bytes User IWDG Mode On Standby |
| elmot | 1:d0dfbce63a89 | 328 | * @{ |
| elmot | 1:d0dfbce63a89 | 329 | */ |
| elmot | 1:d0dfbce63a89 | 330 | #define OB_IWDG_STDBY_FREEZE ((uint32_t)0x00000) /*!< Independent watchdog counter is frozen in Standby mode */ |
| elmot | 1:d0dfbce63a89 | 331 | #define OB_IWDG_STDBY_RUN ((uint32_t)FLASH_OPTR_IWDG_STDBY) /*!< Independent watchdog counter is running in Standby mode */ |
| elmot | 1:d0dfbce63a89 | 332 | /** |
| elmot | 1:d0dfbce63a89 | 333 | * @} |
| elmot | 1:d0dfbce63a89 | 334 | */ |
| elmot | 1:d0dfbce63a89 | 335 | |
| elmot | 1:d0dfbce63a89 | 336 | /** @defgroup FLASH_OB_USER_WWDG_SW FLASH Option Bytes User WWDG Type |
| elmot | 1:d0dfbce63a89 | 337 | * @{ |
| elmot | 1:d0dfbce63a89 | 338 | */ |
| elmot | 1:d0dfbce63a89 | 339 | #define OB_WWDG_HW ((uint32_t)0x00000) /*!< Hardware window watchdog */ |
| elmot | 1:d0dfbce63a89 | 340 | #define OB_WWDG_SW ((uint32_t)FLASH_OPTR_WWDG_SW) /*!< Software window watchdog */ |
| elmot | 1:d0dfbce63a89 | 341 | /** |
| elmot | 1:d0dfbce63a89 | 342 | * @} |
| elmot | 1:d0dfbce63a89 | 343 | */ |
| elmot | 1:d0dfbce63a89 | 344 | |
| elmot | 1:d0dfbce63a89 | 345 | #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 346 | /** @defgroup FLASH_OB_USER_BFB2 FLASH Option Bytes User BFB2 Mode |
| elmot | 1:d0dfbce63a89 | 347 | * @{ |
| elmot | 1:d0dfbce63a89 | 348 | */ |
| elmot | 1:d0dfbce63a89 | 349 | #define OB_BFB2_DISABLE ((uint32_t)0x000000) /*!< Dual-bank boot disable */ |
| elmot | 1:d0dfbce63a89 | 350 | #define OB_BFB2_ENABLE ((uint32_t)FLASH_OPTR_BFB2) /*!< Dual-bank boot enable */ |
| elmot | 1:d0dfbce63a89 | 351 | /** |
| elmot | 1:d0dfbce63a89 | 352 | * @} |
| elmot | 1:d0dfbce63a89 | 353 | */ |
| elmot | 1:d0dfbce63a89 | 354 | |
| elmot | 1:d0dfbce63a89 | 355 | /** @defgroup FLASH_OB_USER_DUALBANK FLASH Option Bytes User Dual-bank Type |
| elmot | 1:d0dfbce63a89 | 356 | * @{ |
| elmot | 1:d0dfbce63a89 | 357 | */ |
| elmot | 1:d0dfbce63a89 | 358 | #define OB_DUALBANK_SINGLE ((uint32_t)0x000000) /*!< 256 KB/512 KB Single-bank Flash */ |
| elmot | 1:d0dfbce63a89 | 359 | #define OB_DUALBANK_DUAL ((uint32_t)FLASH_OPTR_DUALBANK) /*!< 256 KB/512 KB Dual-bank Flash */ |
| elmot | 1:d0dfbce63a89 | 360 | /** |
| elmot | 1:d0dfbce63a89 | 361 | * @} |
| elmot | 1:d0dfbce63a89 | 362 | */ |
| elmot | 1:d0dfbce63a89 | 363 | #endif |
| elmot | 1:d0dfbce63a89 | 364 | |
| elmot | 1:d0dfbce63a89 | 365 | /** @defgroup FLASH_OB_USER_nBOOT1 FLASH Option Bytes User BOOT1 Type |
| elmot | 1:d0dfbce63a89 | 366 | * @{ |
| elmot | 1:d0dfbce63a89 | 367 | */ |
| elmot | 1:d0dfbce63a89 | 368 | #define OB_BOOT1_SRAM ((uint32_t)0x000000) /*!< Embedded SRAM1 is selected as boot space (if BOOT0=1) */ |
| elmot | 1:d0dfbce63a89 | 369 | #define OB_BOOT1_SYSTEM ((uint32_t)FLASH_OPTR_nBOOT1) /*!< System memory is selected as boot space (if BOOT0=1) */ |
| elmot | 1:d0dfbce63a89 | 370 | /** |
| elmot | 1:d0dfbce63a89 | 371 | * @} |
| elmot | 1:d0dfbce63a89 | 372 | */ |
| elmot | 1:d0dfbce63a89 | 373 | |
| elmot | 1:d0dfbce63a89 | 374 | /** @defgroup FLASH_OB_USER_SRAM2_PE FLASH Option Bytes User SRAM2 Parity Check Type |
| elmot | 1:d0dfbce63a89 | 375 | * @{ |
| elmot | 1:d0dfbce63a89 | 376 | */ |
| elmot | 1:d0dfbce63a89 | 377 | #define OB_SRAM2_PARITY_ENABLE ((uint32_t)0x0000000) /*!< SRAM2 parity check enable */ |
| elmot | 1:d0dfbce63a89 | 378 | #define OB_SRAM2_PARITY_DISABLE ((uint32_t)FLASH_OPTR_SRAM2_PE) /*!< SRAM2 parity check disable */ |
| elmot | 1:d0dfbce63a89 | 379 | /** |
| elmot | 1:d0dfbce63a89 | 380 | * @} |
| elmot | 1:d0dfbce63a89 | 381 | */ |
| elmot | 1:d0dfbce63a89 | 382 | |
| elmot | 1:d0dfbce63a89 | 383 | /** @defgroup FLASH_OB_USER_SRAM2_RST FLASH Option Bytes User SRAM2 Erase On Reset Type |
| elmot | 1:d0dfbce63a89 | 384 | * @{ |
| elmot | 1:d0dfbce63a89 | 385 | */ |
| elmot | 1:d0dfbce63a89 | 386 | #define OB_SRAM2_RST_ERASE ((uint32_t)0x0000000) /*!< SRAM2 erased when a system reset occurs */ |
| elmot | 1:d0dfbce63a89 | 387 | #define OB_SRAM2_RST_NOT_ERASE ((uint32_t)FLASH_OPTR_SRAM2_RST) /*!< SRAM2 is not erased when a system reset occurs */ |
| elmot | 1:d0dfbce63a89 | 388 | /** |
| elmot | 1:d0dfbce63a89 | 389 | * @} |
| elmot | 1:d0dfbce63a89 | 390 | */ |
| elmot | 1:d0dfbce63a89 | 391 | |
| elmot | 1:d0dfbce63a89 | 392 | #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) |
| elmot | 1:d0dfbce63a89 | 393 | /** @defgroup OB_USER_nSWBOOT0 FLASH Option Bytes User Software BOOT0 |
| elmot | 1:d0dfbce63a89 | 394 | * @{ |
| elmot | 1:d0dfbce63a89 | 395 | */ |
| elmot | 1:d0dfbce63a89 | 396 | #define OB_BOOT0_FROM_OB ((uint32_t)0x0000000) /*!< BOOT0 taken from the option bit nBOOT0 */ |
| elmot | 1:d0dfbce63a89 | 397 | #define OB_BOOT0_FROM_PIN ((uint32_t)FLASH_OPTR_nSWBOOT0) /*!< BOOT0 taken from PH3/BOOT0 pin */ |
| elmot | 1:d0dfbce63a89 | 398 | /** |
| elmot | 1:d0dfbce63a89 | 399 | * @} |
| elmot | 1:d0dfbce63a89 | 400 | */ |
| elmot | 1:d0dfbce63a89 | 401 | |
| elmot | 1:d0dfbce63a89 | 402 | /** @defgroup OB_USER_nBOOT0 FLASH Option Bytes User nBOOT0 option bit |
| elmot | 1:d0dfbce63a89 | 403 | * @{ |
| elmot | 1:d0dfbce63a89 | 404 | */ |
| elmot | 1:d0dfbce63a89 | 405 | #define OB_BOOT0_RESET ((uint32_t)0x0000000) /*!< nBOOT0 = 0 */ |
| elmot | 1:d0dfbce63a89 | 406 | #define OB_BOOT0_SET ((uint32_t)FLASH_OPTR_nBOOT0) /*!< nBOOT0 = 1 */ |
| elmot | 1:d0dfbce63a89 | 407 | /** |
| elmot | 1:d0dfbce63a89 | 408 | * @} |
| elmot | 1:d0dfbce63a89 | 409 | */ |
| elmot | 1:d0dfbce63a89 | 410 | #endif |
| elmot | 1:d0dfbce63a89 | 411 | |
| elmot | 1:d0dfbce63a89 | 412 | /** @defgroup FLASH_OB_PCROP_RDP FLASH Option Bytes PCROP On RDP Level Type |
| elmot | 1:d0dfbce63a89 | 413 | * @{ |
| elmot | 1:d0dfbce63a89 | 414 | */ |
| elmot | 1:d0dfbce63a89 | 415 | #define OB_PCROP_RDP_NOT_ERASE ((uint32_t)0x00000000) /*!< PCROP area is not erased when the RDP level |
| elmot | 1:d0dfbce63a89 | 416 | is decreased from Level 1 to Level 0 */ |
| elmot | 1:d0dfbce63a89 | 417 | #define OB_PCROP_RDP_ERASE ((uint32_t)FLASH_PCROP1ER_PCROP_RDP) /*!< PCROP area is erased when the RDP level is |
| elmot | 1:d0dfbce63a89 | 418 | decreased from Level 1 to Level 0 (full mass erase) */ |
| elmot | 1:d0dfbce63a89 | 419 | /** |
| elmot | 1:d0dfbce63a89 | 420 | * @} |
| elmot | 1:d0dfbce63a89 | 421 | */ |
| elmot | 1:d0dfbce63a89 | 422 | |
| elmot | 1:d0dfbce63a89 | 423 | /** @defgroup FLASH_Latency FLASH Latency |
| elmot | 1:d0dfbce63a89 | 424 | * @{ |
| elmot | 1:d0dfbce63a89 | 425 | */ |
| elmot | 1:d0dfbce63a89 | 426 | #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero wait state */ |
| elmot | 1:d0dfbce63a89 | 427 | #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One wait state */ |
| elmot | 1:d0dfbce63a89 | 428 | #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two wait states */ |
| elmot | 1:d0dfbce63a89 | 429 | #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three wait states */ |
| elmot | 1:d0dfbce63a89 | 430 | #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four wait states */ |
| elmot | 1:d0dfbce63a89 | 431 | /** |
| elmot | 1:d0dfbce63a89 | 432 | * @} |
| elmot | 1:d0dfbce63a89 | 433 | */ |
| elmot | 1:d0dfbce63a89 | 434 | |
| elmot | 1:d0dfbce63a89 | 435 | /** @defgroup FLASH_Keys FLASH Keys |
| elmot | 1:d0dfbce63a89 | 436 | * @{ |
| elmot | 1:d0dfbce63a89 | 437 | */ |
| elmot | 1:d0dfbce63a89 | 438 | #define FLASH_KEY1 ((uint32_t)0x45670123U) /*!< Flash key1 */ |
| elmot | 1:d0dfbce63a89 | 439 | #define FLASH_KEY2 ((uint32_t)0xCDEF89ABU) /*!< Flash key2: used with FLASH_KEY1 |
| elmot | 1:d0dfbce63a89 | 440 | to unlock the FLASH registers access */ |
| elmot | 1:d0dfbce63a89 | 441 | |
| elmot | 1:d0dfbce63a89 | 442 | #define FLASH_PDKEY1 ((uint32_t)0x04152637U) /*!< Flash power down key1 */ |
| elmot | 1:d0dfbce63a89 | 443 | #define FLASH_PDKEY2 ((uint32_t)0xFAFBFCFDU) /*!< Flash power down key2: used with FLASH_PDKEY1 |
| elmot | 1:d0dfbce63a89 | 444 | to unlock the RUN_PD bit in FLASH_ACR */ |
| elmot | 1:d0dfbce63a89 | 445 | |
| elmot | 1:d0dfbce63a89 | 446 | #define FLASH_OPTKEY1 ((uint32_t)0x08192A3BU) /*!< Flash option byte key1 */ |
| elmot | 1:d0dfbce63a89 | 447 | #define FLASH_OPTKEY2 ((uint32_t)0x4C5D6E7FU) /*!< Flash option byte key2: used with FLASH_OPTKEY1 |
| elmot | 1:d0dfbce63a89 | 448 | to allow option bytes operations */ |
| elmot | 1:d0dfbce63a89 | 449 | /** |
| elmot | 1:d0dfbce63a89 | 450 | * @} |
| elmot | 1:d0dfbce63a89 | 451 | */ |
| elmot | 1:d0dfbce63a89 | 452 | |
| elmot | 1:d0dfbce63a89 | 453 | /** @defgroup FLASH_Flags FLASH Flags Definition |
| elmot | 1:d0dfbce63a89 | 454 | * @{ |
| elmot | 1:d0dfbce63a89 | 455 | */ |
| elmot | 1:d0dfbce63a89 | 456 | #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of operation flag */ |
| elmot | 1:d0dfbce63a89 | 457 | #define FLASH_FLAG_OPERR FLASH_SR_OPERR /*!< FLASH Operation error flag */ |
| elmot | 1:d0dfbce63a89 | 458 | #define FLASH_FLAG_PROGERR FLASH_SR_PROGERR /*!< FLASH Programming error flag */ |
| elmot | 1:d0dfbce63a89 | 459 | #define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /*!< FLASH Write protection error flag */ |
| elmot | 1:d0dfbce63a89 | 460 | #define FLASH_FLAG_PGAERR FLASH_SR_PGAERR /*!< FLASH Programming alignment error flag */ |
| elmot | 1:d0dfbce63a89 | 461 | #define FLASH_FLAG_SIZERR FLASH_SR_SIZERR /*!< FLASH Size error flag */ |
| elmot | 1:d0dfbce63a89 | 462 | #define FLASH_FLAG_PGSERR FLASH_SR_PGSERR /*!< FLASH Programming sequence error flag */ |
| elmot | 1:d0dfbce63a89 | 463 | #define FLASH_FLAG_MISERR FLASH_SR_MISERR /*!< FLASH Fast programming data miss error flag */ |
| elmot | 1:d0dfbce63a89 | 464 | #define FLASH_FLAG_FASTERR FLASH_SR_FASTERR /*!< FLASH Fast programming error flag */ |
| elmot | 1:d0dfbce63a89 | 465 | #define FLASH_FLAG_RDERR FLASH_SR_RDERR /*!< FLASH PCROP read error flag */ |
| elmot | 1:d0dfbce63a89 | 466 | #define FLASH_FLAG_OPTVERR FLASH_SR_OPTVERR /*!< FLASH Option validity error flag */ |
| elmot | 1:d0dfbce63a89 | 467 | #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */ |
| elmot | 1:d0dfbce63a89 | 468 | #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) |
| elmot | 1:d0dfbce63a89 | 469 | #define FLASH_FLAG_PEMPTY FLASH_SR_PEMPTY /*!< FLASH Program empty */ |
| elmot | 1:d0dfbce63a89 | 470 | #endif |
| elmot | 1:d0dfbce63a89 | 471 | #define FLASH_FLAG_ECCC FLASH_ECCR_ECCC /*!< FLASH ECC correction */ |
| elmot | 1:d0dfbce63a89 | 472 | #define FLASH_FLAG_ECCD FLASH_ECCR_ECCD /*!< FLASH ECC detection */ |
| elmot | 1:d0dfbce63a89 | 473 | |
| elmot | 1:d0dfbce63a89 | 474 | #define FLASH_FLAG_ALL_ERRORS (FLASH_FLAG_OPERR | FLASH_FLAG_PROGERR | FLASH_FLAG_WRPERR | \ |
| elmot | 1:d0dfbce63a89 | 475 | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | FLASH_FLAG_PGSERR | \ |
| elmot | 1:d0dfbce63a89 | 476 | FLASH_FLAG_MISERR | FLASH_FLAG_FASTERR | FLASH_FLAG_RDERR | \ |
| elmot | 1:d0dfbce63a89 | 477 | FLASH_FLAG_OPTVERR | FLASH_FLAG_ECCD) |
| elmot | 1:d0dfbce63a89 | 478 | /** |
| elmot | 1:d0dfbce63a89 | 479 | * @} |
| elmot | 1:d0dfbce63a89 | 480 | */ |
| elmot | 1:d0dfbce63a89 | 481 | |
| elmot | 1:d0dfbce63a89 | 482 | /** @defgroup FLASH_Interrupt_definition FLASH Interrupts Definition |
| elmot | 1:d0dfbce63a89 | 483 | * @brief FLASH Interrupt definition |
| elmot | 1:d0dfbce63a89 | 484 | * @{ |
| elmot | 1:d0dfbce63a89 | 485 | */ |
| elmot | 1:d0dfbce63a89 | 486 | #define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */ |
| elmot | 1:d0dfbce63a89 | 487 | #define FLASH_IT_OPERR FLASH_CR_ERRIE /*!< Error Interrupt source */ |
| elmot | 1:d0dfbce63a89 | 488 | #define FLASH_IT_RDERR FLASH_CR_RDERRIE /*!< PCROP Read Error Interrupt source*/ |
| elmot | 1:d0dfbce63a89 | 489 | #define FLASH_IT_ECCC (FLASH_ECCR_ECCIE >> 24) /*!< ECC Correction Interrupt source */ |
| elmot | 1:d0dfbce63a89 | 490 | /** |
| elmot | 1:d0dfbce63a89 | 491 | * @} |
| elmot | 1:d0dfbce63a89 | 492 | */ |
| elmot | 1:d0dfbce63a89 | 493 | |
| elmot | 1:d0dfbce63a89 | 494 | /** |
| elmot | 1:d0dfbce63a89 | 495 | * @} |
| elmot | 1:d0dfbce63a89 | 496 | */ |
| elmot | 1:d0dfbce63a89 | 497 | |
| elmot | 1:d0dfbce63a89 | 498 | /* Exported macros -----------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 499 | /** @defgroup FLASH_Exported_Macros FLASH Exported Macros |
| elmot | 1:d0dfbce63a89 | 500 | * @brief macros to control FLASH features |
| elmot | 1:d0dfbce63a89 | 501 | * @{ |
| elmot | 1:d0dfbce63a89 | 502 | */ |
| elmot | 1:d0dfbce63a89 | 503 | |
| elmot | 1:d0dfbce63a89 | 504 | /** |
| elmot | 1:d0dfbce63a89 | 505 | * @brief Set the FLASH Latency. |
| elmot | 1:d0dfbce63a89 | 506 | * @param __LATENCY__: FLASH Latency |
| elmot | 1:d0dfbce63a89 | 507 | * This parameter can be one of the following values : |
| elmot | 1:d0dfbce63a89 | 508 | * @arg FLASH_LATENCY_0: FLASH Zero wait state |
| elmot | 1:d0dfbce63a89 | 509 | * @arg FLASH_LATENCY_1: FLASH One wait state |
| elmot | 1:d0dfbce63a89 | 510 | * @arg FLASH_LATENCY_2: FLASH Two wait states |
| elmot | 1:d0dfbce63a89 | 511 | * @arg FLASH_LATENCY_3: FLASH Three wait states |
| elmot | 1:d0dfbce63a89 | 512 | * @arg FLASH_LATENCY_4: FLASH Four wait states |
| elmot | 1:d0dfbce63a89 | 513 | * @retval None |
| elmot | 1:d0dfbce63a89 | 514 | */ |
| elmot | 1:d0dfbce63a89 | 515 | #define __HAL_FLASH_SET_LATENCY(__LATENCY__) (MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (__LATENCY__))) |
| elmot | 1:d0dfbce63a89 | 516 | |
| elmot | 1:d0dfbce63a89 | 517 | /** |
| elmot | 1:d0dfbce63a89 | 518 | * @brief Get the FLASH Latency. |
| elmot | 1:d0dfbce63a89 | 519 | * @retval FLASH Latency |
| elmot | 1:d0dfbce63a89 | 520 | * This parameter can be one of the following values : |
| elmot | 1:d0dfbce63a89 | 521 | * @arg FLASH_LATENCY_0: FLASH Zero wait state |
| elmot | 1:d0dfbce63a89 | 522 | * @arg FLASH_LATENCY_1: FLASH One wait state |
| elmot | 1:d0dfbce63a89 | 523 | * @arg FLASH_LATENCY_2: FLASH Two wait states |
| elmot | 1:d0dfbce63a89 | 524 | * @arg FLASH_LATENCY_3: FLASH Three wait states |
| elmot | 1:d0dfbce63a89 | 525 | * @arg FLASH_LATENCY_4: FLASH Four wait states |
| elmot | 1:d0dfbce63a89 | 526 | */ |
| elmot | 1:d0dfbce63a89 | 527 | #define __HAL_FLASH_GET_LATENCY() READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY) |
| elmot | 1:d0dfbce63a89 | 528 | |
| elmot | 1:d0dfbce63a89 | 529 | /** |
| elmot | 1:d0dfbce63a89 | 530 | * @brief Enable the FLASH prefetch buffer. |
| elmot | 1:d0dfbce63a89 | 531 | * @retval None |
| elmot | 1:d0dfbce63a89 | 532 | */ |
| elmot | 1:d0dfbce63a89 | 533 | #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) |
| elmot | 1:d0dfbce63a89 | 534 | |
| elmot | 1:d0dfbce63a89 | 535 | /** |
| elmot | 1:d0dfbce63a89 | 536 | * @brief Disable the FLASH prefetch buffer. |
| elmot | 1:d0dfbce63a89 | 537 | * @retval None |
| elmot | 1:d0dfbce63a89 | 538 | */ |
| elmot | 1:d0dfbce63a89 | 539 | #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) |
| elmot | 1:d0dfbce63a89 | 540 | |
| elmot | 1:d0dfbce63a89 | 541 | /** |
| elmot | 1:d0dfbce63a89 | 542 | * @brief Enable the FLASH instruction cache. |
| elmot | 1:d0dfbce63a89 | 543 | * @retval none |
| elmot | 1:d0dfbce63a89 | 544 | */ |
| elmot | 1:d0dfbce63a89 | 545 | #define __HAL_FLASH_INSTRUCTION_CACHE_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_ICEN) |
| elmot | 1:d0dfbce63a89 | 546 | |
| elmot | 1:d0dfbce63a89 | 547 | /** |
| elmot | 1:d0dfbce63a89 | 548 | * @brief Disable the FLASH instruction cache. |
| elmot | 1:d0dfbce63a89 | 549 | * @retval none |
| elmot | 1:d0dfbce63a89 | 550 | */ |
| elmot | 1:d0dfbce63a89 | 551 | #define __HAL_FLASH_INSTRUCTION_CACHE_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICEN) |
| elmot | 1:d0dfbce63a89 | 552 | |
| elmot | 1:d0dfbce63a89 | 553 | /** |
| elmot | 1:d0dfbce63a89 | 554 | * @brief Enable the FLASH data cache. |
| elmot | 1:d0dfbce63a89 | 555 | * @retval none |
| elmot | 1:d0dfbce63a89 | 556 | */ |
| elmot | 1:d0dfbce63a89 | 557 | #define __HAL_FLASH_DATA_CACHE_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_DCEN) |
| elmot | 1:d0dfbce63a89 | 558 | |
| elmot | 1:d0dfbce63a89 | 559 | /** |
| elmot | 1:d0dfbce63a89 | 560 | * @brief Disable the FLASH data cache. |
| elmot | 1:d0dfbce63a89 | 561 | * @retval none |
| elmot | 1:d0dfbce63a89 | 562 | */ |
| elmot | 1:d0dfbce63a89 | 563 | #define __HAL_FLASH_DATA_CACHE_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCEN) |
| elmot | 1:d0dfbce63a89 | 564 | |
| elmot | 1:d0dfbce63a89 | 565 | /** |
| elmot | 1:d0dfbce63a89 | 566 | * @brief Reset the FLASH instruction Cache. |
| elmot | 1:d0dfbce63a89 | 567 | * @note This function must be used only when the Instruction Cache is disabled. |
| elmot | 1:d0dfbce63a89 | 568 | * @retval None |
| elmot | 1:d0dfbce63a89 | 569 | */ |
| elmot | 1:d0dfbce63a89 | 570 | #define __HAL_FLASH_INSTRUCTION_CACHE_RESET() do { SET_BIT(FLASH->ACR, FLASH_ACR_ICRST); \ |
| elmot | 1:d0dfbce63a89 | 571 | CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICRST); \ |
| elmot | 1:d0dfbce63a89 | 572 | } while (0) |
| elmot | 1:d0dfbce63a89 | 573 | |
| elmot | 1:d0dfbce63a89 | 574 | /** |
| elmot | 1:d0dfbce63a89 | 575 | * @brief Reset the FLASH data Cache. |
| elmot | 1:d0dfbce63a89 | 576 | * @note This function must be used only when the data Cache is disabled. |
| elmot | 1:d0dfbce63a89 | 577 | * @retval None |
| elmot | 1:d0dfbce63a89 | 578 | */ |
| elmot | 1:d0dfbce63a89 | 579 | #define __HAL_FLASH_DATA_CACHE_RESET() do { SET_BIT(FLASH->ACR, FLASH_ACR_DCRST); \ |
| elmot | 1:d0dfbce63a89 | 580 | CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCRST); \ |
| elmot | 1:d0dfbce63a89 | 581 | } while (0) |
| elmot | 1:d0dfbce63a89 | 582 | |
| elmot | 1:d0dfbce63a89 | 583 | /** |
| elmot | 1:d0dfbce63a89 | 584 | * @brief Enable the FLASH power down during Low-power run mode. |
| elmot | 1:d0dfbce63a89 | 585 | * @note Writing this bit to 0 this bit, automatically the keys are |
| elmot | 1:d0dfbce63a89 | 586 | * loss and a new unlock sequence is necessary to re-write it to 1. |
| elmot | 1:d0dfbce63a89 | 587 | */ |
| elmot | 1:d0dfbce63a89 | 588 | #define __HAL_FLASH_POWER_DOWN_ENABLE() do { WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1); \ |
| elmot | 1:d0dfbce63a89 | 589 | WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2); \ |
| elmot | 1:d0dfbce63a89 | 590 | SET_BIT(FLASH->ACR, FLASH_ACR_RUN_PD); \ |
| elmot | 1:d0dfbce63a89 | 591 | } while (0) |
| elmot | 1:d0dfbce63a89 | 592 | |
| elmot | 1:d0dfbce63a89 | 593 | /** |
| elmot | 1:d0dfbce63a89 | 594 | * @brief Disable the FLASH power down during Low-power run mode. |
| elmot | 1:d0dfbce63a89 | 595 | * @note Writing this bit to 0 this bit, automatically the keys are |
| elmot | 1:d0dfbce63a89 | 596 | * loss and a new unlock sequence is necessary to re-write it to 1. |
| elmot | 1:d0dfbce63a89 | 597 | */ |
| elmot | 1:d0dfbce63a89 | 598 | #define __HAL_FLASH_POWER_DOWN_DISABLE() do { WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1); \ |
| elmot | 1:d0dfbce63a89 | 599 | WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2); \ |
| elmot | 1:d0dfbce63a89 | 600 | CLEAR_BIT(FLASH->ACR, FLASH_ACR_RUN_PD); \ |
| elmot | 1:d0dfbce63a89 | 601 | } while (0) |
| elmot | 1:d0dfbce63a89 | 602 | |
| elmot | 1:d0dfbce63a89 | 603 | /** |
| elmot | 1:d0dfbce63a89 | 604 | * @brief Enable the FLASH power down during Low-Power sleep mode |
| elmot | 1:d0dfbce63a89 | 605 | * @retval none |
| elmot | 1:d0dfbce63a89 | 606 | */ |
| elmot | 1:d0dfbce63a89 | 607 | #define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) |
| elmot | 1:d0dfbce63a89 | 608 | |
| elmot | 1:d0dfbce63a89 | 609 | /** |
| elmot | 1:d0dfbce63a89 | 610 | * @brief Disable the FLASH power down during Low-Power sleep mode |
| elmot | 1:d0dfbce63a89 | 611 | * @retval none |
| elmot | 1:d0dfbce63a89 | 612 | */ |
| elmot | 1:d0dfbce63a89 | 613 | #define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) |
| elmot | 1:d0dfbce63a89 | 614 | |
| elmot | 1:d0dfbce63a89 | 615 | /** |
| elmot | 1:d0dfbce63a89 | 616 | * @} |
| elmot | 1:d0dfbce63a89 | 617 | */ |
| elmot | 1:d0dfbce63a89 | 618 | |
| elmot | 1:d0dfbce63a89 | 619 | /** @defgroup FLASH_Interrupt FLASH Interrupts Macros |
| elmot | 1:d0dfbce63a89 | 620 | * @brief macros to handle FLASH interrupts |
| elmot | 1:d0dfbce63a89 | 621 | * @{ |
| elmot | 1:d0dfbce63a89 | 622 | */ |
| elmot | 1:d0dfbce63a89 | 623 | |
| elmot | 1:d0dfbce63a89 | 624 | /** |
| elmot | 1:d0dfbce63a89 | 625 | * @brief Enable the specified FLASH interrupt. |
| elmot | 1:d0dfbce63a89 | 626 | * @param __INTERRUPT__: FLASH interrupt |
| elmot | 1:d0dfbce63a89 | 627 | * This parameter can be any combination of the following values: |
| elmot | 1:d0dfbce63a89 | 628 | * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt |
| elmot | 1:d0dfbce63a89 | 629 | * @arg FLASH_IT_OPERR: Error Interrupt |
| elmot | 1:d0dfbce63a89 | 630 | * @arg FLASH_IT_RDERR: PCROP Read Error Interrupt |
| elmot | 1:d0dfbce63a89 | 631 | * @arg FLASH_IT_ECCC: ECC Correction Interrupt |
| elmot | 1:d0dfbce63a89 | 632 | * @retval none |
| elmot | 1:d0dfbce63a89 | 633 | */ |
| elmot | 1:d0dfbce63a89 | 634 | #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { if((__INTERRUPT__) & FLASH_IT_ECCC) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\ |
| elmot | 1:d0dfbce63a89 | 635 | if((__INTERRUPT__) & (~FLASH_IT_ECCC)) { SET_BIT(FLASH->CR, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\ |
| elmot | 1:d0dfbce63a89 | 636 | } while(0) |
| elmot | 1:d0dfbce63a89 | 637 | |
| elmot | 1:d0dfbce63a89 | 638 | /** |
| elmot | 1:d0dfbce63a89 | 639 | * @brief Disable the specified FLASH interrupt. |
| elmot | 1:d0dfbce63a89 | 640 | * @param __INTERRUPT__: FLASH interrupt |
| elmot | 1:d0dfbce63a89 | 641 | * This parameter can be any combination of the following values: |
| elmot | 1:d0dfbce63a89 | 642 | * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt |
| elmot | 1:d0dfbce63a89 | 643 | * @arg FLASH_IT_OPERR: Error Interrupt |
| elmot | 1:d0dfbce63a89 | 644 | * @arg FLASH_IT_RDERR: PCROP Read Error Interrupt |
| elmot | 1:d0dfbce63a89 | 645 | * @arg FLASH_IT_ECCC: ECC Correction Interrupt |
| elmot | 1:d0dfbce63a89 | 646 | * @retval none |
| elmot | 1:d0dfbce63a89 | 647 | */ |
| elmot | 1:d0dfbce63a89 | 648 | #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { if((__INTERRUPT__) & FLASH_IT_ECCC) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\ |
| elmot | 1:d0dfbce63a89 | 649 | if((__INTERRUPT__) & (~FLASH_IT_ECCC)) { CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\ |
| elmot | 1:d0dfbce63a89 | 650 | } while(0) |
| elmot | 1:d0dfbce63a89 | 651 | |
| elmot | 1:d0dfbce63a89 | 652 | /** |
| elmot | 1:d0dfbce63a89 | 653 | * @brief Check whether the specified FLASH flag is set or not. |
| elmot | 1:d0dfbce63a89 | 654 | * @param __FLAG__: specifies the FLASH flag to check. |
| elmot | 1:d0dfbce63a89 | 655 | * This parameter can be one of the following values: |
| elmot | 1:d0dfbce63a89 | 656 | * @arg FLASH_FLAG_EOP: FLASH End of Operation flag |
| elmot | 1:d0dfbce63a89 | 657 | * @arg FLASH_FLAG_OPERR: FLASH Operation error flag |
| elmot | 1:d0dfbce63a89 | 658 | * @arg FLASH_FLAG_PROGERR: FLASH Programming error flag |
| elmot | 1:d0dfbce63a89 | 659 | * @arg FLASH_FLAG_WRPERR: FLASH Write protection error flag |
| elmot | 1:d0dfbce63a89 | 660 | * @arg FLASH_FLAG_PGAERR: FLASH Programming alignment error flag |
| elmot | 1:d0dfbce63a89 | 661 | * @arg FLASH_FLAG_SIZERR: FLASH Size error flag |
| elmot | 1:d0dfbce63a89 | 662 | * @arg FLASH_FLAG_PGSERR: FLASH Programming sequence error flag |
| elmot | 1:d0dfbce63a89 | 663 | * @arg FLASH_FLAG_MISERR: FLASH Fast programming data miss error flag |
| elmot | 1:d0dfbce63a89 | 664 | * @arg FLASH_FLAG_FASTERR: FLASH Fast programming error flag |
| elmot | 1:d0dfbce63a89 | 665 | * @arg FLASH_FLAG_RDERR: FLASH PCROP read error flag |
| elmot | 1:d0dfbce63a89 | 666 | * @arg FLASH_FLAG_OPTVERR: FLASH Option validity error flag |
| elmot | 1:d0dfbce63a89 | 667 | * @arg FLASH_FLAG_BSY: FLASH write/erase operations in progress flag |
| elmot | 1:d0dfbce63a89 | 668 | * @arg FLASH_FLAG_PEMPTY : FLASH Boot from not programmed flash (apply only for STM32L43x/STM32L44x devices) |
| elmot | 1:d0dfbce63a89 | 669 | * @arg FLASH_FLAG_ECCC: FLASH one ECC error has been detected and corrected |
| elmot | 1:d0dfbce63a89 | 670 | * @arg FLASH_FLAG_ECCD: FLASH two ECC errors have been detected |
| elmot | 1:d0dfbce63a89 | 671 | * @retval The new state of FLASH_FLAG (SET or RESET). |
| elmot | 1:d0dfbce63a89 | 672 | */ |
| elmot | 1:d0dfbce63a89 | 673 | #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) ? \ |
| elmot | 1:d0dfbce63a89 | 674 | (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \ |
| elmot | 1:d0dfbce63a89 | 675 | (READ_BIT(FLASH->SR, (__FLAG__)) == (__FLAG__))) |
| elmot | 1:d0dfbce63a89 | 676 | |
| elmot | 1:d0dfbce63a89 | 677 | /** |
| elmot | 1:d0dfbce63a89 | 678 | * @brief Clear the FLASH's pending flags. |
| elmot | 1:d0dfbce63a89 | 679 | * @param __FLAG__: specifies the FLASH flags to clear. |
| elmot | 1:d0dfbce63a89 | 680 | * This parameter can be any combination of the following values: |
| elmot | 1:d0dfbce63a89 | 681 | * @arg FLASH_FLAG_EOP: FLASH End of Operation flag |
| elmot | 1:d0dfbce63a89 | 682 | * @arg FLASH_FLAG_OPERR: FLASH Operation error flag |
| elmot | 1:d0dfbce63a89 | 683 | * @arg FLASH_FLAG_PROGERR: FLASH Programming error flag |
| elmot | 1:d0dfbce63a89 | 684 | * @arg FLASH_FLAG_WRPERR: FLASH Write protection error flag |
| elmot | 1:d0dfbce63a89 | 685 | * @arg FLASH_FLAG_PGAERR: FLASH Programming alignment error flag |
| elmot | 1:d0dfbce63a89 | 686 | * @arg FLASH_FLAG_SIZERR: FLASH Size error flag |
| elmot | 1:d0dfbce63a89 | 687 | * @arg FLASH_FLAG_PGSERR: FLASH Programming sequence error flag |
| elmot | 1:d0dfbce63a89 | 688 | * @arg FLASH_FLAG_MISERR: FLASH Fast programming data miss error flag |
| elmot | 1:d0dfbce63a89 | 689 | * @arg FLASH_FLAG_FASTERR: FLASH Fast programming error flag |
| elmot | 1:d0dfbce63a89 | 690 | * @arg FLASH_FLAG_RDERR: FLASH PCROP read error flag |
| elmot | 1:d0dfbce63a89 | 691 | * @arg FLASH_FLAG_OPTVERR: FLASH Option validity error flag |
| elmot | 1:d0dfbce63a89 | 692 | * @arg FLASH_FLAG_ECCC: FLASH one ECC error has been detected and corrected |
| elmot | 1:d0dfbce63a89 | 693 | * @arg FLASH_FLAG_ECCD: FLASH two ECC errors have been detected |
| elmot | 1:d0dfbce63a89 | 694 | * @arg FLASH_FLAG_ALL_ERRORS: FLASH All errors flags |
| elmot | 1:d0dfbce63a89 | 695 | * @retval None |
| elmot | 1:d0dfbce63a89 | 696 | */ |
| elmot | 1:d0dfbce63a89 | 697 | #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { if((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) { SET_BIT(FLASH->ECCR, ((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD))); }\ |
| elmot | 1:d0dfbce63a89 | 698 | if((__FLAG__) & ~(FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) { WRITE_REG(FLASH->SR, ((__FLAG__) & ~(FLASH_FLAG_ECCC | FLASH_FLAG_ECCD))); }\ |
| elmot | 1:d0dfbce63a89 | 699 | } while(0) |
| elmot | 1:d0dfbce63a89 | 700 | /** |
| elmot | 1:d0dfbce63a89 | 701 | * @} |
| elmot | 1:d0dfbce63a89 | 702 | */ |
| elmot | 1:d0dfbce63a89 | 703 | |
| elmot | 1:d0dfbce63a89 | 704 | /* Include FLASH HAL Extended module */ |
| elmot | 1:d0dfbce63a89 | 705 | #include "stm32l4xx_hal_flash_ex.h" |
| elmot | 1:d0dfbce63a89 | 706 | #include "stm32l4xx_hal_flash_ramfunc.h" |
| elmot | 1:d0dfbce63a89 | 707 | |
| elmot | 1:d0dfbce63a89 | 708 | /* Exported functions --------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 709 | /** @addtogroup FLASH_Exported_Functions |
| elmot | 1:d0dfbce63a89 | 710 | * @{ |
| elmot | 1:d0dfbce63a89 | 711 | */ |
| elmot | 1:d0dfbce63a89 | 712 | |
| elmot | 1:d0dfbce63a89 | 713 | /* Program operation functions ***********************************************/ |
| elmot | 1:d0dfbce63a89 | 714 | /** @addtogroup FLASH_Exported_Functions_Group1 |
| elmot | 1:d0dfbce63a89 | 715 | * @{ |
| elmot | 1:d0dfbce63a89 | 716 | */ |
| elmot | 1:d0dfbce63a89 | 717 | HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data); |
| elmot | 1:d0dfbce63a89 | 718 | HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data); |
| elmot | 1:d0dfbce63a89 | 719 | /* FLASH IRQ handler method */ |
| elmot | 1:d0dfbce63a89 | 720 | void HAL_FLASH_IRQHandler(void); |
| elmot | 1:d0dfbce63a89 | 721 | /* Callbacks in non blocking modes */ |
| elmot | 1:d0dfbce63a89 | 722 | void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue); |
| elmot | 1:d0dfbce63a89 | 723 | void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue); |
| elmot | 1:d0dfbce63a89 | 724 | /** |
| elmot | 1:d0dfbce63a89 | 725 | * @} |
| elmot | 1:d0dfbce63a89 | 726 | */ |
| elmot | 1:d0dfbce63a89 | 727 | |
| elmot | 1:d0dfbce63a89 | 728 | /* Peripheral Control functions **********************************************/ |
| elmot | 1:d0dfbce63a89 | 729 | /** @addtogroup FLASH_Exported_Functions_Group2 |
| elmot | 1:d0dfbce63a89 | 730 | * @{ |
| elmot | 1:d0dfbce63a89 | 731 | */ |
| elmot | 1:d0dfbce63a89 | 732 | HAL_StatusTypeDef HAL_FLASH_Unlock(void); |
| elmot | 1:d0dfbce63a89 | 733 | HAL_StatusTypeDef HAL_FLASH_Lock(void); |
| elmot | 1:d0dfbce63a89 | 734 | /* Option bytes control */ |
| elmot | 1:d0dfbce63a89 | 735 | HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void); |
| elmot | 1:d0dfbce63a89 | 736 | HAL_StatusTypeDef HAL_FLASH_OB_Lock(void); |
| elmot | 1:d0dfbce63a89 | 737 | HAL_StatusTypeDef HAL_FLASH_OB_Launch(void); |
| elmot | 1:d0dfbce63a89 | 738 | /** |
| elmot | 1:d0dfbce63a89 | 739 | * @} |
| elmot | 1:d0dfbce63a89 | 740 | */ |
| elmot | 1:d0dfbce63a89 | 741 | |
| elmot | 1:d0dfbce63a89 | 742 | /* Peripheral State functions ************************************************/ |
| elmot | 1:d0dfbce63a89 | 743 | /** @addtogroup FLASH_Exported_Functions_Group3 |
| elmot | 1:d0dfbce63a89 | 744 | * @{ |
| elmot | 1:d0dfbce63a89 | 745 | */ |
| elmot | 1:d0dfbce63a89 | 746 | uint32_t HAL_FLASH_GetError(void); |
| elmot | 1:d0dfbce63a89 | 747 | /** |
| elmot | 1:d0dfbce63a89 | 748 | * @} |
| elmot | 1:d0dfbce63a89 | 749 | */ |
| elmot | 1:d0dfbce63a89 | 750 | |
| elmot | 1:d0dfbce63a89 | 751 | /** |
| elmot | 1:d0dfbce63a89 | 752 | * @} |
| elmot | 1:d0dfbce63a89 | 753 | */ |
| elmot | 1:d0dfbce63a89 | 754 | |
| elmot | 1:d0dfbce63a89 | 755 | /* Private constants --------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 756 | /** @defgroup FLASH_Private_Constants FLASH Private Constants |
| elmot | 1:d0dfbce63a89 | 757 | * @{ |
| elmot | 1:d0dfbce63a89 | 758 | */ |
| elmot | 1:d0dfbce63a89 | 759 | #define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0) |
| elmot | 1:d0dfbce63a89 | 760 | |
| elmot | 1:d0dfbce63a89 | 761 | #define FLASH_SIZE ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0xFFFF)) ? (0x400 << 10) : \ |
| elmot | 1:d0dfbce63a89 | 762 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) << 10)) |
| elmot | 1:d0dfbce63a89 | 763 | |
| elmot | 1:d0dfbce63a89 | 764 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 765 | #define FLASH_BANK_SIZE (FLASH_SIZE >> 1) |
| elmot | 1:d0dfbce63a89 | 766 | #else |
| elmot | 1:d0dfbce63a89 | 767 | #define FLASH_BANK_SIZE (FLASH_SIZE) |
| elmot | 1:d0dfbce63a89 | 768 | #endif |
| elmot | 1:d0dfbce63a89 | 769 | |
| elmot | 1:d0dfbce63a89 | 770 | #define FLASH_PAGE_SIZE ((uint32_t)0x800) |
| elmot | 1:d0dfbce63a89 | 771 | |
| elmot | 1:d0dfbce63a89 | 772 | #define FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */ |
| elmot | 1:d0dfbce63a89 | 773 | /** |
| elmot | 1:d0dfbce63a89 | 774 | * @} |
| elmot | 1:d0dfbce63a89 | 775 | */ |
| elmot | 1:d0dfbce63a89 | 776 | |
| elmot | 1:d0dfbce63a89 | 777 | /* Private macros ------------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 778 | /** @defgroup FLASH_Private_Macros FLASH Private Macros |
| elmot | 1:d0dfbce63a89 | 779 | * @{ |
| elmot | 1:d0dfbce63a89 | 780 | */ |
| elmot | 1:d0dfbce63a89 | 781 | |
| elmot | 1:d0dfbce63a89 | 782 | #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || \ |
| elmot | 1:d0dfbce63a89 | 783 | ((VALUE) == FLASH_TYPEERASE_MASSERASE)) |
| elmot | 1:d0dfbce63a89 | 784 | |
| elmot | 1:d0dfbce63a89 | 785 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 786 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ |
| elmot | 1:d0dfbce63a89 | 787 | ((BANK) == FLASH_BANK_2) || \ |
| elmot | 1:d0dfbce63a89 | 788 | ((BANK) == FLASH_BANK_BOTH)) |
| elmot | 1:d0dfbce63a89 | 789 | |
| elmot | 1:d0dfbce63a89 | 790 | #define IS_FLASH_BANK_EXCLUSIVE(BANK) (((BANK) == FLASH_BANK_1) || \ |
| elmot | 1:d0dfbce63a89 | 791 | ((BANK) == FLASH_BANK_2)) |
| elmot | 1:d0dfbce63a89 | 792 | #else |
| elmot | 1:d0dfbce63a89 | 793 | #define IS_FLASH_BANK(BANK) ((BANK) == FLASH_BANK_1) |
| elmot | 1:d0dfbce63a89 | 794 | |
| elmot | 1:d0dfbce63a89 | 795 | #define IS_FLASH_BANK_EXCLUSIVE(BANK) ((BANK) == FLASH_BANK_1) |
| elmot | 1:d0dfbce63a89 | 796 | #endif |
| elmot | 1:d0dfbce63a89 | 797 | |
| elmot | 1:d0dfbce63a89 | 798 | #define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD) || \ |
| elmot | 1:d0dfbce63a89 | 799 | ((VALUE) == FLASH_TYPEPROGRAM_FAST) || \ |
| elmot | 1:d0dfbce63a89 | 800 | ((VALUE) == FLASH_TYPEPROGRAM_FAST_AND_LAST)) |
| elmot | 1:d0dfbce63a89 | 801 | |
| elmot | 1:d0dfbce63a89 | 802 | #define IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x400) ? \ |
| elmot | 1:d0dfbce63a89 | 803 | ((ADDRESS) <= FLASH_BASE+0xFFFFF) : ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x200) ? \ |
| elmot | 1:d0dfbce63a89 | 804 | ((ADDRESS) <= FLASH_BASE+0x7FFFF) : ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? \ |
| elmot | 1:d0dfbce63a89 | 805 | ((ADDRESS) <= FLASH_BASE+0x3FFFF) : ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x80) ? \ |
| elmot | 1:d0dfbce63a89 | 806 | ((ADDRESS) <= FLASH_BASE+0x1FFFF) : ((ADDRESS) <= FLASH_BASE+0xFFFFF)))))) |
| elmot | 1:d0dfbce63a89 | 807 | |
| elmot | 1:d0dfbce63a89 | 808 | #define IS_FLASH_OTP_ADDRESS(ADDRESS) (((ADDRESS) >= 0x1FFF7000) && ((ADDRESS) <= 0x1FFF73FF)) |
| elmot | 1:d0dfbce63a89 | 809 | |
| elmot | 1:d0dfbce63a89 | 810 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) || IS_FLASH_OTP_ADDRESS(ADDRESS)) |
| elmot | 1:d0dfbce63a89 | 811 | |
| elmot | 1:d0dfbce63a89 | 812 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 813 | #define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x400) ? ((PAGE) < 256) : \ |
| elmot | 1:d0dfbce63a89 | 814 | ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x200) ? ((PAGE) < 128) : \ |
| elmot | 1:d0dfbce63a89 | 815 | ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 64) : \ |
| elmot | 1:d0dfbce63a89 | 816 | ((PAGE) < 256))))) |
| elmot | 1:d0dfbce63a89 | 817 | #else |
| elmot | 1:d0dfbce63a89 | 818 | #define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 128) : \ |
| elmot | 1:d0dfbce63a89 | 819 | ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x80) ? ((PAGE) < 64) : \ |
| elmot | 1:d0dfbce63a89 | 820 | ((PAGE) < 128)))) |
| elmot | 1:d0dfbce63a89 | 821 | #endif |
| elmot | 1:d0dfbce63a89 | 822 | |
| elmot | 1:d0dfbce63a89 | 823 | #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_PCROP))) |
| elmot | 1:d0dfbce63a89 | 824 | |
| elmot | 1:d0dfbce63a89 | 825 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 826 | #define IS_OB_WRPAREA(VALUE) (((VALUE) == OB_WRPAREA_BANK1_AREAA) || ((VALUE) == OB_WRPAREA_BANK1_AREAB) || \ |
| elmot | 1:d0dfbce63a89 | 827 | ((VALUE) == OB_WRPAREA_BANK2_AREAA) || ((VALUE) == OB_WRPAREA_BANK2_AREAB)) |
| elmot | 1:d0dfbce63a89 | 828 | #else |
| elmot | 1:d0dfbce63a89 | 829 | #define IS_OB_WRPAREA(VALUE) (((VALUE) == OB_WRPAREA_BANK1_AREAA) || ((VALUE) == OB_WRPAREA_BANK1_AREAB)) |
| elmot | 1:d0dfbce63a89 | 830 | #endif |
| elmot | 1:d0dfbce63a89 | 831 | |
| elmot | 1:d0dfbce63a89 | 832 | #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ |
| elmot | 1:d0dfbce63a89 | 833 | ((LEVEL) == OB_RDP_LEVEL_1)/* ||\ |
| elmot | 1:d0dfbce63a89 | 834 | ((LEVEL) == OB_RDP_LEVEL_2)*/) |
| elmot | 1:d0dfbce63a89 | 835 | |
| elmot | 1:d0dfbce63a89 | 836 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 837 | #define IS_OB_USER_TYPE(TYPE) (((TYPE) <= (uint32_t)0x1FFF) && ((TYPE) != 0)) |
| elmot | 1:d0dfbce63a89 | 838 | #else |
| elmot | 1:d0dfbce63a89 | 839 | #define IS_OB_USER_TYPE(TYPE) (((TYPE) <= (uint32_t)0x7E7F) && ((TYPE) != 0) && (((TYPE)&0x0180) == 0)) |
| elmot | 1:d0dfbce63a89 | 840 | #endif |
| elmot | 1:d0dfbce63a89 | 841 | |
| elmot | 1:d0dfbce63a89 | 842 | #define IS_OB_USER_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL_0) || ((LEVEL) == OB_BOR_LEVEL_1) || \ |
| elmot | 1:d0dfbce63a89 | 843 | ((LEVEL) == OB_BOR_LEVEL_2) || ((LEVEL) == OB_BOR_LEVEL_3) || \ |
| elmot | 1:d0dfbce63a89 | 844 | ((LEVEL) == OB_BOR_LEVEL_4)) |
| elmot | 1:d0dfbce63a89 | 845 | |
| elmot | 1:d0dfbce63a89 | 846 | #define IS_OB_USER_STOP(VALUE) (((VALUE) == OB_STOP_RST) || ((VALUE) == OB_STOP_NORST)) |
| elmot | 1:d0dfbce63a89 | 847 | |
| elmot | 1:d0dfbce63a89 | 848 | #define IS_OB_USER_STANDBY(VALUE) (((VALUE) == OB_STANDBY_RST) || ((VALUE) == OB_STANDBY_NORST)) |
| elmot | 1:d0dfbce63a89 | 849 | |
| elmot | 1:d0dfbce63a89 | 850 | #define IS_OB_USER_SHUTDOWN(VALUE) (((VALUE) == OB_SHUTDOWN_RST) || ((VALUE) == OB_SHUTDOWN_NORST)) |
| elmot | 1:d0dfbce63a89 | 851 | |
| elmot | 1:d0dfbce63a89 | 852 | #define IS_OB_USER_IWDG(VALUE) (((VALUE) == OB_IWDG_HW) || ((VALUE) == OB_IWDG_SW)) |
| elmot | 1:d0dfbce63a89 | 853 | |
| elmot | 1:d0dfbce63a89 | 854 | #define IS_OB_USER_IWDG_STOP(VALUE) (((VALUE) == OB_IWDG_STOP_FREEZE) || ((VALUE) == OB_IWDG_STOP_RUN)) |
| elmot | 1:d0dfbce63a89 | 855 | |
| elmot | 1:d0dfbce63a89 | 856 | #define IS_OB_USER_IWDG_STDBY(VALUE) (((VALUE) == OB_IWDG_STDBY_FREEZE) || ((VALUE) == OB_IWDG_STDBY_RUN)) |
| elmot | 1:d0dfbce63a89 | 857 | |
| elmot | 1:d0dfbce63a89 | 858 | #define IS_OB_USER_WWDG(VALUE) (((VALUE) == OB_WWDG_HW) || ((VALUE) == OB_WWDG_SW)) |
| elmot | 1:d0dfbce63a89 | 859 | |
| elmot | 1:d0dfbce63a89 | 860 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 861 | #define IS_OB_USER_BFB2(VALUE) (((VALUE) == OB_BFB2_DISABLE) || ((VALUE) == OB_BFB2_ENABLE)) |
| elmot | 1:d0dfbce63a89 | 862 | |
| elmot | 1:d0dfbce63a89 | 863 | #define IS_OB_USER_DUALBANK(VALUE) (((VALUE) == OB_DUALBANK_SINGLE) || ((VALUE) == OB_DUALBANK_DUAL)) |
| elmot | 1:d0dfbce63a89 | 864 | #endif |
| elmot | 1:d0dfbce63a89 | 865 | |
| elmot | 1:d0dfbce63a89 | 866 | #define IS_OB_USER_BOOT1(VALUE) (((VALUE) == OB_BOOT1_SRAM) || ((VALUE) == OB_BOOT1_SYSTEM)) |
| elmot | 1:d0dfbce63a89 | 867 | |
| elmot | 1:d0dfbce63a89 | 868 | #define IS_OB_USER_SRAM2_PARITY(VALUE) (((VALUE) == OB_SRAM2_PARITY_ENABLE) || ((VALUE) == OB_SRAM2_PARITY_DISABLE)) |
| elmot | 1:d0dfbce63a89 | 869 | |
| elmot | 1:d0dfbce63a89 | 870 | #define IS_OB_USER_SRAM2_RST(VALUE) (((VALUE) == OB_SRAM2_RST_ERASE) || ((VALUE) == OB_SRAM2_RST_NOT_ERASE)) |
| elmot | 1:d0dfbce63a89 | 871 | |
| elmot | 1:d0dfbce63a89 | 872 | #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) |
| elmot | 1:d0dfbce63a89 | 873 | #define IS_OB_USER_SWBOOT0(VALUE) (((VALUE) == OB_BOOT0_FROM_OB) || ((VALUE) == OB_BOOT0_FROM_PIN)) |
| elmot | 1:d0dfbce63a89 | 874 | |
| elmot | 1:d0dfbce63a89 | 875 | #define IS_OB_USER_BOOT0(VALUE) (((VALUE) == OB_BOOT0_RESET) || ((VALUE) == OB_BOOT0_SET)) |
| elmot | 1:d0dfbce63a89 | 876 | #endif |
| elmot | 1:d0dfbce63a89 | 877 | |
| elmot | 1:d0dfbce63a89 | 878 | #define IS_OB_PCROP_RDP(VALUE) (((VALUE) == OB_PCROP_RDP_NOT_ERASE) || ((VALUE) == OB_PCROP_RDP_ERASE)) |
| elmot | 1:d0dfbce63a89 | 879 | |
| elmot | 1:d0dfbce63a89 | 880 | #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \ |
| elmot | 1:d0dfbce63a89 | 881 | ((LATENCY) == FLASH_LATENCY_1) || \ |
| elmot | 1:d0dfbce63a89 | 882 | ((LATENCY) == FLASH_LATENCY_2) || \ |
| elmot | 1:d0dfbce63a89 | 883 | ((LATENCY) == FLASH_LATENCY_3) || \ |
| elmot | 1:d0dfbce63a89 | 884 | ((LATENCY) == FLASH_LATENCY_4)) |
| elmot | 1:d0dfbce63a89 | 885 | /** |
| elmot | 1:d0dfbce63a89 | 886 | * @} |
| elmot | 1:d0dfbce63a89 | 887 | */ |
| elmot | 1:d0dfbce63a89 | 888 | |
| elmot | 1:d0dfbce63a89 | 889 | /** |
| elmot | 1:d0dfbce63a89 | 890 | * @} |
| elmot | 1:d0dfbce63a89 | 891 | */ |
| elmot | 1:d0dfbce63a89 | 892 | |
| elmot | 1:d0dfbce63a89 | 893 | /** |
| elmot | 1:d0dfbce63a89 | 894 | * @} |
| elmot | 1:d0dfbce63a89 | 895 | */ |
| elmot | 1:d0dfbce63a89 | 896 | |
| elmot | 1:d0dfbce63a89 | 897 | #ifdef __cplusplus |
| elmot | 1:d0dfbce63a89 | 898 | } |
| elmot | 1:d0dfbce63a89 | 899 | #endif |
| elmot | 1:d0dfbce63a89 | 900 | |
| elmot | 1:d0dfbce63a89 | 901 | #endif /* __STM32L4xx_HAL_FLASH_H */ |
| elmot | 1:d0dfbce63a89 | 902 | |
| elmot | 1:d0dfbce63a89 | 903 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |