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HAL_L476/stm32l4xx_hal_dma.c@1:d0dfbce63a89, 2017-02-24 (annotated)

Committer:
elmot
Date:
Fri Feb 24 21:13:56 2017 +0000
Revision:
1:d0dfbce63a89
Ready-to-copy

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elmot 1:d0dfbce63a89 1 /**
elmot 1:d0dfbce63a89 2 ******************************************************************************
elmot 1:d0dfbce63a89 3 * @file stm32l4xx_hal_dma.c
elmot 1:d0dfbce63a89 4 * @author MCD Application Team
elmot 1:d0dfbce63a89 5 * @version V1.5.1
elmot 1:d0dfbce63a89 6 * @date 31-May-2016
elmot 1:d0dfbce63a89 7 * @brief DMA HAL module driver.
elmot 1:d0dfbce63a89 8 * This file provides firmware functions to manage the following
elmot 1:d0dfbce63a89 9 * functionalities of the Direct Memory Access (DMA) peripheral:
elmot 1:d0dfbce63a89 10 * + Initialization and de-initialization functions
elmot 1:d0dfbce63a89 11 * + IO operation functions
elmot 1:d0dfbce63a89 12 * + Peripheral State and errors functions
elmot 1:d0dfbce63a89 13 @verbatim
elmot 1:d0dfbce63a89 14 ==============================================================================
elmot 1:d0dfbce63a89 15 ##### How to use this driver #####
elmot 1:d0dfbce63a89 16 ==============================================================================
elmot 1:d0dfbce63a89 17 [..]
elmot 1:d0dfbce63a89 18 (#) Enable and configure the peripheral to be connected to the DMA Channel
elmot 1:d0dfbce63a89 19 (except for internal SRAM / FLASH memories: no initialization is
elmot 1:d0dfbce63a89 20 necessary). Please refer to the Reference manual for connection between peripherals
elmot 1:d0dfbce63a89 21 and DMA requests.
elmot 1:d0dfbce63a89 22
elmot 1:d0dfbce63a89 23 (#) For a given Channel, program the required configuration through the following parameters:
elmot 1:d0dfbce63a89 24 Channel request, Transfer Direction, Source and Destination data formats,
elmot 1:d0dfbce63a89 25 Circular or Normal mode, Channel Priority level, Source and Destination Increment mode
elmot 1:d0dfbce63a89 26 using HAL_DMA_Init() function.
elmot 1:d0dfbce63a89 27
elmot 1:d0dfbce63a89 28 (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
elmot 1:d0dfbce63a89 29 detection.
elmot 1:d0dfbce63a89 30
elmot 1:d0dfbce63a89 31 (#) Use HAL_DMA_Abort() function to abort the current transfer
elmot 1:d0dfbce63a89 32
elmot 1:d0dfbce63a89 33 -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
elmot 1:d0dfbce63a89 34 *** Polling mode IO operation ***
elmot 1:d0dfbce63a89 35 =================================
elmot 1:d0dfbce63a89 36 [..]
elmot 1:d0dfbce63a89 37 (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
elmot 1:d0dfbce63a89 38 address and destination address and the Length of data to be transferred
elmot 1:d0dfbce63a89 39 (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
elmot 1:d0dfbce63a89 40 case a fixed Timeout can be configured by User depending from his application.
elmot 1:d0dfbce63a89 41
elmot 1:d0dfbce63a89 42 *** Interrupt mode IO operation ***
elmot 1:d0dfbce63a89 43 ===================================
elmot 1:d0dfbce63a89 44 [..]
elmot 1:d0dfbce63a89 45 (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
elmot 1:d0dfbce63a89 46 (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
elmot 1:d0dfbce63a89 47 (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
elmot 1:d0dfbce63a89 48 Source address and destination address and the Length of data to be transferred.
elmot 1:d0dfbce63a89 49 In this case the DMA interrupt is configured
elmot 1:d0dfbce63a89 50 (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
elmot 1:d0dfbce63a89 51 (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
elmot 1:d0dfbce63a89 52 add his own function by customization of function pointer XferCpltCallback and
elmot 1:d0dfbce63a89 53 XferErrorCallback (i.e. a member of DMA handle structure).
elmot 1:d0dfbce63a89 54
elmot 1:d0dfbce63a89 55 *** DMA HAL driver macros list ***
elmot 1:d0dfbce63a89 56 =============================================
elmot 1:d0dfbce63a89 57 [..]
elmot 1:d0dfbce63a89 58 Below the list of most used macros in DMA HAL driver.
elmot 1:d0dfbce63a89 59
elmot 1:d0dfbce63a89 60 (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel.
elmot 1:d0dfbce63a89 61 (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel.
elmot 1:d0dfbce63a89 62 (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags.
elmot 1:d0dfbce63a89 63 (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags.
elmot 1:d0dfbce63a89 64 (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts.
elmot 1:d0dfbce63a89 65 (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts.
elmot 1:d0dfbce63a89 66 (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt has occurred or not.
elmot 1:d0dfbce63a89 67
elmot 1:d0dfbce63a89 68 [..]
elmot 1:d0dfbce63a89 69 (@) You can refer to the DMA HAL driver header file for more useful macros
elmot 1:d0dfbce63a89 70
elmot 1:d0dfbce63a89 71 @endverbatim
elmot 1:d0dfbce63a89 72 ******************************************************************************
elmot 1:d0dfbce63a89 73 * @attention
elmot 1:d0dfbce63a89 74 *
elmot 1:d0dfbce63a89 75 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot 1:d0dfbce63a89 76 *
elmot 1:d0dfbce63a89 77 * Redistribution and use in source and binary forms, with or without modification,
elmot 1:d0dfbce63a89 78 * are permitted provided that the following conditions are met:
elmot 1:d0dfbce63a89 79 * 1. Redistributions of source code must retain the above copyright notice,
elmot 1:d0dfbce63a89 80 * this list of conditions and the following disclaimer.
elmot 1:d0dfbce63a89 81 * 2. Redistributions in binary form must reproduce the above copyright notice,
elmot 1:d0dfbce63a89 82 * this list of conditions and the following disclaimer in the documentation
elmot 1:d0dfbce63a89 83 * and/or other materials provided with the distribution.
elmot 1:d0dfbce63a89 84 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot 1:d0dfbce63a89 85 * may be used to endorse or promote products derived from this software
elmot 1:d0dfbce63a89 86 * without specific prior written permission.
elmot 1:d0dfbce63a89 87 *
elmot 1:d0dfbce63a89 88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot 1:d0dfbce63a89 89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot 1:d0dfbce63a89 90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot 1:d0dfbce63a89 91 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot 1:d0dfbce63a89 92 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot 1:d0dfbce63a89 93 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot 1:d0dfbce63a89 94 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot 1:d0dfbce63a89 95 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot 1:d0dfbce63a89 96 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot 1:d0dfbce63a89 97 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot 1:d0dfbce63a89 98 *
elmot 1:d0dfbce63a89 99 ******************************************************************************
elmot 1:d0dfbce63a89 100 */
elmot 1:d0dfbce63a89 101
elmot 1:d0dfbce63a89 102 /* Includes ------------------------------------------------------------------*/
elmot 1:d0dfbce63a89 103 #include "stm32l4xx_hal.h"
elmot 1:d0dfbce63a89 104
elmot 1:d0dfbce63a89 105 /** @addtogroup STM32L4xx_HAL_Driver
elmot 1:d0dfbce63a89 106 * @{
elmot 1:d0dfbce63a89 107 */
elmot 1:d0dfbce63a89 108
elmot 1:d0dfbce63a89 109 /** @defgroup DMA DMA
elmot 1:d0dfbce63a89 110 * @brief DMA HAL module driver
elmot 1:d0dfbce63a89 111 * @{
elmot 1:d0dfbce63a89 112 */
elmot 1:d0dfbce63a89 113
elmot 1:d0dfbce63a89 114 #ifdef HAL_DMA_MODULE_ENABLED
elmot 1:d0dfbce63a89 115
elmot 1:d0dfbce63a89 116 /* Private typedef -----------------------------------------------------------*/
elmot 1:d0dfbce63a89 117 /* Private define ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 118 /* Private macro -------------------------------------------------------------*/
elmot 1:d0dfbce63a89 119 /* Private variables ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 120 /* Private function prototypes -----------------------------------------------*/
elmot 1:d0dfbce63a89 121 /** @defgroup DMA_Private_Functions DMA Private Functions
elmot 1:d0dfbce63a89 122 * @{
elmot 1:d0dfbce63a89 123 */
elmot 1:d0dfbce63a89 124 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
elmot 1:d0dfbce63a89 125 /**
elmot 1:d0dfbce63a89 126 * @}
elmot 1:d0dfbce63a89 127 */
elmot 1:d0dfbce63a89 128
elmot 1:d0dfbce63a89 129 /* Exported functions ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 130
elmot 1:d0dfbce63a89 131 /** @defgroup DMA_Exported_Functions DMA Exported Functions
elmot 1:d0dfbce63a89 132 * @{
elmot 1:d0dfbce63a89 133 */
elmot 1:d0dfbce63a89 134
elmot 1:d0dfbce63a89 135 /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
elmot 1:d0dfbce63a89 136 * @brief Initialization and de-initialization functions
elmot 1:d0dfbce63a89 137 *
elmot 1:d0dfbce63a89 138 @verbatim
elmot 1:d0dfbce63a89 139 ===============================================================================
elmot 1:d0dfbce63a89 140 ##### Initialization and de-initialization functions #####
elmot 1:d0dfbce63a89 141 ===============================================================================
elmot 1:d0dfbce63a89 142 [..]
elmot 1:d0dfbce63a89 143 This section provides functions allowing to initialize the DMA Channel source
elmot 1:d0dfbce63a89 144 and destination addresses, incrementation and data sizes, transfer direction,
elmot 1:d0dfbce63a89 145 circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
elmot 1:d0dfbce63a89 146 [..]
elmot 1:d0dfbce63a89 147 The HAL_DMA_Init() function follows the DMA configuration procedures as described in
elmot 1:d0dfbce63a89 148 reference manual.
elmot 1:d0dfbce63a89 149
elmot 1:d0dfbce63a89 150 @endverbatim
elmot 1:d0dfbce63a89 151 * @{
elmot 1:d0dfbce63a89 152 */
elmot 1:d0dfbce63a89 153
elmot 1:d0dfbce63a89 154 /**
elmot 1:d0dfbce63a89 155 * @brief Initialize the DMA according to the specified
elmot 1:d0dfbce63a89 156 * parameters in the DMA_InitTypeDef and initialize the associated handle.
elmot 1:d0dfbce63a89 157 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 158 * the configuration information for the specified DMA Channel.
elmot 1:d0dfbce63a89 159 * @retval HAL status
elmot 1:d0dfbce63a89 160 */
elmot 1:d0dfbce63a89 161 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
elmot 1:d0dfbce63a89 162 {
elmot 1:d0dfbce63a89 163 uint32_t tmp = 0;
elmot 1:d0dfbce63a89 164
elmot 1:d0dfbce63a89 165 /* Check the DMA handle allocation */
elmot 1:d0dfbce63a89 166 if(hdma == NULL)
elmot 1:d0dfbce63a89 167 {
elmot 1:d0dfbce63a89 168 return HAL_ERROR;
elmot 1:d0dfbce63a89 169 }
elmot 1:d0dfbce63a89 170
elmot 1:d0dfbce63a89 171 /* Check the parameters */
elmot 1:d0dfbce63a89 172 assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
elmot 1:d0dfbce63a89 173 assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
elmot 1:d0dfbce63a89 174 assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
elmot 1:d0dfbce63a89 175 assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
elmot 1:d0dfbce63a89 176 assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
elmot 1:d0dfbce63a89 177 assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
elmot 1:d0dfbce63a89 178 assert_param(IS_DMA_MODE(hdma->Init.Mode));
elmot 1:d0dfbce63a89 179 assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
elmot 1:d0dfbce63a89 180 if(hdma->Init.Direction != DMA_MEMORY_TO_MEMORY)
elmot 1:d0dfbce63a89 181 {
elmot 1:d0dfbce63a89 182 assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request));
elmot 1:d0dfbce63a89 183 }
elmot 1:d0dfbce63a89 184
elmot 1:d0dfbce63a89 185 /* calculation of the channel index */
elmot 1:d0dfbce63a89 186 if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
elmot 1:d0dfbce63a89 187 {
elmot 1:d0dfbce63a89 188 /* DMA1 */
elmot 1:d0dfbce63a89 189 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
elmot 1:d0dfbce63a89 190 hdma->DmaBaseAddress = DMA1;
elmot 1:d0dfbce63a89 191 }
elmot 1:d0dfbce63a89 192 else
elmot 1:d0dfbce63a89 193 {
elmot 1:d0dfbce63a89 194 /* DMA2 */
elmot 1:d0dfbce63a89 195 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
elmot 1:d0dfbce63a89 196 hdma->DmaBaseAddress = DMA2;
elmot 1:d0dfbce63a89 197 }
elmot 1:d0dfbce63a89 198
elmot 1:d0dfbce63a89 199 /* Change DMA peripheral state */
elmot 1:d0dfbce63a89 200 hdma->State = HAL_DMA_STATE_BUSY;
elmot 1:d0dfbce63a89 201
elmot 1:d0dfbce63a89 202 /* Get the CR register value */
elmot 1:d0dfbce63a89 203 tmp = hdma->Instance->CCR;
elmot 1:d0dfbce63a89 204
elmot 1:d0dfbce63a89 205 /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */
elmot 1:d0dfbce63a89 206 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
elmot 1:d0dfbce63a89 207 DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
elmot 1:d0dfbce63a89 208 DMA_CCR_DIR));
elmot 1:d0dfbce63a89 209
elmot 1:d0dfbce63a89 210 /* Prepare the DMA Channel configuration */
elmot 1:d0dfbce63a89 211 tmp |= hdma->Init.Direction |
elmot 1:d0dfbce63a89 212 hdma->Init.PeriphInc | hdma->Init.MemInc |
elmot 1:d0dfbce63a89 213 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
elmot 1:d0dfbce63a89 214 hdma->Init.Mode | hdma->Init.Priority;
elmot 1:d0dfbce63a89 215
elmot 1:d0dfbce63a89 216 /* Write to DMA Channel CR register */
elmot 1:d0dfbce63a89 217 hdma->Instance->CCR = tmp;
elmot 1:d0dfbce63a89 218
elmot 1:d0dfbce63a89 219 /* Set request selection */
elmot 1:d0dfbce63a89 220 if(hdma->Init.Direction != DMA_MEMORY_TO_MEMORY)
elmot 1:d0dfbce63a89 221 {
elmot 1:d0dfbce63a89 222 /* Write to DMA channel selection register */
elmot 1:d0dfbce63a89 223 if (DMA1 == hdma->DmaBaseAddress)
elmot 1:d0dfbce63a89 224 {
elmot 1:d0dfbce63a89 225 /* Reset request selection for DMA1 Channelx */
elmot 1:d0dfbce63a89 226 DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << hdma->ChannelIndex);
elmot 1:d0dfbce63a89 227
elmot 1:d0dfbce63a89 228 /* Configure request selection for DMA1 Channelx */
elmot 1:d0dfbce63a89 229 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << (hdma->ChannelIndex));
elmot 1:d0dfbce63a89 230 }
elmot 1:d0dfbce63a89 231 else /* DMA2 */
elmot 1:d0dfbce63a89 232 {
elmot 1:d0dfbce63a89 233 /* Reset request selection for DMA2 Channelx */
elmot 1:d0dfbce63a89 234 DMA2_CSELR->CSELR &= ~(DMA_CSELR_C1S << hdma->ChannelIndex);
elmot 1:d0dfbce63a89 235
elmot 1:d0dfbce63a89 236 /* Configure request selection for DMA2 Channelx */
elmot 1:d0dfbce63a89 237 DMA2_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << (hdma->ChannelIndex));
elmot 1:d0dfbce63a89 238 }
elmot 1:d0dfbce63a89 239 }
elmot 1:d0dfbce63a89 240
elmot 1:d0dfbce63a89 241 /* Clean callbacks */
elmot 1:d0dfbce63a89 242 hdma->XferCpltCallback = NULL;
elmot 1:d0dfbce63a89 243 hdma->XferHalfCpltCallback = NULL;
elmot 1:d0dfbce63a89 244 hdma->XferErrorCallback = NULL;
elmot 1:d0dfbce63a89 245 hdma->XferAbortCallback = NULL;
elmot 1:d0dfbce63a89 246
elmot 1:d0dfbce63a89 247 /* Initialise the error code */
elmot 1:d0dfbce63a89 248 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
elmot 1:d0dfbce63a89 249
elmot 1:d0dfbce63a89 250 /* Initialize the DMA state*/
elmot 1:d0dfbce63a89 251 hdma->State = HAL_DMA_STATE_READY;
elmot 1:d0dfbce63a89 252
elmot 1:d0dfbce63a89 253 /* Allocate lock resource and initialize it */
elmot 1:d0dfbce63a89 254 hdma->Lock = HAL_UNLOCKED;
elmot 1:d0dfbce63a89 255
elmot 1:d0dfbce63a89 256 return HAL_OK;
elmot 1:d0dfbce63a89 257 }
elmot 1:d0dfbce63a89 258
elmot 1:d0dfbce63a89 259 /**
elmot 1:d0dfbce63a89 260 * @brief DeInitialize the DMA peripheral.
elmot 1:d0dfbce63a89 261 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 262 * the configuration information for the specified DMA Channel.
elmot 1:d0dfbce63a89 263 * @retval HAL status
elmot 1:d0dfbce63a89 264 */
elmot 1:d0dfbce63a89 265 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
elmot 1:d0dfbce63a89 266 {
elmot 1:d0dfbce63a89 267 /* Check the DMA handle allocation */
elmot 1:d0dfbce63a89 268 if(hdma == NULL)
elmot 1:d0dfbce63a89 269 {
elmot 1:d0dfbce63a89 270 return HAL_ERROR;
elmot 1:d0dfbce63a89 271 }
elmot 1:d0dfbce63a89 272
elmot 1:d0dfbce63a89 273 /* Check the parameters */
elmot 1:d0dfbce63a89 274 assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
elmot 1:d0dfbce63a89 275
elmot 1:d0dfbce63a89 276 /* Disable the selected DMA Channelx */
elmot 1:d0dfbce63a89 277 __HAL_DMA_DISABLE(hdma);
elmot 1:d0dfbce63a89 278
elmot 1:d0dfbce63a89 279 /* Reset DMA Channel control register */
elmot 1:d0dfbce63a89 280 hdma->Instance->CCR = 0;
elmot 1:d0dfbce63a89 281
elmot 1:d0dfbce63a89 282 /* Calculation of the channel index */
elmot 1:d0dfbce63a89 283 if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
elmot 1:d0dfbce63a89 284 {
elmot 1:d0dfbce63a89 285 /* DMA1 */
elmot 1:d0dfbce63a89 286 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
elmot 1:d0dfbce63a89 287 hdma->DmaBaseAddress = DMA1;
elmot 1:d0dfbce63a89 288 }
elmot 1:d0dfbce63a89 289 else
elmot 1:d0dfbce63a89 290 {
elmot 1:d0dfbce63a89 291 /* DMA2 */
elmot 1:d0dfbce63a89 292 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
elmot 1:d0dfbce63a89 293 hdma->DmaBaseAddress = DMA2;
elmot 1:d0dfbce63a89 294 }
elmot 1:d0dfbce63a89 295
elmot 1:d0dfbce63a89 296
elmot 1:d0dfbce63a89 297 /* Clear all flags */
elmot 1:d0dfbce63a89 298 hdma->DmaBaseAddress->IFCR |= ((DMA_ISR_GIF1) << (hdma->ChannelIndex));
elmot 1:d0dfbce63a89 299
elmot 1:d0dfbce63a89 300 /* Reset DMA channel selection register */
elmot 1:d0dfbce63a89 301 if (DMA1 == hdma->DmaBaseAddress)
elmot 1:d0dfbce63a89 302 {
elmot 1:d0dfbce63a89 303 /* DMA1 */
elmot 1:d0dfbce63a89 304 DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex));
elmot 1:d0dfbce63a89 305 }
elmot 1:d0dfbce63a89 306 else
elmot 1:d0dfbce63a89 307 {
elmot 1:d0dfbce63a89 308 /* DMA2 */
elmot 1:d0dfbce63a89 309 DMA2_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex));
elmot 1:d0dfbce63a89 310 }
elmot 1:d0dfbce63a89 311
elmot 1:d0dfbce63a89 312 /* Initialize the error code */
elmot 1:d0dfbce63a89 313 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
elmot 1:d0dfbce63a89 314
elmot 1:d0dfbce63a89 315 /* Initialize the DMA state */
elmot 1:d0dfbce63a89 316 hdma->State = HAL_DMA_STATE_RESET;
elmot 1:d0dfbce63a89 317
elmot 1:d0dfbce63a89 318 /* Release Lock */
elmot 1:d0dfbce63a89 319 __HAL_UNLOCK(hdma);
elmot 1:d0dfbce63a89 320
elmot 1:d0dfbce63a89 321 return HAL_OK;
elmot 1:d0dfbce63a89 322 }
elmot 1:d0dfbce63a89 323
elmot 1:d0dfbce63a89 324 /**
elmot 1:d0dfbce63a89 325 * @}
elmot 1:d0dfbce63a89 326 */
elmot 1:d0dfbce63a89 327
elmot 1:d0dfbce63a89 328 /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions
elmot 1:d0dfbce63a89 329 * @brief Input and Output operation functions
elmot 1:d0dfbce63a89 330 *
elmot 1:d0dfbce63a89 331 @verbatim
elmot 1:d0dfbce63a89 332 ===============================================================================
elmot 1:d0dfbce63a89 333 ##### IO operation functions #####
elmot 1:d0dfbce63a89 334 ===============================================================================
elmot 1:d0dfbce63a89 335 [..] This section provides functions allowing to:
elmot 1:d0dfbce63a89 336 (+) Configure the source, destination address and data length and Start DMA transfer
elmot 1:d0dfbce63a89 337 (+) Configure the source, destination address and data length and
elmot 1:d0dfbce63a89 338 Start DMA transfer with interrupt
elmot 1:d0dfbce63a89 339 (+) Abort DMA transfer
elmot 1:d0dfbce63a89 340 (+) Poll for transfer complete
elmot 1:d0dfbce63a89 341 (+) Handle DMA interrupt request
elmot 1:d0dfbce63a89 342
elmot 1:d0dfbce63a89 343 @endverbatim
elmot 1:d0dfbce63a89 344 * @{
elmot 1:d0dfbce63a89 345 */
elmot 1:d0dfbce63a89 346
elmot 1:d0dfbce63a89 347 /**
elmot 1:d0dfbce63a89 348 * @brief Start the DMA Transfer.
elmot 1:d0dfbce63a89 349 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 350 * the configuration information for the specified DMA Channel.
elmot 1:d0dfbce63a89 351 * @param SrcAddress: The source memory Buffer address
elmot 1:d0dfbce63a89 352 * @param DstAddress: The destination memory Buffer address
elmot 1:d0dfbce63a89 353 * @param DataLength: The length of data to be transferred from source to destination
elmot 1:d0dfbce63a89 354 * @retval HAL status
elmot 1:d0dfbce63a89 355 */
elmot 1:d0dfbce63a89 356 HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
elmot 1:d0dfbce63a89 357 {
elmot 1:d0dfbce63a89 358 HAL_StatusTypeDef status = HAL_OK;
elmot 1:d0dfbce63a89 359
elmot 1:d0dfbce63a89 360 /* Check the parameters */
elmot 1:d0dfbce63a89 361 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
elmot 1:d0dfbce63a89 362
elmot 1:d0dfbce63a89 363 /* Process locked */
elmot 1:d0dfbce63a89 364 __HAL_LOCK(hdma);
elmot 1:d0dfbce63a89 365
elmot 1:d0dfbce63a89 366 if(HAL_DMA_STATE_READY == hdma->State)
elmot 1:d0dfbce63a89 367 {
elmot 1:d0dfbce63a89 368 /* Change DMA peripheral state */
elmot 1:d0dfbce63a89 369 hdma->State = HAL_DMA_STATE_BUSY;
elmot 1:d0dfbce63a89 370 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
elmot 1:d0dfbce63a89 371
elmot 1:d0dfbce63a89 372 /* Disable the peripheral */
elmot 1:d0dfbce63a89 373 __HAL_DMA_DISABLE(hdma);
elmot 1:d0dfbce63a89 374
elmot 1:d0dfbce63a89 375 /* Configure the source, destination address and the data length & clear flags*/
elmot 1:d0dfbce63a89 376 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
elmot 1:d0dfbce63a89 377
elmot 1:d0dfbce63a89 378 /* Enable the Peripheral */
elmot 1:d0dfbce63a89 379 __HAL_DMA_ENABLE(hdma);
elmot 1:d0dfbce63a89 380 }
elmot 1:d0dfbce63a89 381 else
elmot 1:d0dfbce63a89 382 {
elmot 1:d0dfbce63a89 383 /* Process Unlocked */
elmot 1:d0dfbce63a89 384 __HAL_UNLOCK(hdma);
elmot 1:d0dfbce63a89 385 status = HAL_BUSY;
elmot 1:d0dfbce63a89 386 }
elmot 1:d0dfbce63a89 387 return status;
elmot 1:d0dfbce63a89 388 }
elmot 1:d0dfbce63a89 389
elmot 1:d0dfbce63a89 390 /**
elmot 1:d0dfbce63a89 391 * @brief Start the DMA Transfer with interrupt enabled.
elmot 1:d0dfbce63a89 392 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 393 * the configuration information for the specified DMA Channel.
elmot 1:d0dfbce63a89 394 * @param SrcAddress: The source memory Buffer address
elmot 1:d0dfbce63a89 395 * @param DstAddress: The destination memory Buffer address
elmot 1:d0dfbce63a89 396 * @param DataLength: The length of data to be transferred from source to destination
elmot 1:d0dfbce63a89 397 * @retval HAL status
elmot 1:d0dfbce63a89 398 */
elmot 1:d0dfbce63a89 399 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
elmot 1:d0dfbce63a89 400 {
elmot 1:d0dfbce63a89 401 HAL_StatusTypeDef status = HAL_OK;
elmot 1:d0dfbce63a89 402
elmot 1:d0dfbce63a89 403 /* Check the parameters */
elmot 1:d0dfbce63a89 404 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
elmot 1:d0dfbce63a89 405
elmot 1:d0dfbce63a89 406 /* Process locked */
elmot 1:d0dfbce63a89 407 __HAL_LOCK(hdma);
elmot 1:d0dfbce63a89 408
elmot 1:d0dfbce63a89 409 if(HAL_DMA_STATE_READY == hdma->State)
elmot 1:d0dfbce63a89 410 {
elmot 1:d0dfbce63a89 411 /* Change DMA peripheral state */
elmot 1:d0dfbce63a89 412 hdma->State = HAL_DMA_STATE_BUSY;
elmot 1:d0dfbce63a89 413 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
elmot 1:d0dfbce63a89 414
elmot 1:d0dfbce63a89 415 /* Disable the peripheral */
elmot 1:d0dfbce63a89 416 __HAL_DMA_DISABLE(hdma);
elmot 1:d0dfbce63a89 417
elmot 1:d0dfbce63a89 418 /* Configure the source, destination address and the data length & clear flags*/
elmot 1:d0dfbce63a89 419 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
elmot 1:d0dfbce63a89 420
elmot 1:d0dfbce63a89 421 /* Enable the transfer complete interrupt */
elmot 1:d0dfbce63a89 422 /* Enable the transfer Error interrupt */
elmot 1:d0dfbce63a89 423 if(NULL != hdma->XferHalfCpltCallback )
elmot 1:d0dfbce63a89 424 {
elmot 1:d0dfbce63a89 425 /* Enable the Half transfer complete interrupt as well */
elmot 1:d0dfbce63a89 426 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
elmot 1:d0dfbce63a89 427 }
elmot 1:d0dfbce63a89 428 else
elmot 1:d0dfbce63a89 429 {
elmot 1:d0dfbce63a89 430 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
elmot 1:d0dfbce63a89 431 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
elmot 1:d0dfbce63a89 432 }
elmot 1:d0dfbce63a89 433 /* Enable the Peripheral */
elmot 1:d0dfbce63a89 434 __HAL_DMA_ENABLE(hdma);
elmot 1:d0dfbce63a89 435 }
elmot 1:d0dfbce63a89 436 else
elmot 1:d0dfbce63a89 437 {
elmot 1:d0dfbce63a89 438 /* Process Unlocked */
elmot 1:d0dfbce63a89 439 __HAL_UNLOCK(hdma);
elmot 1:d0dfbce63a89 440
elmot 1:d0dfbce63a89 441 /* Remain BUSY */
elmot 1:d0dfbce63a89 442 status = HAL_BUSY;
elmot 1:d0dfbce63a89 443 }
elmot 1:d0dfbce63a89 444 return status;
elmot 1:d0dfbce63a89 445 }
elmot 1:d0dfbce63a89 446
elmot 1:d0dfbce63a89 447 /**
elmot 1:d0dfbce63a89 448 * @brief Abort the DMA Transfer.
elmot 1:d0dfbce63a89 449 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 450 * the configuration information for the specified DMA Channel.
elmot 1:d0dfbce63a89 451 * @retval HAL status
elmot 1:d0dfbce63a89 452 */
elmot 1:d0dfbce63a89 453 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
elmot 1:d0dfbce63a89 454 {
elmot 1:d0dfbce63a89 455 HAL_StatusTypeDef status = HAL_OK;
elmot 1:d0dfbce63a89 456
elmot 1:d0dfbce63a89 457 if(HAL_DMA_STATE_BUSY != hdma->State)
elmot 1:d0dfbce63a89 458 {
elmot 1:d0dfbce63a89 459 /* no transfer ongoing */
elmot 1:d0dfbce63a89 460 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
elmot 1:d0dfbce63a89 461
elmot 1:d0dfbce63a89 462 status = HAL_ERROR;
elmot 1:d0dfbce63a89 463 }
elmot 1:d0dfbce63a89 464 else
elmot 1:d0dfbce63a89 465 {
elmot 1:d0dfbce63a89 466 /* Disable DMA IT */
elmot 1:d0dfbce63a89 467 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
elmot 1:d0dfbce63a89 468
elmot 1:d0dfbce63a89 469 /* Disable the channel */
elmot 1:d0dfbce63a89 470 __HAL_DMA_DISABLE(hdma);
elmot 1:d0dfbce63a89 471
elmot 1:d0dfbce63a89 472 /* Clear all flags */
elmot 1:d0dfbce63a89 473 hdma->DmaBaseAddress->IFCR = ((DMA_ISR_GIF1) << (hdma->ChannelIndex));
elmot 1:d0dfbce63a89 474
elmot 1:d0dfbce63a89 475 /* Change the DMA state */
elmot 1:d0dfbce63a89 476 hdma->State = HAL_DMA_STATE_READY;
elmot 1:d0dfbce63a89 477
elmot 1:d0dfbce63a89 478 /* Process Unlocked */
elmot 1:d0dfbce63a89 479 __HAL_UNLOCK(hdma);
elmot 1:d0dfbce63a89 480 }
elmot 1:d0dfbce63a89 481 return status;
elmot 1:d0dfbce63a89 482 }
elmot 1:d0dfbce63a89 483
elmot 1:d0dfbce63a89 484 /**
elmot 1:d0dfbce63a89 485 * @brief Aborts the DMA Transfer in Interrupt mode.
elmot 1:d0dfbce63a89 486 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 487 * the configuration information for the specified DMA Stream.
elmot 1:d0dfbce63a89 488 * @retval HAL status
elmot 1:d0dfbce63a89 489 */
elmot 1:d0dfbce63a89 490 HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
elmot 1:d0dfbce63a89 491 {
elmot 1:d0dfbce63a89 492 HAL_StatusTypeDef status = HAL_OK;
elmot 1:d0dfbce63a89 493
elmot 1:d0dfbce63a89 494 if(HAL_DMA_STATE_BUSY != hdma->State)
elmot 1:d0dfbce63a89 495 {
elmot 1:d0dfbce63a89 496 /* no transfer ongoing */
elmot 1:d0dfbce63a89 497 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
elmot 1:d0dfbce63a89 498
elmot 1:d0dfbce63a89 499 status = HAL_ERROR;
elmot 1:d0dfbce63a89 500 }
elmot 1:d0dfbce63a89 501 else
elmot 1:d0dfbce63a89 502 {
elmot 1:d0dfbce63a89 503 /* Disable DMA IT */
elmot 1:d0dfbce63a89 504 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
elmot 1:d0dfbce63a89 505
elmot 1:d0dfbce63a89 506 /* Disable the channel */
elmot 1:d0dfbce63a89 507 __HAL_DMA_DISABLE(hdma);
elmot 1:d0dfbce63a89 508
elmot 1:d0dfbce63a89 509 /* Clear all flags */
elmot 1:d0dfbce63a89 510 hdma->DmaBaseAddress->IFCR |= ((DMA_ISR_GIF1) << (hdma->ChannelIndex));
elmot 1:d0dfbce63a89 511
elmot 1:d0dfbce63a89 512 /* Change the DMA state */
elmot 1:d0dfbce63a89 513 hdma->State = HAL_DMA_STATE_READY;
elmot 1:d0dfbce63a89 514
elmot 1:d0dfbce63a89 515 /* Process Unlocked */
elmot 1:d0dfbce63a89 516 __HAL_UNLOCK(hdma);
elmot 1:d0dfbce63a89 517
elmot 1:d0dfbce63a89 518 /* Call User Abort callback */
elmot 1:d0dfbce63a89 519 if(hdma->XferAbortCallback != NULL)
elmot 1:d0dfbce63a89 520 {
elmot 1:d0dfbce63a89 521 hdma->XferAbortCallback(hdma);
elmot 1:d0dfbce63a89 522 }
elmot 1:d0dfbce63a89 523 }
elmot 1:d0dfbce63a89 524 return status;
elmot 1:d0dfbce63a89 525 }
elmot 1:d0dfbce63a89 526
elmot 1:d0dfbce63a89 527 /**
elmot 1:d0dfbce63a89 528 * @brief Polling for transfer complete.
elmot 1:d0dfbce63a89 529 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 530 * the configuration information for the specified DMA Channel.
elmot 1:d0dfbce63a89 531 * @param CompleteLevel: Specifies the DMA level complete.
elmot 1:d0dfbce63a89 532 * @param Timeout: Timeout duration.
elmot 1:d0dfbce63a89 533 * @retval HAL status
elmot 1:d0dfbce63a89 534 */
elmot 1:d0dfbce63a89 535 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
elmot 1:d0dfbce63a89 536 {
elmot 1:d0dfbce63a89 537 uint32_t temp;
elmot 1:d0dfbce63a89 538 uint32_t tickstart = 0;
elmot 1:d0dfbce63a89 539
elmot 1:d0dfbce63a89 540 if(HAL_DMA_STATE_BUSY != hdma->State)
elmot 1:d0dfbce63a89 541 {
elmot 1:d0dfbce63a89 542 /* no transfer ongoing */
elmot 1:d0dfbce63a89 543 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
elmot 1:d0dfbce63a89 544
elmot 1:d0dfbce63a89 545 return HAL_ERROR;
elmot 1:d0dfbce63a89 546 }
elmot 1:d0dfbce63a89 547
elmot 1:d0dfbce63a89 548 /* Polling mode not supported in circular mode */
elmot 1:d0dfbce63a89 549 if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC))
elmot 1:d0dfbce63a89 550 {
elmot 1:d0dfbce63a89 551 hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
elmot 1:d0dfbce63a89 552 return HAL_ERROR;
elmot 1:d0dfbce63a89 553 }
elmot 1:d0dfbce63a89 554
elmot 1:d0dfbce63a89 555 /* Get the level transfer complete flag */
elmot 1:d0dfbce63a89 556 if (HAL_DMA_FULL_TRANSFER == CompleteLevel)
elmot 1:d0dfbce63a89 557 {
elmot 1:d0dfbce63a89 558 /* Transfer Complete flag */
elmot 1:d0dfbce63a89 559 temp = DMA_FLAG_TC1 << hdma->ChannelIndex;
elmot 1:d0dfbce63a89 560 }
elmot 1:d0dfbce63a89 561 else
elmot 1:d0dfbce63a89 562 {
elmot 1:d0dfbce63a89 563 /* Half Transfer Complete flag */
elmot 1:d0dfbce63a89 564 temp = DMA_FLAG_HT1 << hdma->ChannelIndex;
elmot 1:d0dfbce63a89 565 }
elmot 1:d0dfbce63a89 566
elmot 1:d0dfbce63a89 567 /* Get tick */
elmot 1:d0dfbce63a89 568 tickstart = HAL_GetTick();
elmot 1:d0dfbce63a89 569
elmot 1:d0dfbce63a89 570 while(RESET == (hdma->DmaBaseAddress->ISR & temp))
elmot 1:d0dfbce63a89 571 {
elmot 1:d0dfbce63a89 572 if((RESET != (hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << hdma->ChannelIndex))))
elmot 1:d0dfbce63a89 573 {
elmot 1:d0dfbce63a89 574 /* When a DMA transfer error occurs */
elmot 1:d0dfbce63a89 575 /* A hardware clear of its EN bits is performed */
elmot 1:d0dfbce63a89 576 /* Clear all flags */
elmot 1:d0dfbce63a89 577 hdma->DmaBaseAddress->IFCR |= ((DMA_ISR_GIF1) << (hdma->ChannelIndex));
elmot 1:d0dfbce63a89 578
elmot 1:d0dfbce63a89 579 /* Update error code */
elmot 1:d0dfbce63a89 580 hdma->ErrorCode = HAL_DMA_ERROR_TE;
elmot 1:d0dfbce63a89 581
elmot 1:d0dfbce63a89 582 /* Change the DMA state */
elmot 1:d0dfbce63a89 583 hdma->State= HAL_DMA_STATE_READY;
elmot 1:d0dfbce63a89 584
elmot 1:d0dfbce63a89 585 /* Process Unlocked */
elmot 1:d0dfbce63a89 586 __HAL_UNLOCK(hdma);
elmot 1:d0dfbce63a89 587
elmot 1:d0dfbce63a89 588 return HAL_ERROR;
elmot 1:d0dfbce63a89 589 }
elmot 1:d0dfbce63a89 590 /* Check for the Timeout */
elmot 1:d0dfbce63a89 591 if(Timeout != HAL_MAX_DELAY)
elmot 1:d0dfbce63a89 592 {
elmot 1:d0dfbce63a89 593 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
elmot 1:d0dfbce63a89 594 {
elmot 1:d0dfbce63a89 595 /* Update error code */
elmot 1:d0dfbce63a89 596 hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
elmot 1:d0dfbce63a89 597
elmot 1:d0dfbce63a89 598 /* Change the DMA state */
elmot 1:d0dfbce63a89 599 hdma->State = HAL_DMA_STATE_READY;
elmot 1:d0dfbce63a89 600
elmot 1:d0dfbce63a89 601 /* Process Unlocked */
elmot 1:d0dfbce63a89 602 __HAL_UNLOCK(hdma);
elmot 1:d0dfbce63a89 603
elmot 1:d0dfbce63a89 604 return HAL_ERROR;
elmot 1:d0dfbce63a89 605 }
elmot 1:d0dfbce63a89 606 }
elmot 1:d0dfbce63a89 607 }
elmot 1:d0dfbce63a89 608
elmot 1:d0dfbce63a89 609 if(HAL_DMA_FULL_TRANSFER == CompleteLevel)
elmot 1:d0dfbce63a89 610 {
elmot 1:d0dfbce63a89 611 /* Clear the transfer complete flag */
elmot 1:d0dfbce63a89 612 hdma->DmaBaseAddress->IFCR |= (DMA_FLAG_TC1 << hdma->ChannelIndex);
elmot 1:d0dfbce63a89 613
elmot 1:d0dfbce63a89 614 /* The selected Channelx EN bit is cleared (DMA is disabled and
elmot 1:d0dfbce63a89 615 all transfers are complete) */
elmot 1:d0dfbce63a89 616 hdma->State = HAL_DMA_STATE_READY;
elmot 1:d0dfbce63a89 617 }
elmot 1:d0dfbce63a89 618 else
elmot 1:d0dfbce63a89 619 {
elmot 1:d0dfbce63a89 620 /* Clear the half transfer complete flag */
elmot 1:d0dfbce63a89 621 hdma->DmaBaseAddress->IFCR |= (DMA_FLAG_HT1 << hdma->ChannelIndex);
elmot 1:d0dfbce63a89 622 }
elmot 1:d0dfbce63a89 623
elmot 1:d0dfbce63a89 624 /* Process unlocked */
elmot 1:d0dfbce63a89 625 __HAL_UNLOCK(hdma);
elmot 1:d0dfbce63a89 626
elmot 1:d0dfbce63a89 627 return HAL_OK;
elmot 1:d0dfbce63a89 628 }
elmot 1:d0dfbce63a89 629
elmot 1:d0dfbce63a89 630 /**
elmot 1:d0dfbce63a89 631 * @brief Handle DMA interrupt request.
elmot 1:d0dfbce63a89 632 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 633 * the configuration information for the specified DMA Channel.
elmot 1:d0dfbce63a89 634 * @retval None
elmot 1:d0dfbce63a89 635 */
elmot 1:d0dfbce63a89 636 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
elmot 1:d0dfbce63a89 637 {
elmot 1:d0dfbce63a89 638 uint32_t flag_it = hdma->DmaBaseAddress->ISR;
elmot 1:d0dfbce63a89 639 uint32_t source_it = hdma->Instance->CCR;
elmot 1:d0dfbce63a89 640
elmot 1:d0dfbce63a89 641 /* Half Transfer Complete Interrupt management ******************************/
elmot 1:d0dfbce63a89 642 if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_HT)))
elmot 1:d0dfbce63a89 643 {
elmot 1:d0dfbce63a89 644 /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
elmot 1:d0dfbce63a89 645 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
elmot 1:d0dfbce63a89 646 {
elmot 1:d0dfbce63a89 647 /* Disable the half transfer interrupt */
elmot 1:d0dfbce63a89 648 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
elmot 1:d0dfbce63a89 649 }
elmot 1:d0dfbce63a89 650 /* Clear the half transfer complete flag */
elmot 1:d0dfbce63a89 651 hdma->DmaBaseAddress->IFCR |= (DMA_ISR_HTIF1 << hdma->ChannelIndex);
elmot 1:d0dfbce63a89 652
elmot 1:d0dfbce63a89 653 /* DMA peripheral state is not updated in Half Transfer */
elmot 1:d0dfbce63a89 654 /* but in Transfer Complete case */
elmot 1:d0dfbce63a89 655
elmot 1:d0dfbce63a89 656 if(hdma->XferHalfCpltCallback != NULL)
elmot 1:d0dfbce63a89 657 {
elmot 1:d0dfbce63a89 658 /* Half transfer callback */
elmot 1:d0dfbce63a89 659 hdma->XferHalfCpltCallback(hdma);
elmot 1:d0dfbce63a89 660 }
elmot 1:d0dfbce63a89 661 }
elmot 1:d0dfbce63a89 662
elmot 1:d0dfbce63a89 663 /* Transfer Complete Interrupt management ***********************************/
elmot 1:d0dfbce63a89 664 else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TC)))
elmot 1:d0dfbce63a89 665 {
elmot 1:d0dfbce63a89 666 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
elmot 1:d0dfbce63a89 667 {
elmot 1:d0dfbce63a89 668 /* Disable the transfer complete and error interrupt */
elmot 1:d0dfbce63a89 669 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
elmot 1:d0dfbce63a89 670
elmot 1:d0dfbce63a89 671 /* Change the DMA state */
elmot 1:d0dfbce63a89 672 hdma->State = HAL_DMA_STATE_READY;
elmot 1:d0dfbce63a89 673 }
elmot 1:d0dfbce63a89 674 /* Clear the transfer complete flag */
elmot 1:d0dfbce63a89 675 hdma->DmaBaseAddress->IFCR |= (DMA_ISR_TCIF1 << hdma->ChannelIndex);
elmot 1:d0dfbce63a89 676
elmot 1:d0dfbce63a89 677 /* Process Unlocked */
elmot 1:d0dfbce63a89 678 __HAL_UNLOCK(hdma);
elmot 1:d0dfbce63a89 679
elmot 1:d0dfbce63a89 680 if(hdma->XferCpltCallback != NULL)
elmot 1:d0dfbce63a89 681 {
elmot 1:d0dfbce63a89 682 /* Transfer complete callback */
elmot 1:d0dfbce63a89 683 hdma->XferCpltCallback(hdma);
elmot 1:d0dfbce63a89 684 }
elmot 1:d0dfbce63a89 685 }
elmot 1:d0dfbce63a89 686
elmot 1:d0dfbce63a89 687 /* Transfer Error Interrupt management **************************************/
elmot 1:d0dfbce63a89 688 else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
elmot 1:d0dfbce63a89 689 {
elmot 1:d0dfbce63a89 690 /* When a DMA transfer error occurs */
elmot 1:d0dfbce63a89 691 /* A hardware clear of its EN bits is performed */
elmot 1:d0dfbce63a89 692 /* Disable ALL DMA IT */
elmot 1:d0dfbce63a89 693 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
elmot 1:d0dfbce63a89 694
elmot 1:d0dfbce63a89 695 /* Clear all flags */
elmot 1:d0dfbce63a89 696 hdma->DmaBaseAddress->IFCR |= (DMA_ISR_GIF1 << hdma->ChannelIndex);
elmot 1:d0dfbce63a89 697
elmot 1:d0dfbce63a89 698 /* Update error code */
elmot 1:d0dfbce63a89 699 hdma->ErrorCode = HAL_DMA_ERROR_TE;
elmot 1:d0dfbce63a89 700
elmot 1:d0dfbce63a89 701 /* Change the DMA state */
elmot 1:d0dfbce63a89 702 hdma->State = HAL_DMA_STATE_READY;
elmot 1:d0dfbce63a89 703
elmot 1:d0dfbce63a89 704 /* Process Unlocked */
elmot 1:d0dfbce63a89 705 __HAL_UNLOCK(hdma);
elmot 1:d0dfbce63a89 706
elmot 1:d0dfbce63a89 707 if (hdma->XferErrorCallback != NULL)
elmot 1:d0dfbce63a89 708 {
elmot 1:d0dfbce63a89 709 /* Transfer error callback */
elmot 1:d0dfbce63a89 710 hdma->XferErrorCallback(hdma);
elmot 1:d0dfbce63a89 711 }
elmot 1:d0dfbce63a89 712 }
elmot 1:d0dfbce63a89 713 return;
elmot 1:d0dfbce63a89 714 }
elmot 1:d0dfbce63a89 715
elmot 1:d0dfbce63a89 716 /**
elmot 1:d0dfbce63a89 717 * @brief Register callbacks
elmot 1:d0dfbce63a89 718 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 719 * the configuration information for the specified DMA Stream.
elmot 1:d0dfbce63a89 720 * @param CallbackID: User Callback identifer
elmot 1:d0dfbce63a89 721 * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
elmot 1:d0dfbce63a89 722 * @param pCallback: pointer to private callbacsk function which has pointer to
elmot 1:d0dfbce63a89 723 * a DMA_HandleTypeDef structure as parameter.
elmot 1:d0dfbce63a89 724 * @retval HAL status
elmot 1:d0dfbce63a89 725 */
elmot 1:d0dfbce63a89 726 HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma))
elmot 1:d0dfbce63a89 727 {
elmot 1:d0dfbce63a89 728 HAL_StatusTypeDef status = HAL_OK;
elmot 1:d0dfbce63a89 729
elmot 1:d0dfbce63a89 730 /* Process locked */
elmot 1:d0dfbce63a89 731 __HAL_LOCK(hdma);
elmot 1:d0dfbce63a89 732
elmot 1:d0dfbce63a89 733 if(HAL_DMA_STATE_READY == hdma->State)
elmot 1:d0dfbce63a89 734 {
elmot 1:d0dfbce63a89 735 switch (CallbackID)
elmot 1:d0dfbce63a89 736 {
elmot 1:d0dfbce63a89 737 case HAL_DMA_XFER_CPLT_CB_ID:
elmot 1:d0dfbce63a89 738 hdma->XferCpltCallback = pCallback;
elmot 1:d0dfbce63a89 739 break;
elmot 1:d0dfbce63a89 740
elmot 1:d0dfbce63a89 741 case HAL_DMA_XFER_HALFCPLT_CB_ID:
elmot 1:d0dfbce63a89 742 hdma->XferHalfCpltCallback = pCallback;
elmot 1:d0dfbce63a89 743 break;
elmot 1:d0dfbce63a89 744
elmot 1:d0dfbce63a89 745 case HAL_DMA_XFER_ERROR_CB_ID:
elmot 1:d0dfbce63a89 746 hdma->XferErrorCallback = pCallback;
elmot 1:d0dfbce63a89 747 break;
elmot 1:d0dfbce63a89 748
elmot 1:d0dfbce63a89 749 case HAL_DMA_XFER_ABORT_CB_ID:
elmot 1:d0dfbce63a89 750 hdma->XferAbortCallback = pCallback;
elmot 1:d0dfbce63a89 751 break;
elmot 1:d0dfbce63a89 752
elmot 1:d0dfbce63a89 753 default:
elmot 1:d0dfbce63a89 754 status = HAL_ERROR;
elmot 1:d0dfbce63a89 755 break;
elmot 1:d0dfbce63a89 756 }
elmot 1:d0dfbce63a89 757 }
elmot 1:d0dfbce63a89 758 else
elmot 1:d0dfbce63a89 759 {
elmot 1:d0dfbce63a89 760 status = HAL_ERROR;
elmot 1:d0dfbce63a89 761 }
elmot 1:d0dfbce63a89 762
elmot 1:d0dfbce63a89 763 /* Release Lock */
elmot 1:d0dfbce63a89 764 __HAL_UNLOCK(hdma);
elmot 1:d0dfbce63a89 765
elmot 1:d0dfbce63a89 766 return status;
elmot 1:d0dfbce63a89 767 }
elmot 1:d0dfbce63a89 768
elmot 1:d0dfbce63a89 769 /**
elmot 1:d0dfbce63a89 770 * @brief UnRegister callbacks
elmot 1:d0dfbce63a89 771 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 772 * the configuration information for the specified DMA Stream.
elmot 1:d0dfbce63a89 773 * @param CallbackID: User Callback identifer
elmot 1:d0dfbce63a89 774 * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
elmot 1:d0dfbce63a89 775 * @retval HAL status
elmot 1:d0dfbce63a89 776 */
elmot 1:d0dfbce63a89 777 HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID)
elmot 1:d0dfbce63a89 778 {
elmot 1:d0dfbce63a89 779 HAL_StatusTypeDef status = HAL_OK;
elmot 1:d0dfbce63a89 780
elmot 1:d0dfbce63a89 781 /* Process locked */
elmot 1:d0dfbce63a89 782 __HAL_LOCK(hdma);
elmot 1:d0dfbce63a89 783
elmot 1:d0dfbce63a89 784 if(HAL_DMA_STATE_READY == hdma->State)
elmot 1:d0dfbce63a89 785 {
elmot 1:d0dfbce63a89 786 switch (CallbackID)
elmot 1:d0dfbce63a89 787 {
elmot 1:d0dfbce63a89 788 case HAL_DMA_XFER_CPLT_CB_ID:
elmot 1:d0dfbce63a89 789 hdma->XferCpltCallback = NULL;
elmot 1:d0dfbce63a89 790 break;
elmot 1:d0dfbce63a89 791
elmot 1:d0dfbce63a89 792 case HAL_DMA_XFER_HALFCPLT_CB_ID:
elmot 1:d0dfbce63a89 793 hdma->XferHalfCpltCallback = NULL;
elmot 1:d0dfbce63a89 794 break;
elmot 1:d0dfbce63a89 795
elmot 1:d0dfbce63a89 796 case HAL_DMA_XFER_ERROR_CB_ID:
elmot 1:d0dfbce63a89 797 hdma->XferErrorCallback = NULL;
elmot 1:d0dfbce63a89 798 break;
elmot 1:d0dfbce63a89 799
elmot 1:d0dfbce63a89 800 case HAL_DMA_XFER_ABORT_CB_ID:
elmot 1:d0dfbce63a89 801 hdma->XferAbortCallback = NULL;
elmot 1:d0dfbce63a89 802 break;
elmot 1:d0dfbce63a89 803
elmot 1:d0dfbce63a89 804 case HAL_DMA_XFER_ALL_CB_ID:
elmot 1:d0dfbce63a89 805 hdma->XferCpltCallback = NULL;
elmot 1:d0dfbce63a89 806 hdma->XferHalfCpltCallback = NULL;
elmot 1:d0dfbce63a89 807 hdma->XferErrorCallback = NULL;
elmot 1:d0dfbce63a89 808 hdma->XferAbortCallback = NULL;
elmot 1:d0dfbce63a89 809 break;
elmot 1:d0dfbce63a89 810
elmot 1:d0dfbce63a89 811 default:
elmot 1:d0dfbce63a89 812 status = HAL_ERROR;
elmot 1:d0dfbce63a89 813 break;
elmot 1:d0dfbce63a89 814 }
elmot 1:d0dfbce63a89 815 }
elmot 1:d0dfbce63a89 816 else
elmot 1:d0dfbce63a89 817 {
elmot 1:d0dfbce63a89 818 status = HAL_ERROR;
elmot 1:d0dfbce63a89 819 }
elmot 1:d0dfbce63a89 820
elmot 1:d0dfbce63a89 821 /* Release Lock */
elmot 1:d0dfbce63a89 822 __HAL_UNLOCK(hdma);
elmot 1:d0dfbce63a89 823
elmot 1:d0dfbce63a89 824 return status;
elmot 1:d0dfbce63a89 825 }
elmot 1:d0dfbce63a89 826
elmot 1:d0dfbce63a89 827 /**
elmot 1:d0dfbce63a89 828 * @}
elmot 1:d0dfbce63a89 829 */
elmot 1:d0dfbce63a89 830
elmot 1:d0dfbce63a89 831
elmot 1:d0dfbce63a89 832
elmot 1:d0dfbce63a89 833 /** @defgroup DMA_Exported_Functions_Group3 Peripheral State and Errors functions
elmot 1:d0dfbce63a89 834 * @brief Peripheral State and Errors functions
elmot 1:d0dfbce63a89 835 *
elmot 1:d0dfbce63a89 836 @verbatim
elmot 1:d0dfbce63a89 837 ===============================================================================
elmot 1:d0dfbce63a89 838 ##### Peripheral State and Errors functions #####
elmot 1:d0dfbce63a89 839 ===============================================================================
elmot 1:d0dfbce63a89 840 [..]
elmot 1:d0dfbce63a89 841 This subsection provides functions allowing to
elmot 1:d0dfbce63a89 842 (+) Check the DMA state
elmot 1:d0dfbce63a89 843 (+) Get error code
elmot 1:d0dfbce63a89 844
elmot 1:d0dfbce63a89 845 @endverbatim
elmot 1:d0dfbce63a89 846 * @{
elmot 1:d0dfbce63a89 847 */
elmot 1:d0dfbce63a89 848
elmot 1:d0dfbce63a89 849 /**
elmot 1:d0dfbce63a89 850 * @brief Return the DMA hande state.
elmot 1:d0dfbce63a89 851 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 852 * the configuration information for the specified DMA Channel.
elmot 1:d0dfbce63a89 853 * @retval HAL state
elmot 1:d0dfbce63a89 854 */
elmot 1:d0dfbce63a89 855 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
elmot 1:d0dfbce63a89 856 {
elmot 1:d0dfbce63a89 857 /* Return DMA handle state */
elmot 1:d0dfbce63a89 858 return hdma->State;
elmot 1:d0dfbce63a89 859 }
elmot 1:d0dfbce63a89 860
elmot 1:d0dfbce63a89 861 /**
elmot 1:d0dfbce63a89 862 * @brief Return the DMA error code.
elmot 1:d0dfbce63a89 863 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 864 * the configuration information for the specified DMA Channel.
elmot 1:d0dfbce63a89 865 * @retval DMA Error Code
elmot 1:d0dfbce63a89 866 */
elmot 1:d0dfbce63a89 867 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
elmot 1:d0dfbce63a89 868 {
elmot 1:d0dfbce63a89 869 return hdma->ErrorCode;
elmot 1:d0dfbce63a89 870 }
elmot 1:d0dfbce63a89 871
elmot 1:d0dfbce63a89 872 /**
elmot 1:d0dfbce63a89 873 * @}
elmot 1:d0dfbce63a89 874 */
elmot 1:d0dfbce63a89 875
elmot 1:d0dfbce63a89 876 /**
elmot 1:d0dfbce63a89 877 * @}
elmot 1:d0dfbce63a89 878 */
elmot 1:d0dfbce63a89 879
elmot 1:d0dfbce63a89 880 /** @addtogroup DMA_Private_Functions
elmot 1:d0dfbce63a89 881 * @{
elmot 1:d0dfbce63a89 882 */
elmot 1:d0dfbce63a89 883
elmot 1:d0dfbce63a89 884 /**
elmot 1:d0dfbce63a89 885 * @brief Sets the DMA Transfer parameter.
elmot 1:d0dfbce63a89 886 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 887 * the configuration information for the specified DMA Channel.
elmot 1:d0dfbce63a89 888 * @param SrcAddress: The source memory Buffer address
elmot 1:d0dfbce63a89 889 * @param DstAddress: The destination memory Buffer address
elmot 1:d0dfbce63a89 890 * @param DataLength: The length of data to be transferred from source to destination
elmot 1:d0dfbce63a89 891 * @retval HAL status
elmot 1:d0dfbce63a89 892 */
elmot 1:d0dfbce63a89 893 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
elmot 1:d0dfbce63a89 894 {
elmot 1:d0dfbce63a89 895 /* Clear all flags */
elmot 1:d0dfbce63a89 896 hdma->DmaBaseAddress->IFCR |= (DMA_ISR_GIF1 << hdma->ChannelIndex);
elmot 1:d0dfbce63a89 897
elmot 1:d0dfbce63a89 898 /* Configure DMA Channel data length */
elmot 1:d0dfbce63a89 899 hdma->Instance->CNDTR = DataLength;
elmot 1:d0dfbce63a89 900
elmot 1:d0dfbce63a89 901 /* Peripheral to Memory */
elmot 1:d0dfbce63a89 902 if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
elmot 1:d0dfbce63a89 903 {
elmot 1:d0dfbce63a89 904 /* Configure DMA Channel destination address */
elmot 1:d0dfbce63a89 905 hdma->Instance->CPAR = DstAddress;
elmot 1:d0dfbce63a89 906
elmot 1:d0dfbce63a89 907 /* Configure DMA Channel source address */
elmot 1:d0dfbce63a89 908 hdma->Instance->CMAR = SrcAddress;
elmot 1:d0dfbce63a89 909 }
elmot 1:d0dfbce63a89 910 /* Memory to Peripheral */
elmot 1:d0dfbce63a89 911 else
elmot 1:d0dfbce63a89 912 {
elmot 1:d0dfbce63a89 913 /* Configure DMA Channel source address */
elmot 1:d0dfbce63a89 914 hdma->Instance->CPAR = SrcAddress;
elmot 1:d0dfbce63a89 915
elmot 1:d0dfbce63a89 916 /* Configure DMA Channel destination address */
elmot 1:d0dfbce63a89 917 hdma->Instance->CMAR = DstAddress;
elmot 1:d0dfbce63a89 918 }
elmot 1:d0dfbce63a89 919 }
elmot 1:d0dfbce63a89 920
elmot 1:d0dfbce63a89 921 /**
elmot 1:d0dfbce63a89 922 * @}
elmot 1:d0dfbce63a89 923 */
elmot 1:d0dfbce63a89 924
elmot 1:d0dfbce63a89 925 /**
elmot 1:d0dfbce63a89 926 * @}
elmot 1:d0dfbce63a89 927 */
elmot 1:d0dfbce63a89 928
elmot 1:d0dfbce63a89 929 #endif /* HAL_DMA_MODULE_ENABLED */
elmot 1:d0dfbce63a89 930 /**
elmot 1:d0dfbce63a89 931 * @}
elmot 1:d0dfbce63a89 932 */
elmot 1:d0dfbce63a89 933
elmot 1:d0dfbce63a89 934 /**
elmot 1:d0dfbce63a89 935 * @}
elmot 1:d0dfbce63a89 936 */
elmot 1:d0dfbce63a89 937
elmot 1:d0dfbce63a89 938 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/