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HAL_L476/stm32l4xx_hal_adc.h@1:d0dfbce63a89, 2017-02-24 (annotated)
- Committer:
- elmot
- Date:
- Fri Feb 24 21:13:56 2017 +0000
- Revision:
- 1:d0dfbce63a89
Ready-to-copy
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| elmot | 1:d0dfbce63a89 | 1 | /** |
| elmot | 1:d0dfbce63a89 | 2 | ****************************************************************************** |
| elmot | 1:d0dfbce63a89 | 3 | * @file stm32l4xx_hal_adc.h |
| elmot | 1:d0dfbce63a89 | 4 | * @author MCD Application Team |
| elmot | 1:d0dfbce63a89 | 5 | * @version V1.5.1 |
| elmot | 1:d0dfbce63a89 | 6 | * @date 31-May-2016 |
| elmot | 1:d0dfbce63a89 | 7 | * @brief Header file of ADC HAL module. |
| elmot | 1:d0dfbce63a89 | 8 | ****************************************************************************** |
| elmot | 1:d0dfbce63a89 | 9 | * @attention |
| elmot | 1:d0dfbce63a89 | 10 | * |
| elmot | 1:d0dfbce63a89 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| elmot | 1:d0dfbce63a89 | 12 | * |
| elmot | 1:d0dfbce63a89 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| elmot | 1:d0dfbce63a89 | 14 | * are permitted provided that the following conditions are met: |
| elmot | 1:d0dfbce63a89 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| elmot | 1:d0dfbce63a89 | 16 | * this list of conditions and the following disclaimer. |
| elmot | 1:d0dfbce63a89 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| elmot | 1:d0dfbce63a89 | 18 | * this list of conditions and the following disclaimer in the documentation |
| elmot | 1:d0dfbce63a89 | 19 | * and/or other materials provided with the distribution. |
| elmot | 1:d0dfbce63a89 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| elmot | 1:d0dfbce63a89 | 21 | * may be used to endorse or promote products derived from this software |
| elmot | 1:d0dfbce63a89 | 22 | * without specific prior written permission. |
| elmot | 1:d0dfbce63a89 | 23 | * |
| elmot | 1:d0dfbce63a89 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| elmot | 1:d0dfbce63a89 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| elmot | 1:d0dfbce63a89 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| elmot | 1:d0dfbce63a89 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| elmot | 1:d0dfbce63a89 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| elmot | 1:d0dfbce63a89 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| elmot | 1:d0dfbce63a89 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| elmot | 1:d0dfbce63a89 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| elmot | 1:d0dfbce63a89 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| elmot | 1:d0dfbce63a89 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| elmot | 1:d0dfbce63a89 | 34 | * |
| elmot | 1:d0dfbce63a89 | 35 | ****************************************************************************** |
| elmot | 1:d0dfbce63a89 | 36 | */ |
| elmot | 1:d0dfbce63a89 | 37 | |
| elmot | 1:d0dfbce63a89 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 39 | #ifndef __STM32L4xx_ADC_H |
| elmot | 1:d0dfbce63a89 | 40 | #define __STM32L4xx_ADC_H |
| elmot | 1:d0dfbce63a89 | 41 | |
| elmot | 1:d0dfbce63a89 | 42 | #ifdef __cplusplus |
| elmot | 1:d0dfbce63a89 | 43 | extern "C" { |
| elmot | 1:d0dfbce63a89 | 44 | #endif |
| elmot | 1:d0dfbce63a89 | 45 | |
| elmot | 1:d0dfbce63a89 | 46 | /* Includes ------------------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 47 | #include "stm32l4xx_hal_def.h" |
| elmot | 1:d0dfbce63a89 | 48 | |
| elmot | 1:d0dfbce63a89 | 49 | /** @addtogroup STM32L4xx_HAL_Driver |
| elmot | 1:d0dfbce63a89 | 50 | * @{ |
| elmot | 1:d0dfbce63a89 | 51 | */ |
| elmot | 1:d0dfbce63a89 | 52 | |
| elmot | 1:d0dfbce63a89 | 53 | /** @addtogroup ADC |
| elmot | 1:d0dfbce63a89 | 54 | * @{ |
| elmot | 1:d0dfbce63a89 | 55 | */ |
| elmot | 1:d0dfbce63a89 | 56 | |
| elmot | 1:d0dfbce63a89 | 57 | /* Exported types ------------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 58 | /** @defgroup ADC_Exported_Types ADC Exported Types |
| elmot | 1:d0dfbce63a89 | 59 | * @{ |
| elmot | 1:d0dfbce63a89 | 60 | */ |
| elmot | 1:d0dfbce63a89 | 61 | |
| elmot | 1:d0dfbce63a89 | 62 | |
| elmot | 1:d0dfbce63a89 | 63 | /** |
| elmot | 1:d0dfbce63a89 | 64 | * @brief ADC Regular Conversion Oversampling structure definition |
| elmot | 1:d0dfbce63a89 | 65 | */ |
| elmot | 1:d0dfbce63a89 | 66 | typedef struct |
| elmot | 1:d0dfbce63a89 | 67 | { |
| elmot | 1:d0dfbce63a89 | 68 | uint32_t Ratio; /*!< Configures the oversampling ratio. |
| elmot | 1:d0dfbce63a89 | 69 | This parameter can be a value of @ref ADCEx_Oversampling_Ratio */ |
| elmot | 1:d0dfbce63a89 | 70 | |
| elmot | 1:d0dfbce63a89 | 71 | uint32_t RightBitShift; /*!< Configures the division coefficient for the Oversampler. |
| elmot | 1:d0dfbce63a89 | 72 | This parameter can be a value of @ref ADCEx_Right_Bit_Shift */ |
| elmot | 1:d0dfbce63a89 | 73 | |
| elmot | 1:d0dfbce63a89 | 74 | uint32_t TriggeredMode; /*!< Selects the regular triggered oversampling mode. |
| elmot | 1:d0dfbce63a89 | 75 | This parameter can be a value of @ref ADCEx_Triggered_Oversampling_Mode */ |
| elmot | 1:d0dfbce63a89 | 76 | |
| elmot | 1:d0dfbce63a89 | 77 | uint32_t OversamplingStopReset; /*!< Selects the regular oversampling mode. |
| elmot | 1:d0dfbce63a89 | 78 | The oversampling is either temporary stopped or reset upon an injected |
| elmot | 1:d0dfbce63a89 | 79 | sequence interruption. |
| elmot | 1:d0dfbce63a89 | 80 | If oversampling is enabled on both regular and injected groups, this parameter |
| elmot | 1:d0dfbce63a89 | 81 | is discarded and forced to setting "ADC_REGOVERSAMPLING_RESUMED_MODE" |
| elmot | 1:d0dfbce63a89 | 82 | (the oversampling buffer is zeroed during injection sequence). |
| elmot | 1:d0dfbce63a89 | 83 | This parameter can be a value of @ref ADCEx_Regular_Oversampling_Mode */ |
| elmot | 1:d0dfbce63a89 | 84 | |
| elmot | 1:d0dfbce63a89 | 85 | }ADC_OversamplingTypeDef; |
| elmot | 1:d0dfbce63a89 | 86 | |
| elmot | 1:d0dfbce63a89 | 87 | |
| elmot | 1:d0dfbce63a89 | 88 | |
| elmot | 1:d0dfbce63a89 | 89 | |
| elmot | 1:d0dfbce63a89 | 90 | /** @defgroup ADC_States ADC States |
| elmot | 1:d0dfbce63a89 | 91 | * @{ |
| elmot | 1:d0dfbce63a89 | 92 | */ |
| elmot | 1:d0dfbce63a89 | 93 | |
| elmot | 1:d0dfbce63a89 | 94 | /** |
| elmot | 1:d0dfbce63a89 | 95 | * @brief HAL ADC state machine: ADC State bitfield definition |
| elmot | 1:d0dfbce63a89 | 96 | */ |
| elmot | 1:d0dfbce63a89 | 97 | /* States of ADC global scope */ |
| elmot | 1:d0dfbce63a89 | 98 | #define HAL_ADC_STATE_RESET ((uint32_t)0x00000000) /*!< ADC not yet initialized or disabled */ |
| elmot | 1:d0dfbce63a89 | 99 | #define HAL_ADC_STATE_READY ((uint32_t)0x00000001) /*!< ADC peripheral ready for use */ |
| elmot | 1:d0dfbce63a89 | 100 | #define HAL_ADC_STATE_BUSY_INTERNAL ((uint32_t)0x00000002) /*!< ADC is busy because of an internal process (initialization, calibration) */ |
| elmot | 1:d0dfbce63a89 | 101 | #define HAL_ADC_STATE_TIMEOUT ((uint32_t)0x00000004) /*!< TimeOut occurrence */ |
| elmot | 1:d0dfbce63a89 | 102 | |
| elmot | 1:d0dfbce63a89 | 103 | /* States of ADC errors */ |
| elmot | 1:d0dfbce63a89 | 104 | #define HAL_ADC_STATE_ERROR_INTERNAL ((uint32_t)0x00000010) /*!< Internal error occurrence */ |
| elmot | 1:d0dfbce63a89 | 105 | #define HAL_ADC_STATE_ERROR_CONFIG ((uint32_t)0x00000020) /*!< Configuration error occurrence */ |
| elmot | 1:d0dfbce63a89 | 106 | #define HAL_ADC_STATE_ERROR_DMA ((uint32_t)0x00000040) /*!< DMA error occurrence */ |
| elmot | 1:d0dfbce63a89 | 107 | |
| elmot | 1:d0dfbce63a89 | 108 | /* States of ADC regular group */ |
| elmot | 1:d0dfbce63a89 | 109 | #define HAL_ADC_STATE_REG_BUSY ((uint32_t)0x00000100) /*!< A regular conversion is ongoing or can occur (either by continuous mode, |
| elmot | 1:d0dfbce63a89 | 110 | external trigger, low power auto power-on, multimode ADC master control |
| elmot | 1:d0dfbce63a89 | 111 | when multimode feature available) */ |
| elmot | 1:d0dfbce63a89 | 112 | #define HAL_ADC_STATE_REG_EOC ((uint32_t)0x00000200) /*!< Regular conversion data available */ |
| elmot | 1:d0dfbce63a89 | 113 | #define HAL_ADC_STATE_REG_OVR ((uint32_t)0x00000400) /*!< Overrun occurrence */ |
| elmot | 1:d0dfbce63a89 | 114 | #define HAL_ADC_STATE_REG_EOSMP ((uint32_t)0x00000800) /*!< End Of Sampling flag raised */ |
| elmot | 1:d0dfbce63a89 | 115 | |
| elmot | 1:d0dfbce63a89 | 116 | /* States of ADC injected group */ |
| elmot | 1:d0dfbce63a89 | 117 | #define HAL_ADC_STATE_INJ_BUSY ((uint32_t)0x00001000) /*!< An injected conversion is ongoing or can occur (either by auto-injection mode, |
| elmot | 1:d0dfbce63a89 | 118 | external trigger, low power auto power-on, multimode ADC master control |
| elmot | 1:d0dfbce63a89 | 119 | when multimode feature available) */ |
| elmot | 1:d0dfbce63a89 | 120 | #define HAL_ADC_STATE_INJ_EOC ((uint32_t)0x00002000) /*!< Injected conversion data available */ |
| elmot | 1:d0dfbce63a89 | 121 | #define HAL_ADC_STATE_INJ_JQOVF ((uint32_t)0x00004000) /*!< Injected queue overflow occurrence */ |
| elmot | 1:d0dfbce63a89 | 122 | |
| elmot | 1:d0dfbce63a89 | 123 | /* States of ADC analog watchdogs */ |
| elmot | 1:d0dfbce63a89 | 124 | #define HAL_ADC_STATE_AWD1 ((uint32_t)0x00010000) /*!< Out-of-window occurrence of Analog Watchdog 1 */ |
| elmot | 1:d0dfbce63a89 | 125 | #define HAL_ADC_STATE_AWD2 ((uint32_t)0x00020000) /*!< Out-of-window occurrence of Analog Watchdog 2 */ |
| elmot | 1:d0dfbce63a89 | 126 | #define HAL_ADC_STATE_AWD3 ((uint32_t)0x00040000) /*!< Out-of-window occurrence of Analog Watchdog 3 */ |
| elmot | 1:d0dfbce63a89 | 127 | |
| elmot | 1:d0dfbce63a89 | 128 | /* States of ADC multi-mode when feature available */ |
| elmot | 1:d0dfbce63a89 | 129 | #define HAL_ADC_STATE_MULTIMODE_SLAVE ((uint32_t)0x00100000) /*!< ADC in multimode slave state, controlled by another ADC master (when feature available) */ |
| elmot | 1:d0dfbce63a89 | 130 | |
| elmot | 1:d0dfbce63a89 | 131 | /** |
| elmot | 1:d0dfbce63a89 | 132 | * @} |
| elmot | 1:d0dfbce63a89 | 133 | */ |
| elmot | 1:d0dfbce63a89 | 134 | |
| elmot | 1:d0dfbce63a89 | 135 | /** |
| elmot | 1:d0dfbce63a89 | 136 | * @brief ADC Injection Configuration |
| elmot | 1:d0dfbce63a89 | 137 | */ |
| elmot | 1:d0dfbce63a89 | 138 | typedef struct |
| elmot | 1:d0dfbce63a89 | 139 | { |
| elmot | 1:d0dfbce63a89 | 140 | uint32_t ContextQueue; /*!< Injected channel configuration context: build-up over each |
| elmot | 1:d0dfbce63a89 | 141 | HAL_ADCEx_InjectedConfigChannel() call to finally initialize |
| elmot | 1:d0dfbce63a89 | 142 | JSQR register at HAL_ADCEx_InjectedConfigChannel() last call */ |
| elmot | 1:d0dfbce63a89 | 143 | |
| elmot | 1:d0dfbce63a89 | 144 | uint32_t ChannelCount; /*!< Number of channels in the injected sequence */ |
| elmot | 1:d0dfbce63a89 | 145 | }ADC_InjectionConfigTypeDef; |
| elmot | 1:d0dfbce63a89 | 146 | |
| elmot | 1:d0dfbce63a89 | 147 | |
| elmot | 1:d0dfbce63a89 | 148 | |
| elmot | 1:d0dfbce63a89 | 149 | |
| elmot | 1:d0dfbce63a89 | 150 | /** |
| elmot | 1:d0dfbce63a89 | 151 | * @brief Structure definition of ADC channel for regular group |
| elmot | 1:d0dfbce63a89 | 152 | * @note The setting of these parameters with function HAL_ADC_ConfigChannel() is conditioned by ADC state. |
| elmot | 1:d0dfbce63a89 | 153 | * ADC state can be either: |
| elmot | 1:d0dfbce63a89 | 154 | * - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'SingleDiff') |
| elmot | 1:d0dfbce63a89 | 155 | * - For all except parameters 'SamplingTime', 'Offset', 'OffsetNumber': ADC enabled without conversion on going on regular group. |
| elmot | 1:d0dfbce63a89 | 156 | * - For parameters 'SamplingTime', 'Offset', 'OffsetNumber': ADC enabled without conversion on going on regular and injected groups. |
| elmot | 1:d0dfbce63a89 | 157 | * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed |
| elmot | 1:d0dfbce63a89 | 158 | * without error reporting (as it can be the expected behaviour in case of intended action to update another parameter |
| elmot | 1:d0dfbce63a89 | 159 | * (which fulfills the ADC state condition) on the fly). |
| elmot | 1:d0dfbce63a89 | 160 | */ |
| elmot | 1:d0dfbce63a89 | 161 | typedef struct |
| elmot | 1:d0dfbce63a89 | 162 | { |
| elmot | 1:d0dfbce63a89 | 163 | uint32_t Channel; /*!< Specifies the channel to configure into ADC regular group. |
| elmot | 1:d0dfbce63a89 | 164 | This parameter can be a value of @ref ADC_channels |
| elmot | 1:d0dfbce63a89 | 165 | Note: Depending on devices and ADC instances, some channels may not be available. Refer to device DataSheet for channels availability. */ |
| elmot | 1:d0dfbce63a89 | 166 | uint32_t Rank; /*!< Specifies the rank in the regular group sequencer. |
| elmot | 1:d0dfbce63a89 | 167 | This parameter can be a value of @ref ADCEx_regular_rank |
| elmot | 1:d0dfbce63a89 | 168 | Note: to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by |
| elmot | 1:d0dfbce63a89 | 169 | the new channel setting (or parameter number of conversions adjusted) */ |
| elmot | 1:d0dfbce63a89 | 170 | uint32_t SamplingTime; /*!< Sampling time value to be set for the selected channel. |
| elmot | 1:d0dfbce63a89 | 171 | Unit: ADC clock cycles |
| elmot | 1:d0dfbce63a89 | 172 | Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits, |
| elmot | 1:d0dfbce63a89 | 173 | 8.5 cycles at 8 bits, 6.5 cycles at 6 bits). |
| elmot | 1:d0dfbce63a89 | 174 | This parameter can be a value of @ref ADC_sampling_times |
| elmot | 1:d0dfbce63a89 | 175 | Caution: This parameter applies to a channel that can be used in a regular and/or injected group. |
| elmot | 1:d0dfbce63a89 | 176 | It overwrites the last setting. |
| elmot | 1:d0dfbce63a89 | 177 | Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor), |
| elmot | 1:d0dfbce63a89 | 178 | sampling time constraints must be respected (sampling time can be adjusted with respect to the ADC clock frequency and sampling time setting) |
| elmot | 1:d0dfbce63a89 | 179 | Refer to device DataSheet for timings values. */ |
| elmot | 1:d0dfbce63a89 | 180 | uint32_t SingleDiff; /*!< Selection of single-ended or differential input. |
| elmot | 1:d0dfbce63a89 | 181 | In differential mode: Differential measurement is carried out between the selected channel 'i' (positive input) and channel 'i+1' (negative input). |
| elmot | 1:d0dfbce63a89 | 182 | Only channel 'i' has to be configured, channel 'i+1' is configured automatically. |
| elmot | 1:d0dfbce63a89 | 183 | This parameter must be a value of @ref ADCEx_SingleDifferential |
| elmot | 1:d0dfbce63a89 | 184 | Caution: This parameter applies to a channel that can be used in a regular and/or injected group. |
| elmot | 1:d0dfbce63a89 | 185 | It overwrites the last setting. |
| elmot | 1:d0dfbce63a89 | 186 | Note: Refer to Reference Manual to ensure the selected channel is available in differential mode. |
| elmot | 1:d0dfbce63a89 | 187 | Note: When configuring a channel 'i' in differential mode, the channel 'i+1' is not usable separately. |
| elmot | 1:d0dfbce63a89 | 188 | Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). |
| elmot | 1:d0dfbce63a89 | 189 | If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case |
| elmot | 1:d0dfbce63a89 | 190 | of another parameter update on the fly) */ |
| elmot | 1:d0dfbce63a89 | 191 | uint32_t OffsetNumber; /*!< Selects the offset number |
| elmot | 1:d0dfbce63a89 | 192 | This parameter can be a value of @ref ADCEx_OffsetNumber |
| elmot | 1:d0dfbce63a89 | 193 | Caution: Only one offset is allowed per channel. This parameter overwrites the last setting. */ |
| elmot | 1:d0dfbce63a89 | 194 | uint32_t Offset; /*!< Defines the offset to be subtracted from the raw converted data. |
| elmot | 1:d0dfbce63a89 | 195 | Offset value must be a positive number. |
| elmot | 1:d0dfbce63a89 | 196 | Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, |
| elmot | 1:d0dfbce63a89 | 197 | 0x3FF, 0xFF or 0x3F respectively. |
| elmot | 1:d0dfbce63a89 | 198 | Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled |
| elmot | 1:d0dfbce63a89 | 199 | without continuous mode or external trigger that could launch a conversion). */ |
| elmot | 1:d0dfbce63a89 | 200 | }ADC_ChannelConfTypeDef; |
| elmot | 1:d0dfbce63a89 | 201 | |
| elmot | 1:d0dfbce63a89 | 202 | |
| elmot | 1:d0dfbce63a89 | 203 | /** |
| elmot | 1:d0dfbce63a89 | 204 | * @brief Structure definition of ADC analog watchdog |
| elmot | 1:d0dfbce63a89 | 205 | * @note The setting of these parameters with function HAL_ADC_AnalogWDGConfig() is conditioned by ADC state. |
| elmot | 1:d0dfbce63a89 | 206 | * ADC state can be either: ADC disabled or ADC enabled without conversion on going on regular and injected groups. |
| elmot | 1:d0dfbce63a89 | 207 | */ |
| elmot | 1:d0dfbce63a89 | 208 | typedef struct |
| elmot | 1:d0dfbce63a89 | 209 | { |
| elmot | 1:d0dfbce63a89 | 210 | uint32_t WatchdogNumber; /*!< Selects which ADC analog watchdog is applied to the selected channel. |
| elmot | 1:d0dfbce63a89 | 211 | For Analog Watchdog 1: Only 1 channel can be monitored (or overall group of channels by setting parameter 'WatchdogMode') |
| elmot | 1:d0dfbce63a89 | 212 | For Analog Watchdog 2 and 3: Several channels can be monitored (by successive calls of 'HAL_ADC_AnalogWDGConfig()' for each channel) |
| elmot | 1:d0dfbce63a89 | 213 | This parameter can be a value of @ref ADCEx_analog_watchdog_number. */ |
| elmot | 1:d0dfbce63a89 | 214 | uint32_t WatchdogMode; /*!< For Analog Watchdog 1: Configures the ADC analog watchdog mode: single channel/overall group of channels, regular/injected group. |
| elmot | 1:d0dfbce63a89 | 215 | For Analog Watchdog 2 and 3: There is no configuration for overall group of channels as AWD1. Set value 'ADC_ANALOGWATCHDOG_NONE' to reset |
| elmot | 1:d0dfbce63a89 | 216 | channels group programmed with parameter 'Channel', set any other value to program the channel(s) to be monitored. |
| elmot | 1:d0dfbce63a89 | 217 | This parameter can be a value of @ref ADCEx_analog_watchdog_mode. */ |
| elmot | 1:d0dfbce63a89 | 218 | uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog. |
| elmot | 1:d0dfbce63a89 | 219 | For Analog Watchdog 1: this parameter has an effect only if parameter 'WatchdogMode' is configured on single channel (only 1 channel can be monitored). |
| elmot | 1:d0dfbce63a89 | 220 | For Analog Watchdog 2 and 3: Several channels can be monitored (successive calls of HAL_ADC_AnalogWDGConfig() must be done, one for each channel. |
| elmot | 1:d0dfbce63a89 | 221 | Channels group reset can be done by setting WatchdogMode to 'ADC_ANALOGWATCHDOG_NONE'). |
| elmot | 1:d0dfbce63a89 | 222 | This parameter can be a value of @ref ADC_channels. */ |
| elmot | 1:d0dfbce63a89 | 223 | uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode. |
| elmot | 1:d0dfbce63a89 | 224 | This parameter can be set to ENABLE or DISABLE */ |
| elmot | 1:d0dfbce63a89 | 225 | uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value. |
| elmot | 1:d0dfbce63a89 | 226 | Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, |
| elmot | 1:d0dfbce63a89 | 227 | 0x3FF, 0xFF or 0x3F respectively. |
| elmot | 1:d0dfbce63a89 | 228 | Note: Analog watchdog 2 and 3 are limited to a resolution of 8 bits: if ADC resolution is 12 bits |
| elmot | 1:d0dfbce63a89 | 229 | the 4 LSB are ignored, if ADC resolution is 10 bits the 2 LSB are ignored. */ |
| elmot | 1:d0dfbce63a89 | 230 | uint32_t LowThreshold; /*!< Configures the ADC analog watchdog Low threshold value. |
| elmot | 1:d0dfbce63a89 | 231 | Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. |
| elmot | 1:d0dfbce63a89 | 232 | Note: Analog watchdog 2 and 3 are limited to a resolution of 8 bits: if ADC resolution is 12 bits |
| elmot | 1:d0dfbce63a89 | 233 | the 4 LSB are ignored, if ADC resolution is 10 bits the 2 LSB are ignored. */ |
| elmot | 1:d0dfbce63a89 | 234 | }ADC_AnalogWDGConfTypeDef; |
| elmot | 1:d0dfbce63a89 | 235 | |
| elmot | 1:d0dfbce63a89 | 236 | |
| elmot | 1:d0dfbce63a89 | 237 | /** |
| elmot | 1:d0dfbce63a89 | 238 | * @} |
| elmot | 1:d0dfbce63a89 | 239 | */ |
| elmot | 1:d0dfbce63a89 | 240 | |
| elmot | 1:d0dfbce63a89 | 241 | /* Exported constants --------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 242 | |
| elmot | 1:d0dfbce63a89 | 243 | /** @defgroup ADC_Exported_Constants ADC Exported Constants |
| elmot | 1:d0dfbce63a89 | 244 | * @{ |
| elmot | 1:d0dfbce63a89 | 245 | */ |
| elmot | 1:d0dfbce63a89 | 246 | |
| elmot | 1:d0dfbce63a89 | 247 | /** @defgroup ADC_Error_Code ADC Error Code |
| elmot | 1:d0dfbce63a89 | 248 | * @{ |
| elmot | 1:d0dfbce63a89 | 249 | */ |
| elmot | 1:d0dfbce63a89 | 250 | #define HAL_ADC_ERROR_NONE ((uint32_t)0x00) /*!< No error */ |
| elmot | 1:d0dfbce63a89 | 251 | #define HAL_ADC_ERROR_INTERNAL ((uint32_t)0x01) /*!< ADC IP internal error: problem of |
| elmot | 1:d0dfbce63a89 | 252 | clocking, enable/disable, erroneous state */ |
| elmot | 1:d0dfbce63a89 | 253 | #define HAL_ADC_ERROR_OVR ((uint32_t)0x02) /*!< Overrun error */ |
| elmot | 1:d0dfbce63a89 | 254 | #define HAL_ADC_ERROR_DMA ((uint32_t)0x04) /*!< DMA transfer error */ |
| elmot | 1:d0dfbce63a89 | 255 | #define HAL_ADC_ERROR_JQOVF ((uint32_t)0x08) /*!< Injected context queue overflow error */ |
| elmot | 1:d0dfbce63a89 | 256 | /** |
| elmot | 1:d0dfbce63a89 | 257 | * @} |
| elmot | 1:d0dfbce63a89 | 258 | */ |
| elmot | 1:d0dfbce63a89 | 259 | |
| elmot | 1:d0dfbce63a89 | 260 | /** @defgroup ADC_ClockPrescaler ADC Clock Prescaler |
| elmot | 1:d0dfbce63a89 | 261 | * @{ |
| elmot | 1:d0dfbce63a89 | 262 | */ |
| elmot | 1:d0dfbce63a89 | 263 | #define ADC_CLOCK_SYNC_PCLK_DIV1 ((uint32_t)ADC_CCR_CKMODE_0) /*!< ADC synchronous clock derived from AHB clock not divided */ |
| elmot | 1:d0dfbce63a89 | 264 | #define ADC_CLOCK_SYNC_PCLK_DIV2 ((uint32_t)ADC_CCR_CKMODE_1) /*!< ADC synchronous clock derived from AHB clock divided by 2 */ |
| elmot | 1:d0dfbce63a89 | 265 | #define ADC_CLOCK_SYNC_PCLK_DIV4 ((uint32_t)ADC_CCR_CKMODE) /*!< ADC synchronous clock derived from AHB clock divided by 4 */ |
| elmot | 1:d0dfbce63a89 | 266 | |
| elmot | 1:d0dfbce63a89 | 267 | #define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1 /*!< Obsolete naming, kept for compatibility with some other devices */ |
| elmot | 1:d0dfbce63a89 | 268 | #define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2 /*!< Obsolete naming, kept for compatibility with some other devices */ |
| elmot | 1:d0dfbce63a89 | 269 | #define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4 /*!< Obsolete naming, kept for compatibility with some other devices */ |
| elmot | 1:d0dfbce63a89 | 270 | |
| elmot | 1:d0dfbce63a89 | 271 | #define ADC_CLOCK_ASYNC_DIV1 ((uint32_t)0x00000000) /*!< ADC asynchronous clock not divided */ |
| elmot | 1:d0dfbce63a89 | 272 | #define ADC_CLOCK_ASYNC_DIV2 ((uint32_t)ADC_CCR_PRESC_0) /*!< ADC asynchronous clock divided by 2 */ |
| elmot | 1:d0dfbce63a89 | 273 | #define ADC_CLOCK_ASYNC_DIV4 ((uint32_t)ADC_CCR_PRESC_1) /*!< ADC asynchronous clock divided by 4 */ |
| elmot | 1:d0dfbce63a89 | 274 | #define ADC_CLOCK_ASYNC_DIV6 ((uint32_t)(ADC_CCR_PRESC_1|ADC_CCR_PRESC_0)) /*!< ADC asynchronous clock divided by 6 */ |
| elmot | 1:d0dfbce63a89 | 275 | #define ADC_CLOCK_ASYNC_DIV8 ((uint32_t)(ADC_CCR_PRESC_2)) /*!< ADC asynchronous clock divided by 8 */ |
| elmot | 1:d0dfbce63a89 | 276 | #define ADC_CLOCK_ASYNC_DIV10 ((uint32_t)(ADC_CCR_PRESC_2|ADC_CCR_PRESC_0)) /*!< ADC asynchronous clock divided by 10 */ |
| elmot | 1:d0dfbce63a89 | 277 | #define ADC_CLOCK_ASYNC_DIV12 ((uint32_t)(ADC_CCR_PRESC_2|ADC_CCR_PRESC_1)) /*!< ADC asynchronous clock divided by 12 */ |
| elmot | 1:d0dfbce63a89 | 278 | #define ADC_CLOCK_ASYNC_DIV16 ((uint32_t)(ADC_CCR_PRESC_2|ADC_CCR_PRESC_1|ADC_CCR_PRESC_0)) /*!< ADC asynchronous clock divided by 16 */ |
| elmot | 1:d0dfbce63a89 | 279 | #define ADC_CLOCK_ASYNC_DIV32 ((uint32_t)(ADC_CCR_PRESC_3)) /*!< ADC asynchronous clock divided by 32 */ |
| elmot | 1:d0dfbce63a89 | 280 | #define ADC_CLOCK_ASYNC_DIV64 ((uint32_t)(ADC_CCR_PRESC_3|ADC_CCR_PRESC_0)) /*!< ADC asynchronous clock divided by 64 */ |
| elmot | 1:d0dfbce63a89 | 281 | #define ADC_CLOCK_ASYNC_DIV128 ((uint32_t)(ADC_CCR_PRESC_3|ADC_CCR_PRESC_1)) /*!< ADC asynchronous clock divided by 128 */ |
| elmot | 1:d0dfbce63a89 | 282 | #define ADC_CLOCK_ASYNC_DIV256 ((uint32_t)(ADC_CCR_PRESC_3|ADC_CCR_PRESC_1|ADC_CCR_PRESC_0)) /*!< ADC asynchronous clock divided by 256 */ |
| elmot | 1:d0dfbce63a89 | 283 | /** |
| elmot | 1:d0dfbce63a89 | 284 | * @} |
| elmot | 1:d0dfbce63a89 | 285 | */ |
| elmot | 1:d0dfbce63a89 | 286 | |
| elmot | 1:d0dfbce63a89 | 287 | |
| elmot | 1:d0dfbce63a89 | 288 | /** @defgroup ADC_Resolution ADC Resolution |
| elmot | 1:d0dfbce63a89 | 289 | * @{ |
| elmot | 1:d0dfbce63a89 | 290 | */ |
| elmot | 1:d0dfbce63a89 | 291 | #define ADC_RESOLUTION_12B ((uint32_t)0x00000000) /*!< ADC 12-bit resolution */ |
| elmot | 1:d0dfbce63a89 | 292 | #define ADC_RESOLUTION_10B ((uint32_t)ADC_CFGR_RES_0) /*!< ADC 10-bit resolution */ |
| elmot | 1:d0dfbce63a89 | 293 | #define ADC_RESOLUTION_8B ((uint32_t)ADC_CFGR_RES_1) /*!< ADC 8-bit resolution */ |
| elmot | 1:d0dfbce63a89 | 294 | #define ADC_RESOLUTION_6B ((uint32_t)ADC_CFGR_RES) /*!< ADC 6-bit resolution */ |
| elmot | 1:d0dfbce63a89 | 295 | /** |
| elmot | 1:d0dfbce63a89 | 296 | * @} |
| elmot | 1:d0dfbce63a89 | 297 | */ |
| elmot | 1:d0dfbce63a89 | 298 | |
| elmot | 1:d0dfbce63a89 | 299 | /** @defgroup ADC_Data_align ADC Data Alignment |
| elmot | 1:d0dfbce63a89 | 300 | * @{ |
| elmot | 1:d0dfbce63a89 | 301 | */ |
| elmot | 1:d0dfbce63a89 | 302 | #define ADC_DATAALIGN_RIGHT ((uint32_t)0x00000000) /*!< Data right alignment */ |
| elmot | 1:d0dfbce63a89 | 303 | #define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CFGR_ALIGN) /*!< Data left alignment */ |
| elmot | 1:d0dfbce63a89 | 304 | /** |
| elmot | 1:d0dfbce63a89 | 305 | * @} |
| elmot | 1:d0dfbce63a89 | 306 | */ |
| elmot | 1:d0dfbce63a89 | 307 | |
| elmot | 1:d0dfbce63a89 | 308 | /** @defgroup ADC_Scan_mode ADC Scan Mode |
| elmot | 1:d0dfbce63a89 | 309 | * @{ |
| elmot | 1:d0dfbce63a89 | 310 | */ |
| elmot | 1:d0dfbce63a89 | 311 | #define ADC_SCAN_DISABLE ((uint32_t)0x00000000) /*!< Scan mode disabled */ |
| elmot | 1:d0dfbce63a89 | 312 | #define ADC_SCAN_ENABLE ((uint32_t)0x00000001) /*!< Scan mode enabled */ |
| elmot | 1:d0dfbce63a89 | 313 | /** |
| elmot | 1:d0dfbce63a89 | 314 | * @} |
| elmot | 1:d0dfbce63a89 | 315 | */ |
| elmot | 1:d0dfbce63a89 | 316 | |
| elmot | 1:d0dfbce63a89 | 317 | /** @defgroup ADC_Regular_External_Trigger_Source_Edge ADC External Trigger Source Edge for Regular Group |
| elmot | 1:d0dfbce63a89 | 318 | * @{ |
| elmot | 1:d0dfbce63a89 | 319 | */ |
| elmot | 1:d0dfbce63a89 | 320 | #define ADC_EXTERNALTRIGCONVEDGE_NONE ((uint32_t)0x00000000) /*!< Regular conversions hardware trigger detection disabled */ |
| elmot | 1:d0dfbce63a89 | 321 | #define ADC_EXTERNALTRIGCONVEDGE_RISING ((uint32_t)ADC_CFGR_EXTEN_0) /*!< Regular conversions hardware trigger detection on the rising edge */ |
| elmot | 1:d0dfbce63a89 | 322 | #define ADC_EXTERNALTRIGCONVEDGE_FALLING ((uint32_t)ADC_CFGR_EXTEN_1) /*!< Regular conversions hardware trigger detection on the falling edge */ |
| elmot | 1:d0dfbce63a89 | 323 | #define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CFGR_EXTEN) /*!< Regular conversions hardware trigger detection on both the rising and falling edges */ |
| elmot | 1:d0dfbce63a89 | 324 | /** |
| elmot | 1:d0dfbce63a89 | 325 | * @} |
| elmot | 1:d0dfbce63a89 | 326 | */ |
| elmot | 1:d0dfbce63a89 | 327 | |
| elmot | 1:d0dfbce63a89 | 328 | /** @defgroup ADC_Regular_External_Trigger_Source ADC External Trigger Source for Regular Group |
| elmot | 1:d0dfbce63a89 | 329 | * @{ |
| elmot | 1:d0dfbce63a89 | 330 | */ |
| elmot | 1:d0dfbce63a89 | 331 | |
| elmot | 1:d0dfbce63a89 | 332 | /* External triggers of ADC regular group */ |
| elmot | 1:d0dfbce63a89 | 333 | #define ADC_EXTERNALTRIG_T1_CC1 ((uint32_t)0x00000000) /*!< Event 0 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 334 | #define ADC_EXTERNALTRIG_T1_CC2 ((uint32_t)ADC_CFGR_EXTSEL_0) /*!< Event 1 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 335 | #define ADC_EXTERNALTRIG_T1_CC3 ((uint32_t)ADC_CFGR_EXTSEL_1) /*!< Event 2 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 336 | #define ADC_EXTERNALTRIG_T2_CC2 ((uint32_t)(ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0)) /*!< Event 3 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 337 | #define ADC_EXTERNALTRIG_T3_TRGO ((uint32_t)ADC_CFGR_EXTSEL_2) /*!< Event 4 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 338 | #define ADC_EXTERNALTRIG_T4_CC4 ((uint32_t)(ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_0)) /*!< Event 5 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 339 | #define ADC_EXTERNALTRIG_EXT_IT11 ((uint32_t)(ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1)) /*!< Event 6 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 340 | #define ADC_EXTERNALTRIG_T8_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0)) /*!< Event 7 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 341 | #define ADC_EXTERNALTRIG_T8_TRGO2 ((uint32_t) ADC_CFGR_EXTSEL_3) /*!< Event 8 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 342 | #define ADC_EXTERNALTRIG_T1_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_0)) /*!< Event 9 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 343 | #define ADC_EXTERNALTRIG_T1_TRGO2 ((uint32_t)(ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_1)) /*!< Event 10 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 344 | #define ADC_EXTERNALTRIG_T2_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0)) /*!< Event 11 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 345 | #define ADC_EXTERNALTRIG_T4_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2)) /*!< Event 12 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 346 | #define ADC_EXTERNALTRIG_T6_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_0)) /*!< Event 13 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 347 | #define ADC_EXTERNALTRIG_T15_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1)) /*!< Event 14 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 348 | #define ADC_EXTERNALTRIG_T3_CC4 ((uint32_t)ADC_CFGR_EXTSEL) /*!< Event 15 triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 349 | |
| elmot | 1:d0dfbce63a89 | 350 | #define ADC_SOFTWARE_START ((uint32_t)0x00000001) /*!< Software triggers regular group conversion start */ |
| elmot | 1:d0dfbce63a89 | 351 | /** |
| elmot | 1:d0dfbce63a89 | 352 | * @} |
| elmot | 1:d0dfbce63a89 | 353 | */ |
| elmot | 1:d0dfbce63a89 | 354 | |
| elmot | 1:d0dfbce63a89 | 355 | |
| elmot | 1:d0dfbce63a89 | 356 | /** @defgroup ADC_EOCSelection ADC End of Regular Sequence/Conversion |
| elmot | 1:d0dfbce63a89 | 357 | * @{ |
| elmot | 1:d0dfbce63a89 | 358 | */ |
| elmot | 1:d0dfbce63a89 | 359 | #define ADC_EOC_SINGLE_CONV ((uint32_t) ADC_ISR_EOC) /*!< End of conversion flag */ |
| elmot | 1:d0dfbce63a89 | 360 | #define ADC_EOC_SEQ_CONV ((uint32_t) ADC_ISR_EOS) /*!< End of sequence flag */ |
| elmot | 1:d0dfbce63a89 | 361 | #define ADC_EOC_SINGLE_SEQ_CONV ((uint32_t)(ADC_ISR_EOC | ADC_ISR_EOS)) /*!< Reserved for future use */ |
| elmot | 1:d0dfbce63a89 | 362 | /** |
| elmot | 1:d0dfbce63a89 | 363 | * @} |
| elmot | 1:d0dfbce63a89 | 364 | */ |
| elmot | 1:d0dfbce63a89 | 365 | |
| elmot | 1:d0dfbce63a89 | 366 | /** @defgroup ADC_Overrun ADC overrun |
| elmot | 1:d0dfbce63a89 | 367 | * @{ |
| elmot | 1:d0dfbce63a89 | 368 | */ |
| elmot | 1:d0dfbce63a89 | 369 | #define ADC_OVR_DATA_PRESERVED ((uint32_t)0x00000000) /*!< Data preserved in case of overrun */ |
| elmot | 1:d0dfbce63a89 | 370 | #define ADC_OVR_DATA_OVERWRITTEN ((uint32_t)ADC_CFGR_OVRMOD) /*!< Data overwritten in case of overrun */ |
| elmot | 1:d0dfbce63a89 | 371 | /** |
| elmot | 1:d0dfbce63a89 | 372 | * @} |
| elmot | 1:d0dfbce63a89 | 373 | */ |
| elmot | 1:d0dfbce63a89 | 374 | |
| elmot | 1:d0dfbce63a89 | 375 | /** @defgroup ADC_channels ADC Channels |
| elmot | 1:d0dfbce63a89 | 376 | * @{ |
| elmot | 1:d0dfbce63a89 | 377 | */ |
| elmot | 1:d0dfbce63a89 | 378 | #define ADC_CHANNEL_0 ((uint32_t)(0x00000000)) /*!< ADC channel 0 */ |
| elmot | 1:d0dfbce63a89 | 379 | #define ADC_CHANNEL_1 ((uint32_t)(ADC_SQR3_SQ10_0)) /*!< ADC channel 1 */ |
| elmot | 1:d0dfbce63a89 | 380 | #define ADC_CHANNEL_2 ((uint32_t)(ADC_SQR3_SQ10_1)) /*!< ADC channel 2 */ |
| elmot | 1:d0dfbce63a89 | 381 | #define ADC_CHANNEL_3 ((uint32_t)(ADC_SQR3_SQ10_1 | ADC_SQR3_SQ10_0)) /*!< ADC channel 3 */ |
| elmot | 1:d0dfbce63a89 | 382 | #define ADC_CHANNEL_4 ((uint32_t)(ADC_SQR3_SQ10_2)) /*!< ADC channel 4 */ |
| elmot | 1:d0dfbce63a89 | 383 | #define ADC_CHANNEL_5 ((uint32_t)(ADC_SQR3_SQ10_2 | ADC_SQR3_SQ10_0)) /*!< ADC channel 5 */ |
| elmot | 1:d0dfbce63a89 | 384 | #define ADC_CHANNEL_6 ((uint32_t)(ADC_SQR3_SQ10_2 | ADC_SQR3_SQ10_1)) /*!< ADC channel 6 */ |
| elmot | 1:d0dfbce63a89 | 385 | #define ADC_CHANNEL_7 ((uint32_t)(ADC_SQR3_SQ10_2 | ADC_SQR3_SQ10_1 | ADC_SQR3_SQ10_0)) /*!< ADC channel 7 */ |
| elmot | 1:d0dfbce63a89 | 386 | #define ADC_CHANNEL_8 ((uint32_t)(ADC_SQR3_SQ10_3)) /*!< ADC channel 8 */ |
| elmot | 1:d0dfbce63a89 | 387 | #define ADC_CHANNEL_9 ((uint32_t)(ADC_SQR3_SQ10_3 | ADC_SQR3_SQ10_0)) /*!< ADC channel 9 */ |
| elmot | 1:d0dfbce63a89 | 388 | #define ADC_CHANNEL_10 ((uint32_t)(ADC_SQR3_SQ10_3 | ADC_SQR3_SQ10_1)) /*!< ADC channel 10 */ |
| elmot | 1:d0dfbce63a89 | 389 | #define ADC_CHANNEL_11 ((uint32_t)(ADC_SQR3_SQ10_3 | ADC_SQR3_SQ10_1 | ADC_SQR3_SQ10_0)) /*!< ADC channel 11 */ |
| elmot | 1:d0dfbce63a89 | 390 | #define ADC_CHANNEL_12 ((uint32_t)(ADC_SQR3_SQ10_3 | ADC_SQR3_SQ10_2)) /*!< ADC channel 12 */ |
| elmot | 1:d0dfbce63a89 | 391 | #define ADC_CHANNEL_13 ((uint32_t)(ADC_SQR3_SQ10_3 | ADC_SQR3_SQ10_2 | ADC_SQR3_SQ10_0)) /*!< ADC channel 13 */ |
| elmot | 1:d0dfbce63a89 | 392 | #define ADC_CHANNEL_14 ((uint32_t)(ADC_SQR3_SQ10_3 | ADC_SQR3_SQ10_2 | ADC_SQR3_SQ10_1)) /*!< ADC channel 14 */ |
| elmot | 1:d0dfbce63a89 | 393 | #define ADC_CHANNEL_15 ((uint32_t)(ADC_SQR3_SQ10_3 | ADC_SQR3_SQ10_2 | ADC_SQR3_SQ10_1 | ADC_SQR3_SQ10_0)) /*!< ADC channel 15 */ |
| elmot | 1:d0dfbce63a89 | 394 | #define ADC_CHANNEL_16 ((uint32_t)(ADC_SQR3_SQ10_4)) /*!< ADC channel 16 */ |
| elmot | 1:d0dfbce63a89 | 395 | #define ADC_CHANNEL_17 ((uint32_t)(ADC_SQR3_SQ10_4 | ADC_SQR3_SQ10_0)) /*!< ADC channel 17 */ |
| elmot | 1:d0dfbce63a89 | 396 | #define ADC_CHANNEL_18 ((uint32_t)(ADC_SQR3_SQ10_4 | ADC_SQR3_SQ10_1)) /*!< ADC channel 18 */ |
| elmot | 1:d0dfbce63a89 | 397 | |
| elmot | 1:d0dfbce63a89 | 398 | /* Note: VrefInt, TempSensor and Vbat internal channels are not available on all ADC's |
| elmot | 1:d0dfbce63a89 | 399 | (information present in Reference Manual) */ |
| elmot | 1:d0dfbce63a89 | 400 | #define ADC_CHANNEL_TEMPSENSOR ADC_CHANNEL_17 /*!< ADC temperature sensor channel */ |
| elmot | 1:d0dfbce63a89 | 401 | #define ADC_CHANNEL_VBAT ADC_CHANNEL_18 /*!< ADC Vbat channel */ |
| elmot | 1:d0dfbce63a89 | 402 | #define ADC_CHANNEL_VREFINT ADC_CHANNEL_0 /*!< ADC Vrefint channel */ |
| elmot | 1:d0dfbce63a89 | 403 | /** |
| elmot | 1:d0dfbce63a89 | 404 | * @} |
| elmot | 1:d0dfbce63a89 | 405 | */ |
| elmot | 1:d0dfbce63a89 | 406 | |
| elmot | 1:d0dfbce63a89 | 407 | |
| elmot | 1:d0dfbce63a89 | 408 | |
| elmot | 1:d0dfbce63a89 | 409 | /** |
| elmot | 1:d0dfbce63a89 | 410 | * @} |
| elmot | 1:d0dfbce63a89 | 411 | */ |
| elmot | 1:d0dfbce63a89 | 412 | |
| elmot | 1:d0dfbce63a89 | 413 | /* Private macros ------------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 414 | |
| elmot | 1:d0dfbce63a89 | 415 | /** @defgroup ADC_Private_Macro ADC Private Macros |
| elmot | 1:d0dfbce63a89 | 416 | * @{ |
| elmot | 1:d0dfbce63a89 | 417 | */ |
| elmot | 1:d0dfbce63a89 | 418 | |
| elmot | 1:d0dfbce63a89 | 419 | /** |
| elmot | 1:d0dfbce63a89 | 420 | * @brief Test if conversion trigger of regular group is software start |
| elmot | 1:d0dfbce63a89 | 421 | * or external trigger. |
| elmot | 1:d0dfbce63a89 | 422 | * @param __HANDLE__: ADC handle. |
| elmot | 1:d0dfbce63a89 | 423 | * @retval SET (software start) or RESET (external trigger) |
| elmot | 1:d0dfbce63a89 | 424 | */ |
| elmot | 1:d0dfbce63a89 | 425 | #define ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__) \ |
| elmot | 1:d0dfbce63a89 | 426 | (((__HANDLE__)->Instance->CFGR & ADC_CFGR_EXTEN) == RESET) |
| elmot | 1:d0dfbce63a89 | 427 | |
| elmot | 1:d0dfbce63a89 | 428 | /** |
| elmot | 1:d0dfbce63a89 | 429 | * @brief Return resolution bits in CFGR register RES[1:0] field. |
| elmot | 1:d0dfbce63a89 | 430 | * @param __HANDLE__: ADC handle. |
| elmot | 1:d0dfbce63a89 | 431 | * @retval 2-bit field RES of CFGR register. |
| elmot | 1:d0dfbce63a89 | 432 | */ |
| elmot | 1:d0dfbce63a89 | 433 | #define ADC_GET_RESOLUTION(__HANDLE__) (((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES) |
| elmot | 1:d0dfbce63a89 | 434 | |
| elmot | 1:d0dfbce63a89 | 435 | /** |
| elmot | 1:d0dfbce63a89 | 436 | * @brief Clear ADC error code (set it to no error code "HAL_ADC_ERROR_NONE"). |
| elmot | 1:d0dfbce63a89 | 437 | * @param __HANDLE__: ADC handle. |
| elmot | 1:d0dfbce63a89 | 438 | * @retval None |
| elmot | 1:d0dfbce63a89 | 439 | */ |
| elmot | 1:d0dfbce63a89 | 440 | #define ADC_CLEAR_ERRORCODE(__HANDLE__) ((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE) |
| elmot | 1:d0dfbce63a89 | 441 | |
| elmot | 1:d0dfbce63a89 | 442 | /** |
| elmot | 1:d0dfbce63a89 | 443 | * @brief Verification of ADC state: enabled or disabled. |
| elmot | 1:d0dfbce63a89 | 444 | * @param __HANDLE__: ADC handle. |
| elmot | 1:d0dfbce63a89 | 445 | * @retval SET (ADC enabled) or RESET (ADC disabled) |
| elmot | 1:d0dfbce63a89 | 446 | */ |
| elmot | 1:d0dfbce63a89 | 447 | #define ADC_IS_ENABLE(__HANDLE__) \ |
| elmot | 1:d0dfbce63a89 | 448 | (( ((((__HANDLE__)->Instance->CR) & (ADC_CR_ADEN | ADC_CR_ADDIS)) == ADC_CR_ADEN) && \ |
| elmot | 1:d0dfbce63a89 | 449 | ((((__HANDLE__)->Instance->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY) \ |
| elmot | 1:d0dfbce63a89 | 450 | ) ? SET : RESET) |
| elmot | 1:d0dfbce63a89 | 451 | |
| elmot | 1:d0dfbce63a89 | 452 | |
| elmot | 1:d0dfbce63a89 | 453 | /** |
| elmot | 1:d0dfbce63a89 | 454 | * @brief Check if conversion is on going on regular group. |
| elmot | 1:d0dfbce63a89 | 455 | * @param __HANDLE__: ADC handle. |
| elmot | 1:d0dfbce63a89 | 456 | * @retval SET (conversion is on going) or RESET (no conversion is on going) |
| elmot | 1:d0dfbce63a89 | 457 | */ |
| elmot | 1:d0dfbce63a89 | 458 | #define ADC_IS_CONVERSION_ONGOING_REGULAR(__HANDLE__) \ |
| elmot | 1:d0dfbce63a89 | 459 | (( (((__HANDLE__)->Instance->CR) & ADC_CR_ADSTART) == RESET \ |
| elmot | 1:d0dfbce63a89 | 460 | ) ? RESET : SET) |
| elmot | 1:d0dfbce63a89 | 461 | |
| elmot | 1:d0dfbce63a89 | 462 | |
| elmot | 1:d0dfbce63a89 | 463 | /** |
| elmot | 1:d0dfbce63a89 | 464 | * @brief Simultaneously clear and set specific bits of the handle State. |
| elmot | 1:d0dfbce63a89 | 465 | * @note ADC_STATE_CLR_SET() macro is merely aliased to generic macro MODIFY_REG(), |
| elmot | 1:d0dfbce63a89 | 466 | * the first parameter is the ADC handle State, the second parameter is the |
| elmot | 1:d0dfbce63a89 | 467 | * bit field to clear, the third and last parameter is the bit field to set. |
| elmot | 1:d0dfbce63a89 | 468 | * @retval None |
| elmot | 1:d0dfbce63a89 | 469 | */ |
| elmot | 1:d0dfbce63a89 | 470 | #define ADC_STATE_CLR_SET MODIFY_REG |
| elmot | 1:d0dfbce63a89 | 471 | |
| elmot | 1:d0dfbce63a89 | 472 | /** |
| elmot | 1:d0dfbce63a89 | 473 | * @brief Verify that a given value is aligned with the ADC resolution range. |
| elmot | 1:d0dfbce63a89 | 474 | * @param __RESOLUTION__: ADC resolution (12, 10, 8 or 6 bits). |
| elmot | 1:d0dfbce63a89 | 475 | * @param __ADC_VALUE__: value checked against the resolution. |
| elmot | 1:d0dfbce63a89 | 476 | * @retval SET (__ADC_VALUE__ in line with __RESOLUTION__) or RESET (__ADC_VALUE__ not in line with __RESOLUTION__) |
| elmot | 1:d0dfbce63a89 | 477 | */ |
| elmot | 1:d0dfbce63a89 | 478 | #define IS_ADC_RANGE(__RESOLUTION__, __ADC_VALUE__) \ |
| elmot | 1:d0dfbce63a89 | 479 | ((((__RESOLUTION__) == ADC_RESOLUTION_12B) && ((__ADC_VALUE__) <= ((uint32_t)0x0FFF))) || \ |
| elmot | 1:d0dfbce63a89 | 480 | (((__RESOLUTION__) == ADC_RESOLUTION_10B) && ((__ADC_VALUE__) <= ((uint32_t)0x03FF))) || \ |
| elmot | 1:d0dfbce63a89 | 481 | (((__RESOLUTION__) == ADC_RESOLUTION_8B) && ((__ADC_VALUE__) <= ((uint32_t)0x00FF))) || \ |
| elmot | 1:d0dfbce63a89 | 482 | (((__RESOLUTION__) == ADC_RESOLUTION_6B) && ((__ADC_VALUE__) <= ((uint32_t)0x003F))) ) |
| elmot | 1:d0dfbce63a89 | 483 | |
| elmot | 1:d0dfbce63a89 | 484 | |
| elmot | 1:d0dfbce63a89 | 485 | /** |
| elmot | 1:d0dfbce63a89 | 486 | * @brief Verify the length of the scheduled regular conversions group. |
| elmot | 1:d0dfbce63a89 | 487 | * @param __LENGTH__: number of programmed conversions. |
| elmot | 1:d0dfbce63a89 | 488 | * @retval SET (__LENGTH__ is within the maximum number of possible programmable regular conversions) or RESET (__LENGTH__ is null or too large) |
| elmot | 1:d0dfbce63a89 | 489 | */ |
| elmot | 1:d0dfbce63a89 | 490 | #define IS_ADC_REGULAR_NB_CONV(__LENGTH__) (((__LENGTH__) >= ((uint32_t)1)) && ((__LENGTH__) <= ((uint32_t)16))) |
| elmot | 1:d0dfbce63a89 | 491 | |
| elmot | 1:d0dfbce63a89 | 492 | |
| elmot | 1:d0dfbce63a89 | 493 | /** |
| elmot | 1:d0dfbce63a89 | 494 | * @brief Verify the number of scheduled regular conversions in discontinuous mode. |
| elmot | 1:d0dfbce63a89 | 495 | * @param NUMBER: number of scheduled regular conversions in discontinuous mode. |
| elmot | 1:d0dfbce63a89 | 496 | * @retval SET (NUMBER is within the maximum number of regular conversions in discontinous mode) or RESET (NUMBER is null or too large) |
| elmot | 1:d0dfbce63a89 | 497 | */ |
| elmot | 1:d0dfbce63a89 | 498 | #define IS_ADC_REGULAR_DISCONT_NUMBER(NUMBER) (((NUMBER) >= ((uint32_t)1)) && ((NUMBER) <= ((uint32_t)8))) |
| elmot | 1:d0dfbce63a89 | 499 | |
| elmot | 1:d0dfbce63a89 | 500 | |
| elmot | 1:d0dfbce63a89 | 501 | /** |
| elmot | 1:d0dfbce63a89 | 502 | * @brief Verify the ADC clock setting. |
| elmot | 1:d0dfbce63a89 | 503 | * @param __ADC_CLOCK__: programmed ADC clock. |
| elmot | 1:d0dfbce63a89 | 504 | * @retval SET (__ADC_CLOCK__ is a valid value) or RESET (__ADC_CLOCK__ is invalid) |
| elmot | 1:d0dfbce63a89 | 505 | */ |
| elmot | 1:d0dfbce63a89 | 506 | #define IS_ADC_CLOCKPRESCALER(__ADC_CLOCK__) (((__ADC_CLOCK__) == ADC_CLOCK_SYNC_PCLK_DIV1) || \ |
| elmot | 1:d0dfbce63a89 | 507 | ((__ADC_CLOCK__) == ADC_CLOCK_SYNC_PCLK_DIV2) || \ |
| elmot | 1:d0dfbce63a89 | 508 | ((__ADC_CLOCK__) == ADC_CLOCK_SYNC_PCLK_DIV4) || \ |
| elmot | 1:d0dfbce63a89 | 509 | ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV1) || \ |
| elmot | 1:d0dfbce63a89 | 510 | ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV2) || \ |
| elmot | 1:d0dfbce63a89 | 511 | ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV4) || \ |
| elmot | 1:d0dfbce63a89 | 512 | ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV6) || \ |
| elmot | 1:d0dfbce63a89 | 513 | ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV8) || \ |
| elmot | 1:d0dfbce63a89 | 514 | ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV10) || \ |
| elmot | 1:d0dfbce63a89 | 515 | ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV12) || \ |
| elmot | 1:d0dfbce63a89 | 516 | ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV16) || \ |
| elmot | 1:d0dfbce63a89 | 517 | ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV32) || \ |
| elmot | 1:d0dfbce63a89 | 518 | ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV64) || \ |
| elmot | 1:d0dfbce63a89 | 519 | ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV128) || \ |
| elmot | 1:d0dfbce63a89 | 520 | ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV256) ) |
| elmot | 1:d0dfbce63a89 | 521 | |
| elmot | 1:d0dfbce63a89 | 522 | |
| elmot | 1:d0dfbce63a89 | 523 | /** |
| elmot | 1:d0dfbce63a89 | 524 | * @brief Verify the ADC resolution setting. |
| elmot | 1:d0dfbce63a89 | 525 | * @param __RESOLUTION__: programmed ADC resolution. |
| elmot | 1:d0dfbce63a89 | 526 | * @retval SET (__RESOLUTION__ is a valid value) or RESET (__RESOLUTION__ is invalid) |
| elmot | 1:d0dfbce63a89 | 527 | */ |
| elmot | 1:d0dfbce63a89 | 528 | #define IS_ADC_RESOLUTION(__RESOLUTION__) (((__RESOLUTION__) == ADC_RESOLUTION_12B) || \ |
| elmot | 1:d0dfbce63a89 | 529 | ((__RESOLUTION__) == ADC_RESOLUTION_10B) || \ |
| elmot | 1:d0dfbce63a89 | 530 | ((__RESOLUTION__) == ADC_RESOLUTION_8B) || \ |
| elmot | 1:d0dfbce63a89 | 531 | ((__RESOLUTION__) == ADC_RESOLUTION_6B) ) |
| elmot | 1:d0dfbce63a89 | 532 | |
| elmot | 1:d0dfbce63a89 | 533 | /** |
| elmot | 1:d0dfbce63a89 | 534 | * @brief Verify the ADC resolution setting when limited to 6 or 8 bits. |
| elmot | 1:d0dfbce63a89 | 535 | * @param __RESOLUTION__: programmed ADC resolution when limited to 6 or 8 bits. |
| elmot | 1:d0dfbce63a89 | 536 | * @retval SET (__RESOLUTION__ is a valid value) or RESET (__RESOLUTION__ is invalid) |
| elmot | 1:d0dfbce63a89 | 537 | */ |
| elmot | 1:d0dfbce63a89 | 538 | #define IS_ADC_RESOLUTION_8_6_BITS(__RESOLUTION__) (((__RESOLUTION__) == ADC_RESOLUTION_8B) || \ |
| elmot | 1:d0dfbce63a89 | 539 | ((__RESOLUTION__) == ADC_RESOLUTION_6B) ) |
| elmot | 1:d0dfbce63a89 | 540 | |
| elmot | 1:d0dfbce63a89 | 541 | /** |
| elmot | 1:d0dfbce63a89 | 542 | * @brief Verify the ADC converted data alignment. |
| elmot | 1:d0dfbce63a89 | 543 | * @param __ALIGN__: programmed ADC converted data alignment. |
| elmot | 1:d0dfbce63a89 | 544 | * @retval SET (__ALIGN__ is a valid value) or RESET (__ALIGN__ is invalid) |
| elmot | 1:d0dfbce63a89 | 545 | */ |
| elmot | 1:d0dfbce63a89 | 546 | #define IS_ADC_DATA_ALIGN(__ALIGN__) (((__ALIGN__) == ADC_DATAALIGN_RIGHT) || \ |
| elmot | 1:d0dfbce63a89 | 547 | ((__ALIGN__) == ADC_DATAALIGN_LEFT) ) |
| elmot | 1:d0dfbce63a89 | 548 | |
| elmot | 1:d0dfbce63a89 | 549 | |
| elmot | 1:d0dfbce63a89 | 550 | /** |
| elmot | 1:d0dfbce63a89 | 551 | * @brief Verify the ADC scan mode. |
| elmot | 1:d0dfbce63a89 | 552 | * @param __SCAN_MODE__: programmed ADC scan mode. |
| elmot | 1:d0dfbce63a89 | 553 | * @retval SET (__SCAN_MODE__ is valid) or RESET (__SCAN_MODE__ is invalid) |
| elmot | 1:d0dfbce63a89 | 554 | */ |
| elmot | 1:d0dfbce63a89 | 555 | #define IS_ADC_SCAN_MODE(__SCAN_MODE__) (((__SCAN_MODE__) == ADC_SCAN_DISABLE) || \ |
| elmot | 1:d0dfbce63a89 | 556 | ((__SCAN_MODE__) == ADC_SCAN_ENABLE) ) |
| elmot | 1:d0dfbce63a89 | 557 | |
| elmot | 1:d0dfbce63a89 | 558 | /** |
| elmot | 1:d0dfbce63a89 | 559 | * @brief Verify the ADC edge trigger setting for regular group. |
| elmot | 1:d0dfbce63a89 | 560 | * @param __EDGE__: programmed ADC edge trigger setting. |
| elmot | 1:d0dfbce63a89 | 561 | * @retval SET (__EDGE__ is a valid value) or RESET (__EDGE__ is invalid) |
| elmot | 1:d0dfbce63a89 | 562 | */ |
| elmot | 1:d0dfbce63a89 | 563 | #define IS_ADC_EXTTRIG_EDGE(__EDGE__) (((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_NONE) || \ |
| elmot | 1:d0dfbce63a89 | 564 | ((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_RISING) || \ |
| elmot | 1:d0dfbce63a89 | 565 | ((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_FALLING) || \ |
| elmot | 1:d0dfbce63a89 | 566 | ((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING) ) |
| elmot | 1:d0dfbce63a89 | 567 | |
| elmot | 1:d0dfbce63a89 | 568 | |
| elmot | 1:d0dfbce63a89 | 569 | |
| elmot | 1:d0dfbce63a89 | 570 | /** |
| elmot | 1:d0dfbce63a89 | 571 | * @brief Verify the ADC regular conversions external trigger. |
| elmot | 1:d0dfbce63a89 | 572 | * @param __REGTRIG__: programmed ADC regular conversions external trigger. |
| elmot | 1:d0dfbce63a89 | 573 | * @retval SET (__REGTRIG__ is a valid value) or RESET (__REGTRIG__ is invalid) |
| elmot | 1:d0dfbce63a89 | 574 | */ |
| elmot | 1:d0dfbce63a89 | 575 | #define IS_ADC_EXTTRIG(__REGTRIG__) (((__REGTRIG__) == ADC_EXTERNALTRIG_T1_CC1) || \ |
| elmot | 1:d0dfbce63a89 | 576 | ((__REGTRIG__) == ADC_EXTERNALTRIG_T1_CC2) || \ |
| elmot | 1:d0dfbce63a89 | 577 | ((__REGTRIG__) == ADC_EXTERNALTRIG_T1_CC3) || \ |
| elmot | 1:d0dfbce63a89 | 578 | ((__REGTRIG__) == ADC_EXTERNALTRIG_T2_CC2) || \ |
| elmot | 1:d0dfbce63a89 | 579 | ((__REGTRIG__) == ADC_EXTERNALTRIG_T3_TRGO) || \ |
| elmot | 1:d0dfbce63a89 | 580 | ((__REGTRIG__) == ADC_EXTERNALTRIG_T4_CC4) || \ |
| elmot | 1:d0dfbce63a89 | 581 | ((__REGTRIG__) == ADC_EXTERNALTRIG_EXT_IT11) || \ |
| elmot | 1:d0dfbce63a89 | 582 | ((__REGTRIG__) == ADC_EXTERNALTRIG_T8_TRGO) || \ |
| elmot | 1:d0dfbce63a89 | 583 | ((__REGTRIG__) == ADC_EXTERNALTRIG_T8_TRGO2) || \ |
| elmot | 1:d0dfbce63a89 | 584 | ((__REGTRIG__) == ADC_EXTERNALTRIG_T1_TRGO) || \ |
| elmot | 1:d0dfbce63a89 | 585 | ((__REGTRIG__) == ADC_EXTERNALTRIG_T1_TRGO2) || \ |
| elmot | 1:d0dfbce63a89 | 586 | ((__REGTRIG__) == ADC_EXTERNALTRIG_T2_TRGO) || \ |
| elmot | 1:d0dfbce63a89 | 587 | ((__REGTRIG__) == ADC_EXTERNALTRIG_T4_TRGO) || \ |
| elmot | 1:d0dfbce63a89 | 588 | ((__REGTRIG__) == ADC_EXTERNALTRIG_T6_TRGO) || \ |
| elmot | 1:d0dfbce63a89 | 589 | ((__REGTRIG__) == ADC_EXTERNALTRIG_T15_TRGO) || \ |
| elmot | 1:d0dfbce63a89 | 590 | ((__REGTRIG__) == ADC_EXTERNALTRIG_T3_CC4) || \ |
| elmot | 1:d0dfbce63a89 | 591 | \ |
| elmot | 1:d0dfbce63a89 | 592 | ((__REGTRIG__) == ADC_SOFTWARE_START) ) |
| elmot | 1:d0dfbce63a89 | 593 | |
| elmot | 1:d0dfbce63a89 | 594 | |
| elmot | 1:d0dfbce63a89 | 595 | |
| elmot | 1:d0dfbce63a89 | 596 | /** |
| elmot | 1:d0dfbce63a89 | 597 | * @brief Verify the ADC regular conversions check for converted data availability. |
| elmot | 1:d0dfbce63a89 | 598 | * @param __EOC_SELECTION__: converted data availability check. |
| elmot | 1:d0dfbce63a89 | 599 | * @retval SET (__EOC_SELECTION__ is a valid value) or RESET (__EOC_SELECTION__ is invalid) |
| elmot | 1:d0dfbce63a89 | 600 | */ |
| elmot | 1:d0dfbce63a89 | 601 | #define IS_ADC_EOC_SELECTION(__EOC_SELECTION__) (((__EOC_SELECTION__) == ADC_EOC_SINGLE_CONV) || \ |
| elmot | 1:d0dfbce63a89 | 602 | ((__EOC_SELECTION__) == ADC_EOC_SEQ_CONV) || \ |
| elmot | 1:d0dfbce63a89 | 603 | ((__EOC_SELECTION__) == ADC_EOC_SINGLE_SEQ_CONV) ) |
| elmot | 1:d0dfbce63a89 | 604 | |
| elmot | 1:d0dfbce63a89 | 605 | /** |
| elmot | 1:d0dfbce63a89 | 606 | * @brief Verify the ADC regular conversions overrun handling. |
| elmot | 1:d0dfbce63a89 | 607 | * @param __OVR__: ADC regular conversions overrun handling. |
| elmot | 1:d0dfbce63a89 | 608 | * @retval SET (__OVR__ is a valid value) or RESET (__OVR__ is invalid) |
| elmot | 1:d0dfbce63a89 | 609 | */ |
| elmot | 1:d0dfbce63a89 | 610 | #define IS_ADC_OVERRUN(__OVR__) (((__OVR__) == ADC_OVR_DATA_PRESERVED) || \ |
| elmot | 1:d0dfbce63a89 | 611 | ((__OVR__) == ADC_OVR_DATA_OVERWRITTEN) ) |
| elmot | 1:d0dfbce63a89 | 612 | |
| elmot | 1:d0dfbce63a89 | 613 | /** |
| elmot | 1:d0dfbce63a89 | 614 | * @brief Verify the ADC conversions sampling time. |
| elmot | 1:d0dfbce63a89 | 615 | * @param __TIME__: ADC conversions sampling time. |
| elmot | 1:d0dfbce63a89 | 616 | * @retval SET (__TIME__ is a valid value) or RESET (__TIME__ is invalid) |
| elmot | 1:d0dfbce63a89 | 617 | */ |
| elmot | 1:d0dfbce63a89 | 618 | #if defined (ADC_SMPR1_SMPPLUS) |
| elmot | 1:d0dfbce63a89 | 619 | #define IS_ADC_SAMPLE_TIME(__TIME__) (((__TIME__) == ADC_SAMPLETIME_2CYCLES_5) || \ |
| elmot | 1:d0dfbce63a89 | 620 | ((__TIME__) == ADC_SAMPLETIME_3CYCLES_5) || \ |
| elmot | 1:d0dfbce63a89 | 621 | ((__TIME__) == ADC_SAMPLETIME_6CYCLES_5) || \ |
| elmot | 1:d0dfbce63a89 | 622 | ((__TIME__) == ADC_SAMPLETIME_12CYCLES_5) || \ |
| elmot | 1:d0dfbce63a89 | 623 | ((__TIME__) == ADC_SAMPLETIME_24CYCLES_5) || \ |
| elmot | 1:d0dfbce63a89 | 624 | ((__TIME__) == ADC_SAMPLETIME_47CYCLES_5) || \ |
| elmot | 1:d0dfbce63a89 | 625 | ((__TIME__) == ADC_SAMPLETIME_92CYCLES_5) || \ |
| elmot | 1:d0dfbce63a89 | 626 | ((__TIME__) == ADC_SAMPLETIME_247CYCLES_5) || \ |
| elmot | 1:d0dfbce63a89 | 627 | ((__TIME__) == ADC_SAMPLETIME_640CYCLES_5) ) |
| elmot | 1:d0dfbce63a89 | 628 | #else |
| elmot | 1:d0dfbce63a89 | 629 | #define IS_ADC_SAMPLE_TIME(__TIME__) (((__TIME__) == ADC_SAMPLETIME_2CYCLES_5) || \ |
| elmot | 1:d0dfbce63a89 | 630 | ((__TIME__) == ADC_SAMPLETIME_6CYCLES_5) || \ |
| elmot | 1:d0dfbce63a89 | 631 | ((__TIME__) == ADC_SAMPLETIME_12CYCLES_5) || \ |
| elmot | 1:d0dfbce63a89 | 632 | ((__TIME__) == ADC_SAMPLETIME_24CYCLES_5) || \ |
| elmot | 1:d0dfbce63a89 | 633 | ((__TIME__) == ADC_SAMPLETIME_47CYCLES_5) || \ |
| elmot | 1:d0dfbce63a89 | 634 | ((__TIME__) == ADC_SAMPLETIME_92CYCLES_5) || \ |
| elmot | 1:d0dfbce63a89 | 635 | ((__TIME__) == ADC_SAMPLETIME_247CYCLES_5) || \ |
| elmot | 1:d0dfbce63a89 | 636 | ((__TIME__) == ADC_SAMPLETIME_640CYCLES_5) ) |
| elmot | 1:d0dfbce63a89 | 637 | #endif |
| elmot | 1:d0dfbce63a89 | 638 | /** |
| elmot | 1:d0dfbce63a89 | 639 | * @} |
| elmot | 1:d0dfbce63a89 | 640 | */ |
| elmot | 1:d0dfbce63a89 | 641 | |
| elmot | 1:d0dfbce63a89 | 642 | |
| elmot | 1:d0dfbce63a89 | 643 | /* Private constants ---------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 644 | |
| elmot | 1:d0dfbce63a89 | 645 | /** @defgroup ADC_Private_Constants ADC Private Constants |
| elmot | 1:d0dfbce63a89 | 646 | * @{ |
| elmot | 1:d0dfbce63a89 | 647 | */ |
| elmot | 1:d0dfbce63a89 | 648 | |
| elmot | 1:d0dfbce63a89 | 649 | /* Fixed timeout values for ADC conversion (including sampling time) */ |
| elmot | 1:d0dfbce63a89 | 650 | /* Maximum sampling time is 640.5 ADC clock cycle (SMPx[2:0] = 0b111 */ |
| elmot | 1:d0dfbce63a89 | 651 | /* Maximum conversion time is 12.5 + Maximum sampling time */ |
| elmot | 1:d0dfbce63a89 | 652 | /* or 12.5 + 640.5 = 653 ADC clock cycles */ |
| elmot | 1:d0dfbce63a89 | 653 | /* Minimum ADC Clock frequency is 0.14 MHz */ |
| elmot | 1:d0dfbce63a89 | 654 | /* Maximum conversion time is */ |
| elmot | 1:d0dfbce63a89 | 655 | /* 653 / 0.14 MHz = 4.66 ms */ |
| elmot | 1:d0dfbce63a89 | 656 | #define ADC_STOP_CONVERSION_TIMEOUT ((uint32_t) 5) /*!< ADC stop time-out value */ |
| elmot | 1:d0dfbce63a89 | 657 | |
| elmot | 1:d0dfbce63a89 | 658 | /* Delay for temperature sensor stabilization time. */ |
| elmot | 1:d0dfbce63a89 | 659 | /* Maximum delay is 120us (refer device datasheet, parameter tSTART). */ |
| elmot | 1:d0dfbce63a89 | 660 | /* Unit: us */ |
| elmot | 1:d0dfbce63a89 | 661 | #define ADC_TEMPSENSOR_DELAY_US ((uint32_t) 120) |
| elmot | 1:d0dfbce63a89 | 662 | |
| elmot | 1:d0dfbce63a89 | 663 | /** |
| elmot | 1:d0dfbce63a89 | 664 | * @} |
| elmot | 1:d0dfbce63a89 | 665 | */ |
| elmot | 1:d0dfbce63a89 | 666 | |
| elmot | 1:d0dfbce63a89 | 667 | /* Exported macros -----------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 668 | |
| elmot | 1:d0dfbce63a89 | 669 | /** @defgroup ADC_Exported_Macro ADC Exported Macros |
| elmot | 1:d0dfbce63a89 | 670 | * @{ |
| elmot | 1:d0dfbce63a89 | 671 | */ |
| elmot | 1:d0dfbce63a89 | 672 | |
| elmot | 1:d0dfbce63a89 | 673 | /** @brief Reset ADC handle state. |
| elmot | 1:d0dfbce63a89 | 674 | * @param __HANDLE__: ADC handle. |
| elmot | 1:d0dfbce63a89 | 675 | * @retval None |
| elmot | 1:d0dfbce63a89 | 676 | */ |
| elmot | 1:d0dfbce63a89 | 677 | #define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET) |
| elmot | 1:d0dfbce63a89 | 678 | |
| elmot | 1:d0dfbce63a89 | 679 | |
| elmot | 1:d0dfbce63a89 | 680 | /** @brief Check whether the specified ADC interrupt source is enabled or not. |
| elmot | 1:d0dfbce63a89 | 681 | * @param __HANDLE__: ADC handle. |
| elmot | 1:d0dfbce63a89 | 682 | * @param __INTERRUPT__: ADC interrupt source to check |
| elmot | 1:d0dfbce63a89 | 683 | * This parameter can be one of the following values: |
| elmot | 1:d0dfbce63a89 | 684 | * @arg @ref ADC_IT_RDY, ADC Ready (ADRDY) interrupt source |
| elmot | 1:d0dfbce63a89 | 685 | * @arg @ref ADC_IT_EOSMP, ADC End of Sampling interrupt source |
| elmot | 1:d0dfbce63a89 | 686 | * @arg @ref ADC_IT_EOC, ADC End of Regular Conversion interrupt source |
| elmot | 1:d0dfbce63a89 | 687 | * @arg @ref ADC_IT_EOS, ADC End of Regular sequence of Conversions interrupt source |
| elmot | 1:d0dfbce63a89 | 688 | * @arg @ref ADC_IT_OVR, ADC overrun interrupt source |
| elmot | 1:d0dfbce63a89 | 689 | * @arg @ref ADC_IT_JEOC, ADC End of Injected Conversion interrupt source |
| elmot | 1:d0dfbce63a89 | 690 | * @arg @ref ADC_IT_JEOS, ADC End of Injected sequence of Conversions interrupt source |
| elmot | 1:d0dfbce63a89 | 691 | * @arg @ref ADC_IT_AWD1, ADC Analog watchdog 1 interrupt source (main analog watchdog) |
| elmot | 1:d0dfbce63a89 | 692 | * @arg @ref ADC_IT_AWD2, ADC Analog watchdog 2 interrupt source (additional analog watchdog) |
| elmot | 1:d0dfbce63a89 | 693 | * @arg @ref ADC_IT_AWD3, ADC Analog watchdog 3 interrupt source (additional analog watchdog) |
| elmot | 1:d0dfbce63a89 | 694 | * @arg @ref ADC_IT_JQOVF, ADC Injected Context Queue Overflow interrupt source. |
| elmot | 1:d0dfbce63a89 | 695 | * @retval State of interruption (SET or RESET) |
| elmot | 1:d0dfbce63a89 | 696 | */ |
| elmot | 1:d0dfbce63a89 | 697 | #define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ |
| elmot | 1:d0dfbce63a89 | 698 | (( ((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__) \ |
| elmot | 1:d0dfbce63a89 | 699 | )? SET : RESET \ |
| elmot | 1:d0dfbce63a89 | 700 | ) |
| elmot | 1:d0dfbce63a89 | 701 | |
| elmot | 1:d0dfbce63a89 | 702 | /** |
| elmot | 1:d0dfbce63a89 | 703 | * @brief Enable an ADC interrupt. |
| elmot | 1:d0dfbce63a89 | 704 | * @param __HANDLE__: ADC handle. |
| elmot | 1:d0dfbce63a89 | 705 | * @param __INTERRUPT__: ADC Interrupt to enable |
| elmot | 1:d0dfbce63a89 | 706 | * This parameter can be one of the following values: |
| elmot | 1:d0dfbce63a89 | 707 | * @arg @ref ADC_IT_RDY, ADC Ready (ADRDY) interrupt source |
| elmot | 1:d0dfbce63a89 | 708 | * @arg @ref ADC_IT_EOSMP, ADC End of Sampling interrupt source |
| elmot | 1:d0dfbce63a89 | 709 | * @arg @ref ADC_IT_EOC, ADC End of Regular Conversion interrupt source |
| elmot | 1:d0dfbce63a89 | 710 | * @arg @ref ADC_IT_EOS, ADC End of Regular sequence of Conversions interrupt source |
| elmot | 1:d0dfbce63a89 | 711 | * @arg @ref ADC_IT_OVR, ADC overrun interrupt source |
| elmot | 1:d0dfbce63a89 | 712 | * @arg @ref ADC_IT_JEOC, ADC End of Injected Conversion interrupt source |
| elmot | 1:d0dfbce63a89 | 713 | * @arg @ref ADC_IT_JEOS, ADC End of Injected sequence of Conversions interrupt source |
| elmot | 1:d0dfbce63a89 | 714 | * @arg @ref ADC_IT_AWD1, ADC Analog watchdog 1 interrupt source (main analog watchdog) |
| elmot | 1:d0dfbce63a89 | 715 | * @arg @ref ADC_IT_AWD2, ADC Analog watchdog 2 interrupt source (additional analog watchdog) |
| elmot | 1:d0dfbce63a89 | 716 | * @arg @ref ADC_IT_AWD3, ADC Analog watchdog 3 interrupt source (additional analog watchdog) |
| elmot | 1:d0dfbce63a89 | 717 | * @arg @ref ADC_IT_JQOVF, ADC Injected Context Queue Overflow interrupt source. |
| elmot | 1:d0dfbce63a89 | 718 | * @retval None |
| elmot | 1:d0dfbce63a89 | 719 | */ |
| elmot | 1:d0dfbce63a89 | 720 | #define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__)) |
| elmot | 1:d0dfbce63a89 | 721 | |
| elmot | 1:d0dfbce63a89 | 722 | /** |
| elmot | 1:d0dfbce63a89 | 723 | * @brief Disable an ADC interrupt. |
| elmot | 1:d0dfbce63a89 | 724 | * @param __HANDLE__: ADC handle. |
| elmot | 1:d0dfbce63a89 | 725 | * @param __INTERRUPT__: ADC Interrupt to disable |
| elmot | 1:d0dfbce63a89 | 726 | * @arg @ref ADC_IT_RDY, ADC Ready (ADRDY) interrupt source |
| elmot | 1:d0dfbce63a89 | 727 | * @arg @ref ADC_IT_EOSMP, ADC End of Sampling interrupt source |
| elmot | 1:d0dfbce63a89 | 728 | * @arg @ref ADC_IT_EOC, ADC End of Regular Conversion interrupt source |
| elmot | 1:d0dfbce63a89 | 729 | * @arg @ref ADC_IT_EOS, ADC End of Regular sequence of Conversions interrupt source |
| elmot | 1:d0dfbce63a89 | 730 | * @arg @ref ADC_IT_OVR, ADC overrun interrupt source |
| elmot | 1:d0dfbce63a89 | 731 | * @arg @ref ADC_IT_JEOC, ADC End of Injected Conversion interrupt source |
| elmot | 1:d0dfbce63a89 | 732 | * @arg @ref ADC_IT_JEOS, ADC End of Injected sequence of Conversions interrupt source |
| elmot | 1:d0dfbce63a89 | 733 | * @arg @ref ADC_IT_AWD1, ADC Analog watchdog 1 interrupt source (main analog watchdog) |
| elmot | 1:d0dfbce63a89 | 734 | * @arg @ref ADC_IT_AWD2, ADC Analog watchdog 2 interrupt source (additional analog watchdog) |
| elmot | 1:d0dfbce63a89 | 735 | * @arg @ref ADC_IT_AWD3, ADC Analog watchdog 3 interrupt source (additional analog watchdog) |
| elmot | 1:d0dfbce63a89 | 736 | * @arg @ref ADC_IT_JQOVF, ADC Injected Context Queue Overflow interrupt source. |
| elmot | 1:d0dfbce63a89 | 737 | * @retval None |
| elmot | 1:d0dfbce63a89 | 738 | */ |
| elmot | 1:d0dfbce63a89 | 739 | #define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__)) |
| elmot | 1:d0dfbce63a89 | 740 | |
| elmot | 1:d0dfbce63a89 | 741 | /** |
| elmot | 1:d0dfbce63a89 | 742 | * @brief Check whether the specified ADC flag is set or not. |
| elmot | 1:d0dfbce63a89 | 743 | * @param __HANDLE__: ADC handle. |
| elmot | 1:d0dfbce63a89 | 744 | * @param __FLAG__: ADC flag to check |
| elmot | 1:d0dfbce63a89 | 745 | * This parameter can be one of the following values: |
| elmot | 1:d0dfbce63a89 | 746 | * @arg @ref ADC_FLAG_RDY, ADC Ready (ADRDY) flag |
| elmot | 1:d0dfbce63a89 | 747 | * @arg @ref ADC_FLAG_EOSMP, ADC End of Sampling flag |
| elmot | 1:d0dfbce63a89 | 748 | * @arg @ref ADC_FLAG_EOC, ADC End of Regular Conversion flag |
| elmot | 1:d0dfbce63a89 | 749 | * @arg @ref ADC_FLAG_EOS, ADC End of Regular sequence of Conversions flag |
| elmot | 1:d0dfbce63a89 | 750 | * @arg @ref ADC_FLAG_OVR, ADC overrun flag |
| elmot | 1:d0dfbce63a89 | 751 | * @arg @ref ADC_FLAG_JEOC, ADC End of Injected Conversion flag |
| elmot | 1:d0dfbce63a89 | 752 | * @arg @ref ADC_FLAG_JEOS, ADC End of Injected sequence of Conversions flag |
| elmot | 1:d0dfbce63a89 | 753 | * @arg @ref ADC_FLAG_AWD1, ADC Analog watchdog 1 flag (main analog watchdog) |
| elmot | 1:d0dfbce63a89 | 754 | * @arg @ref ADC_FLAG_AWD2, ADC Analog watchdog 2 flag (additional analog watchdog) |
| elmot | 1:d0dfbce63a89 | 755 | * @arg @ref ADC_FLAG_AWD3, ADC Analog watchdog 3 flag (additional analog watchdog) |
| elmot | 1:d0dfbce63a89 | 756 | * @arg @ref ADC_FLAG_JQOVF, ADC Injected Context Queue Overflow flag. |
| elmot | 1:d0dfbce63a89 | 757 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| elmot | 1:d0dfbce63a89 | 758 | */ |
| elmot | 1:d0dfbce63a89 | 759 | #define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) |
| elmot | 1:d0dfbce63a89 | 760 | |
| elmot | 1:d0dfbce63a89 | 761 | /** |
| elmot | 1:d0dfbce63a89 | 762 | * @brief Clear a specified ADC flag. |
| elmot | 1:d0dfbce63a89 | 763 | * @param __HANDLE__: ADC handle. |
| elmot | 1:d0dfbce63a89 | 764 | * @param __FLAG__: ADC flag to clear |
| elmot | 1:d0dfbce63a89 | 765 | * This parameter can be one of the following values: |
| elmot | 1:d0dfbce63a89 | 766 | * @arg @ref ADC_FLAG_RDY, ADC Ready (ADRDY) flag |
| elmot | 1:d0dfbce63a89 | 767 | * @arg @ref ADC_FLAG_EOSMP, ADC End of Sampling flag |
| elmot | 1:d0dfbce63a89 | 768 | * @arg @ref ADC_FLAG_EOC, ADC End of Regular Conversion flag |
| elmot | 1:d0dfbce63a89 | 769 | * @arg @ref ADC_FLAG_EOS, ADC End of Regular sequence of Conversions flag |
| elmot | 1:d0dfbce63a89 | 770 | * @arg @ref ADC_FLAG_OVR, ADC overrun flag |
| elmot | 1:d0dfbce63a89 | 771 | * @arg @ref ADC_FLAG_JEOC, ADC End of Injected Conversion flag |
| elmot | 1:d0dfbce63a89 | 772 | * @arg @ref ADC_FLAG_JEOS, ADC End of Injected sequence of Conversions flag |
| elmot | 1:d0dfbce63a89 | 773 | * @arg @ref ADC_FLAG_AWD1, ADC Analog watchdog 1 flag (main analog watchdog) |
| elmot | 1:d0dfbce63a89 | 774 | * @arg @ref ADC_FLAG_AWD2, ADC Analog watchdog 2 flag (additional analog watchdog) |
| elmot | 1:d0dfbce63a89 | 775 | * @arg @ref ADC_FLAG_AWD3, ADC Analog watchdog 3 flag (additional analog watchdog) |
| elmot | 1:d0dfbce63a89 | 776 | * @arg @ref ADC_FLAG_JQOVF, ADC Injected Context Queue Overflow flag. |
| elmot | 1:d0dfbce63a89 | 777 | * @note Bit cleared bit by writing 1 (writing 0 has no effect on any bit of register ISR). |
| elmot | 1:d0dfbce63a89 | 778 | * @retval None |
| elmot | 1:d0dfbce63a89 | 779 | */ |
| elmot | 1:d0dfbce63a89 | 780 | #define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR) = (__FLAG__)) |
| elmot | 1:d0dfbce63a89 | 781 | |
| elmot | 1:d0dfbce63a89 | 782 | |
| elmot | 1:d0dfbce63a89 | 783 | /** |
| elmot | 1:d0dfbce63a89 | 784 | * @} |
| elmot | 1:d0dfbce63a89 | 785 | */ |
| elmot | 1:d0dfbce63a89 | 786 | |
| elmot | 1:d0dfbce63a89 | 787 | /* Include ADC HAL Extended module */ |
| elmot | 1:d0dfbce63a89 | 788 | #include "stm32l4xx_hal_adc_ex.h" |
| elmot | 1:d0dfbce63a89 | 789 | |
| elmot | 1:d0dfbce63a89 | 790 | /* Exported functions --------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 791 | /** @addtogroup ADC_Exported_Functions ADC Exported Functions |
| elmot | 1:d0dfbce63a89 | 792 | * @{ |
| elmot | 1:d0dfbce63a89 | 793 | */ |
| elmot | 1:d0dfbce63a89 | 794 | |
| elmot | 1:d0dfbce63a89 | 795 | /** @addtogroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions |
| elmot | 1:d0dfbce63a89 | 796 | * @brief Initialization and Configuration functions |
| elmot | 1:d0dfbce63a89 | 797 | * @{ |
| elmot | 1:d0dfbce63a89 | 798 | */ |
| elmot | 1:d0dfbce63a89 | 799 | /* Initialization and de-initialization functions **********************************/ |
| elmot | 1:d0dfbce63a89 | 800 | HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 801 | HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc); |
| elmot | 1:d0dfbce63a89 | 802 | void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 803 | void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 804 | /** |
| elmot | 1:d0dfbce63a89 | 805 | * @} |
| elmot | 1:d0dfbce63a89 | 806 | */ |
| elmot | 1:d0dfbce63a89 | 807 | |
| elmot | 1:d0dfbce63a89 | 808 | /** @addtogroup ADC_Exported_Functions_Group2 Input and Output operation functions |
| elmot | 1:d0dfbce63a89 | 809 | * @brief IO operation functions |
| elmot | 1:d0dfbce63a89 | 810 | * @{ |
| elmot | 1:d0dfbce63a89 | 811 | */ |
| elmot | 1:d0dfbce63a89 | 812 | /* Blocking mode: Polling */ |
| elmot | 1:d0dfbce63a89 | 813 | HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 814 | HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 815 | HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); |
| elmot | 1:d0dfbce63a89 | 816 | HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout); |
| elmot | 1:d0dfbce63a89 | 817 | |
| elmot | 1:d0dfbce63a89 | 818 | /* Non-blocking mode: Interruption */ |
| elmot | 1:d0dfbce63a89 | 819 | HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 820 | HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 821 | |
| elmot | 1:d0dfbce63a89 | 822 | /* Non-blocking mode: DMA */ |
| elmot | 1:d0dfbce63a89 | 823 | HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length); |
| elmot | 1:d0dfbce63a89 | 824 | HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 825 | |
| elmot | 1:d0dfbce63a89 | 826 | /* ADC retrieve conversion value intended to be used with polling or interruption */ |
| elmot | 1:d0dfbce63a89 | 827 | uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 828 | |
| elmot | 1:d0dfbce63a89 | 829 | /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */ |
| elmot | 1:d0dfbce63a89 | 830 | void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 831 | void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 832 | void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 833 | void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 834 | void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc); |
| elmot | 1:d0dfbce63a89 | 835 | /** |
| elmot | 1:d0dfbce63a89 | 836 | * @} |
| elmot | 1:d0dfbce63a89 | 837 | */ |
| elmot | 1:d0dfbce63a89 | 838 | |
| elmot | 1:d0dfbce63a89 | 839 | /** @addtogroup ADC_Exported_Functions_Group3 Peripheral Control functions |
| elmot | 1:d0dfbce63a89 | 840 | * @brief Peripheral Control functions |
| elmot | 1:d0dfbce63a89 | 841 | * @{ |
| elmot | 1:d0dfbce63a89 | 842 | */ |
| elmot | 1:d0dfbce63a89 | 843 | /* Peripheral Control functions ***********************************************/ |
| elmot | 1:d0dfbce63a89 | 844 | HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig); |
| elmot | 1:d0dfbce63a89 | 845 | HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig); |
| elmot | 1:d0dfbce63a89 | 846 | /** |
| elmot | 1:d0dfbce63a89 | 847 | * @} |
| elmot | 1:d0dfbce63a89 | 848 | */ |
| elmot | 1:d0dfbce63a89 | 849 | |
| elmot | 1:d0dfbce63a89 | 850 | /** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions |
| elmot | 1:d0dfbce63a89 | 851 | * @brief ADC Peripheral State functions |
| elmot | 1:d0dfbce63a89 | 852 | * @{ |
| elmot | 1:d0dfbce63a89 | 853 | */ |
| elmot | 1:d0dfbce63a89 | 854 | /* Peripheral State functions *************************************************/ |
| elmot | 1:d0dfbce63a89 | 855 | uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 856 | uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc); |
| elmot | 1:d0dfbce63a89 | 857 | /** |
| elmot | 1:d0dfbce63a89 | 858 | * @} |
| elmot | 1:d0dfbce63a89 | 859 | */ |
| elmot | 1:d0dfbce63a89 | 860 | |
| elmot | 1:d0dfbce63a89 | 861 | /** |
| elmot | 1:d0dfbce63a89 | 862 | * @} |
| elmot | 1:d0dfbce63a89 | 863 | */ |
| elmot | 1:d0dfbce63a89 | 864 | |
| elmot | 1:d0dfbce63a89 | 865 | /* Private functions -----------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 866 | /** @addtogroup ADC_Private_Functions ADC Private Functions |
| elmot | 1:d0dfbce63a89 | 867 | * @{ |
| elmot | 1:d0dfbce63a89 | 868 | */ |
| elmot | 1:d0dfbce63a89 | 869 | |
| elmot | 1:d0dfbce63a89 | 870 | HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc, uint32_t ConversionGroup); |
| elmot | 1:d0dfbce63a89 | 871 | HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 872 | HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc); |
| elmot | 1:d0dfbce63a89 | 873 | void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma); |
| elmot | 1:d0dfbce63a89 | 874 | void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma); |
| elmot | 1:d0dfbce63a89 | 875 | void ADC_DMAError(DMA_HandleTypeDef *hdma); |
| elmot | 1:d0dfbce63a89 | 876 | |
| elmot | 1:d0dfbce63a89 | 877 | /** |
| elmot | 1:d0dfbce63a89 | 878 | * @} |
| elmot | 1:d0dfbce63a89 | 879 | */ |
| elmot | 1:d0dfbce63a89 | 880 | |
| elmot | 1:d0dfbce63a89 | 881 | /** |
| elmot | 1:d0dfbce63a89 | 882 | * @} |
| elmot | 1:d0dfbce63a89 | 883 | */ |
| elmot | 1:d0dfbce63a89 | 884 | |
| elmot | 1:d0dfbce63a89 | 885 | /** |
| elmot | 1:d0dfbce63a89 | 886 | * @} |
| elmot | 1:d0dfbce63a89 | 887 | */ |
| elmot | 1:d0dfbce63a89 | 888 | |
| elmot | 1:d0dfbce63a89 | 889 | #ifdef __cplusplus |
| elmot | 1:d0dfbce63a89 | 890 | } |
| elmot | 1:d0dfbce63a89 | 891 | #endif |
| elmot | 1:d0dfbce63a89 | 892 | |
| elmot | 1:d0dfbce63a89 | 893 | #endif /*__STM32L4xx_ADC_H */ |
| elmot | 1:d0dfbce63a89 | 894 | |
| elmot | 1:d0dfbce63a89 | 895 | |
| elmot | 1:d0dfbce63a89 | 896 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |