stm32l4xx_ll_spi.c

00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_ll_spi.c
00004   * @author  MCD Application Team
00005   * @version V1.5.1
00006   * @date    31-May-2016
00007   * @brief   SPI LL module driver.
00008   ******************************************************************************
00009   * @attention
00010   *
00011   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
00012   *
00013   * Redistribution and use in source and binary forms, with or without modification,
00014   * are permitted provided that the following conditions are met:
00015   *   1. Redistributions of source code must retain the above copyright notice,
00016   *      this list of conditions and the following disclaimer.
00017   *   2. Redistributions in binary form must reproduce the above copyright notice,
00018   *      this list of conditions and the following disclaimer in the documentation
00019   *      and/or other materials provided with the distribution.
00020   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00021   *      may be used to endorse or promote products derived from this software
00022   *      without specific prior written permission.
00023   *
00024   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00025   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00026   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00027   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00028   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00029   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00030   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00031   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00032   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00033   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00034   *
00035   ******************************************************************************
00036   */
00037 #if defined(USE_FULL_LL_DRIVER)
00038 
00039 /* Includes ------------------------------------------------------------------*/
00040 #include "stm32l4xx_ll_spi.h"
00041 #include "stm32l4xx_ll_bus.h"
00042 
00043 #ifdef  USE_FULL_ASSERT
00044 #include "stm32_assert.h"
00045 #else
00046 #define assert_param(expr) ((void)0U)
00047 #endif
00048 
00049 /** @addtogroup STM32L4xx_LL_Driver
00050   * @{
00051   */
00052 
00053 #if defined (SPI1) || defined (SPI2) || defined (SPI3)
00054 
00055 /** @addtogroup SPI_LL
00056   * @{
00057   */
00058 
00059 /* Private types -------------------------------------------------------------*/
00060 /* Private variables ---------------------------------------------------------*/
00061 
00062 /* Private constants ---------------------------------------------------------*/
00063 /** @defgroup SPI_LL_Private_Constants SPI Private Constants
00064   * @{
00065   */
00066 /* SPI registers Masks */
00067 #define SPI_CR1_CLEAR_MASK                 (SPI_CR1_CPHA    | SPI_CR1_CPOL     | SPI_CR1_MSTR   | \
00068                                             SPI_CR1_BR      | SPI_CR1_LSBFIRST | SPI_CR1_SSI    | \
00069                                             SPI_CR1_SSM     | SPI_CR1_RXONLY   | SPI_CR1_CRCL   | \
00070                                             SPI_CR1_CRCNEXT | SPI_CR1_CRCEN    | SPI_CR1_BIDIOE | \
00071                                             SPI_CR1_BIDIMODE)
00072 /**
00073   * @}
00074   */
00075 
00076 /* Private macros ------------------------------------------------------------*/
00077 /** @defgroup SPI_LL_Private_Macros SPI Private Macros
00078   * @{
00079   */
00080 #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX)    \
00081                                               || ((__VALUE__) == LL_SPI_SIMPLEX_RX)     \
00082                                               || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \
00083                                               || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX))
00084 
00085 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \
00086                                 || ((__VALUE__) == LL_SPI_MODE_SLAVE))
00087 
00088 #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_4BIT)  \
00089                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_5BIT)  \
00090                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_6BIT)  \
00091                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_7BIT)  \
00092                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_8BIT)  \
00093                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_9BIT)  \
00094                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_10BIT) \
00095                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_11BIT) \
00096                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_12BIT) \
00097                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_13BIT) \
00098                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_14BIT) \
00099                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_15BIT) \
00100                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT))
00101 
00102 #define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \
00103                                     || ((__VALUE__) == LL_SPI_POLARITY_HIGH))
00104 
00105 #define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \
00106                                  || ((__VALUE__) == LL_SPI_PHASE_2EDGE))
00107 
00108 #define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT) \
00109                                || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \
00110                                || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT))
00111 
00112 #define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2)   \
00113                                     || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4)   \
00114                                     || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8)   \
00115                                     || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16)  \
00116                                     || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32)  \
00117                                     || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64)  \
00118                                     || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \
00119                                     || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256))
00120 
00121 #define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \
00122                                     || ((__VALUE__) == LL_SPI_MSB_FIRST))
00123 
00124 #define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \
00125                                           || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE))
00126 
00127 #define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U)
00128 
00129 /**
00130   * @}
00131   */
00132 
00133 /* Private function prototypes -----------------------------------------------*/
00134 
00135 /* Exported functions --------------------------------------------------------*/
00136 /** @addtogroup SPI_LL_Exported_Functions
00137   * @{
00138   */
00139 
00140 /** @addtogroup SPI_LL_EF_Init
00141   * @{
00142   */
00143 
00144 /**
00145   * @brief  De-initialize the SPI registers to their default reset values.
00146   * @param  SPIx SPI Instance
00147   * @retval An ErrorStatus enumeration value:
00148   *          - SUCCESS: SPI registers are de-initialized
00149   *          - ERROR: SPI registers are not de-initialized
00150   */
00151 ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx)
00152 {
00153   ErrorStatus status = ERROR;
00154 
00155   /* Check the parameters */
00156   assert_param(IS_SPI_ALL_INSTANCE(SPIx));
00157 
00158 #if defined(SPI1)
00159   if (SPIx == SPI1)
00160   {
00161     /* Force reset of SPI clock */
00162     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI1);
00163 
00164     /* Release reset of SPI clock */
00165     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI1);
00166 
00167     status = SUCCESS;
00168   }
00169 #endif /* SPI1 */
00170 #if defined(SPI2)
00171   if (SPIx == SPI2)
00172   {
00173     /* Force reset of SPI clock */
00174     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI2);
00175 
00176     /* Release reset of SPI clock */
00177     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI2);
00178 
00179     status = SUCCESS;
00180   }
00181 #endif /* SPI2 */
00182 #if defined(SPI3)
00183   if (SPIx == SPI3)
00184   {
00185     /* Force reset of SPI clock */
00186     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI3);
00187 
00188     /* Release reset of SPI clock */
00189     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI3);
00190 
00191     status = SUCCESS;
00192   }
00193 #endif /* SPI3 */
00194 
00195   return status;
00196 }
00197 
00198 /**
00199   * @brief  Initialize the SPI registers according to the specified parameters in SPI_InitStruct.
00200   * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
00201   *         SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
00202   * @param  SPIx SPI Instance
00203   * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
00204   * @retval An ErrorStatus enumeration value. (Return always SUCCESS)
00205   */
00206 ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct)
00207 {
00208   ErrorStatus status = ERROR;
00209 
00210   /* Check the SPI Instance SPIx*/
00211   assert_param(IS_SPI_ALL_INSTANCE(SPIx));
00212 
00213   /* Check the SPI parameters from SPI_InitStruct*/
00214   assert_param(IS_LL_SPI_TRANSFER_DIRECTION(SPI_InitStruct->TransferDirection ));
00215   assert_param(IS_LL_SPI_MODE(SPI_InitStruct->Mode ));
00216   assert_param(IS_LL_SPI_DATAWIDTH(SPI_InitStruct->DataWidth ));
00217   assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity ));
00218   assert_param(IS_LL_SPI_PHASE(SPI_InitStruct->ClockPhase ));
00219   assert_param(IS_LL_SPI_NSS(SPI_InitStruct->NSS ));
00220   assert_param(IS_LL_SPI_BAUDRATE(SPI_InitStruct->BaudRate ));
00221   assert_param(IS_LL_SPI_BITORDER(SPI_InitStruct->BitOrder ));
00222   assert_param(IS_LL_SPI_CRCCALCULATION(SPI_InitStruct->CRCCalculation ));
00223 
00224   if (LL_SPI_IsEnabled(SPIx) == 0x00000000U)
00225   {
00226     /*---------------------------- SPIx CR1 Configuration ------------------------
00227      * Configure SPIx CR1 with parameters:
00228      * - TransferDirection:  SPI_CR1_BIDIMODE, SPI_CR1_BIDIOE and SPI_CR1_RXONLY bits
00229      * - Master/Slave Mode:  SPI_CR1_MSTR bit
00230      * - ClockPolarity:      SPI_CR1_CPOL bit
00231      * - ClockPhase:         SPI_CR1_CPHA bit
00232      * - NSS management:     SPI_CR1_SSM bit
00233      * - BaudRate prescaler: SPI_CR1_BR[2:0] bits
00234      * - BitOrder:           SPI_CR1_LSBFIRST bit
00235      * - CRCCalculation:     SPI_CR1_CRCEN bit
00236      */
00237     MODIFY_REG(SPIx->CR1,
00238                SPI_CR1_CLEAR_MASK,
00239                SPI_InitStruct->TransferDirection  | SPI_InitStruct->Mode  |
00240                SPI_InitStruct->ClockPolarity  | SPI_InitStruct->ClockPhase  |
00241                SPI_InitStruct->NSS  | SPI_InitStruct->BaudRate  |
00242                SPI_InitStruct->BitOrder  | SPI_InitStruct->CRCCalculation );
00243 
00244     /*---------------------------- SPIx CR2 Configuration ------------------------
00245      * Configure SPIx CR2 with parameters:
00246      * - DataWidth:          DS[3:0] bits
00247      * - NSS management:     SSOE bit
00248      */
00249     MODIFY_REG(SPIx->CR2,
00250                SPI_CR2_DS | SPI_CR2_SSOE,
00251                SPI_InitStruct->DataWidth  | (SPI_InitStruct->NSS  >> 16U));
00252 
00253     /*---------------------------- SPIx CRCPR Configuration ----------------------
00254      * Configure SPIx CRCPR with parameters:
00255      * - CRCPoly:            CRCPOLY[15:0] bits
00256      */
00257     if (SPI_InitStruct->CRCCalculation  == LL_SPI_CRCCALCULATION_ENABLE)
00258     {
00259       assert_param(IS_LL_SPI_CRC_POLYNOMIAL(SPI_InitStruct->CRCPoly ));
00260       LL_SPI_SetCRCPolynomial(SPIx, SPI_InitStruct->CRCPoly );
00261     }
00262     status = SUCCESS;
00263   }
00264 
00265   return status;
00266 }
00267 
00268 /**
00269   * @brief  Set each @ref LL_SPI_InitTypeDef field to default value.
00270   * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
00271   * whose fields will be set to default values.
00272   * @retval None
00273   */
00274 void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct)
00275 {
00276   /* Set SPI_InitStruct fields to default values */
00277   SPI_InitStruct->TransferDirection  = LL_SPI_FULL_DUPLEX;
00278   SPI_InitStruct->Mode               = LL_SPI_MODE_SLAVE;
00279   SPI_InitStruct->DataWidth          = LL_SPI_DATAWIDTH_8BIT;
00280   SPI_InitStruct->ClockPolarity      = LL_SPI_POLARITY_LOW;
00281   SPI_InitStruct->ClockPhase         = LL_SPI_PHASE_1EDGE;
00282   SPI_InitStruct->NSS                = LL_SPI_NSS_HARD_INPUT;
00283   SPI_InitStruct->BaudRate           = LL_SPI_BAUDRATEPRESCALER_DIV2;
00284   SPI_InitStruct->BitOrder           = LL_SPI_MSB_FIRST;
00285   SPI_InitStruct->CRCCalculation     = LL_SPI_CRCCALCULATION_DISABLE;
00286   SPI_InitStruct->CRCPoly            = 7U;
00287 }
00288 
00289 /**
00290   * @}
00291   */
00292 
00293 /**
00294   * @}
00295   */
00296 
00297 /**
00298   * @}
00299   */
00300 
00301 #endif /* defined (SPI1) || defined (SPI2) || defined (SPI3) */
00302 
00303 /**
00304   * @}
00305   */
00306 
00307 #endif /* USE_FULL_LL_DRIVER */
00308 
00309 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/