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SYSTEM
Functions

SYSTEM
[UTILS Exported Functions]

System Configuration functions. More...

Functions

void LL_SetSystemCoreClock (uint32_t HCLKFrequency)
 This function sets directly SystemCoreClock CMSIS variable.
ErrorStatus LL_PLL_ConfigSystemClock_MSI (LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
 This function configures system clock with MSI as clock source of the PLL.
ErrorStatus LL_PLL_ConfigSystemClock_HSI (LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
 This function configures system clock at maximum frequency with HSI as clock source of the PLL.
ErrorStatus LL_PLL_ConfigSystemClock_HSE (uint32_t HSEFrequency, uint32_t HSEBypass, LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
 This function configures system clock with HSE as clock source of the PLL.

Detailed Description

System Configuration functions. 

 ===============================================================================
           ##### System Configuration functions #####
 ===============================================================================
    [..]
         System, AHB and APB buses clocks configuration

         (+) The maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2 is 80000000 Hz.

Function Documentation

ErrorStatus LL_PLL_ConfigSystemClock_HSE ( uint32_t  HSEFrequency,
uint32_t  HSEBypass,
LL_UTILS_PLLInitTypeDef *  UTILS_PLLInitStruct,
LL_UTILS_ClkInitTypeDef *  UTILS_ClkInitStruct 
)

This function configures system clock with HSE as clock source of the PLL.

Note:
The application need to ensure that PLL, PLLSAI1 and/or PLLSAI2 are disabled.
Function is based on the following formula:
  • PLL output frequency = (((HSE frequency / PLLM) * PLLN) / PLLR)
  • PLLM: ensure that the VCO input frequency ranges from 4 to 16 MHz (PLLVCO_input = HSE frequency / PLLM)
  • PLLN: ensure that the VCO output frequency is between 64 and 344 MHz (PLLVCO_output = PLLVCO_input * PLLN)
  • PLLR: ensure that max frequency at 80 MHz is reach (PLLVCO_output / PLLR)
Parameters:
HSEFrequencyValue between Min_Data = 4000000 and Max_Data = 48000000
HSEBypassThis parameter can be one of the following values:

  • LL_UTILS_HSEBYPASS_ON
  • LL_UTILS_HSEBYPASS_OFF
UTILS_PLLInitStructpointer to a LL_UTILS_PLLInitTypeDef structure that contains the configuration information for the PLL.
UTILS_ClkInitStructpointer to a LL_UTILS_ClkInitTypeDef structure that contains the configuration information for the BUS prescalers.
Return values:
AnErrorStatus enumeration value:

  • SUCCESS: Max frequency configuration done
  • ERROR: Max frequency configuration not done

Definition at line 435 of file stm32l4xx_ll_utils.c.

ErrorStatus LL_PLL_ConfigSystemClock_HSI ( LL_UTILS_PLLInitTypeDef *  UTILS_PLLInitStruct,
LL_UTILS_ClkInitTypeDef *  UTILS_ClkInitStruct 
)

This function configures system clock at maximum frequency with HSI as clock source of the PLL.

Note:
The application need to ensure that PLL, PLLSAI1 and/or PLLSAI2 are disabled.
Function is based on the following formula:
  • PLL output frequency = (((HSI frequency / PLLM) * PLLN) / PLLR)
  • PLLM: ensure that the VCO input frequency ranges from 4 to 16 MHz (PLLVCO_input = HSI frequency / PLLM)
  • PLLN: ensure that the VCO output frequency is between 64 and 344 MHz (PLLVCO_output = PLLVCO_input * PLLN)
  • PLLR: ensure that max frequency at 80 MHz is reach (PLLVCO_output / PLLR)
Parameters:
UTILS_PLLInitStructpointer to a LL_UTILS_PLLInitTypeDef structure that contains the configuration information for the PLL.
UTILS_ClkInitStructpointer to a LL_UTILS_ClkInitTypeDef structure that contains the configuration information for the BUS prescalers.
Return values:
AnErrorStatus enumeration value:

  • SUCCESS: Max frequency configuration done
  • ERROR: Max frequency configuration not done

Definition at line 377 of file stm32l4xx_ll_utils.c.

ErrorStatus LL_PLL_ConfigSystemClock_MSI ( LL_UTILS_PLLInitTypeDef *  UTILS_PLLInitStruct,
LL_UTILS_ClkInitTypeDef *  UTILS_ClkInitStruct 
)

This function configures system clock with MSI as clock source of the PLL.

Note:
The application needs to ensure that PLL, PLLSAI1 and/or PLLSAI2 are disabled.
Function is based on the following formula:
  • PLL output frequency = (((MSI frequency / PLLM) * PLLN) / PLLR)
  • PLLM: ensure that the VCO input frequency ranges from 4 to 16 MHz (PLLVCO_input = MSI frequency / PLLM)
  • PLLN: ensure that the VCO output frequency is between 64 and 344 MHz (PLLVCO_output = PLLVCO_input * PLLN)
  • PLLR: ensure that max frequency at 80 MHz is reach (PLLVCO_output / PLLR)
Parameters:
UTILS_PLLInitStructpointer to a LL_UTILS_PLLInitTypeDef structure that contains the configuration information for the PLL.
UTILS_ClkInitStructpointer to a LL_UTILS_ClkInitTypeDef structure that contains the configuration information for the BUS prescalers.
Return values:
AnErrorStatus enumeration value:

  • SUCCESS: Max frequency configuration done
  • ERROR: Max frequency configuration not done

Definition at line 274 of file stm32l4xx_ll_utils.c.

void LL_SetSystemCoreClock ( uint32_t  HCLKFrequency )

This function sets directly SystemCoreClock CMSIS variable.

Note:
Variable can be calculated also through SystemCoreClockUpdate function.
Parameters:
HCLKFrequencyHCLK frequency in Hz (can be calculated thanks to RCC helper macro)
Return values:
None

Definition at line 252 of file stm32l4xx_ll_utils.c.

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