TUKS MCU Introductory course
/
TUKS-COURSE-THERMOMETER
Important changes to repositories hosted on mbed.com
Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.
To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.
It is also possible to export all your personal repositories from the account settings page.
Fork of
TUKS-COURSE-TIMER
by 
TUKS MCU Introductory course
HAL_L476/stm32l4xx_hal_smbus.h@1:d0dfbce63a89, 2017-02-24 (annotated)
- Committer:
- elmot
- Date:
- Fri Feb 24 21:13:56 2017 +0000
- Revision:
- 1:d0dfbce63a89
Ready-to-copy
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| elmot | 1:d0dfbce63a89 | 1 | /** |
| elmot | 1:d0dfbce63a89 | 2 | ****************************************************************************** |
| elmot | 1:d0dfbce63a89 | 3 | * @file stm32l4xx_hal_smbus.h |
| elmot | 1:d0dfbce63a89 | 4 | * @author MCD Application Team |
| elmot | 1:d0dfbce63a89 | 5 | * @version V1.5.1 |
| elmot | 1:d0dfbce63a89 | 6 | * @date 31-May-2016 |
| elmot | 1:d0dfbce63a89 | 7 | * @brief Header file of SMBUS HAL module. |
| elmot | 1:d0dfbce63a89 | 8 | ****************************************************************************** |
| elmot | 1:d0dfbce63a89 | 9 | * @attention |
| elmot | 1:d0dfbce63a89 | 10 | * |
| elmot | 1:d0dfbce63a89 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| elmot | 1:d0dfbce63a89 | 12 | * |
| elmot | 1:d0dfbce63a89 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| elmot | 1:d0dfbce63a89 | 14 | * are permitted provided that the following conditions are met: |
| elmot | 1:d0dfbce63a89 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| elmot | 1:d0dfbce63a89 | 16 | * this list of conditions and the following disclaimer. |
| elmot | 1:d0dfbce63a89 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| elmot | 1:d0dfbce63a89 | 18 | * this list of conditions and the following disclaimer in the documentation |
| elmot | 1:d0dfbce63a89 | 19 | * and/or other materials provided with the distribution. |
| elmot | 1:d0dfbce63a89 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| elmot | 1:d0dfbce63a89 | 21 | * may be used to endorse or promote products derived from this software |
| elmot | 1:d0dfbce63a89 | 22 | * without specific prior written permission. |
| elmot | 1:d0dfbce63a89 | 23 | * |
| elmot | 1:d0dfbce63a89 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| elmot | 1:d0dfbce63a89 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| elmot | 1:d0dfbce63a89 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| elmot | 1:d0dfbce63a89 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| elmot | 1:d0dfbce63a89 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| elmot | 1:d0dfbce63a89 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| elmot | 1:d0dfbce63a89 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| elmot | 1:d0dfbce63a89 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| elmot | 1:d0dfbce63a89 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| elmot | 1:d0dfbce63a89 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| elmot | 1:d0dfbce63a89 | 34 | * |
| elmot | 1:d0dfbce63a89 | 35 | ****************************************************************************** |
| elmot | 1:d0dfbce63a89 | 36 | */ |
| elmot | 1:d0dfbce63a89 | 37 | |
| elmot | 1:d0dfbce63a89 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 39 | #ifndef __STM32L4xx_HAL_SMBUS_H |
| elmot | 1:d0dfbce63a89 | 40 | #define __STM32L4xx_HAL_SMBUS_H |
| elmot | 1:d0dfbce63a89 | 41 | |
| elmot | 1:d0dfbce63a89 | 42 | #ifdef __cplusplus |
| elmot | 1:d0dfbce63a89 | 43 | extern "C" { |
| elmot | 1:d0dfbce63a89 | 44 | #endif |
| elmot | 1:d0dfbce63a89 | 45 | |
| elmot | 1:d0dfbce63a89 | 46 | /* Includes ------------------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 47 | #include "stm32l4xx_hal_def.h" |
| elmot | 1:d0dfbce63a89 | 48 | |
| elmot | 1:d0dfbce63a89 | 49 | /** @addtogroup STM32L4xx_HAL_Driver |
| elmot | 1:d0dfbce63a89 | 50 | * @{ |
| elmot | 1:d0dfbce63a89 | 51 | */ |
| elmot | 1:d0dfbce63a89 | 52 | |
| elmot | 1:d0dfbce63a89 | 53 | /** @addtogroup SMBUS |
| elmot | 1:d0dfbce63a89 | 54 | * @{ |
| elmot | 1:d0dfbce63a89 | 55 | */ |
| elmot | 1:d0dfbce63a89 | 56 | |
| elmot | 1:d0dfbce63a89 | 57 | /* Exported types ------------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 58 | /** @defgroup SMBUS_Exported_Types SMBUS Exported Types |
| elmot | 1:d0dfbce63a89 | 59 | * @{ |
| elmot | 1:d0dfbce63a89 | 60 | */ |
| elmot | 1:d0dfbce63a89 | 61 | |
| elmot | 1:d0dfbce63a89 | 62 | /** @defgroup SMBUS_Configuration_Structure_definition SMBUS Configuration Structure definition |
| elmot | 1:d0dfbce63a89 | 63 | * @brief SMBUS Configuration Structure definition |
| elmot | 1:d0dfbce63a89 | 64 | * @{ |
| elmot | 1:d0dfbce63a89 | 65 | */ |
| elmot | 1:d0dfbce63a89 | 66 | typedef struct |
| elmot | 1:d0dfbce63a89 | 67 | { |
| elmot | 1:d0dfbce63a89 | 68 | uint32_t Timing; /*!< Specifies the SMBUS_TIMINGR_register value. |
| elmot | 1:d0dfbce63a89 | 69 | This parameter calculated by referring to SMBUS initialization |
| elmot | 1:d0dfbce63a89 | 70 | section in Reference manual */ |
| elmot | 1:d0dfbce63a89 | 71 | uint32_t AnalogFilter; /*!< Specifies if Analog Filter is enable or not. |
| elmot | 1:d0dfbce63a89 | 72 | This parameter can be a value of @ref SMBUS_Analog_Filter */ |
| elmot | 1:d0dfbce63a89 | 73 | |
| elmot | 1:d0dfbce63a89 | 74 | uint32_t OwnAddress1; /*!< Specifies the first device own address. |
| elmot | 1:d0dfbce63a89 | 75 | This parameter can be a 7-bit or 10-bit address. */ |
| elmot | 1:d0dfbce63a89 | 76 | |
| elmot | 1:d0dfbce63a89 | 77 | uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode for master is selected. |
| elmot | 1:d0dfbce63a89 | 78 | This parameter can be a value of @ref SMBUS_addressing_mode */ |
| elmot | 1:d0dfbce63a89 | 79 | |
| elmot | 1:d0dfbce63a89 | 80 | uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. |
| elmot | 1:d0dfbce63a89 | 81 | This parameter can be a value of @ref SMBUS_dual_addressing_mode */ |
| elmot | 1:d0dfbce63a89 | 82 | |
| elmot | 1:d0dfbce63a89 | 83 | uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected |
| elmot | 1:d0dfbce63a89 | 84 | This parameter can be a 7-bit address. */ |
| elmot | 1:d0dfbce63a89 | 85 | |
| elmot | 1:d0dfbce63a89 | 86 | uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected |
| elmot | 1:d0dfbce63a89 | 87 | This parameter can be a value of @ref SMBUS_own_address2_masks. */ |
| elmot | 1:d0dfbce63a89 | 88 | |
| elmot | 1:d0dfbce63a89 | 89 | uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. |
| elmot | 1:d0dfbce63a89 | 90 | This parameter can be a value of @ref SMBUS_general_call_addressing_mode. */ |
| elmot | 1:d0dfbce63a89 | 91 | |
| elmot | 1:d0dfbce63a89 | 92 | uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. |
| elmot | 1:d0dfbce63a89 | 93 | This parameter can be a value of @ref SMBUS_nostretch_mode */ |
| elmot | 1:d0dfbce63a89 | 94 | |
| elmot | 1:d0dfbce63a89 | 95 | uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected. |
| elmot | 1:d0dfbce63a89 | 96 | This parameter can be a value of @ref SMBUS_packet_error_check_mode */ |
| elmot | 1:d0dfbce63a89 | 97 | |
| elmot | 1:d0dfbce63a89 | 98 | uint32_t PeripheralMode; /*!< Specifies which mode of Periphal is selected. |
| elmot | 1:d0dfbce63a89 | 99 | This parameter can be a value of @ref SMBUS_peripheral_mode */ |
| elmot | 1:d0dfbce63a89 | 100 | |
| elmot | 1:d0dfbce63a89 | 101 | uint32_t SMBusTimeout; /*!< Specifies the content of the 32 Bits SMBUS_TIMEOUT_register value. |
| elmot | 1:d0dfbce63a89 | 102 | (Enable bits and different timeout values) |
| elmot | 1:d0dfbce63a89 | 103 | This parameter calculated by referring to SMBUS initialization |
| elmot | 1:d0dfbce63a89 | 104 | section in Reference manual */ |
| elmot | 1:d0dfbce63a89 | 105 | } SMBUS_InitTypeDef; |
| elmot | 1:d0dfbce63a89 | 106 | /** |
| elmot | 1:d0dfbce63a89 | 107 | * @} |
| elmot | 1:d0dfbce63a89 | 108 | */ |
| elmot | 1:d0dfbce63a89 | 109 | |
| elmot | 1:d0dfbce63a89 | 110 | /** @defgroup HAL_state_definition HAL state definition |
| elmot | 1:d0dfbce63a89 | 111 | * @brief HAL State definition |
| elmot | 1:d0dfbce63a89 | 112 | * @{ |
| elmot | 1:d0dfbce63a89 | 113 | */ |
| elmot | 1:d0dfbce63a89 | 114 | #define HAL_SMBUS_STATE_RESET ((uint32_t)0x00000000) /*!< SMBUS not yet initialized or disabled */ |
| elmot | 1:d0dfbce63a89 | 115 | #define HAL_SMBUS_STATE_READY ((uint32_t)0x00000001) /*!< SMBUS initialized and ready for use */ |
| elmot | 1:d0dfbce63a89 | 116 | #define HAL_SMBUS_STATE_BUSY ((uint32_t)0x00000002) /*!< SMBUS internal process is ongoing */ |
| elmot | 1:d0dfbce63a89 | 117 | #define HAL_SMBUS_STATE_MASTER_BUSY_TX ((uint32_t)0x00000012) /*!< Master Data Transmission process is ongoing */ |
| elmot | 1:d0dfbce63a89 | 118 | #define HAL_SMBUS_STATE_MASTER_BUSY_RX ((uint32_t)0x00000022) /*!< Master Data Reception process is ongoing */ |
| elmot | 1:d0dfbce63a89 | 119 | #define HAL_SMBUS_STATE_SLAVE_BUSY_TX ((uint32_t)0x00000032) /*!< Slave Data Transmission process is ongoing */ |
| elmot | 1:d0dfbce63a89 | 120 | #define HAL_SMBUS_STATE_SLAVE_BUSY_RX ((uint32_t)0x00000042) /*!< Slave Data Reception process is ongoing */ |
| elmot | 1:d0dfbce63a89 | 121 | #define HAL_SMBUS_STATE_TIMEOUT ((uint32_t)0x00000003) /*!< Timeout state */ |
| elmot | 1:d0dfbce63a89 | 122 | #define HAL_SMBUS_STATE_ERROR ((uint32_t)0x00000004) /*!< Reception process is ongoing */ |
| elmot | 1:d0dfbce63a89 | 123 | #define HAL_SMBUS_STATE_LISTEN ((uint32_t)0x00000008) /*!< Address Listen Mode is ongoing */ |
| elmot | 1:d0dfbce63a89 | 124 | /** |
| elmot | 1:d0dfbce63a89 | 125 | * @} |
| elmot | 1:d0dfbce63a89 | 126 | */ |
| elmot | 1:d0dfbce63a89 | 127 | |
| elmot | 1:d0dfbce63a89 | 128 | /** @defgroup SMBUS_Error_Code_definition SMBUS Error Code definition |
| elmot | 1:d0dfbce63a89 | 129 | * @brief SMBUS Error Code definition |
| elmot | 1:d0dfbce63a89 | 130 | * @{ |
| elmot | 1:d0dfbce63a89 | 131 | */ |
| elmot | 1:d0dfbce63a89 | 132 | #define HAL_SMBUS_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ |
| elmot | 1:d0dfbce63a89 | 133 | #define HAL_SMBUS_ERROR_BERR ((uint32_t)0x00000001) /*!< BERR error */ |
| elmot | 1:d0dfbce63a89 | 134 | #define HAL_SMBUS_ERROR_ARLO ((uint32_t)0x00000002) /*!< ARLO error */ |
| elmot | 1:d0dfbce63a89 | 135 | #define HAL_SMBUS_ERROR_ACKF ((uint32_t)0x00000004) /*!< ACKF error */ |
| elmot | 1:d0dfbce63a89 | 136 | #define HAL_SMBUS_ERROR_OVR ((uint32_t)0x00000008) /*!< OVR error */ |
| elmot | 1:d0dfbce63a89 | 137 | #define HAL_SMBUS_ERROR_HALTIMEOUT ((uint32_t)0x00000010) /*!< Timeout error */ |
| elmot | 1:d0dfbce63a89 | 138 | #define HAL_SMBUS_ERROR_BUSTIMEOUT ((uint32_t)0x00000020) /*!< Bus Timeout error */ |
| elmot | 1:d0dfbce63a89 | 139 | #define HAL_SMBUS_ERROR_ALERT ((uint32_t)0x00000040) /*!< Alert error */ |
| elmot | 1:d0dfbce63a89 | 140 | #define HAL_SMBUS_ERROR_PECERR ((uint32_t)0x00000080) /*!< PEC error */ |
| elmot | 1:d0dfbce63a89 | 141 | /** |
| elmot | 1:d0dfbce63a89 | 142 | * @} |
| elmot | 1:d0dfbce63a89 | 143 | */ |
| elmot | 1:d0dfbce63a89 | 144 | |
| elmot | 1:d0dfbce63a89 | 145 | /** @defgroup SMBUS_handle_Structure_definition SMBUS handle Structure definition |
| elmot | 1:d0dfbce63a89 | 146 | * @brief SMBUS handle Structure definition |
| elmot | 1:d0dfbce63a89 | 147 | * @{ |
| elmot | 1:d0dfbce63a89 | 148 | */ |
| elmot | 1:d0dfbce63a89 | 149 | typedef struct |
| elmot | 1:d0dfbce63a89 | 150 | { |
| elmot | 1:d0dfbce63a89 | 151 | I2C_TypeDef *Instance; /*!< SMBUS registers base address */ |
| elmot | 1:d0dfbce63a89 | 152 | |
| elmot | 1:d0dfbce63a89 | 153 | SMBUS_InitTypeDef Init; /*!< SMBUS communication parameters */ |
| elmot | 1:d0dfbce63a89 | 154 | |
| elmot | 1:d0dfbce63a89 | 155 | uint8_t *pBuffPtr; /*!< Pointer to SMBUS transfer buffer */ |
| elmot | 1:d0dfbce63a89 | 156 | |
| elmot | 1:d0dfbce63a89 | 157 | uint16_t XferSize; /*!< SMBUS transfer size */ |
| elmot | 1:d0dfbce63a89 | 158 | |
| elmot | 1:d0dfbce63a89 | 159 | __IO uint16_t XferCount; /*!< SMBUS transfer counter */ |
| elmot | 1:d0dfbce63a89 | 160 | |
| elmot | 1:d0dfbce63a89 | 161 | __IO uint32_t XferOptions; /*!< SMBUS transfer options */ |
| elmot | 1:d0dfbce63a89 | 162 | |
| elmot | 1:d0dfbce63a89 | 163 | __IO uint32_t PreviousState; /*!< SMBUS communication Previous state */ |
| elmot | 1:d0dfbce63a89 | 164 | |
| elmot | 1:d0dfbce63a89 | 165 | HAL_LockTypeDef Lock; /*!< SMBUS locking object */ |
| elmot | 1:d0dfbce63a89 | 166 | |
| elmot | 1:d0dfbce63a89 | 167 | __IO uint32_t State; /*!< SMBUS communication state */ |
| elmot | 1:d0dfbce63a89 | 168 | |
| elmot | 1:d0dfbce63a89 | 169 | __IO uint32_t ErrorCode; /*!< SMBUS Error code */ |
| elmot | 1:d0dfbce63a89 | 170 | |
| elmot | 1:d0dfbce63a89 | 171 | }SMBUS_HandleTypeDef; |
| elmot | 1:d0dfbce63a89 | 172 | /** |
| elmot | 1:d0dfbce63a89 | 173 | * @} |
| elmot | 1:d0dfbce63a89 | 174 | */ |
| elmot | 1:d0dfbce63a89 | 175 | |
| elmot | 1:d0dfbce63a89 | 176 | /** |
| elmot | 1:d0dfbce63a89 | 177 | * @} |
| elmot | 1:d0dfbce63a89 | 178 | */ |
| elmot | 1:d0dfbce63a89 | 179 | /* Exported constants --------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 180 | |
| elmot | 1:d0dfbce63a89 | 181 | /** @defgroup SMBUS_Exported_Constants SMBUS Exported Constants |
| elmot | 1:d0dfbce63a89 | 182 | * @{ |
| elmot | 1:d0dfbce63a89 | 183 | */ |
| elmot | 1:d0dfbce63a89 | 184 | |
| elmot | 1:d0dfbce63a89 | 185 | /** @defgroup SMBUS_Analog_Filter SMBUS Analog Filter |
| elmot | 1:d0dfbce63a89 | 186 | * @{ |
| elmot | 1:d0dfbce63a89 | 187 | */ |
| elmot | 1:d0dfbce63a89 | 188 | #define SMBUS_ANALOGFILTER_ENABLE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 189 | #define SMBUS_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF |
| elmot | 1:d0dfbce63a89 | 190 | /** |
| elmot | 1:d0dfbce63a89 | 191 | * @} |
| elmot | 1:d0dfbce63a89 | 192 | */ |
| elmot | 1:d0dfbce63a89 | 193 | |
| elmot | 1:d0dfbce63a89 | 194 | /** @defgroup SMBUS_addressing_mode SMBUS addressing mode |
| elmot | 1:d0dfbce63a89 | 195 | * @{ |
| elmot | 1:d0dfbce63a89 | 196 | */ |
| elmot | 1:d0dfbce63a89 | 197 | #define SMBUS_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001) |
| elmot | 1:d0dfbce63a89 | 198 | #define SMBUS_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002) |
| elmot | 1:d0dfbce63a89 | 199 | /** |
| elmot | 1:d0dfbce63a89 | 200 | * @} |
| elmot | 1:d0dfbce63a89 | 201 | */ |
| elmot | 1:d0dfbce63a89 | 202 | |
| elmot | 1:d0dfbce63a89 | 203 | /** @defgroup SMBUS_dual_addressing_mode SMBUS dual addressing mode |
| elmot | 1:d0dfbce63a89 | 204 | * @{ |
| elmot | 1:d0dfbce63a89 | 205 | */ |
| elmot | 1:d0dfbce63a89 | 206 | |
| elmot | 1:d0dfbce63a89 | 207 | #define SMBUS_DUALADDRESS_DISABLE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 208 | #define SMBUS_DUALADDRESS_ENABLE I2C_OAR2_OA2EN |
| elmot | 1:d0dfbce63a89 | 209 | /** |
| elmot | 1:d0dfbce63a89 | 210 | * @} |
| elmot | 1:d0dfbce63a89 | 211 | */ |
| elmot | 1:d0dfbce63a89 | 212 | |
| elmot | 1:d0dfbce63a89 | 213 | /** @defgroup SMBUS_own_address2_masks SMBUS own address2 masks |
| elmot | 1:d0dfbce63a89 | 214 | * @{ |
| elmot | 1:d0dfbce63a89 | 215 | */ |
| elmot | 1:d0dfbce63a89 | 216 | |
| elmot | 1:d0dfbce63a89 | 217 | #define SMBUS_OA2_NOMASK ((uint8_t)0x00) |
| elmot | 1:d0dfbce63a89 | 218 | #define SMBUS_OA2_MASK01 ((uint8_t)0x01) |
| elmot | 1:d0dfbce63a89 | 219 | #define SMBUS_OA2_MASK02 ((uint8_t)0x02) |
| elmot | 1:d0dfbce63a89 | 220 | #define SMBUS_OA2_MASK03 ((uint8_t)0x03) |
| elmot | 1:d0dfbce63a89 | 221 | #define SMBUS_OA2_MASK04 ((uint8_t)0x04) |
| elmot | 1:d0dfbce63a89 | 222 | #define SMBUS_OA2_MASK05 ((uint8_t)0x05) |
| elmot | 1:d0dfbce63a89 | 223 | #define SMBUS_OA2_MASK06 ((uint8_t)0x06) |
| elmot | 1:d0dfbce63a89 | 224 | #define SMBUS_OA2_MASK07 ((uint8_t)0x07) |
| elmot | 1:d0dfbce63a89 | 225 | /** |
| elmot | 1:d0dfbce63a89 | 226 | * @} |
| elmot | 1:d0dfbce63a89 | 227 | */ |
| elmot | 1:d0dfbce63a89 | 228 | |
| elmot | 1:d0dfbce63a89 | 229 | |
| elmot | 1:d0dfbce63a89 | 230 | /** @defgroup SMBUS_general_call_addressing_mode SMBUS general call addressing mode |
| elmot | 1:d0dfbce63a89 | 231 | * @{ |
| elmot | 1:d0dfbce63a89 | 232 | */ |
| elmot | 1:d0dfbce63a89 | 233 | #define SMBUS_GENERALCALL_DISABLE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 234 | #define SMBUS_GENERALCALL_ENABLE I2C_CR1_GCEN |
| elmot | 1:d0dfbce63a89 | 235 | /** |
| elmot | 1:d0dfbce63a89 | 236 | * @} |
| elmot | 1:d0dfbce63a89 | 237 | */ |
| elmot | 1:d0dfbce63a89 | 238 | |
| elmot | 1:d0dfbce63a89 | 239 | /** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode |
| elmot | 1:d0dfbce63a89 | 240 | * @{ |
| elmot | 1:d0dfbce63a89 | 241 | */ |
| elmot | 1:d0dfbce63a89 | 242 | #define SMBUS_NOSTRETCH_DISABLE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 243 | #define SMBUS_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH |
| elmot | 1:d0dfbce63a89 | 244 | /** |
| elmot | 1:d0dfbce63a89 | 245 | * @} |
| elmot | 1:d0dfbce63a89 | 246 | */ |
| elmot | 1:d0dfbce63a89 | 247 | |
| elmot | 1:d0dfbce63a89 | 248 | /** @defgroup SMBUS_packet_error_check_mode SMBUS packet error check mode |
| elmot | 1:d0dfbce63a89 | 249 | * @{ |
| elmot | 1:d0dfbce63a89 | 250 | */ |
| elmot | 1:d0dfbce63a89 | 251 | #define SMBUS_PEC_DISABLE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 252 | #define SMBUS_PEC_ENABLE I2C_CR1_PECEN |
| elmot | 1:d0dfbce63a89 | 253 | /** |
| elmot | 1:d0dfbce63a89 | 254 | * @} |
| elmot | 1:d0dfbce63a89 | 255 | */ |
| elmot | 1:d0dfbce63a89 | 256 | |
| elmot | 1:d0dfbce63a89 | 257 | /** @defgroup SMBUS_peripheral_mode SMBUS peripheral mode |
| elmot | 1:d0dfbce63a89 | 258 | * @{ |
| elmot | 1:d0dfbce63a89 | 259 | */ |
| elmot | 1:d0dfbce63a89 | 260 | #define SMBUS_PERIPHERAL_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBHEN) |
| elmot | 1:d0dfbce63a89 | 261 | #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE (uint32_t)(0x00000000) |
| elmot | 1:d0dfbce63a89 | 262 | #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP (uint32_t)(I2C_CR1_SMBDEN) |
| elmot | 1:d0dfbce63a89 | 263 | /** |
| elmot | 1:d0dfbce63a89 | 264 | * @} |
| elmot | 1:d0dfbce63a89 | 265 | */ |
| elmot | 1:d0dfbce63a89 | 266 | |
| elmot | 1:d0dfbce63a89 | 267 | /** @defgroup SMBUS_ReloadEndMode_definition SMBUS ReloadEndMode definition |
| elmot | 1:d0dfbce63a89 | 268 | * @{ |
| elmot | 1:d0dfbce63a89 | 269 | */ |
| elmot | 1:d0dfbce63a89 | 270 | |
| elmot | 1:d0dfbce63a89 | 271 | #define SMBUS_SOFTEND_MODE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 272 | #define SMBUS_RELOAD_MODE I2C_CR2_RELOAD |
| elmot | 1:d0dfbce63a89 | 273 | #define SMBUS_AUTOEND_MODE I2C_CR2_AUTOEND |
| elmot | 1:d0dfbce63a89 | 274 | #define SMBUS_SENDPEC_MODE I2C_CR2_PECBYTE |
| elmot | 1:d0dfbce63a89 | 275 | /** |
| elmot | 1:d0dfbce63a89 | 276 | * @} |
| elmot | 1:d0dfbce63a89 | 277 | */ |
| elmot | 1:d0dfbce63a89 | 278 | |
| elmot | 1:d0dfbce63a89 | 279 | /** @defgroup SMBUS_StartStopMode_definition SMBUS StartStopMode definition |
| elmot | 1:d0dfbce63a89 | 280 | * @{ |
| elmot | 1:d0dfbce63a89 | 281 | */ |
| elmot | 1:d0dfbce63a89 | 282 | |
| elmot | 1:d0dfbce63a89 | 283 | #define SMBUS_NO_STARTSTOP ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 284 | #define SMBUS_GENERATE_STOP I2C_CR2_STOP |
| elmot | 1:d0dfbce63a89 | 285 | #define SMBUS_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN) |
| elmot | 1:d0dfbce63a89 | 286 | #define SMBUS_GENERATE_START_WRITE I2C_CR2_START |
| elmot | 1:d0dfbce63a89 | 287 | /** |
| elmot | 1:d0dfbce63a89 | 288 | * @} |
| elmot | 1:d0dfbce63a89 | 289 | */ |
| elmot | 1:d0dfbce63a89 | 290 | |
| elmot | 1:d0dfbce63a89 | 291 | /** @defgroup SMBUS_XferOptions_definition SMBUS XferOptions definition |
| elmot | 1:d0dfbce63a89 | 292 | * @{ |
| elmot | 1:d0dfbce63a89 | 293 | */ |
| elmot | 1:d0dfbce63a89 | 294 | |
| elmot | 1:d0dfbce63a89 | 295 | #define SMBUS_FIRST_FRAME ((uint32_t)(SMBUS_SOFTEND_MODE)) |
| elmot | 1:d0dfbce63a89 | 296 | #define SMBUS_NEXT_FRAME ((uint32_t)(SMBUS_RELOAD_MODE | SMBUS_SOFTEND_MODE)) |
| elmot | 1:d0dfbce63a89 | 297 | #define SMBUS_FIRST_AND_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE |
| elmot | 1:d0dfbce63a89 | 298 | #define SMBUS_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE |
| elmot | 1:d0dfbce63a89 | 299 | #define SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) |
| elmot | 1:d0dfbce63a89 | 300 | #define SMBUS_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) |
| elmot | 1:d0dfbce63a89 | 301 | /** |
| elmot | 1:d0dfbce63a89 | 302 | * @} |
| elmot | 1:d0dfbce63a89 | 303 | */ |
| elmot | 1:d0dfbce63a89 | 304 | |
| elmot | 1:d0dfbce63a89 | 305 | /** @defgroup SMBUS_Interrupt_configuration_definition SMBUS Interrupt configuration definition |
| elmot | 1:d0dfbce63a89 | 306 | * @brief SMBUS Interrupt definition |
| elmot | 1:d0dfbce63a89 | 307 | * Elements values convention: 0xXXXXXXXX |
| elmot | 1:d0dfbce63a89 | 308 | * - XXXXXXXX : Interrupt control mask |
| elmot | 1:d0dfbce63a89 | 309 | * @{ |
| elmot | 1:d0dfbce63a89 | 310 | */ |
| elmot | 1:d0dfbce63a89 | 311 | #define SMBUS_IT_ERRI I2C_CR1_ERRIE |
| elmot | 1:d0dfbce63a89 | 312 | #define SMBUS_IT_TCI I2C_CR1_TCIE |
| elmot | 1:d0dfbce63a89 | 313 | #define SMBUS_IT_STOPI I2C_CR1_STOPIE |
| elmot | 1:d0dfbce63a89 | 314 | #define SMBUS_IT_NACKI I2C_CR1_NACKIE |
| elmot | 1:d0dfbce63a89 | 315 | #define SMBUS_IT_ADDRI I2C_CR1_ADDRIE |
| elmot | 1:d0dfbce63a89 | 316 | #define SMBUS_IT_RXI I2C_CR1_RXIE |
| elmot | 1:d0dfbce63a89 | 317 | #define SMBUS_IT_TXI I2C_CR1_TXIE |
| elmot | 1:d0dfbce63a89 | 318 | #define SMBUS_IT_TX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI) |
| elmot | 1:d0dfbce63a89 | 319 | #define SMBUS_IT_RX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | SMBUS_IT_RXI) |
| elmot | 1:d0dfbce63a89 | 320 | #define SMBUS_IT_ALERT (SMBUS_IT_ERRI) |
| elmot | 1:d0dfbce63a89 | 321 | #define SMBUS_IT_ADDR (SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI) |
| elmot | 1:d0dfbce63a89 | 322 | /** |
| elmot | 1:d0dfbce63a89 | 323 | * @} |
| elmot | 1:d0dfbce63a89 | 324 | */ |
| elmot | 1:d0dfbce63a89 | 325 | |
| elmot | 1:d0dfbce63a89 | 326 | /** @defgroup SMBUS_Flag_definition SMBUS Flag definition |
| elmot | 1:d0dfbce63a89 | 327 | * @brief Flag definition |
| elmot | 1:d0dfbce63a89 | 328 | * Elements values convention: 0xXXXXYYYY |
| elmot | 1:d0dfbce63a89 | 329 | * - XXXXXXXX : Flag mask |
| elmot | 1:d0dfbce63a89 | 330 | * @{ |
| elmot | 1:d0dfbce63a89 | 331 | */ |
| elmot | 1:d0dfbce63a89 | 332 | |
| elmot | 1:d0dfbce63a89 | 333 | #define SMBUS_FLAG_TXE I2C_ISR_TXE |
| elmot | 1:d0dfbce63a89 | 334 | #define SMBUS_FLAG_TXIS I2C_ISR_TXIS |
| elmot | 1:d0dfbce63a89 | 335 | #define SMBUS_FLAG_RXNE I2C_ISR_RXNE |
| elmot | 1:d0dfbce63a89 | 336 | #define SMBUS_FLAG_ADDR I2C_ISR_ADDR |
| elmot | 1:d0dfbce63a89 | 337 | #define SMBUS_FLAG_AF I2C_ISR_NACKF |
| elmot | 1:d0dfbce63a89 | 338 | #define SMBUS_FLAG_STOPF I2C_ISR_STOPF |
| elmot | 1:d0dfbce63a89 | 339 | #define SMBUS_FLAG_TC I2C_ISR_TC |
| elmot | 1:d0dfbce63a89 | 340 | #define SMBUS_FLAG_TCR I2C_ISR_TCR |
| elmot | 1:d0dfbce63a89 | 341 | #define SMBUS_FLAG_BERR I2C_ISR_BERR |
| elmot | 1:d0dfbce63a89 | 342 | #define SMBUS_FLAG_ARLO I2C_ISR_ARLO |
| elmot | 1:d0dfbce63a89 | 343 | #define SMBUS_FLAG_OVR I2C_ISR_OVR |
| elmot | 1:d0dfbce63a89 | 344 | #define SMBUS_FLAG_PECERR I2C_ISR_PECERR |
| elmot | 1:d0dfbce63a89 | 345 | #define SMBUS_FLAG_TIMEOUT I2C_ISR_TIMEOUT |
| elmot | 1:d0dfbce63a89 | 346 | #define SMBUS_FLAG_ALERT I2C_ISR_ALERT |
| elmot | 1:d0dfbce63a89 | 347 | #define SMBUS_FLAG_BUSY I2C_ISR_BUSY |
| elmot | 1:d0dfbce63a89 | 348 | #define SMBUS_FLAG_DIR I2C_ISR_DIR |
| elmot | 1:d0dfbce63a89 | 349 | /** |
| elmot | 1:d0dfbce63a89 | 350 | * @} |
| elmot | 1:d0dfbce63a89 | 351 | */ |
| elmot | 1:d0dfbce63a89 | 352 | |
| elmot | 1:d0dfbce63a89 | 353 | /** |
| elmot | 1:d0dfbce63a89 | 354 | * @} |
| elmot | 1:d0dfbce63a89 | 355 | */ |
| elmot | 1:d0dfbce63a89 | 356 | |
| elmot | 1:d0dfbce63a89 | 357 | /* Exported macros ------------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 358 | /** @defgroup SMBUS_Exported_Macros SMBUS Exported Macros |
| elmot | 1:d0dfbce63a89 | 359 | * @{ |
| elmot | 1:d0dfbce63a89 | 360 | */ |
| elmot | 1:d0dfbce63a89 | 361 | |
| elmot | 1:d0dfbce63a89 | 362 | /** @brief Reset SMBUS handle state. |
| elmot | 1:d0dfbce63a89 | 363 | * @param __HANDLE__: specifies the SMBUS Handle. |
| elmot | 1:d0dfbce63a89 | 364 | * @retval None |
| elmot | 1:d0dfbce63a89 | 365 | */ |
| elmot | 1:d0dfbce63a89 | 366 | #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET) |
| elmot | 1:d0dfbce63a89 | 367 | |
| elmot | 1:d0dfbce63a89 | 368 | /** @brief Enable the specified SMBUS interrupts. |
| elmot | 1:d0dfbce63a89 | 369 | * @param __HANDLE__: specifies the SMBUS Handle. |
| elmot | 1:d0dfbce63a89 | 370 | * @param __INTERRUPT__: specifies the interrupt source to enable. |
| elmot | 1:d0dfbce63a89 | 371 | * This parameter can be one of the following values: |
| elmot | 1:d0dfbce63a89 | 372 | * @arg SMBUS_IT_ERRI: Errors interrupt enable |
| elmot | 1:d0dfbce63a89 | 373 | * @arg SMBUS_IT_TCI: Transfer complete interrupt enable |
| elmot | 1:d0dfbce63a89 | 374 | * @arg SMBUS_IT_STOPI: STOP detection interrupt enable |
| elmot | 1:d0dfbce63a89 | 375 | * @arg SMBUS_IT_NACKI: NACK received interrupt enable |
| elmot | 1:d0dfbce63a89 | 376 | * @arg SMBUS_IT_ADDRI: Address match interrupt enable |
| elmot | 1:d0dfbce63a89 | 377 | * @arg SMBUS_IT_RXI: RX interrupt enable |
| elmot | 1:d0dfbce63a89 | 378 | * @arg SMBUS_IT_TXI: TX interrupt enable |
| elmot | 1:d0dfbce63a89 | 379 | * |
| elmot | 1:d0dfbce63a89 | 380 | * @retval None |
| elmot | 1:d0dfbce63a89 | 381 | */ |
| elmot | 1:d0dfbce63a89 | 382 | #define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) |
| elmot | 1:d0dfbce63a89 | 383 | |
| elmot | 1:d0dfbce63a89 | 384 | /** @brief Disable the specified SMBUS interrupts. |
| elmot | 1:d0dfbce63a89 | 385 | * @param __HANDLE__: specifies the SMBUS Handle. |
| elmot | 1:d0dfbce63a89 | 386 | * @param __INTERRUPT__: specifies the interrupt source to disable. |
| elmot | 1:d0dfbce63a89 | 387 | * This parameter can be one of the following values: |
| elmot | 1:d0dfbce63a89 | 388 | * @arg SMBUS_IT_ERRI: Errors interrupt enable |
| elmot | 1:d0dfbce63a89 | 389 | * @arg SMBUS_IT_TCI: Transfer complete interrupt enable |
| elmot | 1:d0dfbce63a89 | 390 | * @arg SMBUS_IT_STOPI: STOP detection interrupt enable |
| elmot | 1:d0dfbce63a89 | 391 | * @arg SMBUS_IT_NACKI: NACK received interrupt enable |
| elmot | 1:d0dfbce63a89 | 392 | * @arg SMBUS_IT_ADDRI: Address match interrupt enable |
| elmot | 1:d0dfbce63a89 | 393 | * @arg SMBUS_IT_RXI: RX interrupt enable |
| elmot | 1:d0dfbce63a89 | 394 | * @arg SMBUS_IT_TXI: TX interrupt enable |
| elmot | 1:d0dfbce63a89 | 395 | * |
| elmot | 1:d0dfbce63a89 | 396 | * @retval None |
| elmot | 1:d0dfbce63a89 | 397 | */ |
| elmot | 1:d0dfbce63a89 | 398 | #define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) |
| elmot | 1:d0dfbce63a89 | 399 | |
| elmot | 1:d0dfbce63a89 | 400 | /** @brief Check whether the specified SMBUS interrupt source is enabled or not. |
| elmot | 1:d0dfbce63a89 | 401 | * @param __HANDLE__: specifies the SMBUS Handle. |
| elmot | 1:d0dfbce63a89 | 402 | * @param __INTERRUPT__: specifies the SMBUS interrupt source to check. |
| elmot | 1:d0dfbce63a89 | 403 | * This parameter can be one of the following values: |
| elmot | 1:d0dfbce63a89 | 404 | * @arg SMBUS_IT_ERRI: Errors interrupt enable |
| elmot | 1:d0dfbce63a89 | 405 | * @arg SMBUS_IT_TCI: Transfer complete interrupt enable |
| elmot | 1:d0dfbce63a89 | 406 | * @arg SMBUS_IT_STOPI: STOP detection interrupt enable |
| elmot | 1:d0dfbce63a89 | 407 | * @arg SMBUS_IT_NACKI: NACK received interrupt enable |
| elmot | 1:d0dfbce63a89 | 408 | * @arg SMBUS_IT_ADDRI: Address match interrupt enable |
| elmot | 1:d0dfbce63a89 | 409 | * @arg SMBUS_IT_RXI: RX interrupt enable |
| elmot | 1:d0dfbce63a89 | 410 | * @arg SMBUS_IT_TXI: TX interrupt enable |
| elmot | 1:d0dfbce63a89 | 411 | * |
| elmot | 1:d0dfbce63a89 | 412 | * @retval The new state of __IT__ (TRUE or FALSE). |
| elmot | 1:d0dfbce63a89 | 413 | */ |
| elmot | 1:d0dfbce63a89 | 414 | #define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| elmot | 1:d0dfbce63a89 | 415 | |
| elmot | 1:d0dfbce63a89 | 416 | /** @brief Check whether the specified SMBUS flag is set or not. |
| elmot | 1:d0dfbce63a89 | 417 | * @param __HANDLE__: specifies the SMBUS Handle. |
| elmot | 1:d0dfbce63a89 | 418 | * @param __FLAG__: specifies the flag to check. |
| elmot | 1:d0dfbce63a89 | 419 | * This parameter can be one of the following values: |
| elmot | 1:d0dfbce63a89 | 420 | * @arg SMBUS_FLAG_TXE: Transmit data register empty |
| elmot | 1:d0dfbce63a89 | 421 | * @arg SMBUS_FLAG_TXIS: Transmit interrupt status |
| elmot | 1:d0dfbce63a89 | 422 | * @arg SMBUS_FLAG_RXNE: Receive data register not empty |
| elmot | 1:d0dfbce63a89 | 423 | * @arg SMBUS_FLAG_ADDR: Address matched (slave mode) |
| elmot | 1:d0dfbce63a89 | 424 | * @arg SMBUS_FLAG_AF: NACK received flag |
| elmot | 1:d0dfbce63a89 | 425 | * @arg SMBUS_FLAG_STOPF: STOP detection flag |
| elmot | 1:d0dfbce63a89 | 426 | * @arg SMBUS_FLAG_TC: Transfer complete (master mode) |
| elmot | 1:d0dfbce63a89 | 427 | * @arg SMBUS_FLAG_TCR: Transfer complete reload |
| elmot | 1:d0dfbce63a89 | 428 | * @arg SMBUS_FLAG_BERR: Bus error |
| elmot | 1:d0dfbce63a89 | 429 | * @arg SMBUS_FLAG_ARLO: Arbitration lost |
| elmot | 1:d0dfbce63a89 | 430 | * @arg SMBUS_FLAG_OVR: Overrun/Underrun |
| elmot | 1:d0dfbce63a89 | 431 | * @arg SMBUS_FLAG_PECERR: PEC error in reception |
| elmot | 1:d0dfbce63a89 | 432 | * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag |
| elmot | 1:d0dfbce63a89 | 433 | * @arg SMBUS_FLAG_ALERT: SMBus alert |
| elmot | 1:d0dfbce63a89 | 434 | * @arg SMBUS_FLAG_BUSY: Bus busy |
| elmot | 1:d0dfbce63a89 | 435 | * @arg SMBUS_FLAG_DIR: Transfer direction (slave mode) |
| elmot | 1:d0dfbce63a89 | 436 | * |
| elmot | 1:d0dfbce63a89 | 437 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| elmot | 1:d0dfbce63a89 | 438 | */ |
| elmot | 1:d0dfbce63a89 | 439 | #define SMBUS_FLAG_MASK ((uint32_t)0x0001FFFF) |
| elmot | 1:d0dfbce63a89 | 440 | #define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK))) |
| elmot | 1:d0dfbce63a89 | 441 | |
| elmot | 1:d0dfbce63a89 | 442 | /** @brief Clear the SMBUS pending flags which are cleared by writing 1 in a specific bit. |
| elmot | 1:d0dfbce63a89 | 443 | * @param __HANDLE__: specifies the SMBUS Handle. |
| elmot | 1:d0dfbce63a89 | 444 | * @param __FLAG__: specifies the flag to clear. |
| elmot | 1:d0dfbce63a89 | 445 | * This parameter can be any combination of the following values: |
| elmot | 1:d0dfbce63a89 | 446 | * @arg SMBUS_FLAG_ADDR: Address matched (slave mode) |
| elmot | 1:d0dfbce63a89 | 447 | * @arg SMBUS_FLAG_AF: NACK received flag |
| elmot | 1:d0dfbce63a89 | 448 | * @arg SMBUS_FLAG_STOPF: STOP detection flag |
| elmot | 1:d0dfbce63a89 | 449 | * @arg SMBUS_FLAG_BERR: Bus error |
| elmot | 1:d0dfbce63a89 | 450 | * @arg SMBUS_FLAG_ARLO: Arbitration lost |
| elmot | 1:d0dfbce63a89 | 451 | * @arg SMBUS_FLAG_OVR: Overrun/Underrun |
| elmot | 1:d0dfbce63a89 | 452 | * @arg SMBUS_FLAG_PECERR: PEC error in reception |
| elmot | 1:d0dfbce63a89 | 453 | * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag |
| elmot | 1:d0dfbce63a89 | 454 | * @arg SMBUS_FLAG_ALERT: SMBus alert |
| elmot | 1:d0dfbce63a89 | 455 | * |
| elmot | 1:d0dfbce63a89 | 456 | * @retval None |
| elmot | 1:d0dfbce63a89 | 457 | */ |
| elmot | 1:d0dfbce63a89 | 458 | #define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
| elmot | 1:d0dfbce63a89 | 459 | |
| elmot | 1:d0dfbce63a89 | 460 | /** @brief Enable the specified SMBUS peripheral. |
| elmot | 1:d0dfbce63a89 | 461 | * @param __HANDLE__: specifies the SMBUS Handle. |
| elmot | 1:d0dfbce63a89 | 462 | * @retval None |
| elmot | 1:d0dfbce63a89 | 463 | */ |
| elmot | 1:d0dfbce63a89 | 464 | #define __HAL_SMBUS_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) |
| elmot | 1:d0dfbce63a89 | 465 | |
| elmot | 1:d0dfbce63a89 | 466 | /** @brief Disable the specified SMBUS peripheral. |
| elmot | 1:d0dfbce63a89 | 467 | * @param __HANDLE__: specifies the SMBUS Handle. |
| elmot | 1:d0dfbce63a89 | 468 | * @retval None |
| elmot | 1:d0dfbce63a89 | 469 | */ |
| elmot | 1:d0dfbce63a89 | 470 | #define __HAL_SMBUS_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) |
| elmot | 1:d0dfbce63a89 | 471 | |
| elmot | 1:d0dfbce63a89 | 472 | /** @brief Generate a Non-Acknowledge SMBUS peripheral in Slave mode. |
| elmot | 1:d0dfbce63a89 | 473 | * @param __HANDLE__: specifies the SMBUS Handle. |
| elmot | 1:d0dfbce63a89 | 474 | * @retval None |
| elmot | 1:d0dfbce63a89 | 475 | */ |
| elmot | 1:d0dfbce63a89 | 476 | #define __HAL_SMBUS_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) |
| elmot | 1:d0dfbce63a89 | 477 | |
| elmot | 1:d0dfbce63a89 | 478 | /** |
| elmot | 1:d0dfbce63a89 | 479 | * @} |
| elmot | 1:d0dfbce63a89 | 480 | */ |
| elmot | 1:d0dfbce63a89 | 481 | |
| elmot | 1:d0dfbce63a89 | 482 | |
| elmot | 1:d0dfbce63a89 | 483 | /* Private constants ---------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 484 | |
| elmot | 1:d0dfbce63a89 | 485 | /* Private macros ------------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 486 | /** @defgroup SMBUS_Private_Macro SMBUS Private Macros |
| elmot | 1:d0dfbce63a89 | 487 | * @{ |
| elmot | 1:d0dfbce63a89 | 488 | */ |
| elmot | 1:d0dfbce63a89 | 489 | |
| elmot | 1:d0dfbce63a89 | 490 | #define IS_SMBUS_ANALOG_FILTER(FILTER) (((FILTER) == SMBUS_ANALOGFILTER_ENABLE) || \ |
| elmot | 1:d0dfbce63a89 | 491 | ((FILTER) == SMBUS_ANALOGFILTER_DISABLE)) |
| elmot | 1:d0dfbce63a89 | 492 | |
| elmot | 1:d0dfbce63a89 | 493 | #define IS_SMBUS_ADDRESSING_MODE(MODE) (((MODE) == SMBUS_ADDRESSINGMODE_7BIT) || \ |
| elmot | 1:d0dfbce63a89 | 494 | ((MODE) == SMBUS_ADDRESSINGMODE_10BIT)) |
| elmot | 1:d0dfbce63a89 | 495 | |
| elmot | 1:d0dfbce63a89 | 496 | #define IS_SMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == SMBUS_DUALADDRESS_DISABLE) || \ |
| elmot | 1:d0dfbce63a89 | 497 | ((ADDRESS) == SMBUS_DUALADDRESS_ENABLE)) |
| elmot | 1:d0dfbce63a89 | 498 | |
| elmot | 1:d0dfbce63a89 | 499 | #define IS_SMBUS_OWN_ADDRESS2_MASK(MASK) (((MASK) == SMBUS_OA2_NOMASK) || \ |
| elmot | 1:d0dfbce63a89 | 500 | ((MASK) == SMBUS_OA2_MASK01) || \ |
| elmot | 1:d0dfbce63a89 | 501 | ((MASK) == SMBUS_OA2_MASK02) || \ |
| elmot | 1:d0dfbce63a89 | 502 | ((MASK) == SMBUS_OA2_MASK03) || \ |
| elmot | 1:d0dfbce63a89 | 503 | ((MASK) == SMBUS_OA2_MASK04) || \ |
| elmot | 1:d0dfbce63a89 | 504 | ((MASK) == SMBUS_OA2_MASK05) || \ |
| elmot | 1:d0dfbce63a89 | 505 | ((MASK) == SMBUS_OA2_MASK06) || \ |
| elmot | 1:d0dfbce63a89 | 506 | ((MASK) == SMBUS_OA2_MASK07)) |
| elmot | 1:d0dfbce63a89 | 507 | |
| elmot | 1:d0dfbce63a89 | 508 | #define IS_SMBUS_GENERAL_CALL(CALL) (((CALL) == SMBUS_GENERALCALL_DISABLE) || \ |
| elmot | 1:d0dfbce63a89 | 509 | ((CALL) == SMBUS_GENERALCALL_ENABLE)) |
| elmot | 1:d0dfbce63a89 | 510 | |
| elmot | 1:d0dfbce63a89 | 511 | #define IS_SMBUS_NO_STRETCH(STRETCH) (((STRETCH) == SMBUS_NOSTRETCH_DISABLE) || \ |
| elmot | 1:d0dfbce63a89 | 512 | ((STRETCH) == SMBUS_NOSTRETCH_ENABLE)) |
| elmot | 1:d0dfbce63a89 | 513 | |
| elmot | 1:d0dfbce63a89 | 514 | #define IS_SMBUS_PEC(PEC) (((PEC) == SMBUS_PEC_DISABLE) || \ |
| elmot | 1:d0dfbce63a89 | 515 | ((PEC) == SMBUS_PEC_ENABLE)) |
| elmot | 1:d0dfbce63a89 | 516 | |
| elmot | 1:d0dfbce63a89 | 517 | #define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST) || \ |
| elmot | 1:d0dfbce63a89 | 518 | ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \ |
| elmot | 1:d0dfbce63a89 | 519 | ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP)) |
| elmot | 1:d0dfbce63a89 | 520 | |
| elmot | 1:d0dfbce63a89 | 521 | #define IS_SMBUS_TRANSFER_MODE(MODE) (((MODE) == SMBUS_RELOAD_MODE) || \ |
| elmot | 1:d0dfbce63a89 | 522 | ((MODE) == SMBUS_AUTOEND_MODE) || \ |
| elmot | 1:d0dfbce63a89 | 523 | ((MODE) == SMBUS_SOFTEND_MODE) || \ |
| elmot | 1:d0dfbce63a89 | 524 | ((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE)) || \ |
| elmot | 1:d0dfbce63a89 | 525 | ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) || \ |
| elmot | 1:d0dfbce63a89 | 526 | ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_RELOAD_MODE)) || \ |
| elmot | 1:d0dfbce63a89 | 527 | ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE | SMBUS_RELOAD_MODE ))) |
| elmot | 1:d0dfbce63a89 | 528 | |
| elmot | 1:d0dfbce63a89 | 529 | |
| elmot | 1:d0dfbce63a89 | 530 | #define IS_SMBUS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == SMBUS_GENERATE_STOP) || \ |
| elmot | 1:d0dfbce63a89 | 531 | ((REQUEST) == SMBUS_GENERATE_START_READ) || \ |
| elmot | 1:d0dfbce63a89 | 532 | ((REQUEST) == SMBUS_GENERATE_START_WRITE) || \ |
| elmot | 1:d0dfbce63a89 | 533 | ((REQUEST) == SMBUS_NO_STARTSTOP)) |
| elmot | 1:d0dfbce63a89 | 534 | |
| elmot | 1:d0dfbce63a89 | 535 | |
| elmot | 1:d0dfbce63a89 | 536 | #define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME) || \ |
| elmot | 1:d0dfbce63a89 | 537 | ((REQUEST) == SMBUS_NEXT_FRAME) || \ |
| elmot | 1:d0dfbce63a89 | 538 | ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \ |
| elmot | 1:d0dfbce63a89 | 539 | ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \ |
| elmot | 1:d0dfbce63a89 | 540 | ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \ |
| elmot | 1:d0dfbce63a89 | 541 | ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC)) |
| elmot | 1:d0dfbce63a89 | 542 | |
| elmot | 1:d0dfbce63a89 | 543 | #define SMBUS_RESET_CR1(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | I2C_CR1_PECEN))) |
| elmot | 1:d0dfbce63a89 | 544 | #define SMBUS_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) |
| elmot | 1:d0dfbce63a89 | 545 | |
| elmot | 1:d0dfbce63a89 | 546 | #define SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ |
| elmot | 1:d0dfbce63a89 | 547 | (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) |
| elmot | 1:d0dfbce63a89 | 548 | |
| elmot | 1:d0dfbce63a89 | 549 | #define SMBUS_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17) |
| elmot | 1:d0dfbce63a89 | 550 | #define SMBUS_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16) |
| elmot | 1:d0dfbce63a89 | 551 | #define SMBUS_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) |
| elmot | 1:d0dfbce63a89 | 552 | #define SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE) |
| elmot | 1:d0dfbce63a89 | 553 | #define SMBUS_GET_ALERT_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN) |
| elmot | 1:d0dfbce63a89 | 554 | |
| elmot | 1:d0dfbce63a89 | 555 | #define SMBUS_GET_ISR_REG(__HANDLE__) ((__HANDLE__)->Instance->ISR) |
| elmot | 1:d0dfbce63a89 | 556 | #define SMBUS_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK))) |
| elmot | 1:d0dfbce63a89 | 557 | |
| elmot | 1:d0dfbce63a89 | 558 | #define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF) |
| elmot | 1:d0dfbce63a89 | 559 | #define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF) |
| elmot | 1:d0dfbce63a89 | 560 | |
| elmot | 1:d0dfbce63a89 | 561 | /** |
| elmot | 1:d0dfbce63a89 | 562 | * @} |
| elmot | 1:d0dfbce63a89 | 563 | */ |
| elmot | 1:d0dfbce63a89 | 564 | |
| elmot | 1:d0dfbce63a89 | 565 | /* Private Functions ---------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 566 | /** @defgroup SMBUS_Private_Functions SMBUS Private Functions |
| elmot | 1:d0dfbce63a89 | 567 | * @{ |
| elmot | 1:d0dfbce63a89 | 568 | */ |
| elmot | 1:d0dfbce63a89 | 569 | /* Private functions are defined in stm32l4xx_hal_smbus.c file */ |
| elmot | 1:d0dfbce63a89 | 570 | /** |
| elmot | 1:d0dfbce63a89 | 571 | * @} |
| elmot | 1:d0dfbce63a89 | 572 | */ |
| elmot | 1:d0dfbce63a89 | 573 | |
| elmot | 1:d0dfbce63a89 | 574 | /* Exported functions --------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 575 | /** @addtogroup SMBUS_Exported_Functions SMBUS Exported Functions |
| elmot | 1:d0dfbce63a89 | 576 | * @{ |
| elmot | 1:d0dfbce63a89 | 577 | */ |
| elmot | 1:d0dfbce63a89 | 578 | |
| elmot | 1:d0dfbce63a89 | 579 | /** @addtogroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions |
| elmot | 1:d0dfbce63a89 | 580 | * @{ |
| elmot | 1:d0dfbce63a89 | 581 | */ |
| elmot | 1:d0dfbce63a89 | 582 | |
| elmot | 1:d0dfbce63a89 | 583 | /* Initialization and de-initialization functions **********************************/ |
| elmot | 1:d0dfbce63a89 | 584 | HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 585 | HAL_StatusTypeDef HAL_SMBUS_DeInit (SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 586 | void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 587 | void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 588 | |
| elmot | 1:d0dfbce63a89 | 589 | /** |
| elmot | 1:d0dfbce63a89 | 590 | * @} |
| elmot | 1:d0dfbce63a89 | 591 | */ |
| elmot | 1:d0dfbce63a89 | 592 | |
| elmot | 1:d0dfbce63a89 | 593 | /** @addtogroup SMBUS_Exported_Functions_Group2 Input and Output operation functions |
| elmot | 1:d0dfbce63a89 | 594 | * @{ |
| elmot | 1:d0dfbce63a89 | 595 | */ |
| elmot | 1:d0dfbce63a89 | 596 | |
| elmot | 1:d0dfbce63a89 | 597 | /* IO operation functions *****************************************************/ |
| elmot | 1:d0dfbce63a89 | 598 | /** @addtogroup Blocking_mode_Polling Blocking mode Polling |
| elmot | 1:d0dfbce63a89 | 599 | * @{ |
| elmot | 1:d0dfbce63a89 | 600 | */ |
| elmot | 1:d0dfbce63a89 | 601 | /******* Blocking mode: Polling */ |
| elmot | 1:d0dfbce63a89 | 602 | HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
| elmot | 1:d0dfbce63a89 | 603 | /** |
| elmot | 1:d0dfbce63a89 | 604 | * @} |
| elmot | 1:d0dfbce63a89 | 605 | */ |
| elmot | 1:d0dfbce63a89 | 606 | |
| elmot | 1:d0dfbce63a89 | 607 | /** @addtogroup Non-Blocking_mode_Interrupt Non-Blocking mode Interrupt |
| elmot | 1:d0dfbce63a89 | 608 | * @{ |
| elmot | 1:d0dfbce63a89 | 609 | */ |
| elmot | 1:d0dfbce63a89 | 610 | /******* Non-Blocking mode: Interrupt */ |
| elmot | 1:d0dfbce63a89 | 611 | HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| elmot | 1:d0dfbce63a89 | 612 | HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| elmot | 1:d0dfbce63a89 | 613 | HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress); |
| elmot | 1:d0dfbce63a89 | 614 | HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| elmot | 1:d0dfbce63a89 | 615 | HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| elmot | 1:d0dfbce63a89 | 616 | |
| elmot | 1:d0dfbce63a89 | 617 | HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 618 | HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 619 | HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 620 | HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 621 | /** |
| elmot | 1:d0dfbce63a89 | 622 | * @} |
| elmot | 1:d0dfbce63a89 | 623 | */ |
| elmot | 1:d0dfbce63a89 | 624 | |
| elmot | 1:d0dfbce63a89 | 625 | /** @addtogroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks |
| elmot | 1:d0dfbce63a89 | 626 | * @{ |
| elmot | 1:d0dfbce63a89 | 627 | */ |
| elmot | 1:d0dfbce63a89 | 628 | /******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */ |
| elmot | 1:d0dfbce63a89 | 629 | void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 630 | void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 631 | void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 632 | void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 633 | void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 634 | void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 635 | void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); |
| elmot | 1:d0dfbce63a89 | 636 | void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 637 | void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 638 | |
| elmot | 1:d0dfbce63a89 | 639 | /** |
| elmot | 1:d0dfbce63a89 | 640 | * @} |
| elmot | 1:d0dfbce63a89 | 641 | */ |
| elmot | 1:d0dfbce63a89 | 642 | |
| elmot | 1:d0dfbce63a89 | 643 | /** @addtogroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions |
| elmot | 1:d0dfbce63a89 | 644 | * @{ |
| elmot | 1:d0dfbce63a89 | 645 | */ |
| elmot | 1:d0dfbce63a89 | 646 | |
| elmot | 1:d0dfbce63a89 | 647 | /* Peripheral State and Errors functions **************************************************/ |
| elmot | 1:d0dfbce63a89 | 648 | uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 649 | uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus); |
| elmot | 1:d0dfbce63a89 | 650 | |
| elmot | 1:d0dfbce63a89 | 651 | /** |
| elmot | 1:d0dfbce63a89 | 652 | * @} |
| elmot | 1:d0dfbce63a89 | 653 | */ |
| elmot | 1:d0dfbce63a89 | 654 | |
| elmot | 1:d0dfbce63a89 | 655 | /** |
| elmot | 1:d0dfbce63a89 | 656 | * @} |
| elmot | 1:d0dfbce63a89 | 657 | */ |
| elmot | 1:d0dfbce63a89 | 658 | |
| elmot | 1:d0dfbce63a89 | 659 | |
| elmot | 1:d0dfbce63a89 | 660 | |
| elmot | 1:d0dfbce63a89 | 661 | /** |
| elmot | 1:d0dfbce63a89 | 662 | * @} |
| elmot | 1:d0dfbce63a89 | 663 | */ |
| elmot | 1:d0dfbce63a89 | 664 | |
| elmot | 1:d0dfbce63a89 | 665 | /** |
| elmot | 1:d0dfbce63a89 | 666 | * @} |
| elmot | 1:d0dfbce63a89 | 667 | */ |
| elmot | 1:d0dfbce63a89 | 668 | |
| elmot | 1:d0dfbce63a89 | 669 | /** |
| elmot | 1:d0dfbce63a89 | 670 | * @} |
| elmot | 1:d0dfbce63a89 | 671 | */ |
| elmot | 1:d0dfbce63a89 | 672 | #ifdef __cplusplus |
| elmot | 1:d0dfbce63a89 | 673 | } |
| elmot | 1:d0dfbce63a89 | 674 | #endif |
| elmot | 1:d0dfbce63a89 | 675 | |
| elmot | 1:d0dfbce63a89 | 676 | |
| elmot | 1:d0dfbce63a89 | 677 | #endif /* __STM32L4xx_HAL_SMBUS_H */ |
| elmot | 1:d0dfbce63a89 | 678 | |
| elmot | 1:d0dfbce63a89 | 679 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |