Important changes to repositories hosted on mbed.com
Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.
To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.
It is also possible to export all your personal repositories from the account settings page.
Timer input remapping
[TIM Exported Functions]
Functions | |
__STATIC_INLINE void | LL_TIM_SetRemap (TIM_TypeDef *TIMx, uint32_t Remap) |
Remap TIM inputs (input channel, internal/external triggers). |
Function Documentation
__STATIC_INLINE void LL_TIM_SetRemap | ( | TIM_TypeDef * | TIMx, |
uint32_t | Remap | ||
) |
Remap TIM inputs (input channel, internal/external triggers).
- Note:
- Macro IS_TIM_REMAP_INSTANCE(TIMx) can be used to check whether or not a some timer inputs can be remapped. TIM1_OR1 ETR_ADC1_RMP LL_TIM_SetRemap
TIM1_OR1 ETR_ADC3_RMP LL_TIM_SetRemap
TIM1_OR1 TI1_RMP LL_TIM_SetRemap
TIM8_OR1 ETR_ADC2_RMP LL_TIM_SetRemap
TIM8_OR1 ETR_ADC3_RMP LL_TIM_SetRemap
TIM8_OR1 TI1_RMP LL_TIM_SetRemap
TIM2_OR1 ITR1_RMP LL_TIM_SetRemap
TIM2_OR1 TI4_RMP LL_TIM_SetRemap
TIM2_OR1 TI1_RMP LL_TIM_SetRemap
TIM3_OR1 TI1_RMP LL_TIM_SetRemap
TIM15_OR1 TI1_RMP LL_TIM_SetRemap
TIM15_OR1 ENCODER_MODE LL_TIM_SetRemap
TIM16_OR1 TI1_RMP LL_TIM_SetRemap
TIM17_OR1 TI1_RMP LL_TIM_SetRemap
- Parameters:
-
TIMx Timer instance Remap Remap param depends on the TIMx. Description available only in CHM version of the User Manual (not in .pdf). Otherwise see Reference Manual description of OR registers.
Below description summarizes "Timer Instance" and "Remap" param combinations:
TIM1: any combination of TI1_RMP, ADC3_RMP, ADC1_RMP where
. . ADC1_RMP can be one of the following values
- LL_TIM_TIM1_ETR_ADC1_RMP_NC
- LL_TIM_TIM1_ETR_ADC1_RMP_AWD1
- LL_TIM_TIM1_ETR_ADC1_RMP_AWD2
- LL_TIM_TIM1_ETR_ADC1_RMP_AWD3
. . ADC3_RMP can be one of the following values
- LL_TIM_TIM1_ETR_ADC3_RMP_NC
- LL_TIM_TIM1_ETR_ADC3_RMP_AWD1
- LL_TIM_TIM1_ETR_ADC3_RMP_AWD2
- LL_TIM_TIM1_ETR_ADC3_RMP_AWD3
. . TI1_RMP can be one of the following values
- LL_TIM_TIM1_TI1_RMP_GPIO
- LL_TIM_TIM1_TI1_RMP_COMP1
TIM2: any combination of ITR1_RMP, ETR1_RMP, TI4_RMP where
ITR1_RMP can be one of the following values
- LL_TIM_TIM2_ITR1_RMP_TIM8_TRGO
- LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF
. . ETR1_RMP can be one of the following values
- LL_TIM_TIM2_ETR_RMP_GPIO
- LL_TIM_TIM2_ETR_RMP_LSE
. . TI4_RMP can be one of the following values
- LL_TIM_TIM2_TI4_RMP_GPIO
- LL_TIM_TIM2_TI4_RMP_COMP1
- LL_TIM_TIM2_TI4_RMP_COMP2
- LL_TIM_TIM2_TI4_RMP_COMP1_COMP2
TIM3: one of the following values
- LL_TIM_TIM3_TI1_RMP_GPIO
- LL_TIM_TIM3_TI1_RMP_COMP1
- LL_TIM_TIM3_TI1_RMP_COMP2
- LL_TIM_TIM3_TI1_RMP_COMP1_COMP2
TIM8: any combination of TI1_RMP, ADC3_RMP, ADC1_RMP where
. . ADC1_RMP can be one of the following values
- LL_TIM_TIM8_ETR_ADC2_RMP_NC
- LL_TIM_TIM8_ETR_ADC2_RMP_AWD1
- LL_TIM_TIM8_ETR_ADC2_RMP_AWD2
- LL_TIM_TIM8_ETR_ADC2_RMP_AWD3
. . ADC3_RMP can be one of the following values
- LL_TIM_TIM8_ETR_ADC3_RMP_NC
- LL_TIM_TIM8_ETR_ADC3_RMP_AWD1
- LL_TIM_TIM8_ETR_ADC3_RMP_AWD2
- LL_TIM_TIM8_ETR_ADC3_RMP_AWD3
. . TI1_RMP can be one of the following values
- LL_TIM_TIM8_TI1_RMP_GPIO
- LL_TIM_TIM8_TI1_RMP_COMP2
TIM15: any combination of TI1_RMP, ENCODER_MODE where
. . TI1_RMP can be one of the following values
- LL_TIM_TIM15_TI1_RMP_GPIO
- LL_TIM_TIM15_TI1_RMP_LSE
. . ENCODER_MODE can be one of the following values
- LL_TIM_TIM15_ENCODERMODE_NOREDIRECTION
- LL_TIM_TIM15_ENCODERMODE_TIM2
- LL_TIM_TIM15_ENCODERMODE_TIM3
- LL_TIM_TIM15_ENCODERMODE_TIM4
TIM16: one of the following values
- LL_TIM_TIM16_TI1_RMP_GPIO
- LL_TIM_TIM16_TI1_RMP_LSI
- LL_TIM_TIM16_TI1_RMP_LSE
- LL_TIM_TIM16_TI1_RMP_RTC
- LL_TIM_TIM16_TI1_RMP_MSI (*)
- LL_TIM_TIM16_TI1_RMP_HSE_32 (*)
- LL_TIM_TIM16_TI1_RMP_MCO (*)
TIM17: one of the following values
- LL_TIM_TIM17_TI1_RMP_GPIO
- LL_TIM_TIM17_TI1_RMP_MSI
- LL_TIM_TIM17_TI1_RMP_HSE_32
- LL_TIM_TIM17_TI1_RMP_MCO
(*) Value not defined in all devices.
- Return values:
-
None
Definition at line 3788 of file stm32l4xx_ll_tim.h.
Generated on Tue Jul 12 2022 11:00:16 by
