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HAL_L476/stm32l4xx_hal_smbus.c@1:d0dfbce63a89, 2017-02-24 (annotated)

Committer:
elmot
Date:
Fri Feb 24 21:13:56 2017 +0000
Revision:
1:d0dfbce63a89
Ready-to-copy

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elmot 1:d0dfbce63a89 1 /**
elmot 1:d0dfbce63a89 2 ******************************************************************************
elmot 1:d0dfbce63a89 3 * @file stm32l4xx_hal_smbus.c
elmot 1:d0dfbce63a89 4 * @author MCD Application Team
elmot 1:d0dfbce63a89 5 * @version V1.5.1
elmot 1:d0dfbce63a89 6 * @date 31-May-2016
elmot 1:d0dfbce63a89 7 * @brief SMBUS HAL module driver.
elmot 1:d0dfbce63a89 8 * This file provides firmware functions to manage the following
elmot 1:d0dfbce63a89 9 * functionalities of the System Management Bus (SMBus) peripheral,
elmot 1:d0dfbce63a89 10 * based on I2C principles of operation :
elmot 1:d0dfbce63a89 11 * + Initialization and de-initialization functions
elmot 1:d0dfbce63a89 12 * + IO operation functions
elmot 1:d0dfbce63a89 13 * + Peripheral State and Errors functions
elmot 1:d0dfbce63a89 14 *
elmot 1:d0dfbce63a89 15 @verbatim
elmot 1:d0dfbce63a89 16 ==============================================================================
elmot 1:d0dfbce63a89 17 ##### How to use this driver #####
elmot 1:d0dfbce63a89 18 ==============================================================================
elmot 1:d0dfbce63a89 19 [..]
elmot 1:d0dfbce63a89 20 The SMBUS HAL driver can be used as follows:
elmot 1:d0dfbce63a89 21
elmot 1:d0dfbce63a89 22 (#) Declare a SMBUS_HandleTypeDef handle structure, for example:
elmot 1:d0dfbce63a89 23 SMBUS_HandleTypeDef hsmbus;
elmot 1:d0dfbce63a89 24
elmot 1:d0dfbce63a89 25 (#)Initialize the SMBUS low level resources by implementing the HAL_SMBUS_MspInit() API:
elmot 1:d0dfbce63a89 26 (++) Enable the SMBUSx interface clock with __HAL_RCC_I2Cx_CLK_ENABLE()
elmot 1:d0dfbce63a89 27 (++) SMBUS pins configuration
elmot 1:d0dfbce63a89 28 (+++) Enable the clock for the SMBUS GPIOs
elmot 1:d0dfbce63a89 29 (+++) Configure SMBUS pins as alternate function open-drain
elmot 1:d0dfbce63a89 30 (++) NVIC configuration if you need to use interrupt process
elmot 1:d0dfbce63a89 31 (+++) Configure the SMBUSx interrupt priority
elmot 1:d0dfbce63a89 32 (+++) Enable the NVIC SMBUS IRQ Channel
elmot 1:d0dfbce63a89 33
elmot 1:d0dfbce63a89 34 (#) Configure the Communication Clock Timing, Bus Timeout, Own Address1, Master Addressing Mode,
elmot 1:d0dfbce63a89 35 Dual Addressing mode, Own Address2, Own Address2 Mask, General call, Nostretch mode,
elmot 1:d0dfbce63a89 36 Peripheral mode and Packet Error Check mode in the hsmbus Init structure.
elmot 1:d0dfbce63a89 37
elmot 1:d0dfbce63a89 38 (#) Initialize the SMBUS registers by calling the HAL_SMBUS_Init() API:
elmot 1:d0dfbce63a89 39 (++) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
elmot 1:d0dfbce63a89 40 by calling the customized HAL_SMBUS_MspInit(&hsmbus) API.
elmot 1:d0dfbce63a89 41
elmot 1:d0dfbce63a89 42 (#) To check if target device is ready for communication, use the function HAL_SMBUS_IsDeviceReady()
elmot 1:d0dfbce63a89 43
elmot 1:d0dfbce63a89 44 (#) For SMBUS IO operations, only one mode of operations is available within this driver :
elmot 1:d0dfbce63a89 45
elmot 1:d0dfbce63a89 46 *** Interrupt mode IO operation ***
elmot 1:d0dfbce63a89 47 ===================================
elmot 1:d0dfbce63a89 48 [..]
elmot 1:d0dfbce63a89 49 (+) Transmit in master/host SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Master_Transmit_IT()
elmot 1:d0dfbce63a89 50 (++) At transmission end of transfer HAL_SMBUS_MasterTxCpltCallback() is executed and user can
elmot 1:d0dfbce63a89 51 add his own code by customization of function pointer HAL_SMBUS_MasterTxCpltCallback()
elmot 1:d0dfbce63a89 52 (+) Receive in master/host SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Master_Receive_IT()
elmot 1:d0dfbce63a89 53 (++) At reception end of transfer HAL_SMBUS_MasterRxCpltCallback() is executed and user can
elmot 1:d0dfbce63a89 54 add his own code by customization of function pointer HAL_SMBUS_MasterRxCpltCallback()
elmot 1:d0dfbce63a89 55 (+) Abort a master/host SMBUS process communication with Interrupt using HAL_SMBUS_Master_Abort_IT()
elmot 1:d0dfbce63a89 56 (++) The associated previous transfer callback is called at the end of abort process
elmot 1:d0dfbce63a89 57 (++) mean HAL_SMBUS_MasterTxCpltCallback() in case of previous state was master transmit
elmot 1:d0dfbce63a89 58 (++) mean HAL_SMBUS_MasterRxCpltCallback() in case of previous state was master receive
elmot 1:d0dfbce63a89 59 (+) Enable/disable the Address listen mode in slave/device or host/slave SMBUS mode
elmot 1:d0dfbce63a89 60 using HAL_SMBUS_EnableListen_IT() HAL_SMBUS_DisableListen_IT()
elmot 1:d0dfbce63a89 61 (++) When address slave/device SMBUS match, HAL_SMBUS_AddrCallback() is executed and user can
elmot 1:d0dfbce63a89 62 add his own code to check the Address Match Code and the transmission direction request by master/host (Write/Read).
elmot 1:d0dfbce63a89 63 (++) At Listen mode end HAL_SMBUS_ListenCpltCallback() is executed and user can
elmot 1:d0dfbce63a89 64 add his own code by customization of function pointer HAL_SMBUS_ListenCpltCallback()
elmot 1:d0dfbce63a89 65 (+) Transmit in slave/device SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Slave_Transmit_IT()
elmot 1:d0dfbce63a89 66 (++) At transmission end of transfer HAL_SMBUS_SlaveTxCpltCallback() is executed and user can
elmot 1:d0dfbce63a89 67 add his own code by customization of function pointer HAL_SMBUS_SlaveTxCpltCallback()
elmot 1:d0dfbce63a89 68 (+) Receive in slave/device SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Slave_Receive_IT()
elmot 1:d0dfbce63a89 69 (++) At reception end of transfer HAL_SMBUS_SlaveRxCpltCallback() is executed and user can
elmot 1:d0dfbce63a89 70 add his own code by customization of function pointer HAL_SMBUS_SlaveRxCpltCallback()
elmot 1:d0dfbce63a89 71 (+) Enable/Disable the SMBUS alert mode using HAL_SMBUS_EnableAlert_IT() HAL_SMBUS_DisableAlert_IT()
elmot 1:d0dfbce63a89 72 (++) When SMBUS Alert is generated HAL_SMBUS_ErrorCallback() is executed and user can
elmot 1:d0dfbce63a89 73 add his own code by customization of function pointer HAL_SMBUS_ErrorCallback()
elmot 1:d0dfbce63a89 74 to check the Alert Error Code using function HAL_SMBUS_GetError()
elmot 1:d0dfbce63a89 75 (+) Get HAL state machine or error values using HAL_SMBUS_GetState() or HAL_SMBUS_GetError()
elmot 1:d0dfbce63a89 76 (+) In case of transfer Error, HAL_SMBUS_ErrorCallback() function is executed and user can
elmot 1:d0dfbce63a89 77 add his own code by customization of function pointer HAL_SMBUS_ErrorCallback()
elmot 1:d0dfbce63a89 78 to check the Error Code using function HAL_SMBUS_GetError()
elmot 1:d0dfbce63a89 79
elmot 1:d0dfbce63a89 80 *** SMBUS HAL driver macros list ***
elmot 1:d0dfbce63a89 81 ==================================
elmot 1:d0dfbce63a89 82 [..]
elmot 1:d0dfbce63a89 83 Below the list of most used macros in SMBUS HAL driver.
elmot 1:d0dfbce63a89 84
elmot 1:d0dfbce63a89 85 (+) __HAL_SMBUS_ENABLE: Enable the SMBUS peripheral
elmot 1:d0dfbce63a89 86 (+) __HAL_SMBUS_DISABLE: Disable the SMBUS peripheral
elmot 1:d0dfbce63a89 87 (+) __HAL_SMBUS_GET_FLAG : Checks whether the specified SMBUS flag is set or not
elmot 1:d0dfbce63a89 88 (+) __HAL_SMBUS_CLEAR_FLAG : Clears the specified SMBUS pending flag
elmot 1:d0dfbce63a89 89 (+) __HAL_SMBUS_ENABLE_IT: Enables the specified SMBUS interrupt
elmot 1:d0dfbce63a89 90 (+) __HAL_SMBUS_DISABLE_IT: Disables the specified SMBUS interrupt
elmot 1:d0dfbce63a89 91
elmot 1:d0dfbce63a89 92 [..]
elmot 1:d0dfbce63a89 93 (@) You can refer to the SMBUS HAL driver header file for more useful macros
elmot 1:d0dfbce63a89 94
elmot 1:d0dfbce63a89 95
elmot 1:d0dfbce63a89 96 @endverbatim
elmot 1:d0dfbce63a89 97 ******************************************************************************
elmot 1:d0dfbce63a89 98 * @attention
elmot 1:d0dfbce63a89 99 *
elmot 1:d0dfbce63a89 100 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot 1:d0dfbce63a89 101 *
elmot 1:d0dfbce63a89 102 * Redistribution and use in source and binary forms, with or without modification,
elmot 1:d0dfbce63a89 103 * are permitted provided that the following conditions are met:
elmot 1:d0dfbce63a89 104 * 1. Redistributions of source code must retain the above copyright notice,
elmot 1:d0dfbce63a89 105 * this list of conditions and the following disclaimer.
elmot 1:d0dfbce63a89 106 * 2. Redistributions in binary form must reproduce the above copyright notice,
elmot 1:d0dfbce63a89 107 * this list of conditions and the following disclaimer in the documentation
elmot 1:d0dfbce63a89 108 * and/or other materials provided with the distribution.
elmot 1:d0dfbce63a89 109 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot 1:d0dfbce63a89 110 * may be used to endorse or promote products derived from this software
elmot 1:d0dfbce63a89 111 * without specific prior written permission.
elmot 1:d0dfbce63a89 112 *
elmot 1:d0dfbce63a89 113 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot 1:d0dfbce63a89 114 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot 1:d0dfbce63a89 115 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot 1:d0dfbce63a89 116 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot 1:d0dfbce63a89 117 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot 1:d0dfbce63a89 118 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot 1:d0dfbce63a89 119 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot 1:d0dfbce63a89 120 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot 1:d0dfbce63a89 121 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot 1:d0dfbce63a89 122 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot 1:d0dfbce63a89 123 *
elmot 1:d0dfbce63a89 124 ******************************************************************************
elmot 1:d0dfbce63a89 125 */
elmot 1:d0dfbce63a89 126
elmot 1:d0dfbce63a89 127 /* Includes ------------------------------------------------------------------*/
elmot 1:d0dfbce63a89 128 #include "stm32l4xx_hal.h"
elmot 1:d0dfbce63a89 129
elmot 1:d0dfbce63a89 130 /** @addtogroup STM32L4xx_HAL_Driver
elmot 1:d0dfbce63a89 131 * @{
elmot 1:d0dfbce63a89 132 */
elmot 1:d0dfbce63a89 133
elmot 1:d0dfbce63a89 134 /** @defgroup SMBUS SMBUS
elmot 1:d0dfbce63a89 135 * @brief SMBUS HAL module driver
elmot 1:d0dfbce63a89 136 * @{
elmot 1:d0dfbce63a89 137 */
elmot 1:d0dfbce63a89 138
elmot 1:d0dfbce63a89 139 #ifdef HAL_SMBUS_MODULE_ENABLED
elmot 1:d0dfbce63a89 140
elmot 1:d0dfbce63a89 141 /* Private typedef -----------------------------------------------------------*/
elmot 1:d0dfbce63a89 142 /* Private constants ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 143 /** @defgroup SMBUS_Private_Define SMBUS Private Constants
elmot 1:d0dfbce63a89 144 * @{
elmot 1:d0dfbce63a89 145 */
elmot 1:d0dfbce63a89 146 #define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! SMBUS TIMING clear register Mask */
elmot 1:d0dfbce63a89 147 #define HAL_TIMEOUT_ADDR ((uint32_t)10000) /* 10 s */
elmot 1:d0dfbce63a89 148 #define HAL_TIMEOUT_BUSY ((uint32_t)25) /* 25 ms */
elmot 1:d0dfbce63a89 149 #define HAL_TIMEOUT_DIR ((uint32_t)25) /* 25 ms */
elmot 1:d0dfbce63a89 150 #define HAL_TIMEOUT_RXNE ((uint32_t)25) /* 25 ms */
elmot 1:d0dfbce63a89 151 #define HAL_TIMEOUT_STOPF ((uint32_t)25) /* 25 ms */
elmot 1:d0dfbce63a89 152 #define HAL_TIMEOUT_TC ((uint32_t)25) /* 25 ms */
elmot 1:d0dfbce63a89 153 #define HAL_TIMEOUT_TCR ((uint32_t)25) /* 25 ms */
elmot 1:d0dfbce63a89 154 #define HAL_TIMEOUT_TXIS ((uint32_t)25) /* 25 ms */
elmot 1:d0dfbce63a89 155 #define MAX_NBYTE_SIZE 255
elmot 1:d0dfbce63a89 156 /**
elmot 1:d0dfbce63a89 157 * @}
elmot 1:d0dfbce63a89 158 */
elmot 1:d0dfbce63a89 159
elmot 1:d0dfbce63a89 160 /* Private macro -------------------------------------------------------------*/
elmot 1:d0dfbce63a89 161 /* Private variables ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 162 /* Private function prototypes -----------------------------------------------*/
elmot 1:d0dfbce63a89 163 /** @addtogroup SMBUS_Private_Functions SMBUS Private Functions
elmot 1:d0dfbce63a89 164 * @{
elmot 1:d0dfbce63a89 165 */
elmot 1:d0dfbce63a89 166 static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
elmot 1:d0dfbce63a89 167
elmot 1:d0dfbce63a89 168 static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest);
elmot 1:d0dfbce63a89 169 static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest);
elmot 1:d0dfbce63a89 170 static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus);
elmot 1:d0dfbce63a89 171 static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus);
elmot 1:d0dfbce63a89 172
elmot 1:d0dfbce63a89 173 static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
elmot 1:d0dfbce63a89 174 /**
elmot 1:d0dfbce63a89 175 * @}
elmot 1:d0dfbce63a89 176 */
elmot 1:d0dfbce63a89 177
elmot 1:d0dfbce63a89 178 /* Exported functions --------------------------------------------------------*/
elmot 1:d0dfbce63a89 179
elmot 1:d0dfbce63a89 180 /** @defgroup SMBUS_Exported_Functions SMBUS Exported Functions
elmot 1:d0dfbce63a89 181 * @{
elmot 1:d0dfbce63a89 182 */
elmot 1:d0dfbce63a89 183
elmot 1:d0dfbce63a89 184 /** @defgroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
elmot 1:d0dfbce63a89 185 * @brief Initialization and Configuration functions
elmot 1:d0dfbce63a89 186 *
elmot 1:d0dfbce63a89 187 @verbatim
elmot 1:d0dfbce63a89 188 ===============================================================================
elmot 1:d0dfbce63a89 189 ##### Initialization and de-initialization functions #####
elmot 1:d0dfbce63a89 190 ===============================================================================
elmot 1:d0dfbce63a89 191 [..] This subsection provides a set of functions allowing to initialize and
elmot 1:d0dfbce63a89 192 de-initialize the SMBUSx peripheral:
elmot 1:d0dfbce63a89 193
elmot 1:d0dfbce63a89 194 (+) User must Implement HAL_SMBUS_MspInit() function in which he configures
elmot 1:d0dfbce63a89 195 all related peripherals resources (CLOCK, GPIO, IT and NVIC ).
elmot 1:d0dfbce63a89 196
elmot 1:d0dfbce63a89 197 (+) Call the function HAL_SMBUS_Init() to configure the selected device with
elmot 1:d0dfbce63a89 198 the selected configuration:
elmot 1:d0dfbce63a89 199 (++) Clock Timing
elmot 1:d0dfbce63a89 200 (++) Bus Timeout
elmot 1:d0dfbce63a89 201 (++) Analog Filer mode
elmot 1:d0dfbce63a89 202 (++) Own Address 1
elmot 1:d0dfbce63a89 203 (++) Addressing mode (Master, Slave)
elmot 1:d0dfbce63a89 204 (++) Dual Addressing mode
elmot 1:d0dfbce63a89 205 (++) Own Address 2
elmot 1:d0dfbce63a89 206 (++) Own Address 2 Mask
elmot 1:d0dfbce63a89 207 (++) General call mode
elmot 1:d0dfbce63a89 208 (++) Nostretch mode
elmot 1:d0dfbce63a89 209 (++) Packet Error Check mode
elmot 1:d0dfbce63a89 210 (++) Peripheral mode
elmot 1:d0dfbce63a89 211
elmot 1:d0dfbce63a89 212
elmot 1:d0dfbce63a89 213 (+) Call the function HAL_SMBUS_DeInit() to restore the default configuration
elmot 1:d0dfbce63a89 214 of the selected SMBUSx peripheral.
elmot 1:d0dfbce63a89 215
elmot 1:d0dfbce63a89 216 @endverbatim
elmot 1:d0dfbce63a89 217 * @{
elmot 1:d0dfbce63a89 218 */
elmot 1:d0dfbce63a89 219
elmot 1:d0dfbce63a89 220 /**
elmot 1:d0dfbce63a89 221 * @brief Initialize the SMBUS according to the specified parameters
elmot 1:d0dfbce63a89 222 * in the SMBUS_InitTypeDef and initialize the associated handle.
elmot 1:d0dfbce63a89 223 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 224 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 225 * @retval HAL status
elmot 1:d0dfbce63a89 226 */
elmot 1:d0dfbce63a89 227 HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 228 {
elmot 1:d0dfbce63a89 229 /* Check the SMBUS handle allocation */
elmot 1:d0dfbce63a89 230 if(hsmbus == NULL)
elmot 1:d0dfbce63a89 231 {
elmot 1:d0dfbce63a89 232 return HAL_ERROR;
elmot 1:d0dfbce63a89 233 }
elmot 1:d0dfbce63a89 234
elmot 1:d0dfbce63a89 235 /* Check the parameters */
elmot 1:d0dfbce63a89 236 assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
elmot 1:d0dfbce63a89 237 assert_param(IS_SMBUS_ANALOG_FILTER(hsmbus->Init.AnalogFilter));
elmot 1:d0dfbce63a89 238 assert_param(IS_SMBUS_OWN_ADDRESS1(hsmbus->Init.OwnAddress1));
elmot 1:d0dfbce63a89 239 assert_param(IS_SMBUS_ADDRESSING_MODE(hsmbus->Init.AddressingMode));
elmot 1:d0dfbce63a89 240 assert_param(IS_SMBUS_DUAL_ADDRESS(hsmbus->Init.DualAddressMode));
elmot 1:d0dfbce63a89 241 assert_param(IS_SMBUS_OWN_ADDRESS2(hsmbus->Init.OwnAddress2));
elmot 1:d0dfbce63a89 242 assert_param(IS_SMBUS_OWN_ADDRESS2_MASK(hsmbus->Init.OwnAddress2Masks));
elmot 1:d0dfbce63a89 243 assert_param(IS_SMBUS_GENERAL_CALL(hsmbus->Init.GeneralCallMode));
elmot 1:d0dfbce63a89 244 assert_param(IS_SMBUS_NO_STRETCH(hsmbus->Init.NoStretchMode));
elmot 1:d0dfbce63a89 245 assert_param(IS_SMBUS_PEC(hsmbus->Init.PacketErrorCheckMode));
elmot 1:d0dfbce63a89 246 assert_param(IS_SMBUS_PERIPHERAL_MODE(hsmbus->Init.PeripheralMode));
elmot 1:d0dfbce63a89 247
elmot 1:d0dfbce63a89 248 if(hsmbus->State == HAL_SMBUS_STATE_RESET)
elmot 1:d0dfbce63a89 249 {
elmot 1:d0dfbce63a89 250 /* Allocate lock resource and initialize it */
elmot 1:d0dfbce63a89 251 hsmbus->Lock = HAL_UNLOCKED;
elmot 1:d0dfbce63a89 252
elmot 1:d0dfbce63a89 253 /* Init the low level hardware : GPIO, CLOCK, NVIC */
elmot 1:d0dfbce63a89 254 HAL_SMBUS_MspInit(hsmbus);
elmot 1:d0dfbce63a89 255 }
elmot 1:d0dfbce63a89 256
elmot 1:d0dfbce63a89 257 hsmbus->State = HAL_SMBUS_STATE_BUSY;
elmot 1:d0dfbce63a89 258
elmot 1:d0dfbce63a89 259 /* Disable the selected SMBUS peripheral */
elmot 1:d0dfbce63a89 260 __HAL_SMBUS_DISABLE(hsmbus);
elmot 1:d0dfbce63a89 261
elmot 1:d0dfbce63a89 262 /*---------------------------- SMBUSx TIMINGR Configuration ------------------------*/
elmot 1:d0dfbce63a89 263 /* Configure SMBUSx: Frequency range */
elmot 1:d0dfbce63a89 264 hsmbus->Instance->TIMINGR = hsmbus->Init.Timing & TIMING_CLEAR_MASK;
elmot 1:d0dfbce63a89 265
elmot 1:d0dfbce63a89 266 /*---------------------------- SMBUSx TIMEOUTR Configuration ------------------------*/
elmot 1:d0dfbce63a89 267 /* Configure SMBUSx: Bus Timeout */
elmot 1:d0dfbce63a89 268 hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TIMOUTEN;
elmot 1:d0dfbce63a89 269 hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TEXTEN;
elmot 1:d0dfbce63a89 270 hsmbus->Instance->TIMEOUTR = hsmbus->Init.SMBusTimeout;
elmot 1:d0dfbce63a89 271
elmot 1:d0dfbce63a89 272 /*---------------------------- SMBUSx OAR1 Configuration -----------------------*/
elmot 1:d0dfbce63a89 273 /* Configure SMBUSx: Own Address1 and ack own address1 mode */
elmot 1:d0dfbce63a89 274 hsmbus->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
elmot 1:d0dfbce63a89 275
elmot 1:d0dfbce63a89 276 if(hsmbus->Init.OwnAddress1 != 0)
elmot 1:d0dfbce63a89 277 {
elmot 1:d0dfbce63a89 278 if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_7BIT)
elmot 1:d0dfbce63a89 279 {
elmot 1:d0dfbce63a89 280 hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | hsmbus->Init.OwnAddress1);
elmot 1:d0dfbce63a89 281 }
elmot 1:d0dfbce63a89 282 else /* SMBUS_ADDRESSINGMODE_10BIT */
elmot 1:d0dfbce63a89 283 {
elmot 1:d0dfbce63a89 284 hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hsmbus->Init.OwnAddress1);
elmot 1:d0dfbce63a89 285 }
elmot 1:d0dfbce63a89 286 }
elmot 1:d0dfbce63a89 287
elmot 1:d0dfbce63a89 288 /*---------------------------- SMBUSx CR2 Configuration ------------------------*/
elmot 1:d0dfbce63a89 289 /* Configure SMBUSx: Addressing Master mode */
elmot 1:d0dfbce63a89 290 if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_10BIT)
elmot 1:d0dfbce63a89 291 {
elmot 1:d0dfbce63a89 292 hsmbus->Instance->CR2 = (I2C_CR2_ADD10);
elmot 1:d0dfbce63a89 293 }
elmot 1:d0dfbce63a89 294 /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process) */
elmot 1:d0dfbce63a89 295 /* AUTOEND and NACK bit will be manage during Transfer process */
elmot 1:d0dfbce63a89 296 hsmbus->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
elmot 1:d0dfbce63a89 297
elmot 1:d0dfbce63a89 298 /*---------------------------- SMBUSx OAR2 Configuration -----------------------*/
elmot 1:d0dfbce63a89 299 /* Configure SMBUSx: Dual mode and Own Address2 */
elmot 1:d0dfbce63a89 300 hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | (hsmbus->Init.OwnAddress2Masks << 8));
elmot 1:d0dfbce63a89 301
elmot 1:d0dfbce63a89 302 /*---------------------------- SMBUSx CR1 Configuration ------------------------*/
elmot 1:d0dfbce63a89 303 /* Configure SMBUSx: Generalcall and NoStretch mode */
elmot 1:d0dfbce63a89 304 hsmbus->Instance->CR1 = (hsmbus->Init.GeneralCallMode | hsmbus->Init.NoStretchMode | hsmbus->Init.PacketErrorCheckMode | hsmbus->Init.PeripheralMode | hsmbus->Init.AnalogFilter);
elmot 1:d0dfbce63a89 305
elmot 1:d0dfbce63a89 306 /* Enable Slave Byte Control only in case of Packet Error Check is enabled and SMBUS Peripheral is set in Slave mode */
elmot 1:d0dfbce63a89 307 if( (hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLE)
elmot 1:d0dfbce63a89 308 && ( (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP) ) )
elmot 1:d0dfbce63a89 309 {
elmot 1:d0dfbce63a89 310 hsmbus->Instance->CR1 |= I2C_CR1_SBC;
elmot 1:d0dfbce63a89 311 }
elmot 1:d0dfbce63a89 312
elmot 1:d0dfbce63a89 313 /* Enable the selected SMBUS peripheral */
elmot 1:d0dfbce63a89 314 __HAL_SMBUS_ENABLE(hsmbus);
elmot 1:d0dfbce63a89 315
elmot 1:d0dfbce63a89 316 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
elmot 1:d0dfbce63a89 317 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 318 hsmbus->State = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 319
elmot 1:d0dfbce63a89 320 return HAL_OK;
elmot 1:d0dfbce63a89 321 }
elmot 1:d0dfbce63a89 322
elmot 1:d0dfbce63a89 323 /**
elmot 1:d0dfbce63a89 324 * @brief DeInitialize the SMBUS peripheral.
elmot 1:d0dfbce63a89 325 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 326 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 327 * @retval HAL status
elmot 1:d0dfbce63a89 328 */
elmot 1:d0dfbce63a89 329 HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 330 {
elmot 1:d0dfbce63a89 331 /* Check the SMBUS handle allocation */
elmot 1:d0dfbce63a89 332 if(hsmbus == NULL)
elmot 1:d0dfbce63a89 333 {
elmot 1:d0dfbce63a89 334 return HAL_ERROR;
elmot 1:d0dfbce63a89 335 }
elmot 1:d0dfbce63a89 336
elmot 1:d0dfbce63a89 337 /* Check the parameters */
elmot 1:d0dfbce63a89 338 assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
elmot 1:d0dfbce63a89 339
elmot 1:d0dfbce63a89 340 hsmbus->State = HAL_SMBUS_STATE_BUSY;
elmot 1:d0dfbce63a89 341
elmot 1:d0dfbce63a89 342 /* Disable the SMBUS Peripheral Clock */
elmot 1:d0dfbce63a89 343 __HAL_SMBUS_DISABLE(hsmbus);
elmot 1:d0dfbce63a89 344
elmot 1:d0dfbce63a89 345 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
elmot 1:d0dfbce63a89 346 HAL_SMBUS_MspDeInit(hsmbus);
elmot 1:d0dfbce63a89 347
elmot 1:d0dfbce63a89 348 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
elmot 1:d0dfbce63a89 349 hsmbus->PreviousState = HAL_SMBUS_STATE_RESET;
elmot 1:d0dfbce63a89 350 hsmbus->State = HAL_SMBUS_STATE_RESET;
elmot 1:d0dfbce63a89 351
elmot 1:d0dfbce63a89 352 /* Release Lock */
elmot 1:d0dfbce63a89 353 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 354
elmot 1:d0dfbce63a89 355 return HAL_OK;
elmot 1:d0dfbce63a89 356 }
elmot 1:d0dfbce63a89 357
elmot 1:d0dfbce63a89 358 /**
elmot 1:d0dfbce63a89 359 * @brief Initialize the SMBUS MSP.
elmot 1:d0dfbce63a89 360 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 361 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 362 * @retval None
elmot 1:d0dfbce63a89 363 */
elmot 1:d0dfbce63a89 364 __weak void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 365 {
elmot 1:d0dfbce63a89 366 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 367 UNUSED(hsmbus);
elmot 1:d0dfbce63a89 368
elmot 1:d0dfbce63a89 369 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 370 the HAL_SMBUS_MspInit could be implemented in the user file
elmot 1:d0dfbce63a89 371 */
elmot 1:d0dfbce63a89 372 }
elmot 1:d0dfbce63a89 373
elmot 1:d0dfbce63a89 374 /**
elmot 1:d0dfbce63a89 375 * @brief DeInitialize the SMBUS MSP.
elmot 1:d0dfbce63a89 376 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 377 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 378 * @retval None
elmot 1:d0dfbce63a89 379 */
elmot 1:d0dfbce63a89 380 __weak void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 381 {
elmot 1:d0dfbce63a89 382 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 383 UNUSED(hsmbus);
elmot 1:d0dfbce63a89 384
elmot 1:d0dfbce63a89 385 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 386 the HAL_SMBUS_MspDeInit could be implemented in the user file
elmot 1:d0dfbce63a89 387 */
elmot 1:d0dfbce63a89 388 }
elmot 1:d0dfbce63a89 389
elmot 1:d0dfbce63a89 390 /**
elmot 1:d0dfbce63a89 391 * @}
elmot 1:d0dfbce63a89 392 */
elmot 1:d0dfbce63a89 393
elmot 1:d0dfbce63a89 394 /** @defgroup SMBUS_Exported_Functions_Group2 Input and Output operation functions
elmot 1:d0dfbce63a89 395 * @brief Data transfers functions
elmot 1:d0dfbce63a89 396 *
elmot 1:d0dfbce63a89 397 @verbatim
elmot 1:d0dfbce63a89 398 ===============================================================================
elmot 1:d0dfbce63a89 399 ##### IO operation functions #####
elmot 1:d0dfbce63a89 400 ===============================================================================
elmot 1:d0dfbce63a89 401 [..]
elmot 1:d0dfbce63a89 402 This subsection provides a set of functions allowing to manage the SMBUS data
elmot 1:d0dfbce63a89 403 transfers.
elmot 1:d0dfbce63a89 404
elmot 1:d0dfbce63a89 405 (#) Blocking mode function to check if device is ready for usage is :
elmot 1:d0dfbce63a89 406 (++) HAL_SMBUS_IsDeviceReady()
elmot 1:d0dfbce63a89 407
elmot 1:d0dfbce63a89 408 (#) There is only one mode of transfer:
elmot 1:d0dfbce63a89 409 (++) No-Blocking mode : The communication is performed using Interrupts.
elmot 1:d0dfbce63a89 410 These functions return the status of the transfer startup.
elmot 1:d0dfbce63a89 411 The end of the data processing will be indicated through the
elmot 1:d0dfbce63a89 412 dedicated SMBUS IRQ when using Interrupt mode.
elmot 1:d0dfbce63a89 413
elmot 1:d0dfbce63a89 414 (#) No-Blocking mode functions with Interrupt are :
elmot 1:d0dfbce63a89 415 (++) HAL_SMBUS_Master_Transmit_IT()
elmot 1:d0dfbce63a89 416 (++) HAL_SMBUS_Master_Receive_IT()
elmot 1:d0dfbce63a89 417 (++) HAL_SMBUS_Slave_Transmit_IT()
elmot 1:d0dfbce63a89 418 (++) HAL_SMBUS_Slave_Receive_IT()
elmot 1:d0dfbce63a89 419 (++) HAL_SMBUS_EnableListen_IT() or alias HAL_SMBUS_EnableListen_IT()
elmot 1:d0dfbce63a89 420 (++) HAL_SMBUS_DisableListen_IT()
elmot 1:d0dfbce63a89 421 (++) HAL_SMBUS_EnableAlert_IT()
elmot 1:d0dfbce63a89 422 (++) HAL_SMBUS_DisableAlert_IT()
elmot 1:d0dfbce63a89 423
elmot 1:d0dfbce63a89 424 (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
elmot 1:d0dfbce63a89 425 (++) HAL_SMBUS_MasterTxCpltCallback()
elmot 1:d0dfbce63a89 426 (++) HAL_SMBUS_MasterRxCpltCallback()
elmot 1:d0dfbce63a89 427 (++) HAL_SMBUS_SlaveTxCpltCallback()
elmot 1:d0dfbce63a89 428 (++) HAL_SMBUS_SlaveRxCpltCallback()
elmot 1:d0dfbce63a89 429 (++) HAL_SMBUS_AddrCallback()
elmot 1:d0dfbce63a89 430 (++) HAL_SMBUS_ListenCpltCallback()
elmot 1:d0dfbce63a89 431 (++) HAL_SMBUS_ErrorCallback()
elmot 1:d0dfbce63a89 432
elmot 1:d0dfbce63a89 433 @endverbatim
elmot 1:d0dfbce63a89 434 * @{
elmot 1:d0dfbce63a89 435 */
elmot 1:d0dfbce63a89 436
elmot 1:d0dfbce63a89 437 /**
elmot 1:d0dfbce63a89 438 * @brief Transmit in master/host SMBUS mode an amount of data in non-blocking mode with Interrupt.
elmot 1:d0dfbce63a89 439 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 440 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 441 * @param DevAddress: Target device address
elmot 1:d0dfbce63a89 442 * @param pData: Pointer to data buffer
elmot 1:d0dfbce63a89 443 * @param Size: Amount of data to be sent
elmot 1:d0dfbce63a89 444 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
elmot 1:d0dfbce63a89 445 * @retval HAL status
elmot 1:d0dfbce63a89 446 */
elmot 1:d0dfbce63a89 447 HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
elmot 1:d0dfbce63a89 448 {
elmot 1:d0dfbce63a89 449 /* Check the parameters */
elmot 1:d0dfbce63a89 450 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
elmot 1:d0dfbce63a89 451
elmot 1:d0dfbce63a89 452 if(hsmbus->State == HAL_SMBUS_STATE_READY)
elmot 1:d0dfbce63a89 453 {
elmot 1:d0dfbce63a89 454 /* Process Locked */
elmot 1:d0dfbce63a89 455 __HAL_LOCK(hsmbus);
elmot 1:d0dfbce63a89 456
elmot 1:d0dfbce63a89 457 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX;
elmot 1:d0dfbce63a89 458 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
elmot 1:d0dfbce63a89 459 /* Prepare transfer parameters */
elmot 1:d0dfbce63a89 460 hsmbus->pBuffPtr = pData;
elmot 1:d0dfbce63a89 461 hsmbus->XferCount = Size;
elmot 1:d0dfbce63a89 462 hsmbus->XferOptions = XferOptions;
elmot 1:d0dfbce63a89 463
elmot 1:d0dfbce63a89 464 /* In case of Quick command, remove autoend mode */
elmot 1:d0dfbce63a89 465 /* Manage the stop generation by software */
elmot 1:d0dfbce63a89 466 if(hsmbus->pBuffPtr == NULL)
elmot 1:d0dfbce63a89 467 {
elmot 1:d0dfbce63a89 468 hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
elmot 1:d0dfbce63a89 469 }
elmot 1:d0dfbce63a89 470
elmot 1:d0dfbce63a89 471 if(Size > MAX_NBYTE_SIZE)
elmot 1:d0dfbce63a89 472 {
elmot 1:d0dfbce63a89 473 hsmbus->XferSize = MAX_NBYTE_SIZE;
elmot 1:d0dfbce63a89 474 }
elmot 1:d0dfbce63a89 475 else
elmot 1:d0dfbce63a89 476 {
elmot 1:d0dfbce63a89 477 hsmbus->XferSize = Size;
elmot 1:d0dfbce63a89 478 }
elmot 1:d0dfbce63a89 479
elmot 1:d0dfbce63a89 480 /* Send Slave Address */
elmot 1:d0dfbce63a89 481 /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
elmot 1:d0dfbce63a89 482 if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
elmot 1:d0dfbce63a89 483 {
elmot 1:d0dfbce63a89 484 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_WRITE);
elmot 1:d0dfbce63a89 485 }
elmot 1:d0dfbce63a89 486 else
elmot 1:d0dfbce63a89 487 {
elmot 1:d0dfbce63a89 488 /* If transfer direction not change, do not generate Restart Condition */
elmot 1:d0dfbce63a89 489 /* Mean Previous state is same as current state */
elmot 1:d0dfbce63a89 490 if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX)
elmot 1:d0dfbce63a89 491 {
elmot 1:d0dfbce63a89 492 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
elmot 1:d0dfbce63a89 493 }
elmot 1:d0dfbce63a89 494 /* Else transfer direction change, so generate Restart with new transfer direction */
elmot 1:d0dfbce63a89 495 else
elmot 1:d0dfbce63a89 496 {
elmot 1:d0dfbce63a89 497 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_WRITE);
elmot 1:d0dfbce63a89 498 }
elmot 1:d0dfbce63a89 499
elmot 1:d0dfbce63a89 500 /* If PEC mode is enable, size to transmit manage by SW part should be Size-1 byte, corresponding to PEC byte */
elmot 1:d0dfbce63a89 501 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
elmot 1:d0dfbce63a89 502 if(SMBUS_GET_PEC_MODE(hsmbus) != RESET)
elmot 1:d0dfbce63a89 503 {
elmot 1:d0dfbce63a89 504 hsmbus->XferSize--;
elmot 1:d0dfbce63a89 505 hsmbus->XferCount--;
elmot 1:d0dfbce63a89 506 }
elmot 1:d0dfbce63a89 507 }
elmot 1:d0dfbce63a89 508
elmot 1:d0dfbce63a89 509 /* Process Unlocked */
elmot 1:d0dfbce63a89 510 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 511
elmot 1:d0dfbce63a89 512 /* Note : The SMBUS interrupts must be enabled after unlocking current process
elmot 1:d0dfbce63a89 513 to avoid the risk of SMBUS interrupt handle execution before current
elmot 1:d0dfbce63a89 514 process unlock */
elmot 1:d0dfbce63a89 515 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX);
elmot 1:d0dfbce63a89 516
elmot 1:d0dfbce63a89 517 return HAL_OK;
elmot 1:d0dfbce63a89 518 }
elmot 1:d0dfbce63a89 519 else
elmot 1:d0dfbce63a89 520 {
elmot 1:d0dfbce63a89 521 return HAL_BUSY;
elmot 1:d0dfbce63a89 522 }
elmot 1:d0dfbce63a89 523 }
elmot 1:d0dfbce63a89 524
elmot 1:d0dfbce63a89 525 /**
elmot 1:d0dfbce63a89 526 * @brief Receive in master/host SMBUS mode an amount of data in non-blocking mode with Interrupt.
elmot 1:d0dfbce63a89 527 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 528 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 529 * @param DevAddress: Target device address
elmot 1:d0dfbce63a89 530 * @param pData: Pointer to data buffer
elmot 1:d0dfbce63a89 531 * @param Size: Amount of data to be sent
elmot 1:d0dfbce63a89 532 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
elmot 1:d0dfbce63a89 533 * @retval HAL status
elmot 1:d0dfbce63a89 534 */
elmot 1:d0dfbce63a89 535 HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
elmot 1:d0dfbce63a89 536 {
elmot 1:d0dfbce63a89 537 /* Check the parameters */
elmot 1:d0dfbce63a89 538 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
elmot 1:d0dfbce63a89 539
elmot 1:d0dfbce63a89 540 if(hsmbus->State == HAL_SMBUS_STATE_READY)
elmot 1:d0dfbce63a89 541 {
elmot 1:d0dfbce63a89 542 /* Process Locked */
elmot 1:d0dfbce63a89 543 __HAL_LOCK(hsmbus);
elmot 1:d0dfbce63a89 544
elmot 1:d0dfbce63a89 545 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX;
elmot 1:d0dfbce63a89 546 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
elmot 1:d0dfbce63a89 547
elmot 1:d0dfbce63a89 548 /* Prepare transfer parameters */
elmot 1:d0dfbce63a89 549 hsmbus->pBuffPtr = pData;
elmot 1:d0dfbce63a89 550 hsmbus->XferCount = Size;
elmot 1:d0dfbce63a89 551 hsmbus->XferOptions = XferOptions;
elmot 1:d0dfbce63a89 552
elmot 1:d0dfbce63a89 553 /* In case of Quick command, remove autoend mode */
elmot 1:d0dfbce63a89 554 /* Manage the stop generation by software */
elmot 1:d0dfbce63a89 555 if(hsmbus->pBuffPtr == NULL)
elmot 1:d0dfbce63a89 556 {
elmot 1:d0dfbce63a89 557 hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
elmot 1:d0dfbce63a89 558 }
elmot 1:d0dfbce63a89 559
elmot 1:d0dfbce63a89 560 if(Size > MAX_NBYTE_SIZE)
elmot 1:d0dfbce63a89 561 {
elmot 1:d0dfbce63a89 562 hsmbus->XferSize = MAX_NBYTE_SIZE;
elmot 1:d0dfbce63a89 563 }
elmot 1:d0dfbce63a89 564 else
elmot 1:d0dfbce63a89 565 {
elmot 1:d0dfbce63a89 566 hsmbus->XferSize = Size;
elmot 1:d0dfbce63a89 567 }
elmot 1:d0dfbce63a89 568
elmot 1:d0dfbce63a89 569 /* Send Slave Address */
elmot 1:d0dfbce63a89 570 /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
elmot 1:d0dfbce63a89 571 if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
elmot 1:d0dfbce63a89 572 {
elmot 1:d0dfbce63a89 573 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_READ);
elmot 1:d0dfbce63a89 574 }
elmot 1:d0dfbce63a89 575 else
elmot 1:d0dfbce63a89 576 {
elmot 1:d0dfbce63a89 577 /* If transfer direction not change, do not generate Restart Condition */
elmot 1:d0dfbce63a89 578 /* Mean Previous state is same as current state */
elmot 1:d0dfbce63a89 579 if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX)
elmot 1:d0dfbce63a89 580 {
elmot 1:d0dfbce63a89 581 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
elmot 1:d0dfbce63a89 582 }
elmot 1:d0dfbce63a89 583 /* Else transfer direction change, so generate Restart with new transfer direction */
elmot 1:d0dfbce63a89 584 else
elmot 1:d0dfbce63a89 585 {
elmot 1:d0dfbce63a89 586 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_READ);
elmot 1:d0dfbce63a89 587 }
elmot 1:d0dfbce63a89 588 }
elmot 1:d0dfbce63a89 589
elmot 1:d0dfbce63a89 590 /* Process Unlocked */
elmot 1:d0dfbce63a89 591 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 592
elmot 1:d0dfbce63a89 593 /* Note : The SMBUS interrupts must be enabled after unlocking current process
elmot 1:d0dfbce63a89 594 to avoid the risk of SMBUS interrupt handle execution before current
elmot 1:d0dfbce63a89 595 process unlock */
elmot 1:d0dfbce63a89 596 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX);
elmot 1:d0dfbce63a89 597
elmot 1:d0dfbce63a89 598 return HAL_OK;
elmot 1:d0dfbce63a89 599 }
elmot 1:d0dfbce63a89 600 else
elmot 1:d0dfbce63a89 601 {
elmot 1:d0dfbce63a89 602 return HAL_BUSY;
elmot 1:d0dfbce63a89 603 }
elmot 1:d0dfbce63a89 604 }
elmot 1:d0dfbce63a89 605
elmot 1:d0dfbce63a89 606 /**
elmot 1:d0dfbce63a89 607 * @brief Abort a master/host SMBUS process communication with Interrupt.
elmot 1:d0dfbce63a89 608 * @note This abort can be called only if state is ready
elmot 1:d0dfbce63a89 609 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 610 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 611 * @param DevAddress: Target device address
elmot 1:d0dfbce63a89 612 * @retval HAL status
elmot 1:d0dfbce63a89 613 */
elmot 1:d0dfbce63a89 614 HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress)
elmot 1:d0dfbce63a89 615 {
elmot 1:d0dfbce63a89 616 if(hsmbus->State == HAL_SMBUS_STATE_READY)
elmot 1:d0dfbce63a89 617 {
elmot 1:d0dfbce63a89 618 /* Process Locked */
elmot 1:d0dfbce63a89 619 __HAL_LOCK(hsmbus);
elmot 1:d0dfbce63a89 620
elmot 1:d0dfbce63a89 621 /* Keep the same state as previous */
elmot 1:d0dfbce63a89 622 /* to perform as well the call of the corresponding end of transfer callback */
elmot 1:d0dfbce63a89 623 if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX)
elmot 1:d0dfbce63a89 624 {
elmot 1:d0dfbce63a89 625 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX;
elmot 1:d0dfbce63a89 626 }
elmot 1:d0dfbce63a89 627 else if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX)
elmot 1:d0dfbce63a89 628 {
elmot 1:d0dfbce63a89 629 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX;
elmot 1:d0dfbce63a89 630 }
elmot 1:d0dfbce63a89 631 else
elmot 1:d0dfbce63a89 632 {
elmot 1:d0dfbce63a89 633 /* Wrong usage of abort function */
elmot 1:d0dfbce63a89 634 /* This function should be used only in case of abort monitored by master device */
elmot 1:d0dfbce63a89 635 return HAL_ERROR;
elmot 1:d0dfbce63a89 636 }
elmot 1:d0dfbce63a89 637 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
elmot 1:d0dfbce63a89 638
elmot 1:d0dfbce63a89 639 /* Set NBYTES to 1 to generate a dummy read on SMBUS peripheral */
elmot 1:d0dfbce63a89 640 /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
elmot 1:d0dfbce63a89 641 SMBUS_TransferConfig(hsmbus, DevAddress, 1, SMBUS_AUTOEND_MODE, SMBUS_NO_STARTSTOP);
elmot 1:d0dfbce63a89 642
elmot 1:d0dfbce63a89 643 /* Process Unlocked */
elmot 1:d0dfbce63a89 644 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 645
elmot 1:d0dfbce63a89 646 /* Note : The SMBUS interrupts must be enabled after unlocking current process
elmot 1:d0dfbce63a89 647 to avoid the risk of SMBUS interrupt handle execution before current
elmot 1:d0dfbce63a89 648 process unlock */
elmot 1:d0dfbce63a89 649 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
elmot 1:d0dfbce63a89 650 {
elmot 1:d0dfbce63a89 651 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX);
elmot 1:d0dfbce63a89 652 }
elmot 1:d0dfbce63a89 653 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
elmot 1:d0dfbce63a89 654 {
elmot 1:d0dfbce63a89 655 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX);
elmot 1:d0dfbce63a89 656 }
elmot 1:d0dfbce63a89 657
elmot 1:d0dfbce63a89 658 return HAL_OK;
elmot 1:d0dfbce63a89 659 }
elmot 1:d0dfbce63a89 660 else
elmot 1:d0dfbce63a89 661 {
elmot 1:d0dfbce63a89 662 return HAL_BUSY;
elmot 1:d0dfbce63a89 663 }
elmot 1:d0dfbce63a89 664 }
elmot 1:d0dfbce63a89 665
elmot 1:d0dfbce63a89 666 /**
elmot 1:d0dfbce63a89 667 * @brief Transmit in slave/device SMBUS mode an amount of data in non-blocking mode with Interrupt.
elmot 1:d0dfbce63a89 668 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 669 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 670 * @param pData: Pointer to data buffer
elmot 1:d0dfbce63a89 671 * @param Size: Amount of data to be sent
elmot 1:d0dfbce63a89 672 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
elmot 1:d0dfbce63a89 673 * @retval HAL status
elmot 1:d0dfbce63a89 674 */
elmot 1:d0dfbce63a89 675 HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
elmot 1:d0dfbce63a89 676 {
elmot 1:d0dfbce63a89 677 /* Check the parameters */
elmot 1:d0dfbce63a89 678 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
elmot 1:d0dfbce63a89 679
elmot 1:d0dfbce63a89 680 if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
elmot 1:d0dfbce63a89 681 {
elmot 1:d0dfbce63a89 682 if((pData == NULL) || (Size == 0))
elmot 1:d0dfbce63a89 683 {
elmot 1:d0dfbce63a89 684 return HAL_ERROR;
elmot 1:d0dfbce63a89 685 }
elmot 1:d0dfbce63a89 686
elmot 1:d0dfbce63a89 687 /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
elmot 1:d0dfbce63a89 688 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_TX);
elmot 1:d0dfbce63a89 689
elmot 1:d0dfbce63a89 690 /* Process Locked */
elmot 1:d0dfbce63a89 691 __HAL_LOCK(hsmbus);
elmot 1:d0dfbce63a89 692
elmot 1:d0dfbce63a89 693 hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_TX;
elmot 1:d0dfbce63a89 694 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
elmot 1:d0dfbce63a89 695
elmot 1:d0dfbce63a89 696 /* Set SBC bit to manage Acknowledge at each bit */
elmot 1:d0dfbce63a89 697 hsmbus->Instance->CR1 |= I2C_CR1_SBC;
elmot 1:d0dfbce63a89 698
elmot 1:d0dfbce63a89 699 /* Enable Address Acknowledge */
elmot 1:d0dfbce63a89 700 hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
elmot 1:d0dfbce63a89 701
elmot 1:d0dfbce63a89 702 /* Prepare transfer parameters */
elmot 1:d0dfbce63a89 703 hsmbus->pBuffPtr = pData;
elmot 1:d0dfbce63a89 704 hsmbus->XferSize = Size;
elmot 1:d0dfbce63a89 705 hsmbus->XferCount = Size;
elmot 1:d0dfbce63a89 706 hsmbus->XferOptions = XferOptions;
elmot 1:d0dfbce63a89 707
elmot 1:d0dfbce63a89 708 if(Size > MAX_NBYTE_SIZE)
elmot 1:d0dfbce63a89 709 {
elmot 1:d0dfbce63a89 710 hsmbus->XferSize = MAX_NBYTE_SIZE;
elmot 1:d0dfbce63a89 711 }
elmot 1:d0dfbce63a89 712 else
elmot 1:d0dfbce63a89 713 {
elmot 1:d0dfbce63a89 714 hsmbus->XferSize = Size;
elmot 1:d0dfbce63a89 715 }
elmot 1:d0dfbce63a89 716
elmot 1:d0dfbce63a89 717 /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
elmot 1:d0dfbce63a89 718 if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
elmot 1:d0dfbce63a89 719 {
elmot 1:d0dfbce63a89 720 SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
elmot 1:d0dfbce63a89 721 }
elmot 1:d0dfbce63a89 722 else
elmot 1:d0dfbce63a89 723 {
elmot 1:d0dfbce63a89 724 /* Set NBYTE to transmit */
elmot 1:d0dfbce63a89 725 SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
elmot 1:d0dfbce63a89 726
elmot 1:d0dfbce63a89 727 /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
elmot 1:d0dfbce63a89 728 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
elmot 1:d0dfbce63a89 729 if(SMBUS_GET_PEC_MODE(hsmbus) != RESET)
elmot 1:d0dfbce63a89 730 {
elmot 1:d0dfbce63a89 731 hsmbus->XferSize--;
elmot 1:d0dfbce63a89 732 hsmbus->XferCount--;
elmot 1:d0dfbce63a89 733 }
elmot 1:d0dfbce63a89 734 }
elmot 1:d0dfbce63a89 735
elmot 1:d0dfbce63a89 736 /* Clear ADDR flag after prepare the transfer parameters */
elmot 1:d0dfbce63a89 737 /* This action will generate an acknowledge to the HOST */
elmot 1:d0dfbce63a89 738 __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
elmot 1:d0dfbce63a89 739
elmot 1:d0dfbce63a89 740 /* Process Unlocked */
elmot 1:d0dfbce63a89 741 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 742
elmot 1:d0dfbce63a89 743 /* Note : The SMBUS interrupts must be enabled after unlocking current process
elmot 1:d0dfbce63a89 744 to avoid the risk of SMBUS interrupt handle execution before current
elmot 1:d0dfbce63a89 745 process unlock */
elmot 1:d0dfbce63a89 746 /* REnable ADDR interrupt */
elmot 1:d0dfbce63a89 747 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX | SMBUS_IT_ADDR);
elmot 1:d0dfbce63a89 748
elmot 1:d0dfbce63a89 749 return HAL_OK;
elmot 1:d0dfbce63a89 750 }
elmot 1:d0dfbce63a89 751 else
elmot 1:d0dfbce63a89 752 {
elmot 1:d0dfbce63a89 753 return HAL_ERROR;
elmot 1:d0dfbce63a89 754 }
elmot 1:d0dfbce63a89 755 }
elmot 1:d0dfbce63a89 756
elmot 1:d0dfbce63a89 757 /**
elmot 1:d0dfbce63a89 758 * @brief Receive in slave/device SMBUS mode an amount of data in non-blocking mode with Interrupt.
elmot 1:d0dfbce63a89 759 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 760 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 761 * @param pData: Pointer to data buffer
elmot 1:d0dfbce63a89 762 * @param Size: Amount of data to be sent
elmot 1:d0dfbce63a89 763 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
elmot 1:d0dfbce63a89 764 * @retval HAL status
elmot 1:d0dfbce63a89 765 */
elmot 1:d0dfbce63a89 766 HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
elmot 1:d0dfbce63a89 767 {
elmot 1:d0dfbce63a89 768 /* Check the parameters */
elmot 1:d0dfbce63a89 769 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
elmot 1:d0dfbce63a89 770
elmot 1:d0dfbce63a89 771 if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
elmot 1:d0dfbce63a89 772 {
elmot 1:d0dfbce63a89 773 if((pData == NULL) || (Size == 0))
elmot 1:d0dfbce63a89 774 {
elmot 1:d0dfbce63a89 775 return HAL_ERROR;
elmot 1:d0dfbce63a89 776 }
elmot 1:d0dfbce63a89 777
elmot 1:d0dfbce63a89 778 /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
elmot 1:d0dfbce63a89 779 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_RX);
elmot 1:d0dfbce63a89 780
elmot 1:d0dfbce63a89 781 /* Process Locked */
elmot 1:d0dfbce63a89 782 __HAL_LOCK(hsmbus);
elmot 1:d0dfbce63a89 783
elmot 1:d0dfbce63a89 784 hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_RX;
elmot 1:d0dfbce63a89 785 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
elmot 1:d0dfbce63a89 786
elmot 1:d0dfbce63a89 787 /* Set SBC bit to manage Acknowledge at each bit */
elmot 1:d0dfbce63a89 788 hsmbus->Instance->CR1 |= I2C_CR1_SBC;
elmot 1:d0dfbce63a89 789
elmot 1:d0dfbce63a89 790 /* Enable Address Acknowledge */
elmot 1:d0dfbce63a89 791 hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
elmot 1:d0dfbce63a89 792
elmot 1:d0dfbce63a89 793 /* Prepare transfer parameters */
elmot 1:d0dfbce63a89 794 hsmbus->pBuffPtr = pData;
elmot 1:d0dfbce63a89 795 hsmbus->XferSize = Size;
elmot 1:d0dfbce63a89 796 hsmbus->XferCount = Size;
elmot 1:d0dfbce63a89 797 hsmbus->XferOptions = XferOptions;
elmot 1:d0dfbce63a89 798
elmot 1:d0dfbce63a89 799 /* Set NBYTE to receive */
elmot 1:d0dfbce63a89 800 /* If XferSize equal "1", or XferSize equal "2" with PEC requested (mean 1 data byte + 1 PEC byte */
elmot 1:d0dfbce63a89 801 /* no need to set RELOAD bit mode, a ACK will be automatically generated in that case */
elmot 1:d0dfbce63a89 802 /* else need to set RELOAD bit mode to generate an automatic ACK at each byte Received */
elmot 1:d0dfbce63a89 803 /* This RELOAD bit will be reset for last BYTE to be receive in SMBUS_Slave_ISR */
elmot 1:d0dfbce63a89 804 if((hsmbus->XferSize == 1) || ((hsmbus->XferSize == 2) && (SMBUS_GET_PEC_MODE(hsmbus) != RESET)))
elmot 1:d0dfbce63a89 805 {
elmot 1:d0dfbce63a89 806 SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
elmot 1:d0dfbce63a89 807 }
elmot 1:d0dfbce63a89 808 else
elmot 1:d0dfbce63a89 809 {
elmot 1:d0dfbce63a89 810 SMBUS_TransferConfig(hsmbus,0, 1, hsmbus->XferOptions | SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP);
elmot 1:d0dfbce63a89 811 }
elmot 1:d0dfbce63a89 812
elmot 1:d0dfbce63a89 813 /* Clear ADDR flag after prepare the transfer parameters */
elmot 1:d0dfbce63a89 814 /* This action will generate an acknowledge to the HOST */
elmot 1:d0dfbce63a89 815 __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
elmot 1:d0dfbce63a89 816
elmot 1:d0dfbce63a89 817 /* Process Unlocked */
elmot 1:d0dfbce63a89 818 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 819
elmot 1:d0dfbce63a89 820 /* Note : The SMBUS interrupts must be enabled after unlocking current process
elmot 1:d0dfbce63a89 821 to avoid the risk of SMBUS interrupt handle execution before current
elmot 1:d0dfbce63a89 822 process unlock */
elmot 1:d0dfbce63a89 823 /* REnable ADDR interrupt */
elmot 1:d0dfbce63a89 824 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_ADDR);
elmot 1:d0dfbce63a89 825
elmot 1:d0dfbce63a89 826 return HAL_OK;
elmot 1:d0dfbce63a89 827 }
elmot 1:d0dfbce63a89 828 else
elmot 1:d0dfbce63a89 829 {
elmot 1:d0dfbce63a89 830 return HAL_ERROR;
elmot 1:d0dfbce63a89 831 }
elmot 1:d0dfbce63a89 832 }
elmot 1:d0dfbce63a89 833
elmot 1:d0dfbce63a89 834 /**
elmot 1:d0dfbce63a89 835 * @brief Enable the Address listen mode with Interrupt.
elmot 1:d0dfbce63a89 836 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 837 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 838 * @retval HAL status
elmot 1:d0dfbce63a89 839 */
elmot 1:d0dfbce63a89 840 HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 841 {
elmot 1:d0dfbce63a89 842 hsmbus->State = HAL_SMBUS_STATE_LISTEN;
elmot 1:d0dfbce63a89 843
elmot 1:d0dfbce63a89 844 /* Enable the Address Match interrupt */
elmot 1:d0dfbce63a89 845 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ADDR);
elmot 1:d0dfbce63a89 846
elmot 1:d0dfbce63a89 847 return HAL_OK;
elmot 1:d0dfbce63a89 848 }
elmot 1:d0dfbce63a89 849
elmot 1:d0dfbce63a89 850 /**
elmot 1:d0dfbce63a89 851 * @brief Disable the Address listen mode with Interrupt.
elmot 1:d0dfbce63a89 852 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 853 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 854 * @retval HAL status
elmot 1:d0dfbce63a89 855 */
elmot 1:d0dfbce63a89 856 HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 857 {
elmot 1:d0dfbce63a89 858 /* Disable Address listen mode only if a transfer is not ongoing */
elmot 1:d0dfbce63a89 859 if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
elmot 1:d0dfbce63a89 860 {
elmot 1:d0dfbce63a89 861 hsmbus->State = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 862
elmot 1:d0dfbce63a89 863 /* Disable the Address Match interrupt */
elmot 1:d0dfbce63a89 864 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR);
elmot 1:d0dfbce63a89 865
elmot 1:d0dfbce63a89 866 return HAL_OK;
elmot 1:d0dfbce63a89 867 }
elmot 1:d0dfbce63a89 868 else
elmot 1:d0dfbce63a89 869 {
elmot 1:d0dfbce63a89 870 return HAL_BUSY;
elmot 1:d0dfbce63a89 871 }
elmot 1:d0dfbce63a89 872 }
elmot 1:d0dfbce63a89 873
elmot 1:d0dfbce63a89 874 /**
elmot 1:d0dfbce63a89 875 * @brief Enable the SMBUS alert mode with Interrupt.
elmot 1:d0dfbce63a89 876 * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 877 * the configuration information for the specified SMBUSx peripheral.
elmot 1:d0dfbce63a89 878 * @retval HAL status
elmot 1:d0dfbce63a89 879 */
elmot 1:d0dfbce63a89 880 HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 881 {
elmot 1:d0dfbce63a89 882 /* Enable SMBus alert */
elmot 1:d0dfbce63a89 883 hsmbus->Instance->CR1 |= I2C_CR1_ALERTEN;
elmot 1:d0dfbce63a89 884
elmot 1:d0dfbce63a89 885 /* Clear ALERT flag */
elmot 1:d0dfbce63a89 886 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT);
elmot 1:d0dfbce63a89 887
elmot 1:d0dfbce63a89 888 /* Enable Alert Interrupt */
elmot 1:d0dfbce63a89 889 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ALERT);
elmot 1:d0dfbce63a89 890
elmot 1:d0dfbce63a89 891 return HAL_OK;
elmot 1:d0dfbce63a89 892 }
elmot 1:d0dfbce63a89 893 /**
elmot 1:d0dfbce63a89 894 * @brief Disable the SMBUS alert mode with Interrupt.
elmot 1:d0dfbce63a89 895 * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 896 * the configuration information for the specified SMBUSx peripheral.
elmot 1:d0dfbce63a89 897 * @retval HAL status
elmot 1:d0dfbce63a89 898 */
elmot 1:d0dfbce63a89 899 HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 900 {
elmot 1:d0dfbce63a89 901 /* Enable SMBus alert */
elmot 1:d0dfbce63a89 902 hsmbus->Instance->CR1 &= ~I2C_CR1_ALERTEN;
elmot 1:d0dfbce63a89 903
elmot 1:d0dfbce63a89 904 /* Disable Alert Interrupt */
elmot 1:d0dfbce63a89 905 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ALERT);
elmot 1:d0dfbce63a89 906
elmot 1:d0dfbce63a89 907 return HAL_OK;
elmot 1:d0dfbce63a89 908 }
elmot 1:d0dfbce63a89 909
elmot 1:d0dfbce63a89 910 /**
elmot 1:d0dfbce63a89 911 * @brief Check if target device is ready for communication.
elmot 1:d0dfbce63a89 912 * @note This function is used with Memory devices
elmot 1:d0dfbce63a89 913 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 914 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 915 * @param DevAddress: Target device address
elmot 1:d0dfbce63a89 916 * @param Trials: Number of trials
elmot 1:d0dfbce63a89 917 * @param Timeout: Timeout duration
elmot 1:d0dfbce63a89 918 * @retval HAL status
elmot 1:d0dfbce63a89 919 */
elmot 1:d0dfbce63a89 920 HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
elmot 1:d0dfbce63a89 921 {
elmot 1:d0dfbce63a89 922 uint32_t tickstart = 0;
elmot 1:d0dfbce63a89 923
elmot 1:d0dfbce63a89 924 __IO uint32_t SMBUS_Trials = 0;
elmot 1:d0dfbce63a89 925
elmot 1:d0dfbce63a89 926 if(hsmbus->State == HAL_SMBUS_STATE_READY)
elmot 1:d0dfbce63a89 927 {
elmot 1:d0dfbce63a89 928 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BUSY) != RESET)
elmot 1:d0dfbce63a89 929 {
elmot 1:d0dfbce63a89 930 return HAL_BUSY;
elmot 1:d0dfbce63a89 931 }
elmot 1:d0dfbce63a89 932
elmot 1:d0dfbce63a89 933 /* Process Locked */
elmot 1:d0dfbce63a89 934 __HAL_LOCK(hsmbus);
elmot 1:d0dfbce63a89 935
elmot 1:d0dfbce63a89 936 hsmbus->State = HAL_SMBUS_STATE_BUSY;
elmot 1:d0dfbce63a89 937 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
elmot 1:d0dfbce63a89 938
elmot 1:d0dfbce63a89 939 do
elmot 1:d0dfbce63a89 940 {
elmot 1:d0dfbce63a89 941 /* Generate Start */
elmot 1:d0dfbce63a89 942 hsmbus->Instance->CR2 = SMBUS_GENERATE_START(hsmbus->Init.AddressingMode,DevAddress);
elmot 1:d0dfbce63a89 943
elmot 1:d0dfbce63a89 944 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
elmot 1:d0dfbce63a89 945 /* Wait until STOPF flag is set or a NACK flag is set*/
elmot 1:d0dfbce63a89 946 tickstart = HAL_GetTick();
elmot 1:d0dfbce63a89 947 while((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) == RESET) && (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET) && (hsmbus->State != HAL_SMBUS_STATE_TIMEOUT))
elmot 1:d0dfbce63a89 948 {
elmot 1:d0dfbce63a89 949 if(Timeout != HAL_MAX_DELAY)
elmot 1:d0dfbce63a89 950 {
elmot 1:d0dfbce63a89 951 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
elmot 1:d0dfbce63a89 952 {
elmot 1:d0dfbce63a89 953 /* Device is ready */
elmot 1:d0dfbce63a89 954 hsmbus->State = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 955
elmot 1:d0dfbce63a89 956 /* Process Unlocked */
elmot 1:d0dfbce63a89 957 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 958 return HAL_TIMEOUT;
elmot 1:d0dfbce63a89 959 }
elmot 1:d0dfbce63a89 960 }
elmot 1:d0dfbce63a89 961 }
elmot 1:d0dfbce63a89 962
elmot 1:d0dfbce63a89 963 /* Check if the NACKF flag has not been set */
elmot 1:d0dfbce63a89 964 if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET)
elmot 1:d0dfbce63a89 965 {
elmot 1:d0dfbce63a89 966 /* Wait until STOPF flag is reset */
elmot 1:d0dfbce63a89 967 if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
elmot 1:d0dfbce63a89 968 {
elmot 1:d0dfbce63a89 969 return HAL_TIMEOUT;
elmot 1:d0dfbce63a89 970 }
elmot 1:d0dfbce63a89 971
elmot 1:d0dfbce63a89 972 /* Clear STOP Flag */
elmot 1:d0dfbce63a89 973 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
elmot 1:d0dfbce63a89 974
elmot 1:d0dfbce63a89 975 /* Device is ready */
elmot 1:d0dfbce63a89 976 hsmbus->State = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 977
elmot 1:d0dfbce63a89 978 /* Process Unlocked */
elmot 1:d0dfbce63a89 979 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 980
elmot 1:d0dfbce63a89 981 return HAL_OK;
elmot 1:d0dfbce63a89 982 }
elmot 1:d0dfbce63a89 983 else
elmot 1:d0dfbce63a89 984 {
elmot 1:d0dfbce63a89 985 /* Wait until STOPF flag is reset */
elmot 1:d0dfbce63a89 986 if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
elmot 1:d0dfbce63a89 987 {
elmot 1:d0dfbce63a89 988 return HAL_TIMEOUT;
elmot 1:d0dfbce63a89 989 }
elmot 1:d0dfbce63a89 990
elmot 1:d0dfbce63a89 991 /* Clear NACK Flag */
elmot 1:d0dfbce63a89 992 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
elmot 1:d0dfbce63a89 993
elmot 1:d0dfbce63a89 994 /* Clear STOP Flag, auto generated with autoend*/
elmot 1:d0dfbce63a89 995 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
elmot 1:d0dfbce63a89 996 }
elmot 1:d0dfbce63a89 997
elmot 1:d0dfbce63a89 998 /* Check if the maximum allowed number of trials has been reached */
elmot 1:d0dfbce63a89 999 if (SMBUS_Trials++ == Trials)
elmot 1:d0dfbce63a89 1000 {
elmot 1:d0dfbce63a89 1001 /* Generate Stop */
elmot 1:d0dfbce63a89 1002 hsmbus->Instance->CR2 |= I2C_CR2_STOP;
elmot 1:d0dfbce63a89 1003
elmot 1:d0dfbce63a89 1004 /* Wait until STOPF flag is reset */
elmot 1:d0dfbce63a89 1005 if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
elmot 1:d0dfbce63a89 1006 {
elmot 1:d0dfbce63a89 1007 return HAL_TIMEOUT;
elmot 1:d0dfbce63a89 1008 }
elmot 1:d0dfbce63a89 1009
elmot 1:d0dfbce63a89 1010 /* Clear STOP Flag */
elmot 1:d0dfbce63a89 1011 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
elmot 1:d0dfbce63a89 1012 }
elmot 1:d0dfbce63a89 1013 }while(SMBUS_Trials < Trials);
elmot 1:d0dfbce63a89 1014
elmot 1:d0dfbce63a89 1015 hsmbus->State = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 1016
elmot 1:d0dfbce63a89 1017 /* Process Unlocked */
elmot 1:d0dfbce63a89 1018 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1019
elmot 1:d0dfbce63a89 1020 return HAL_TIMEOUT;
elmot 1:d0dfbce63a89 1021 }
elmot 1:d0dfbce63a89 1022 else
elmot 1:d0dfbce63a89 1023 {
elmot 1:d0dfbce63a89 1024 return HAL_BUSY;
elmot 1:d0dfbce63a89 1025 }
elmot 1:d0dfbce63a89 1026 }
elmot 1:d0dfbce63a89 1027 /**
elmot 1:d0dfbce63a89 1028 * @}
elmot 1:d0dfbce63a89 1029 */
elmot 1:d0dfbce63a89 1030
elmot 1:d0dfbce63a89 1031 /** @defgroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
elmot 1:d0dfbce63a89 1032 * @{
elmot 1:d0dfbce63a89 1033 */
elmot 1:d0dfbce63a89 1034
elmot 1:d0dfbce63a89 1035 /**
elmot 1:d0dfbce63a89 1036 * @brief Handle SMBUS event interrupt request.
elmot 1:d0dfbce63a89 1037 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1038 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1039 * @retval None
elmot 1:d0dfbce63a89 1040 */
elmot 1:d0dfbce63a89 1041 void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 1042 {
elmot 1:d0dfbce63a89 1043 uint32_t tmpisrvalue = 0;
elmot 1:d0dfbce63a89 1044
elmot 1:d0dfbce63a89 1045 /* Use a local variable to store the current ISR flags */
elmot 1:d0dfbce63a89 1046 /* This action will avoid a wrong treatment due to ISR flags change during interrupt handler */
elmot 1:d0dfbce63a89 1047 tmpisrvalue = SMBUS_GET_ISR_REG(hsmbus);
elmot 1:d0dfbce63a89 1048
elmot 1:d0dfbce63a89 1049 /* SMBUS in mode Transmitter ---------------------------------------------------*/
elmot 1:d0dfbce63a89 1050 if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TXIS) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI| SMBUS_IT_STOPI| SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET))
elmot 1:d0dfbce63a89 1051 {
elmot 1:d0dfbce63a89 1052 /* Slave mode selected */
elmot 1:d0dfbce63a89 1053 if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
elmot 1:d0dfbce63a89 1054 {
elmot 1:d0dfbce63a89 1055 SMBUS_Slave_ISR(hsmbus);
elmot 1:d0dfbce63a89 1056 }
elmot 1:d0dfbce63a89 1057 /* Master mode selected */
elmot 1:d0dfbce63a89 1058 else if((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_TX) == HAL_SMBUS_STATE_MASTER_BUSY_TX)
elmot 1:d0dfbce63a89 1059 {
elmot 1:d0dfbce63a89 1060 SMBUS_Master_ISR(hsmbus);
elmot 1:d0dfbce63a89 1061 }
elmot 1:d0dfbce63a89 1062 }
elmot 1:d0dfbce63a89 1063
elmot 1:d0dfbce63a89 1064 /* SMBUS in mode Receiver ----------------------------------------------------*/
elmot 1:d0dfbce63a89 1065 if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_RXNE) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI| SMBUS_IT_STOPI| SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET))
elmot 1:d0dfbce63a89 1066 {
elmot 1:d0dfbce63a89 1067 /* Slave mode selected */
elmot 1:d0dfbce63a89 1068 if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)
elmot 1:d0dfbce63a89 1069 {
elmot 1:d0dfbce63a89 1070 SMBUS_Slave_ISR(hsmbus);
elmot 1:d0dfbce63a89 1071 }
elmot 1:d0dfbce63a89 1072 /* Master mode selected */
elmot 1:d0dfbce63a89 1073 else if((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_RX) == HAL_SMBUS_STATE_MASTER_BUSY_RX)
elmot 1:d0dfbce63a89 1074 {
elmot 1:d0dfbce63a89 1075 SMBUS_Master_ISR(hsmbus);
elmot 1:d0dfbce63a89 1076 }
elmot 1:d0dfbce63a89 1077 }
elmot 1:d0dfbce63a89 1078
elmot 1:d0dfbce63a89 1079 /* SMBUS in mode Listener Only --------------------------------------------------*/
elmot 1:d0dfbce63a89 1080 if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_ADDR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET))
elmot 1:d0dfbce63a89 1081 && ((__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ADDRI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_STOPI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_NACKI) != RESET)))
elmot 1:d0dfbce63a89 1082 {
elmot 1:d0dfbce63a89 1083 if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
elmot 1:d0dfbce63a89 1084 {
elmot 1:d0dfbce63a89 1085 SMBUS_Slave_ISR(hsmbus);
elmot 1:d0dfbce63a89 1086 }
elmot 1:d0dfbce63a89 1087 }
elmot 1:d0dfbce63a89 1088 }
elmot 1:d0dfbce63a89 1089
elmot 1:d0dfbce63a89 1090 /**
elmot 1:d0dfbce63a89 1091 * @brief Handle SMBUS error interrupt request.
elmot 1:d0dfbce63a89 1092 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1093 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1094 * @retval None
elmot 1:d0dfbce63a89 1095 */
elmot 1:d0dfbce63a89 1096 void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 1097 {
elmot 1:d0dfbce63a89 1098 /* SMBUS Bus error interrupt occurred ------------------------------------*/
elmot 1:d0dfbce63a89 1099 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BERR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
elmot 1:d0dfbce63a89 1100 {
elmot 1:d0dfbce63a89 1101 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BERR;
elmot 1:d0dfbce63a89 1102
elmot 1:d0dfbce63a89 1103 /* Clear BERR flag */
elmot 1:d0dfbce63a89 1104 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_BERR);
elmot 1:d0dfbce63a89 1105 }
elmot 1:d0dfbce63a89 1106
elmot 1:d0dfbce63a89 1107 /* SMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/
elmot 1:d0dfbce63a89 1108 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_OVR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
elmot 1:d0dfbce63a89 1109 {
elmot 1:d0dfbce63a89 1110 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_OVR;
elmot 1:d0dfbce63a89 1111
elmot 1:d0dfbce63a89 1112 /* Clear OVR flag */
elmot 1:d0dfbce63a89 1113 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_OVR);
elmot 1:d0dfbce63a89 1114 }
elmot 1:d0dfbce63a89 1115
elmot 1:d0dfbce63a89 1116 /* SMBUS Arbitration Loss error interrupt occurred ------------------------------------*/
elmot 1:d0dfbce63a89 1117 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ARLO) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
elmot 1:d0dfbce63a89 1118 {
elmot 1:d0dfbce63a89 1119 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ARLO;
elmot 1:d0dfbce63a89 1120
elmot 1:d0dfbce63a89 1121 /* Clear ARLO flag */
elmot 1:d0dfbce63a89 1122 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ARLO);
elmot 1:d0dfbce63a89 1123 }
elmot 1:d0dfbce63a89 1124
elmot 1:d0dfbce63a89 1125 /* SMBUS Timeout error interrupt occurred ---------------------------------------------*/
elmot 1:d0dfbce63a89 1126 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
elmot 1:d0dfbce63a89 1127 {
elmot 1:d0dfbce63a89 1128 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BUSTIMEOUT;
elmot 1:d0dfbce63a89 1129
elmot 1:d0dfbce63a89 1130 /* Clear TIMEOUT flag */
elmot 1:d0dfbce63a89 1131 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT);
elmot 1:d0dfbce63a89 1132 }
elmot 1:d0dfbce63a89 1133
elmot 1:d0dfbce63a89 1134 /* SMBUS Alert error interrupt occurred -----------------------------------------------*/
elmot 1:d0dfbce63a89 1135 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ALERT) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
elmot 1:d0dfbce63a89 1136 {
elmot 1:d0dfbce63a89 1137 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ALERT;
elmot 1:d0dfbce63a89 1138
elmot 1:d0dfbce63a89 1139 /* Clear ALERT flag */
elmot 1:d0dfbce63a89 1140 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT);
elmot 1:d0dfbce63a89 1141 }
elmot 1:d0dfbce63a89 1142
elmot 1:d0dfbce63a89 1143 /* SMBUS Packet Error Check error interrupt occurred ----------------------------------*/
elmot 1:d0dfbce63a89 1144 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_PECERR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
elmot 1:d0dfbce63a89 1145 {
elmot 1:d0dfbce63a89 1146 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_PECERR;
elmot 1:d0dfbce63a89 1147
elmot 1:d0dfbce63a89 1148 /* Clear PEC error flag */
elmot 1:d0dfbce63a89 1149 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR);
elmot 1:d0dfbce63a89 1150 }
elmot 1:d0dfbce63a89 1151
elmot 1:d0dfbce63a89 1152 /* Call the Error Callback() in case of Error detected */
elmot 1:d0dfbce63a89 1153 if((hsmbus->ErrorCode != HAL_SMBUS_ERROR_NONE)&&(hsmbus->ErrorCode != HAL_SMBUS_ERROR_ACKF))
elmot 1:d0dfbce63a89 1154 {
elmot 1:d0dfbce63a89 1155 /* Do not Reset the HAL state in case of ALERT error */
elmot 1:d0dfbce63a89 1156 if((hsmbus->ErrorCode & HAL_SMBUS_ERROR_ALERT) != HAL_SMBUS_ERROR_ALERT)
elmot 1:d0dfbce63a89 1157 {
elmot 1:d0dfbce63a89 1158 if(((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
elmot 1:d0dfbce63a89 1159 || ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX))
elmot 1:d0dfbce63a89 1160 {
elmot 1:d0dfbce63a89 1161 /* Reset only HAL_SMBUS_STATE_SLAVE_BUSY_XX */
elmot 1:d0dfbce63a89 1162 /* keep HAL_SMBUS_STATE_LISTEN if set */
elmot 1:d0dfbce63a89 1163 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 1164 hsmbus->State = HAL_SMBUS_STATE_LISTEN;
elmot 1:d0dfbce63a89 1165 }
elmot 1:d0dfbce63a89 1166 }
elmot 1:d0dfbce63a89 1167
elmot 1:d0dfbce63a89 1168 /* Call the Error callback to prevent upper layer */
elmot 1:d0dfbce63a89 1169 HAL_SMBUS_ErrorCallback(hsmbus);
elmot 1:d0dfbce63a89 1170 }
elmot 1:d0dfbce63a89 1171 }
elmot 1:d0dfbce63a89 1172
elmot 1:d0dfbce63a89 1173 /**
elmot 1:d0dfbce63a89 1174 * @brief Master Tx Transfer completed callback.
elmot 1:d0dfbce63a89 1175 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1176 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1177 * @retval None
elmot 1:d0dfbce63a89 1178 */
elmot 1:d0dfbce63a89 1179 __weak void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 1180 {
elmot 1:d0dfbce63a89 1181 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 1182 UNUSED(hsmbus);
elmot 1:d0dfbce63a89 1183
elmot 1:d0dfbce63a89 1184 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 1185 the HAL_SMBUS_MasterTxCpltCallback() could be implemented in the user file
elmot 1:d0dfbce63a89 1186 */
elmot 1:d0dfbce63a89 1187 }
elmot 1:d0dfbce63a89 1188
elmot 1:d0dfbce63a89 1189 /**
elmot 1:d0dfbce63a89 1190 * @brief Master Rx Transfer completed callback.
elmot 1:d0dfbce63a89 1191 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1192 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1193 * @retval None
elmot 1:d0dfbce63a89 1194 */
elmot 1:d0dfbce63a89 1195 __weak void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 1196 {
elmot 1:d0dfbce63a89 1197 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 1198 UNUSED(hsmbus);
elmot 1:d0dfbce63a89 1199
elmot 1:d0dfbce63a89 1200 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 1201 the HAL_SMBUS_MasterRxCpltCallback() could be implemented in the user file
elmot 1:d0dfbce63a89 1202 */
elmot 1:d0dfbce63a89 1203 }
elmot 1:d0dfbce63a89 1204
elmot 1:d0dfbce63a89 1205 /** @brief Slave Tx Transfer completed callback.
elmot 1:d0dfbce63a89 1206 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1207 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1208 * @retval None
elmot 1:d0dfbce63a89 1209 */
elmot 1:d0dfbce63a89 1210 __weak void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 1211 {
elmot 1:d0dfbce63a89 1212 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 1213 UNUSED(hsmbus);
elmot 1:d0dfbce63a89 1214
elmot 1:d0dfbce63a89 1215 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 1216 the HAL_SMBUS_SlaveTxCpltCallback() could be implemented in the user file
elmot 1:d0dfbce63a89 1217 */
elmot 1:d0dfbce63a89 1218 }
elmot 1:d0dfbce63a89 1219
elmot 1:d0dfbce63a89 1220 /**
elmot 1:d0dfbce63a89 1221 * @brief Slave Rx Transfer completed callback.
elmot 1:d0dfbce63a89 1222 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1223 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1224 * @retval None
elmot 1:d0dfbce63a89 1225 */
elmot 1:d0dfbce63a89 1226 __weak void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 1227 {
elmot 1:d0dfbce63a89 1228 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 1229 UNUSED(hsmbus);
elmot 1:d0dfbce63a89 1230
elmot 1:d0dfbce63a89 1231 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 1232 the HAL_SMBUS_SlaveRxCpltCallback() could be implemented in the user file
elmot 1:d0dfbce63a89 1233 */
elmot 1:d0dfbce63a89 1234 }
elmot 1:d0dfbce63a89 1235
elmot 1:d0dfbce63a89 1236 /**
elmot 1:d0dfbce63a89 1237 * @brief Slave Address Match callback.
elmot 1:d0dfbce63a89 1238 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1239 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1240 * @param TransferDirection: Master request Transfer Direction (Write/Read)
elmot 1:d0dfbce63a89 1241 * @param AddrMatchCode: Address Match Code
elmot 1:d0dfbce63a89 1242 * @retval None
elmot 1:d0dfbce63a89 1243 */
elmot 1:d0dfbce63a89 1244 __weak void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode)
elmot 1:d0dfbce63a89 1245 {
elmot 1:d0dfbce63a89 1246 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 1247 UNUSED(hsmbus);
elmot 1:d0dfbce63a89 1248 UNUSED(TransferDirection);
elmot 1:d0dfbce63a89 1249 UNUSED(AddrMatchCode);
elmot 1:d0dfbce63a89 1250
elmot 1:d0dfbce63a89 1251 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 1252 the HAL_SMBUS_AddrCallback() could be implemented in the user file
elmot 1:d0dfbce63a89 1253 */
elmot 1:d0dfbce63a89 1254 }
elmot 1:d0dfbce63a89 1255
elmot 1:d0dfbce63a89 1256 /**
elmot 1:d0dfbce63a89 1257 * @brief Listen Complete callback.
elmot 1:d0dfbce63a89 1258 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1259 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1260 * @retval None
elmot 1:d0dfbce63a89 1261 */
elmot 1:d0dfbce63a89 1262 __weak void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 1263 {
elmot 1:d0dfbce63a89 1264 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 1265 UNUSED(hsmbus);
elmot 1:d0dfbce63a89 1266
elmot 1:d0dfbce63a89 1267 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 1268 the HAL_SMBUS_ListenCpltCallback() could be implemented in the user file
elmot 1:d0dfbce63a89 1269 */
elmot 1:d0dfbce63a89 1270 }
elmot 1:d0dfbce63a89 1271
elmot 1:d0dfbce63a89 1272 /**
elmot 1:d0dfbce63a89 1273 * @brief SMBUS error callback.
elmot 1:d0dfbce63a89 1274 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1275 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1276 * @retval None
elmot 1:d0dfbce63a89 1277 */
elmot 1:d0dfbce63a89 1278 __weak void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 1279 {
elmot 1:d0dfbce63a89 1280 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 1281 UNUSED(hsmbus);
elmot 1:d0dfbce63a89 1282
elmot 1:d0dfbce63a89 1283 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 1284 the HAL_SMBUS_ErrorCallback() could be implemented in the user file
elmot 1:d0dfbce63a89 1285 */
elmot 1:d0dfbce63a89 1286 }
elmot 1:d0dfbce63a89 1287
elmot 1:d0dfbce63a89 1288 /**
elmot 1:d0dfbce63a89 1289 * @}
elmot 1:d0dfbce63a89 1290 */
elmot 1:d0dfbce63a89 1291
elmot 1:d0dfbce63a89 1292 /** @defgroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
elmot 1:d0dfbce63a89 1293 * @brief Peripheral State and Errors functions
elmot 1:d0dfbce63a89 1294 *
elmot 1:d0dfbce63a89 1295 @verbatim
elmot 1:d0dfbce63a89 1296 ===============================================================================
elmot 1:d0dfbce63a89 1297 ##### Peripheral State and Errors functions #####
elmot 1:d0dfbce63a89 1298 ===============================================================================
elmot 1:d0dfbce63a89 1299 [..]
elmot 1:d0dfbce63a89 1300 This subsection permits to get in run-time the status of the peripheral
elmot 1:d0dfbce63a89 1301 and the data flow.
elmot 1:d0dfbce63a89 1302
elmot 1:d0dfbce63a89 1303 @endverbatim
elmot 1:d0dfbce63a89 1304 * @{
elmot 1:d0dfbce63a89 1305 */
elmot 1:d0dfbce63a89 1306
elmot 1:d0dfbce63a89 1307 /**
elmot 1:d0dfbce63a89 1308 * @brief Return the SMBUS handle state.
elmot 1:d0dfbce63a89 1309 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1310 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1311 * @retval HAL state
elmot 1:d0dfbce63a89 1312 */
elmot 1:d0dfbce63a89 1313 uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 1314 {
elmot 1:d0dfbce63a89 1315 /* Return SMBUS handle state */
elmot 1:d0dfbce63a89 1316 return hsmbus->State;
elmot 1:d0dfbce63a89 1317 }
elmot 1:d0dfbce63a89 1318
elmot 1:d0dfbce63a89 1319 /**
elmot 1:d0dfbce63a89 1320 * @brief Return the SMBUS error code.
elmot 1:d0dfbce63a89 1321 * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1322 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1323 * @retval SMBUS Error Code
elmot 1:d0dfbce63a89 1324 */
elmot 1:d0dfbce63a89 1325 uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 1326 {
elmot 1:d0dfbce63a89 1327 return hsmbus->ErrorCode;
elmot 1:d0dfbce63a89 1328 }
elmot 1:d0dfbce63a89 1329
elmot 1:d0dfbce63a89 1330 /**
elmot 1:d0dfbce63a89 1331 * @}
elmot 1:d0dfbce63a89 1332 */
elmot 1:d0dfbce63a89 1333
elmot 1:d0dfbce63a89 1334 /**
elmot 1:d0dfbce63a89 1335 * @}
elmot 1:d0dfbce63a89 1336 */
elmot 1:d0dfbce63a89 1337
elmot 1:d0dfbce63a89 1338 /** @addtogroup SMBUS_Private_Functions SMBUS Private Functions
elmot 1:d0dfbce63a89 1339 * @brief Data transfers Private functions
elmot 1:d0dfbce63a89 1340 * @{
elmot 1:d0dfbce63a89 1341 */
elmot 1:d0dfbce63a89 1342
elmot 1:d0dfbce63a89 1343 /**
elmot 1:d0dfbce63a89 1344 * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode.
elmot 1:d0dfbce63a89 1345 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1346 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1347 * @retval HAL status
elmot 1:d0dfbce63a89 1348 */
elmot 1:d0dfbce63a89 1349 static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 1350 {
elmot 1:d0dfbce63a89 1351 uint16_t DevAddress;
elmot 1:d0dfbce63a89 1352
elmot 1:d0dfbce63a89 1353 /* Process Locked */
elmot 1:d0dfbce63a89 1354 __HAL_LOCK(hsmbus);
elmot 1:d0dfbce63a89 1355
elmot 1:d0dfbce63a89 1356 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
elmot 1:d0dfbce63a89 1357 {
elmot 1:d0dfbce63a89 1358 /* Clear NACK Flag */
elmot 1:d0dfbce63a89 1359 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
elmot 1:d0dfbce63a89 1360
elmot 1:d0dfbce63a89 1361 /* Set corresponding Error Code */
elmot 1:d0dfbce63a89 1362 /* No need to generate STOP, it is automatically done */
elmot 1:d0dfbce63a89 1363 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
elmot 1:d0dfbce63a89 1364
elmot 1:d0dfbce63a89 1365 /* Process Unlocked */
elmot 1:d0dfbce63a89 1366 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1367
elmot 1:d0dfbce63a89 1368 /* Call the Error callback to prevent upper layer */
elmot 1:d0dfbce63a89 1369 HAL_SMBUS_ErrorCallback(hsmbus);
elmot 1:d0dfbce63a89 1370 }
elmot 1:d0dfbce63a89 1371 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
elmot 1:d0dfbce63a89 1372 {
elmot 1:d0dfbce63a89 1373
elmot 1:d0dfbce63a89 1374 /* Call the corresponding callback to inform upper layer of End of Transfer */
elmot 1:d0dfbce63a89 1375 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
elmot 1:d0dfbce63a89 1376 {
elmot 1:d0dfbce63a89 1377 /* Disable Interrupt */
elmot 1:d0dfbce63a89 1378 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
elmot 1:d0dfbce63a89 1379
elmot 1:d0dfbce63a89 1380 /* Clear STOP Flag */
elmot 1:d0dfbce63a89 1381 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
elmot 1:d0dfbce63a89 1382
elmot 1:d0dfbce63a89 1383 /* Clear Configuration Register 2 */
elmot 1:d0dfbce63a89 1384 SMBUS_RESET_CR2(hsmbus);
elmot 1:d0dfbce63a89 1385
elmot 1:d0dfbce63a89 1386 /* Flush remaining data in Fifo register in case of error occurs before TXEmpty */
elmot 1:d0dfbce63a89 1387 /* Disable the selected SMBUS peripheral */
elmot 1:d0dfbce63a89 1388 __HAL_SMBUS_DISABLE(hsmbus);
elmot 1:d0dfbce63a89 1389
elmot 1:d0dfbce63a89 1390 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 1391 hsmbus->State = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 1392
elmot 1:d0dfbce63a89 1393 /* Process Unlocked */
elmot 1:d0dfbce63a89 1394 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1395
elmot 1:d0dfbce63a89 1396 /* REenable the selected SMBUS peripheral */
elmot 1:d0dfbce63a89 1397 __HAL_SMBUS_ENABLE(hsmbus);
elmot 1:d0dfbce63a89 1398
elmot 1:d0dfbce63a89 1399 HAL_SMBUS_MasterTxCpltCallback(hsmbus);
elmot 1:d0dfbce63a89 1400 }
elmot 1:d0dfbce63a89 1401 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
elmot 1:d0dfbce63a89 1402 {
elmot 1:d0dfbce63a89 1403 /* Disable Interrupt */
elmot 1:d0dfbce63a89 1404 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
elmot 1:d0dfbce63a89 1405
elmot 1:d0dfbce63a89 1406 /* Clear STOP Flag */
elmot 1:d0dfbce63a89 1407 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
elmot 1:d0dfbce63a89 1408
elmot 1:d0dfbce63a89 1409 /* Clear Configuration Register 2 */
elmot 1:d0dfbce63a89 1410 SMBUS_RESET_CR2(hsmbus);
elmot 1:d0dfbce63a89 1411
elmot 1:d0dfbce63a89 1412 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 1413 hsmbus->State = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 1414
elmot 1:d0dfbce63a89 1415 /* Process Unlocked */
elmot 1:d0dfbce63a89 1416 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1417
elmot 1:d0dfbce63a89 1418 HAL_SMBUS_MasterRxCpltCallback(hsmbus);
elmot 1:d0dfbce63a89 1419 }
elmot 1:d0dfbce63a89 1420 }
elmot 1:d0dfbce63a89 1421 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
elmot 1:d0dfbce63a89 1422 {
elmot 1:d0dfbce63a89 1423 /* Read data from RXDR */
elmot 1:d0dfbce63a89 1424 (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
elmot 1:d0dfbce63a89 1425 hsmbus->XferSize--;
elmot 1:d0dfbce63a89 1426 hsmbus->XferCount--;
elmot 1:d0dfbce63a89 1427 }
elmot 1:d0dfbce63a89 1428 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
elmot 1:d0dfbce63a89 1429 {
elmot 1:d0dfbce63a89 1430 /* Write data to TXDR */
elmot 1:d0dfbce63a89 1431 hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
elmot 1:d0dfbce63a89 1432 hsmbus->XferSize--;
elmot 1:d0dfbce63a89 1433 hsmbus->XferCount--;
elmot 1:d0dfbce63a89 1434 }
elmot 1:d0dfbce63a89 1435 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET)
elmot 1:d0dfbce63a89 1436 {
elmot 1:d0dfbce63a89 1437 if((hsmbus->XferSize == 0)&&(hsmbus->XferCount!=0))
elmot 1:d0dfbce63a89 1438 {
elmot 1:d0dfbce63a89 1439 DevAddress = (hsmbus->Instance->CR2 & I2C_CR2_SADD);
elmot 1:d0dfbce63a89 1440
elmot 1:d0dfbce63a89 1441 if(hsmbus->XferCount > MAX_NBYTE_SIZE)
elmot 1:d0dfbce63a89 1442 {
elmot 1:d0dfbce63a89 1443 SMBUS_TransferConfig(hsmbus, DevAddress, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
elmot 1:d0dfbce63a89 1444 hsmbus->XferSize = MAX_NBYTE_SIZE;
elmot 1:d0dfbce63a89 1445 }
elmot 1:d0dfbce63a89 1446 else
elmot 1:d0dfbce63a89 1447 {
elmot 1:d0dfbce63a89 1448 hsmbus->XferSize = hsmbus->XferCount;
elmot 1:d0dfbce63a89 1449 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
elmot 1:d0dfbce63a89 1450 /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
elmot 1:d0dfbce63a89 1451 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
elmot 1:d0dfbce63a89 1452 if(SMBUS_GET_PEC_MODE(hsmbus) != RESET)
elmot 1:d0dfbce63a89 1453 {
elmot 1:d0dfbce63a89 1454 hsmbus->XferSize--;
elmot 1:d0dfbce63a89 1455 hsmbus->XferCount--;
elmot 1:d0dfbce63a89 1456 }
elmot 1:d0dfbce63a89 1457 }
elmot 1:d0dfbce63a89 1458 }
elmot 1:d0dfbce63a89 1459 else if((hsmbus->XferSize == 0)&&(hsmbus->XferCount==0))
elmot 1:d0dfbce63a89 1460 {
elmot 1:d0dfbce63a89 1461 /* Call TxCpltCallback() if no stop mode is set */
elmot 1:d0dfbce63a89 1462 if(SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
elmot 1:d0dfbce63a89 1463 {
elmot 1:d0dfbce63a89 1464 /* Call the corresponding callback to inform upper layer of End of Transfer */
elmot 1:d0dfbce63a89 1465 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
elmot 1:d0dfbce63a89 1466 {
elmot 1:d0dfbce63a89 1467 /* Disable Interrupt */
elmot 1:d0dfbce63a89 1468 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
elmot 1:d0dfbce63a89 1469 hsmbus->PreviousState = hsmbus->State;
elmot 1:d0dfbce63a89 1470 hsmbus->State = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 1471
elmot 1:d0dfbce63a89 1472 /* Process Unlocked */
elmot 1:d0dfbce63a89 1473 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1474
elmot 1:d0dfbce63a89 1475 HAL_SMBUS_MasterTxCpltCallback(hsmbus);
elmot 1:d0dfbce63a89 1476 }
elmot 1:d0dfbce63a89 1477 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
elmot 1:d0dfbce63a89 1478 {
elmot 1:d0dfbce63a89 1479 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
elmot 1:d0dfbce63a89 1480 hsmbus->PreviousState = hsmbus->State;
elmot 1:d0dfbce63a89 1481 hsmbus->State = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 1482
elmot 1:d0dfbce63a89 1483 /* Process Unlocked */
elmot 1:d0dfbce63a89 1484 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1485
elmot 1:d0dfbce63a89 1486 HAL_SMBUS_MasterRxCpltCallback(hsmbus);
elmot 1:d0dfbce63a89 1487 }
elmot 1:d0dfbce63a89 1488 }
elmot 1:d0dfbce63a89 1489 }
elmot 1:d0dfbce63a89 1490 }
elmot 1:d0dfbce63a89 1491 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TC) != RESET)
elmot 1:d0dfbce63a89 1492 {
elmot 1:d0dfbce63a89 1493 if(hsmbus->XferCount == 0)
elmot 1:d0dfbce63a89 1494 {
elmot 1:d0dfbce63a89 1495 /* Specific use case for Quick command */
elmot 1:d0dfbce63a89 1496 if(hsmbus->pBuffPtr == NULL)
elmot 1:d0dfbce63a89 1497 {
elmot 1:d0dfbce63a89 1498 /* Generate a Stop command */
elmot 1:d0dfbce63a89 1499 hsmbus->Instance->CR2 |= I2C_CR2_STOP;
elmot 1:d0dfbce63a89 1500 }
elmot 1:d0dfbce63a89 1501 /* Call TxCpltCallback() if no stop mode is set */
elmot 1:d0dfbce63a89 1502 else if(SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
elmot 1:d0dfbce63a89 1503 {
elmot 1:d0dfbce63a89 1504 /* No Generate Stop, to permit restart mode */
elmot 1:d0dfbce63a89 1505 /* The stop will be done at the end of transfer, when SMBUS_AUTOEND_MODE enable */
elmot 1:d0dfbce63a89 1506
elmot 1:d0dfbce63a89 1507 /* Call the corresponding callback to inform upper layer of End of Transfer */
elmot 1:d0dfbce63a89 1508 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
elmot 1:d0dfbce63a89 1509 {
elmot 1:d0dfbce63a89 1510 /* Disable Interrupt */
elmot 1:d0dfbce63a89 1511 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
elmot 1:d0dfbce63a89 1512 hsmbus->PreviousState = hsmbus->State;
elmot 1:d0dfbce63a89 1513 hsmbus->State = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 1514
elmot 1:d0dfbce63a89 1515 /* Process Unlocked */
elmot 1:d0dfbce63a89 1516 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1517
elmot 1:d0dfbce63a89 1518 HAL_SMBUS_MasterTxCpltCallback(hsmbus);
elmot 1:d0dfbce63a89 1519 }
elmot 1:d0dfbce63a89 1520 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
elmot 1:d0dfbce63a89 1521 {
elmot 1:d0dfbce63a89 1522 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
elmot 1:d0dfbce63a89 1523 hsmbus->PreviousState = hsmbus->State;
elmot 1:d0dfbce63a89 1524 hsmbus->State = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 1525
elmot 1:d0dfbce63a89 1526 /* Process Unlocked */
elmot 1:d0dfbce63a89 1527 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1528
elmot 1:d0dfbce63a89 1529 HAL_SMBUS_MasterRxCpltCallback(hsmbus);
elmot 1:d0dfbce63a89 1530 }
elmot 1:d0dfbce63a89 1531 }
elmot 1:d0dfbce63a89 1532 }
elmot 1:d0dfbce63a89 1533 }
elmot 1:d0dfbce63a89 1534
elmot 1:d0dfbce63a89 1535 /* Process Unlocked */
elmot 1:d0dfbce63a89 1536 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1537
elmot 1:d0dfbce63a89 1538 return HAL_OK;
elmot 1:d0dfbce63a89 1539 }
elmot 1:d0dfbce63a89 1540 /**
elmot 1:d0dfbce63a89 1541 * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode.
elmot 1:d0dfbce63a89 1542 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1543 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1544 * @retval HAL status
elmot 1:d0dfbce63a89 1545 */
elmot 1:d0dfbce63a89 1546 static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus)
elmot 1:d0dfbce63a89 1547 {
elmot 1:d0dfbce63a89 1548 uint8_t TransferDirection = 0;
elmot 1:d0dfbce63a89 1549 uint16_t SlaveAddrCode = 0;
elmot 1:d0dfbce63a89 1550
elmot 1:d0dfbce63a89 1551 /* Process Locked */
elmot 1:d0dfbce63a89 1552 __HAL_LOCK(hsmbus);
elmot 1:d0dfbce63a89 1553
elmot 1:d0dfbce63a89 1554 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
elmot 1:d0dfbce63a89 1555 {
elmot 1:d0dfbce63a89 1556 /* Check that SMBUS transfer finished */
elmot 1:d0dfbce63a89 1557 /* if yes, normal use case, a NACK is sent by the HOST when Transfer is finished */
elmot 1:d0dfbce63a89 1558 /* Mean XferCount == 0*/
elmot 1:d0dfbce63a89 1559 /* So clear Flag NACKF only */
elmot 1:d0dfbce63a89 1560 if(hsmbus->XferCount == 0)
elmot 1:d0dfbce63a89 1561 {
elmot 1:d0dfbce63a89 1562 /* Clear NACK Flag */
elmot 1:d0dfbce63a89 1563 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
elmot 1:d0dfbce63a89 1564
elmot 1:d0dfbce63a89 1565 /* Process Unlocked */
elmot 1:d0dfbce63a89 1566 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1567 }
elmot 1:d0dfbce63a89 1568 else
elmot 1:d0dfbce63a89 1569 {
elmot 1:d0dfbce63a89 1570 /* if no, error use case, a Non-Acknowledge of last Data is generated by the HOST*/
elmot 1:d0dfbce63a89 1571 /* Clear NACK Flag */
elmot 1:d0dfbce63a89 1572 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
elmot 1:d0dfbce63a89 1573
elmot 1:d0dfbce63a89 1574 /* Set HAL State to "Idle" State, mean to LISTEN state */
elmot 1:d0dfbce63a89 1575 /* So reset Slave Busy state */
elmot 1:d0dfbce63a89 1576 hsmbus->PreviousState = hsmbus->State;
elmot 1:d0dfbce63a89 1577 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX);
elmot 1:d0dfbce63a89 1578 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX);
elmot 1:d0dfbce63a89 1579
elmot 1:d0dfbce63a89 1580 /* Disable RX/TX Interrupts, keep only ADDR Interrupt */
elmot 1:d0dfbce63a89 1581 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX);
elmot 1:d0dfbce63a89 1582
elmot 1:d0dfbce63a89 1583 /* Set ErrorCode corresponding to a Non-Acknowledge */
elmot 1:d0dfbce63a89 1584 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
elmot 1:d0dfbce63a89 1585
elmot 1:d0dfbce63a89 1586 /* Process Unlocked */
elmot 1:d0dfbce63a89 1587 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1588
elmot 1:d0dfbce63a89 1589 /* Call the Error callback to prevent upper layer */
elmot 1:d0dfbce63a89 1590 HAL_SMBUS_ErrorCallback(hsmbus);
elmot 1:d0dfbce63a89 1591 }
elmot 1:d0dfbce63a89 1592 }
elmot 1:d0dfbce63a89 1593 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ADDR) != RESET)
elmot 1:d0dfbce63a89 1594 {
elmot 1:d0dfbce63a89 1595 TransferDirection = SMBUS_GET_DIR(hsmbus);
elmot 1:d0dfbce63a89 1596 SlaveAddrCode = SMBUS_GET_ADDR_MATCH(hsmbus);
elmot 1:d0dfbce63a89 1597
elmot 1:d0dfbce63a89 1598 /* Disable ADDR interrupt to prevent multiple ADDRInterrupt*/
elmot 1:d0dfbce63a89 1599 /* Other ADDRInterrupt will be treat in next Listen use case */
elmot 1:d0dfbce63a89 1600 __HAL_SMBUS_DISABLE_IT(hsmbus, SMBUS_IT_ADDRI);
elmot 1:d0dfbce63a89 1601
elmot 1:d0dfbce63a89 1602 /* Process Unlocked */
elmot 1:d0dfbce63a89 1603 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1604
elmot 1:d0dfbce63a89 1605 /* Call Slave Addr callback */
elmot 1:d0dfbce63a89 1606 HAL_SMBUS_AddrCallback(hsmbus, TransferDirection, SlaveAddrCode);
elmot 1:d0dfbce63a89 1607 }
elmot 1:d0dfbce63a89 1608 else if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET) || (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET))
elmot 1:d0dfbce63a89 1609 {
elmot 1:d0dfbce63a89 1610 if( (hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)
elmot 1:d0dfbce63a89 1611 {
elmot 1:d0dfbce63a89 1612 /* Read data from RXDR */
elmot 1:d0dfbce63a89 1613 (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
elmot 1:d0dfbce63a89 1614 hsmbus->XferSize--;
elmot 1:d0dfbce63a89 1615 hsmbus->XferCount--;
elmot 1:d0dfbce63a89 1616
elmot 1:d0dfbce63a89 1617 if(hsmbus->XferCount == 1)
elmot 1:d0dfbce63a89 1618 {
elmot 1:d0dfbce63a89 1619 /* Receive last Byte, can be PEC byte in case of PEC BYTE enabled */
elmot 1:d0dfbce63a89 1620 /* or only the last Byte of Transfer */
elmot 1:d0dfbce63a89 1621 /* So reset the RELOAD bit mode */
elmot 1:d0dfbce63a89 1622 hsmbus->XferOptions &= ~SMBUS_RELOAD_MODE;
elmot 1:d0dfbce63a89 1623 SMBUS_TransferConfig(hsmbus,0 ,1 , hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
elmot 1:d0dfbce63a89 1624 }
elmot 1:d0dfbce63a89 1625 else if(hsmbus->XferCount == 0)
elmot 1:d0dfbce63a89 1626 {
elmot 1:d0dfbce63a89 1627 /* Last Byte is received, disable Interrupt */
elmot 1:d0dfbce63a89 1628 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
elmot 1:d0dfbce63a89 1629
elmot 1:d0dfbce63a89 1630 /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_RX, keep only HAL_SMBUS_STATE_LISTEN */
elmot 1:d0dfbce63a89 1631 hsmbus->PreviousState = hsmbus->State;
elmot 1:d0dfbce63a89 1632 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX);
elmot 1:d0dfbce63a89 1633
elmot 1:d0dfbce63a89 1634 /* Process Unlocked */
elmot 1:d0dfbce63a89 1635 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1636
elmot 1:d0dfbce63a89 1637 /* Call the Rx complete callback to inform upper layer of the end of receive process */
elmot 1:d0dfbce63a89 1638 HAL_SMBUS_SlaveRxCpltCallback(hsmbus);
elmot 1:d0dfbce63a89 1639 }
elmot 1:d0dfbce63a89 1640 else
elmot 1:d0dfbce63a89 1641 {
elmot 1:d0dfbce63a89 1642 /* Set Reload for next Bytes */
elmot 1:d0dfbce63a89 1643 SMBUS_TransferConfig(hsmbus,0, 1, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
elmot 1:d0dfbce63a89 1644
elmot 1:d0dfbce63a89 1645 /* Ack last Byte Read */
elmot 1:d0dfbce63a89 1646 hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
elmot 1:d0dfbce63a89 1647 }
elmot 1:d0dfbce63a89 1648 }
elmot 1:d0dfbce63a89 1649 else if( (hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
elmot 1:d0dfbce63a89 1650 {
elmot 1:d0dfbce63a89 1651 if((hsmbus->XferSize == 0)&&(hsmbus->XferCount!=0))
elmot 1:d0dfbce63a89 1652 {
elmot 1:d0dfbce63a89 1653 if(hsmbus->XferCount > MAX_NBYTE_SIZE)
elmot 1:d0dfbce63a89 1654 {
elmot 1:d0dfbce63a89 1655 SMBUS_TransferConfig(hsmbus, 0, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
elmot 1:d0dfbce63a89 1656 hsmbus->XferSize = MAX_NBYTE_SIZE;
elmot 1:d0dfbce63a89 1657 }
elmot 1:d0dfbce63a89 1658 else
elmot 1:d0dfbce63a89 1659 {
elmot 1:d0dfbce63a89 1660 hsmbus->XferSize = hsmbus->XferCount;
elmot 1:d0dfbce63a89 1661 SMBUS_TransferConfig(hsmbus, 0, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
elmot 1:d0dfbce63a89 1662 /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
elmot 1:d0dfbce63a89 1663 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
elmot 1:d0dfbce63a89 1664 if(SMBUS_GET_PEC_MODE(hsmbus) != RESET)
elmot 1:d0dfbce63a89 1665 {
elmot 1:d0dfbce63a89 1666 hsmbus->XferSize--;
elmot 1:d0dfbce63a89 1667 hsmbus->XferCount--;
elmot 1:d0dfbce63a89 1668 }
elmot 1:d0dfbce63a89 1669 }
elmot 1:d0dfbce63a89 1670 }
elmot 1:d0dfbce63a89 1671 }
elmot 1:d0dfbce63a89 1672 }
elmot 1:d0dfbce63a89 1673 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
elmot 1:d0dfbce63a89 1674 {
elmot 1:d0dfbce63a89 1675 /* Write data to TXDR only if XferCount not reach "0" */
elmot 1:d0dfbce63a89 1676 /* A TXIS flag can be set, during STOP treatment */
elmot 1:d0dfbce63a89 1677 /* Check if all Data have already been sent */
elmot 1:d0dfbce63a89 1678 /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
elmot 1:d0dfbce63a89 1679 if(hsmbus->XferCount > 0)
elmot 1:d0dfbce63a89 1680 {
elmot 1:d0dfbce63a89 1681 /* Write data to TXDR */
elmot 1:d0dfbce63a89 1682 hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
elmot 1:d0dfbce63a89 1683 hsmbus->XferCount--;
elmot 1:d0dfbce63a89 1684 hsmbus->XferSize--;
elmot 1:d0dfbce63a89 1685 }
elmot 1:d0dfbce63a89 1686
elmot 1:d0dfbce63a89 1687 if(hsmbus->XferCount == 0)
elmot 1:d0dfbce63a89 1688 {
elmot 1:d0dfbce63a89 1689 /* Last Byte is Transmitted */
elmot 1:d0dfbce63a89 1690 /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_TX, keep only HAL_SMBUS_STATE_LISTEN */
elmot 1:d0dfbce63a89 1691 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
elmot 1:d0dfbce63a89 1692 hsmbus->PreviousState = hsmbus->State;
elmot 1:d0dfbce63a89 1693 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX);
elmot 1:d0dfbce63a89 1694
elmot 1:d0dfbce63a89 1695 /* Process Unlocked */
elmot 1:d0dfbce63a89 1696 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1697
elmot 1:d0dfbce63a89 1698 /* Call the Tx complete callback to inform upper layer of the end of transmit process */
elmot 1:d0dfbce63a89 1699 HAL_SMBUS_SlaveTxCpltCallback(hsmbus);
elmot 1:d0dfbce63a89 1700 }
elmot 1:d0dfbce63a89 1701 }
elmot 1:d0dfbce63a89 1702
elmot 1:d0dfbce63a89 1703 /* Check if STOPF is set */
elmot 1:d0dfbce63a89 1704 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
elmot 1:d0dfbce63a89 1705 {
elmot 1:d0dfbce63a89 1706 if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN)
elmot 1:d0dfbce63a89 1707 {
elmot 1:d0dfbce63a89 1708 /* Disable RX and TX Interrupts */
elmot 1:d0dfbce63a89 1709 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX);
elmot 1:d0dfbce63a89 1710
elmot 1:d0dfbce63a89 1711 /* Disable ADDR Interrupt */
elmot 1:d0dfbce63a89 1712 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR);
elmot 1:d0dfbce63a89 1713
elmot 1:d0dfbce63a89 1714 /* Disable Address Acknowledge */
elmot 1:d0dfbce63a89 1715 hsmbus->Instance->CR2 |= I2C_CR2_NACK;
elmot 1:d0dfbce63a89 1716
elmot 1:d0dfbce63a89 1717 /* Clear Configuration Register 2 */
elmot 1:d0dfbce63a89 1718 SMBUS_RESET_CR2(hsmbus);
elmot 1:d0dfbce63a89 1719
elmot 1:d0dfbce63a89 1720 /* Clear STOP Flag */
elmot 1:d0dfbce63a89 1721 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
elmot 1:d0dfbce63a89 1722
elmot 1:d0dfbce63a89 1723 /* Clear ADDR flag */
elmot 1:d0dfbce63a89 1724 __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
elmot 1:d0dfbce63a89 1725
elmot 1:d0dfbce63a89 1726 hsmbus->XferOptions = 0;
elmot 1:d0dfbce63a89 1727 hsmbus->PreviousState = hsmbus->State;
elmot 1:d0dfbce63a89 1728 hsmbus->State = HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 1729
elmot 1:d0dfbce63a89 1730 /* Process Unlocked */
elmot 1:d0dfbce63a89 1731 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1732
elmot 1:d0dfbce63a89 1733 /* Call the Listen Complete callback, to prevent upper layer of the end of Listen use case */
elmot 1:d0dfbce63a89 1734 HAL_SMBUS_ListenCpltCallback(hsmbus);
elmot 1:d0dfbce63a89 1735 }
elmot 1:d0dfbce63a89 1736 }
elmot 1:d0dfbce63a89 1737
elmot 1:d0dfbce63a89 1738 /* Process Unlocked */
elmot 1:d0dfbce63a89 1739 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1740
elmot 1:d0dfbce63a89 1741 return HAL_OK;
elmot 1:d0dfbce63a89 1742 }
elmot 1:d0dfbce63a89 1743 /**
elmot 1:d0dfbce63a89 1744 * @brief Manage the enabling of Interrupts.
elmot 1:d0dfbce63a89 1745 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1746 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1747 * @param InterruptRequest : Value of @ref SMBUS_Interrupt_configuration_definition.
elmot 1:d0dfbce63a89 1748 * @retval HAL status
elmot 1:d0dfbce63a89 1749 */
elmot 1:d0dfbce63a89 1750 static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
elmot 1:d0dfbce63a89 1751 {
elmot 1:d0dfbce63a89 1752 uint32_t tmpisr = 0;
elmot 1:d0dfbce63a89 1753
elmot 1:d0dfbce63a89 1754 if((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT)
elmot 1:d0dfbce63a89 1755 {
elmot 1:d0dfbce63a89 1756 /* Enable ERR interrupt */
elmot 1:d0dfbce63a89 1757 tmpisr |= SMBUS_IT_ERRI;
elmot 1:d0dfbce63a89 1758 }
elmot 1:d0dfbce63a89 1759
elmot 1:d0dfbce63a89 1760 if((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
elmot 1:d0dfbce63a89 1761 {
elmot 1:d0dfbce63a89 1762 /* Enable ADDR, STOP interrupt */
elmot 1:d0dfbce63a89 1763 tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_ERRI;
elmot 1:d0dfbce63a89 1764 }
elmot 1:d0dfbce63a89 1765
elmot 1:d0dfbce63a89 1766 if((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
elmot 1:d0dfbce63a89 1767 {
elmot 1:d0dfbce63a89 1768 /* Enable ERR, TC, STOP, NACK, RXI interrupt */
elmot 1:d0dfbce63a89 1769 tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI;
elmot 1:d0dfbce63a89 1770 }
elmot 1:d0dfbce63a89 1771
elmot 1:d0dfbce63a89 1772 if((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
elmot 1:d0dfbce63a89 1773 {
elmot 1:d0dfbce63a89 1774 /* Enable ERR, TC, STOP, NACK, TXI interrupt */
elmot 1:d0dfbce63a89 1775 tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_RXI;
elmot 1:d0dfbce63a89 1776 }
elmot 1:d0dfbce63a89 1777
elmot 1:d0dfbce63a89 1778 /* Enable interrupts only at the end */
elmot 1:d0dfbce63a89 1779 /* to avoid the risk of SMBUS interrupt handle execution before */
elmot 1:d0dfbce63a89 1780 /* all interrupts requested done */
elmot 1:d0dfbce63a89 1781 __HAL_SMBUS_ENABLE_IT(hsmbus, tmpisr);
elmot 1:d0dfbce63a89 1782
elmot 1:d0dfbce63a89 1783 return HAL_OK;
elmot 1:d0dfbce63a89 1784 }
elmot 1:d0dfbce63a89 1785 /**
elmot 1:d0dfbce63a89 1786 * @brief Manage the disabling of Interrupts.
elmot 1:d0dfbce63a89 1787 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1788 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1789 * @param InterruptRequest : Value of @ref SMBUS_Interrupt_configuration_definition.
elmot 1:d0dfbce63a89 1790 * @retval HAL status
elmot 1:d0dfbce63a89 1791 */
elmot 1:d0dfbce63a89 1792 static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
elmot 1:d0dfbce63a89 1793 {
elmot 1:d0dfbce63a89 1794 uint32_t tmpisr = 0;
elmot 1:d0dfbce63a89 1795
elmot 1:d0dfbce63a89 1796 if( ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) && (hsmbus->State == HAL_SMBUS_STATE_READY) )
elmot 1:d0dfbce63a89 1797 {
elmot 1:d0dfbce63a89 1798 /* Disable ERR interrupt */
elmot 1:d0dfbce63a89 1799 tmpisr |= SMBUS_IT_ERRI;
elmot 1:d0dfbce63a89 1800 }
elmot 1:d0dfbce63a89 1801
elmot 1:d0dfbce63a89 1802 if((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
elmot 1:d0dfbce63a89 1803 {
elmot 1:d0dfbce63a89 1804 /* Disable TC, STOP, NACK, TXI interrupt */
elmot 1:d0dfbce63a89 1805 tmpisr |= SMBUS_IT_TCI | SMBUS_IT_TXI;
elmot 1:d0dfbce63a89 1806
elmot 1:d0dfbce63a89 1807 if((SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
elmot 1:d0dfbce63a89 1808 && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
elmot 1:d0dfbce63a89 1809 {
elmot 1:d0dfbce63a89 1810 /* Disable ERR interrupt */
elmot 1:d0dfbce63a89 1811 tmpisr |= SMBUS_IT_ERRI;
elmot 1:d0dfbce63a89 1812 }
elmot 1:d0dfbce63a89 1813
elmot 1:d0dfbce63a89 1814 if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
elmot 1:d0dfbce63a89 1815 {
elmot 1:d0dfbce63a89 1816 /* Disable STOPI, NACKI */
elmot 1:d0dfbce63a89 1817 tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI;
elmot 1:d0dfbce63a89 1818 }
elmot 1:d0dfbce63a89 1819 }
elmot 1:d0dfbce63a89 1820
elmot 1:d0dfbce63a89 1821 if((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
elmot 1:d0dfbce63a89 1822 {
elmot 1:d0dfbce63a89 1823 /* Disable TC, STOP, NACK, RXI interrupt */
elmot 1:d0dfbce63a89 1824 tmpisr |= SMBUS_IT_TCI | SMBUS_IT_RXI;
elmot 1:d0dfbce63a89 1825
elmot 1:d0dfbce63a89 1826 if((SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
elmot 1:d0dfbce63a89 1827 && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
elmot 1:d0dfbce63a89 1828 {
elmot 1:d0dfbce63a89 1829 /* Disable ERR interrupt */
elmot 1:d0dfbce63a89 1830 tmpisr |= SMBUS_IT_ERRI;
elmot 1:d0dfbce63a89 1831 }
elmot 1:d0dfbce63a89 1832
elmot 1:d0dfbce63a89 1833 if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
elmot 1:d0dfbce63a89 1834 {
elmot 1:d0dfbce63a89 1835 /* Disable STOPI, NACKI */
elmot 1:d0dfbce63a89 1836 tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI;
elmot 1:d0dfbce63a89 1837 }
elmot 1:d0dfbce63a89 1838 }
elmot 1:d0dfbce63a89 1839
elmot 1:d0dfbce63a89 1840 if((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
elmot 1:d0dfbce63a89 1841 {
elmot 1:d0dfbce63a89 1842 /* Enable ADDR, STOP interrupt */
elmot 1:d0dfbce63a89 1843 tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI;
elmot 1:d0dfbce63a89 1844
elmot 1:d0dfbce63a89 1845 if(SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
elmot 1:d0dfbce63a89 1846 {
elmot 1:d0dfbce63a89 1847 /* Disable ERR interrupt */
elmot 1:d0dfbce63a89 1848 tmpisr |= SMBUS_IT_ERRI;
elmot 1:d0dfbce63a89 1849 }
elmot 1:d0dfbce63a89 1850 }
elmot 1:d0dfbce63a89 1851
elmot 1:d0dfbce63a89 1852 /* Disable interrupts only at the end */
elmot 1:d0dfbce63a89 1853 /* to avoid a breaking situation like at "t" time */
elmot 1:d0dfbce63a89 1854 /* all disable interrupts request are not done */
elmot 1:d0dfbce63a89 1855 __HAL_SMBUS_DISABLE_IT(hsmbus, tmpisr);
elmot 1:d0dfbce63a89 1856
elmot 1:d0dfbce63a89 1857 return HAL_OK;
elmot 1:d0dfbce63a89 1858 }
elmot 1:d0dfbce63a89 1859 /**
elmot 1:d0dfbce63a89 1860 * @brief Handle SMBUS Communication Timeout.
elmot 1:d0dfbce63a89 1861 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 1862 * the configuration information for the specified SMBUS.
elmot 1:d0dfbce63a89 1863 * @param Flag: specifies the SMBUS flag to check.
elmot 1:d0dfbce63a89 1864 * @param Status: The new Flag status (SET or RESET).
elmot 1:d0dfbce63a89 1865 * @param Timeout: Timeout duration
elmot 1:d0dfbce63a89 1866 * @retval HAL status
elmot 1:d0dfbce63a89 1867 */
elmot 1:d0dfbce63a89 1868 static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
elmot 1:d0dfbce63a89 1869 {
elmot 1:d0dfbce63a89 1870 uint32_t tickstart = HAL_GetTick();
elmot 1:d0dfbce63a89 1871
elmot 1:d0dfbce63a89 1872 /* Wait until flag is set */
elmot 1:d0dfbce63a89 1873 if(Status == RESET)
elmot 1:d0dfbce63a89 1874 {
elmot 1:d0dfbce63a89 1875 while(__HAL_SMBUS_GET_FLAG(hsmbus, Flag) == RESET)
elmot 1:d0dfbce63a89 1876 {
elmot 1:d0dfbce63a89 1877 /* Check for the Timeout */
elmot 1:d0dfbce63a89 1878 if(Timeout != HAL_MAX_DELAY)
elmot 1:d0dfbce63a89 1879 {
elmot 1:d0dfbce63a89 1880 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
elmot 1:d0dfbce63a89 1881 {
elmot 1:d0dfbce63a89 1882 hsmbus->PreviousState = hsmbus->State;
elmot 1:d0dfbce63a89 1883 hsmbus->State= HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 1884
elmot 1:d0dfbce63a89 1885 /* Process Unlocked */
elmot 1:d0dfbce63a89 1886 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1887
elmot 1:d0dfbce63a89 1888 return HAL_TIMEOUT;
elmot 1:d0dfbce63a89 1889 }
elmot 1:d0dfbce63a89 1890 }
elmot 1:d0dfbce63a89 1891 }
elmot 1:d0dfbce63a89 1892 }
elmot 1:d0dfbce63a89 1893 else
elmot 1:d0dfbce63a89 1894 {
elmot 1:d0dfbce63a89 1895 while(__HAL_SMBUS_GET_FLAG(hsmbus, Flag) != RESET)
elmot 1:d0dfbce63a89 1896 {
elmot 1:d0dfbce63a89 1897 /* Check for the Timeout */
elmot 1:d0dfbce63a89 1898 if(Timeout != HAL_MAX_DELAY)
elmot 1:d0dfbce63a89 1899 {
elmot 1:d0dfbce63a89 1900 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
elmot 1:d0dfbce63a89 1901 {
elmot 1:d0dfbce63a89 1902 hsmbus->PreviousState = hsmbus->State;
elmot 1:d0dfbce63a89 1903 hsmbus->State= HAL_SMBUS_STATE_READY;
elmot 1:d0dfbce63a89 1904
elmot 1:d0dfbce63a89 1905 /* Process Unlocked */
elmot 1:d0dfbce63a89 1906 __HAL_UNLOCK(hsmbus);
elmot 1:d0dfbce63a89 1907
elmot 1:d0dfbce63a89 1908 return HAL_TIMEOUT;
elmot 1:d0dfbce63a89 1909 }
elmot 1:d0dfbce63a89 1910 }
elmot 1:d0dfbce63a89 1911 }
elmot 1:d0dfbce63a89 1912 }
elmot 1:d0dfbce63a89 1913 return HAL_OK;
elmot 1:d0dfbce63a89 1914 }
elmot 1:d0dfbce63a89 1915
elmot 1:d0dfbce63a89 1916 /**
elmot 1:d0dfbce63a89 1917 * @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set).
elmot 1:d0dfbce63a89 1918 * @param hsmbus: SMBUS handle.
elmot 1:d0dfbce63a89 1919 * @param DevAddress: specifies the slave address to be programmed.
elmot 1:d0dfbce63a89 1920 * @param Size: specifies the number of bytes to be programmed.
elmot 1:d0dfbce63a89 1921 * This parameter must be a value between 0 and 255.
elmot 1:d0dfbce63a89 1922 * @param Mode: new state of the SMBUS START condition generation.
elmot 1:d0dfbce63a89 1923 * This parameter can be one or a combination of the following values:
elmot 1:d0dfbce63a89 1924 * @arg SMBUS_NO_MODE: No specific mode enabled.
elmot 1:d0dfbce63a89 1925 * @arg SMBUS_RELOAD_MODE: Enable Reload mode.
elmot 1:d0dfbce63a89 1926 * @arg SMBUS_AUTOEND_MODE: Enable Automatic end mode.
elmot 1:d0dfbce63a89 1927 * @arg SMBUS_SOFTEND_MODE: Enable Software end mode and Reload mode.
elmot 1:d0dfbce63a89 1928 * @param Request: new state of the SMBUS START condition generation.
elmot 1:d0dfbce63a89 1929 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1930 * @arg SMBUS_NO_STARTSTOP: Don't Generate stop and start condition.
elmot 1:d0dfbce63a89 1931 * @arg SMBUS_GENERATE_STOP: Generate stop condition (Size should be set to 0).
elmot 1:d0dfbce63a89 1932 * @arg SMBUS_GENERATE_START_READ: Generate Restart for read request.
elmot 1:d0dfbce63a89 1933 * @arg SMBUS_GENERATE_START_WRITE: Generate Restart for write request.
elmot 1:d0dfbce63a89 1934 * @retval None
elmot 1:d0dfbce63a89 1935 */
elmot 1:d0dfbce63a89 1936 static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
elmot 1:d0dfbce63a89 1937 {
elmot 1:d0dfbce63a89 1938 uint32_t tmpreg = 0;
elmot 1:d0dfbce63a89 1939
elmot 1:d0dfbce63a89 1940 /* Check the parameters */
elmot 1:d0dfbce63a89 1941 assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
elmot 1:d0dfbce63a89 1942 assert_param(IS_SMBUS_TRANSFER_MODE(Mode));
elmot 1:d0dfbce63a89 1943 assert_param(IS_SMBUS_TRANSFER_REQUEST(Request));
elmot 1:d0dfbce63a89 1944
elmot 1:d0dfbce63a89 1945 /* Get the CR2 register value */
elmot 1:d0dfbce63a89 1946 tmpreg = hsmbus->Instance->CR2;
elmot 1:d0dfbce63a89 1947
elmot 1:d0dfbce63a89 1948 /* clear tmpreg specific bits */
elmot 1:d0dfbce63a89 1949 tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE));
elmot 1:d0dfbce63a89 1950
elmot 1:d0dfbce63a89 1951 /* update tmpreg */
elmot 1:d0dfbce63a89 1952 tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16 ) & I2C_CR2_NBYTES) | \
elmot 1:d0dfbce63a89 1953 (uint32_t)Mode | (uint32_t)Request);
elmot 1:d0dfbce63a89 1954
elmot 1:d0dfbce63a89 1955 /* update CR2 register */
elmot 1:d0dfbce63a89 1956 hsmbus->Instance->CR2 = tmpreg;
elmot 1:d0dfbce63a89 1957 }
elmot 1:d0dfbce63a89 1958 /**
elmot 1:d0dfbce63a89 1959 * @}
elmot 1:d0dfbce63a89 1960 */
elmot 1:d0dfbce63a89 1961
elmot 1:d0dfbce63a89 1962 #endif /* HAL_SMBUS_MODULE_ENABLED */
elmot 1:d0dfbce63a89 1963 /**
elmot 1:d0dfbce63a89 1964 * @}
elmot 1:d0dfbce63a89 1965 */
elmot 1:d0dfbce63a89 1966
elmot 1:d0dfbce63a89 1967 /**
elmot 1:d0dfbce63a89 1968 * @}
elmot 1:d0dfbce63a89 1969 */
elmot 1:d0dfbce63a89 1970
elmot 1:d0dfbce63a89 1971 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/