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HAL_L476/stm32l4xx_ll_fmc.h@1:d0dfbce63a89, 2017-02-24 (annotated)
- Committer:
- elmot
- Date:
- Fri Feb 24 21:13:56 2017 +0000
- Revision:
- 1:d0dfbce63a89
Ready-to-copy
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| elmot | 1:d0dfbce63a89 | 1 | /** |
| elmot | 1:d0dfbce63a89 | 2 | ****************************************************************************** |
| elmot | 1:d0dfbce63a89 | 3 | * @file stm32l4xx_ll_fmc.h |
| elmot | 1:d0dfbce63a89 | 4 | * @author MCD Application Team |
| elmot | 1:d0dfbce63a89 | 5 | * @version V1.5.1 |
| elmot | 1:d0dfbce63a89 | 6 | * @date 31-May-2016 |
| elmot | 1:d0dfbce63a89 | 7 | * @brief Header file of FMC HAL module. |
| elmot | 1:d0dfbce63a89 | 8 | ****************************************************************************** |
| elmot | 1:d0dfbce63a89 | 9 | * @attention |
| elmot | 1:d0dfbce63a89 | 10 | * |
| elmot | 1:d0dfbce63a89 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| elmot | 1:d0dfbce63a89 | 12 | * |
| elmot | 1:d0dfbce63a89 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| elmot | 1:d0dfbce63a89 | 14 | * are permitted provided that the following conditions are met: |
| elmot | 1:d0dfbce63a89 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| elmot | 1:d0dfbce63a89 | 16 | * this list of conditions and the following disclaimer. |
| elmot | 1:d0dfbce63a89 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| elmot | 1:d0dfbce63a89 | 18 | * this list of conditions and the following disclaimer in the documentation |
| elmot | 1:d0dfbce63a89 | 19 | * and/or other materials provided with the distribution. |
| elmot | 1:d0dfbce63a89 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| elmot | 1:d0dfbce63a89 | 21 | * may be used to endorse or promote products derived from this software |
| elmot | 1:d0dfbce63a89 | 22 | * without specific prior written permission. |
| elmot | 1:d0dfbce63a89 | 23 | * |
| elmot | 1:d0dfbce63a89 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| elmot | 1:d0dfbce63a89 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| elmot | 1:d0dfbce63a89 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| elmot | 1:d0dfbce63a89 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| elmot | 1:d0dfbce63a89 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| elmot | 1:d0dfbce63a89 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| elmot | 1:d0dfbce63a89 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| elmot | 1:d0dfbce63a89 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| elmot | 1:d0dfbce63a89 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| elmot | 1:d0dfbce63a89 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| elmot | 1:d0dfbce63a89 | 34 | * |
| elmot | 1:d0dfbce63a89 | 35 | ****************************************************************************** |
| elmot | 1:d0dfbce63a89 | 36 | */ |
| elmot | 1:d0dfbce63a89 | 37 | |
| elmot | 1:d0dfbce63a89 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 39 | #ifndef __STM32L4xx_LL_FMC_H |
| elmot | 1:d0dfbce63a89 | 40 | #define __STM32L4xx_LL_FMC_H |
| elmot | 1:d0dfbce63a89 | 41 | |
| elmot | 1:d0dfbce63a89 | 42 | #ifdef __cplusplus |
| elmot | 1:d0dfbce63a89 | 43 | extern "C" { |
| elmot | 1:d0dfbce63a89 | 44 | #endif |
| elmot | 1:d0dfbce63a89 | 45 | |
| elmot | 1:d0dfbce63a89 | 46 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
| elmot | 1:d0dfbce63a89 | 47 | |
| elmot | 1:d0dfbce63a89 | 48 | /* Includes ------------------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 49 | #include "stm32l4xx_hal_def.h" |
| elmot | 1:d0dfbce63a89 | 50 | |
| elmot | 1:d0dfbce63a89 | 51 | /** @addtogroup STM32L4xx_HAL_Driver |
| elmot | 1:d0dfbce63a89 | 52 | * @{ |
| elmot | 1:d0dfbce63a89 | 53 | */ |
| elmot | 1:d0dfbce63a89 | 54 | |
| elmot | 1:d0dfbce63a89 | 55 | /** @addtogroup FMC_LL FMC Low Layer |
| elmot | 1:d0dfbce63a89 | 56 | * @{ |
| elmot | 1:d0dfbce63a89 | 57 | */ |
| elmot | 1:d0dfbce63a89 | 58 | |
| elmot | 1:d0dfbce63a89 | 59 | /** @addtogroup FMC_LL_Private_Macros FMC Low Layer Private Macros |
| elmot | 1:d0dfbce63a89 | 60 | * @{ |
| elmot | 1:d0dfbce63a89 | 61 | */ |
| elmot | 1:d0dfbce63a89 | 62 | #define IS_FMC_NORSRAM_BANK(__BANK__) (((__BANK__) == FMC_NORSRAM_BANK1) || \ |
| elmot | 1:d0dfbce63a89 | 63 | ((__BANK__) == FMC_NORSRAM_BANK2) || \ |
| elmot | 1:d0dfbce63a89 | 64 | ((__BANK__) == FMC_NORSRAM_BANK3) || \ |
| elmot | 1:d0dfbce63a89 | 65 | ((__BANK__) == FMC_NORSRAM_BANK4)) |
| elmot | 1:d0dfbce63a89 | 66 | |
| elmot | 1:d0dfbce63a89 | 67 | |
| elmot | 1:d0dfbce63a89 | 68 | #define IS_FMC_MUX(__MUX__) (((__MUX__) == FMC_DATA_ADDRESS_MUX_DISABLE) || \ |
| elmot | 1:d0dfbce63a89 | 69 | ((__MUX__) == FMC_DATA_ADDRESS_MUX_ENABLE)) |
| elmot | 1:d0dfbce63a89 | 70 | |
| elmot | 1:d0dfbce63a89 | 71 | |
| elmot | 1:d0dfbce63a89 | 72 | #define IS_FMC_MEMORY(__MEMORY__) (((__MEMORY__) == FMC_MEMORY_TYPE_SRAM) || \ |
| elmot | 1:d0dfbce63a89 | 73 | ((__MEMORY__) == FMC_MEMORY_TYPE_PSRAM)|| \ |
| elmot | 1:d0dfbce63a89 | 74 | ((__MEMORY__) == FMC_MEMORY_TYPE_NOR)) |
| elmot | 1:d0dfbce63a89 | 75 | |
| elmot | 1:d0dfbce63a89 | 76 | #define IS_FMC_NORSRAM_MEMORY_WIDTH(__WIDTH__) (((__WIDTH__) == FMC_NORSRAM_MEM_BUS_WIDTH_8) || \ |
| elmot | 1:d0dfbce63a89 | 77 | ((__WIDTH__) == FMC_NORSRAM_MEM_BUS_WIDTH_16) || \ |
| elmot | 1:d0dfbce63a89 | 78 | ((__WIDTH__) == FMC_NORSRAM_MEM_BUS_WIDTH_32)) |
| elmot | 1:d0dfbce63a89 | 79 | |
| elmot | 1:d0dfbce63a89 | 80 | #define IS_FMC_PAGESIZE(__SIZE__) (((__SIZE__) == FMC_PAGE_SIZE_NONE) || \ |
| elmot | 1:d0dfbce63a89 | 81 | ((__SIZE__) == FMC_PAGE_SIZE_128) || \ |
| elmot | 1:d0dfbce63a89 | 82 | ((__SIZE__) == FMC_PAGE_SIZE_256) || \ |
| elmot | 1:d0dfbce63a89 | 83 | ((__SIZE__) == FMC_PAGE_SIZE_512) || \ |
| elmot | 1:d0dfbce63a89 | 84 | ((__SIZE__) == FMC_PAGE_SIZE_1024)) |
| elmot | 1:d0dfbce63a89 | 85 | |
| elmot | 1:d0dfbce63a89 | 86 | #define IS_FMC_WRITE_BURST(__BURST__) (((__BURST__) == FMC_WRITE_BURST_DISABLE) || \ |
| elmot | 1:d0dfbce63a89 | 87 | ((__BURST__) == FMC_WRITE_BURST_ENABLE)) |
| elmot | 1:d0dfbce63a89 | 88 | |
| elmot | 1:d0dfbce63a89 | 89 | #define IS_FMC_CONTINOUS_CLOCK(__CCLOCK__) (((__CCLOCK__) == FMC_CONTINUOUS_CLOCK_SYNC_ONLY) || \ |
| elmot | 1:d0dfbce63a89 | 90 | ((__CCLOCK__) == FMC_CONTINUOUS_CLOCK_SYNC_ASYNC)) |
| elmot | 1:d0dfbce63a89 | 91 | |
| elmot | 1:d0dfbce63a89 | 92 | #define IS_FMC_ACCESS_MODE(__MODE__) (((__MODE__) == FMC_ACCESS_MODE_A) || \ |
| elmot | 1:d0dfbce63a89 | 93 | ((__MODE__) == FMC_ACCESS_MODE_B) || \ |
| elmot | 1:d0dfbce63a89 | 94 | ((__MODE__) == FMC_ACCESS_MODE_C) || \ |
| elmot | 1:d0dfbce63a89 | 95 | ((__MODE__) == FMC_ACCESS_MODE_D)) |
| elmot | 1:d0dfbce63a89 | 96 | |
| elmot | 1:d0dfbce63a89 | 97 | |
| elmot | 1:d0dfbce63a89 | 98 | #define IS_FMC_NAND_BANK(__BANK__) ((__BANK__) == FMC_NAND_BANK3) |
| elmot | 1:d0dfbce63a89 | 99 | |
| elmot | 1:d0dfbce63a89 | 100 | #define IS_FMC_WAIT_FEATURE(__FEATURE__) (((__FEATURE__) == FMC_NAND_WAIT_FEATURE_DISABLE) || \ |
| elmot | 1:d0dfbce63a89 | 101 | ((__FEATURE__) == FMC_NAND_WAIT_FEATURE_ENABLE)) |
| elmot | 1:d0dfbce63a89 | 102 | |
| elmot | 1:d0dfbce63a89 | 103 | #define IS_FMC_NAND_MEMORY_WIDTH(__WIDTH__) (((__WIDTH__) == FMC_NAND_MEM_BUS_WIDTH_8) || \ |
| elmot | 1:d0dfbce63a89 | 104 | ((__WIDTH__) == FMC_NAND_MEM_BUS_WIDTH_16)) |
| elmot | 1:d0dfbce63a89 | 105 | |
| elmot | 1:d0dfbce63a89 | 106 | #define IS_FMC_ECC_STATE(__STATE__) (((__STATE__) == FMC_NAND_ECC_DISABLE) || \ |
| elmot | 1:d0dfbce63a89 | 107 | ((__STATE__) == FMC_NAND_ECC_ENABLE)) |
| elmot | 1:d0dfbce63a89 | 108 | |
| elmot | 1:d0dfbce63a89 | 109 | |
| elmot | 1:d0dfbce63a89 | 110 | #define IS_FMC_ECCPAGE_SIZE(__SIZE__) (((__SIZE__) == FMC_NAND_ECC_PAGE_SIZE_256BYTE) || \ |
| elmot | 1:d0dfbce63a89 | 111 | ((__SIZE__) == FMC_NAND_ECC_PAGE_SIZE_512BYTE) || \ |
| elmot | 1:d0dfbce63a89 | 112 | ((__SIZE__) == FMC_NAND_ECC_PAGE_SIZE_1024BYTE) || \ |
| elmot | 1:d0dfbce63a89 | 113 | ((__SIZE__) == FMC_NAND_ECC_PAGE_SIZE_2048BYTE) || \ |
| elmot | 1:d0dfbce63a89 | 114 | ((__SIZE__) == FMC_NAND_ECC_PAGE_SIZE_4096BYTE) || \ |
| elmot | 1:d0dfbce63a89 | 115 | ((__SIZE__) == FMC_NAND_ECC_PAGE_SIZE_8192BYTE)) |
| elmot | 1:d0dfbce63a89 | 116 | |
| elmot | 1:d0dfbce63a89 | 117 | |
| elmot | 1:d0dfbce63a89 | 118 | /** @defgroup FMC_NORSRAM_Device_Instance FMC NOR/SRAM Device Instance |
| elmot | 1:d0dfbce63a89 | 119 | * @{ |
| elmot | 1:d0dfbce63a89 | 120 | */ |
| elmot | 1:d0dfbce63a89 | 121 | #define IS_FMC_NORSRAM_DEVICE(__INSTANCE__) ((__INSTANCE__) == FMC_NORSRAM_DEVICE) |
| elmot | 1:d0dfbce63a89 | 122 | /** |
| elmot | 1:d0dfbce63a89 | 123 | * @} |
| elmot | 1:d0dfbce63a89 | 124 | */ |
| elmot | 1:d0dfbce63a89 | 125 | |
| elmot | 1:d0dfbce63a89 | 126 | /** @defgroup FMC_NORSRAM_EXTENDED_Device_Instance FMC NOR/SRAM EXTENDED Device Instance |
| elmot | 1:d0dfbce63a89 | 127 | * @{ |
| elmot | 1:d0dfbce63a89 | 128 | */ |
| elmot | 1:d0dfbce63a89 | 129 | #define IS_FMC_NORSRAM_EXTENDED_DEVICE(__INSTANCE__) ((__INSTANCE__) == FMC_NORSRAM_EXTENDED_DEVICE) |
| elmot | 1:d0dfbce63a89 | 130 | /** |
| elmot | 1:d0dfbce63a89 | 131 | * @} |
| elmot | 1:d0dfbce63a89 | 132 | */ |
| elmot | 1:d0dfbce63a89 | 133 | |
| elmot | 1:d0dfbce63a89 | 134 | /** @defgroup FMC_NAND_Device_Instance FMC NAND Device Instance |
| elmot | 1:d0dfbce63a89 | 135 | * @{ |
| elmot | 1:d0dfbce63a89 | 136 | */ |
| elmot | 1:d0dfbce63a89 | 137 | #define IS_FMC_NAND_DEVICE(__INSTANCE__) ((__INSTANCE__) == FMC_NAND_DEVICE) |
| elmot | 1:d0dfbce63a89 | 138 | /** |
| elmot | 1:d0dfbce63a89 | 139 | * @} |
| elmot | 1:d0dfbce63a89 | 140 | */ |
| elmot | 1:d0dfbce63a89 | 141 | |
| elmot | 1:d0dfbce63a89 | 142 | #define IS_FMC_BURSTMODE(__STATE__) (((__STATE__) == FMC_BURST_ACCESS_MODE_DISABLE) || \ |
| elmot | 1:d0dfbce63a89 | 143 | ((__STATE__) == FMC_BURST_ACCESS_MODE_ENABLE)) |
| elmot | 1:d0dfbce63a89 | 144 | |
| elmot | 1:d0dfbce63a89 | 145 | #define IS_FMC_WAIT_POLARITY(__POLARITY__) (((__POLARITY__) == FMC_WAIT_SIGNAL_POLARITY_LOW) || \ |
| elmot | 1:d0dfbce63a89 | 146 | ((__POLARITY__) == FMC_WAIT_SIGNAL_POLARITY_HIGH)) |
| elmot | 1:d0dfbce63a89 | 147 | |
| elmot | 1:d0dfbce63a89 | 148 | #define IS_FMC_WAIT_SIGNAL_ACTIVE(__ACTIVE__) (((__ACTIVE__) == FMC_WAIT_TIMING_BEFORE_WS) || \ |
| elmot | 1:d0dfbce63a89 | 149 | ((__ACTIVE__) == FMC_WAIT_TIMING_DURING_WS)) |
| elmot | 1:d0dfbce63a89 | 150 | |
| elmot | 1:d0dfbce63a89 | 151 | |
| elmot | 1:d0dfbce63a89 | 152 | #define IS_FMC_WRITE_OPERATION(__OPERATION__) (((__OPERATION__) == FMC_WRITE_OPERATION_DISABLE) || \ |
| elmot | 1:d0dfbce63a89 | 153 | ((__OPERATION__) == FMC_WRITE_OPERATION_ENABLE)) |
| elmot | 1:d0dfbce63a89 | 154 | |
| elmot | 1:d0dfbce63a89 | 155 | #define IS_FMC_WAITE_SIGNAL(__SIGNAL__) (((__SIGNAL__) == FMC_WAIT_SIGNAL_DISABLE) || \ |
| elmot | 1:d0dfbce63a89 | 156 | ((__SIGNAL__) == FMC_WAIT_SIGNAL_ENABLE)) |
| elmot | 1:d0dfbce63a89 | 157 | |
| elmot | 1:d0dfbce63a89 | 158 | #define IS_FMC_EXTENDED_MODE(__MODE__) (((__MODE__) == FMC_EXTENDED_MODE_DISABLE) || \ |
| elmot | 1:d0dfbce63a89 | 159 | ((__MODE__) == FMC_EXTENDED_MODE_ENABLE)) |
| elmot | 1:d0dfbce63a89 | 160 | |
| elmot | 1:d0dfbce63a89 | 161 | #define IS_FMC_ASYNWAIT(__STATE__) (((__STATE__) == FMC_ASYNCHRONOUS_WAIT_DISABLE) || \ |
| elmot | 1:d0dfbce63a89 | 162 | ((__STATE__) == FMC_ASYNCHRONOUS_WAIT_ENABLE)) |
| elmot | 1:d0dfbce63a89 | 163 | |
| elmot | 1:d0dfbce63a89 | 164 | /** @defgroup FMC_Address_Setup_Time |
| elmot | 1:d0dfbce63a89 | 165 | * @{ |
| elmot | 1:d0dfbce63a89 | 166 | */ |
| elmot | 1:d0dfbce63a89 | 167 | #define IS_FMC_ADDRESS_SETUP_TIME(__TIME__) ((__TIME__) <= 15) |
| elmot | 1:d0dfbce63a89 | 168 | /** |
| elmot | 1:d0dfbce63a89 | 169 | * @} |
| elmot | 1:d0dfbce63a89 | 170 | */ |
| elmot | 1:d0dfbce63a89 | 171 | |
| elmot | 1:d0dfbce63a89 | 172 | /** @defgroup FMC_Address_Hold_Time |
| elmot | 1:d0dfbce63a89 | 173 | * @{ |
| elmot | 1:d0dfbce63a89 | 174 | */ |
| elmot | 1:d0dfbce63a89 | 175 | #define IS_FMC_ADDRESS_HOLD_TIME(__TIME__) (((__TIME__) > 0) && ((__TIME__) <= 15)) |
| elmot | 1:d0dfbce63a89 | 176 | /** |
| elmot | 1:d0dfbce63a89 | 177 | * @} |
| elmot | 1:d0dfbce63a89 | 178 | */ |
| elmot | 1:d0dfbce63a89 | 179 | |
| elmot | 1:d0dfbce63a89 | 180 | /** @defgroup FMC_Data_Setup_Time |
| elmot | 1:d0dfbce63a89 | 181 | * @{ |
| elmot | 1:d0dfbce63a89 | 182 | */ |
| elmot | 1:d0dfbce63a89 | 183 | #define IS_FMC_DATASETUP_TIME(__TIME__) (((__TIME__) > 0) && ((__TIME__) <= 255)) |
| elmot | 1:d0dfbce63a89 | 184 | /** |
| elmot | 1:d0dfbce63a89 | 185 | * @} |
| elmot | 1:d0dfbce63a89 | 186 | */ |
| elmot | 1:d0dfbce63a89 | 187 | |
| elmot | 1:d0dfbce63a89 | 188 | /** @defgroup FMC_Bus_Turn_around_Duration |
| elmot | 1:d0dfbce63a89 | 189 | * @{ |
| elmot | 1:d0dfbce63a89 | 190 | */ |
| elmot | 1:d0dfbce63a89 | 191 | #define IS_FMC_TURNAROUND_TIME(__TIME__) ((__TIME__) <= 15) |
| elmot | 1:d0dfbce63a89 | 192 | /** |
| elmot | 1:d0dfbce63a89 | 193 | * @} |
| elmot | 1:d0dfbce63a89 | 194 | */ |
| elmot | 1:d0dfbce63a89 | 195 | |
| elmot | 1:d0dfbce63a89 | 196 | /** @defgroup FMC_CLK_Division |
| elmot | 1:d0dfbce63a89 | 197 | * @{ |
| elmot | 1:d0dfbce63a89 | 198 | */ |
| elmot | 1:d0dfbce63a89 | 199 | #define IS_FMC_CLK_DIV(__DIV__) (((__DIV__) > 1) && ((__DIV__) <= 16)) |
| elmot | 1:d0dfbce63a89 | 200 | /** |
| elmot | 1:d0dfbce63a89 | 201 | * @} |
| elmot | 1:d0dfbce63a89 | 202 | */ |
| elmot | 1:d0dfbce63a89 | 203 | |
| elmot | 1:d0dfbce63a89 | 204 | /** @defgroup FMC_Data_Latency |
| elmot | 1:d0dfbce63a89 | 205 | * @{ |
| elmot | 1:d0dfbce63a89 | 206 | */ |
| elmot | 1:d0dfbce63a89 | 207 | #define IS_FMC_DATA_LATENCY(__LATENCY__) (((__LATENCY__) > 1) && ((__LATENCY__) <= 17)) |
| elmot | 1:d0dfbce63a89 | 208 | /** |
| elmot | 1:d0dfbce63a89 | 209 | * @} |
| elmot | 1:d0dfbce63a89 | 210 | */ |
| elmot | 1:d0dfbce63a89 | 211 | |
| elmot | 1:d0dfbce63a89 | 212 | /** @defgroup FMC_TCLR_Setup_Time FMC TCLR Setup Time |
| elmot | 1:d0dfbce63a89 | 213 | * @{ |
| elmot | 1:d0dfbce63a89 | 214 | */ |
| elmot | 1:d0dfbce63a89 | 215 | #define IS_FMC_TCLR_TIME(__TIME__) ((__TIME__) <= 255) |
| elmot | 1:d0dfbce63a89 | 216 | /** |
| elmot | 1:d0dfbce63a89 | 217 | * @} |
| elmot | 1:d0dfbce63a89 | 218 | */ |
| elmot | 1:d0dfbce63a89 | 219 | |
| elmot | 1:d0dfbce63a89 | 220 | /** @defgroup FMC_TAR_Setup_Time |
| elmot | 1:d0dfbce63a89 | 221 | * @{ |
| elmot | 1:d0dfbce63a89 | 222 | */ |
| elmot | 1:d0dfbce63a89 | 223 | #define IS_FMC_TAR_TIME(__TIME__) ((__TIME__) <= 255) |
| elmot | 1:d0dfbce63a89 | 224 | /** |
| elmot | 1:d0dfbce63a89 | 225 | * @} |
| elmot | 1:d0dfbce63a89 | 226 | */ |
| elmot | 1:d0dfbce63a89 | 227 | |
| elmot | 1:d0dfbce63a89 | 228 | /** @defgroup FMC_Setup_Time |
| elmot | 1:d0dfbce63a89 | 229 | * @{ |
| elmot | 1:d0dfbce63a89 | 230 | */ |
| elmot | 1:d0dfbce63a89 | 231 | #define IS_FMC_SETUP_TIME(__TIME__) ((__TIME__) <= 255) |
| elmot | 1:d0dfbce63a89 | 232 | /** |
| elmot | 1:d0dfbce63a89 | 233 | * @} |
| elmot | 1:d0dfbce63a89 | 234 | */ |
| elmot | 1:d0dfbce63a89 | 235 | |
| elmot | 1:d0dfbce63a89 | 236 | /** @defgroup FMC_Wait_Setup_Time |
| elmot | 1:d0dfbce63a89 | 237 | * @{ |
| elmot | 1:d0dfbce63a89 | 238 | */ |
| elmot | 1:d0dfbce63a89 | 239 | #define IS_FMC_WAIT_TIME(__TIME__) ((__TIME__) <= 255) |
| elmot | 1:d0dfbce63a89 | 240 | /** |
| elmot | 1:d0dfbce63a89 | 241 | * @} |
| elmot | 1:d0dfbce63a89 | 242 | */ |
| elmot | 1:d0dfbce63a89 | 243 | |
| elmot | 1:d0dfbce63a89 | 244 | /** @defgroup FMC_Hold_Setup_Time |
| elmot | 1:d0dfbce63a89 | 245 | * @{ |
| elmot | 1:d0dfbce63a89 | 246 | */ |
| elmot | 1:d0dfbce63a89 | 247 | #define IS_FMC_HOLD_TIME(__TIME__) ((__TIME__) <= 255) |
| elmot | 1:d0dfbce63a89 | 248 | /** |
| elmot | 1:d0dfbce63a89 | 249 | * @} |
| elmot | 1:d0dfbce63a89 | 250 | */ |
| elmot | 1:d0dfbce63a89 | 251 | |
| elmot | 1:d0dfbce63a89 | 252 | /** @defgroup FMC_HiZ_Setup_Time |
| elmot | 1:d0dfbce63a89 | 253 | * @{ |
| elmot | 1:d0dfbce63a89 | 254 | */ |
| elmot | 1:d0dfbce63a89 | 255 | #define IS_FMC_HIZ_TIME(__TIME__) ((__TIME__) <= 255) |
| elmot | 1:d0dfbce63a89 | 256 | /** |
| elmot | 1:d0dfbce63a89 | 257 | * @} |
| elmot | 1:d0dfbce63a89 | 258 | */ |
| elmot | 1:d0dfbce63a89 | 259 | |
| elmot | 1:d0dfbce63a89 | 260 | /** |
| elmot | 1:d0dfbce63a89 | 261 | * @} |
| elmot | 1:d0dfbce63a89 | 262 | */ |
| elmot | 1:d0dfbce63a89 | 263 | |
| elmot | 1:d0dfbce63a89 | 264 | /* Exported typedef ----------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 265 | /** @addtogroup FMC_LL_Exported_Typedef FMC Low Layer Exported Typedef |
| elmot | 1:d0dfbce63a89 | 266 | * @{ |
| elmot | 1:d0dfbce63a89 | 267 | */ |
| elmot | 1:d0dfbce63a89 | 268 | #define FMC_NORSRAM_TypeDef FMC_Bank1_TypeDef |
| elmot | 1:d0dfbce63a89 | 269 | #define FMC_NORSRAM_EXTENDED_TypeDef FMC_Bank1E_TypeDef |
| elmot | 1:d0dfbce63a89 | 270 | #define FMC_NAND_TypeDef FMC_Bank3_TypeDef |
| elmot | 1:d0dfbce63a89 | 271 | |
| elmot | 1:d0dfbce63a89 | 272 | #define FMC_NORSRAM_DEVICE FMC_Bank1_R |
| elmot | 1:d0dfbce63a89 | 273 | #define FMC_NORSRAM_EXTENDED_DEVICE FMC_Bank1E_R |
| elmot | 1:d0dfbce63a89 | 274 | #define FMC_NAND_DEVICE FMC_Bank3_R |
| elmot | 1:d0dfbce63a89 | 275 | |
| elmot | 1:d0dfbce63a89 | 276 | /** |
| elmot | 1:d0dfbce63a89 | 277 | * @brief FMC_NORSRAM Configuration Structure definition |
| elmot | 1:d0dfbce63a89 | 278 | */ |
| elmot | 1:d0dfbce63a89 | 279 | typedef struct |
| elmot | 1:d0dfbce63a89 | 280 | { |
| elmot | 1:d0dfbce63a89 | 281 | uint32_t NSBank; /*!< Specifies the NORSRAM memory device that will be used. |
| elmot | 1:d0dfbce63a89 | 282 | This parameter can be a value of @ref FMC_NORSRAM_Bank */ |
| elmot | 1:d0dfbce63a89 | 283 | |
| elmot | 1:d0dfbce63a89 | 284 | uint32_t DataAddressMux; /*!< Specifies whether the address and data values are |
| elmot | 1:d0dfbce63a89 | 285 | multiplexed on the data bus or not. |
| elmot | 1:d0dfbce63a89 | 286 | This parameter can be a value of @ref FMC_Data_Address_Bus_Multiplexing */ |
| elmot | 1:d0dfbce63a89 | 287 | |
| elmot | 1:d0dfbce63a89 | 288 | uint32_t MemoryType; /*!< Specifies the type of external memory attached to |
| elmot | 1:d0dfbce63a89 | 289 | the corresponding memory device. |
| elmot | 1:d0dfbce63a89 | 290 | This parameter can be a value of @ref FMC_Memory_Type */ |
| elmot | 1:d0dfbce63a89 | 291 | |
| elmot | 1:d0dfbce63a89 | 292 | uint32_t MemoryDataWidth; /*!< Specifies the external memory device width. |
| elmot | 1:d0dfbce63a89 | 293 | This parameter can be a value of @ref FMC_NORSRAM_Data_Width */ |
| elmot | 1:d0dfbce63a89 | 294 | |
| elmot | 1:d0dfbce63a89 | 295 | uint32_t BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory, |
| elmot | 1:d0dfbce63a89 | 296 | valid only with synchronous burst Flash memories. |
| elmot | 1:d0dfbce63a89 | 297 | This parameter can be a value of @ref FMC_Burst_Access_Mode */ |
| elmot | 1:d0dfbce63a89 | 298 | |
| elmot | 1:d0dfbce63a89 | 299 | uint32_t WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing |
| elmot | 1:d0dfbce63a89 | 300 | the Flash memory in burst mode. |
| elmot | 1:d0dfbce63a89 | 301 | This parameter can be a value of @ref FMC_Wait_Signal_Polarity */ |
| elmot | 1:d0dfbce63a89 | 302 | |
| elmot | 1:d0dfbce63a89 | 303 | uint32_t WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one |
| elmot | 1:d0dfbce63a89 | 304 | clock cycle before the wait state or during the wait state, |
| elmot | 1:d0dfbce63a89 | 305 | valid only when accessing memories in burst mode. |
| elmot | 1:d0dfbce63a89 | 306 | This parameter can be a value of @ref FMC_Wait_Timing */ |
| elmot | 1:d0dfbce63a89 | 307 | |
| elmot | 1:d0dfbce63a89 | 308 | uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device by the FMC. |
| elmot | 1:d0dfbce63a89 | 309 | This parameter can be a value of @ref FMC_Write_Operation */ |
| elmot | 1:d0dfbce63a89 | 310 | |
| elmot | 1:d0dfbce63a89 | 311 | uint32_t WaitSignal; /*!< Enables or disables the wait state insertion via wait |
| elmot | 1:d0dfbce63a89 | 312 | signal, valid for Flash memory access in burst mode. |
| elmot | 1:d0dfbce63a89 | 313 | This parameter can be a value of @ref FMC_Wait_Signal */ |
| elmot | 1:d0dfbce63a89 | 314 | |
| elmot | 1:d0dfbce63a89 | 315 | uint32_t ExtendedMode; /*!< Enables or disables the extended mode. |
| elmot | 1:d0dfbce63a89 | 316 | This parameter can be a value of @ref FMC_Extended_Mode */ |
| elmot | 1:d0dfbce63a89 | 317 | |
| elmot | 1:d0dfbce63a89 | 318 | uint32_t AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers, |
| elmot | 1:d0dfbce63a89 | 319 | valid only with asynchronous Flash memories. |
| elmot | 1:d0dfbce63a89 | 320 | This parameter can be a value of @ref FMC_AsynchronousWait */ |
| elmot | 1:d0dfbce63a89 | 321 | |
| elmot | 1:d0dfbce63a89 | 322 | uint32_t WriteBurst; /*!< Enables or disables the write burst operation. |
| elmot | 1:d0dfbce63a89 | 323 | This parameter can be a value of @ref FMC_Write_Burst */ |
| elmot | 1:d0dfbce63a89 | 324 | |
| elmot | 1:d0dfbce63a89 | 325 | uint32_t ContinuousClock; /*!< Enables or disables the FMC clock output to external memory devices. |
| elmot | 1:d0dfbce63a89 | 326 | This parameter is only enabled through the FMC_BCR1 register, and don't care |
| elmot | 1:d0dfbce63a89 | 327 | through FMC_BCR2..4 registers. |
| elmot | 1:d0dfbce63a89 | 328 | This parameter can be a value of @ref FMC_Continous_Clock */ |
| elmot | 1:d0dfbce63a89 | 329 | |
| elmot | 1:d0dfbce63a89 | 330 | uint32_t WriteFifo; /*!< Enables or disables the write FIFO used by the FMC controller. |
| elmot | 1:d0dfbce63a89 | 331 | This parameter is only enabled through the FMC_BCR1 register, and don't care |
| elmot | 1:d0dfbce63a89 | 332 | through FMC_BCR2..4 registers. |
| elmot | 1:d0dfbce63a89 | 333 | This parameter can be a value of @ref FMC_Write_FIFO. |
| elmot | 1:d0dfbce63a89 | 334 | @note This Parameter is not available for STM32L47x/L48x devices. */ |
| elmot | 1:d0dfbce63a89 | 335 | |
| elmot | 1:d0dfbce63a89 | 336 | uint32_t PageSize; /*!< Specifies the memory page size. |
| elmot | 1:d0dfbce63a89 | 337 | This parameter can be a value of @ref FMC_Page_Size */ |
| elmot | 1:d0dfbce63a89 | 338 | |
| elmot | 1:d0dfbce63a89 | 339 | }FMC_NORSRAM_InitTypeDef; |
| elmot | 1:d0dfbce63a89 | 340 | |
| elmot | 1:d0dfbce63a89 | 341 | /** |
| elmot | 1:d0dfbce63a89 | 342 | * @brief FMC_NORSRAM Timing parameters structure definition |
| elmot | 1:d0dfbce63a89 | 343 | */ |
| elmot | 1:d0dfbce63a89 | 344 | typedef struct |
| elmot | 1:d0dfbce63a89 | 345 | { |
| elmot | 1:d0dfbce63a89 | 346 | uint32_t AddressSetupTime; /*!< Defines the number of HCLK cycles to configure |
| elmot | 1:d0dfbce63a89 | 347 | the duration of the address setup time. |
| elmot | 1:d0dfbce63a89 | 348 | This parameter can be a value between Min_Data = 0 and Max_Data = 15. |
| elmot | 1:d0dfbce63a89 | 349 | @note This parameter is not used with synchronous NOR Flash memories. */ |
| elmot | 1:d0dfbce63a89 | 350 | |
| elmot | 1:d0dfbce63a89 | 351 | uint32_t AddressHoldTime; /*!< Defines the number of HCLK cycles to configure |
| elmot | 1:d0dfbce63a89 | 352 | the duration of the address hold time. |
| elmot | 1:d0dfbce63a89 | 353 | This parameter can be a value between Min_Data = 1 and Max_Data = 15. |
| elmot | 1:d0dfbce63a89 | 354 | @note This parameter is not used with synchronous NOR Flash memories. */ |
| elmot | 1:d0dfbce63a89 | 355 | |
| elmot | 1:d0dfbce63a89 | 356 | uint32_t DataSetupTime; /*!< Defines the number of HCLK cycles to configure |
| elmot | 1:d0dfbce63a89 | 357 | the duration of the data setup time. |
| elmot | 1:d0dfbce63a89 | 358 | This parameter can be a value between Min_Data = 1 and Max_Data = 255. |
| elmot | 1:d0dfbce63a89 | 359 | @note This parameter is used for SRAMs, ROMs and asynchronous multiplexed |
| elmot | 1:d0dfbce63a89 | 360 | NOR Flash memories. */ |
| elmot | 1:d0dfbce63a89 | 361 | |
| elmot | 1:d0dfbce63a89 | 362 | uint32_t BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure |
| elmot | 1:d0dfbce63a89 | 363 | the duration of the bus turnaround. |
| elmot | 1:d0dfbce63a89 | 364 | This parameter can be a value between Min_Data = 0 and Max_Data = 15. |
| elmot | 1:d0dfbce63a89 | 365 | @note This parameter is only used for multiplexed NOR Flash memories. */ |
| elmot | 1:d0dfbce63a89 | 366 | |
| elmot | 1:d0dfbce63a89 | 367 | uint32_t CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of |
| elmot | 1:d0dfbce63a89 | 368 | HCLK cycles. This parameter can be a value between Min_Data = 2 and Max_Data = 16. |
| elmot | 1:d0dfbce63a89 | 369 | @note This parameter is not used for asynchronous NOR Flash, SRAM or ROM |
| elmot | 1:d0dfbce63a89 | 370 | accesses. */ |
| elmot | 1:d0dfbce63a89 | 371 | |
| elmot | 1:d0dfbce63a89 | 372 | uint32_t DataLatency; /*!< Defines the number of memory clock cycles to issue |
| elmot | 1:d0dfbce63a89 | 373 | to the memory before getting the first data. |
| elmot | 1:d0dfbce63a89 | 374 | The parameter value depends on the memory type as shown below: |
| elmot | 1:d0dfbce63a89 | 375 | - It must be set to 0 in case of a CRAM |
| elmot | 1:d0dfbce63a89 | 376 | - It is don't care in asynchronous NOR, SRAM or ROM accesses |
| elmot | 1:d0dfbce63a89 | 377 | - It may assume a value between Min_Data = 2 and Max_Data = 17 in NOR Flash memories |
| elmot | 1:d0dfbce63a89 | 378 | with synchronous burst mode enable */ |
| elmot | 1:d0dfbce63a89 | 379 | |
| elmot | 1:d0dfbce63a89 | 380 | uint32_t AccessMode; /*!< Specifies the asynchronous access mode. |
| elmot | 1:d0dfbce63a89 | 381 | This parameter can be a value of @ref FMC_Access_Mode */ |
| elmot | 1:d0dfbce63a89 | 382 | }FMC_NORSRAM_TimingTypeDef; |
| elmot | 1:d0dfbce63a89 | 383 | |
| elmot | 1:d0dfbce63a89 | 384 | /** |
| elmot | 1:d0dfbce63a89 | 385 | * @brief FMC_NAND Configuration Structure definition |
| elmot | 1:d0dfbce63a89 | 386 | */ |
| elmot | 1:d0dfbce63a89 | 387 | typedef struct |
| elmot | 1:d0dfbce63a89 | 388 | { |
| elmot | 1:d0dfbce63a89 | 389 | uint32_t NandBank; /*!< Specifies the NAND memory device that will be used. |
| elmot | 1:d0dfbce63a89 | 390 | This parameter can be a value of @ref FMC_NAND_Bank */ |
| elmot | 1:d0dfbce63a89 | 391 | |
| elmot | 1:d0dfbce63a89 | 392 | uint32_t Waitfeature; /*!< Enables or disables the Wait feature for the NAND Memory device. |
| elmot | 1:d0dfbce63a89 | 393 | This parameter can be any value of @ref FMC_Wait_feature */ |
| elmot | 1:d0dfbce63a89 | 394 | |
| elmot | 1:d0dfbce63a89 | 395 | uint32_t MemoryDataWidth; /*!< Specifies the external memory device width. |
| elmot | 1:d0dfbce63a89 | 396 | This parameter can be any value of @ref FMC_NAND_Data_Width */ |
| elmot | 1:d0dfbce63a89 | 397 | |
| elmot | 1:d0dfbce63a89 | 398 | uint32_t EccComputation; /*!< Enables or disables the ECC computation. |
| elmot | 1:d0dfbce63a89 | 399 | This parameter can be any value of @ref FMC_ECC */ |
| elmot | 1:d0dfbce63a89 | 400 | |
| elmot | 1:d0dfbce63a89 | 401 | uint32_t ECCPageSize; /*!< Defines the page size for the extended ECC. |
| elmot | 1:d0dfbce63a89 | 402 | This parameter can be any value of @ref FMC_ECC_Page_Size */ |
| elmot | 1:d0dfbce63a89 | 403 | |
| elmot | 1:d0dfbce63a89 | 404 | uint32_t TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the |
| elmot | 1:d0dfbce63a89 | 405 | delay between CLE low and RE low. |
| elmot | 1:d0dfbce63a89 | 406 | This parameter can be a value between Min_Data = 0 and Max_Data = 255 */ |
| elmot | 1:d0dfbce63a89 | 407 | |
| elmot | 1:d0dfbce63a89 | 408 | uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the |
| elmot | 1:d0dfbce63a89 | 409 | delay between ALE low and RE low. |
| elmot | 1:d0dfbce63a89 | 410 | This parameter can be a number between Min_Data = 0 and Max_Data = 255 */ |
| elmot | 1:d0dfbce63a89 | 411 | }FMC_NAND_InitTypeDef; |
| elmot | 1:d0dfbce63a89 | 412 | |
| elmot | 1:d0dfbce63a89 | 413 | /** |
| elmot | 1:d0dfbce63a89 | 414 | * @brief FMC_NAND Timing parameters structure definition |
| elmot | 1:d0dfbce63a89 | 415 | */ |
| elmot | 1:d0dfbce63a89 | 416 | typedef struct |
| elmot | 1:d0dfbce63a89 | 417 | { |
| elmot | 1:d0dfbce63a89 | 418 | uint32_t SetupTime; /*!< Defines the number of HCLK cycles to setup address before |
| elmot | 1:d0dfbce63a89 | 419 | the command assertion for NAND-Flash read or write access |
| elmot | 1:d0dfbce63a89 | 420 | to common/Attribute or I/O memory space (depending on |
| elmot | 1:d0dfbce63a89 | 421 | the memory space timing to be configured). |
| elmot | 1:d0dfbce63a89 | 422 | This parameter can be a value between Min_Data = 0 and Max_Data = 255 */ |
| elmot | 1:d0dfbce63a89 | 423 | |
| elmot | 1:d0dfbce63a89 | 424 | uint32_t WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the |
| elmot | 1:d0dfbce63a89 | 425 | command for NAND-Flash read or write access to |
| elmot | 1:d0dfbce63a89 | 426 | common/Attribute or I/O memory space (depending on the |
| elmot | 1:d0dfbce63a89 | 427 | memory space timing to be configured). |
| elmot | 1:d0dfbce63a89 | 428 | This parameter can be a number between Min_Data = 0 and Max_Data = 255 */ |
| elmot | 1:d0dfbce63a89 | 429 | |
| elmot | 1:d0dfbce63a89 | 430 | uint32_t HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address |
| elmot | 1:d0dfbce63a89 | 431 | (and data for write access) after the command de-assertion |
| elmot | 1:d0dfbce63a89 | 432 | for NAND-Flash read or write access to common/Attribute |
| elmot | 1:d0dfbce63a89 | 433 | or I/O memory space (depending on the memory space timing |
| elmot | 1:d0dfbce63a89 | 434 | to be configured). |
| elmot | 1:d0dfbce63a89 | 435 | This parameter can be a number between Min_Data = 0 and Max_Data = 255 */ |
| elmot | 1:d0dfbce63a89 | 436 | |
| elmot | 1:d0dfbce63a89 | 437 | uint32_t HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the |
| elmot | 1:d0dfbce63a89 | 438 | data bus is kept in HiZ after the start of a NAND-Flash |
| elmot | 1:d0dfbce63a89 | 439 | write access to common/Attribute or I/O memory space (depending |
| elmot | 1:d0dfbce63a89 | 440 | on the memory space timing to be configured). |
| elmot | 1:d0dfbce63a89 | 441 | This parameter can be a number between Min_Data = 0 and Max_Data = 255 */ |
| elmot | 1:d0dfbce63a89 | 442 | }FMC_NAND_PCC_TimingTypeDef; |
| elmot | 1:d0dfbce63a89 | 443 | |
| elmot | 1:d0dfbce63a89 | 444 | /** |
| elmot | 1:d0dfbce63a89 | 445 | * @} |
| elmot | 1:d0dfbce63a89 | 446 | */ |
| elmot | 1:d0dfbce63a89 | 447 | |
| elmot | 1:d0dfbce63a89 | 448 | /* Exported constants --------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 449 | /** @addtogroup FMC_LL_Exported_Constants FMC Low Layer Exported Constants |
| elmot | 1:d0dfbce63a89 | 450 | * @{ |
| elmot | 1:d0dfbce63a89 | 451 | */ |
| elmot | 1:d0dfbce63a89 | 452 | |
| elmot | 1:d0dfbce63a89 | 453 | /** @defgroup FMC_NOR_SRAM_Exported_constants FMC NOR/SRAM Exported constants |
| elmot | 1:d0dfbce63a89 | 454 | * @{ |
| elmot | 1:d0dfbce63a89 | 455 | */ |
| elmot | 1:d0dfbce63a89 | 456 | |
| elmot | 1:d0dfbce63a89 | 457 | /** @defgroup FMC_NORSRAM_Bank FMC NOR/SRAM Bank |
| elmot | 1:d0dfbce63a89 | 458 | * @{ |
| elmot | 1:d0dfbce63a89 | 459 | */ |
| elmot | 1:d0dfbce63a89 | 460 | #define FMC_NORSRAM_BANK1 ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 461 | #define FMC_NORSRAM_BANK2 ((uint32_t)0x00000002) |
| elmot | 1:d0dfbce63a89 | 462 | #define FMC_NORSRAM_BANK3 ((uint32_t)0x00000004) |
| elmot | 1:d0dfbce63a89 | 463 | #define FMC_NORSRAM_BANK4 ((uint32_t)0x00000006) |
| elmot | 1:d0dfbce63a89 | 464 | /** |
| elmot | 1:d0dfbce63a89 | 465 | * @} |
| elmot | 1:d0dfbce63a89 | 466 | */ |
| elmot | 1:d0dfbce63a89 | 467 | |
| elmot | 1:d0dfbce63a89 | 468 | /** @defgroup FMC_Data_Address_Bus_Multiplexing FMC Data Address Bus Multiplexing |
| elmot | 1:d0dfbce63a89 | 469 | * @{ |
| elmot | 1:d0dfbce63a89 | 470 | */ |
| elmot | 1:d0dfbce63a89 | 471 | #define FMC_DATA_ADDRESS_MUX_DISABLE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 472 | #define FMC_DATA_ADDRESS_MUX_ENABLE ((uint32_t)FMC_BCRx_MUXEN) |
| elmot | 1:d0dfbce63a89 | 473 | /** |
| elmot | 1:d0dfbce63a89 | 474 | * @} |
| elmot | 1:d0dfbce63a89 | 475 | */ |
| elmot | 1:d0dfbce63a89 | 476 | |
| elmot | 1:d0dfbce63a89 | 477 | /** @defgroup FMC_Memory_Type FMC Memory Type |
| elmot | 1:d0dfbce63a89 | 478 | * @{ |
| elmot | 1:d0dfbce63a89 | 479 | */ |
| elmot | 1:d0dfbce63a89 | 480 | #define FMC_MEMORY_TYPE_SRAM ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 481 | #define FMC_MEMORY_TYPE_PSRAM ((uint32_t)FMC_BCRx_MTYP_0) |
| elmot | 1:d0dfbce63a89 | 482 | #define FMC_MEMORY_TYPE_NOR ((uint32_t)FMC_BCRx_MTYP_1) |
| elmot | 1:d0dfbce63a89 | 483 | /** |
| elmot | 1:d0dfbce63a89 | 484 | * @} |
| elmot | 1:d0dfbce63a89 | 485 | */ |
| elmot | 1:d0dfbce63a89 | 486 | |
| elmot | 1:d0dfbce63a89 | 487 | /** @defgroup FMC_NORSRAM_Data_Width FMC NORSRAM Data Width |
| elmot | 1:d0dfbce63a89 | 488 | * @{ |
| elmot | 1:d0dfbce63a89 | 489 | */ |
| elmot | 1:d0dfbce63a89 | 490 | #define FMC_NORSRAM_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 491 | #define FMC_NORSRAM_MEM_BUS_WIDTH_16 ((uint32_t)FMC_BCRx_MWID_0) |
| elmot | 1:d0dfbce63a89 | 492 | #define FMC_NORSRAM_MEM_BUS_WIDTH_32 ((uint32_t)FMC_BCRx_MWID_1) |
| elmot | 1:d0dfbce63a89 | 493 | /** |
| elmot | 1:d0dfbce63a89 | 494 | * @} |
| elmot | 1:d0dfbce63a89 | 495 | */ |
| elmot | 1:d0dfbce63a89 | 496 | |
| elmot | 1:d0dfbce63a89 | 497 | /** @defgroup FMC_NORSRAM_Flash_Access FMC NORSRAM Flash Access |
| elmot | 1:d0dfbce63a89 | 498 | * @{ |
| elmot | 1:d0dfbce63a89 | 499 | */ |
| elmot | 1:d0dfbce63a89 | 500 | #define FMC_NORSRAM_FLASH_ACCESS_ENABLE ((uint32_t)FMC_BCRx_FACCEN) |
| elmot | 1:d0dfbce63a89 | 501 | #define FMC_NORSRAM_FLASH_ACCESS_DISABLE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 502 | /** |
| elmot | 1:d0dfbce63a89 | 503 | * @} |
| elmot | 1:d0dfbce63a89 | 504 | */ |
| elmot | 1:d0dfbce63a89 | 505 | |
| elmot | 1:d0dfbce63a89 | 506 | /** @defgroup FMC_Burst_Access_Mode FMC Burst Access Mode |
| elmot | 1:d0dfbce63a89 | 507 | * @{ |
| elmot | 1:d0dfbce63a89 | 508 | */ |
| elmot | 1:d0dfbce63a89 | 509 | #define FMC_BURST_ACCESS_MODE_DISABLE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 510 | #define FMC_BURST_ACCESS_MODE_ENABLE ((uint32_t)FMC_BCRx_BURSTEN) |
| elmot | 1:d0dfbce63a89 | 511 | /** |
| elmot | 1:d0dfbce63a89 | 512 | * @} |
| elmot | 1:d0dfbce63a89 | 513 | */ |
| elmot | 1:d0dfbce63a89 | 514 | |
| elmot | 1:d0dfbce63a89 | 515 | |
| elmot | 1:d0dfbce63a89 | 516 | /** @defgroup FMC_Wait_Signal_Polarity FMC Wait Signal Polarity |
| elmot | 1:d0dfbce63a89 | 517 | * @{ |
| elmot | 1:d0dfbce63a89 | 518 | */ |
| elmot | 1:d0dfbce63a89 | 519 | #define FMC_WAIT_SIGNAL_POLARITY_LOW ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 520 | #define FMC_WAIT_SIGNAL_POLARITY_HIGH ((uint32_t)FMC_BCRx_WAITPOL) |
| elmot | 1:d0dfbce63a89 | 521 | /** |
| elmot | 1:d0dfbce63a89 | 522 | * @} |
| elmot | 1:d0dfbce63a89 | 523 | */ |
| elmot | 1:d0dfbce63a89 | 524 | |
| elmot | 1:d0dfbce63a89 | 525 | /** @defgroup FMC_Wait_Timing FMC Wait Timing |
| elmot | 1:d0dfbce63a89 | 526 | * @{ |
| elmot | 1:d0dfbce63a89 | 527 | */ |
| elmot | 1:d0dfbce63a89 | 528 | #define FMC_WAIT_TIMING_BEFORE_WS ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 529 | #define FMC_WAIT_TIMING_DURING_WS ((uint32_t)FMC_BCRx_WAITCFG) |
| elmot | 1:d0dfbce63a89 | 530 | |
| elmot | 1:d0dfbce63a89 | 531 | /** |
| elmot | 1:d0dfbce63a89 | 532 | * @} |
| elmot | 1:d0dfbce63a89 | 533 | */ |
| elmot | 1:d0dfbce63a89 | 534 | |
| elmot | 1:d0dfbce63a89 | 535 | /** @defgroup FMC_Write_Operation FMC Write Operation |
| elmot | 1:d0dfbce63a89 | 536 | * @{ |
| elmot | 1:d0dfbce63a89 | 537 | */ |
| elmot | 1:d0dfbce63a89 | 538 | #define FMC_WRITE_OPERATION_DISABLE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 539 | #define FMC_WRITE_OPERATION_ENABLE ((uint32_t)FMC_BCRx_WREN) |
| elmot | 1:d0dfbce63a89 | 540 | /** |
| elmot | 1:d0dfbce63a89 | 541 | * @} |
| elmot | 1:d0dfbce63a89 | 542 | */ |
| elmot | 1:d0dfbce63a89 | 543 | |
| elmot | 1:d0dfbce63a89 | 544 | /** @defgroup FMC_Wait_Signal FMC Wait Signal |
| elmot | 1:d0dfbce63a89 | 545 | * @{ |
| elmot | 1:d0dfbce63a89 | 546 | */ |
| elmot | 1:d0dfbce63a89 | 547 | #define FMC_WAIT_SIGNAL_DISABLE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 548 | #define FMC_WAIT_SIGNAL_ENABLE ((uint32_t)FMC_BCRx_WAITEN) |
| elmot | 1:d0dfbce63a89 | 549 | /** |
| elmot | 1:d0dfbce63a89 | 550 | * @} |
| elmot | 1:d0dfbce63a89 | 551 | */ |
| elmot | 1:d0dfbce63a89 | 552 | |
| elmot | 1:d0dfbce63a89 | 553 | /** @defgroup FMC_Extended_Mode FMC Extended Mode |
| elmot | 1:d0dfbce63a89 | 554 | * @{ |
| elmot | 1:d0dfbce63a89 | 555 | */ |
| elmot | 1:d0dfbce63a89 | 556 | #define FMC_EXTENDED_MODE_DISABLE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 557 | #define FMC_EXTENDED_MODE_ENABLE ((uint32_t)FMC_BCRx_EXTMOD) |
| elmot | 1:d0dfbce63a89 | 558 | /** |
| elmot | 1:d0dfbce63a89 | 559 | * @} |
| elmot | 1:d0dfbce63a89 | 560 | */ |
| elmot | 1:d0dfbce63a89 | 561 | |
| elmot | 1:d0dfbce63a89 | 562 | /** @defgroup FMC_AsynchronousWait FMC Asynchronous Wait |
| elmot | 1:d0dfbce63a89 | 563 | * @{ |
| elmot | 1:d0dfbce63a89 | 564 | */ |
| elmot | 1:d0dfbce63a89 | 565 | #define FMC_ASYNCHRONOUS_WAIT_DISABLE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 566 | #define FMC_ASYNCHRONOUS_WAIT_ENABLE ((uint32_t)FMC_BCRx_ASYNCWAIT) |
| elmot | 1:d0dfbce63a89 | 567 | /** |
| elmot | 1:d0dfbce63a89 | 568 | * @} |
| elmot | 1:d0dfbce63a89 | 569 | */ |
| elmot | 1:d0dfbce63a89 | 570 | |
| elmot | 1:d0dfbce63a89 | 571 | /** @defgroup FMC_Page_Size FMC Page Size |
| elmot | 1:d0dfbce63a89 | 572 | * @{ |
| elmot | 1:d0dfbce63a89 | 573 | */ |
| elmot | 1:d0dfbce63a89 | 574 | #define FMC_PAGE_SIZE_NONE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 575 | #define FMC_PAGE_SIZE_128 ((uint32_t)FMC_BCRx_CPSIZE_0) |
| elmot | 1:d0dfbce63a89 | 576 | #define FMC_PAGE_SIZE_256 ((uint32_t)FMC_BCRx_CPSIZE_1) |
| elmot | 1:d0dfbce63a89 | 577 | #define FMC_PAGE_SIZE_512 ((uint32_t)(FMC_BCRx_CPSIZE_0 | FMC_BCRx_CPSIZE_1)) |
| elmot | 1:d0dfbce63a89 | 578 | #define FMC_PAGE_SIZE_1024 ((uint32_t)FMC_BCRx_CPSIZE_2) |
| elmot | 1:d0dfbce63a89 | 579 | /** |
| elmot | 1:d0dfbce63a89 | 580 | * @} |
| elmot | 1:d0dfbce63a89 | 581 | */ |
| elmot | 1:d0dfbce63a89 | 582 | |
| elmot | 1:d0dfbce63a89 | 583 | /** @defgroup FMC_Write_Burst FMC Write Burst |
| elmot | 1:d0dfbce63a89 | 584 | * @{ |
| elmot | 1:d0dfbce63a89 | 585 | */ |
| elmot | 1:d0dfbce63a89 | 586 | #define FMC_WRITE_BURST_DISABLE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 587 | #define FMC_WRITE_BURST_ENABLE ((uint32_t)FMC_BCRx_CBURSTRW) |
| elmot | 1:d0dfbce63a89 | 588 | /** |
| elmot | 1:d0dfbce63a89 | 589 | * @} |
| elmot | 1:d0dfbce63a89 | 590 | */ |
| elmot | 1:d0dfbce63a89 | 591 | |
| elmot | 1:d0dfbce63a89 | 592 | /** @defgroup FMC_Continous_Clock FMC Continous Clock |
| elmot | 1:d0dfbce63a89 | 593 | * @{ |
| elmot | 1:d0dfbce63a89 | 594 | */ |
| elmot | 1:d0dfbce63a89 | 595 | #define FMC_CONTINUOUS_CLOCK_SYNC_ONLY ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 596 | #define FMC_CONTINUOUS_CLOCK_SYNC_ASYNC ((uint32_t)FMC_BCR1_CCLKEN) |
| elmot | 1:d0dfbce63a89 | 597 | /** |
| elmot | 1:d0dfbce63a89 | 598 | * @} |
| elmot | 1:d0dfbce63a89 | 599 | */ |
| elmot | 1:d0dfbce63a89 | 600 | |
| elmot | 1:d0dfbce63a89 | 601 | /** @defgroup FMC_Access_Mode FMC Access Mode |
| elmot | 1:d0dfbce63a89 | 602 | * @{ |
| elmot | 1:d0dfbce63a89 | 603 | */ |
| elmot | 1:d0dfbce63a89 | 604 | #define FMC_ACCESS_MODE_A ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 605 | #define FMC_ACCESS_MODE_B ((uint32_t)FMC_BTRx_ACCMOD_0) |
| elmot | 1:d0dfbce63a89 | 606 | #define FMC_ACCESS_MODE_C ((uint32_t)FMC_BTRx_ACCMOD_1) |
| elmot | 1:d0dfbce63a89 | 607 | #define FMC_ACCESS_MODE_D ((uint32_t)(FMC_BTRx_ACCMOD_0|FMC_BTRx_ACCMOD_1)) |
| elmot | 1:d0dfbce63a89 | 608 | /** |
| elmot | 1:d0dfbce63a89 | 609 | * @} |
| elmot | 1:d0dfbce63a89 | 610 | */ |
| elmot | 1:d0dfbce63a89 | 611 | |
| elmot | 1:d0dfbce63a89 | 612 | /** |
| elmot | 1:d0dfbce63a89 | 613 | * @} |
| elmot | 1:d0dfbce63a89 | 614 | */ |
| elmot | 1:d0dfbce63a89 | 615 | |
| elmot | 1:d0dfbce63a89 | 616 | /** |
| elmot | 1:d0dfbce63a89 | 617 | * @} |
| elmot | 1:d0dfbce63a89 | 618 | */ |
| elmot | 1:d0dfbce63a89 | 619 | |
| elmot | 1:d0dfbce63a89 | 620 | /** @defgroup FMC_NAND_Controller FMC NAND Exported constants |
| elmot | 1:d0dfbce63a89 | 621 | * @{ |
| elmot | 1:d0dfbce63a89 | 622 | */ |
| elmot | 1:d0dfbce63a89 | 623 | |
| elmot | 1:d0dfbce63a89 | 624 | /** @defgroup FMC_NAND_Bank FMC NAND Bank |
| elmot | 1:d0dfbce63a89 | 625 | * @{ |
| elmot | 1:d0dfbce63a89 | 626 | */ |
| elmot | 1:d0dfbce63a89 | 627 | #define FMC_NAND_BANK3 ((uint32_t)0x00000100) |
| elmot | 1:d0dfbce63a89 | 628 | /** |
| elmot | 1:d0dfbce63a89 | 629 | * @} |
| elmot | 1:d0dfbce63a89 | 630 | */ |
| elmot | 1:d0dfbce63a89 | 631 | |
| elmot | 1:d0dfbce63a89 | 632 | /** @defgroup FMC_Wait_feature FMC Wait feature |
| elmot | 1:d0dfbce63a89 | 633 | * @{ |
| elmot | 1:d0dfbce63a89 | 634 | */ |
| elmot | 1:d0dfbce63a89 | 635 | #define FMC_NAND_WAIT_FEATURE_DISABLE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 636 | #define FMC_NAND_WAIT_FEATURE_ENABLE ((uint32_t)FMC_PCR_PWAITEN) |
| elmot | 1:d0dfbce63a89 | 637 | /** |
| elmot | 1:d0dfbce63a89 | 638 | * @} |
| elmot | 1:d0dfbce63a89 | 639 | */ |
| elmot | 1:d0dfbce63a89 | 640 | |
| elmot | 1:d0dfbce63a89 | 641 | /** @defgroup FMC_PCR_Memory_Type FMC PCR Memory Type |
| elmot | 1:d0dfbce63a89 | 642 | * @{ |
| elmot | 1:d0dfbce63a89 | 643 | */ |
| elmot | 1:d0dfbce63a89 | 644 | #define FMC_PCR_MEMORY_TYPE_NAND ((uint32_t)FMC_PCR_PTYP) |
| elmot | 1:d0dfbce63a89 | 645 | /** |
| elmot | 1:d0dfbce63a89 | 646 | * @} |
| elmot | 1:d0dfbce63a89 | 647 | */ |
| elmot | 1:d0dfbce63a89 | 648 | |
| elmot | 1:d0dfbce63a89 | 649 | /** @defgroup FMC_NAND_Data_Width FMC NAND Data Width |
| elmot | 1:d0dfbce63a89 | 650 | * @{ |
| elmot | 1:d0dfbce63a89 | 651 | */ |
| elmot | 1:d0dfbce63a89 | 652 | #define FMC_NAND_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 653 | #define FMC_NAND_MEM_BUS_WIDTH_16 ((uint32_t)FMC_PCR_PWID_0) |
| elmot | 1:d0dfbce63a89 | 654 | /** |
| elmot | 1:d0dfbce63a89 | 655 | * @} |
| elmot | 1:d0dfbce63a89 | 656 | */ |
| elmot | 1:d0dfbce63a89 | 657 | |
| elmot | 1:d0dfbce63a89 | 658 | /** @defgroup FMC_ECC FMC NAND ECC |
| elmot | 1:d0dfbce63a89 | 659 | * @{ |
| elmot | 1:d0dfbce63a89 | 660 | */ |
| elmot | 1:d0dfbce63a89 | 661 | #define FMC_NAND_ECC_DISABLE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 662 | #define FMC_NAND_ECC_ENABLE ((uint32_t)FMC_PCR_ECCEN) |
| elmot | 1:d0dfbce63a89 | 663 | /** |
| elmot | 1:d0dfbce63a89 | 664 | * @} |
| elmot | 1:d0dfbce63a89 | 665 | */ |
| elmot | 1:d0dfbce63a89 | 666 | |
| elmot | 1:d0dfbce63a89 | 667 | /** @defgroup FMC_ECC_Page_Size FMC NAND ECC Page Size |
| elmot | 1:d0dfbce63a89 | 668 | * @{ |
| elmot | 1:d0dfbce63a89 | 669 | */ |
| elmot | 1:d0dfbce63a89 | 670 | #define FMC_NAND_ECC_PAGE_SIZE_256BYTE ((uint32_t)0x00000000) |
| elmot | 1:d0dfbce63a89 | 671 | #define FMC_NAND_ECC_PAGE_SIZE_512BYTE ((uint32_t)FMC_PCR_ECCPS_0) |
| elmot | 1:d0dfbce63a89 | 672 | #define FMC_NAND_ECC_PAGE_SIZE_1024BYTE ((uint32_t)FMC_PCR_ECCPS_1) |
| elmot | 1:d0dfbce63a89 | 673 | #define FMC_NAND_ECC_PAGE_SIZE_2048BYTE ((uint32_t)FMC_PCR_ECCPS_0|FMC_PCR_ECCPS_1) |
| elmot | 1:d0dfbce63a89 | 674 | #define FMC_NAND_ECC_PAGE_SIZE_4096BYTE ((uint32_t)FMC_PCR_ECCPS_2) |
| elmot | 1:d0dfbce63a89 | 675 | #define FMC_NAND_ECC_PAGE_SIZE_8192BYTE ((uint32_t)FMC_PCR_ECCPS_0|FMC_PCR_ECCPS_2) |
| elmot | 1:d0dfbce63a89 | 676 | /** |
| elmot | 1:d0dfbce63a89 | 677 | * @} |
| elmot | 1:d0dfbce63a89 | 678 | */ |
| elmot | 1:d0dfbce63a89 | 679 | |
| elmot | 1:d0dfbce63a89 | 680 | /** |
| elmot | 1:d0dfbce63a89 | 681 | * @} |
| elmot | 1:d0dfbce63a89 | 682 | */ |
| elmot | 1:d0dfbce63a89 | 683 | |
| elmot | 1:d0dfbce63a89 | 684 | /** |
| elmot | 1:d0dfbce63a89 | 685 | * @} |
| elmot | 1:d0dfbce63a89 | 686 | */ |
| elmot | 1:d0dfbce63a89 | 687 | |
| elmot | 1:d0dfbce63a89 | 688 | /** @defgroup FMC_Interrupt_definition FMC Interrupt definition |
| elmot | 1:d0dfbce63a89 | 689 | * @brief FMC Interrupt definition |
| elmot | 1:d0dfbce63a89 | 690 | * @{ |
| elmot | 1:d0dfbce63a89 | 691 | */ |
| elmot | 1:d0dfbce63a89 | 692 | #define FMC_IT_RISING_EDGE ((uint32_t)FMC_SR_IREN) |
| elmot | 1:d0dfbce63a89 | 693 | #define FMC_IT_LEVEL ((uint32_t)FMC_SR_ILEN) |
| elmot | 1:d0dfbce63a89 | 694 | #define FMC_IT_FALLING_EDGE ((uint32_t)FMC_SR_IFEN) |
| elmot | 1:d0dfbce63a89 | 695 | /** |
| elmot | 1:d0dfbce63a89 | 696 | * @} |
| elmot | 1:d0dfbce63a89 | 697 | */ |
| elmot | 1:d0dfbce63a89 | 698 | |
| elmot | 1:d0dfbce63a89 | 699 | /** @defgroup FMC_Flag_definition FMC Flag definition |
| elmot | 1:d0dfbce63a89 | 700 | * @brief FMC Flag definition |
| elmot | 1:d0dfbce63a89 | 701 | * @{ |
| elmot | 1:d0dfbce63a89 | 702 | */ |
| elmot | 1:d0dfbce63a89 | 703 | #define FMC_FLAG_RISING_EDGE ((uint32_t)FMC_SR_IRS) |
| elmot | 1:d0dfbce63a89 | 704 | #define FMC_FLAG_LEVEL ((uint32_t)FMC_SR_ILS) |
| elmot | 1:d0dfbce63a89 | 705 | #define FMC_FLAG_FALLING_EDGE ((uint32_t)FMC_SR_IFS) |
| elmot | 1:d0dfbce63a89 | 706 | #define FMC_FLAG_FEMPT ((uint32_t)FMC_SR_FEMPT) |
| elmot | 1:d0dfbce63a89 | 707 | /** |
| elmot | 1:d0dfbce63a89 | 708 | * @} |
| elmot | 1:d0dfbce63a89 | 709 | */ |
| elmot | 1:d0dfbce63a89 | 710 | |
| elmot | 1:d0dfbce63a89 | 711 | /* Exported macro ------------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 712 | |
| elmot | 1:d0dfbce63a89 | 713 | /** @defgroup FMC_Exported_Macros FMC Low Layer Exported Macros |
| elmot | 1:d0dfbce63a89 | 714 | * @{ |
| elmot | 1:d0dfbce63a89 | 715 | */ |
| elmot | 1:d0dfbce63a89 | 716 | |
| elmot | 1:d0dfbce63a89 | 717 | /** @defgroup FMC_NOR_Macros FMC NOR/SRAM Exported Macros |
| elmot | 1:d0dfbce63a89 | 718 | * @brief macros to handle NOR device enable/disable and read/write operations |
| elmot | 1:d0dfbce63a89 | 719 | * @{ |
| elmot | 1:d0dfbce63a89 | 720 | */ |
| elmot | 1:d0dfbce63a89 | 721 | |
| elmot | 1:d0dfbce63a89 | 722 | /** |
| elmot | 1:d0dfbce63a89 | 723 | * @brief Enable the NORSRAM device access. |
| elmot | 1:d0dfbce63a89 | 724 | * @param __INSTANCE__: FMC_NORSRAM Instance |
| elmot | 1:d0dfbce63a89 | 725 | * @param __BANK__: FMC_NORSRAM Bank |
| elmot | 1:d0dfbce63a89 | 726 | * @retval none |
| elmot | 1:d0dfbce63a89 | 727 | */ |
| elmot | 1:d0dfbce63a89 | 728 | #define __FMC_NORSRAM_ENABLE(__INSTANCE__, __BANK__) SET_BIT((__INSTANCE__)->BTCR[(__BANK__)], FMC_BCRx_MBKEN) |
| elmot | 1:d0dfbce63a89 | 729 | |
| elmot | 1:d0dfbce63a89 | 730 | /** |
| elmot | 1:d0dfbce63a89 | 731 | * @brief Disable the NORSRAM device access. |
| elmot | 1:d0dfbce63a89 | 732 | * @param __INSTANCE__: FMC_NORSRAM Instance |
| elmot | 1:d0dfbce63a89 | 733 | * @param __BANK__: FMC_NORSRAM Bank |
| elmot | 1:d0dfbce63a89 | 734 | * @retval none |
| elmot | 1:d0dfbce63a89 | 735 | */ |
| elmot | 1:d0dfbce63a89 | 736 | #define __FMC_NORSRAM_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->BTCR[(__BANK__)], FMC_BCRx_MBKEN) |
| elmot | 1:d0dfbce63a89 | 737 | |
| elmot | 1:d0dfbce63a89 | 738 | /** |
| elmot | 1:d0dfbce63a89 | 739 | * @} |
| elmot | 1:d0dfbce63a89 | 740 | */ |
| elmot | 1:d0dfbce63a89 | 741 | |
| elmot | 1:d0dfbce63a89 | 742 | /** @defgroup FMC_NAND_Macros FMC NAND Macros |
| elmot | 1:d0dfbce63a89 | 743 | * @brief macros to handle NAND device enable/disable |
| elmot | 1:d0dfbce63a89 | 744 | * @{ |
| elmot | 1:d0dfbce63a89 | 745 | */ |
| elmot | 1:d0dfbce63a89 | 746 | |
| elmot | 1:d0dfbce63a89 | 747 | /** |
| elmot | 1:d0dfbce63a89 | 748 | * @brief Enable the NAND device access. |
| elmot | 1:d0dfbce63a89 | 749 | * @param __INSTANCE__: FMC_NAND Instance |
| elmot | 1:d0dfbce63a89 | 750 | * @param __BANK__: FMC_NAND Bank |
| elmot | 1:d0dfbce63a89 | 751 | * @retval none |
| elmot | 1:d0dfbce63a89 | 752 | */ |
| elmot | 1:d0dfbce63a89 | 753 | #define __FMC_NAND_ENABLE(__INSTANCE__, __BANK__) SET_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN) |
| elmot | 1:d0dfbce63a89 | 754 | |
| elmot | 1:d0dfbce63a89 | 755 | /** |
| elmot | 1:d0dfbce63a89 | 756 | * @brief Disable the NAND device access. |
| elmot | 1:d0dfbce63a89 | 757 | * @param __INSTANCE__: FMC_NAND Instance |
| elmot | 1:d0dfbce63a89 | 758 | * @param __BANK__: FMC_NAND Bank |
| elmot | 1:d0dfbce63a89 | 759 | * @retval None |
| elmot | 1:d0dfbce63a89 | 760 | */ |
| elmot | 1:d0dfbce63a89 | 761 | #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN) |
| elmot | 1:d0dfbce63a89 | 762 | |
| elmot | 1:d0dfbce63a89 | 763 | /** |
| elmot | 1:d0dfbce63a89 | 764 | * @} |
| elmot | 1:d0dfbce63a89 | 765 | */ |
| elmot | 1:d0dfbce63a89 | 766 | |
| elmot | 1:d0dfbce63a89 | 767 | /** @defgroup FMC_Interrupt FMC Interrupt |
| elmot | 1:d0dfbce63a89 | 768 | * @brief macros to handle FMC interrupts |
| elmot | 1:d0dfbce63a89 | 769 | * @{ |
| elmot | 1:d0dfbce63a89 | 770 | */ |
| elmot | 1:d0dfbce63a89 | 771 | |
| elmot | 1:d0dfbce63a89 | 772 | /** |
| elmot | 1:d0dfbce63a89 | 773 | * @brief Enable the NAND device interrupt. |
| elmot | 1:d0dfbce63a89 | 774 | * @param __INSTANCE__: FMC_NAND Instance |
| elmot | 1:d0dfbce63a89 | 775 | * @param __BANK__: FMC_NAND Bank |
| elmot | 1:d0dfbce63a89 | 776 | * @param __INTERRUPT__: FMC_NAND interrupt |
| elmot | 1:d0dfbce63a89 | 777 | * This parameter can be any combination of the following values: |
| elmot | 1:d0dfbce63a89 | 778 | * @arg FMC_IT_RISING_EDGE: Interrupt rising edge. |
| elmot | 1:d0dfbce63a89 | 779 | * @arg FMC_IT_LEVEL: Interrupt level. |
| elmot | 1:d0dfbce63a89 | 780 | * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge. |
| elmot | 1:d0dfbce63a89 | 781 | * @retval None |
| elmot | 1:d0dfbce63a89 | 782 | */ |
| elmot | 1:d0dfbce63a89 | 783 | #define __FMC_NAND_ENABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) SET_BIT((__INSTANCE__)->SR, (__INTERRUPT__)) |
| elmot | 1:d0dfbce63a89 | 784 | |
| elmot | 1:d0dfbce63a89 | 785 | /** |
| elmot | 1:d0dfbce63a89 | 786 | * @brief Disable the NAND device interrupt. |
| elmot | 1:d0dfbce63a89 | 787 | * @param __INSTANCE__: FMC_NAND Instance |
| elmot | 1:d0dfbce63a89 | 788 | * @param __BANK__: FMC_NAND Bank |
| elmot | 1:d0dfbce63a89 | 789 | * @param __INTERRUPT__: FMC_NAND interrupt |
| elmot | 1:d0dfbce63a89 | 790 | * This parameter can be any combination of the following values: |
| elmot | 1:d0dfbce63a89 | 791 | * @arg FMC_IT_RISING_EDGE: Interrupt rising edge. |
| elmot | 1:d0dfbce63a89 | 792 | * @arg FMC_IT_LEVEL: Interrupt level. |
| elmot | 1:d0dfbce63a89 | 793 | * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge. |
| elmot | 1:d0dfbce63a89 | 794 | * @retval None |
| elmot | 1:d0dfbce63a89 | 795 | */ |
| elmot | 1:d0dfbce63a89 | 796 | #define __FMC_NAND_DISABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) CLEAR_BIT((__INSTANCE__)->SR, (__INTERRUPT__)) |
| elmot | 1:d0dfbce63a89 | 797 | |
| elmot | 1:d0dfbce63a89 | 798 | /** |
| elmot | 1:d0dfbce63a89 | 799 | * @brief Get flag status of the NAND device. |
| elmot | 1:d0dfbce63a89 | 800 | * @param __INSTANCE__: FMC_NAND Instance |
| elmot | 1:d0dfbce63a89 | 801 | * @param __BANK__: FMC_NAND Bank |
| elmot | 1:d0dfbce63a89 | 802 | * @param __FLAG__: FMC_NAND flag |
| elmot | 1:d0dfbce63a89 | 803 | * This parameter can be any combination of the following values: |
| elmot | 1:d0dfbce63a89 | 804 | * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag. |
| elmot | 1:d0dfbce63a89 | 805 | * @arg FMC_FLAG_LEVEL: Interrupt level edge flag. |
| elmot | 1:d0dfbce63a89 | 806 | * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag. |
| elmot | 1:d0dfbce63a89 | 807 | * @arg FMC_FLAG_FEMPT: FIFO empty flag. |
| elmot | 1:d0dfbce63a89 | 808 | * @retval The state of FLAG (SET or RESET). |
| elmot | 1:d0dfbce63a89 | 809 | */ |
| elmot | 1:d0dfbce63a89 | 810 | #define __FMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__INSTANCE__)->SR &(__FLAG__)) == (__FLAG__)) |
| elmot | 1:d0dfbce63a89 | 811 | |
| elmot | 1:d0dfbce63a89 | 812 | /** |
| elmot | 1:d0dfbce63a89 | 813 | * @brief Clear flag status of the NAND device. |
| elmot | 1:d0dfbce63a89 | 814 | * @param __INSTANCE__: FMC_NAND Instance |
| elmot | 1:d0dfbce63a89 | 815 | * @param __BANK__: FMC_NAND Bank |
| elmot | 1:d0dfbce63a89 | 816 | * @param __FLAG__: FMC_NAND flag |
| elmot | 1:d0dfbce63a89 | 817 | * This parameter can be any combination of the following values: |
| elmot | 1:d0dfbce63a89 | 818 | * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag. |
| elmot | 1:d0dfbce63a89 | 819 | * @arg FMC_FLAG_LEVEL: Interrupt level edge flag. |
| elmot | 1:d0dfbce63a89 | 820 | * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag. |
| elmot | 1:d0dfbce63a89 | 821 | * @arg FMC_FLAG_FEMPT: FIFO empty flag. |
| elmot | 1:d0dfbce63a89 | 822 | * @retval None |
| elmot | 1:d0dfbce63a89 | 823 | */ |
| elmot | 1:d0dfbce63a89 | 824 | #define __FMC_NAND_CLEAR_FLAG(__INSTANCE__, __BANK__, __FLAG__) CLEAR_BIT((__INSTANCE__)->SR, (__FLAG__)) |
| elmot | 1:d0dfbce63a89 | 825 | |
| elmot | 1:d0dfbce63a89 | 826 | |
| elmot | 1:d0dfbce63a89 | 827 | /* Exported functions --------------------------------------------------------*/ |
| elmot | 1:d0dfbce63a89 | 828 | /** @addgroup FMC_LL_Exported_Functions FMC Low Layer Exported Functions |
| elmot | 1:d0dfbce63a89 | 829 | * @{ |
| elmot | 1:d0dfbce63a89 | 830 | */ |
| elmot | 1:d0dfbce63a89 | 831 | |
| elmot | 1:d0dfbce63a89 | 832 | /* FMC_LL_NORSRAM Controller functions *******************************************/ |
| elmot | 1:d0dfbce63a89 | 833 | /** @addgroup FMC_LL_NORSRAM_Exported_Functions_Group1 Initialization and de-initialization functions |
| elmot | 1:d0dfbce63a89 | 834 | * @{ |
| elmot | 1:d0dfbce63a89 | 835 | */ |
| elmot | 1:d0dfbce63a89 | 836 | /* Initialization/de-initialization functions */ |
| elmot | 1:d0dfbce63a89 | 837 | HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_InitTypeDef *Init); |
| elmot | 1:d0dfbce63a89 | 838 | HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank); |
| elmot | 1:d0dfbce63a89 | 839 | HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode); |
| elmot | 1:d0dfbce63a89 | 840 | HAL_StatusTypeDef FMC_NORSRAM_DeInit(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank); |
| elmot | 1:d0dfbce63a89 | 841 | /** |
| elmot | 1:d0dfbce63a89 | 842 | * @} |
| elmot | 1:d0dfbce63a89 | 843 | */ |
| elmot | 1:d0dfbce63a89 | 844 | |
| elmot | 1:d0dfbce63a89 | 845 | /** @addtogroup FMC_LL_NORSRAM_Exported_Functions_Group2 Peripheral Control functions |
| elmot | 1:d0dfbce63a89 | 846 | * @{ |
| elmot | 1:d0dfbce63a89 | 847 | */ |
| elmot | 1:d0dfbce63a89 | 848 | /* FMC_NORSRAM Control functions */ |
| elmot | 1:d0dfbce63a89 | 849 | HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Enable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank); |
| elmot | 1:d0dfbce63a89 | 850 | HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Disable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank); |
| elmot | 1:d0dfbce63a89 | 851 | /** |
| elmot | 1:d0dfbce63a89 | 852 | * @} |
| elmot | 1:d0dfbce63a89 | 853 | */ |
| elmot | 1:d0dfbce63a89 | 854 | |
| elmot | 1:d0dfbce63a89 | 855 | /* FMC_NAND Controller functions **********************************************/ |
| elmot | 1:d0dfbce63a89 | 856 | /** @addtogroup FMC_LL_NAND_Exported_Functions_Group1 Initialization and de-initialization functions |
| elmot | 1:d0dfbce63a89 | 857 | * @{ |
| elmot | 1:d0dfbce63a89 | 858 | */ |
| elmot | 1:d0dfbce63a89 | 859 | /* Initialization/de-initialization functions */ |
| elmot | 1:d0dfbce63a89 | 860 | HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef *Init); |
| elmot | 1:d0dfbce63a89 | 861 | HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); |
| elmot | 1:d0dfbce63a89 | 862 | HAL_StatusTypeDef FMC_NAND_AttributeSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); |
| elmot | 1:d0dfbce63a89 | 863 | HAL_StatusTypeDef FMC_NAND_DeInit(FMC_NAND_TypeDef *Device, uint32_t Bank); |
| elmot | 1:d0dfbce63a89 | 864 | /** |
| elmot | 1:d0dfbce63a89 | 865 | * @} |
| elmot | 1:d0dfbce63a89 | 866 | */ |
| elmot | 1:d0dfbce63a89 | 867 | |
| elmot | 1:d0dfbce63a89 | 868 | /** @defgroup FMC_LL_NAND_Exported_Functions_Group2 FMC Low Layer Peripheral Control functions |
| elmot | 1:d0dfbce63a89 | 869 | * @{ |
| elmot | 1:d0dfbce63a89 | 870 | */ |
| elmot | 1:d0dfbce63a89 | 871 | /* FMC_NAND Control functions */ |
| elmot | 1:d0dfbce63a89 | 872 | HAL_StatusTypeDef FMC_NAND_ECC_Enable(FMC_NAND_TypeDef *Device, uint32_t Bank); |
| elmot | 1:d0dfbce63a89 | 873 | HAL_StatusTypeDef FMC_NAND_ECC_Disable(FMC_NAND_TypeDef *Device, uint32_t Bank); |
| elmot | 1:d0dfbce63a89 | 874 | HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout); |
| elmot | 1:d0dfbce63a89 | 875 | /** |
| elmot | 1:d0dfbce63a89 | 876 | * @} |
| elmot | 1:d0dfbce63a89 | 877 | */ |
| elmot | 1:d0dfbce63a89 | 878 | |
| elmot | 1:d0dfbce63a89 | 879 | /** |
| elmot | 1:d0dfbce63a89 | 880 | * @} |
| elmot | 1:d0dfbce63a89 | 881 | */ |
| elmot | 1:d0dfbce63a89 | 882 | |
| elmot | 1:d0dfbce63a89 | 883 | /** |
| elmot | 1:d0dfbce63a89 | 884 | * @} |
| elmot | 1:d0dfbce63a89 | 885 | */ |
| elmot | 1:d0dfbce63a89 | 886 | |
| elmot | 1:d0dfbce63a89 | 887 | /** |
| elmot | 1:d0dfbce63a89 | 888 | * @} |
| elmot | 1:d0dfbce63a89 | 889 | */ |
| elmot | 1:d0dfbce63a89 | 890 | |
| elmot | 1:d0dfbce63a89 | 891 | #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ |
| elmot | 1:d0dfbce63a89 | 892 | |
| elmot | 1:d0dfbce63a89 | 893 | #ifdef __cplusplus |
| elmot | 1:d0dfbce63a89 | 894 | } |
| elmot | 1:d0dfbce63a89 | 895 | #endif |
| elmot | 1:d0dfbce63a89 | 896 | |
| elmot | 1:d0dfbce63a89 | 897 | #endif /* __STM32L4xx_LL_FMC_H */ |
| elmot | 1:d0dfbce63a89 | 898 | |
| elmot | 1:d0dfbce63a89 | 899 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |