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HAL_L476/stm32l4xx_hal_sram.c@1:d0dfbce63a89, 2017-02-24 (annotated)

Committer:
elmot
Date:
Fri Feb 24 21:13:56 2017 +0000
Revision:
1:d0dfbce63a89
Ready-to-copy

Who changed what in which revision?

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elmot 1:d0dfbce63a89 1 /**
elmot 1:d0dfbce63a89 2 ******************************************************************************
elmot 1:d0dfbce63a89 3 * @file stm32l4xx_hal_sram.c
elmot 1:d0dfbce63a89 4 * @author MCD Application Team
elmot 1:d0dfbce63a89 5 * @version V1.5.1
elmot 1:d0dfbce63a89 6 * @date 31-May-2016
elmot 1:d0dfbce63a89 7 * @brief SRAM HAL module driver.
elmot 1:d0dfbce63a89 8 * This file provides a generic firmware to drive SRAM memories
elmot 1:d0dfbce63a89 9 * mounted as external device.
elmot 1:d0dfbce63a89 10 *
elmot 1:d0dfbce63a89 11 @verbatim
elmot 1:d0dfbce63a89 12 ==============================================================================
elmot 1:d0dfbce63a89 13 ##### How to use this driver #####
elmot 1:d0dfbce63a89 14 ==============================================================================
elmot 1:d0dfbce63a89 15 [..]
elmot 1:d0dfbce63a89 16 This driver is a generic layered driver which contains a set of APIs used to
elmot 1:d0dfbce63a89 17 control SRAM memories. It uses the FMC layer functions to interface
elmot 1:d0dfbce63a89 18 with SRAM devices.
elmot 1:d0dfbce63a89 19 The following sequence should be followed to configure the FMC to interface
elmot 1:d0dfbce63a89 20 with SRAM/PSRAM memories:
elmot 1:d0dfbce63a89 21
elmot 1:d0dfbce63a89 22 (#) Declare a SRAM_HandleTypeDef handle structure, for example:
elmot 1:d0dfbce63a89 23 SRAM_HandleTypeDef hsram; and:
elmot 1:d0dfbce63a89 24
elmot 1:d0dfbce63a89 25 (++) Fill the SRAM_HandleTypeDef handle "Init" field with the allowed
elmot 1:d0dfbce63a89 26 values of the structure member.
elmot 1:d0dfbce63a89 27
elmot 1:d0dfbce63a89 28 (++) Fill the SRAM_HandleTypeDef handle "Instance" field with a predefined
elmot 1:d0dfbce63a89 29 base register instance for NOR or SRAM device
elmot 1:d0dfbce63a89 30
elmot 1:d0dfbce63a89 31 (++) Fill the SRAM_HandleTypeDef handle "Extended" field with a predefined
elmot 1:d0dfbce63a89 32 base register instance for NOR or SRAM extended mode
elmot 1:d0dfbce63a89 33
elmot 1:d0dfbce63a89 34 (#) Declare two FMC_NORSRAM_TimingTypeDef structures, for both normal and extended
elmot 1:d0dfbce63a89 35 mode timings; for example:
elmot 1:d0dfbce63a89 36 FMC_NORSRAM_TimingTypeDef Timing and FMC_NORSRAM_TimingTypeDef ExTiming;
elmot 1:d0dfbce63a89 37 and fill its fields with the allowed values of the structure member.
elmot 1:d0dfbce63a89 38
elmot 1:d0dfbce63a89 39 (#) Initialize the SRAM Controller by calling the function HAL_SRAM_Init(). This function
elmot 1:d0dfbce63a89 40 performs the following sequence:
elmot 1:d0dfbce63a89 41
elmot 1:d0dfbce63a89 42 (##) MSP hardware layer configuration using the function HAL_SRAM_MspInit()
elmot 1:d0dfbce63a89 43 (##) Control register configuration using the FMC NORSRAM interface function
elmot 1:d0dfbce63a89 44 FMC_NORSRAM_Init()
elmot 1:d0dfbce63a89 45 (##) Timing register configuration using the FMC NORSRAM interface function
elmot 1:d0dfbce63a89 46 FMC_NORSRAM_Timing_Init()
elmot 1:d0dfbce63a89 47 (##) Extended mode Timing register configuration using the FMC NORSRAM interface function
elmot 1:d0dfbce63a89 48 FMC_NORSRAM_Extended_Timing_Init()
elmot 1:d0dfbce63a89 49 (##) Enable the SRAM device using the macro __FMC_NORSRAM_ENABLE()
elmot 1:d0dfbce63a89 50
elmot 1:d0dfbce63a89 51 (#) At this stage you can perform read/write accesses from/to the memory connected
elmot 1:d0dfbce63a89 52 to the NOR/SRAM Bank. You can perform either polling or DMA transfer using the
elmot 1:d0dfbce63a89 53 following APIs:
elmot 1:d0dfbce63a89 54 (++) HAL_SRAM_Read()/HAL_SRAM_Write() for polling read/write access
elmot 1:d0dfbce63a89 55 (++) HAL_SRAM_Read_DMA()/HAL_SRAM_Write_DMA() for DMA read/write transfer
elmot 1:d0dfbce63a89 56
elmot 1:d0dfbce63a89 57 (#) You can also control the SRAM device by calling the control APIs HAL_SRAM_WriteOperation_Enable()/
elmot 1:d0dfbce63a89 58 HAL_SRAM_WriteOperation_Disable() to respectively enable/disable the SRAM write operation
elmot 1:d0dfbce63a89 59
elmot 1:d0dfbce63a89 60 (#) You can continuously monitor the SRAM device HAL state by calling the function
elmot 1:d0dfbce63a89 61 HAL_SRAM_GetState()
elmot 1:d0dfbce63a89 62
elmot 1:d0dfbce63a89 63 @endverbatim
elmot 1:d0dfbce63a89 64 ******************************************************************************
elmot 1:d0dfbce63a89 65 * @attention
elmot 1:d0dfbce63a89 66 *
elmot 1:d0dfbce63a89 67 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot 1:d0dfbce63a89 68 *
elmot 1:d0dfbce63a89 69 * Redistribution and use in source and binary forms, with or without modification,
elmot 1:d0dfbce63a89 70 * are permitted provided that the following conditions are met:
elmot 1:d0dfbce63a89 71 * 1. Redistributions of source code must retain the above copyright notice,
elmot 1:d0dfbce63a89 72 * this list of conditions and the following disclaimer.
elmot 1:d0dfbce63a89 73 * 2. Redistributions in binary form must reproduce the above copyright notice,
elmot 1:d0dfbce63a89 74 * this list of conditions and the following disclaimer in the documentation
elmot 1:d0dfbce63a89 75 * and/or other materials provided with the distribution.
elmot 1:d0dfbce63a89 76 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot 1:d0dfbce63a89 77 * may be used to endorse or promote products derived from this software
elmot 1:d0dfbce63a89 78 * without specific prior written permission.
elmot 1:d0dfbce63a89 79 *
elmot 1:d0dfbce63a89 80 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot 1:d0dfbce63a89 81 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot 1:d0dfbce63a89 82 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot 1:d0dfbce63a89 83 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot 1:d0dfbce63a89 84 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot 1:d0dfbce63a89 85 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot 1:d0dfbce63a89 86 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot 1:d0dfbce63a89 87 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot 1:d0dfbce63a89 88 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot 1:d0dfbce63a89 89 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot 1:d0dfbce63a89 90 *
elmot 1:d0dfbce63a89 91 ******************************************************************************
elmot 1:d0dfbce63a89 92 */
elmot 1:d0dfbce63a89 93
elmot 1:d0dfbce63a89 94 /* Includes ------------------------------------------------------------------*/
elmot 1:d0dfbce63a89 95 #include "stm32l4xx_hal.h"
elmot 1:d0dfbce63a89 96
elmot 1:d0dfbce63a89 97 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
elmot 1:d0dfbce63a89 98
elmot 1:d0dfbce63a89 99 /** @addtogroup STM32L4xx_HAL_Driver
elmot 1:d0dfbce63a89 100 * @{
elmot 1:d0dfbce63a89 101 */
elmot 1:d0dfbce63a89 102
elmot 1:d0dfbce63a89 103 #ifdef HAL_SRAM_MODULE_ENABLED
elmot 1:d0dfbce63a89 104
elmot 1:d0dfbce63a89 105 /** @defgroup SRAM SRAM
elmot 1:d0dfbce63a89 106 * @brief SRAM HAL module driver.
elmot 1:d0dfbce63a89 107 * @{
elmot 1:d0dfbce63a89 108 */
elmot 1:d0dfbce63a89 109 /* Private typedef -----------------------------------------------------------*/
elmot 1:d0dfbce63a89 110 /* Private define ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 111 /* Private macro -------------------------------------------------------------*/
elmot 1:d0dfbce63a89 112 /* Private variables ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 113 /* Private function prototypes -----------------------------------------------*/
elmot 1:d0dfbce63a89 114 /* Exported functions --------------------------------------------------------*/
elmot 1:d0dfbce63a89 115
elmot 1:d0dfbce63a89 116 /** @defgroup SRAM_Exported_Functions SRAM Exported Functions
elmot 1:d0dfbce63a89 117 * @{
elmot 1:d0dfbce63a89 118 */
elmot 1:d0dfbce63a89 119
elmot 1:d0dfbce63a89 120 /** @defgroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
elmot 1:d0dfbce63a89 121 * @brief Initialization and Configuration functions.
elmot 1:d0dfbce63a89 122 *
elmot 1:d0dfbce63a89 123 @verbatim
elmot 1:d0dfbce63a89 124 ==============================================================================
elmot 1:d0dfbce63a89 125 ##### SRAM Initialization and de-initialization functions #####
elmot 1:d0dfbce63a89 126 ==============================================================================
elmot 1:d0dfbce63a89 127 [..] This section provides functions allowing to initialize/de-initialize
elmot 1:d0dfbce63a89 128 the SRAM memory.
elmot 1:d0dfbce63a89 129
elmot 1:d0dfbce63a89 130 @endverbatim
elmot 1:d0dfbce63a89 131 * @{
elmot 1:d0dfbce63a89 132 */
elmot 1:d0dfbce63a89 133
elmot 1:d0dfbce63a89 134 /**
elmot 1:d0dfbce63a89 135 * @brief Perform the SRAM device initialization sequence.
elmot 1:d0dfbce63a89 136 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 137 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 138 * @param Timing: Pointer to SRAM control timing structure
elmot 1:d0dfbce63a89 139 * @param ExtTiming: Pointer to SRAM extended mode timing structure
elmot 1:d0dfbce63a89 140 * @retval HAL status
elmot 1:d0dfbce63a89 141 */
elmot 1:d0dfbce63a89 142 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
elmot 1:d0dfbce63a89 143 {
elmot 1:d0dfbce63a89 144 /* Check the SRAM handle parameter */
elmot 1:d0dfbce63a89 145 if(hsram == NULL)
elmot 1:d0dfbce63a89 146 {
elmot 1:d0dfbce63a89 147 return HAL_ERROR;
elmot 1:d0dfbce63a89 148 }
elmot 1:d0dfbce63a89 149
elmot 1:d0dfbce63a89 150 if(hsram->State == HAL_SRAM_STATE_RESET)
elmot 1:d0dfbce63a89 151 {
elmot 1:d0dfbce63a89 152 /* Allocate lock resource and initialize it */
elmot 1:d0dfbce63a89 153 hsram->Lock = HAL_UNLOCKED;
elmot 1:d0dfbce63a89 154
elmot 1:d0dfbce63a89 155 /* Initialize the low level hardware (MSP) */
elmot 1:d0dfbce63a89 156 HAL_SRAM_MspInit(hsram);
elmot 1:d0dfbce63a89 157 }
elmot 1:d0dfbce63a89 158
elmot 1:d0dfbce63a89 159 /* Initialize SRAM control Interface */
elmot 1:d0dfbce63a89 160 FMC_NORSRAM_Init(hsram->Instance, &(hsram->Init));
elmot 1:d0dfbce63a89 161
elmot 1:d0dfbce63a89 162 /* Initialize SRAM timing Interface */
elmot 1:d0dfbce63a89 163 FMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank);
elmot 1:d0dfbce63a89 164
elmot 1:d0dfbce63a89 165 /* Initialize SRAM extended mode timing Interface */
elmot 1:d0dfbce63a89 166 FMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank, hsram->Init.ExtendedMode);
elmot 1:d0dfbce63a89 167
elmot 1:d0dfbce63a89 168 /* Enable the NORSRAM device */
elmot 1:d0dfbce63a89 169 __FMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
elmot 1:d0dfbce63a89 170
elmot 1:d0dfbce63a89 171 return HAL_OK;
elmot 1:d0dfbce63a89 172 }
elmot 1:d0dfbce63a89 173
elmot 1:d0dfbce63a89 174 /**
elmot 1:d0dfbce63a89 175 * @brief Perform the SRAM device de-initialization sequence.
elmot 1:d0dfbce63a89 176 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 177 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 178 * @retval HAL status
elmot 1:d0dfbce63a89 179 */
elmot 1:d0dfbce63a89 180 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram)
elmot 1:d0dfbce63a89 181 {
elmot 1:d0dfbce63a89 182 /* De-Initialize the low level hardware (MSP) */
elmot 1:d0dfbce63a89 183 HAL_SRAM_MspDeInit(hsram);
elmot 1:d0dfbce63a89 184
elmot 1:d0dfbce63a89 185 /* Configure the SRAM registers with their reset values */
elmot 1:d0dfbce63a89 186 FMC_NORSRAM_DeInit(hsram->Instance, hsram->Extended, hsram->Init.NSBank);
elmot 1:d0dfbce63a89 187
elmot 1:d0dfbce63a89 188 hsram->State = HAL_SRAM_STATE_RESET;
elmot 1:d0dfbce63a89 189
elmot 1:d0dfbce63a89 190 /* Release Lock */
elmot 1:d0dfbce63a89 191 __HAL_UNLOCK(hsram);
elmot 1:d0dfbce63a89 192
elmot 1:d0dfbce63a89 193 return HAL_OK;
elmot 1:d0dfbce63a89 194 }
elmot 1:d0dfbce63a89 195
elmot 1:d0dfbce63a89 196 /**
elmot 1:d0dfbce63a89 197 * @brief Initialize the SRAM MSP.
elmot 1:d0dfbce63a89 198 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 199 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 200 * @retval None
elmot 1:d0dfbce63a89 201 */
elmot 1:d0dfbce63a89 202 __weak void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram)
elmot 1:d0dfbce63a89 203 {
elmot 1:d0dfbce63a89 204 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 205 UNUSED(hsram);
elmot 1:d0dfbce63a89 206
elmot 1:d0dfbce63a89 207 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 208 the HAL_SRAM_MspInit could be implemented in the user file
elmot 1:d0dfbce63a89 209 */
elmot 1:d0dfbce63a89 210 }
elmot 1:d0dfbce63a89 211
elmot 1:d0dfbce63a89 212 /**
elmot 1:d0dfbce63a89 213 * @brief DeInitialize the SRAM MSP.
elmot 1:d0dfbce63a89 214 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 215 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 216 * @retval None
elmot 1:d0dfbce63a89 217 */
elmot 1:d0dfbce63a89 218 __weak void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram)
elmot 1:d0dfbce63a89 219 {
elmot 1:d0dfbce63a89 220 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 221 UNUSED(hsram);
elmot 1:d0dfbce63a89 222
elmot 1:d0dfbce63a89 223 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 224 the HAL_SRAM_MspDeInit could be implemented in the user file
elmot 1:d0dfbce63a89 225 */
elmot 1:d0dfbce63a89 226 }
elmot 1:d0dfbce63a89 227
elmot 1:d0dfbce63a89 228 /**
elmot 1:d0dfbce63a89 229 * @brief DMA transfer complete callback.
elmot 1:d0dfbce63a89 230 * @param hdma: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 231 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 232 * @retval None
elmot 1:d0dfbce63a89 233 */
elmot 1:d0dfbce63a89 234 __weak void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
elmot 1:d0dfbce63a89 235 {
elmot 1:d0dfbce63a89 236 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 237 UNUSED(hdma);
elmot 1:d0dfbce63a89 238
elmot 1:d0dfbce63a89 239 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 240 the HAL_SRAM_DMA_XferCpltCallback could be implemented in the user file
elmot 1:d0dfbce63a89 241 */
elmot 1:d0dfbce63a89 242 }
elmot 1:d0dfbce63a89 243
elmot 1:d0dfbce63a89 244 /**
elmot 1:d0dfbce63a89 245 * @brief DMA transfer complete error callback.
elmot 1:d0dfbce63a89 246 * @param hdma: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 247 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 248 * @retval None
elmot 1:d0dfbce63a89 249 */
elmot 1:d0dfbce63a89 250 __weak void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
elmot 1:d0dfbce63a89 251 {
elmot 1:d0dfbce63a89 252 /* Prevent unused argument(s) compilation warning */
elmot 1:d0dfbce63a89 253 UNUSED(hdma);
elmot 1:d0dfbce63a89 254
elmot 1:d0dfbce63a89 255 /* NOTE : This function should not be modified, when the callback is needed,
elmot 1:d0dfbce63a89 256 the HAL_SRAM_DMA_XferErrorCallback could be implemented in the user file
elmot 1:d0dfbce63a89 257 */
elmot 1:d0dfbce63a89 258 }
elmot 1:d0dfbce63a89 259
elmot 1:d0dfbce63a89 260 /**
elmot 1:d0dfbce63a89 261 * @}
elmot 1:d0dfbce63a89 262 */
elmot 1:d0dfbce63a89 263
elmot 1:d0dfbce63a89 264 /** @defgroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
elmot 1:d0dfbce63a89 265 * @brief Input Output and memory control functions
elmot 1:d0dfbce63a89 266 *
elmot 1:d0dfbce63a89 267 @verbatim
elmot 1:d0dfbce63a89 268 ==============================================================================
elmot 1:d0dfbce63a89 269 ##### SRAM Input and Output functions #####
elmot 1:d0dfbce63a89 270 ==============================================================================
elmot 1:d0dfbce63a89 271 [..]
elmot 1:d0dfbce63a89 272 This section provides functions allowing to use and control the SRAM memory
elmot 1:d0dfbce63a89 273
elmot 1:d0dfbce63a89 274 @endverbatim
elmot 1:d0dfbce63a89 275 * @{
elmot 1:d0dfbce63a89 276 */
elmot 1:d0dfbce63a89 277
elmot 1:d0dfbce63a89 278 /**
elmot 1:d0dfbce63a89 279 * @brief Read 8-bit buffer from SRAM memory.
elmot 1:d0dfbce63a89 280 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 281 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 282 * @param pAddress: Pointer to read start address
elmot 1:d0dfbce63a89 283 * @param pDstBuffer: Pointer to destination buffer
elmot 1:d0dfbce63a89 284 * @param BufferSize: Size of the buffer to read from memory
elmot 1:d0dfbce63a89 285 * @retval HAL status
elmot 1:d0dfbce63a89 286 */
elmot 1:d0dfbce63a89 287 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
elmot 1:d0dfbce63a89 288 {
elmot 1:d0dfbce63a89 289 __IO uint8_t * psramaddress = (uint8_t *)pAddress;
elmot 1:d0dfbce63a89 290
elmot 1:d0dfbce63a89 291 /* Process Locked */
elmot 1:d0dfbce63a89 292 __HAL_LOCK(hsram);
elmot 1:d0dfbce63a89 293
elmot 1:d0dfbce63a89 294 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 295 hsram->State = HAL_SRAM_STATE_BUSY;
elmot 1:d0dfbce63a89 296
elmot 1:d0dfbce63a89 297 /* Read data from memory */
elmot 1:d0dfbce63a89 298 for(; BufferSize != 0; BufferSize--)
elmot 1:d0dfbce63a89 299 {
elmot 1:d0dfbce63a89 300 *pDstBuffer = *(__IO uint8_t *)psramaddress;
elmot 1:d0dfbce63a89 301 pDstBuffer++;
elmot 1:d0dfbce63a89 302 psramaddress++;
elmot 1:d0dfbce63a89 303 }
elmot 1:d0dfbce63a89 304
elmot 1:d0dfbce63a89 305 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 306 hsram->State = HAL_SRAM_STATE_READY;
elmot 1:d0dfbce63a89 307
elmot 1:d0dfbce63a89 308 /* Process unlocked */
elmot 1:d0dfbce63a89 309 __HAL_UNLOCK(hsram);
elmot 1:d0dfbce63a89 310
elmot 1:d0dfbce63a89 311 return HAL_OK;
elmot 1:d0dfbce63a89 312 }
elmot 1:d0dfbce63a89 313
elmot 1:d0dfbce63a89 314 /**
elmot 1:d0dfbce63a89 315 * @brief Write 8-bit buffer to SRAM memory.
elmot 1:d0dfbce63a89 316 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 317 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 318 * @param pAddress: Pointer to write start address
elmot 1:d0dfbce63a89 319 * @param pSrcBuffer: Pointer to source buffer to write
elmot 1:d0dfbce63a89 320 * @param BufferSize: Size of the buffer to write to memory
elmot 1:d0dfbce63a89 321 * @retval HAL status
elmot 1:d0dfbce63a89 322 */
elmot 1:d0dfbce63a89 323 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
elmot 1:d0dfbce63a89 324 {
elmot 1:d0dfbce63a89 325 __IO uint8_t * psramaddress = (uint8_t *)pAddress;
elmot 1:d0dfbce63a89 326
elmot 1:d0dfbce63a89 327 /* Check the SRAM controller state */
elmot 1:d0dfbce63a89 328 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
elmot 1:d0dfbce63a89 329 {
elmot 1:d0dfbce63a89 330 return HAL_ERROR;
elmot 1:d0dfbce63a89 331 }
elmot 1:d0dfbce63a89 332
elmot 1:d0dfbce63a89 333 /* Process Locked */
elmot 1:d0dfbce63a89 334 __HAL_LOCK(hsram);
elmot 1:d0dfbce63a89 335
elmot 1:d0dfbce63a89 336 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 337 hsram->State = HAL_SRAM_STATE_BUSY;
elmot 1:d0dfbce63a89 338
elmot 1:d0dfbce63a89 339 /* Write data to memory */
elmot 1:d0dfbce63a89 340 for(; BufferSize != 0; BufferSize--)
elmot 1:d0dfbce63a89 341 {
elmot 1:d0dfbce63a89 342 *(__IO uint8_t *)psramaddress = *pSrcBuffer;
elmot 1:d0dfbce63a89 343 pSrcBuffer++;
elmot 1:d0dfbce63a89 344 psramaddress++;
elmot 1:d0dfbce63a89 345 }
elmot 1:d0dfbce63a89 346
elmot 1:d0dfbce63a89 347 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 348 hsram->State = HAL_SRAM_STATE_READY;
elmot 1:d0dfbce63a89 349
elmot 1:d0dfbce63a89 350 /* Process unlocked */
elmot 1:d0dfbce63a89 351 __HAL_UNLOCK(hsram);
elmot 1:d0dfbce63a89 352
elmot 1:d0dfbce63a89 353 return HAL_OK;
elmot 1:d0dfbce63a89 354 }
elmot 1:d0dfbce63a89 355
elmot 1:d0dfbce63a89 356 /**
elmot 1:d0dfbce63a89 357 * @brief Read 16-bit buffer from SRAM memory.
elmot 1:d0dfbce63a89 358 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 359 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 360 * @param pAddress: Pointer to read start address
elmot 1:d0dfbce63a89 361 * @param pDstBuffer: Pointer to destination buffer
elmot 1:d0dfbce63a89 362 * @param BufferSize: Size of the buffer to read from memory
elmot 1:d0dfbce63a89 363 * @retval HAL status
elmot 1:d0dfbce63a89 364 */
elmot 1:d0dfbce63a89 365 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
elmot 1:d0dfbce63a89 366 {
elmot 1:d0dfbce63a89 367 __IO uint16_t * psramaddress = (uint16_t *)pAddress;
elmot 1:d0dfbce63a89 368
elmot 1:d0dfbce63a89 369 /* Process Locked */
elmot 1:d0dfbce63a89 370 __HAL_LOCK(hsram);
elmot 1:d0dfbce63a89 371
elmot 1:d0dfbce63a89 372 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 373 hsram->State = HAL_SRAM_STATE_BUSY;
elmot 1:d0dfbce63a89 374
elmot 1:d0dfbce63a89 375 /* Read data from memory */
elmot 1:d0dfbce63a89 376 for(; BufferSize != 0; BufferSize--)
elmot 1:d0dfbce63a89 377 {
elmot 1:d0dfbce63a89 378 *pDstBuffer = *(__IO uint16_t *)psramaddress;
elmot 1:d0dfbce63a89 379 pDstBuffer++;
elmot 1:d0dfbce63a89 380 psramaddress++;
elmot 1:d0dfbce63a89 381 }
elmot 1:d0dfbce63a89 382
elmot 1:d0dfbce63a89 383 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 384 hsram->State = HAL_SRAM_STATE_READY;
elmot 1:d0dfbce63a89 385
elmot 1:d0dfbce63a89 386 /* Process unlocked */
elmot 1:d0dfbce63a89 387 __HAL_UNLOCK(hsram);
elmot 1:d0dfbce63a89 388
elmot 1:d0dfbce63a89 389 return HAL_OK;
elmot 1:d0dfbce63a89 390 }
elmot 1:d0dfbce63a89 391
elmot 1:d0dfbce63a89 392 /**
elmot 1:d0dfbce63a89 393 * @brief Write 16-bit buffer to SRAM memory.
elmot 1:d0dfbce63a89 394 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 395 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 396 * @param pAddress: Pointer to write start address
elmot 1:d0dfbce63a89 397 * @param pSrcBuffer: Pointer to source buffer to write
elmot 1:d0dfbce63a89 398 * @param BufferSize: Size of the buffer to write to memory
elmot 1:d0dfbce63a89 399 * @retval HAL status
elmot 1:d0dfbce63a89 400 */
elmot 1:d0dfbce63a89 401 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
elmot 1:d0dfbce63a89 402 {
elmot 1:d0dfbce63a89 403 __IO uint16_t * psramaddress = (uint16_t *)pAddress;
elmot 1:d0dfbce63a89 404
elmot 1:d0dfbce63a89 405 /* Check the SRAM controller state */
elmot 1:d0dfbce63a89 406 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
elmot 1:d0dfbce63a89 407 {
elmot 1:d0dfbce63a89 408 return HAL_ERROR;
elmot 1:d0dfbce63a89 409 }
elmot 1:d0dfbce63a89 410
elmot 1:d0dfbce63a89 411 /* Process Locked */
elmot 1:d0dfbce63a89 412 __HAL_LOCK(hsram);
elmot 1:d0dfbce63a89 413
elmot 1:d0dfbce63a89 414 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 415 hsram->State = HAL_SRAM_STATE_BUSY;
elmot 1:d0dfbce63a89 416
elmot 1:d0dfbce63a89 417 /* Write data to memory */
elmot 1:d0dfbce63a89 418 for(; BufferSize != 0; BufferSize--)
elmot 1:d0dfbce63a89 419 {
elmot 1:d0dfbce63a89 420 *(__IO uint16_t *)psramaddress = *pSrcBuffer;
elmot 1:d0dfbce63a89 421 pSrcBuffer++;
elmot 1:d0dfbce63a89 422 psramaddress++;
elmot 1:d0dfbce63a89 423 }
elmot 1:d0dfbce63a89 424
elmot 1:d0dfbce63a89 425 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 426 hsram->State = HAL_SRAM_STATE_READY;
elmot 1:d0dfbce63a89 427
elmot 1:d0dfbce63a89 428 /* Process unlocked */
elmot 1:d0dfbce63a89 429 __HAL_UNLOCK(hsram);
elmot 1:d0dfbce63a89 430
elmot 1:d0dfbce63a89 431 return HAL_OK;
elmot 1:d0dfbce63a89 432 }
elmot 1:d0dfbce63a89 433
elmot 1:d0dfbce63a89 434 /**
elmot 1:d0dfbce63a89 435 * @brief Read 32-bit buffer from SRAM memory.
elmot 1:d0dfbce63a89 436 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 437 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 438 * @param pAddress: Pointer to read start address
elmot 1:d0dfbce63a89 439 * @param pDstBuffer: Pointer to destination buffer
elmot 1:d0dfbce63a89 440 * @param BufferSize: Size of the buffer to read from memory
elmot 1:d0dfbce63a89 441 * @retval HAL status
elmot 1:d0dfbce63a89 442 */
elmot 1:d0dfbce63a89 443 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
elmot 1:d0dfbce63a89 444 {
elmot 1:d0dfbce63a89 445 /* Process Locked */
elmot 1:d0dfbce63a89 446 __HAL_LOCK(hsram);
elmot 1:d0dfbce63a89 447
elmot 1:d0dfbce63a89 448 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 449 hsram->State = HAL_SRAM_STATE_BUSY;
elmot 1:d0dfbce63a89 450
elmot 1:d0dfbce63a89 451 /* Read data from memory */
elmot 1:d0dfbce63a89 452 for(; BufferSize != 0; BufferSize--)
elmot 1:d0dfbce63a89 453 {
elmot 1:d0dfbce63a89 454 *pDstBuffer = *(__IO uint32_t *)pAddress;
elmot 1:d0dfbce63a89 455 pDstBuffer++;
elmot 1:d0dfbce63a89 456 pAddress++;
elmot 1:d0dfbce63a89 457 }
elmot 1:d0dfbce63a89 458
elmot 1:d0dfbce63a89 459 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 460 hsram->State = HAL_SRAM_STATE_READY;
elmot 1:d0dfbce63a89 461
elmot 1:d0dfbce63a89 462 /* Process unlocked */
elmot 1:d0dfbce63a89 463 __HAL_UNLOCK(hsram);
elmot 1:d0dfbce63a89 464
elmot 1:d0dfbce63a89 465 return HAL_OK;
elmot 1:d0dfbce63a89 466 }
elmot 1:d0dfbce63a89 467
elmot 1:d0dfbce63a89 468 /**
elmot 1:d0dfbce63a89 469 * @brief Write 32-bit buffer to SRAM memory.
elmot 1:d0dfbce63a89 470 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 471 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 472 * @param pAddress: Pointer to write start address
elmot 1:d0dfbce63a89 473 * @param pSrcBuffer: Pointer to source buffer to write
elmot 1:d0dfbce63a89 474 * @param BufferSize: Size of the buffer to write to memory
elmot 1:d0dfbce63a89 475 * @retval HAL status
elmot 1:d0dfbce63a89 476 */
elmot 1:d0dfbce63a89 477 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
elmot 1:d0dfbce63a89 478 {
elmot 1:d0dfbce63a89 479 /* Check the SRAM controller state */
elmot 1:d0dfbce63a89 480 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
elmot 1:d0dfbce63a89 481 {
elmot 1:d0dfbce63a89 482 return HAL_ERROR;
elmot 1:d0dfbce63a89 483 }
elmot 1:d0dfbce63a89 484
elmot 1:d0dfbce63a89 485 /* Process Locked */
elmot 1:d0dfbce63a89 486 __HAL_LOCK(hsram);
elmot 1:d0dfbce63a89 487
elmot 1:d0dfbce63a89 488 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 489 hsram->State = HAL_SRAM_STATE_BUSY;
elmot 1:d0dfbce63a89 490
elmot 1:d0dfbce63a89 491 /* Write data to memory */
elmot 1:d0dfbce63a89 492 for(; BufferSize != 0; BufferSize--)
elmot 1:d0dfbce63a89 493 {
elmot 1:d0dfbce63a89 494 *(__IO uint32_t *)pAddress = *pSrcBuffer;
elmot 1:d0dfbce63a89 495 pSrcBuffer++;
elmot 1:d0dfbce63a89 496 pAddress++;
elmot 1:d0dfbce63a89 497 }
elmot 1:d0dfbce63a89 498
elmot 1:d0dfbce63a89 499 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 500 hsram->State = HAL_SRAM_STATE_READY;
elmot 1:d0dfbce63a89 501
elmot 1:d0dfbce63a89 502 /* Process unlocked */
elmot 1:d0dfbce63a89 503 __HAL_UNLOCK(hsram);
elmot 1:d0dfbce63a89 504
elmot 1:d0dfbce63a89 505 return HAL_OK;
elmot 1:d0dfbce63a89 506 }
elmot 1:d0dfbce63a89 507
elmot 1:d0dfbce63a89 508 /**
elmot 1:d0dfbce63a89 509 * @brief Read a Word data buffer from the SRAM memory using DMA transfer.
elmot 1:d0dfbce63a89 510 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 511 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 512 * @param pAddress: Pointer to read start address
elmot 1:d0dfbce63a89 513 * @param pDstBuffer: Pointer to destination buffer
elmot 1:d0dfbce63a89 514 * @param BufferSize: Size of the buffer to read from memory
elmot 1:d0dfbce63a89 515 * @retval HAL status
elmot 1:d0dfbce63a89 516 */
elmot 1:d0dfbce63a89 517 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
elmot 1:d0dfbce63a89 518 {
elmot 1:d0dfbce63a89 519 /* Process Locked */
elmot 1:d0dfbce63a89 520 __HAL_LOCK(hsram);
elmot 1:d0dfbce63a89 521
elmot 1:d0dfbce63a89 522 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 523 hsram->State = HAL_SRAM_STATE_BUSY;
elmot 1:d0dfbce63a89 524
elmot 1:d0dfbce63a89 525 /* Configure DMA user callbacks */
elmot 1:d0dfbce63a89 526 hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
elmot 1:d0dfbce63a89 527 hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
elmot 1:d0dfbce63a89 528
elmot 1:d0dfbce63a89 529 /* Enable the DMA Channel */
elmot 1:d0dfbce63a89 530 HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
elmot 1:d0dfbce63a89 531
elmot 1:d0dfbce63a89 532 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 533 hsram->State = HAL_SRAM_STATE_READY;
elmot 1:d0dfbce63a89 534
elmot 1:d0dfbce63a89 535 /* Process unlocked */
elmot 1:d0dfbce63a89 536 __HAL_UNLOCK(hsram);
elmot 1:d0dfbce63a89 537
elmot 1:d0dfbce63a89 538 return HAL_OK;
elmot 1:d0dfbce63a89 539 }
elmot 1:d0dfbce63a89 540
elmot 1:d0dfbce63a89 541 /**
elmot 1:d0dfbce63a89 542 * @brief Write a Word data buffer to SRAM memory using DMA transfer.
elmot 1:d0dfbce63a89 543 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 544 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 545 * @param pAddress: Pointer to write start address
elmot 1:d0dfbce63a89 546 * @param pSrcBuffer: Pointer to source buffer to write
elmot 1:d0dfbce63a89 547 * @param BufferSize: Size of the buffer to write to memory
elmot 1:d0dfbce63a89 548 * @retval HAL status
elmot 1:d0dfbce63a89 549 */
elmot 1:d0dfbce63a89 550 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
elmot 1:d0dfbce63a89 551 {
elmot 1:d0dfbce63a89 552 /* Check the SRAM controller state */
elmot 1:d0dfbce63a89 553 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
elmot 1:d0dfbce63a89 554 {
elmot 1:d0dfbce63a89 555 return HAL_ERROR;
elmot 1:d0dfbce63a89 556 }
elmot 1:d0dfbce63a89 557
elmot 1:d0dfbce63a89 558 /* Process Locked */
elmot 1:d0dfbce63a89 559 __HAL_LOCK(hsram);
elmot 1:d0dfbce63a89 560
elmot 1:d0dfbce63a89 561 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 562 hsram->State = HAL_SRAM_STATE_BUSY;
elmot 1:d0dfbce63a89 563
elmot 1:d0dfbce63a89 564 /* Configure DMA user callbacks */
elmot 1:d0dfbce63a89 565 hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
elmot 1:d0dfbce63a89 566 hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
elmot 1:d0dfbce63a89 567
elmot 1:d0dfbce63a89 568 /* Enable the DMA Channel */
elmot 1:d0dfbce63a89 569 HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
elmot 1:d0dfbce63a89 570
elmot 1:d0dfbce63a89 571 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 572 hsram->State = HAL_SRAM_STATE_READY;
elmot 1:d0dfbce63a89 573
elmot 1:d0dfbce63a89 574 /* Process unlocked */
elmot 1:d0dfbce63a89 575 __HAL_UNLOCK(hsram);
elmot 1:d0dfbce63a89 576
elmot 1:d0dfbce63a89 577 return HAL_OK;
elmot 1:d0dfbce63a89 578 }
elmot 1:d0dfbce63a89 579
elmot 1:d0dfbce63a89 580 /**
elmot 1:d0dfbce63a89 581 * @}
elmot 1:d0dfbce63a89 582 */
elmot 1:d0dfbce63a89 583
elmot 1:d0dfbce63a89 584 /** @defgroup SRAM_Exported_Functions_Group3 Control functions
elmot 1:d0dfbce63a89 585 * @brief Control functions
elmot 1:d0dfbce63a89 586 *
elmot 1:d0dfbce63a89 587 @verbatim
elmot 1:d0dfbce63a89 588 ==============================================================================
elmot 1:d0dfbce63a89 589 ##### SRAM Control functions #####
elmot 1:d0dfbce63a89 590 ==============================================================================
elmot 1:d0dfbce63a89 591 [..]
elmot 1:d0dfbce63a89 592 This subsection provides a set of functions allowing to control dynamically
elmot 1:d0dfbce63a89 593 the SRAM interface.
elmot 1:d0dfbce63a89 594
elmot 1:d0dfbce63a89 595 @endverbatim
elmot 1:d0dfbce63a89 596 * @{
elmot 1:d0dfbce63a89 597 */
elmot 1:d0dfbce63a89 598
elmot 1:d0dfbce63a89 599 /**
elmot 1:d0dfbce63a89 600 * @brief Enable dynamically SRAM write operation.
elmot 1:d0dfbce63a89 601 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 602 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 603 * @retval HAL status
elmot 1:d0dfbce63a89 604 */
elmot 1:d0dfbce63a89 605 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram)
elmot 1:d0dfbce63a89 606 {
elmot 1:d0dfbce63a89 607 /* Process Locked */
elmot 1:d0dfbce63a89 608 __HAL_LOCK(hsram);
elmot 1:d0dfbce63a89 609
elmot 1:d0dfbce63a89 610 /* Enable write operation */
elmot 1:d0dfbce63a89 611 FMC_NORSRAM_WriteOperation_Enable(hsram->Instance, hsram->Init.NSBank);
elmot 1:d0dfbce63a89 612
elmot 1:d0dfbce63a89 613 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 614 hsram->State = HAL_SRAM_STATE_READY;
elmot 1:d0dfbce63a89 615
elmot 1:d0dfbce63a89 616 /* Process unlocked */
elmot 1:d0dfbce63a89 617 __HAL_UNLOCK(hsram);
elmot 1:d0dfbce63a89 618
elmot 1:d0dfbce63a89 619 return HAL_OK;
elmot 1:d0dfbce63a89 620 }
elmot 1:d0dfbce63a89 621
elmot 1:d0dfbce63a89 622 /**
elmot 1:d0dfbce63a89 623 * @brief Disable dynamically SRAM write operation.
elmot 1:d0dfbce63a89 624 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 625 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 626 * @retval HAL status
elmot 1:d0dfbce63a89 627 */
elmot 1:d0dfbce63a89 628 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram)
elmot 1:d0dfbce63a89 629 {
elmot 1:d0dfbce63a89 630 /* Process Locked */
elmot 1:d0dfbce63a89 631 __HAL_LOCK(hsram);
elmot 1:d0dfbce63a89 632
elmot 1:d0dfbce63a89 633 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 634 hsram->State = HAL_SRAM_STATE_BUSY;
elmot 1:d0dfbce63a89 635
elmot 1:d0dfbce63a89 636 /* Disable write operation */
elmot 1:d0dfbce63a89 637 FMC_NORSRAM_WriteOperation_Disable(hsram->Instance, hsram->Init.NSBank);
elmot 1:d0dfbce63a89 638
elmot 1:d0dfbce63a89 639 /* Update the SRAM controller state */
elmot 1:d0dfbce63a89 640 hsram->State = HAL_SRAM_STATE_PROTECTED;
elmot 1:d0dfbce63a89 641
elmot 1:d0dfbce63a89 642 /* Process unlocked */
elmot 1:d0dfbce63a89 643 __HAL_UNLOCK(hsram);
elmot 1:d0dfbce63a89 644
elmot 1:d0dfbce63a89 645 return HAL_OK;
elmot 1:d0dfbce63a89 646 }
elmot 1:d0dfbce63a89 647
elmot 1:d0dfbce63a89 648 /**
elmot 1:d0dfbce63a89 649 * @}
elmot 1:d0dfbce63a89 650 */
elmot 1:d0dfbce63a89 651
elmot 1:d0dfbce63a89 652 /** @defgroup SRAM_Exported_Functions_Group4 Peripheral State functions
elmot 1:d0dfbce63a89 653 * @brief Peripheral State functions
elmot 1:d0dfbce63a89 654 *
elmot 1:d0dfbce63a89 655 @verbatim
elmot 1:d0dfbce63a89 656 ==============================================================================
elmot 1:d0dfbce63a89 657 ##### SRAM State functions #####
elmot 1:d0dfbce63a89 658 ==============================================================================
elmot 1:d0dfbce63a89 659 [..]
elmot 1:d0dfbce63a89 660 This subsection permits to get in run-time the status of the SRAM controller
elmot 1:d0dfbce63a89 661 and the data flow.
elmot 1:d0dfbce63a89 662
elmot 1:d0dfbce63a89 663 @endverbatim
elmot 1:d0dfbce63a89 664 * @{
elmot 1:d0dfbce63a89 665 */
elmot 1:d0dfbce63a89 666
elmot 1:d0dfbce63a89 667 /**
elmot 1:d0dfbce63a89 668 * @brief Return the SRAM controller handle state.
elmot 1:d0dfbce63a89 669 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
elmot 1:d0dfbce63a89 670 * the configuration information for SRAM module.
elmot 1:d0dfbce63a89 671 * @retval HAL state
elmot 1:d0dfbce63a89 672 */
elmot 1:d0dfbce63a89 673 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram)
elmot 1:d0dfbce63a89 674 {
elmot 1:d0dfbce63a89 675 /* Return SRAM handle state */
elmot 1:d0dfbce63a89 676 return hsram->State;
elmot 1:d0dfbce63a89 677 }
elmot 1:d0dfbce63a89 678
elmot 1:d0dfbce63a89 679 /**
elmot 1:d0dfbce63a89 680 * @}
elmot 1:d0dfbce63a89 681 */
elmot 1:d0dfbce63a89 682
elmot 1:d0dfbce63a89 683 /**
elmot 1:d0dfbce63a89 684 * @}
elmot 1:d0dfbce63a89 685 */
elmot 1:d0dfbce63a89 686 /**
elmot 1:d0dfbce63a89 687 * @}
elmot 1:d0dfbce63a89 688 */
elmot 1:d0dfbce63a89 689 #endif /* HAL_SRAM_MODULE_ENABLED */
elmot 1:d0dfbce63a89 690
elmot 1:d0dfbce63a89 691 /**
elmot 1:d0dfbce63a89 692 * @}
elmot 1:d0dfbce63a89 693 */
elmot 1:d0dfbce63a89 694
elmot 1:d0dfbce63a89 695 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
elmot 1:d0dfbce63a89 696
elmot 1:d0dfbce63a89 697 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/