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HAL_L476/stm32l4xx_hal_adc_ex.h@6:0018763974d3, 2017-02-25 (annotated)

Committer:: elmot
Date:: Sat Feb 25 08:59:21 2017 +0000
Revision:: 6:0018763974d3
Parent:: 1:d0dfbce63a89

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elmot	1:d0dfbce63a89	1	/**
elmot	1:d0dfbce63a89	2	******************************************************************************
elmot	1:d0dfbce63a89	3	* @file stm32l4xx_hal_adc_ex.h
elmot	1:d0dfbce63a89	4	* @author MCD Application Team
elmot	1:d0dfbce63a89	5	* @version V1.5.1
elmot	1:d0dfbce63a89	6	* @date 31-May-2016
elmot	1:d0dfbce63a89	7	* @brief Header file of ADC HAL extended module.
elmot	1:d0dfbce63a89	8	******************************************************************************
elmot	1:d0dfbce63a89	9	* @attention
elmot	1:d0dfbce63a89	10	*
elmot	1:d0dfbce63a89	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot	1:d0dfbce63a89	12	*
elmot	1:d0dfbce63a89	13	* Redistribution and use in source and binary forms, with or without modification,
elmot	1:d0dfbce63a89	14	* are permitted provided that the following conditions are met:
elmot	1:d0dfbce63a89	15	* 1. Redistributions of source code must retain the above copyright notice,
elmot	1:d0dfbce63a89	16	* this list of conditions and the following disclaimer.
elmot	1:d0dfbce63a89	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
elmot	1:d0dfbce63a89	18	* this list of conditions and the following disclaimer in the documentation
elmot	1:d0dfbce63a89	19	* and/or other materials provided with the distribution.
elmot	1:d0dfbce63a89	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot	1:d0dfbce63a89	21	* may be used to endorse or promote products derived from this software
elmot	1:d0dfbce63a89	22	* without specific prior written permission.
elmot	1:d0dfbce63a89	23	*
elmot	1:d0dfbce63a89	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot	1:d0dfbce63a89	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot	1:d0dfbce63a89	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot	1:d0dfbce63a89	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot	1:d0dfbce63a89	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot	1:d0dfbce63a89	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot	1:d0dfbce63a89	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot	1:d0dfbce63a89	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot	1:d0dfbce63a89	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot	1:d0dfbce63a89	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot	1:d0dfbce63a89	34	*
elmot	1:d0dfbce63a89	35	******************************************************************************
elmot	1:d0dfbce63a89	36	*/
elmot	1:d0dfbce63a89	37
elmot	1:d0dfbce63a89	38	/* Define to prevent recursive inclusion -------------------------------------*/
elmot	1:d0dfbce63a89	39	#ifndef __STM32L4xx_ADC_EX_H
elmot	1:d0dfbce63a89	40	#define __STM32L4xx_ADC_EX_H
elmot	1:d0dfbce63a89	41
elmot	1:d0dfbce63a89	42	#ifdef __cplusplus
elmot	1:d0dfbce63a89	43	extern "C" {
elmot	1:d0dfbce63a89	44	#endif
elmot	1:d0dfbce63a89	45
elmot	1:d0dfbce63a89	46	/* Includes ------------------------------------------------------------------*/
elmot	1:d0dfbce63a89	47	#include "stm32l4xx_hal_def.h"
elmot	1:d0dfbce63a89	48
elmot	1:d0dfbce63a89	49	/** @addtogroup STM32L4xx_HAL_Driver
elmot	1:d0dfbce63a89	50	* @{
elmot	1:d0dfbce63a89	51	*/
elmot	1:d0dfbce63a89	52
elmot	1:d0dfbce63a89	53	/** @addtogroup ADCEx ADCEx
elmot	1:d0dfbce63a89	54	* @{
elmot	1:d0dfbce63a89	55	*/
elmot	1:d0dfbce63a89	56
elmot	1:d0dfbce63a89	57	/* Exported types ------------------------------------------------------------*/
elmot	1:d0dfbce63a89	58	/** @defgroup ADCEx_Exported_Types ADC Extended Exported Types
elmot	1:d0dfbce63a89	59	* @{
elmot	1:d0dfbce63a89	60	*/
elmot	1:d0dfbce63a89	61
elmot	1:d0dfbce63a89	62	/**
elmot	1:d0dfbce63a89	63	* @brief Structure definition of ADC initialization and regular group
elmot	1:d0dfbce63a89	64	* @note Parameters of this structure are shared within 2 scopes:
elmot	1:d0dfbce63a89	65	* - Scope entire ADC (affects regular and injected groups): ClockPrescaler and ClockDivider, Resolution, DataAlign,
elmot	1:d0dfbce63a89	66	* ScanConvMode, EOCSelection, LowPowerAutoWait.
elmot	1:d0dfbce63a89	67	* - Scope regular group: ContinuousConvMode, NbrOfConversion, DiscontinuousConvMode, NbrOfDiscConversion, ExternalTrigConvEdge,
elmot	1:d0dfbce63a89	68	* ExternalTrigConv, DMAContinuousRequests, Overrun, OversamplingMode, Oversampling.
elmot	1:d0dfbce63a89	69	* @note The setting of these parameters by function HAL_ADC_Init() is conditioned by ADC state.
elmot	1:d0dfbce63a89	70	* ADC state can be either:
elmot	1:d0dfbce63a89	71	* - For all parameters: ADC disabled
elmot	1:d0dfbce63a89	72	* - For all parameters except 'LowPowerAutoWait', 'DMAContinuousRequests' and 'Oversampling': ADC enabled without conversion on going on regular group.
elmot	1:d0dfbce63a89	73	* - For parameters 'LowPowerAutoWait' and 'DMAContinuousRequests': ADC enabled without conversion on going on regular and injected groups.
elmot	1:d0dfbce63a89	74	* If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
elmot	1:d0dfbce63a89	75	* without error reporting (as it can be the expected behaviour in case of intended action to update another parameter
elmot	1:d0dfbce63a89	76	* (which fulfills the ADC state condition) on the fly).
elmot	1:d0dfbce63a89	77	*/
elmot	1:d0dfbce63a89	78	typedef struct
elmot	1:d0dfbce63a89	79	{
elmot	1:d0dfbce63a89	80	uint32_t ClockPrescaler; /*!< Selects ADC clock source (asynchronous System/PLLSAI1/PLLSAI2 clocks or synchronous AHB clock) as well as
elmot	1:d0dfbce63a89	81	the division factor applied to the clock.
elmot	1:d0dfbce63a89	82	This parameter can be a value of @ref ADC_ClockPrescaler.
elmot	1:d0dfbce63a89	83	Note: The clock is common for all the ADCs.
elmot	1:d0dfbce63a89	84	Note: In case of usage of channels on injected group, ADC frequency should be lower than AHB clock frequency /4 for resolution 12 or 10 bits,
elmot	1:d0dfbce63a89	85	AHB clock frequency /3 for resolution 8 bits, AHB clock frequency /2 for resolution 6 bits.
elmot	1:d0dfbce63a89	86	Note: In case of usage of the ADC dedicated PLL clock, this clock must be preliminarily enabled and prescaler set at RCC top level.
elmot	1:d0dfbce63a89	87	Note: In case of synchronous clock mode based on HCLK/1, the configuration must be enabled only if the AHB clock prescaler is set to 1
elmot	1:d0dfbce63a89	88	and if the system clock has a 50% duty cycle.
elmot	1:d0dfbce63a89	89	Note: This parameter can be modified only if all ADCs are disabled. */
elmot	1:d0dfbce63a89	90
elmot	1:d0dfbce63a89	91	uint32_t Resolution; /*!< Configures the ADC resolution.
elmot	1:d0dfbce63a89	92	This parameter can be a value of @ref ADC_Resolution */
elmot	1:d0dfbce63a89	93
elmot	1:d0dfbce63a89	94	uint32_t DataAlign; /*!< Specifies ADC data alignment (right or left).
elmot	1:d0dfbce63a89	95	See reference manual for alignments formats versus resolutions.
elmot	1:d0dfbce63a89	96	This parameter can be a value of @ref ADC_Data_align */
elmot	1:d0dfbce63a89	97
elmot	1:d0dfbce63a89	98	uint32_t ScanConvMode; /*!< Configures the sequencer of regular and injected groups.
elmot	1:d0dfbce63a89	99	This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts.
elmot	1:d0dfbce63a89	100	If disabled: Conversion is performed in single mode (one channel converted, that defined in rank 1).
elmot	1:d0dfbce63a89	101	Parameters 'NbrOfConversion' and 'InjectedNbrOfConversion' are discarded (equivalent to set to 1).
elmot	1:d0dfbce63a89	102	If enabled: Conversions are performed in sequence mode (multiple ranks defined by 'NbrOfConversion' or'InjectedNbrOfConversion').
elmot	1:d0dfbce63a89	103	Scan direction is upward: from rank 1 to rank 'n'.
elmot	1:d0dfbce63a89	104	This parameter can be a value of @ref ADC_Scan_mode */
elmot	1:d0dfbce63a89	105
elmot	1:d0dfbce63a89	106	uint32_t EOCSelection; /*!< Specifies which EOC (End Of Conversion) flag is used for conversion by polling and interruption: end of conversion of each rank or complete sequence.
elmot	1:d0dfbce63a89	107	This parameter can be a value of @ref ADC_EOCSelection. */
elmot	1:d0dfbce63a89	108
elmot	1:d0dfbce63a89	109	uint32_t LowPowerAutoWait; /*!< Selects the dynamic low power Auto Delay: new conversion start only when the previous
elmot	1:d0dfbce63a89	110	conversion (for regular group) or previous sequence (for injected group) has been processed by user software
elmot	1:d0dfbce63a89	111	(EOC bit cleared or DR read for regular conversions, JEOS cleared for injected conversions).
elmot	1:d0dfbce63a89	112	This feature automatically adapts the speed of ADC to the speed of the system that reads the data. Moreover, this avoids risk of overrun
elmot	1:d0dfbce63a89	113	for low frequency applications.
elmot	1:d0dfbce63a89	114	This parameter can be set to ENABLE or DISABLE.
elmot	1:d0dfbce63a89	115	Note: Do not use with interruption or DMA (HAL_ADC_Start_IT(), HAL_ADC_Start_DMA(), HAL_ADCEx_InjectedStart_IT()) when it is necessary
elmot	1:d0dfbce63a89	116	to clear immediately the EOC flag to free the IRQ vector sequencer.
elmot	1:d0dfbce63a89	117	Do use with polling: 1. Start conversion with HAL_ADC_Start() or HAL_ADCEx_InjectedStart(), 2. When conversion data is available: use
elmot	1:d0dfbce63a89	118	HAL_ADC_PollForConversion() to ensure that conversion is completed and HAL_ADC_GetValue() to retrieve conversion result and trig another
elmot	1:d0dfbce63a89	119	conversion. For injected conversion, resort to HAL_ADCEx_InjectedPollForConversion() then HAL_ADCEx_InjectedGetValue() */
elmot	1:d0dfbce63a89	120
elmot	1:d0dfbce63a89	121	uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group,
elmot	1:d0dfbce63a89	122	after software start or external trigger occurred.
elmot	1:d0dfbce63a89	123	This parameter can be set to ENABLE or DISABLE. */
elmot	1:d0dfbce63a89	124
elmot	1:d0dfbce63a89	125	uint32_t NbrOfConversion; /*!< Specifies the number of ranks that will be converted within the regular group sequencer.
elmot	1:d0dfbce63a89	126	To use the regular group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
elmot	1:d0dfbce63a89	127	This parameter must be a number between Min_Data = 1 and Max_Data = 16.
elmot	1:d0dfbce63a89	128	Note: This parameter must be modified when no conversion is on going on regular group (ADC disabled, or ADC enabled without
elmot	1:d0dfbce63a89	129	continuous mode or external trigger that could launch a conversion). */
elmot	1:d0dfbce63a89	130
elmot	1:d0dfbce63a89	131	uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence
elmot	1:d0dfbce63a89	132	subdivided in successive parts).
elmot	1:d0dfbce63a89	133	Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
elmot	1:d0dfbce63a89	134	Discontinuous mode can be enabled only if continuous mode is disabled.
elmot	1:d0dfbce63a89	135	This parameter can be set to ENABLE or DISABLE. */
elmot	1:d0dfbce63a89	136
elmot	1:d0dfbce63a89	137	uint32_t NbrOfDiscConversion; /*!< Specifies the number of discontinuous conversions in which the main sequence of regular group (parameter NbrOfConversion) will be subdivided.
elmot	1:d0dfbce63a89	138	If parameter 'DiscontinuousConvMode' is disabled, this parameter is discarded.
elmot	1:d0dfbce63a89	139	This parameter must be a number between Min_Data = 1 and Max_Data = 8. */
elmot	1:d0dfbce63a89	140
elmot	1:d0dfbce63a89	141	uint32_t ExternalTrigConv; /*!< Selects the external event used to trigger the conversion start of regular group.
elmot	1:d0dfbce63a89	142	If set to ADC_SOFTWARE_START, external triggers are disabled and software trigger is used instead.
elmot	1:d0dfbce63a89	143	This parameter can be a value of @ref ADC_Regular_External_Trigger_Source.
elmot	1:d0dfbce63a89	144	Caution: external trigger source is common to ADCs. */
elmot	1:d0dfbce63a89	145
elmot	1:d0dfbce63a89	146	uint32_t ExternalTrigConvEdge; /*!< Selects the external trigger edge of regular group.
elmot	1:d0dfbce63a89	147	If set to ADC_EXTERNALTRIGCONVEDGE_NONE, external triggers are disabled and software trigger is used instead.
elmot	1:d0dfbce63a89	148	This parameter can be a value of @ref ADC_Regular_External_Trigger_Source_Edge */
elmot	1:d0dfbce63a89	149
elmot	1:d0dfbce63a89	150	uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stops when number of conversions is reached)
elmot	1:d0dfbce63a89	151	or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
elmot	1:d0dfbce63a89	152	Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached.
elmot	1:d0dfbce63a89	153	This parameter can be set to ENABLE or DISABLE.
elmot	1:d0dfbce63a89	154	Note: This parameter must be modified when no conversion is on going on both regular and injected groups
elmot	1:d0dfbce63a89	155	(ADC disabled, or ADC enabled without continuous mode or external trigger that could launch a conversion). */
elmot	1:d0dfbce63a89	156
elmot	1:d0dfbce63a89	157	uint32_t Overrun; /*!< Select the behaviour in case of overrun: data overwritten or preserved (default).
elmot	1:d0dfbce63a89	158	This parameter applies to regular group only.
elmot	1:d0dfbce63a89	159	This parameter can be a value of @ref ADC_Overrun.
elmot	1:d0dfbce63a89	160	Note: Case of overrun set to data preserved and usage with end on conversion interruption (HAL_Start_IT()): ADC IRQ handler has to clear
elmot	1:d0dfbce63a89	161	end of conversion flags, this induces the release of the preserved data. If needed, this data can be saved by user-developped function
elmot	1:d0dfbce63a89	162	HAL_ADC_ConvCpltCallback() (called before end of conversion flags clear).
elmot	1:d0dfbce63a89	163	Note: Error reporting with respect to the conversion mode:
elmot	1:d0dfbce63a89	164	- Usage with ADC conversion by polling for event or interruption: Error is reported only if overrun is set to data preserved. If overrun is set to data
elmot	1:d0dfbce63a89	165	overwritten, user can willingly not read all the converted data, this is not considered as an erroneous case.
elmot	1:d0dfbce63a89	166	- Usage with ADC conversion by DMA: Error is reported whatever overrun setting (DMA is expected to process all data from data register). */
elmot	1:d0dfbce63a89	167
elmot	1:d0dfbce63a89	168	uint32_t OversamplingMode; /*!< Specifies whether the oversampling feature is enabled or disabled.
elmot	1:d0dfbce63a89	169	This parameter can be set to ENABLE or DISABLE.
elmot	1:d0dfbce63a89	170	Note: This parameter can be modified only if there is no conversion is ongoing (both ADSTART and JADSTART cleared). */
elmot	1:d0dfbce63a89	171
elmot	1:d0dfbce63a89	172	ADC_OversamplingTypeDef Oversampling; /*!< Specifies the Oversampling parameters.
elmot	1:d0dfbce63a89	173	Caution: this setting overwrites the previous oversampling configuration if oversampling already enabled.
elmot	1:d0dfbce63a89	174	Note: This parameter can be modified only if there is no conversion is ongoing (both ADSTART and JADSTART cleared). */
elmot	1:d0dfbce63a89	175	}ADC_InitTypeDef;
elmot	1:d0dfbce63a89	176
elmot	1:d0dfbce63a89	177
elmot	1:d0dfbce63a89	178	/**
elmot	1:d0dfbce63a89	179	* @brief ADC handle Structure definition
elmot	1:d0dfbce63a89	180	*/
elmot	1:d0dfbce63a89	181	typedef struct
elmot	1:d0dfbce63a89	182	{
elmot	1:d0dfbce63a89	183	ADC_TypeDef Instance; /!< Register base address */
elmot	1:d0dfbce63a89	184
elmot	1:d0dfbce63a89	185	ADC_InitTypeDef Init; /!< ADC initialization parameters and regular conversions setting /
elmot	1:d0dfbce63a89	186
elmot	1:d0dfbce63a89	187	DMA_HandleTypeDef DMA_Handle; /!< Pointer DMA Handler */
elmot	1:d0dfbce63a89	188
elmot	1:d0dfbce63a89	189	HAL_LockTypeDef Lock; /!< ADC locking object /
elmot	1:d0dfbce63a89	190
elmot	1:d0dfbce63a89	191	__IO uint32_t State; /!< ADC communication state (bit-map of ADC states) /
elmot	1:d0dfbce63a89	192
elmot	1:d0dfbce63a89	193	__IO uint32_t ErrorCode; /!< ADC Error code /
elmot	1:d0dfbce63a89	194
elmot	1:d0dfbce63a89	195	ADC_InjectionConfigTypeDef InjectionConfig ; /!< ADC injected channel configuration build-up structure /
elmot	1:d0dfbce63a89	196	}ADC_HandleTypeDef;
elmot	1:d0dfbce63a89	197
elmot	1:d0dfbce63a89	198
elmot	1:d0dfbce63a89	199	/**
elmot	1:d0dfbce63a89	200	* @brief ADC Injected Conversion Oversampling structure definition
elmot	1:d0dfbce63a89	201	*/
elmot	1:d0dfbce63a89	202	typedef struct
elmot	1:d0dfbce63a89	203	{
elmot	1:d0dfbce63a89	204	uint32_t Ratio; /*!< Configures the oversampling ratio.
elmot	1:d0dfbce63a89	205	This parameter can be a value of @ref ADCEx_Oversampling_Ratio */
elmot	1:d0dfbce63a89	206
elmot	1:d0dfbce63a89	207	uint32_t RightBitShift; /*!< Configures the division coefficient for the Oversampler.
elmot	1:d0dfbce63a89	208	This parameter can be a value of @ref ADCEx_Right_Bit_Shift */
elmot	1:d0dfbce63a89	209	}ADC_InjOversamplingTypeDef;
elmot	1:d0dfbce63a89	210
elmot	1:d0dfbce63a89	211
elmot	1:d0dfbce63a89	212
elmot	1:d0dfbce63a89	213	/**
elmot	1:d0dfbce63a89	214	* @brief Structure definition of ADC injected group and ADC channel for injected group
elmot	1:d0dfbce63a89	215	* @note Parameters of this structure are shared within 2 scopes:
elmot	1:d0dfbce63a89	216	* - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime , InjectedSingleDiff, InjectedOffsetNumber, InjectedOffset
elmot	1:d0dfbce63a89	217	* - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
elmot	1:d0dfbce63a89	218	* AutoInjectedConv, QueueInjectedContext, ExternalTrigInjecConvEdge, ExternalTrigInjecConv, InjecOversamplingMode, InjecOversampling.
elmot	1:d0dfbce63a89	219	* @note The setting of these parameters by function HAL_ADCEx_InjectedConfigChannel() is conditioned by ADC state.
elmot	1:d0dfbce63a89	220	* ADC state can be either:
elmot	1:d0dfbce63a89	221	* - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'InjectedSingleDiff')
elmot	1:d0dfbce63a89	222	* - For parameters 'InjectedDiscontinuousConvMode', 'QueueInjectedContext', 'InjecOversampling': ADC enabled without conversion on going on injected group.
elmot	1:d0dfbce63a89	223	* - For parameters 'InjectedSamplingTime', 'InjectedOffset', 'InjectedOffsetNumber', 'AutoInjectedConv': ADC enabled without conversion on going on regular and injected groups.
elmot	1:d0dfbce63a89	224	* - For parameters 'InjectedChannel', 'InjectedRank', 'InjectedNbrOfConversion', 'ExternalTrigInjecConv', 'ExternalTrigInjecConvEdge': ADC enabled and while conversion on going
elmot	1:d0dfbce63a89	225	* on regular and injected groups.
elmot	1:d0dfbce63a89	226	* If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
elmot	1:d0dfbce63a89	227	* without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly).
elmot	1:d0dfbce63a89	228	*/
elmot	1:d0dfbce63a89	229	typedef struct
elmot	1:d0dfbce63a89	230	{
elmot	1:d0dfbce63a89	231	uint32_t InjectedChannel; /*!< Configure the ADC injected channel.
elmot	1:d0dfbce63a89	232	This parameter can be a value of @ref ADC_channels
elmot	1:d0dfbce63a89	233	Note: Depending on devices and ADC instances, some channels may not be available. Refer to device DataSheet for channels availability. */
elmot	1:d0dfbce63a89	234	uint32_t InjectedRank; /*!< The rank in the injected group sequencer.
elmot	1:d0dfbce63a89	235	This parameter must be a value of @ref ADCEx_injected_rank.
elmot	1:d0dfbce63a89	236	Note: to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by
elmot	1:d0dfbce63a89	237	the new channel setting (or parameter number of conversions adjusted). */
elmot	1:d0dfbce63a89	238	uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel.
elmot	1:d0dfbce63a89	239	Unit: ADC clock cycles.
elmot	1:d0dfbce63a89	240	Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits,
elmot	1:d0dfbce63a89	241	8.5 cycles at 8 bits, 6.5 cycles at 6 bits).
elmot	1:d0dfbce63a89	242	This parameter can be a value of @ref ADC_sampling_times.
elmot	1:d0dfbce63a89	243	Caution: This parameter applies to a channel that can be used in a regular and/or injected group.
elmot	1:d0dfbce63a89	244	It overwrites the last setting.
elmot	1:d0dfbce63a89	245	Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
elmot	1:d0dfbce63a89	246	sampling time constraints must be respected (sampling time can be adjusted with respect to the ADC clock frequency and sampling time
elmot	1:d0dfbce63a89	247	setting). Refer to device DataSheet for timings values. */
elmot	1:d0dfbce63a89	248	uint32_t InjectedSingleDiff; /*!< Selection of single-ended or differential input.
elmot	1:d0dfbce63a89	249	In differential mode: Differential measurement is between the selected channel 'i' (positive input) and channel 'i+1' (negative input).
elmot	1:d0dfbce63a89	250	Only channel 'i' has to be configured, channel 'i+1' is configured automatically.
elmot	1:d0dfbce63a89	251	This parameter must be a value of @ref ADCEx_SingleDifferential.
elmot	1:d0dfbce63a89	252	Caution: This parameter applies to a channel that can be used in a regular and/or injected group.
elmot	1:d0dfbce63a89	253	It overwrites the last setting.
elmot	1:d0dfbce63a89	254	Note: Refer to Reference Manual to ensure the selected channel is available in differential mode.
elmot	1:d0dfbce63a89	255	Note: When configuring a channel 'i' in differential mode, the channel 'i+1' is not usable separately.
elmot	1:d0dfbce63a89	256	Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
elmot	1:d0dfbce63a89	257	If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case
elmot	1:d0dfbce63a89	258	of another parameter update on the fly) */
elmot	1:d0dfbce63a89	259	uint32_t InjectedOffsetNumber; /*!< Selects the offset number.
elmot	1:d0dfbce63a89	260	This parameter can be a value of @ref ADCEx_OffsetNumber.
elmot	1:d0dfbce63a89	261	Caution: Only one offset is allowed per channel. This parameter overwrites the last setting. */
elmot	1:d0dfbce63a89	262	uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data.
elmot	1:d0dfbce63a89	263	Offset value must be a positive number.
elmot	1:d0dfbce63a89	264	Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF,
elmot	1:d0dfbce63a89	265	0x3FF, 0xFF or 0x3F respectively.
elmot	1:d0dfbce63a89	266	Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled
elmot	1:d0dfbce63a89	267	without continuous mode or external trigger that could launch a conversion). */
elmot	1:d0dfbce63a89	268	uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
elmot	1:d0dfbce63a89	269	To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
elmot	1:d0dfbce63a89	270	This parameter must be a number between Min_Data = 1 and Max_Data = 4.
elmot	1:d0dfbce63a89	271	Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
elmot	1:d0dfbce63a89	272	configure a channel on injected group can impact the configuration of other channels previously set. */
elmot	1:d0dfbce63a89	273	uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence
elmot	1:d0dfbce63a89	274	subdivided in successive parts).
elmot	1:d0dfbce63a89	275	Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
elmot	1:d0dfbce63a89	276	Discontinuous mode can be enabled only if continuous mode is disabled.
elmot	1:d0dfbce63a89	277	This parameter can be set to ENABLE or DISABLE.
elmot	1:d0dfbce63a89	278	Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
elmot	1:d0dfbce63a89	279	Note: For injected group, discontinuous mode converts the sequence channel by channel (only one channel at a time).
elmot	1:d0dfbce63a89	280	Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
elmot	1:d0dfbce63a89	281	configure a channel on injected group can impact the configuration of other channels previously set. */
elmot	1:d0dfbce63a89	282	uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
elmot	1:d0dfbce63a89	283	This parameter can be set to ENABLE or DISABLE.
elmot	1:d0dfbce63a89	284	Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
elmot	1:d0dfbce63a89	285	Note: To use Automatic injected conversion, injected group external triggers must be disabled.
elmot	1:d0dfbce63a89	286	Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
elmot	1:d0dfbce63a89	287	To maintain JAUTO always enabled, DMA must be configured in circular mode.
elmot	1:d0dfbce63a89	288	Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
elmot	1:d0dfbce63a89	289	configure a channel on injected group can impact the configuration of other channels previously set. */
elmot	1:d0dfbce63a89	290	uint32_t QueueInjectedContext; /*!< Specifies whether the context queue feature is enabled.
elmot	1:d0dfbce63a89	291	This parameter can be set to ENABLE or DISABLE.
elmot	1:d0dfbce63a89	292	If context queue is enabled, injected sequencer&channels configurations are queued on up to 2 contexts. If a
elmot	1:d0dfbce63a89	293	new injected context is set when queue is full, error is triggered by interruption and through function
elmot	1:d0dfbce63a89	294	'HAL_ADCEx_InjectedQueueOverflowCallback'.
elmot	1:d0dfbce63a89	295	Caution: This feature request that the sequence is fully configured before injected conversion start.
elmot	1:d0dfbce63a89	296	Therefore, configure channels with as many calls to HAL_ADCEx_InjectedConfigChannel() as the 'InjectedNbrOfConversion' parameter.
elmot	1:d0dfbce63a89	297	Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
elmot	1:d0dfbce63a89	298	configure a channel on injected group can impact the configuration of other channels previously set.
elmot	1:d0dfbce63a89	299	Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). */
elmot	1:d0dfbce63a89	300	uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group.
elmot	1:d0dfbce63a89	301	If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled and software trigger is used instead.
elmot	1:d0dfbce63a89	302	This parameter can be a value of @ref ADCEx_Injected_External_Trigger_Source.
elmot	1:d0dfbce63a89	303	Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
elmot	1:d0dfbce63a89	304	configure a channel on injected group can impact the configuration of other channels previously set. */
elmot	1:d0dfbce63a89	305	uint32_t ExternalTrigInjecConvEdge; /*!< Selects the external trigger edge of injected group.
elmot	1:d0dfbce63a89	306	This parameter can be a value of @ref ADCEx_Injected_External_Trigger_Source_Edge.
elmot	1:d0dfbce63a89	307	If trigger edge is set to ADC_EXTERNALTRIGINJECCONV_EDGE_NONE, external triggers are disabled and software trigger is used instead.
elmot	1:d0dfbce63a89	308	Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
elmot	1:d0dfbce63a89	309	configure a channel on injected group can impact the configuration of other channels previously set. */
elmot	1:d0dfbce63a89	310
elmot	1:d0dfbce63a89	311	uint32_t InjecOversamplingMode; /*!< Specifies whether the oversampling feature is enabled or disabled.
elmot	1:d0dfbce63a89	312	This parameter can be set to ENABLE or DISABLE.
elmot	1:d0dfbce63a89	313	Note: This parameter can be modified only if there is no conversion is ongoing (both ADSTART and JADSTART cleared). */
elmot	1:d0dfbce63a89	314
elmot	1:d0dfbce63a89	315	ADC_InjOversamplingTypeDef InjecOversampling; /*!< Specifies the Oversampling parameters.
elmot	1:d0dfbce63a89	316	Caution: this setting overwrites the previous oversampling configuration if oversampling already enabled.
elmot	1:d0dfbce63a89	317	Note: This parameter can be modified only if there is no conversion is ongoing (both ADSTART and JADSTART cleared). */
elmot	1:d0dfbce63a89	318	}ADC_InjectionConfTypeDef;
elmot	1:d0dfbce63a89	319
elmot	1:d0dfbce63a89	320
elmot	1:d0dfbce63a89	321	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	322	/**
elmot	1:d0dfbce63a89	323	* @brief Structure definition of ADC multimode
elmot	1:d0dfbce63a89	324	* @note The setting of these parameters by function HAL_ADCEx_MultiModeConfigChannel() is conditioned by ADCs state (both Master and Slave ADCs).
elmot	1:d0dfbce63a89	325	* Both Master and Slave ADCs must be disabled.
elmot	1:d0dfbce63a89	326	*/
elmot	1:d0dfbce63a89	327	typedef struct
elmot	1:d0dfbce63a89	328	{
elmot	1:d0dfbce63a89	329	uint32_t Mode; /*!< Configures the ADC to operate in independent or multimode.
elmot	1:d0dfbce63a89	330	This parameter can be a value of @ref ADCEx_Common_mode. */
elmot	1:d0dfbce63a89	331	uint32_t DMAAccessMode; /*!< Configures the DMA mode for multimode ADC:
elmot	1:d0dfbce63a89	332	selection whether 2 DMA channels (each ADC uses its own DMA channel) or 1 DMA channel (one DMA channel for both ADC, DMA of ADC master)
elmot	1:d0dfbce63a89	333	This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multimode. */
elmot	1:d0dfbce63a89	334	uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
elmot	1:d0dfbce63a89	335	This parameter can be a value of @ref ADCEx_delay_between_2_sampling_phases.
elmot	1:d0dfbce63a89	336	Delay range depends on selected resolution:
elmot	1:d0dfbce63a89	337	from 1 to 12 clock cycles for 12 bits, from 1 to 10 clock cycles for 10 bits,
elmot	1:d0dfbce63a89	338	from 1 to 8 clock cycles for 8 bits, from 1 to 6 clock cycles for 6 bits. */
elmot	1:d0dfbce63a89	339	}ADC_MultiModeTypeDef;
elmot	1:d0dfbce63a89	340	#endif /* defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) */
elmot	1:d0dfbce63a89	341
elmot	1:d0dfbce63a89	342	/**
elmot	1:d0dfbce63a89	343	* @}
elmot	1:d0dfbce63a89	344	*/
elmot	1:d0dfbce63a89	345
elmot	1:d0dfbce63a89	346	/* Exported constants --------------------------------------------------------*/
elmot	1:d0dfbce63a89	347
elmot	1:d0dfbce63a89	348	/** @defgroup ADCEx_Exported_Constants ADC Extended Exported Constants
elmot	1:d0dfbce63a89	349	* @{
elmot	1:d0dfbce63a89	350	*/
elmot	1:d0dfbce63a89	351
elmot	1:d0dfbce63a89	352	/** @defgroup ADCEx_SingleDifferential ADC Extended Single-ended/Differential input mode
elmot	1:d0dfbce63a89	353	* @{
elmot	1:d0dfbce63a89	354	*/
elmot	1:d0dfbce63a89	355	#define ADC_SINGLE_ENDED ((uint32_t)0x00000000) /!< ADC channel set in single-ended input mode /
elmot	1:d0dfbce63a89	356	#define ADC_DIFFERENTIAL_ENDED ((uint32_t)ADC_CR_ADCALDIF) /!< ADC channel set in differential mode /
elmot	1:d0dfbce63a89	357	/**
elmot	1:d0dfbce63a89	358	* @}
elmot	1:d0dfbce63a89	359	*/
elmot	1:d0dfbce63a89	360
elmot	1:d0dfbce63a89	361	/** @defgroup ADCEx_OffsetNumber ADC Extended Offset Number
elmot	1:d0dfbce63a89	362	* @{
elmot	1:d0dfbce63a89	363	*/
elmot	1:d0dfbce63a89	364	#define ADC_OFFSET_NONE ((uint32_t)0x00) /!< No offset correction /
elmot	1:d0dfbce63a89	365	#define ADC_OFFSET_1 ((uint32_t)0x01) /!< Offset correction to apply to a first channel /
elmot	1:d0dfbce63a89	366	#define ADC_OFFSET_2 ((uint32_t)0x02) /!< Offset correction to apply to a second channel /
elmot	1:d0dfbce63a89	367	#define ADC_OFFSET_3 ((uint32_t)0x03) /!< Offset correction to apply to a third channel /
elmot	1:d0dfbce63a89	368	#define ADC_OFFSET_4 ((uint32_t)0x04) /!< Offset correction to apply to a fourth channel /
elmot	1:d0dfbce63a89	369	/**
elmot	1:d0dfbce63a89	370	* @}
elmot	1:d0dfbce63a89	371	*/
elmot	1:d0dfbce63a89	372
elmot	1:d0dfbce63a89	373	/** @defgroup ADCEx_regular_rank ADC Extended Regular Channel Rank
elmot	1:d0dfbce63a89	374	* @{
elmot	1:d0dfbce63a89	375	*/
elmot	1:d0dfbce63a89	376	#define ADC_REGULAR_RANK_1 ((uint32_t)0x00000001) /!< ADC regular conversion rank 1 /
elmot	1:d0dfbce63a89	377	#define ADC_REGULAR_RANK_2 ((uint32_t)0x00000002) /!< ADC regular conversion rank 2 /
elmot	1:d0dfbce63a89	378	#define ADC_REGULAR_RANK_3 ((uint32_t)0x00000003) /!< ADC regular conversion rank 3 /
elmot	1:d0dfbce63a89	379	#define ADC_REGULAR_RANK_4 ((uint32_t)0x00000004) /!< ADC regular conversion rank 4 /
elmot	1:d0dfbce63a89	380	#define ADC_REGULAR_RANK_5 ((uint32_t)0x00000005) /!< ADC regular conversion rank 5 /
elmot	1:d0dfbce63a89	381	#define ADC_REGULAR_RANK_6 ((uint32_t)0x00000006) /!< ADC regular conversion rank 6 /
elmot	1:d0dfbce63a89	382	#define ADC_REGULAR_RANK_7 ((uint32_t)0x00000007) /!< ADC regular conversion rank 7 /
elmot	1:d0dfbce63a89	383	#define ADC_REGULAR_RANK_8 ((uint32_t)0x00000008) /!< ADC regular conversion rank 8 /
elmot	1:d0dfbce63a89	384	#define ADC_REGULAR_RANK_9 ((uint32_t)0x00000009) /!< ADC regular conversion rank 9 /
elmot	1:d0dfbce63a89	385	#define ADC_REGULAR_RANK_10 ((uint32_t)0x0000000A) /!< ADC regular conversion rank 10 /
elmot	1:d0dfbce63a89	386	#define ADC_REGULAR_RANK_11 ((uint32_t)0x0000000B) /!< ADC regular conversion rank 11 /
elmot	1:d0dfbce63a89	387	#define ADC_REGULAR_RANK_12 ((uint32_t)0x0000000C) /!< ADC regular conversion rank 12 /
elmot	1:d0dfbce63a89	388	#define ADC_REGULAR_RANK_13 ((uint32_t)0x0000000D) /!< ADC regular conversion rank 13 /
elmot	1:d0dfbce63a89	389	#define ADC_REGULAR_RANK_14 ((uint32_t)0x0000000E) /!< ADC regular conversion rank 14 /
elmot	1:d0dfbce63a89	390	#define ADC_REGULAR_RANK_15 ((uint32_t)0x0000000F) /!< ADC regular conversion rank 15 /
elmot	1:d0dfbce63a89	391	#define ADC_REGULAR_RANK_16 ((uint32_t)0x00000010) /!< ADC regular conversion rank 16 /
elmot	1:d0dfbce63a89	392	/**
elmot	1:d0dfbce63a89	393	* @}
elmot	1:d0dfbce63a89	394	*/
elmot	1:d0dfbce63a89	395
elmot	1:d0dfbce63a89	396	/** @defgroup ADCEx_injected_rank ADC Extended Injected Channel Rank
elmot	1:d0dfbce63a89	397	* @{
elmot	1:d0dfbce63a89	398	*/
elmot	1:d0dfbce63a89	399	#define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001) /!< ADC injected conversion rank 1 /
elmot	1:d0dfbce63a89	400	#define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002) /!< ADC injected conversion rank 2 /
elmot	1:d0dfbce63a89	401	#define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003) /!< ADC injected conversion rank 3 /
elmot	1:d0dfbce63a89	402	#define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004) /!< ADC injected conversion rank 4 /
elmot	1:d0dfbce63a89	403	/**injected
elmot	1:d0dfbce63a89	404	* @}
elmot	1:d0dfbce63a89	405	*/
elmot	1:d0dfbce63a89	406
elmot	1:d0dfbce63a89	407	/** @defgroup ADCEx_Injected_External_Trigger_Source_Edge ADC External Trigger Source Edge for Injected Group
elmot	1:d0dfbce63a89	408	* @{
elmot	1:d0dfbce63a89	409	*/
elmot	1:d0dfbce63a89	410	#define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE ((uint32_t)0x00000000) /!< Injected conversions hardware trigger detection disabled /
elmot	1:d0dfbce63a89	411	#define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING ((uint32_t)ADC_JSQR_JEXTEN_0) /!< Injected conversions hardware trigger detection on the rising edge /
elmot	1:d0dfbce63a89	412	#define ADC_EXTERNALTRIGINJECCONV_EDGE_FALLING ((uint32_t)ADC_JSQR_JEXTEN_1) /!< Injected conversions hardware trigger detection on the falling edge /
elmot	1:d0dfbce63a89	413	#define ADC_EXTERNALTRIGINJECCONV_EDGE_RISINGFALLING ((uint32_t)ADC_JSQR_JEXTEN) /!< Injected conversions hardware trigger detection on both the rising and falling edges /
elmot	1:d0dfbce63a89	414	/**
elmot	1:d0dfbce63a89	415	* @}
elmot	1:d0dfbce63a89	416	*/
elmot	1:d0dfbce63a89	417
elmot	1:d0dfbce63a89	418	/** @defgroup ADCEx_Injected_External_Trigger_Source ADC Extended External Trigger Source for Injected Group
elmot	1:d0dfbce63a89	419	* @{
elmot	1:d0dfbce63a89	420	*/
elmot	1:d0dfbce63a89	421	#define ADC_EXTERNALTRIGINJEC_T1_TRGO ((uint32_t)0x00000000) /!< Event 0 triggers injected group conversion start /
elmot	1:d0dfbce63a89	422	#define ADC_EXTERNALTRIGINJEC_T1_CC4 ((uint32_t)ADC_JSQR_JEXTSEL_0) /!< Event 1 triggers injected group conversion start /
elmot	1:d0dfbce63a89	423	#define ADC_EXTERNALTRIGINJEC_T2_TRGO ((uint32_t)ADC_JSQR_JEXTSEL_1) /!< Event 2 triggers injected group conversion start /
elmot	1:d0dfbce63a89	424	#define ADC_EXTERNALTRIGINJEC_T2_CC1 ((uint32_t)(ADC_JSQR_JEXTSEL_1 \| ADC_JSQR_JEXTSEL_0)) /!< Event 3 triggers injected group conversion start /
elmot	1:d0dfbce63a89	425	#define ADC_EXTERNALTRIGINJEC_T3_CC4 ((uint32_t)ADC_JSQR_JEXTSEL_2) /!< Event 4 triggers injected group conversion start /
elmot	1:d0dfbce63a89	426	#define ADC_EXTERNALTRIGINJEC_T4_TRGO ((uint32_t)(ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_0)) /!< Event 5 triggers injected group conversion start /
elmot	1:d0dfbce63a89	427	#define ADC_EXTERNALTRIGINJEC_EXT_IT15 ((uint32_t)(ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_1)) /!< Event 6 triggers injected group conversion start /
elmot	1:d0dfbce63a89	428	#define ADC_EXTERNALTRIGINJEC_T8_CC4 ((uint32_t)(ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_1 \| ADC_JSQR_JEXTSEL_0)) /!< Event 7 triggers injected group conversion start /
elmot	1:d0dfbce63a89	429	#define ADC_EXTERNALTRIGINJEC_T1_TRGO2 ((uint32_t)ADC_JSQR_JEXTSEL_3) /!< Event 8 triggers injected group conversion start /
elmot	1:d0dfbce63a89	430	#define ADC_EXTERNALTRIGINJEC_T8_TRGO ((uint32_t)(ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_0)) /!< Event 9 triggers injected group conversion start /
elmot	1:d0dfbce63a89	431	#define ADC_EXTERNALTRIGINJEC_T8_TRGO2 ((uint32_t)(ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_1)) /!< Event 10 triggers injected group conversion start /
elmot	1:d0dfbce63a89	432	#define ADC_EXTERNALTRIGINJEC_T3_CC3 ((uint32_t)(ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_1 \| ADC_JSQR_JEXTSEL_0)) /!< Event 11 triggers injected group conversion start /
elmot	1:d0dfbce63a89	433	#define ADC_EXTERNALTRIGINJEC_T3_TRGO ((uint32_t)(ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_2)) /!< Event 12 triggers injected group conversion start /
elmot	1:d0dfbce63a89	434	#define ADC_EXTERNALTRIGINJEC_T3_CC1 ((uint32_t)(ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_0)) /!< Event 13 triggers injected group conversion start /
elmot	1:d0dfbce63a89	435	#define ADC_EXTERNALTRIGINJEC_T6_TRGO ((uint32_t)(ADC_JSQR_JEXTSEL_3 \| ADC_JSQR_JEXTSEL_2 \| ADC_JSQR_JEXTSEL_1)) /!< Event 14 triggers injected group conversion start /
elmot	1:d0dfbce63a89	436	#define ADC_EXTERNALTRIGINJEC_T15_TRGO ((uint32_t)ADC_JSQR_JEXTSEL) /!< Event 15 triggers injected group conversion start /
elmot	1:d0dfbce63a89	437
elmot	1:d0dfbce63a89	438	#define ADC_INJECTED_SOFTWARE_START ((uint32_t)0x00000001) /!< Software triggers injected group conversion start /
elmot	1:d0dfbce63a89	439	/**
elmot	1:d0dfbce63a89	440	* @}
elmot	1:d0dfbce63a89	441	*/
elmot	1:d0dfbce63a89	442
elmot	1:d0dfbce63a89	443	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	444	/** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode
elmot	1:d0dfbce63a89	445	* @{
elmot	1:d0dfbce63a89	446	*/
elmot	1:d0dfbce63a89	447	#define ADC_MODE_INDEPENDENT ((uint32_t)(0x00000000)) /!< Independent ADC conversions mode /
elmot	1:d0dfbce63a89	448	#define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_DUAL_0)) /!< Combined regular simultaneous + injected simultaneous mode /
elmot	1:d0dfbce63a89	449	#define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)(ADC_CCR_DUAL_1)) /!< Combined regular simultaneous + alternate trigger mode /
elmot	1:d0dfbce63a89	450	#define ADC_DUALMODE_REGINTERL_INJECSIMULT ((uint32_t)(ADC_CCR_DUAL_1 \| ADC_CCR_DUAL_0)) /!< Combined Interleaved mode + injected simultaneous mode /
elmot	1:d0dfbce63a89	451	#define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_DUAL_2 \| ADC_CCR_DUAL_0)) /!< Injected simultaneous mode only /
elmot	1:d0dfbce63a89	452	#define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_DUAL_2 \| ADC_CCR_DUAL_1)) /!< Regular simultaneous mode only /
elmot	1:d0dfbce63a89	453	#define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_DUAL_2 \| ADC_CCR_DUAL_1 \| ADC_CCR_DUAL_0)) /!< Interleaved mode only /
elmot	1:d0dfbce63a89	454	#define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_DUAL_3 \| ADC_CCR_DUAL_0)) /!< Alternate trigger mode only /
elmot	1:d0dfbce63a89	455	/**
elmot	1:d0dfbce63a89	456	* @}
elmot	1:d0dfbce63a89	457	*/
elmot	1:d0dfbce63a89	458
elmot	1:d0dfbce63a89	459	/** @defgroup ADCEx_Direct_memory_access_mode_for_multimode ADC Extended DMA Mode for Dual ADC Mode
elmot	1:d0dfbce63a89	460	* @{
elmot	1:d0dfbce63a89	461	*/
elmot	1:d0dfbce63a89	462	#define ADC_DMAACCESSMODE_DISABLED ((uint32_t)0x00000000) /!< DMA multimode disabled: each ADC uses its own DMA channel /
elmot	1:d0dfbce63a89	463	#define ADC_DMAACCESSMODE_12_10_BITS ((uint32_t)ADC_CCR_MDMA_1) /!< DMA multimode enabled (one DMA channel for both ADC, DMA of ADC master) for 12 and 10 bits resolution /
elmot	1:d0dfbce63a89	464	#define ADC_DMAACCESSMODE_8_6_BITS ((uint32_t)ADC_CCR_MDMA) /!< DMA multimode enabled (one DMA channel for both ADC, DMA of ADC master) for 8 and 6 bits resolution /
elmot	1:d0dfbce63a89	465	/**
elmot	1:d0dfbce63a89	466	* @}
elmot	1:d0dfbce63a89	467	*/
elmot	1:d0dfbce63a89	468
elmot	1:d0dfbce63a89	469	/** @defgroup ADCEx_delay_between_2_sampling_phases ADC Extended Delay Between 2 Sampling Phases
elmot	1:d0dfbce63a89	470	* @{
elmot	1:d0dfbce63a89	471	*/
elmot	1:d0dfbce63a89	472	#define ADC_TWOSAMPLINGDELAY_1CYCLE ((uint32_t)(0x00000000)) /!< 1 ADC clock cycle delay /
elmot	1:d0dfbce63a89	473	#define ADC_TWOSAMPLINGDELAY_2CYCLES ((uint32_t)(ADC_CCR_DELAY_0)) /!< 2 ADC clock cycles delay /
elmot	1:d0dfbce63a89	474	#define ADC_TWOSAMPLINGDELAY_3CYCLES ((uint32_t)(ADC_CCR_DELAY_1)) /!< 3 ADC clock cycles delay /
elmot	1:d0dfbce63a89	475	#define ADC_TWOSAMPLINGDELAY_4CYCLES ((uint32_t)(ADC_CCR_DELAY_1 \| ADC_CCR_DELAY_0)) /!< 4 ADC clock cycles delay /
elmot	1:d0dfbce63a89	476	#define ADC_TWOSAMPLINGDELAY_5CYCLES ((uint32_t)(ADC_CCR_DELAY_2)) /!< 5 ADC clock cycles delay /
elmot	1:d0dfbce63a89	477	#define ADC_TWOSAMPLINGDELAY_6CYCLES ((uint32_t)(ADC_CCR_DELAY_2 \| ADC_CCR_DELAY_0)) /!< 6 ADC clock cycles delay /
elmot	1:d0dfbce63a89	478	#define ADC_TWOSAMPLINGDELAY_7CYCLES ((uint32_t)(ADC_CCR_DELAY_2 \| ADC_CCR_DELAY_1)) /!< 7 ADC clock cycles delay (lower for non 12-bit resolution) /
elmot	1:d0dfbce63a89	479	#define ADC_TWOSAMPLINGDELAY_8CYCLES ((uint32_t)(ADC_CCR_DELAY_2 \| ADC_CCR_DELAY_1 \| ADC_CCR_DELAY_0)) /!< 8 ADC clock cycles delay (lower for non 12-bit resolution) /
elmot	1:d0dfbce63a89	480	#define ADC_TWOSAMPLINGDELAY_9CYCLES ((uint32_t)(ADC_CCR_DELAY_3)) /!< 9 ADC clock cycles delay (lower for non 12-bit resolution) /
elmot	1:d0dfbce63a89	481	#define ADC_TWOSAMPLINGDELAY_10CYCLES ((uint32_t)(ADC_CCR_DELAY_3 \| ADC_CCR_DELAY_0)) /!< 10 ADC clock cycles delay (lower for non 12-bit resolution) /
elmot	1:d0dfbce63a89	482	#define ADC_TWOSAMPLINGDELAY_11CYCLES ((uint32_t)(ADC_CCR_DELAY_3 \| ADC_CCR_DELAY_1)) /!< 11 ADC clock cycles delay (lower for non 12-bit resolution) /
elmot	1:d0dfbce63a89	483	#define ADC_TWOSAMPLINGDELAY_12CYCLES ((uint32_t)(ADC_CCR_DELAY_3 \| ADC_CCR_DELAY_1 \| ADC_CCR_DELAY_0)) /!< 12 ADC clock cycles delay (lower for non 12-bit resolution) /
elmot	1:d0dfbce63a89	484	/**
elmot	1:d0dfbce63a89	485	* @}
elmot	1:d0dfbce63a89	486	*/
elmot	1:d0dfbce63a89	487	#elif defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	488	/** @defgroup ADCEx_Common_mode ADC Extended Independent ADC Mode
elmot	1:d0dfbce63a89	489	* @{
elmot	1:d0dfbce63a89	490	*/
elmot	1:d0dfbce63a89	491	#define ADC_MODE_INDEPENDENT ((uint32_t)(0x00000000)) /!< Independent ADC conversions mode /
elmot	1:d0dfbce63a89	492	/**
elmot	1:d0dfbce63a89	493	* @}
elmot	1:d0dfbce63a89	494	*/
elmot	1:d0dfbce63a89	495
elmot	1:d0dfbce63a89	496	#endif /* defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) */
elmot	1:d0dfbce63a89	497
elmot	1:d0dfbce63a89	498	/** @defgroup ADCEx_analog_watchdog_number ADC Extended Analog Watchdog Selection
elmot	1:d0dfbce63a89	499	* @{
elmot	1:d0dfbce63a89	500	*/
elmot	1:d0dfbce63a89	501	#define ADC_ANALOGWATCHDOG_1 ((uint32_t)0x00000001) /!< Analog watchdog 1 selection /
elmot	1:d0dfbce63a89	502	#define ADC_ANALOGWATCHDOG_2 ((uint32_t)0x00000002) /!< Analog watchdog 2 selection /
elmot	1:d0dfbce63a89	503	#define ADC_ANALOGWATCHDOG_3 ((uint32_t)0x00000003) /!< Analog watchdog 3 selection /
elmot	1:d0dfbce63a89	504	/**
elmot	1:d0dfbce63a89	505	* @}
elmot	1:d0dfbce63a89	506	*/
elmot	1:d0dfbce63a89	507
elmot	1:d0dfbce63a89	508	/** @defgroup ADCEx_analog_watchdog_mode ADC Extended Analog Watchdog Mode
elmot	1:d0dfbce63a89	509	* @{
elmot	1:d0dfbce63a89	510	*/
elmot	1:d0dfbce63a89	511	#define ADC_ANALOGWATCHDOG_NONE ((uint32_t) 0x00000000) /!< No analog watchdog selected /
elmot	1:d0dfbce63a89	512	#define ADC_ANALOGWATCHDOG_SINGLE_REG ((uint32_t)(ADC_CFGR_AWD1SGL \| ADC_CFGR_AWD1EN)) /!< Analog watchdog applied to a regular group single channel /
elmot	1:d0dfbce63a89	513	#define ADC_ANALOGWATCHDOG_SINGLE_INJEC ((uint32_t)(ADC_CFGR_AWD1SGL \| ADC_CFGR_JAWD1EN)) /!< Analog watchdog applied to an injected group single channel /
elmot	1:d0dfbce63a89	514	#define ADC_ANALOGWATCHDOG_SINGLE_REGINJEC ((uint32_t)(ADC_CFGR_AWD1SGL \| ADC_CFGR_AWD1EN \| ADC_CFGR_JAWD1EN)) /!< Analog watchdog applied to a regular and injected groups single channel /
elmot	1:d0dfbce63a89	515	#define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t) ADC_CFGR_AWD1EN) /!< Analog watchdog applied to regular group all channels /
elmot	1:d0dfbce63a89	516	#define ADC_ANALOGWATCHDOG_ALL_INJEC ((uint32_t) ADC_CFGR_JAWD1EN) /!< Analog watchdog applied to injected group all channels /
elmot	1:d0dfbce63a89	517	#define ADC_ANALOGWATCHDOG_ALL_REGINJEC ((uint32_t)(ADC_CFGR_AWD1EN \| ADC_CFGR_JAWD1EN)) /!< Analog watchdog applied to regular and injected groups all channels /
elmot	1:d0dfbce63a89	518	/**
elmot	1:d0dfbce63a89	519	* @}
elmot	1:d0dfbce63a89	520	*/
elmot	1:d0dfbce63a89	521
elmot	1:d0dfbce63a89	522	/** @defgroup ADCEx_conversion_group ADC Extended Conversion Group
elmot	1:d0dfbce63a89	523	* @{
elmot	1:d0dfbce63a89	524	*/
elmot	1:d0dfbce63a89	525	#define ADC_REGULAR_GROUP ((uint32_t)(ADC_FLAG_EOC \| ADC_FLAG_EOS)) /!< ADC regular group selection /
elmot	1:d0dfbce63a89	526	#define ADC_INJECTED_GROUP ((uint32_t)(ADC_FLAG_JEOC \| ADC_FLAG_JEOS)) /!< ADC injected group selection /
elmot	1:d0dfbce63a89	527	#define ADC_REGULAR_INJECTED_GROUP ((uint32_t)(ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_JEOC \| ADC_FLAG_JEOS)) /!< ADC regular and injected groups selection /
elmot	1:d0dfbce63a89	528	/**
elmot	1:d0dfbce63a89	529	* @}
elmot	1:d0dfbce63a89	530	*/
elmot	1:d0dfbce63a89	531
elmot	1:d0dfbce63a89	532	/** @defgroup ADCEx_Event_type ADC Extended Event Type
elmot	1:d0dfbce63a89	533	* @{
elmot	1:d0dfbce63a89	534	*/
elmot	1:d0dfbce63a89	535	#define ADC_EOSMP_EVENT ((uint32_t)ADC_FLAG_EOSMP) /!< ADC End of Sampling event /
elmot	1:d0dfbce63a89	536	#define ADC_AWD1_EVENT ((uint32_t)ADC_FLAG_AWD1) /!< ADC Analog watchdog 1 event (main analog watchdog) /
elmot	1:d0dfbce63a89	537	#define ADC_AWD2_EVENT ((uint32_t)ADC_FLAG_AWD2) /!< ADC Analog watchdog 2 event (additional analog watchdog) /
elmot	1:d0dfbce63a89	538	#define ADC_AWD3_EVENT ((uint32_t)ADC_FLAG_AWD3) /!< ADC Analog watchdog 3 event (additional analog watchdog) /
elmot	1:d0dfbce63a89	539	#define ADC_OVR_EVENT ((uint32_t)ADC_FLAG_OVR) /!< ADC overrun event /
elmot	1:d0dfbce63a89	540	#define ADC_JQOVF_EVENT ((uint32_t)ADC_FLAG_JQOVF) /!< ADC Injected Context Queue Overflow event /
elmot	1:d0dfbce63a89	541
elmot	1:d0dfbce63a89	542	#define ADC_AWD_EVENT ADC_AWD1_EVENT /!< ADC Analog watchdog 1 event: Naming for compatibility with other STM32 devices having only one analog watchdog /
elmot	1:d0dfbce63a89	543	/**
elmot	1:d0dfbce63a89	544	* @}
elmot	1:d0dfbce63a89	545	*/
elmot	1:d0dfbce63a89	546
elmot	1:d0dfbce63a89	547	/** @defgroup ADCEx_interrupts_definition ADC Extended Interrupts Definition
elmot	1:d0dfbce63a89	548	* @{
elmot	1:d0dfbce63a89	549	*/
elmot	1:d0dfbce63a89	550	#define ADC_IT_RDY ADC_IER_ADRDY /!< ADC Ready (ADRDY) interrupt source /
elmot	1:d0dfbce63a89	551	#define ADC_IT_EOSMP ADC_IER_EOSMP /!< ADC End of sampling interrupt source /
elmot	1:d0dfbce63a89	552	#define ADC_IT_EOC ADC_IER_EOC /!< ADC End of regular conversion interrupt source /
elmot	1:d0dfbce63a89	553	#define ADC_IT_EOS ADC_IER_EOS /!< ADC End of regular sequence of conversions interrupt source /
elmot	1:d0dfbce63a89	554	#define ADC_IT_OVR ADC_IER_OVR /!< ADC overrun interrupt source /
elmot	1:d0dfbce63a89	555	#define ADC_IT_JEOC ADC_IER_JEOC /!< ADC End of injected conversion interrupt source /
elmot	1:d0dfbce63a89	556	#define ADC_IT_JEOS ADC_IER_JEOS /!< ADC End of injected sequence of conversions interrupt source /
elmot	1:d0dfbce63a89	557	#define ADC_IT_AWD1 ADC_IER_AWD1 /!< ADC Analog watchdog 1 interrupt source (main analog watchdog) /
elmot	1:d0dfbce63a89	558	#define ADC_IT_AWD2 ADC_IER_AWD2 /!< ADC Analog watchdog 2 interrupt source (additional analog watchdog) /
elmot	1:d0dfbce63a89	559	#define ADC_IT_AWD3 ADC_IER_AWD3 /!< ADC Analog watchdog 3 interrupt source (additional analog watchdog) /
elmot	1:d0dfbce63a89	560	#define ADC_IT_JQOVF ADC_IER_JQOVF /!< ADC Injected Context Queue Overflow interrupt source /
elmot	1:d0dfbce63a89	561
elmot	1:d0dfbce63a89	562	#define ADC_IT_AWD ADC_IT_AWD1 /!< ADC Analog watchdog 1 interrupt source: naming for compatibility with other STM32 devices having only one analog watchdog /
elmot	1:d0dfbce63a89	563
elmot	1:d0dfbce63a89	564	/**
elmot	1:d0dfbce63a89	565	* @}
elmot	1:d0dfbce63a89	566	*/
elmot	1:d0dfbce63a89	567
elmot	1:d0dfbce63a89	568	/** @defgroup ADCEx_flags_definition ADC Extended Flags Definition
elmot	1:d0dfbce63a89	569	* @{
elmot	1:d0dfbce63a89	570	*/
elmot	1:d0dfbce63a89	571	#define ADC_FLAG_RDY ADC_ISR_ADRDY /!< ADC Ready (ADRDY) flag /
elmot	1:d0dfbce63a89	572	#define ADC_FLAG_EOSMP ADC_ISR_EOSMP /!< ADC End of Sampling flag /
elmot	1:d0dfbce63a89	573	#define ADC_FLAG_EOC ADC_ISR_EOC /!< ADC End of Regular Conversion flag /
elmot	1:d0dfbce63a89	574	#define ADC_FLAG_EOS ADC_ISR_EOS /!< ADC End of Regular sequence of Conversions flag /
elmot	1:d0dfbce63a89	575	#define ADC_FLAG_OVR ADC_ISR_OVR /!< ADC overrun flag /
elmot	1:d0dfbce63a89	576	#define ADC_FLAG_JEOC ADC_ISR_JEOC /!< ADC End of Injected Conversion flag /
elmot	1:d0dfbce63a89	577	#define ADC_FLAG_JEOS ADC_ISR_JEOS /!< ADC End of Injected sequence of Conversions flag /
elmot	1:d0dfbce63a89	578	#define ADC_FLAG_AWD1 ADC_ISR_AWD1 /!< ADC Analog watchdog 1 flag (main analog watchdog) /
elmot	1:d0dfbce63a89	579	#define ADC_FLAG_AWD2 ADC_ISR_AWD2 /!< ADC Analog watchdog 2 flag (additional analog watchdog) /
elmot	1:d0dfbce63a89	580	#define ADC_FLAG_AWD3 ADC_ISR_AWD3 /!< ADC Analog watchdog 3 flag (additional analog watchdog) /
elmot	1:d0dfbce63a89	581	#define ADC_FLAG_JQOVF ADC_ISR_JQOVF /!< ADC Injected Context Queue Overflow flag /
elmot	1:d0dfbce63a89	582
elmot	1:d0dfbce63a89	583	#define ADC_FLAG_AWD ADC_FLAG_AWD1 /!< ADC Analog watchdog 1 flag: Naming for compatibility with other STM32 devices having only one analog watchdog /
elmot	1:d0dfbce63a89	584
elmot	1:d0dfbce63a89	585	#define ADC_FLAG_ALL (ADC_FLAG_RDY \| ADC_FLAG_EOSMP \| ADC_FLAG_EOC \| ADC_FLAG_EOS \| \
elmot	1:d0dfbce63a89	586	ADC_FLAG_JEOC \| ADC_FLAG_JEOS \| ADC_FLAG_OVR \| ADC_FLAG_AWD1 \| \
elmot	1:d0dfbce63a89	587	ADC_FLAG_AWD2 \| ADC_FLAG_AWD3 \| ADC_FLAG_JQOVF) /!< ADC all flags /
elmot	1:d0dfbce63a89	588
elmot	1:d0dfbce63a89	589	/* Combination of all post-conversion flags bits: EOC/EOS, JEOC/JEOS, OVR, AWDx, JQOVF */
elmot	1:d0dfbce63a89	590	#define ADC_FLAG_POSTCONV_ALL (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_JEOC \| ADC_FLAG_JEOS \| \
elmot	1:d0dfbce63a89	591	ADC_FLAG_OVR \| ADC_FLAG_AWD1 \| ADC_FLAG_AWD2 \| ADC_FLAG_AWD3 \| \
elmot	1:d0dfbce63a89	592	ADC_FLAG_JQOVF) /!< ADC post-conversion all flags /
elmot	1:d0dfbce63a89	593
elmot	1:d0dfbce63a89	594	/**
elmot	1:d0dfbce63a89	595	* @}
elmot	1:d0dfbce63a89	596	*/
elmot	1:d0dfbce63a89	597
elmot	1:d0dfbce63a89	598
elmot	1:d0dfbce63a89	599	/** @defgroup ADCEx_injected_rank ADC Extended Injected Channel Rank
elmot	1:d0dfbce63a89	600	* @{
elmot	1:d0dfbce63a89	601	*/
elmot	1:d0dfbce63a89	602	#define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001) /!< ADC injected conversion rank 1 /
elmot	1:d0dfbce63a89	603	#define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002) /!< ADC injected conversion rank 2 /
elmot	1:d0dfbce63a89	604	#define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003) /!< ADC injected conversion rank 3 /
elmot	1:d0dfbce63a89	605	#define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004) /!< ADC injected conversion rank 4 /
elmot	1:d0dfbce63a89	606	/**
elmot	1:d0dfbce63a89	607	* @}
elmot	1:d0dfbce63a89	608	*/
elmot	1:d0dfbce63a89	609
elmot	1:d0dfbce63a89	610
elmot	1:d0dfbce63a89	611
elmot	1:d0dfbce63a89	612	/** @defgroup ADCEx_Oversampling_Ratio ADC Extended Oversampling Ratio
elmot	1:d0dfbce63a89	613	* @{
elmot	1:d0dfbce63a89	614	*/
elmot	1:d0dfbce63a89	615
elmot	1:d0dfbce63a89	616	#define ADC_OVERSAMPLING_RATIO_2 ((uint32_t)0x00000000) /!< ADC Oversampling ratio 2x /
elmot	1:d0dfbce63a89	617	#define ADC_OVERSAMPLING_RATIO_4 ((uint32_t)ADC_CFGR2_OVSR_0) /!< ADC Oversampling ratio 4x /
elmot	1:d0dfbce63a89	618	#define ADC_OVERSAMPLING_RATIO_8 ((uint32_t)ADC_CFGR2_OVSR_1) /!< ADC Oversampling ratio 8x /
elmot	1:d0dfbce63a89	619	#define ADC_OVERSAMPLING_RATIO_16 ((uint32_t)(ADC_CFGR2_OVSR_1 \| ADC_CFGR2_OVSR_0)) /!< ADC Oversampling ratio 16x /
elmot	1:d0dfbce63a89	620	#define ADC_OVERSAMPLING_RATIO_32 ((uint32_t)ADC_CFGR2_OVSR_2) /!< ADC Oversampling ratio 32x /
elmot	1:d0dfbce63a89	621	#define ADC_OVERSAMPLING_RATIO_64 ((uint32_t)(ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_0)) /!< ADC Oversampling ratio 64x /
elmot	1:d0dfbce63a89	622	#define ADC_OVERSAMPLING_RATIO_128 ((uint32_t)(ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_1)) /!< ADC Oversampling ratio 128x /
elmot	1:d0dfbce63a89	623	#define ADC_OVERSAMPLING_RATIO_256 ((uint32_t)(ADC_CFGR2_OVSR)) /!< ADC Oversampling ratio 256x /
elmot	1:d0dfbce63a89	624	/**
elmot	1:d0dfbce63a89	625	* @}
elmot	1:d0dfbce63a89	626	*/
elmot	1:d0dfbce63a89	627
elmot	1:d0dfbce63a89	628	/** @defgroup ADCEx_Right_Bit_Shift ADC Extended Oversampling Right Shift
elmot	1:d0dfbce63a89	629	* @{
elmot	1:d0dfbce63a89	630	*/
elmot	1:d0dfbce63a89	631	#define ADC_RIGHTBITSHIFT_NONE ((uint32_t)0x00000000) /!< ADC No bit shift for oversampling /
elmot	1:d0dfbce63a89	632	#define ADC_RIGHTBITSHIFT_1 ((uint32_t)ADC_CFGR2_OVSS_0) /!< ADC 1 bit shift for oversampling /
elmot	1:d0dfbce63a89	633	#define ADC_RIGHTBITSHIFT_2 ((uint32_t)ADC_CFGR2_OVSS_1) /!< ADC 2 bits shift for oversampling /
elmot	1:d0dfbce63a89	634	#define ADC_RIGHTBITSHIFT_3 ((uint32_t)(ADC_CFGR2_OVSS_1 \| ADC_CFGR2_OVSS_0)) /!< ADC 3 bits shift for oversampling /
elmot	1:d0dfbce63a89	635	#define ADC_RIGHTBITSHIFT_4 ((uint32_t)ADC_CFGR2_OVSS_2) /!< ADC 4 bits shift for oversampling /
elmot	1:d0dfbce63a89	636	#define ADC_RIGHTBITSHIFT_5 ((uint32_t)(ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_0)) /!< ADC 5 bits shift for oversampling /
elmot	1:d0dfbce63a89	637	#define ADC_RIGHTBITSHIFT_6 ((uint32_t)(ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_1)) /!< ADC 6 bits shift for oversampling /
elmot	1:d0dfbce63a89	638	#define ADC_RIGHTBITSHIFT_7 ((uint32_t)(ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_1 \| ADC_CFGR2_OVSS_0)) /!< ADC 7 bits shift for oversampling /
elmot	1:d0dfbce63a89	639	#define ADC_RIGHTBITSHIFT_8 ((uint32_t)ADC_CFGR2_OVSS_3) /!< ADC 8 bits shift for oversampling /
elmot	1:d0dfbce63a89	640	/**
elmot	1:d0dfbce63a89	641	* @}
elmot	1:d0dfbce63a89	642	*/
elmot	1:d0dfbce63a89	643
elmot	1:d0dfbce63a89	644	/** @defgroup ADCEx_Triggered_Oversampling_Mode ADC Extended Triggered Regular Oversampling
elmot	1:d0dfbce63a89	645	* @{
elmot	1:d0dfbce63a89	646	*/
elmot	1:d0dfbce63a89	647	#define ADC_TRIGGEREDMODE_SINGLE_TRIGGER ((uint32_t)0x00000000) /!< A single trigger for all channel oversampled conversions /
elmot	1:d0dfbce63a89	648	#define ADC_TRIGGEREDMODE_MULTI_TRIGGER ((uint32_t)ADC_CFGR2_TROVS) /!< A trigger for each oversampled conversion /
elmot	1:d0dfbce63a89	649	/**
elmot	1:d0dfbce63a89	650	* @}
elmot	1:d0dfbce63a89	651	*/
elmot	1:d0dfbce63a89	652
elmot	1:d0dfbce63a89	653	/** @defgroup ADCEx_Regular_Oversampling_Mode ADC Extended Regular Oversampling Continued or Resumed Mode
elmot	1:d0dfbce63a89	654	* @{
elmot	1:d0dfbce63a89	655	*/
elmot	1:d0dfbce63a89	656	#define ADC_REGOVERSAMPLING_CONTINUED_MODE ((uint32_t)0x00000000) /!< Oversampling buffer maintained during injection sequence /
elmot	1:d0dfbce63a89	657	#define ADC_REGOVERSAMPLING_RESUMED_MODE ((uint32_t)ADC_CFGR2_ROVSM) /!< Oversampling buffer zeroed during injection sequence /
elmot	1:d0dfbce63a89	658	/**
elmot	1:d0dfbce63a89	659	* @}
elmot	1:d0dfbce63a89	660	*/
elmot	1:d0dfbce63a89	661
elmot	1:d0dfbce63a89	662	/** @defgroup ADC_sampling_times ADC Sampling Times
elmot	1:d0dfbce63a89	663	* @{
elmot	1:d0dfbce63a89	664	*/
elmot	1:d0dfbce63a89	665	#define ADC_SAMPLETIME_2CYCLES_5 ((uint32_t)0x00000000) /!< Sampling time 2.5 ADC clock cycle /
elmot	1:d0dfbce63a89	666	#define ADC_SAMPLETIME_6CYCLES_5 ((uint32_t)ADC_SMPR2_SMP10_0) /!< Sampling time 6.5 ADC clock cycles /
elmot	1:d0dfbce63a89	667	#define ADC_SAMPLETIME_12CYCLES_5 ((uint32_t)ADC_SMPR2_SMP10_1) /!< Sampling time 12.5 ADC clock cycles /
elmot	1:d0dfbce63a89	668	#define ADC_SAMPLETIME_24CYCLES_5 ((uint32_t)(ADC_SMPR2_SMP10_1 \| ADC_SMPR2_SMP10_0)) /!< Sampling time 24.5 ADC clock cycles /
elmot	1:d0dfbce63a89	669	#define ADC_SAMPLETIME_47CYCLES_5 ((uint32_t)ADC_SMPR2_SMP10_2) /!< Sampling time 47.5 ADC clock cycles /
elmot	1:d0dfbce63a89	670	#define ADC_SAMPLETIME_92CYCLES_5 ((uint32_t)(ADC_SMPR2_SMP10_2 \| ADC_SMPR2_SMP10_0)) /!< Sampling time 92.5 ADC clock cycles /
elmot	1:d0dfbce63a89	671	#define ADC_SAMPLETIME_247CYCLES_5 ((uint32_t)(ADC_SMPR2_SMP10_2 \| ADC_SMPR2_SMP10_1)) /!< Sampling time 247.5 ADC clock cycles /
elmot	1:d0dfbce63a89	672	#define ADC_SAMPLETIME_640CYCLES_5 ((uint32_t)ADC_SMPR2_SMP10) /!< Sampling time 640.5 ADC clock cycles /
elmot	1:d0dfbce63a89	673	/**
elmot	1:d0dfbce63a89	674	* @}
elmot	1:d0dfbce63a89	675	*/
elmot	1:d0dfbce63a89	676
elmot	1:d0dfbce63a89	677	/** @defgroup ADC_CFGR_fields ADCx CFGR fields
elmot	1:d0dfbce63a89	678	* @{
elmot	1:d0dfbce63a89	679	*/
elmot	1:d0dfbce63a89	680	#define ADC_CFGR_FIELDS (ADC_CFGR_AWD1CH \| ADC_CFGR_JAUTO \| ADC_CFGR_JAWD1EN \|\
elmot	1:d0dfbce63a89	681	ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL \| ADC_CFGR_JQM \|\
elmot	1:d0dfbce63a89	682	ADC_CFGR_JDISCEN \| ADC_CFGR_DISCNUM \| ADC_CFGR_DISCEN \|\
elmot	1:d0dfbce63a89	683	ADC_CFGR_AUTDLY \| ADC_CFGR_CONT \| ADC_CFGR_OVRMOD \|\
elmot	1:d0dfbce63a89	684	ADC_CFGR_EXTEN \| ADC_CFGR_EXTSEL \| ADC_CFGR_ALIGN \|\
elmot	1:d0dfbce63a89	685	ADC_CFGR_RES \| ADC_CFGR_DMACFG \| ADC_CFGR_DMAEN )
elmot	1:d0dfbce63a89	686	/**
elmot	1:d0dfbce63a89	687	* @}
elmot	1:d0dfbce63a89	688	*/
elmot	1:d0dfbce63a89	689
elmot	1:d0dfbce63a89	690	/** @defgroup ADC_SMPR1_fields ADCx SMPR1 fields
elmot	1:d0dfbce63a89	691	* @{
elmot	1:d0dfbce63a89	692	*/
elmot	1:d0dfbce63a89	693	#define ADC_SMPR1_FIELDS (ADC_SMPR1_SMP9 \| ADC_SMPR1_SMP8 \| ADC_SMPR1_SMP7 \|\
elmot	1:d0dfbce63a89	694	ADC_SMPR1_SMP6 \| ADC_SMPR1_SMP5 \| ADC_SMPR1_SMP4 \|\
elmot	1:d0dfbce63a89	695	ADC_SMPR1_SMP3 \| ADC_SMPR1_SMP2 \| ADC_SMPR1_SMP1 \|\
elmot	1:d0dfbce63a89	696	ADC_SMPR1_SMP0)
elmot	1:d0dfbce63a89	697	/**
elmot	1:d0dfbce63a89	698	* @}
elmot	1:d0dfbce63a89	699	*/
elmot	1:d0dfbce63a89	700
elmot	1:d0dfbce63a89	701	/** @defgroup ADC_CFGR_fields_2 ADCx CFGR sub fields
elmot	1:d0dfbce63a89	702	* @{
elmot	1:d0dfbce63a89	703	*/
elmot	1:d0dfbce63a89	704	/* ADC_CFGR fields of parameters that can be updated when no conversion
elmot	1:d0dfbce63a89	705	(neither regular nor injected) is on-going */
elmot	1:d0dfbce63a89	706	#define ADC_CFGR_FIELDS_2 ((uint32_t)(ADC_CFGR_DMACFG \| ADC_CFGR_AUTDLY))
elmot	1:d0dfbce63a89	707	/**
elmot	1:d0dfbce63a89	708	* @}
elmot	1:d0dfbce63a89	709	*/
elmot	1:d0dfbce63a89	710
elmot	1:d0dfbce63a89	711	/**
elmot	1:d0dfbce63a89	712	* @}
elmot	1:d0dfbce63a89	713	*/
elmot	1:d0dfbce63a89	714
elmot	1:d0dfbce63a89	715
elmot	1:d0dfbce63a89	716
elmot	1:d0dfbce63a89	717	/* Private macros -----------------------------------------------------------*/
elmot	1:d0dfbce63a89	718
elmot	1:d0dfbce63a89	719	/** @defgroup ADCEx_Private_Macro_internal_HAL_driver ADC Extended Private Macros
elmot	1:d0dfbce63a89	720	* @{
elmot	1:d0dfbce63a89	721	*/
elmot	1:d0dfbce63a89	722
elmot	1:d0dfbce63a89	723	/**
elmot	1:d0dfbce63a89	724	* @brief Test if conversion trigger of injected group is software start
elmot	1:d0dfbce63a89	725	* or external trigger.
elmot	1:d0dfbce63a89	726	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	727	* @retval SET (software start) or RESET (external trigger).
elmot	1:d0dfbce63a89	728	*/
elmot	1:d0dfbce63a89	729	#define ADC_IS_SOFTWARE_START_INJECTED(__HANDLE__) \
elmot	1:d0dfbce63a89	730	(((__HANDLE__)->Instance->JSQR & ADC_JSQR_JEXTEN) == RESET)
elmot	1:d0dfbce63a89	731
elmot	1:d0dfbce63a89	732	/**
elmot	1:d0dfbce63a89	733	* @brief Check if conversion is on going on regular or injected groups.
elmot	1:d0dfbce63a89	734	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	735	* @retval SET (conversion is on going) or RESET (no conversion is on going).
elmot	1:d0dfbce63a89	736	*/
elmot	1:d0dfbce63a89	737	#define ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(__HANDLE__) \
elmot	1:d0dfbce63a89	738	(( (((__HANDLE__)->Instance->CR) & (ADC_CR_ADSTART \| ADC_CR_JADSTART)) == RESET \
elmot	1:d0dfbce63a89	739	) ? RESET : SET)
elmot	1:d0dfbce63a89	740
elmot	1:d0dfbce63a89	741
elmot	1:d0dfbce63a89	742	/**
elmot	1:d0dfbce63a89	743	* @brief Check if conversion is on going on injected group.
elmot	1:d0dfbce63a89	744	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	745	* @retval SET (conversion is on going) or RESET (no conversion is on going).
elmot	1:d0dfbce63a89	746	*/
elmot	1:d0dfbce63a89	747	#define ADC_IS_CONVERSION_ONGOING_INJECTED(__HANDLE__) \
elmot	1:d0dfbce63a89	748	(( (((__HANDLE__)->Instance->CR) & ADC_CR_JADSTART) == RESET \
elmot	1:d0dfbce63a89	749	) ? RESET : SET)
elmot	1:d0dfbce63a89	750
elmot	1:d0dfbce63a89	751
elmot	1:d0dfbce63a89	752
elmot	1:d0dfbce63a89	753	/**
elmot	1:d0dfbce63a89	754	* @brief Check whether or not ADC is independent.
elmot	1:d0dfbce63a89	755	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	756	* @note When multimode feature is not available, the macro always returns SET.
elmot	1:d0dfbce63a89	757	* @retval SET (ADC is independent) or RESET (ADC is not).
elmot	1:d0dfbce63a89	758	*/
elmot	1:d0dfbce63a89	759	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	760	#define ADC_IS_INDEPENDENT(__HANDLE__) \
elmot	1:d0dfbce63a89	761	( ( ( ((__HANDLE__)->Instance) == ADC3) \
elmot	1:d0dfbce63a89	762	)? \
elmot	1:d0dfbce63a89	763	SET \
elmot	1:d0dfbce63a89	764	: \
elmot	1:d0dfbce63a89	765	RESET \
elmot	1:d0dfbce63a89	766	)
elmot	1:d0dfbce63a89	767	#elif defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	768	#define ADC_IS_INDEPENDENT(__HANDLE__) (SET)
elmot	1:d0dfbce63a89	769	#endif
elmot	1:d0dfbce63a89	770
elmot	1:d0dfbce63a89	771
elmot	1:d0dfbce63a89	772	/**
elmot	1:d0dfbce63a89	773	* @brief Set the sample time for Channels numbers between 0 and 9.
elmot	1:d0dfbce63a89	774	* @param __SAMPLETIME__: Sample time parameter.
elmot	1:d0dfbce63a89	775	* @param __CHANNELNB__: Channel number.
elmot	1:d0dfbce63a89	776	* @retval None
elmot	1:d0dfbce63a89	777	*/
elmot	1:d0dfbce63a89	778	#define ADC_SMPR1(__SAMPLETIME__, __CHANNELNB__) ((__SAMPLETIME__) << (POSITION_VAL(ADC_SMPR1_SMP1) * (__CHANNELNB__)))
elmot	1:d0dfbce63a89	779
elmot	1:d0dfbce63a89	780	/**
elmot	1:d0dfbce63a89	781	* @brief Set the sample time for Channels numbers between 10 and 18.
elmot	1:d0dfbce63a89	782	* @param __SAMPLETIME__: Sample time parameter.
elmot	1:d0dfbce63a89	783	* @param __CHANNELNB__: Channel number.
elmot	1:d0dfbce63a89	784	* @retval None
elmot	1:d0dfbce63a89	785	*/
elmot	1:d0dfbce63a89	786	#define ADC_SMPR2(__SAMPLETIME__, __CHANNELNB__) ((__SAMPLETIME__) << ((POSITION_VAL(ADC_SMPR2_SMP11) * ((__CHANNELNB__) - 10))))
elmot	1:d0dfbce63a89	787
elmot	1:d0dfbce63a89	788	/**
elmot	1:d0dfbce63a89	789	* @brief Write SMPR1 register.
elmot	1:d0dfbce63a89	790	* @param __HANDLE__ : ADC handle.
elmot	1:d0dfbce63a89	791	* @param __SAMPLETIME__: Sample time parameter.
elmot	1:d0dfbce63a89	792	* @param __CHANNELNB__ : Channel number.
elmot	1:d0dfbce63a89	793	* @retval None
elmot	1:d0dfbce63a89	794	*/
elmot	1:d0dfbce63a89	795	#define ADC_SMPR1_SETTING(__HANDLE__, __SAMPLETIME__, __CHANNELNB__) \
elmot	1:d0dfbce63a89	796	MODIFY_REG((__HANDLE__)->Instance->SMPR1, \
elmot	1:d0dfbce63a89	797	ADC_SMPR1(ADC_SMPR1_SMP0, (__CHANNELNB__)), \
elmot	1:d0dfbce63a89	798	ADC_SMPR1((__SAMPLETIME__), (__CHANNELNB__)))
elmot	1:d0dfbce63a89	799
elmot	1:d0dfbce63a89	800	/**
elmot	1:d0dfbce63a89	801	* @brief Write SMPR2 register.
elmot	1:d0dfbce63a89	802	* @param __HANDLE__ : ADC handle.
elmot	1:d0dfbce63a89	803	* @param __SAMPLETIME__: Sample time parameter.
elmot	1:d0dfbce63a89	804	* @param __CHANNELNB__ : Channel number.
elmot	1:d0dfbce63a89	805	* @retval None
elmot	1:d0dfbce63a89	806	*/
elmot	1:d0dfbce63a89	807	#define ADC_SMPR2_SETTING(__HANDLE__, __SAMPLETIME__, __CHANNELNB__) \
elmot	1:d0dfbce63a89	808	MODIFY_REG((__HANDLE__)->Instance->SMPR2, \
elmot	1:d0dfbce63a89	809	ADC_SMPR2(ADC_SMPR2_SMP10, (__CHANNELNB__)), \
elmot	1:d0dfbce63a89	810	ADC_SMPR2((__SAMPLETIME__), (__CHANNELNB__)))
elmot	1:d0dfbce63a89	811
elmot	1:d0dfbce63a89	812
elmot	1:d0dfbce63a89	813	/**
elmot	1:d0dfbce63a89	814	* @brief Set the selected regular Channel rank for rank between 1 and 4.
elmot	1:d0dfbce63a89	815	* @param __CHANNELNB__: Channel number.
elmot	1:d0dfbce63a89	816	* @param __RANKNB__: Rank number.
elmot	1:d0dfbce63a89	817	* @retval None
elmot	1:d0dfbce63a89	818	*/
elmot	1:d0dfbce63a89	819	#define ADC_SQR1_RK(__CHANNELNB__, __RANKNB__) ((__CHANNELNB__) << (POSITION_VAL(ADC_SQR1_SQ1) * (__RANKNB__)))
elmot	1:d0dfbce63a89	820
elmot	1:d0dfbce63a89	821	/**
elmot	1:d0dfbce63a89	822	* @brief Set the selected regular Channel rank for rank between 5 and 9.
elmot	1:d0dfbce63a89	823	* @param __CHANNELNB__: Channel number.
elmot	1:d0dfbce63a89	824	* @param __RANKNB__: Rank number.
elmot	1:d0dfbce63a89	825	* @retval None
elmot	1:d0dfbce63a89	826	*/
elmot	1:d0dfbce63a89	827	#define ADC_SQR2_RK(__CHANNELNB__, __RANKNB__) ((__CHANNELNB__) << (POSITION_VAL(ADC_SQR2_SQ6) * ((__RANKNB__) - 5)))
elmot	1:d0dfbce63a89	828
elmot	1:d0dfbce63a89	829	/**
elmot	1:d0dfbce63a89	830	* @brief Set the selected regular Channel rank for rank between 10 and 14.
elmot	1:d0dfbce63a89	831	* @param __CHANNELNB__: Channel number.
elmot	1:d0dfbce63a89	832	* @param __RANKNB__: Rank number.
elmot	1:d0dfbce63a89	833	* @retval None
elmot	1:d0dfbce63a89	834	*/
elmot	1:d0dfbce63a89	835	#define ADC_SQR3_RK(__CHANNELNB__, __RANKNB__) ((__CHANNELNB__) << (POSITION_VAL(ADC_SQR3_SQ11) * ((__RANKNB__) - 10)))
elmot	1:d0dfbce63a89	836
elmot	1:d0dfbce63a89	837	/**
elmot	1:d0dfbce63a89	838	* @brief Set the selected regular Channel rank for rank between 15 and 16.
elmot	1:d0dfbce63a89	839	* @param __CHANNELNB__: Channel number.
elmot	1:d0dfbce63a89	840	* @param __RANKNB__: Rank number.
elmot	1:d0dfbce63a89	841	* @retval None
elmot	1:d0dfbce63a89	842	*/
elmot	1:d0dfbce63a89	843	#define ADC_SQR4_RK(__CHANNELNB__, __RANKNB__) ((__CHANNELNB__) << (POSITION_VAL(ADC_SQR4_SQ16) * ((__RANKNB__) - 15)))
elmot	1:d0dfbce63a89	844
elmot	1:d0dfbce63a89	845	/**
elmot	1:d0dfbce63a89	846	* @brief Set the selected injected Channel rank.
elmot	1:d0dfbce63a89	847	* @param __CHANNELNB__: Channel number.
elmot	1:d0dfbce63a89	848	* @param __RANKNB__: Rank number.
elmot	1:d0dfbce63a89	849	* @retval None
elmot	1:d0dfbce63a89	850	*/
elmot	1:d0dfbce63a89	851	#define ADC_JSQR_RK(__CHANNELNB__, __RANKNB__) ((__CHANNELNB__) << ((POSITION_VAL(ADC_JSQR_JSQ1)-2) * (__RANKNB__) +2))
elmot	1:d0dfbce63a89	852
elmot	1:d0dfbce63a89	853
elmot	1:d0dfbce63a89	854	/**
elmot	1:d0dfbce63a89	855	* @brief Set the Analog Watchdog 1 channel.
elmot	1:d0dfbce63a89	856	* @param __CHANNEL__: channel to be monitored by Analog Watchdog 1.
elmot	1:d0dfbce63a89	857	* @retval None
elmot	1:d0dfbce63a89	858	*/
elmot	1:d0dfbce63a89	859	#define ADC_CFGR_SET_AWD1CH(__CHANNEL__) ((__CHANNEL__) << POSITION_VAL(ADC_CFGR_AWD1CH))
elmot	1:d0dfbce63a89	860
elmot	1:d0dfbce63a89	861	/**
elmot	1:d0dfbce63a89	862	* @brief Configure the channel number in Analog Watchdog 2 or 3.
elmot	1:d0dfbce63a89	863	* @param __CHANNEL__: ADC Channel
elmot	1:d0dfbce63a89	864	* @retval None
elmot	1:d0dfbce63a89	865	*/
elmot	1:d0dfbce63a89	866	#define ADC_CFGR_SET_AWD23CR(__CHANNEL__) (1U << (__CHANNEL__))
elmot	1:d0dfbce63a89	867
elmot	1:d0dfbce63a89	868	/**
elmot	1:d0dfbce63a89	869	* @brief Configure ADC injected context queue
elmot	1:d0dfbce63a89	870	* @param __INJECT_CONTEXT_QUEUE_MODE__: Injected context queue mode.
elmot	1:d0dfbce63a89	871	* @retval None
elmot	1:d0dfbce63a89	872	*/
elmot	1:d0dfbce63a89	873	#define ADC_CFGR_INJECT_CONTEXT_QUEUE(__INJECT_CONTEXT_QUEUE_MODE__) ((__INJECT_CONTEXT_QUEUE_MODE__) << POSITION_VAL(ADC_CFGR_JQM))
elmot	1:d0dfbce63a89	874
elmot	1:d0dfbce63a89	875	/**
elmot	1:d0dfbce63a89	876	* @brief Configure ADC discontinuous conversion mode for injected group
elmot	1:d0dfbce63a89	877	* @param __INJECT_DISCONTINUOUS_MODE__: Injected discontinuous mode.
elmot	1:d0dfbce63a89	878	* @retval None
elmot	1:d0dfbce63a89	879	*/
elmot	1:d0dfbce63a89	880	#define ADC_CFGR_INJECT_DISCCONTINUOUS(__INJECT_DISCONTINUOUS_MODE__) ((__INJECT_DISCONTINUOUS_MODE__) << POSITION_VAL(ADC_CFGR_JDISCEN))
elmot	1:d0dfbce63a89	881
elmot	1:d0dfbce63a89	882	/**
elmot	1:d0dfbce63a89	883	* @brief Configure ADC discontinuous conversion mode for regular group
elmot	1:d0dfbce63a89	884	* @param __REG_DISCONTINUOUS_MODE__: Regular discontinuous mode.
elmot	1:d0dfbce63a89	885	* @retval None
elmot	1:d0dfbce63a89	886	*/
elmot	1:d0dfbce63a89	887	#define ADC_CFGR_REG_DISCONTINUOUS(__REG_DISCONTINUOUS_MODE__) ((__REG_DISCONTINUOUS_MODE__) << POSITION_VAL(ADC_CFGR_DISCEN))
elmot	1:d0dfbce63a89	888	/**
elmot	1:d0dfbce63a89	889	* @brief Configure the number of discontinuous conversions for regular group.
elmot	1:d0dfbce63a89	890	* @param __NBR_DISCONTINUOUS_CONV__: Number of discontinuous conversions.
elmot	1:d0dfbce63a89	891	* @retval None
elmot	1:d0dfbce63a89	892	*/
elmot	1:d0dfbce63a89	893	#define ADC_CFGR_DISCONTINUOUS_NUM(__NBR_DISCONTINUOUS_CONV__) (((__NBR_DISCONTINUOUS_CONV__) - 1) << POSITION_VAL(ADC_CFGR_DISCNUM))
elmot	1:d0dfbce63a89	894
elmot	1:d0dfbce63a89	895	/**
elmot	1:d0dfbce63a89	896	* @brief Configure the ADC auto delay mode.
elmot	1:d0dfbce63a89	897	* @param __AUTOWAIT__: Auto delay bit enable or disable.
elmot	1:d0dfbce63a89	898	* @retval None
elmot	1:d0dfbce63a89	899	*/
elmot	1:d0dfbce63a89	900	#define ADC_CFGR_AUTOWAIT(__AUTOWAIT__) ((__AUTOWAIT__) << POSITION_VAL(ADC_CFGR_AUTDLY))
elmot	1:d0dfbce63a89	901
elmot	1:d0dfbce63a89	902	/**
elmot	1:d0dfbce63a89	903	* @brief Configure ADC continuous conversion mode.
elmot	1:d0dfbce63a89	904	* @param __CONTINUOUS_MODE__: Continuous mode.
elmot	1:d0dfbce63a89	905	* @retval None
elmot	1:d0dfbce63a89	906	*/
elmot	1:d0dfbce63a89	907	#define ADC_CFGR_CONTINUOUS(__CONTINUOUS_MODE__) ((__CONTINUOUS_MODE__) << POSITION_VAL(ADC_CFGR_CONT))
elmot	1:d0dfbce63a89	908
elmot	1:d0dfbce63a89	909	/**
elmot	1:d0dfbce63a89	910	* @brief Configure the ADC DMA continuous request.
elmot	1:d0dfbce63a89	911	* @param __DMACONTREQ_MODE__: DMA continuous request mode.
elmot	1:d0dfbce63a89	912	* @retval None
elmot	1:d0dfbce63a89	913	*/
elmot	1:d0dfbce63a89	914	#define ADC_CFGR_DMACONTREQ(__DMACONTREQ_MODE__) ((__DMACONTREQ_MODE__) << POSITION_VAL(ADC_CFGR_DMACFG))
elmot	1:d0dfbce63a89	915
elmot	1:d0dfbce63a89	916
elmot	1:d0dfbce63a89	917	/**
elmot	1:d0dfbce63a89	918	* @brief Configure the channel number into offset OFRx register.
elmot	1:d0dfbce63a89	919	* @param __CHANNEL__: ADC Channel.
elmot	1:d0dfbce63a89	920	* @retval None
elmot	1:d0dfbce63a89	921	*/
elmot	1:d0dfbce63a89	922	#define ADC_OFR_CHANNEL(__CHANNEL__) ((__CHANNEL__) << POSITION_VAL(ADC_OFR1_OFFSET1_CH))
elmot	1:d0dfbce63a89	923
elmot	1:d0dfbce63a89	924	/**
elmot	1:d0dfbce63a89	925	* @brief Configure the channel number into differential mode selection register.
elmot	1:d0dfbce63a89	926	* @param __CHANNEL__: ADC Channel.
elmot	1:d0dfbce63a89	927	* @retval None
elmot	1:d0dfbce63a89	928	*/
elmot	1:d0dfbce63a89	929	#define ADC_DIFSEL_CHANNEL(__CHANNEL__) (1U << (__CHANNEL__))
elmot	1:d0dfbce63a89	930
elmot	1:d0dfbce63a89	931	/**
elmot	1:d0dfbce63a89	932	* @brief Configure calibration factor in differential mode to be set into calibration register.
elmot	1:d0dfbce63a89	933	* @param __CALIBRATION_FACTOR__: Calibration factor value.
elmot	1:d0dfbce63a89	934	* @retval None
elmot	1:d0dfbce63a89	935	*/
elmot	1:d0dfbce63a89	936	#define ADC_CALFACT_DIFF_SET(__CALIBRATION_FACTOR__) (((__CALIBRATION_FACTOR__) & (ADC_CALFACT_CALFACT_D >> POSITION_VAL(ADC_CALFACT_CALFACT_D)) ) << POSITION_VAL(ADC_CALFACT_CALFACT_D))
elmot	1:d0dfbce63a89	937	/**
elmot	1:d0dfbce63a89	938	* @brief Calibration factor in differential mode to be retrieved from calibration register.
elmot	1:d0dfbce63a89	939	* @param __CALIBRATION_FACTOR__: Calibration factor value.
elmot	1:d0dfbce63a89	940	* @retval None
elmot	1:d0dfbce63a89	941	*/
elmot	1:d0dfbce63a89	942	#define ADC_CALFACT_DIFF_GET(__CALIBRATION_FACTOR__) ((__CALIBRATION_FACTOR__) >> POSITION_VAL(ADC_CALFACT_CALFACT_D))
elmot	1:d0dfbce63a89	943
elmot	1:d0dfbce63a89	944	/**
elmot	1:d0dfbce63a89	945	* @brief Configure the analog watchdog high threshold into registers TR1, TR2 or TR3.
elmot	1:d0dfbce63a89	946	* @param __THRESHOLD__: Threshold value.
elmot	1:d0dfbce63a89	947	* @retval None
elmot	1:d0dfbce63a89	948	*/
elmot	1:d0dfbce63a89	949	#define ADC_TRX_HIGHTHRESHOLD(__THRESHOLD__) ((__THRESHOLD__) << 16)
elmot	1:d0dfbce63a89	950
elmot	1:d0dfbce63a89	951	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	952	/**
elmot	1:d0dfbce63a89	953	* @brief Configure the ADC DMA continuous request for ADC multimode.
elmot	1:d0dfbce63a89	954	* @param __DMACONTREQ_MODE__: DMA continuous request mode.
elmot	1:d0dfbce63a89	955	* @retval None
elmot	1:d0dfbce63a89	956	*/
elmot	1:d0dfbce63a89	957	#define ADC_CCR_MULTI_DMACONTREQ(__DMACONTREQ_MODE__) ((__DMACONTREQ_MODE__) << POSITION_VAL(ADC_CCR_DMACFG))
elmot	1:d0dfbce63a89	958	#endif /* defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) */
elmot	1:d0dfbce63a89	959
elmot	1:d0dfbce63a89	960	/**
elmot	1:d0dfbce63a89	961	* @brief Enable the ADC peripheral.
elmot	1:d0dfbce63a89	962	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	963	* @retval None
elmot	1:d0dfbce63a89	964	*/
elmot	1:d0dfbce63a89	965	#define ADC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR \|= ADC_CR_ADEN)
elmot	1:d0dfbce63a89	966
elmot	1:d0dfbce63a89	967	/**
elmot	1:d0dfbce63a89	968	* @brief Verification of hardware constraints before ADC can be enabled.
elmot	1:d0dfbce63a89	969	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	970	* @retval SET (ADC can be enabled) or RESET (ADC cannot be enabled)
elmot	1:d0dfbce63a89	971	*/
elmot	1:d0dfbce63a89	972	#define ADC_ENABLING_CONDITIONS(__HANDLE__) \
elmot	1:d0dfbce63a89	973	(( ( ((__HANDLE__)->Instance->CR) & \
elmot	1:d0dfbce63a89	974	(ADC_CR_ADCAL \| ADC_CR_JADSTP \| ADC_CR_ADSTP \| ADC_CR_JADSTART \| \
elmot	1:d0dfbce63a89	975	ADC_CR_ADSTART \| ADC_CR_ADDIS \| ADC_CR_ADEN ) \
elmot	1:d0dfbce63a89	976	) == RESET \
elmot	1:d0dfbce63a89	977	) ? SET : RESET)
elmot	1:d0dfbce63a89	978
elmot	1:d0dfbce63a89	979	/**
elmot	1:d0dfbce63a89	980	* @brief Disable the ADC peripheral.
elmot	1:d0dfbce63a89	981	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	982	* @retval None
elmot	1:d0dfbce63a89	983	*/
elmot	1:d0dfbce63a89	984	#define ADC_DISABLE(__HANDLE__) \
elmot	1:d0dfbce63a89	985	do{ \
elmot	1:d0dfbce63a89	986	(__HANDLE__)->Instance->CR \|= ADC_CR_ADDIS; \
elmot	1:d0dfbce63a89	987	__HAL_ADC_CLEAR_FLAG((__HANDLE__), (ADC_FLAG_EOSMP \| ADC_FLAG_RDY)); \
elmot	1:d0dfbce63a89	988	} while(0)
elmot	1:d0dfbce63a89	989
elmot	1:d0dfbce63a89	990	/**
elmot	1:d0dfbce63a89	991	* @brief Verification of hardware constraints before ADC can be disabled.
elmot	1:d0dfbce63a89	992	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	993	* @retval SET (ADC can be disabled) or RESET (ADC cannot be disabled)
elmot	1:d0dfbce63a89	994	*/
elmot	1:d0dfbce63a89	995	#define ADC_DISABLING_CONDITIONS(__HANDLE__) \
elmot	1:d0dfbce63a89	996	(( ( ((__HANDLE__)->Instance->CR) & \
elmot	1:d0dfbce63a89	997	(ADC_CR_JADSTART \| ADC_CR_ADSTART \| ADC_CR_ADEN)) == ADC_CR_ADEN \
elmot	1:d0dfbce63a89	998	) ? SET : RESET)
elmot	1:d0dfbce63a89	999
elmot	1:d0dfbce63a89	1000
elmot	1:d0dfbce63a89	1001	/**
elmot	1:d0dfbce63a89	1002	* @brief Shift the offset with respect to the selected ADC resolution.
elmot	1:d0dfbce63a89	1003	* @note Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0.
elmot	1:d0dfbce63a89	1004	* If resolution 12 bits, no shift.
elmot	1:d0dfbce63a89	1005	* If resolution 10 bits, shift of 2 ranks on the left.
elmot	1:d0dfbce63a89	1006	* If resolution 8 bits, shift of 4 ranks on the left.
elmot	1:d0dfbce63a89	1007	* If resolution 6 bits, shift of 6 ranks on the left.
elmot	1:d0dfbce63a89	1008	* Therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2)).
elmot	1:d0dfbce63a89	1009	* @param __HANDLE__: ADC handle
elmot	1:d0dfbce63a89	1010	* @param __OFFSET__: Value to be shifted
elmot	1:d0dfbce63a89	1011	* @retval None
elmot	1:d0dfbce63a89	1012	*/
elmot	1:d0dfbce63a89	1013	#define ADC_OFFSET_SHIFT_RESOLUTION(__HANDLE__, __OFFSET__) \
elmot	1:d0dfbce63a89	1014	((__OFFSET__) << ((((__HANDLE__)->Instance->CFGR & ADC_CFGR_RES) >> 3)*2))
elmot	1:d0dfbce63a89	1015
elmot	1:d0dfbce63a89	1016
elmot	1:d0dfbce63a89	1017	/**
elmot	1:d0dfbce63a89	1018	* @brief Shift the AWD1 threshold with respect to the selected ADC resolution.
elmot	1:d0dfbce63a89	1019	* @note Thresholds have to be left-aligned on bit 11, the LSB (right bits) are set to 0.
elmot	1:d0dfbce63a89	1020	* If resolution 12 bits, no shift.
elmot	1:d0dfbce63a89	1021	* If resolution 10 bits, shift of 2 ranks on the left.
elmot	1:d0dfbce63a89	1022	* If resolution 8 bits, shift of 4 ranks on the left.
elmot	1:d0dfbce63a89	1023	* If resolution 6 bits, shift of 6 ranks on the left.
elmot	1:d0dfbce63a89	1024	* Therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2)).
elmot	1:d0dfbce63a89	1025	* @param __HANDLE__: ADC handle
elmot	1:d0dfbce63a89	1026	* @param __THRESHOLD__: Value to be shifted
elmot	1:d0dfbce63a89	1027	* @retval None
elmot	1:d0dfbce63a89	1028	*/
elmot	1:d0dfbce63a89	1029	#define ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, __THRESHOLD__) \
elmot	1:d0dfbce63a89	1030	((__THRESHOLD__) << ((((__HANDLE__)->Instance->CFGR & ADC_CFGR_RES) >> 3)*2))
elmot	1:d0dfbce63a89	1031
elmot	1:d0dfbce63a89	1032	/**
elmot	1:d0dfbce63a89	1033	* @brief Shift the AWD2 and AWD3 threshold with respect to the selected ADC resolution.
elmot	1:d0dfbce63a89	1034	* @note Thresholds have to be left-aligned on bit 7.
elmot	1:d0dfbce63a89	1035	* If resolution 12 bits, shift of 4 ranks on the right (the 4 LSB are discarded).
elmot	1:d0dfbce63a89	1036	* If resolution 10 bits, shift of 2 ranks on the right (the 2 LSB are discarded).
elmot	1:d0dfbce63a89	1037	* If resolution 8 bits, no shift.
elmot	1:d0dfbce63a89	1038	* If resolution 6 bits, shift of 2 ranks on the left (the 2 LSB are set to 0).
elmot	1:d0dfbce63a89	1039	* @param __HANDLE__: ADC handle
elmot	1:d0dfbce63a89	1040	* @param __THRESHOLD__: Value to be shifted
elmot	1:d0dfbce63a89	1041	* @retval None
elmot	1:d0dfbce63a89	1042	*/
elmot	1:d0dfbce63a89	1043	#define ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, __THRESHOLD__) \
elmot	1:d0dfbce63a89	1044	( ((__HANDLE__)->Instance->CFGR & ADC_CFGR_RES) != (ADC_CFGR_RES_1 \| ADC_CFGR_RES_0) ? \
elmot	1:d0dfbce63a89	1045	((__THRESHOLD__) >> (4- ((((__HANDLE__)->Instance->CFGR & ADC_CFGR_RES) >> 3)*2))) : \
elmot	1:d0dfbce63a89	1046	(__THRESHOLD__) << 2 )
elmot	1:d0dfbce63a89	1047
elmot	1:d0dfbce63a89	1048
elmot	1:d0dfbce63a89	1049	/**
elmot	1:d0dfbce63a89	1050	* @brief Report ADC common register.
elmot	1:d0dfbce63a89	1051	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1052	* @retval Common control register
elmot	1:d0dfbce63a89	1053	*/
elmot	1:d0dfbce63a89	1054	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1055	#define ADC_COMMON_REGISTER(__HANDLE__) (ADC123_COMMON)
elmot	1:d0dfbce63a89	1056	#elif defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	1057	#define ADC_COMMON_REGISTER(__HANDLE__) (ADC1_COMMON)
elmot	1:d0dfbce63a89	1058	#endif
elmot	1:d0dfbce63a89	1059
elmot	1:d0dfbce63a89	1060	/**
elmot	1:d0dfbce63a89	1061	* @brief Report Master Instance.
elmot	1:d0dfbce63a89	1062	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1063	* @note Return same instance if ADC of input handle is independent ADC or if
elmot	1:d0dfbce63a89	1064	* multimode feature is not available.
elmot	1:d0dfbce63a89	1065	* @retval Master Instance
elmot	1:d0dfbce63a89	1066	*/
elmot	1:d0dfbce63a89	1067	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1068	#define ADC_MASTER_REGISTER(__HANDLE__) \
elmot	1:d0dfbce63a89	1069	( ( ((((__HANDLE__)->Instance) == ADC1) \|\| (((__HANDLE__)->Instance) == ADC3)) \
elmot	1:d0dfbce63a89	1070	)? \
elmot	1:d0dfbce63a89	1071	((__HANDLE__)->Instance) \
elmot	1:d0dfbce63a89	1072	: \
elmot	1:d0dfbce63a89	1073	(ADC1) \
elmot	1:d0dfbce63a89	1074	)
elmot	1:d0dfbce63a89	1075	#elif defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	1076	#define ADC_MASTER_REGISTER(__HANDLE__) ((__HANDLE__)->Instance)
elmot	1:d0dfbce63a89	1077	#endif
elmot	1:d0dfbce63a89	1078
elmot	1:d0dfbce63a89	1079
elmot	1:d0dfbce63a89	1080	/**
elmot	1:d0dfbce63a89	1081	* @brief Clear Common Control Register.
elmot	1:d0dfbce63a89	1082	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1083	* @retval None
elmot	1:d0dfbce63a89	1084	*/
elmot	1:d0dfbce63a89	1085	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1086	#define ADC_CLEAR_COMMON_CONTROL_REGISTER(__HANDLE__) CLEAR_BIT(ADC_COMMON_REGISTER(__HANDLE__)->CCR, ADC_CCR_CKMODE \| \
elmot	1:d0dfbce63a89	1087	ADC_CCR_PRESC \| \
elmot	1:d0dfbce63a89	1088	ADC_CCR_VBATEN \| \
elmot	1:d0dfbce63a89	1089	ADC_CCR_TSEN \| \
elmot	1:d0dfbce63a89	1090	ADC_CCR_VREFEN \| \
elmot	1:d0dfbce63a89	1091	ADC_CCR_MDMA \| \
elmot	1:d0dfbce63a89	1092	ADC_CCR_DMACFG \| \
elmot	1:d0dfbce63a89	1093	ADC_CCR_DELAY \| \
elmot	1:d0dfbce63a89	1094	ADC_CCR_DUAL )
elmot	1:d0dfbce63a89	1095	#elif defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	1096	#define ADC_CLEAR_COMMON_CONTROL_REGISTER(__HANDLE__) CLEAR_BIT(ADC_COMMON_REGISTER(__HANDLE__)->CCR, ADC_CCR_CKMODE \| \
elmot	1:d0dfbce63a89	1097	ADC_CCR_PRESC \| \
elmot	1:d0dfbce63a89	1098	ADC_CCR_VBATEN \| \
elmot	1:d0dfbce63a89	1099	ADC_CCR_TSEN \| \
elmot	1:d0dfbce63a89	1100	ADC_CCR_VREFEN )
elmot	1:d0dfbce63a89	1101	#endif
elmot	1:d0dfbce63a89	1102
elmot	1:d0dfbce63a89	1103
elmot	1:d0dfbce63a89	1104	/**
elmot	1:d0dfbce63a89	1105	* @brief Check whether or not dual conversions are enabled.
elmot	1:d0dfbce63a89	1106	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1107	* @note Return RESET if ADC of input handle is independent ADC or if multimode feature is not available.
elmot	1:d0dfbce63a89	1108	* @retval SET (dual regular conversions are enabled) or RESET (ADC is independent or no dual regular conversions are enabled)
elmot	1:d0dfbce63a89	1109	*/
elmot	1:d0dfbce63a89	1110	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1111	#define ADC_IS_DUAL_CONVERSION_ENABLE(__HANDLE__) \
elmot	1:d0dfbce63a89	1112	( ( ((((__HANDLE__)->Instance) == ADC1) \|\| (((__HANDLE__)->Instance) == ADC2)) \
elmot	1:d0dfbce63a89	1113	)? \
elmot	1:d0dfbce63a89	1114	( ((ADC123_COMMON->CCR & ADC_CCR_DUAL) != ADC_MODE_INDEPENDENT) ) \
elmot	1:d0dfbce63a89	1115	: \
elmot	1:d0dfbce63a89	1116	RESET \
elmot	1:d0dfbce63a89	1117	)
elmot	1:d0dfbce63a89	1118	#elif defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	1119	#define ADC_IS_DUAL_CONVERSION_ENABLE(__HANDLE__) (RESET)
elmot	1:d0dfbce63a89	1120	#endif
elmot	1:d0dfbce63a89	1121
elmot	1:d0dfbce63a89	1122	/**
elmot	1:d0dfbce63a89	1123	* @brief Check whether or not dual regular conversions are enabled.
elmot	1:d0dfbce63a89	1124	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1125	* @note Return RESET if ADC of input handle is independent ADC or if multimode feature is not available.
elmot	1:d0dfbce63a89	1126	* @retval SET (dual regular conversions are enabled) or RESET (ADC is independent or no dual regular conversions are enabled)
elmot	1:d0dfbce63a89	1127	*/
elmot	1:d0dfbce63a89	1128	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1129	#define ADC_IS_DUAL_REGULAR_CONVERSION_ENABLE(__HANDLE__) \
elmot	1:d0dfbce63a89	1130	( ( ((((__HANDLE__)->Instance) == ADC1) \|\| (((__HANDLE__)->Instance) == ADC2)) \
elmot	1:d0dfbce63a89	1131	)? \
elmot	1:d0dfbce63a89	1132	( (((ADC_COMMON_REGISTER(__HANDLE__))->CCR & ADC_CCR_DUAL) != ADC_MODE_INDEPENDENT) && \
elmot	1:d0dfbce63a89	1133	(((ADC_COMMON_REGISTER(__HANDLE__))->CCR & ADC_CCR_DUAL) != ADC_DUALMODE_INJECSIMULT) && \
elmot	1:d0dfbce63a89	1134	(((ADC_COMMON_REGISTER(__HANDLE__))->CCR & ADC_CCR_DUAL) != ADC_DUALMODE_ALTERTRIG) ) \
elmot	1:d0dfbce63a89	1135	: \
elmot	1:d0dfbce63a89	1136	RESET \
elmot	1:d0dfbce63a89	1137	)
elmot	1:d0dfbce63a89	1138	#elif defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	1139	#define ADC_IS_DUAL_REGULAR_CONVERSION_ENABLE(__HANDLE__) (RESET)
elmot	1:d0dfbce63a89	1140	#endif
elmot	1:d0dfbce63a89	1141
elmot	1:d0dfbce63a89	1142
elmot	1:d0dfbce63a89	1143	/**
elmot	1:d0dfbce63a89	1144	* @brief Verification of condition for ADC start conversion: ADC must be in non-multimode or multimode with handle of ADC master.
elmot	1:d0dfbce63a89	1145	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1146	* @note Return SET if multimode feature is not available.
elmot	1:d0dfbce63a89	1147	* @retval SET (non-multimode or Master handle) or RESET (handle of Slave ADC in multimode)
elmot	1:d0dfbce63a89	1148	*/
elmot	1:d0dfbce63a89	1149	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1150	#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \
elmot	1:d0dfbce63a89	1151	( ( ((__HANDLE__)->Instance == ADC1) \|\| ((__HANDLE__)->Instance == ADC3) \
elmot	1:d0dfbce63a89	1152	)? \
elmot	1:d0dfbce63a89	1153	SET \
elmot	1:d0dfbce63a89	1154	: \
elmot	1:d0dfbce63a89	1155	((ADC123_COMMON->CCR & ADC_CCR_DUAL) == RESET) \
elmot	1:d0dfbce63a89	1156	)
elmot	1:d0dfbce63a89	1157	#elif defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	1158	#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) (SET)
elmot	1:d0dfbce63a89	1159	#endif
elmot	1:d0dfbce63a89	1160
elmot	1:d0dfbce63a89	1161	/**
elmot	1:d0dfbce63a89	1162	* @brief Ensure ADC Instance is Independent or Master, or is not Slave ADC with dual regular conversions enabled.
elmot	1:d0dfbce63a89	1163	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1164	* @note Return SET if multimode feature is not available.
elmot	1:d0dfbce63a89	1165	* @retval SET (Independent or Master, or Slave without dual regular conversions enabled) or RESET (Slave ADC with dual regular conversions enabled)
elmot	1:d0dfbce63a89	1166	*/
elmot	1:d0dfbce63a89	1167	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1168	#define ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(__HANDLE__) \
elmot	1:d0dfbce63a89	1169	( ( ((__HANDLE__)->Instance == ADC1) \|\| ((__HANDLE__)->Instance == ADC3) \
elmot	1:d0dfbce63a89	1170	)? \
elmot	1:d0dfbce63a89	1171	SET \
elmot	1:d0dfbce63a89	1172	: \
elmot	1:d0dfbce63a89	1173	( ((ADC123_COMMON->CCR & ADC_CCR_DUAL) == ADC_MODE_INDEPENDENT) \|\| \
elmot	1:d0dfbce63a89	1174	((ADC123_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_INJECSIMULT) \|\| \
elmot	1:d0dfbce63a89	1175	((ADC123_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_ALTERTRIG) ))
elmot	1:d0dfbce63a89	1176	#elif defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	1177	#define ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(__HANDLE__) (SET)
elmot	1:d0dfbce63a89	1178	#endif
elmot	1:d0dfbce63a89	1179
elmot	1:d0dfbce63a89	1180	/**
elmot	1:d0dfbce63a89	1181	* @brief Ensure ADC Instance is Independent or Master, or is not Slave ADC with dual injected conversions enabled.
elmot	1:d0dfbce63a89	1182	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1183	* @note Return SET if multimode feature is not available.
elmot	1:d0dfbce63a89	1184	* @retval SET (non-multimode or Master, or Slave without dual injected conversions enabled) or RESET (Slave ADC with dual injected conversions enabled)
elmot	1:d0dfbce63a89	1185	*/
elmot	1:d0dfbce63a89	1186	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1187	#define ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(__HANDLE__) \
elmot	1:d0dfbce63a89	1188	( ( ((__HANDLE__)->Instance == ADC1) \|\| ((__HANDLE__)->Instance == ADC3) \
elmot	1:d0dfbce63a89	1189	)? \
elmot	1:d0dfbce63a89	1190	SET \
elmot	1:d0dfbce63a89	1191	: \
elmot	1:d0dfbce63a89	1192	( ((ADC123_COMMON->CCR & ADC_CCR_DUAL) == ADC_MODE_INDEPENDENT) \|\| \
elmot	1:d0dfbce63a89	1193	((ADC123_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_REGSIMULT) \|\| \
elmot	1:d0dfbce63a89	1194	((ADC123_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_INTERL) ))
elmot	1:d0dfbce63a89	1195	#elif defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	1196	#define ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(__HANDLE__) (SET)
elmot	1:d0dfbce63a89	1197	#endif
elmot	1:d0dfbce63a89	1198
elmot	1:d0dfbce63a89	1199	/**
elmot	1:d0dfbce63a89	1200	* @brief Verification of ADC state: enabled or disabled, directly checked on instance as input parameter.
elmot	1:d0dfbce63a89	1201	* @param __INSTANCE__: ADC instance.
elmot	1:d0dfbce63a89	1202	* @retval SET (ADC enabled) or RESET (ADC disabled)
elmot	1:d0dfbce63a89	1203	*/
elmot	1:d0dfbce63a89	1204	#define ADC_INSTANCE_IS_ENABLED(__INSTANCE__) \
elmot	1:d0dfbce63a89	1205	(( ((((__INSTANCE__)->CR) & (ADC_CR_ADEN \| ADC_CR_ADDIS)) == ADC_CR_ADEN) && \
elmot	1:d0dfbce63a89	1206	((((__INSTANCE__)->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY) \
elmot	1:d0dfbce63a89	1207	) ? SET : RESET)
elmot	1:d0dfbce63a89	1208
elmot	1:d0dfbce63a89	1209	/**
elmot	1:d0dfbce63a89	1210	* @brief Verification of enabled/disabled status of ADCs other than that associated to the input parameter handle.
elmot	1:d0dfbce63a89	1211	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1212	* @retval SET (at least one other ADC is enabled) or RESET (no other ADC is enabled, all other ADCs are disabled)
elmot	1:d0dfbce63a89	1213	*/
elmot	1:d0dfbce63a89	1214	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1215	#define ADC_ANY_OTHER_ENABLED(__HANDLE__) \
elmot	1:d0dfbce63a89	1216	( ( ((__HANDLE__)->Instance == ADC1) \
elmot	1:d0dfbce63a89	1217	)? \
elmot	1:d0dfbce63a89	1218	(ADC_INSTANCE_IS_ENABLED(ADC2)) \|\| (ADC_INSTANCE_IS_ENABLED(ADC3)) \
elmot	1:d0dfbce63a89	1219	: \
elmot	1:d0dfbce63a89	1220	( ( ((__HANDLE__)->Instance == ADC2) \
elmot	1:d0dfbce63a89	1221	)? \
elmot	1:d0dfbce63a89	1222	(ADC_INSTANCE_IS_ENABLED(ADC1)) \|\| (ADC_INSTANCE_IS_ENABLED(ADC3)) \
elmot	1:d0dfbce63a89	1223	: \
elmot	1:d0dfbce63a89	1224	ADC_INSTANCE_IS_ENABLED(ADC1)) \|\| (ADC_INSTANCE_IS_ENABLED(ADC2)) \
elmot	1:d0dfbce63a89	1225	)
elmot	1:d0dfbce63a89	1226	#elif defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	1227	#define ADC_ANY_OTHER_ENABLED(__HANDLE__) (RESET)
elmot	1:d0dfbce63a89	1228	#endif
elmot	1:d0dfbce63a89	1229
elmot	1:d0dfbce63a89	1230
elmot	1:d0dfbce63a89	1231	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1232	/**
elmot	1:d0dfbce63a89	1233	* @brief Set handle instance of the ADC slave associated to the ADC master.
elmot	1:d0dfbce63a89	1234	* @param __HANDLE_MASTER__: ADC master handle.
elmot	1:d0dfbce63a89	1235	* @param __HANDLE_SLAVE__: ADC slave handle.
elmot	1:d0dfbce63a89	1236	* @note if __HANDLE_MASTER__ is the handle of a slave ADC (ADC2) or an independent ADC (ADC3), __HANDLE_SLAVE__ instance is set to NULL.
elmot	1:d0dfbce63a89	1237	* @retval None
elmot	1:d0dfbce63a89	1238	*/
elmot	1:d0dfbce63a89	1239	#define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__) \
elmot	1:d0dfbce63a89	1240	( (((__HANDLE_MASTER__)->Instance == ADC1)) ? ((__HANDLE_SLAVE__)->Instance = ADC2) : ((__HANDLE_SLAVE__)->Instance = NULL) )
elmot	1:d0dfbce63a89	1241	#endif /* defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) */
elmot	1:d0dfbce63a89	1242
elmot	1:d0dfbce63a89	1243
elmot	1:d0dfbce63a89	1244	/**
elmot	1:d0dfbce63a89	1245	* @brief Check whether or not multimode is configured in DMA mode.
elmot	1:d0dfbce63a89	1246	* @note Return RESET if multimode feature is not available.
elmot	1:d0dfbce63a89	1247	* @retval SET (multimode is configured in DMA mode) or RESET (DMA multimode is disabled)
elmot	1:d0dfbce63a89	1248	*/
elmot	1:d0dfbce63a89	1249	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1250	#define ADC_MULTIMODE_DMA_ENABLED() \
elmot	1:d0dfbce63a89	1251	((READ_BIT(ADC123_COMMON->CCR, ADC_CCR_MDMA) == ADC_DMAACCESSMODE_12_10_BITS) \
elmot	1:d0dfbce63a89	1252	\|\| (READ_BIT(ADC123_COMMON->CCR, ADC_CCR_MDMA) == ADC_DMAACCESSMODE_8_6_BITS))
elmot	1:d0dfbce63a89	1253	#elif defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	1254	#define ADC_MULTIMODE_DMA_ENABLED() (RESET)
elmot	1:d0dfbce63a89	1255	#endif
elmot	1:d0dfbce63a89	1256
elmot	1:d0dfbce63a89	1257
elmot	1:d0dfbce63a89	1258	/**
elmot	1:d0dfbce63a89	1259	* @brief Verify the ADC instance connected to the temperature sensor.
elmot	1:d0dfbce63a89	1260	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1261	* @retval SET (ADC instance is valid) or RESET (ADC instance is invalid)
elmot	1:d0dfbce63a89	1262	*/
elmot	1:d0dfbce63a89	1263	#if defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	1264	/* The temperature sensor measurement path (channel 17) is available on ADC1 */
elmot	1:d0dfbce63a89	1265	#define ADC_TEMPERATURE_SENSOR_INSTANCE(__HANDLE__) (((__HANDLE__)->Instance) == ADC1)
elmot	1:d0dfbce63a89	1266	#elif defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1267	/* The temperature sensor measurement path (channel 17) is available on ADC1 and ADC3 */
elmot	1:d0dfbce63a89	1268	#define ADC_TEMPERATURE_SENSOR_INSTANCE(__HANDLE__) ((((__HANDLE__)->Instance) == ADC1) \|\| (((__HANDLE__)->Instance) == ADC3))
elmot	1:d0dfbce63a89	1269	#endif
elmot	1:d0dfbce63a89	1270
elmot	1:d0dfbce63a89	1271	/**
elmot	1:d0dfbce63a89	1272	* @brief Verify the ADC instance connected to the battery voltage VBAT.
elmot	1:d0dfbce63a89	1273	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1274	* @retval SET (ADC instance is valid) or RESET (ADC instance is invalid)
elmot	1:d0dfbce63a89	1275	*/
elmot	1:d0dfbce63a89	1276	#if defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	1277	/* The battery voltage measurement path (channel 18) is available on ADC1 */
elmot	1:d0dfbce63a89	1278	#define ADC_BATTERY_VOLTAGE_INSTANCE(__HANDLE__) (((__HANDLE__)->Instance) == ADC1)
elmot	1:d0dfbce63a89	1279	#elif defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1280	/* The battery voltage measurement path (channel 18) is available on ADC1 and ADC3 */
elmot	1:d0dfbce63a89	1281	#define ADC_BATTERY_VOLTAGE_INSTANCE(__HANDLE__) ((((__HANDLE__)->Instance) == ADC1) \|\| (((__HANDLE__)->Instance) == ADC3))
elmot	1:d0dfbce63a89	1282	#endif
elmot	1:d0dfbce63a89	1283
elmot	1:d0dfbce63a89	1284	/**
elmot	1:d0dfbce63a89	1285	* @brief Verify the ADC instance connected to the internal voltage reference VREFINT.
elmot	1:d0dfbce63a89	1286	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1287	* @retval SET (ADC instance is valid) or RESET (ADC instance is invalid)
elmot	1:d0dfbce63a89	1288	*/
elmot	1:d0dfbce63a89	1289	/* The internal voltage reference VREFINT measurement path (channel 0) is available on ADC1 */
elmot	1:d0dfbce63a89	1290	#define ADC_VREFINT_INSTANCE(__HANDLE__) (((__HANDLE__)->Instance) == ADC1)
elmot	1:d0dfbce63a89	1291
elmot	1:d0dfbce63a89	1292
elmot	1:d0dfbce63a89	1293	/**
elmot	1:d0dfbce63a89	1294	* @brief Verify the length of scheduled injected conversions group.
elmot	1:d0dfbce63a89	1295	* @param __LENGTH__: number of programmed conversions.
elmot	1:d0dfbce63a89	1296	* @retval SET (__LENGTH__ is within the maximum number of possible programmable injected conversions) or RESET (__LENGTH__ is null or too large)
elmot	1:d0dfbce63a89	1297	*/
elmot	1:d0dfbce63a89	1298	#define IS_ADC_INJECTED_NB_CONV(__LENGTH__) (((__LENGTH__) >= ((uint32_t)1)) && ((__LENGTH__) <= ((uint32_t)4)))
elmot	1:d0dfbce63a89	1299
elmot	1:d0dfbce63a89	1300
elmot	1:d0dfbce63a89	1301	/**
elmot	1:d0dfbce63a89	1302	* @brief Calibration factor size verification (7 bits maximum).
elmot	1:d0dfbce63a89	1303	* @param __CALIBRATION_FACTOR__: Calibration factor value.
elmot	1:d0dfbce63a89	1304	* @retval SET (__CALIBRATION_FACTOR__ is within the authorized size) or RESET (__CALIBRATION_FACTOR__ is too large)
elmot	1:d0dfbce63a89	1305	*/
elmot	1:d0dfbce63a89	1306	#define IS_ADC_CALFACT(__CALIBRATION_FACTOR__) ((__CALIBRATION_FACTOR__) <= ((uint32_t)0x7F))
elmot	1:d0dfbce63a89	1307
elmot	1:d0dfbce63a89	1308
elmot	1:d0dfbce63a89	1309	/**
elmot	1:d0dfbce63a89	1310	* @brief Verify the ADC channel setting.
elmot	1:d0dfbce63a89	1311	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1312	* @param __CHANNEL__: programmed ADC channel.
elmot	1:d0dfbce63a89	1313	* @retval SET (__CHANNEL__ is valid) or RESET (__CHANNEL__ is invalid)
elmot	1:d0dfbce63a89	1314	*/
elmot	1:d0dfbce63a89	1315	#if defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	1316	#define IS_ADC_CHANNEL(__HANDLE__, __CHANNEL__) ((((__HANDLE__)->Instance) == ADC1) && \
elmot	1:d0dfbce63a89	1317	(((__CHANNEL__) == ADC_CHANNEL_VREFINT) \|\| \
elmot	1:d0dfbce63a89	1318	((__CHANNEL__) == ADC_CHANNEL_1) \|\| \
elmot	1:d0dfbce63a89	1319	((__CHANNEL__) == ADC_CHANNEL_2) \|\| \
elmot	1:d0dfbce63a89	1320	((__CHANNEL__) == ADC_CHANNEL_3) \|\| \
elmot	1:d0dfbce63a89	1321	((__CHANNEL__) == ADC_CHANNEL_4) \|\| \
elmot	1:d0dfbce63a89	1322	((__CHANNEL__) == ADC_CHANNEL_5) \|\| \
elmot	1:d0dfbce63a89	1323	((__CHANNEL__) == ADC_CHANNEL_6) \|\| \
elmot	1:d0dfbce63a89	1324	((__CHANNEL__) == ADC_CHANNEL_7) \|\| \
elmot	1:d0dfbce63a89	1325	((__CHANNEL__) == ADC_CHANNEL_8) \|\| \
elmot	1:d0dfbce63a89	1326	((__CHANNEL__) == ADC_CHANNEL_9) \|\| \
elmot	1:d0dfbce63a89	1327	((__CHANNEL__) == ADC_CHANNEL_10) \|\| \
elmot	1:d0dfbce63a89	1328	((__CHANNEL__) == ADC_CHANNEL_11) \|\| \
elmot	1:d0dfbce63a89	1329	((__CHANNEL__) == ADC_CHANNEL_12) \|\| \
elmot	1:d0dfbce63a89	1330	((__CHANNEL__) == ADC_CHANNEL_13) \|\| \
elmot	1:d0dfbce63a89	1331	((__CHANNEL__) == ADC_CHANNEL_14) \|\| \
elmot	1:d0dfbce63a89	1332	((__CHANNEL__) == ADC_CHANNEL_15) \|\| \
elmot	1:d0dfbce63a89	1333	((__CHANNEL__) == ADC_CHANNEL_16) \|\| \
elmot	1:d0dfbce63a89	1334	((__CHANNEL__) == ADC_CHANNEL_17) \|\| \
elmot	1:d0dfbce63a89	1335	((__CHANNEL__) == ADC_CHANNEL_18) \|\| \
elmot	1:d0dfbce63a89	1336	((__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR) \|\| \
elmot	1:d0dfbce63a89	1337	((__CHANNEL__) == ADC_CHANNEL_VBAT)))
elmot	1:d0dfbce63a89	1338	#elif defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1339	#define IS_ADC_CHANNEL(__HANDLE__, __CHANNEL__) (((((__HANDLE__)->Instance) == ADC1) && \
elmot	1:d0dfbce63a89	1340	(((__CHANNEL__) == ADC_CHANNEL_VREFINT) \|\| \
elmot	1:d0dfbce63a89	1341	((__CHANNEL__) == ADC_CHANNEL_1) \|\| \
elmot	1:d0dfbce63a89	1342	((__CHANNEL__) == ADC_CHANNEL_2) \|\| \
elmot	1:d0dfbce63a89	1343	((__CHANNEL__) == ADC_CHANNEL_3) \|\| \
elmot	1:d0dfbce63a89	1344	((__CHANNEL__) == ADC_CHANNEL_4) \|\| \
elmot	1:d0dfbce63a89	1345	((__CHANNEL__) == ADC_CHANNEL_5) \|\| \
elmot	1:d0dfbce63a89	1346	((__CHANNEL__) == ADC_CHANNEL_6) \|\| \
elmot	1:d0dfbce63a89	1347	((__CHANNEL__) == ADC_CHANNEL_7) \|\| \
elmot	1:d0dfbce63a89	1348	((__CHANNEL__) == ADC_CHANNEL_8) \|\| \
elmot	1:d0dfbce63a89	1349	((__CHANNEL__) == ADC_CHANNEL_9) \|\| \
elmot	1:d0dfbce63a89	1350	((__CHANNEL__) == ADC_CHANNEL_10) \|\| \
elmot	1:d0dfbce63a89	1351	((__CHANNEL__) == ADC_CHANNEL_11) \|\| \
elmot	1:d0dfbce63a89	1352	((__CHANNEL__) == ADC_CHANNEL_12) \|\| \
elmot	1:d0dfbce63a89	1353	((__CHANNEL__) == ADC_CHANNEL_13) \|\| \
elmot	1:d0dfbce63a89	1354	((__CHANNEL__) == ADC_CHANNEL_14) \|\| \
elmot	1:d0dfbce63a89	1355	((__CHANNEL__) == ADC_CHANNEL_15) \|\| \
elmot	1:d0dfbce63a89	1356	((__CHANNEL__) == ADC_CHANNEL_16) \|\| \
elmot	1:d0dfbce63a89	1357	((__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR) \|\| \
elmot	1:d0dfbce63a89	1358	((__CHANNEL__) == ADC_CHANNEL_VBAT))) \|\| \
elmot	1:d0dfbce63a89	1359	((((__HANDLE__)->Instance) == ADC2) && \
elmot	1:d0dfbce63a89	1360	(((__CHANNEL__) == ADC_CHANNEL_1) \|\| \
elmot	1:d0dfbce63a89	1361	((__CHANNEL__) == ADC_CHANNEL_2) \|\| \
elmot	1:d0dfbce63a89	1362	((__CHANNEL__) == ADC_CHANNEL_3) \|\| \
elmot	1:d0dfbce63a89	1363	((__CHANNEL__) == ADC_CHANNEL_4) \|\| \
elmot	1:d0dfbce63a89	1364	((__CHANNEL__) == ADC_CHANNEL_5) \|\| \
elmot	1:d0dfbce63a89	1365	((__CHANNEL__) == ADC_CHANNEL_6) \|\| \
elmot	1:d0dfbce63a89	1366	((__CHANNEL__) == ADC_CHANNEL_7) \|\| \
elmot	1:d0dfbce63a89	1367	((__CHANNEL__) == ADC_CHANNEL_8) \|\| \
elmot	1:d0dfbce63a89	1368	((__CHANNEL__) == ADC_CHANNEL_9) \|\| \
elmot	1:d0dfbce63a89	1369	((__CHANNEL__) == ADC_CHANNEL_10) \|\| \
elmot	1:d0dfbce63a89	1370	((__CHANNEL__) == ADC_CHANNEL_11) \|\| \
elmot	1:d0dfbce63a89	1371	((__CHANNEL__) == ADC_CHANNEL_12) \|\| \
elmot	1:d0dfbce63a89	1372	((__CHANNEL__) == ADC_CHANNEL_13) \|\| \
elmot	1:d0dfbce63a89	1373	((__CHANNEL__) == ADC_CHANNEL_14) \|\| \
elmot	1:d0dfbce63a89	1374	((__CHANNEL__) == ADC_CHANNEL_15) \|\| \
elmot	1:d0dfbce63a89	1375	((__CHANNEL__) == ADC_CHANNEL_16) \|\| \
elmot	1:d0dfbce63a89	1376	((__CHANNEL__) == ADC_CHANNEL_17) \|\| \
elmot	1:d0dfbce63a89	1377	((__CHANNEL__) == ADC_CHANNEL_18))) \|\| \
elmot	1:d0dfbce63a89	1378	((((__HANDLE__)->Instance) == ADC3) && \
elmot	1:d0dfbce63a89	1379	(((__CHANNEL__) == ADC_CHANNEL_1) \|\| \
elmot	1:d0dfbce63a89	1380	((__CHANNEL__) == ADC_CHANNEL_2) \|\| \
elmot	1:d0dfbce63a89	1381	((__CHANNEL__) == ADC_CHANNEL_3) \|\| \
elmot	1:d0dfbce63a89	1382	((__CHANNEL__) == ADC_CHANNEL_4) \|\| \
elmot	1:d0dfbce63a89	1383	((__CHANNEL__) == ADC_CHANNEL_6) \|\| \
elmot	1:d0dfbce63a89	1384	((__CHANNEL__) == ADC_CHANNEL_7) \|\| \
elmot	1:d0dfbce63a89	1385	((__CHANNEL__) == ADC_CHANNEL_8) \|\| \
elmot	1:d0dfbce63a89	1386	((__CHANNEL__) == ADC_CHANNEL_9) \|\| \
elmot	1:d0dfbce63a89	1387	((__CHANNEL__) == ADC_CHANNEL_10) \|\| \
elmot	1:d0dfbce63a89	1388	((__CHANNEL__) == ADC_CHANNEL_11) \|\| \
elmot	1:d0dfbce63a89	1389	((__CHANNEL__) == ADC_CHANNEL_12) \|\| \
elmot	1:d0dfbce63a89	1390	((__CHANNEL__) == ADC_CHANNEL_13) \|\| \
elmot	1:d0dfbce63a89	1391	((__CHANNEL__) == ADC_CHANNEL_14) \|\| \
elmot	1:d0dfbce63a89	1392	((__CHANNEL__) == ADC_CHANNEL_15) \|\| \
elmot	1:d0dfbce63a89	1393	((__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR) \|\| \
elmot	1:d0dfbce63a89	1394	((__CHANNEL__) == ADC_CHANNEL_VBAT) )))
elmot	1:d0dfbce63a89	1395	#endif
elmot	1:d0dfbce63a89	1396
elmot	1:d0dfbce63a89	1397	/**
elmot	1:d0dfbce63a89	1398	* @brief Verify the ADC channel setting in differential mode.
elmot	1:d0dfbce63a89	1399	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1400	* @param __CHANNEL__: programmed ADC channel.
elmot	1:d0dfbce63a89	1401	* @retval SET (__CHANNEL__ is valid) or RESET (__CHANNEL__ is invalid)
elmot	1:d0dfbce63a89	1402	*/
elmot	1:d0dfbce63a89	1403	#if defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx)
elmot	1:d0dfbce63a89	1404	#define IS_ADC_DIFF_CHANNEL(__HANDLE__, __CHANNEL__) (((__CHANNEL__) == ADC_CHANNEL_1) \|\| \
elmot	1:d0dfbce63a89	1405	((__CHANNEL__) == ADC_CHANNEL_2) \|\| \
elmot	1:d0dfbce63a89	1406	((__CHANNEL__) == ADC_CHANNEL_3) \|\| \
elmot	1:d0dfbce63a89	1407	((__CHANNEL__) == ADC_CHANNEL_4) \|\| \
elmot	1:d0dfbce63a89	1408	((__CHANNEL__) == ADC_CHANNEL_5) \|\| \
elmot	1:d0dfbce63a89	1409	((__CHANNEL__) == ADC_CHANNEL_6) \|\| \
elmot	1:d0dfbce63a89	1410	((__CHANNEL__) == ADC_CHANNEL_7) \|\| \
elmot	1:d0dfbce63a89	1411	((__CHANNEL__) == ADC_CHANNEL_8) \|\| \
elmot	1:d0dfbce63a89	1412	((__CHANNEL__) == ADC_CHANNEL_9) \|\| \
elmot	1:d0dfbce63a89	1413	((__CHANNEL__) == ADC_CHANNEL_10) \|\| \
elmot	1:d0dfbce63a89	1414	((__CHANNEL__) == ADC_CHANNEL_11) \|\| \
elmot	1:d0dfbce63a89	1415	((__CHANNEL__) == ADC_CHANNEL_12) \|\| \
elmot	1:d0dfbce63a89	1416	((__CHANNEL__) == ADC_CHANNEL_13) \|\| \
elmot	1:d0dfbce63a89	1417	((__CHANNEL__) == ADC_CHANNEL_14) \|\| \
elmot	1:d0dfbce63a89	1418	((__CHANNEL__) == ADC_CHANNEL_15) )
elmot	1:d0dfbce63a89	1419	#elif defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1420	/* For ADC1 and ADC2, channels 1 to 15 are available in differential mode,
elmot	1:d0dfbce63a89	1421	channels 0, 16 to 18 can be only used in single-ended mode.
elmot	1:d0dfbce63a89	1422	For ADC3, channels 1 to 3 and 6 to 12 are available in differential mode,
elmot	1:d0dfbce63a89	1423	channels 4, 5 and 13 to 18 can only be used in single-ended mode. */
elmot	1:d0dfbce63a89	1424	#define IS_ADC_DIFF_CHANNEL(__HANDLE__, __CHANNEL__) ((((((__HANDLE__)->Instance) == ADC1) \|\| \
elmot	1:d0dfbce63a89	1425	(((__HANDLE__)->Instance) == ADC2)) && \
elmot	1:d0dfbce63a89	1426	(((__CHANNEL__) == ADC_CHANNEL_1) \|\| \
elmot	1:d0dfbce63a89	1427	((__CHANNEL__) == ADC_CHANNEL_2) \|\| \
elmot	1:d0dfbce63a89	1428	((__CHANNEL__) == ADC_CHANNEL_3) \|\| \
elmot	1:d0dfbce63a89	1429	((__CHANNEL__) == ADC_CHANNEL_4) \|\| \
elmot	1:d0dfbce63a89	1430	((__CHANNEL__) == ADC_CHANNEL_5) \|\| \
elmot	1:d0dfbce63a89	1431	((__CHANNEL__) == ADC_CHANNEL_6) \|\| \
elmot	1:d0dfbce63a89	1432	((__CHANNEL__) == ADC_CHANNEL_7) \|\| \
elmot	1:d0dfbce63a89	1433	((__CHANNEL__) == ADC_CHANNEL_8) \|\| \
elmot	1:d0dfbce63a89	1434	((__CHANNEL__) == ADC_CHANNEL_9) \|\| \
elmot	1:d0dfbce63a89	1435	((__CHANNEL__) == ADC_CHANNEL_10) \|\| \
elmot	1:d0dfbce63a89	1436	((__CHANNEL__) == ADC_CHANNEL_11) \|\| \
elmot	1:d0dfbce63a89	1437	((__CHANNEL__) == ADC_CHANNEL_12) \|\| \
elmot	1:d0dfbce63a89	1438	((__CHANNEL__) == ADC_CHANNEL_13) \|\| \
elmot	1:d0dfbce63a89	1439	((__CHANNEL__) == ADC_CHANNEL_14) \|\| \
elmot	1:d0dfbce63a89	1440	((__CHANNEL__) == ADC_CHANNEL_15))) \|\| \
elmot	1:d0dfbce63a89	1441	((((__HANDLE__)->Instance) == ADC3) && \
elmot	1:d0dfbce63a89	1442	(((__CHANNEL__) == ADC_CHANNEL_1) \|\| \
elmot	1:d0dfbce63a89	1443	((__CHANNEL__) == ADC_CHANNEL_2) \|\| \
elmot	1:d0dfbce63a89	1444	((__CHANNEL__) == ADC_CHANNEL_3) \|\| \
elmot	1:d0dfbce63a89	1445	((__CHANNEL__) == ADC_CHANNEL_6) \|\| \
elmot	1:d0dfbce63a89	1446	((__CHANNEL__) == ADC_CHANNEL_7) \|\| \
elmot	1:d0dfbce63a89	1447	((__CHANNEL__) == ADC_CHANNEL_8) \|\| \
elmot	1:d0dfbce63a89	1448	((__CHANNEL__) == ADC_CHANNEL_9) \|\| \
elmot	1:d0dfbce63a89	1449	((__CHANNEL__) == ADC_CHANNEL_10) \|\| \
elmot	1:d0dfbce63a89	1450	((__CHANNEL__) == ADC_CHANNEL_11) \|\| \
elmot	1:d0dfbce63a89	1451	((__CHANNEL__) == ADC_CHANNEL_12) )))
elmot	1:d0dfbce63a89	1452	#endif
elmot	1:d0dfbce63a89	1453
elmot	1:d0dfbce63a89	1454	/**
elmot	1:d0dfbce63a89	1455	* @brief Verify the ADC single-ended input or differential mode setting.
elmot	1:d0dfbce63a89	1456	* @param __SING_DIFF__: programmed channel setting.
elmot	1:d0dfbce63a89	1457	* @retval SET (__SING_DIFF__ is valid) or RESET (__SING_DIFF__ is invalid)
elmot	1:d0dfbce63a89	1458	*/
elmot	1:d0dfbce63a89	1459	#define IS_ADC_SINGLE_DIFFERENTIAL(__SING_DIFF__) (((__SING_DIFF__) == ADC_SINGLE_ENDED) \|\| \
elmot	1:d0dfbce63a89	1460	((__SING_DIFF__) == ADC_DIFFERENTIAL_ENDED) )
elmot	1:d0dfbce63a89	1461
elmot	1:d0dfbce63a89	1462	/**
elmot	1:d0dfbce63a89	1463	* @brief Verify the ADC offset management setting.
elmot	1:d0dfbce63a89	1464	* @param __OFFSET_NUMBER__: ADC offset management.
elmot	1:d0dfbce63a89	1465	* @retval SET (__OFFSET_NUMBER__ is valid) or RESET (__OFFSET_NUMBER__ is invalid)
elmot	1:d0dfbce63a89	1466	*/
elmot	1:d0dfbce63a89	1467	#define IS_ADC_OFFSET_NUMBER(__OFFSET_NUMBER__) (((__OFFSET_NUMBER__) == ADC_OFFSET_NONE) \|\| \
elmot	1:d0dfbce63a89	1468	((__OFFSET_NUMBER__) == ADC_OFFSET_1) \|\| \
elmot	1:d0dfbce63a89	1469	((__OFFSET_NUMBER__) == ADC_OFFSET_2) \|\| \
elmot	1:d0dfbce63a89	1470	((__OFFSET_NUMBER__) == ADC_OFFSET_3) \|\| \
elmot	1:d0dfbce63a89	1471	((__OFFSET_NUMBER__) == ADC_OFFSET_4) )
elmot	1:d0dfbce63a89	1472
elmot	1:d0dfbce63a89	1473	/**
elmot	1:d0dfbce63a89	1474	* @brief Verify the ADC regular channel setting.
elmot	1:d0dfbce63a89	1475	* @param __CHANNEL__: programmed ADC regular channel.
elmot	1:d0dfbce63a89	1476	* @retval SET (__CHANNEL__ is valid) or RESET (__CHANNEL__ is invalid)
elmot	1:d0dfbce63a89	1477	*/
elmot	1:d0dfbce63a89	1478	#define IS_ADC_REGULAR_RANK(__CHANNEL__) (((__CHANNEL__) == ADC_REGULAR_RANK_1 ) \|\| \
elmot	1:d0dfbce63a89	1479	((__CHANNEL__) == ADC_REGULAR_RANK_2 ) \|\| \
elmot	1:d0dfbce63a89	1480	((__CHANNEL__) == ADC_REGULAR_RANK_3 ) \|\| \
elmot	1:d0dfbce63a89	1481	((__CHANNEL__) == ADC_REGULAR_RANK_4 ) \|\| \
elmot	1:d0dfbce63a89	1482	((__CHANNEL__) == ADC_REGULAR_RANK_5 ) \|\| \
elmot	1:d0dfbce63a89	1483	((__CHANNEL__) == ADC_REGULAR_RANK_6 ) \|\| \
elmot	1:d0dfbce63a89	1484	((__CHANNEL__) == ADC_REGULAR_RANK_7 ) \|\| \
elmot	1:d0dfbce63a89	1485	((__CHANNEL__) == ADC_REGULAR_RANK_8 ) \|\| \
elmot	1:d0dfbce63a89	1486	((__CHANNEL__) == ADC_REGULAR_RANK_9 ) \|\| \
elmot	1:d0dfbce63a89	1487	((__CHANNEL__) == ADC_REGULAR_RANK_10) \|\| \
elmot	1:d0dfbce63a89	1488	((__CHANNEL__) == ADC_REGULAR_RANK_11) \|\| \
elmot	1:d0dfbce63a89	1489	((__CHANNEL__) == ADC_REGULAR_RANK_12) \|\| \
elmot	1:d0dfbce63a89	1490	((__CHANNEL__) == ADC_REGULAR_RANK_13) \|\| \
elmot	1:d0dfbce63a89	1491	((__CHANNEL__) == ADC_REGULAR_RANK_14) \|\| \
elmot	1:d0dfbce63a89	1492	((__CHANNEL__) == ADC_REGULAR_RANK_15) \|\| \
elmot	1:d0dfbce63a89	1493	((__CHANNEL__) == ADC_REGULAR_RANK_16) )
elmot	1:d0dfbce63a89	1494
elmot	1:d0dfbce63a89	1495
elmot	1:d0dfbce63a89	1496	/**
elmot	1:d0dfbce63a89	1497	* @brief Verify the ADC injected channel setting.
elmot	1:d0dfbce63a89	1498	* @param __CHANNEL__: programmed ADC injected channel.
elmot	1:d0dfbce63a89	1499	* @retval SET (__CHANNEL__ is valid) or RESET (__CHANNEL__ is invalid)
elmot	1:d0dfbce63a89	1500	*/
elmot	1:d0dfbce63a89	1501	#define IS_ADC_INJECTED_RANK(__CHANNEL__) (((__CHANNEL__) == ADC_INJECTED_RANK_1) \|\| \
elmot	1:d0dfbce63a89	1502	((__CHANNEL__) == ADC_INJECTED_RANK_2) \|\| \
elmot	1:d0dfbce63a89	1503	((__CHANNEL__) == ADC_INJECTED_RANK_3) \|\| \
elmot	1:d0dfbce63a89	1504	((__CHANNEL__) == ADC_INJECTED_RANK_4) )
elmot	1:d0dfbce63a89	1505
elmot	1:d0dfbce63a89	1506	/**
elmot	1:d0dfbce63a89	1507	* @brief Verify the ADC edge trigger setting for injected group.
elmot	1:d0dfbce63a89	1508	* @param __EDGE__: programmed ADC edge trigger setting.
elmot	1:d0dfbce63a89	1509	* @retval SET (__EDGE__ is a valid value) or RESET (__EDGE__ is invalid)
elmot	1:d0dfbce63a89	1510	*/
elmot	1:d0dfbce63a89	1511	#define IS_ADC_EXTTRIGINJEC_EDGE(__EDGE__) (((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE) \|\| \
elmot	1:d0dfbce63a89	1512	((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING) \|\| \
elmot	1:d0dfbce63a89	1513	((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_FALLING) \|\| \
elmot	1:d0dfbce63a89	1514	((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISINGFALLING) )
elmot	1:d0dfbce63a89	1515
elmot	1:d0dfbce63a89	1516
elmot	1:d0dfbce63a89	1517	/**
elmot	1:d0dfbce63a89	1518	* @brief Verify the ADC injected conversions external trigger.
elmot	1:d0dfbce63a89	1519	* @param __INJTRIG__: programmed ADC injected conversions external trigger.
elmot	1:d0dfbce63a89	1520	* @retval SET (__INJTRIG__ is a valid value) or RESET (__INJTRIG__ is invalid)
elmot	1:d0dfbce63a89	1521	*/
elmot	1:d0dfbce63a89	1522	#define IS_ADC_EXTTRIGINJEC(__INJTRIG__) (((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T1_TRGO) \|\| \
elmot	1:d0dfbce63a89	1523	((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T1_CC4) \|\| \
elmot	1:d0dfbce63a89	1524	((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T2_TRGO) \|\| \
elmot	1:d0dfbce63a89	1525	((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T2_CC1) \|\| \
elmot	1:d0dfbce63a89	1526	((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_CC4) \|\| \
elmot	1:d0dfbce63a89	1527	((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T4_TRGO) \|\| \
elmot	1:d0dfbce63a89	1528	((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_EXT_IT15) \|\| \
elmot	1:d0dfbce63a89	1529	((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T8_CC4) \|\| \
elmot	1:d0dfbce63a89	1530	((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T1_TRGO2) \|\| \
elmot	1:d0dfbce63a89	1531	((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T8_TRGO) \|\| \
elmot	1:d0dfbce63a89	1532	((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T8_TRGO2) \|\| \
elmot	1:d0dfbce63a89	1533	((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_CC3) \|\| \
elmot	1:d0dfbce63a89	1534	((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_TRGO) \|\| \
elmot	1:d0dfbce63a89	1535	((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_CC1) \|\| \
elmot	1:d0dfbce63a89	1536	((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T6_TRGO) \|\| \
elmot	1:d0dfbce63a89	1537	((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T15_TRGO) \|\| \
elmot	1:d0dfbce63a89	1538	\
elmot	1:d0dfbce63a89	1539	((__INJTRIG__) == ADC_SOFTWARE_START) )
elmot	1:d0dfbce63a89	1540
elmot	1:d0dfbce63a89	1541
elmot	1:d0dfbce63a89	1542	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1543	/**
elmot	1:d0dfbce63a89	1544	* @brief Verify the ADC multimode setting.
elmot	1:d0dfbce63a89	1545	* @param __MODE__: programmed ADC multimode setting.
elmot	1:d0dfbce63a89	1546	* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
elmot	1:d0dfbce63a89	1547	*/
elmot	1:d0dfbce63a89	1548	#define IS_ADC_MULTIMODE(__MODE__) (((__MODE__) == ADC_MODE_INDEPENDENT) \|\| \
elmot	1:d0dfbce63a89	1549	((__MODE__) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) \|\| \
elmot	1:d0dfbce63a89	1550	((__MODE__) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) \|\| \
elmot	1:d0dfbce63a89	1551	((__MODE__) == ADC_DUALMODE_REGINTERL_INJECSIMULT) \|\| \
elmot	1:d0dfbce63a89	1552	((__MODE__) == ADC_DUALMODE_INJECSIMULT) \|\| \
elmot	1:d0dfbce63a89	1553	((__MODE__) == ADC_DUALMODE_REGSIMULT) \|\| \
elmot	1:d0dfbce63a89	1554	((__MODE__) == ADC_DUALMODE_INTERL) \|\| \
elmot	1:d0dfbce63a89	1555	((__MODE__) == ADC_DUALMODE_ALTERTRIG) )
elmot	1:d0dfbce63a89	1556
elmot	1:d0dfbce63a89	1557	/**
elmot	1:d0dfbce63a89	1558	* @brief Verify the ADC multimode DMA access setting.
elmot	1:d0dfbce63a89	1559	* @param __MODE__: programmed ADC multimode DMA access setting.
elmot	1:d0dfbce63a89	1560	* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
elmot	1:d0dfbce63a89	1561	*/
elmot	1:d0dfbce63a89	1562	#define IS_ADC_DMA_ACCESS_MULTIMODE(__MODE__) (((__MODE__) == ADC_DMAACCESSMODE_DISABLED) \|\| \
elmot	1:d0dfbce63a89	1563	((__MODE__) == ADC_DMAACCESSMODE_12_10_BITS) \|\| \
elmot	1:d0dfbce63a89	1564	((__MODE__) == ADC_DMAACCESSMODE_8_6_BITS) )
elmot	1:d0dfbce63a89	1565
elmot	1:d0dfbce63a89	1566	/**
elmot	1:d0dfbce63a89	1567	* @brief Verify the ADC multimode delay setting.
elmot	1:d0dfbce63a89	1568	* @param __DELAY__: programmed ADC multimode delay setting.
elmot	1:d0dfbce63a89	1569	* @retval SET (__DELAY__ is a valid value) or RESET (__DELAY__ is invalid)
elmot	1:d0dfbce63a89	1570	*/
elmot	1:d0dfbce63a89	1571	#define IS_ADC_SAMPLING_DELAY(__DELAY__) (((__DELAY__) == ADC_TWOSAMPLINGDELAY_1CYCLE) \|\| \
elmot	1:d0dfbce63a89	1572	((__DELAY__) == ADC_TWOSAMPLINGDELAY_2CYCLES) \|\| \
elmot	1:d0dfbce63a89	1573	((__DELAY__) == ADC_TWOSAMPLINGDELAY_3CYCLES) \|\| \
elmot	1:d0dfbce63a89	1574	((__DELAY__) == ADC_TWOSAMPLINGDELAY_4CYCLES) \|\| \
elmot	1:d0dfbce63a89	1575	((__DELAY__) == ADC_TWOSAMPLINGDELAY_5CYCLES) \|\| \
elmot	1:d0dfbce63a89	1576	((__DELAY__) == ADC_TWOSAMPLINGDELAY_6CYCLES) \|\| \
elmot	1:d0dfbce63a89	1577	((__DELAY__) == ADC_TWOSAMPLINGDELAY_7CYCLES) \|\| \
elmot	1:d0dfbce63a89	1578	((__DELAY__) == ADC_TWOSAMPLINGDELAY_8CYCLES) \|\| \
elmot	1:d0dfbce63a89	1579	((__DELAY__) == ADC_TWOSAMPLINGDELAY_9CYCLES) \|\| \
elmot	1:d0dfbce63a89	1580	((__DELAY__) == ADC_TWOSAMPLINGDELAY_10CYCLES) \|\| \
elmot	1:d0dfbce63a89	1581	((__DELAY__) == ADC_TWOSAMPLINGDELAY_11CYCLES) \|\| \
elmot	1:d0dfbce63a89	1582	((__DELAY__) == ADC_TWOSAMPLINGDELAY_12CYCLES) )
elmot	1:d0dfbce63a89	1583	#endif /* defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) */
elmot	1:d0dfbce63a89	1584
elmot	1:d0dfbce63a89	1585	/**
elmot	1:d0dfbce63a89	1586	* @brief Verify the ADC analog watchdog setting.
elmot	1:d0dfbce63a89	1587	* @param __WATCHDOG__: programmed ADC analog watchdog setting.
elmot	1:d0dfbce63a89	1588	* @retval SET (__WATCHDOG__ is valid) or RESET (__WATCHDOG__ is invalid)
elmot	1:d0dfbce63a89	1589	*/
elmot	1:d0dfbce63a89	1590	#define IS_ADC_ANALOG_WATCHDOG_NUMBER(__WATCHDOG__) (((__WATCHDOG__) == ADC_ANALOGWATCHDOG_1) \|\| \
elmot	1:d0dfbce63a89	1591	((__WATCHDOG__) == ADC_ANALOGWATCHDOG_2) \|\| \
elmot	1:d0dfbce63a89	1592	((__WATCHDOG__) == ADC_ANALOGWATCHDOG_3) )
elmot	1:d0dfbce63a89	1593
elmot	1:d0dfbce63a89	1594	/**
elmot	1:d0dfbce63a89	1595	* @brief Verify the ADC analog watchdog mode setting.
elmot	1:d0dfbce63a89	1596	* @param __WATCHDOG_MODE__: programmed ADC analog watchdog mode setting.
elmot	1:d0dfbce63a89	1597	* @retval SET (__WATCHDOG_MODE__ is valid) or RESET (__WATCHDOG_MODE__ is invalid)
elmot	1:d0dfbce63a89	1598	*/
elmot	1:d0dfbce63a89	1599	#define IS_ADC_ANALOG_WATCHDOG_MODE(__WATCHDOG_MODE__) (((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_NONE) \|\| \
elmot	1:d0dfbce63a89	1600	((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_SINGLE_REG) \|\| \
elmot	1:d0dfbce63a89	1601	((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_SINGLE_INJEC) \|\| \
elmot	1:d0dfbce63a89	1602	((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC) \|\| \
elmot	1:d0dfbce63a89	1603	((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_ALL_REG) \|\| \
elmot	1:d0dfbce63a89	1604	((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_ALL_INJEC) \|\| \
elmot	1:d0dfbce63a89	1605	((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_ALL_REGINJEC) )
elmot	1:d0dfbce63a89	1606
elmot	1:d0dfbce63a89	1607	/**
elmot	1:d0dfbce63a89	1608	* @brief Verify the ADC conversion (regular or injected or both).
elmot	1:d0dfbce63a89	1609	* @param __CONVERSION__: ADC conversion group.
elmot	1:d0dfbce63a89	1610	* @retval SET (__CONVERSION__ is valid) or RESET (__CONVERSION__ is invalid)
elmot	1:d0dfbce63a89	1611	*/
elmot	1:d0dfbce63a89	1612	#define IS_ADC_CONVERSION_GROUP(__CONVERSION__) (((__CONVERSION__) == ADC_REGULAR_GROUP) \|\| \
elmot	1:d0dfbce63a89	1613	((__CONVERSION__) == ADC_INJECTED_GROUP) \|\| \
elmot	1:d0dfbce63a89	1614	((__CONVERSION__) == ADC_REGULAR_INJECTED_GROUP) )
elmot	1:d0dfbce63a89	1615
elmot	1:d0dfbce63a89	1616	/**
elmot	1:d0dfbce63a89	1617	* @brief Verify the ADC event type.
elmot	1:d0dfbce63a89	1618	* @param __EVENT__: ADC event.
elmot	1:d0dfbce63a89	1619	* @retval SET (__EVENT__ is valid) or RESET (__EVENT__ is invalid)
elmot	1:d0dfbce63a89	1620	*/
elmot	1:d0dfbce63a89	1621	#define IS_ADC_EVENT_TYPE(__EVENT__) (((__EVENT__) == ADC_EOSMP_EVENT) \|\| \
elmot	1:d0dfbce63a89	1622	((__EVENT__) == ADC_AWD_EVENT) \|\| \
elmot	1:d0dfbce63a89	1623	((__EVENT__) == ADC_AWD2_EVENT) \|\| \
elmot	1:d0dfbce63a89	1624	((__EVENT__) == ADC_AWD3_EVENT) \|\| \
elmot	1:d0dfbce63a89	1625	((__EVENT__) == ADC_OVR_EVENT) \|\| \
elmot	1:d0dfbce63a89	1626	((__EVENT__) == ADC_JQOVF_EVENT) )
elmot	1:d0dfbce63a89	1627
elmot	1:d0dfbce63a89	1628	/**
elmot	1:d0dfbce63a89	1629	* @brief Verify the ADC oversampling ratio.
elmot	1:d0dfbce63a89	1630	* @param __RATIO__: programmed ADC oversampling ratio.
elmot	1:d0dfbce63a89	1631	* @retval SET (__RATIO__ is a valid value) or RESET (__RATIO__ is invalid)
elmot	1:d0dfbce63a89	1632	*/
elmot	1:d0dfbce63a89	1633	#define IS_ADC_OVERSAMPLING_RATIO(__RATIO__) (((__RATIO__) == ADC_OVERSAMPLING_RATIO_2 ) \|\| \
elmot	1:d0dfbce63a89	1634	((__RATIO__) == ADC_OVERSAMPLING_RATIO_4 ) \|\| \
elmot	1:d0dfbce63a89	1635	((__RATIO__) == ADC_OVERSAMPLING_RATIO_8 ) \|\| \
elmot	1:d0dfbce63a89	1636	((__RATIO__) == ADC_OVERSAMPLING_RATIO_16 ) \|\| \
elmot	1:d0dfbce63a89	1637	((__RATIO__) == ADC_OVERSAMPLING_RATIO_32 ) \|\| \
elmot	1:d0dfbce63a89	1638	((__RATIO__) == ADC_OVERSAMPLING_RATIO_64 ) \|\| \
elmot	1:d0dfbce63a89	1639	((__RATIO__) == ADC_OVERSAMPLING_RATIO_128 ) \|\| \
elmot	1:d0dfbce63a89	1640	((__RATIO__) == ADC_OVERSAMPLING_RATIO_256 ))
elmot	1:d0dfbce63a89	1641
elmot	1:d0dfbce63a89	1642	/**
elmot	1:d0dfbce63a89	1643	* @brief Verify the ADC oversampling shift.
elmot	1:d0dfbce63a89	1644	* @param __SHIFT__: programmed ADC oversampling shift.
elmot	1:d0dfbce63a89	1645	* @retval SET (__SHIFT__ is a valid value) or RESET (__SHIFT__ is invalid)
elmot	1:d0dfbce63a89	1646	*/
elmot	1:d0dfbce63a89	1647	#define IS_ADC_RIGHT_BIT_SHIFT(__SHIFT__) (((__SHIFT__) == ADC_RIGHTBITSHIFT_NONE) \|\| \
elmot	1:d0dfbce63a89	1648	((__SHIFT__) == ADC_RIGHTBITSHIFT_1 ) \|\| \
elmot	1:d0dfbce63a89	1649	((__SHIFT__) == ADC_RIGHTBITSHIFT_2 ) \|\| \
elmot	1:d0dfbce63a89	1650	((__SHIFT__) == ADC_RIGHTBITSHIFT_3 ) \|\| \
elmot	1:d0dfbce63a89	1651	((__SHIFT__) == ADC_RIGHTBITSHIFT_4 ) \|\| \
elmot	1:d0dfbce63a89	1652	((__SHIFT__) == ADC_RIGHTBITSHIFT_5 ) \|\| \
elmot	1:d0dfbce63a89	1653	((__SHIFT__) == ADC_RIGHTBITSHIFT_6 ) \|\| \
elmot	1:d0dfbce63a89	1654	((__SHIFT__) == ADC_RIGHTBITSHIFT_7 ) \|\| \
elmot	1:d0dfbce63a89	1655	((__SHIFT__) == ADC_RIGHTBITSHIFT_8 ))
elmot	1:d0dfbce63a89	1656
elmot	1:d0dfbce63a89	1657	/**
elmot	1:d0dfbce63a89	1658	* @brief Verify the ADC oversampling triggered mode.
elmot	1:d0dfbce63a89	1659	* @param __MODE__: programmed ADC oversampling triggered mode.
elmot	1:d0dfbce63a89	1660	* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
elmot	1:d0dfbce63a89	1661	*/
elmot	1:d0dfbce63a89	1662	#define IS_ADC_TRIGGERED_OVERSAMPLING_MODE(__MODE__) (((__MODE__) == ADC_TRIGGEREDMODE_SINGLE_TRIGGER) \|\| \
elmot	1:d0dfbce63a89	1663	((__MODE__) == ADC_TRIGGEREDMODE_MULTI_TRIGGER) )
elmot	1:d0dfbce63a89	1664
elmot	1:d0dfbce63a89	1665	/**
elmot	1:d0dfbce63a89	1666	* @brief Verify the ADC oversampling regular conversion resumed or continued mode.
elmot	1:d0dfbce63a89	1667	* @param __MODE__: programmed ADC oversampling regular conversion resumed or continued mode.
elmot	1:d0dfbce63a89	1668	* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
elmot	1:d0dfbce63a89	1669	*/
elmot	1:d0dfbce63a89	1670	#define IS_ADC_REGOVERSAMPLING_MODE(__MODE__) (((__MODE__) == ADC_REGOVERSAMPLING_CONTINUED_MODE) \|\| \
elmot	1:d0dfbce63a89	1671	((__MODE__) == ADC_REGOVERSAMPLING_RESUMED_MODE) )
elmot	1:d0dfbce63a89	1672
elmot	1:d0dfbce63a89	1673
elmot	1:d0dfbce63a89	1674	/**
elmot	1:d0dfbce63a89	1675	* @brief Verify the DFSDM mode configuration.
elmot	1:d0dfbce63a89	1676	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1677	* @note When DMSDFM configuration is not supported, the macro systematically reports SET. For
elmot	1:d0dfbce63a89	1678	* this reason, the input parameter is the ADC handle and not the configuration parameter
elmot	1:d0dfbce63a89	1679	* directly.
elmot	1:d0dfbce63a89	1680	* @retval SET (DFSDM mode configuration is valid) or RESET (DFSDM mode configuration is invalid)
elmot	1:d0dfbce63a89	1681	*/
elmot	1:d0dfbce63a89	1682	#define IS_ADC_DFSDMCFG_MODE(__HANDLE__) (SET)
elmot	1:d0dfbce63a89	1683
elmot	1:d0dfbce63a89	1684	/**
elmot	1:d0dfbce63a89	1685	* @brief Return the DFSDM configuration mode.
elmot	1:d0dfbce63a89	1686	* @param __HANDLE__: ADC handle.
elmot	1:d0dfbce63a89	1687	* @note When DMSDFM configuration is not supported, the macro systematically reports 0x0 (i.e disabled).
elmot	1:d0dfbce63a89	1688	* For this reason, the input parameter is the ADC handle and not the configuration parameter
elmot	1:d0dfbce63a89	1689	* directly.
elmot	1:d0dfbce63a89	1690	* @retval DFSDM configuration mode
elmot	1:d0dfbce63a89	1691	*/
elmot	1:d0dfbce63a89	1692	#define ADC_CFGR_DFSDM(__HANDLE__) (0x0)
elmot	1:d0dfbce63a89	1693
elmot	1:d0dfbce63a89	1694
elmot	1:d0dfbce63a89	1695	/**
elmot	1:d0dfbce63a89	1696	* @}
elmot	1:d0dfbce63a89	1697	*/
elmot	1:d0dfbce63a89	1698
elmot	1:d0dfbce63a89	1699
elmot	1:d0dfbce63a89	1700	/* Exported functions --------------------------------------------------------*/
elmot	1:d0dfbce63a89	1701	/** @addtogroup ADCEx_Exported_Functions ADC Extended Exported Functions
elmot	1:d0dfbce63a89	1702	* @{
elmot	1:d0dfbce63a89	1703	*/
elmot	1:d0dfbce63a89	1704
elmot	1:d0dfbce63a89	1705	/* Initialization/de-initialization functions *********************************/
elmot	1:d0dfbce63a89	1706
elmot	1:d0dfbce63a89	1707	/** @addtogroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions
elmot	1:d0dfbce63a89	1708	* @brief Extended IO operation functions
elmot	1:d0dfbce63a89	1709	* @{
elmot	1:d0dfbce63a89	1710	*/
elmot	1:d0dfbce63a89	1711	/* I/O operation functions ****************************************************/
elmot	1:d0dfbce63a89	1712
elmot	1:d0dfbce63a89	1713	/* ADC calibration */
elmot	1:d0dfbce63a89	1714
elmot	1:d0dfbce63a89	1715	HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff);
elmot	1:d0dfbce63a89	1716	uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff);
elmot	1:d0dfbce63a89	1717	HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff, uint32_t CalibrationFactor);
elmot	1:d0dfbce63a89	1718
elmot	1:d0dfbce63a89	1719
elmot	1:d0dfbce63a89	1720
elmot	1:d0dfbce63a89	1721	/* Blocking mode: Polling */
elmot	1:d0dfbce63a89	1722	HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1723	HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1724	HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
elmot	1:d0dfbce63a89	1725
elmot	1:d0dfbce63a89	1726	/* Non-blocking mode: Interruption */
elmot	1:d0dfbce63a89	1727	HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1728	HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1729
elmot	1:d0dfbce63a89	1730
elmot	1:d0dfbce63a89	1731	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1732	/* ADC multimode */
elmot	1:d0dfbce63a89	1733	HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef hadc, uint32_t pData, uint32_t Length);
elmot	1:d0dfbce63a89	1734	HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc);
elmot	1:d0dfbce63a89	1735	uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc);
elmot	1:d0dfbce63a89	1736	#endif /* defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) */
elmot	1:d0dfbce63a89	1737
elmot	1:d0dfbce63a89	1738	/* ADC retrieve conversion value intended to be used with polling or interruption */
elmot	1:d0dfbce63a89	1739	uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
elmot	1:d0dfbce63a89	1740
elmot	1:d0dfbce63a89	1741	/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */
elmot	1:d0dfbce63a89	1742	void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1743	void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1744	void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1745	void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1746	void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1747
elmot	1:d0dfbce63a89	1748
elmot	1:d0dfbce63a89	1749	/* ADC Regular conversions stop */
elmot	1:d0dfbce63a89	1750	HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1751	HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1752	HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1753	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1754	HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1755	#endif /* defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) */
elmot	1:d0dfbce63a89	1756
elmot	1:d0dfbce63a89	1757	/**
elmot	1:d0dfbce63a89	1758	* @}
elmot	1:d0dfbce63a89	1759	*/
elmot	1:d0dfbce63a89	1760
elmot	1:d0dfbce63a89	1761	/** @addtogroup ADCEx_Exported_Functions_Group2 Extended Peripheral Control functions
elmot	1:d0dfbce63a89	1762	* @brief Extended Peripheral Control functions
elmot	1:d0dfbce63a89	1763	* @{
elmot	1:d0dfbce63a89	1764	*/
elmot	1:d0dfbce63a89	1765	/* Peripheral Control functions ***********************************************/
elmot	1:d0dfbce63a89	1766	HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
elmot	1:d0dfbce63a89	1767	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx)
elmot	1:d0dfbce63a89	1768	HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef hadc, ADC_MultiModeTypeDef multimode);
elmot	1:d0dfbce63a89	1769	#endif /* defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) */
elmot	1:d0dfbce63a89	1770	HAL_StatusTypeDef HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1771	HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1772	HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1773	HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef* hadc);
elmot	1:d0dfbce63a89	1774
elmot	1:d0dfbce63a89	1775	/**
elmot	1:d0dfbce63a89	1776	* @}
elmot	1:d0dfbce63a89	1777	*/
elmot	1:d0dfbce63a89	1778
elmot	1:d0dfbce63a89	1779	/**
elmot	1:d0dfbce63a89	1780	* @}
elmot	1:d0dfbce63a89	1781	*/
elmot	1:d0dfbce63a89	1782
elmot	1:d0dfbce63a89	1783	/**
elmot	1:d0dfbce63a89	1784	* @}
elmot	1:d0dfbce63a89	1785	*/
elmot	1:d0dfbce63a89	1786
elmot	1:d0dfbce63a89	1787	/**
elmot	1:d0dfbce63a89	1788	* @}
elmot	1:d0dfbce63a89	1789	*/
elmot	1:d0dfbce63a89	1790
elmot	1:d0dfbce63a89	1791	#ifdef __cplusplus
elmot	1:d0dfbce63a89	1792	}
elmot	1:d0dfbce63a89	1793	#endif
elmot	1:d0dfbce63a89	1794
elmot	1:d0dfbce63a89	1795	#endif /__STM32L4xx_ADC_EX_H /
elmot	1:d0dfbce63a89	1796
elmot	1:d0dfbce63a89	1797
elmot	1:d0dfbce63a89	1798	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Created:	24 Feb 2017
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HAL_L476/stm32l4xx_hal_adc_ex.h@6:0018763974d3, 2017-02-25 (annotated)

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HAL_L476/stm32l4xx_hal_adc_ex.h@6:0018763974d3, 2017-02-25 (annotated)

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