Progetto STM32 / Mbed 2 deprecated Encoder3

encoder

Dependencies:   mbed

stm32f4xx_hal_conf.h@0:5067873a2400, 2017-04-26 (annotated)

Committer:
schille
Date:
Wed Apr 26 08:26:20 2017 +0000
Revision:
0:5067873a2400
mmn

Who changed what in which revision?

UserRevisionLine numberNew contents of line
schille 0:5067873a2400 1 /**
schille 0:5067873a2400 2 ******************************************************************************
schille 0:5067873a2400 3 * @file stm32f4xx_hal_conf.h
schille 0:5067873a2400 4 * @brief HAL configuration file.
schille 0:5067873a2400 5 ******************************************************************************
schille 0:5067873a2400 6 * @attention
schille 0:5067873a2400 7 *
schille 0:5067873a2400 8 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
schille 0:5067873a2400 9 *
schille 0:5067873a2400 10 * Redistribution and use in source and binary forms, with or without modification,
schille 0:5067873a2400 11 * are permitted provided that the following conditions are met:
schille 0:5067873a2400 12 * 1. Redistributions of source code must retain the above copyright notice,
schille 0:5067873a2400 13 * this list of conditions and the following disclaimer.
schille 0:5067873a2400 14 * 2. Redistributions in binary form must reproduce the above copyright notice,
schille 0:5067873a2400 15 * this list of conditions and the following disclaimer in the documentation
schille 0:5067873a2400 16 * and/or other materials provided with the distribution.
schille 0:5067873a2400 17 * 3. Neither the name of STMicroelectronics nor the names of its contributors
schille 0:5067873a2400 18 * may be used to endorse or promote products derived from this software
schille 0:5067873a2400 19 * without specific prior written permission.
schille 0:5067873a2400 20 *
schille 0:5067873a2400 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
schille 0:5067873a2400 22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
schille 0:5067873a2400 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
schille 0:5067873a2400 24 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
schille 0:5067873a2400 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
schille 0:5067873a2400 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
schille 0:5067873a2400 27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
schille 0:5067873a2400 28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
schille 0:5067873a2400 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
schille 0:5067873a2400 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
schille 0:5067873a2400 31 *
schille 0:5067873a2400 32 ******************************************************************************
schille 0:5067873a2400 33 */
schille 0:5067873a2400 34
schille 0:5067873a2400 35 /* Define to prevent recursive inclusion -------------------------------------*/
schille 0:5067873a2400 36 #ifndef __STM32F4xx_HAL_CONF_H
schille 0:5067873a2400 37 #define __STM32F4xx_HAL_CONF_H
schille 0:5067873a2400 38
schille 0:5067873a2400 39 #ifdef __cplusplus
schille 0:5067873a2400 40 extern "C" {
schille 0:5067873a2400 41 #endif
schille 0:5067873a2400 42
schille 0:5067873a2400 43 #include "main.h"
schille 0:5067873a2400 44 /* Exported types ------------------------------------------------------------*/
schille 0:5067873a2400 45 /* Exported constants --------------------------------------------------------*/
schille 0:5067873a2400 46
schille 0:5067873a2400 47 /* ########################## Module Selection ############################## */
schille 0:5067873a2400 48 /**
schille 0:5067873a2400 49 * @brief This is the list of modules to be used in the HAL driver
schille 0:5067873a2400 50 */
schille 0:5067873a2400 51 #define HAL_MODULE_ENABLED
schille 0:5067873a2400 52
schille 0:5067873a2400 53 /* #define HAL_ADC_MODULE_ENABLED */
schille 0:5067873a2400 54 /* #define HAL_CRYP_MODULE_ENABLED */
schille 0:5067873a2400 55 /* #define HAL_CAN_MODULE_ENABLED */
schille 0:5067873a2400 56 /* #define HAL_CRC_MODULE_ENABLED */
schille 0:5067873a2400 57 /* #define HAL_CRYP_MODULE_ENABLED */
schille 0:5067873a2400 58 /* #define HAL_DAC_MODULE_ENABLED */
schille 0:5067873a2400 59 /* #define HAL_DCMI_MODULE_ENABLED */
schille 0:5067873a2400 60 /* #define HAL_DMA2D_MODULE_ENABLED */
schille 0:5067873a2400 61 /* #define HAL_ETH_MODULE_ENABLED */
schille 0:5067873a2400 62 /* #define HAL_NAND_MODULE_ENABLED */
schille 0:5067873a2400 63 /* #define HAL_NOR_MODULE_ENABLED */
schille 0:5067873a2400 64 /* #define HAL_PCCARD_MODULE_ENABLED */
schille 0:5067873a2400 65 /* #define HAL_SRAM_MODULE_ENABLED */
schille 0:5067873a2400 66 /* #define HAL_SDRAM_MODULE_ENABLED */
schille 0:5067873a2400 67 /* #define HAL_HASH_MODULE_ENABLED */
schille 0:5067873a2400 68 /* #define HAL_I2C_MODULE_ENABLED */
schille 0:5067873a2400 69 /* #define HAL_I2S_MODULE_ENABLED */
schille 0:5067873a2400 70 /* #define HAL_IWDG_MODULE_ENABLED */
schille 0:5067873a2400 71 /* #define HAL_LTDC_MODULE_ENABLED */
schille 0:5067873a2400 72 /* #define HAL_RNG_MODULE_ENABLED */
schille 0:5067873a2400 73 /* #define HAL_RTC_MODULE_ENABLED */
schille 0:5067873a2400 74 /* #define HAL_SAI_MODULE_ENABLED */
schille 0:5067873a2400 75 /* #define HAL_SD_MODULE_ENABLED */
schille 0:5067873a2400 76 /* #define HAL_MMC_MODULE_ENABLED */
schille 0:5067873a2400 77 /* #define HAL_SPI_MODULE_ENABLED */
schille 0:5067873a2400 78 #define HAL_TIM_MODULE_ENABLED
schille 0:5067873a2400 79 /* #define HAL_UART_MODULE_ENABLED */
schille 0:5067873a2400 80 /* #define HAL_USART_MODULE_ENABLED */
schille 0:5067873a2400 81 /* #define HAL_IRDA_MODULE_ENABLED */
schille 0:5067873a2400 82 /* #define HAL_SMARTCARD_MODULE_ENABLED */
schille 0:5067873a2400 83 /* #define HAL_WWDG_MODULE_ENABLED */
schille 0:5067873a2400 84 /* #define HAL_PCD_MODULE_ENABLED */
schille 0:5067873a2400 85 /* #define HAL_HCD_MODULE_ENABLED */
schille 0:5067873a2400 86 /* #define HAL_DSI_MODULE_ENABLED */
schille 0:5067873a2400 87 /* #define HAL_QSPI_MODULE_ENABLED */
schille 0:5067873a2400 88 /* #define HAL_QSPI_MODULE_ENABLED */
schille 0:5067873a2400 89 /* #define HAL_CEC_MODULE_ENABLED */
schille 0:5067873a2400 90 /* #define HAL_FMPI2C_MODULE_ENABLED */
schille 0:5067873a2400 91 /* #define HAL_SPDIFRX_MODULE_ENABLED */
schille 0:5067873a2400 92 /* #define HAL_DFSDM_MODULE_ENABLED */
schille 0:5067873a2400 93 /* #define HAL_LPTIM_MODULE_ENABLED */
schille 0:5067873a2400 94 #define HAL_GPIO_MODULE_ENABLED
schille 0:5067873a2400 95 #define HAL_DMA_MODULE_ENABLED
schille 0:5067873a2400 96 #define HAL_RCC_MODULE_ENABLED
schille 0:5067873a2400 97 #define HAL_FLASH_MODULE_ENABLED
schille 0:5067873a2400 98 #define HAL_PWR_MODULE_ENABLED
schille 0:5067873a2400 99 #define HAL_CORTEX_MODULE_ENABLED
schille 0:5067873a2400 100
schille 0:5067873a2400 101 /* ########################## HSE/HSI Values adaptation ##################### */
schille 0:5067873a2400 102 /**
schille 0:5067873a2400 103 * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
schille 0:5067873a2400 104 * This value is used by the RCC HAL module to compute the system frequency
schille 0:5067873a2400 105 * (when HSE is used as system clock source, directly or through the PLL).
schille 0:5067873a2400 106 */
schille 0:5067873a2400 107 #if !defined (HSE_VALUE)
schille 0:5067873a2400 108 #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
schille 0:5067873a2400 109 #endif /* HSE_VALUE */
schille 0:5067873a2400 110
schille 0:5067873a2400 111 #if !defined (HSE_STARTUP_TIMEOUT)
schille 0:5067873a2400 112 #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
schille 0:5067873a2400 113 #endif /* HSE_STARTUP_TIMEOUT */
schille 0:5067873a2400 114
schille 0:5067873a2400 115 /**
schille 0:5067873a2400 116 * @brief Internal High Speed oscillator (HSI) value.
schille 0:5067873a2400 117 * This value is used by the RCC HAL module to compute the system frequency
schille 0:5067873a2400 118 * (when HSI is used as system clock source, directly or through the PLL).
schille 0:5067873a2400 119 */
schille 0:5067873a2400 120 #if !defined (HSI_VALUE)
schille 0:5067873a2400 121 #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
schille 0:5067873a2400 122 #endif /* HSI_VALUE */
schille 0:5067873a2400 123
schille 0:5067873a2400 124 /**
schille 0:5067873a2400 125 * @brief Internal Low Speed oscillator (LSI) value.
schille 0:5067873a2400 126 */
schille 0:5067873a2400 127 #if !defined (LSI_VALUE)
schille 0:5067873a2400 128 #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/
schille 0:5067873a2400 129 #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
schille 0:5067873a2400 130 The real value may vary depending on the variations
schille 0:5067873a2400 131 in voltage and temperature.*/
schille 0:5067873a2400 132 /**
schille 0:5067873a2400 133 * @brief External Low Speed oscillator (LSE) value.
schille 0:5067873a2400 134 */
schille 0:5067873a2400 135 #if !defined (LSE_VALUE)
schille 0:5067873a2400 136 #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */
schille 0:5067873a2400 137 #endif /* LSE_VALUE */
schille 0:5067873a2400 138
schille 0:5067873a2400 139 #if !defined (LSE_STARTUP_TIMEOUT)
schille 0:5067873a2400 140 #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
schille 0:5067873a2400 141 #endif /* LSE_STARTUP_TIMEOUT */
schille 0:5067873a2400 142
schille 0:5067873a2400 143 /**
schille 0:5067873a2400 144 * @brief External clock source for I2S peripheral
schille 0:5067873a2400 145 * This value is used by the I2S HAL module to compute the I2S clock source
schille 0:5067873a2400 146 * frequency, this source is inserted directly through I2S_CKIN pad.
schille 0:5067873a2400 147 */
schille 0:5067873a2400 148 #if !defined (EXTERNAL_CLOCK_VALUE)
schille 0:5067873a2400 149 #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/
schille 0:5067873a2400 150 #endif /* EXTERNAL_CLOCK_VALUE */
schille 0:5067873a2400 151
schille 0:5067873a2400 152 /* Tip: To avoid modifying this file each time you need to use different HSE,
schille 0:5067873a2400 153 === you can define the HSE value in your toolchain compiler preprocessor. */
schille 0:5067873a2400 154
schille 0:5067873a2400 155 /* ########################### System Configuration ######################### */
schille 0:5067873a2400 156 /**
schille 0:5067873a2400 157 * @brief This is the HAL system configuration section
schille 0:5067873a2400 158 */
schille 0:5067873a2400 159 #define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */
schille 0:5067873a2400 160 #define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */
schille 0:5067873a2400 161 #define USE_RTOS 0U
schille 0:5067873a2400 162 #define PREFETCH_ENABLE 1U
schille 0:5067873a2400 163 #define INSTRUCTION_CACHE_ENABLE 1U
schille 0:5067873a2400 164 #define DATA_CACHE_ENABLE 1U
schille 0:5067873a2400 165
schille 0:5067873a2400 166 /* ########################## Assert Selection ############################## */
schille 0:5067873a2400 167 /**
schille 0:5067873a2400 168 * @brief Uncomment the line below to expanse the "assert_param" macro in the
schille 0:5067873a2400 169 * HAL drivers code
schille 0:5067873a2400 170 */
schille 0:5067873a2400 171 /* #define USE_FULL_ASSERT 1U */
schille 0:5067873a2400 172
schille 0:5067873a2400 173 /* ################## Ethernet peripheral configuration ##################### */
schille 0:5067873a2400 174
schille 0:5067873a2400 175 /* Section 1 : Ethernet peripheral configuration */
schille 0:5067873a2400 176
schille 0:5067873a2400 177 /* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
schille 0:5067873a2400 178 #define MAC_ADDR0 2U
schille 0:5067873a2400 179 #define MAC_ADDR1 0U
schille 0:5067873a2400 180 #define MAC_ADDR2 0U
schille 0:5067873a2400 181 #define MAC_ADDR3 0U
schille 0:5067873a2400 182 #define MAC_ADDR4 0U
schille 0:5067873a2400 183 #define MAC_ADDR5 0U
schille 0:5067873a2400 184
schille 0:5067873a2400 185 /* Definition of the Ethernet driver buffers size and count */
schille 0:5067873a2400 186 #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
schille 0:5067873a2400 187 #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
schille 0:5067873a2400 188 #define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
schille 0:5067873a2400 189 #define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
schille 0:5067873a2400 190
schille 0:5067873a2400 191 /* Section 2: PHY configuration section */
schille 0:5067873a2400 192
schille 0:5067873a2400 193 /* DP83848_PHY_ADDRESS Address*/
schille 0:5067873a2400 194 #define DP83848_PHY_ADDRESS 0x01U
schille 0:5067873a2400 195 /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
schille 0:5067873a2400 196 #define PHY_RESET_DELAY ((uint32_t)0x000000FFU)
schille 0:5067873a2400 197 /* PHY Configuration delay */
schille 0:5067873a2400 198 #define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU)
schille 0:5067873a2400 199
schille 0:5067873a2400 200 #define PHY_READ_TO ((uint32_t)0x0000FFFFU)
schille 0:5067873a2400 201 #define PHY_WRITE_TO ((uint32_t)0x0000FFFFU)
schille 0:5067873a2400 202
schille 0:5067873a2400 203 /* Section 3: Common PHY Registers */
schille 0:5067873a2400 204
schille 0:5067873a2400 205 #define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
schille 0:5067873a2400 206 #define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
schille 0:5067873a2400 207
schille 0:5067873a2400 208 #define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
schille 0:5067873a2400 209 #define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
schille 0:5067873a2400 210 #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
schille 0:5067873a2400 211 #define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
schille 0:5067873a2400 212 #define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
schille 0:5067873a2400 213 #define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
schille 0:5067873a2400 214 #define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
schille 0:5067873a2400 215 #define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
schille 0:5067873a2400 216 #define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
schille 0:5067873a2400 217 #define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */
schille 0:5067873a2400 218
schille 0:5067873a2400 219 #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
schille 0:5067873a2400 220 #define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
schille 0:5067873a2400 221 #define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
schille 0:5067873a2400 222
schille 0:5067873a2400 223 /* Section 4: Extended PHY Registers */
schille 0:5067873a2400 224 #define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
schille 0:5067873a2400 225
schille 0:5067873a2400 226 #define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
schille 0:5067873a2400 227 #define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
schille 0:5067873a2400 228
schille 0:5067873a2400 229 /* ################## SPI peripheral configuration ########################## */
schille 0:5067873a2400 230
schille 0:5067873a2400 231 /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
schille 0:5067873a2400 232 * Activated: CRC code is present inside driver
schille 0:5067873a2400 233 * Deactivated: CRC code cleaned from driver
schille 0:5067873a2400 234 */
schille 0:5067873a2400 235
schille 0:5067873a2400 236 #define USE_SPI_CRC 0U
schille 0:5067873a2400 237
schille 0:5067873a2400 238 /* Includes ------------------------------------------------------------------*/
schille 0:5067873a2400 239 /**
schille 0:5067873a2400 240 * @brief Include module's header file
schille 0:5067873a2400 241 */
schille 0:5067873a2400 242
schille 0:5067873a2400 243 #ifdef HAL_RCC_MODULE_ENABLED
schille 0:5067873a2400 244 #include "stm32f4xx_hal_rcc.h"
schille 0:5067873a2400 245 #endif /* HAL_RCC_MODULE_ENABLED */
schille 0:5067873a2400 246
schille 0:5067873a2400 247 #ifdef HAL_GPIO_MODULE_ENABLED
schille 0:5067873a2400 248 #include "stm32f4xx_hal_gpio.h"
schille 0:5067873a2400 249 #endif /* HAL_GPIO_MODULE_ENABLED */
schille 0:5067873a2400 250
schille 0:5067873a2400 251 #ifdef HAL_DMA_MODULE_ENABLED
schille 0:5067873a2400 252 #include "stm32f4xx_hal_dma.h"
schille 0:5067873a2400 253 #endif /* HAL_DMA_MODULE_ENABLED */
schille 0:5067873a2400 254
schille 0:5067873a2400 255 #ifdef HAL_CORTEX_MODULE_ENABLED
schille 0:5067873a2400 256 #include "stm32f4xx_hal_cortex.h"
schille 0:5067873a2400 257 #endif /* HAL_CORTEX_MODULE_ENABLED */
schille 0:5067873a2400 258
schille 0:5067873a2400 259 #ifdef HAL_ADC_MODULE_ENABLED
schille 0:5067873a2400 260 #include "stm32f4xx_hal_adc.h"
schille 0:5067873a2400 261 #endif /* HAL_ADC_MODULE_ENABLED */
schille 0:5067873a2400 262
schille 0:5067873a2400 263 #ifdef HAL_CAN_MODULE_ENABLED
schille 0:5067873a2400 264 #include "stm32f4xx_hal_can.h"
schille 0:5067873a2400 265 #endif /* HAL_CAN_MODULE_ENABLED */
schille 0:5067873a2400 266
schille 0:5067873a2400 267 #ifdef HAL_CRC_MODULE_ENABLED
schille 0:5067873a2400 268 #include "stm32f4xx_hal_crc.h"
schille 0:5067873a2400 269 #endif /* HAL_CRC_MODULE_ENABLED */
schille 0:5067873a2400 270
schille 0:5067873a2400 271 #ifdef HAL_CRYP_MODULE_ENABLED
schille 0:5067873a2400 272 #include "stm32f4xx_hal_cryp.h"
schille 0:5067873a2400 273 #endif /* HAL_CRYP_MODULE_ENABLED */
schille 0:5067873a2400 274
schille 0:5067873a2400 275 #ifdef HAL_DMA2D_MODULE_ENABLED
schille 0:5067873a2400 276 #include "stm32f4xx_hal_dma2d.h"
schille 0:5067873a2400 277 #endif /* HAL_DMA2D_MODULE_ENABLED */
schille 0:5067873a2400 278
schille 0:5067873a2400 279 #ifdef HAL_DAC_MODULE_ENABLED
schille 0:5067873a2400 280 #include "stm32f4xx_hal_dac.h"
schille 0:5067873a2400 281 #endif /* HAL_DAC_MODULE_ENABLED */
schille 0:5067873a2400 282
schille 0:5067873a2400 283 #ifdef HAL_DCMI_MODULE_ENABLED
schille 0:5067873a2400 284 #include "stm32f4xx_hal_dcmi.h"
schille 0:5067873a2400 285 #endif /* HAL_DCMI_MODULE_ENABLED */
schille 0:5067873a2400 286
schille 0:5067873a2400 287 #ifdef HAL_ETH_MODULE_ENABLED
schille 0:5067873a2400 288 #include "stm32f4xx_hal_eth.h"
schille 0:5067873a2400 289 #endif /* HAL_ETH_MODULE_ENABLED */
schille 0:5067873a2400 290
schille 0:5067873a2400 291 #ifdef HAL_FLASH_MODULE_ENABLED
schille 0:5067873a2400 292 #include "stm32f4xx_hal_flash.h"
schille 0:5067873a2400 293 #endif /* HAL_FLASH_MODULE_ENABLED */
schille 0:5067873a2400 294
schille 0:5067873a2400 295 #ifdef HAL_SRAM_MODULE_ENABLED
schille 0:5067873a2400 296 #include "stm32f4xx_hal_sram.h"
schille 0:5067873a2400 297 #endif /* HAL_SRAM_MODULE_ENABLED */
schille 0:5067873a2400 298
schille 0:5067873a2400 299 #ifdef HAL_NOR_MODULE_ENABLED
schille 0:5067873a2400 300 #include "stm32f4xx_hal_nor.h"
schille 0:5067873a2400 301 #endif /* HAL_NOR_MODULE_ENABLED */
schille 0:5067873a2400 302
schille 0:5067873a2400 303 #ifdef HAL_NAND_MODULE_ENABLED
schille 0:5067873a2400 304 #include "stm32f4xx_hal_nand.h"
schille 0:5067873a2400 305 #endif /* HAL_NAND_MODULE_ENABLED */
schille 0:5067873a2400 306
schille 0:5067873a2400 307 #ifdef HAL_PCCARD_MODULE_ENABLED
schille 0:5067873a2400 308 #include "stm32f4xx_hal_pccard.h"
schille 0:5067873a2400 309 #endif /* HAL_PCCARD_MODULE_ENABLED */
schille 0:5067873a2400 310
schille 0:5067873a2400 311 #ifdef HAL_SDRAM_MODULE_ENABLED
schille 0:5067873a2400 312 #include "stm32f4xx_hal_sdram.h"
schille 0:5067873a2400 313 #endif /* HAL_SDRAM_MODULE_ENABLED */
schille 0:5067873a2400 314
schille 0:5067873a2400 315 #ifdef HAL_HASH_MODULE_ENABLED
schille 0:5067873a2400 316 #include "stm32f4xx_hal_hash.h"
schille 0:5067873a2400 317 #endif /* HAL_HASH_MODULE_ENABLED */
schille 0:5067873a2400 318
schille 0:5067873a2400 319 #ifdef HAL_I2C_MODULE_ENABLED
schille 0:5067873a2400 320 #include "stm32f4xx_hal_i2c.h"
schille 0:5067873a2400 321 #endif /* HAL_I2C_MODULE_ENABLED */
schille 0:5067873a2400 322
schille 0:5067873a2400 323 #ifdef HAL_I2S_MODULE_ENABLED
schille 0:5067873a2400 324 #include "stm32f4xx_hal_i2s.h"
schille 0:5067873a2400 325 #endif /* HAL_I2S_MODULE_ENABLED */
schille 0:5067873a2400 326
schille 0:5067873a2400 327 #ifdef HAL_IWDG_MODULE_ENABLED
schille 0:5067873a2400 328 #include "stm32f4xx_hal_iwdg.h"
schille 0:5067873a2400 329 #endif /* HAL_IWDG_MODULE_ENABLED */
schille 0:5067873a2400 330
schille 0:5067873a2400 331 #ifdef HAL_LTDC_MODULE_ENABLED
schille 0:5067873a2400 332 #include "stm32f4xx_hal_ltdc.h"
schille 0:5067873a2400 333 #endif /* HAL_LTDC_MODULE_ENABLED */
schille 0:5067873a2400 334
schille 0:5067873a2400 335 #ifdef HAL_PWR_MODULE_ENABLED
schille 0:5067873a2400 336 #include "stm32f4xx_hal_pwr.h"
schille 0:5067873a2400 337 #endif /* HAL_PWR_MODULE_ENABLED */
schille 0:5067873a2400 338
schille 0:5067873a2400 339 #ifdef HAL_RNG_MODULE_ENABLED
schille 0:5067873a2400 340 #include "stm32f4xx_hal_rng.h"
schille 0:5067873a2400 341 #endif /* HAL_RNG_MODULE_ENABLED */
schille 0:5067873a2400 342
schille 0:5067873a2400 343 #ifdef HAL_RTC_MODULE_ENABLED
schille 0:5067873a2400 344 #include "stm32f4xx_hal_rtc.h"
schille 0:5067873a2400 345 #endif /* HAL_RTC_MODULE_ENABLED */
schille 0:5067873a2400 346
schille 0:5067873a2400 347 #ifdef HAL_SAI_MODULE_ENABLED
schille 0:5067873a2400 348 #include "stm32f4xx_hal_sai.h"
schille 0:5067873a2400 349 #endif /* HAL_SAI_MODULE_ENABLED */
schille 0:5067873a2400 350
schille 0:5067873a2400 351 #ifdef HAL_SD_MODULE_ENABLED
schille 0:5067873a2400 352 #include "stm32f4xx_hal_sd.h"
schille 0:5067873a2400 353 #endif /* HAL_SD_MODULE_ENABLED */
schille 0:5067873a2400 354
schille 0:5067873a2400 355 #ifdef HAL_MMC_MODULE_ENABLED
schille 0:5067873a2400 356 #include "stm32f4xx_hal_mmc.h"
schille 0:5067873a2400 357 #endif /* HAL_MMC_MODULE_ENABLED */
schille 0:5067873a2400 358
schille 0:5067873a2400 359 #ifdef HAL_SPI_MODULE_ENABLED
schille 0:5067873a2400 360 #include "stm32f4xx_hal_spi.h"
schille 0:5067873a2400 361 #endif /* HAL_SPI_MODULE_ENABLED */
schille 0:5067873a2400 362
schille 0:5067873a2400 363 #ifdef HAL_TIM_MODULE_ENABLED
schille 0:5067873a2400 364 #include "stm32f4xx_hal_tim.h"
schille 0:5067873a2400 365 #endif /* HAL_TIM_MODULE_ENABLED */
schille 0:5067873a2400 366
schille 0:5067873a2400 367 #ifdef HAL_UART_MODULE_ENABLED
schille 0:5067873a2400 368 #include "stm32f4xx_hal_uart.h"
schille 0:5067873a2400 369 #endif /* HAL_UART_MODULE_ENABLED */
schille 0:5067873a2400 370
schille 0:5067873a2400 371 #ifdef HAL_USART_MODULE_ENABLED
schille 0:5067873a2400 372 #include "stm32f4xx_hal_usart.h"
schille 0:5067873a2400 373 #endif /* HAL_USART_MODULE_ENABLED */
schille 0:5067873a2400 374
schille 0:5067873a2400 375 #ifdef HAL_IRDA_MODULE_ENABLED
schille 0:5067873a2400 376 #include "stm32f4xx_hal_irda.h"
schille 0:5067873a2400 377 #endif /* HAL_IRDA_MODULE_ENABLED */
schille 0:5067873a2400 378
schille 0:5067873a2400 379 #ifdef HAL_SMARTCARD_MODULE_ENABLED
schille 0:5067873a2400 380 #include "stm32f4xx_hal_smartcard.h"
schille 0:5067873a2400 381 #endif /* HAL_SMARTCARD_MODULE_ENABLED */
schille 0:5067873a2400 382
schille 0:5067873a2400 383 #ifdef HAL_WWDG_MODULE_ENABLED
schille 0:5067873a2400 384 #include "stm32f4xx_hal_wwdg.h"
schille 0:5067873a2400 385 #endif /* HAL_WWDG_MODULE_ENABLED */
schille 0:5067873a2400 386
schille 0:5067873a2400 387 #ifdef HAL_PCD_MODULE_ENABLED
schille 0:5067873a2400 388 #include "stm32f4xx_hal_pcd.h"
schille 0:5067873a2400 389 #endif /* HAL_PCD_MODULE_ENABLED */
schille 0:5067873a2400 390
schille 0:5067873a2400 391 #ifdef HAL_HCD_MODULE_ENABLED
schille 0:5067873a2400 392 #include "stm32f4xx_hal_hcd.h"
schille 0:5067873a2400 393 #endif /* HAL_HCD_MODULE_ENABLED */
schille 0:5067873a2400 394
schille 0:5067873a2400 395 #ifdef HAL_DSI_MODULE_ENABLED
schille 0:5067873a2400 396 #include "stm32f4xx_hal_dsi.h"
schille 0:5067873a2400 397 #endif /* HAL_DSI_MODULE_ENABLED */
schille 0:5067873a2400 398
schille 0:5067873a2400 399 #ifdef HAL_QSPI_MODULE_ENABLED
schille 0:5067873a2400 400 #include "stm32f4xx_hal_qspi.h"
schille 0:5067873a2400 401 #endif /* HAL_QSPI_MODULE_ENABLED */
schille 0:5067873a2400 402
schille 0:5067873a2400 403 #ifdef HAL_CEC_MODULE_ENABLED
schille 0:5067873a2400 404 #include "stm32f4xx_hal_cec.h"
schille 0:5067873a2400 405 #endif /* HAL_CEC_MODULE_ENABLED */
schille 0:5067873a2400 406
schille 0:5067873a2400 407 #ifdef HAL_FMPI2C_MODULE_ENABLED
schille 0:5067873a2400 408 #include "stm32f4xx_hal_fmpi2c.h"
schille 0:5067873a2400 409 #endif /* HAL_FMPI2C_MODULE_ENABLED */
schille 0:5067873a2400 410
schille 0:5067873a2400 411 #ifdef HAL_SPDIFRX_MODULE_ENABLED
schille 0:5067873a2400 412 #include "stm32f4xx_hal_spdifrx.h"
schille 0:5067873a2400 413 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
schille 0:5067873a2400 414
schille 0:5067873a2400 415 #ifdef HAL_DFSDM_MODULE_ENABLED
schille 0:5067873a2400 416 #include "stm32f4xx_hal_dfsdm.h"
schille 0:5067873a2400 417 #endif /* HAL_DFSDM_MODULE_ENABLED */
schille 0:5067873a2400 418
schille 0:5067873a2400 419 #ifdef HAL_LPTIM_MODULE_ENABLED
schille 0:5067873a2400 420 #include "stm32f4xx_hal_lptim.h"
schille 0:5067873a2400 421 #endif /* HAL_LPTIM_MODULE_ENABLED */
schille 0:5067873a2400 422
schille 0:5067873a2400 423 /* Exported macro ------------------------------------------------------------*/
schille 0:5067873a2400 424 #ifdef USE_FULL_ASSERT
schille 0:5067873a2400 425 /**
schille 0:5067873a2400 426 * @brief The assert_param macro is used for function's parameters check.
schille 0:5067873a2400 427 * @param expr: If expr is false, it calls assert_failed function
schille 0:5067873a2400 428 * which reports the name of the source file and the source
schille 0:5067873a2400 429 * line number of the call that failed.
schille 0:5067873a2400 430 * If expr is true, it returns no value.
schille 0:5067873a2400 431 * @retval None
schille 0:5067873a2400 432 */
schille 0:5067873a2400 433 #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
schille 0:5067873a2400 434 /* Exported functions ------------------------------------------------------- */
schille 0:5067873a2400 435 void assert_failed(uint8_t* file, uint32_t line);
schille 0:5067873a2400 436 #else
schille 0:5067873a2400 437 #define assert_param(expr) ((void)0U)
schille 0:5067873a2400 438 #endif /* USE_FULL_ASSERT */
schille 0:5067873a2400 439
schille 0:5067873a2400 440 #ifdef __cplusplus
schille 0:5067873a2400 441 }
schille 0:5067873a2400 442 #endif
schille 0:5067873a2400 443
schille 0:5067873a2400 444 #endif /* __STM32F4xx_HAL_CONF_H */
schille 0:5067873a2400 445
schille 0:5067873a2400 446
schille 0:5067873a2400 447 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
schille 0:5067873a2400 448