This program demonstrates the usage of the ADC. Program sets pin P1.31 as an ADC chanel 5 input to which we connect the potentiometer. Program then turns on an embedded LED on the LPC4088 QSB when the potentiometer's digital value exceeds the middle value.

Dependencies:   mbed

Committer:
71GA
Date:
Sat May 02 17:33:44 2015 +0000
Revision:
0:3b7f012600ec
This is the first commit of this program.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
71GA 0:3b7f012600ec 1 #include "LPC4088-ioconfig.h"
71GA 0:3b7f012600ec 2 #include "LPC4088-system.h"
71GA 0:3b7f012600ec 3 #include "LPC4088-gpio.h"
71GA 0:3b7f012600ec 4 #include "LPC4088-adc.h"
71GA 0:3b7f012600ec 5
71GA 0:3b7f012600ec 6 int main(){
71GA 0:3b7f012600ec 7
71GA 0:3b7f012600ec 8 //nastavitev P1.13 kot GPIO, no pull-up, no hysteresis, not inverted, standard, push-pull
71GA 0:3b7f012600ec 9 IOCON_P1_13 &= !(0x67F);
71GA 0:3b7f012600ec 10
71GA 0:3b7f012600ec 11 //pin P1.31 skonfiguriramo kot vhod ADC[5]
71GA 0:3b7f012600ec 12 IOCON_P1_31 |= 0x3;
71GA 0:3b7f012600ec 13
71GA 0:3b7f012600ec 14 //pin P1.31 skonfiguriramo kot no pullup/pulldown
71GA 0:3b7f012600ec 15 IOCON_P1_31 &= !(0x3<<4);
71GA 0:3b7f012600ec 16
71GA 0:3b7f012600ec 17 //pin P1.31 skonfiguriramo za ADMODE
71GA 0:3b7f012600ec 18 IOCON_P1_31 &= !(1<<7);
71GA 0:3b7f012600ec 19
71GA 0:3b7f012600ec 20 //pin P0.23 skonfiguriramo kot vhod ADC[0]
71GA 0:3b7f012600ec 21 IOCON_P0_23 |= 0x3;
71GA 0:3b7f012600ec 22
71GA 0:3b7f012600ec 23 //pin P0.23 skonfiguriramo kot no pullup/pulldown
71GA 0:3b7f012600ec 24 IOCON_P0_23 &= !(0x3<<4);
71GA 0:3b7f012600ec 25
71GA 0:3b7f012600ec 26 //pin P0.23 skonfiguriramo za ADMODE
71GA 0:3b7f012600ec 27 IOCON_P0_23 &= !(1<<7);
71GA 0:3b7f012600ec 28
71GA 0:3b7f012600ec 29
71GA 0:3b7f012600ec 30
71GA 0:3b7f012600ec 31 //vklop GPIO periferije (nepotrebno)
71GA 0:3b7f012600ec 32 PCONP |= (1<<15);
71GA 0:3b7f012600ec 33
71GA 0:3b7f012600ec 34 //nastavitev P1.13 kot output
71GA 0:3b7f012600ec 35 DIR1 |= (1<<13);
71GA 0:3b7f012600ec 36
71GA 0:3b7f012600ec 37 //nastavitev P1.13 maske
71GA 0:3b7f012600ec 38 MASK1 &= !(1<<13);
71GA 0:3b7f012600ec 39
71GA 0:3b7f012600ec 40
71GA 0:3b7f012600ec 41
71GA 0:3b7f012600ec 42
71GA 0:3b7f012600ec 43
71GA 0:3b7f012600ec 44 //vklop ADC periferije
71GA 0:3b7f012600ec 45 PCONP |= (1<<12);
71GA 0:3b7f012600ec 46
71GA 0:3b7f012600ec 47 //PCLK delimo z 99+1=100
71GA 0:3b7f012600ec 48 //CR |= (99<<8);
71GA 0:3b7f012600ec 49
71GA 0:3b7f012600ec 50 //izklopimo ADC interrupte
71GA 0:3b7f012600ec 51 INTEN &= !(0x1FF);
71GA 0:3b7f012600ec 52
71GA 0:3b7f012600ec 53 //pred izbiro "burst mode" moramo izklopiti konverzijo
71GA 0:3b7f012600ec 54 CR &= !(0x7<<24);
71GA 0:3b7f012600ec 55
71GA 0:3b7f012600ec 56 //izberemo "burst mode" - konverzija se stalno vrši
71GA 0:3b7f012600ec 57 //CR |= (1<<16);
71GA 0:3b7f012600ec 58
71GA 0:3b7f012600ec 59 //izberemo "software mode" - konverzija se vrši na ukaz
71GA 0:3b7f012600ec 60 CR &= !(1<<16);
71GA 0:3b7f012600ec 61
71GA 0:3b7f012600ec 62 //izberemo, kateri kanal bomo brali
71GA 0:3b7f012600ec 63 //CR |= (1<<5);
71GA 0:3b7f012600ec 64 //CR &= !(1<<0);
71GA 0:3b7f012600ec 65
71GA 0:3b7f012600ec 66
71GA 0:3b7f012600ec 67 while(1){
71GA 0:3b7f012600ec 68
71GA 0:3b7f012600ec 69 //vklopimo ADC (moramo vklopiti po nastavitvah)
71GA 0:3b7f012600ec 70 CR |= (1<<21);
71GA 0:3b7f012600ec 71
71GA 0:3b7f012600ec 72 //zaženemo konverzijo
71GA 0:3b7f012600ec 73 CR |= (0x1<<24);
71GA 0:3b7f012600ec 74
71GA 0:3b7f012600ec 75 //pocakamo na konec konverzije in shranimo rezultat
71GA 0:3b7f012600ec 76 while( (STAT & (1<<0) ) == 0x0 );
71GA 0:3b7f012600ec 77
71GA 0:3b7f012600ec 78 //ustavimo konverzijo
71GA 0:3b7f012600ec 79 CR &= !(0x1<<24);
71GA 0:3b7f012600ec 80
71GA 0:3b7f012600ec 81 unsigned int result = 0;
71GA 0:3b7f012600ec 82 result = ( (DR0 & 0xFFF0) >> 4); //this clears DONE bit
71GA 0:3b7f012600ec 83
71GA 0:3b7f012600ec 84 //izklopimo ADC
71GA 0:3b7f012600ec 85 CR &= (1<<21);
71GA 0:3b7f012600ec 86
71GA 0:3b7f012600ec 87 if (result > 0x7FF){
71GA 0:3b7f012600ec 88 //prizgemo P1.13
71GA 0:3b7f012600ec 89 SET1 |= (1<<13);
71GA 0:3b7f012600ec 90 }
71GA 0:3b7f012600ec 91 else{
71GA 0:3b7f012600ec 92 //ugasnemo P1.13
71GA 0:3b7f012600ec 93 CLR1 |= (1<<13);
71GA 0:3b7f012600ec 94 }
71GA 0:3b7f012600ec 95 }
71GA 0:3b7f012600ec 96 }
71GA 0:3b7f012600ec 97