Šolski center Kranj / Mbed 2 deprecated 004-timer

Program which demonstrates the usage of the TIMER peripheral. Program sets TIMER 2 to blink the LED on the pin P0.9. This is a more sophisticated way of blinking an LED.

Dependencies:   mbed

LPC4088-gpio.h@0:e83c998e1cfd, 2015-05-02 (annotated)

Committer:
71GA
Date:
Sat May 02 17:25:32 2015 +0000
Revision:
0:e83c998e1cfd
First commit of this program.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
71GA 0:e83c998e1cfd 1 //definicija registrov za periferijo GPIO
71GA 0:e83c998e1cfd 2
71GA 0:e83c998e1cfd 3 //GPIO
71GA 0:e83c998e1cfd 4 #define DIR0 (*((volatile unsigned int *) 0x20098000)) //Port0
71GA 0:e83c998e1cfd 5 #define MASK0 (*((volatile unsigned int *) 0x20098010))
71GA 0:e83c998e1cfd 6 #define PIN0 (*((volatile unsigned int *) 0x20098014))
71GA 0:e83c998e1cfd 7 #define SET0 (*((volatile unsigned int *) 0x20098018))
71GA 0:e83c998e1cfd 8 #define CLR0 (*((volatile unsigned int *) 0x2009801C))
71GA 0:e83c998e1cfd 9
71GA 0:e83c998e1cfd 10 #define DIR1 (*((volatile unsigned int *) 0x20098020)) //Port1
71GA 0:e83c998e1cfd 11 #define MASK1 (*((volatile unsigned int *) 0x20098030))
71GA 0:e83c998e1cfd 12 #define PIN1 (*((volatile unsigned int *) 0x20098034))
71GA 0:e83c998e1cfd 13 #define SET1 (*((volatile unsigned int *) 0x20098038))
71GA 0:e83c998e1cfd 14 #define CLR1 (*((volatile unsigned int *) 0x2009803C))
71GA 0:e83c998e1cfd 15
71GA 0:e83c998e1cfd 16 #define DIR2 (*((volatile unsigned int *) 0x20098040)) //Port2
71GA 0:e83c998e1cfd 17 #define MASK2 (*((volatile unsigned int *) 0x20098050))
71GA 0:e83c998e1cfd 18 #define PIN2 (*((volatile unsigned int *) 0x20098054))
71GA 0:e83c998e1cfd 19 #define SET2 (*((volatile unsigned int *) 0x20098058))
71GA 0:e83c998e1cfd 20 #define CLR2 (*((volatile unsigned int *) 0x2009805C))
71GA 0:e83c998e1cfd 21
71GA 0:e83c998e1cfd 22 #define DIR3 (*((volatile unsigned int *) 0x20098060)) //Port3
71GA 0:e83c998e1cfd 23 #define MASK3 (*((volatile unsigned int *) 0x20098070))
71GA 0:e83c998e1cfd 24 #define PIN3 (*((volatile unsigned int *) 0x20098074))
71GA 0:e83c998e1cfd 25 #define SET3 (*((volatile unsigned int *) 0x20098078))
71GA 0:e83c998e1cfd 26 #define CLR3 (*((volatile unsigned int *) 0x2009807C))
71GA 0:e83c998e1cfd 27
71GA 0:e83c998e1cfd 28 #define DIR4 (*((volatile unsigned int *) 0x20098080)) //Port4
71GA 0:e83c998e1cfd 29 #define MASK4 (*((volatile unsigned int *) 0x20098090))
71GA 0:e83c998e1cfd 30 #define PIN4 (*((volatile unsigned int *) 0x20098094))
71GA 0:e83c998e1cfd 31 #define SET4 (*((volatile unsigned int *) 0x20098098))
71GA 0:e83c998e1cfd 32 #define CLR4 (*((volatile unsigned int *) 0x2009809C))
71GA 0:e83c998e1cfd 33
71GA 0:e83c998e1cfd 34 #define DIR5 (*((volatile unsigned int *) 0x200980A0)) //Port5
71GA 0:e83c998e1cfd 35 #define MASK5 (*((volatile unsigned int *) 0x200980B0))
71GA 0:e83c998e1cfd 36 #define PIN5 (*((volatile unsigned int *) 0x200980B4))
71GA 0:e83c998e1cfd 37 #define SET5 (*((volatile unsigned int *) 0x200980B8))
71GA 0:e83c998e1cfd 38 #define CLR5 (*((volatile unsigned int *) 0x200980BC))
71GA 0:e83c998e1cfd 39
71GA 0:e83c998e1cfd 40
71GA 0:e83c998e1cfd 41 //GPIO interrupts
71GA 0:e83c998e1cfd 42 #define int_STATUS (*((volatile unsigned int *) 0x40028080))
71GA 0:e83c998e1cfd 43 #define int_STATR0 (*((volatile unsigned int *) 0x40028084))
71GA 0:e83c998e1cfd 44 #define int_STATF0 (*((volatile unsigned int *) 0x40028088))
71GA 0:e83c998e1cfd 45 #define int_CLR0 (*((volatile unsigned int *) 0x4002808C))
71GA 0:e83c998e1cfd 46 #define int_ENR0 (*((volatile unsigned int *) 0x40028090))
71GA 0:e83c998e1cfd 47 #define int_ENF0 (*((volatile unsigned int *) 0x40028094))
71GA 0:e83c998e1cfd 48 #define int_STATR2 (*((volatile unsigned int *) 0x400280A4))
71GA 0:e83c998e1cfd 49 #define int_STATF2 (*((volatile unsigned int *) 0x400280A8))
71GA 0:e83c998e1cfd 50 #define int_CLR2 (*((volatile unsigned int *) 0x400280AC))
71GA 0:e83c998e1cfd 51 #define int_ENR2 (*((volatile unsigned int *) 0x400280B0))
71GA 0:e83c998e1cfd 52 #define int_ENF2 (*((volatile unsigned int *) 0x400280B4))