Diff: targets/TARGET_STM/gpio_api.c

Revision:

165:e614a9f1c9e2

Parent:

160:d5399cc887bb

Child:

187:0387e8f68319

--- a/targets/TARGET_STM/gpio_api.c	Wed May 10 12:06:41 2017 +0100
+++ b/targets/TARGET_STM/gpio_api.c	Fri May 26 12:39:01 2017 +0100
@@ -41,34 +41,34 @@
     switch (port_idx) {
         case PortA:
             gpio_add = GPIOA_BASE;
-            __GPIOA_CLK_ENABLE();
+            __HAL_RCC_GPIOA_CLK_ENABLE();
             break;
         case PortB:
             gpio_add = GPIOB_BASE;
-            __GPIOB_CLK_ENABLE();
+            __HAL_RCC_GPIOB_CLK_ENABLE();
             break;
 #if defined(GPIOC_BASE)
         case PortC:
             gpio_add = GPIOC_BASE;
-            __GPIOC_CLK_ENABLE();
+            __HAL_RCC_GPIOC_CLK_ENABLE();
             break;
 #endif
 #if defined GPIOD_BASE
         case PortD:
             gpio_add = GPIOD_BASE;
-            __GPIOD_CLK_ENABLE();
+            __HAL_RCC_GPIOD_CLK_ENABLE();
             break;
 #endif
 #if defined GPIOE_BASE
         case PortE:
             gpio_add = GPIOE_BASE;
-            __GPIOE_CLK_ENABLE();
+            __HAL_RCC_GPIOE_CLK_ENABLE();
             break;
 #endif
 #if defined GPIOF_BASE
         case PortF:
             gpio_add = GPIOF_BASE;
-            __GPIOF_CLK_ENABLE();
+            __HAL_RCC_GPIOF_CLK_ENABLE();
             break;
 #endif
 #if defined GPIOG_BASE
@@ -78,31 +78,31 @@
             HAL_PWREx_EnableVddIO2();
 #endif
             gpio_add = GPIOG_BASE;
-            __GPIOG_CLK_ENABLE();
+            __HAL_RCC_GPIOG_CLK_ENABLE();
             break;
 #endif
 #if defined GPIOH_BASE
         case PortH:
             gpio_add = GPIOH_BASE;
-            __GPIOH_CLK_ENABLE();
+            __HAL_RCC_GPIOH_CLK_ENABLE();
             break;
 #endif
 #if defined GPIOI_BASE
         case PortI:
             gpio_add = GPIOI_BASE;
-            __GPIOI_CLK_ENABLE();
+            __HAL_RCC_GPIOI_CLK_ENABLE();
             break;
 #endif
 #if defined GPIOJ_BASE
         case PortJ:
             gpio_add = GPIOJ_BASE;
-            __GPIOJ_CLK_ENABLE();
+            __HAL_RCC_GPIOJ_CLK_ENABLE();
             break;
 #endif
 #if defined GPIOK_BASE
         case PortK:
             gpio_add = GPIOK_BASE;
-            __GPIOK_CLK_ENABLE();
+            __HAL_RCC_GPIOK_CLK_ENABLE();
             break;
 #endif
         default: