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targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_IAR/startup_stm32f031x6.s@180:96ed750bd169, 2018-01-17 (annotated)

Committer:
Anna Bridge
Date:
Wed Jan 17 15:23:54 2018 +0000
Revision:
180:96ed750bd169
Parent:
149:156823d33999 
mbed-dev libray. Release version 158

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 ;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
<> 144:ef7eb2e8f9f7 2 ;* File Name : startup_stm32f031x6.s
<> 144:ef7eb2e8f9f7 3 ;* Author : MCD Application Team
<> 144:ef7eb2e8f9f7 4 ;* Description : STM32F031x4/STM32F031x6 devices vector table for EWARM toolchain.
<> 144:ef7eb2e8f9f7 5 ;* This module performs:
<> 144:ef7eb2e8f9f7 6 ;* - Set the initial SP
<> 144:ef7eb2e8f9f7 7 ;* - Set the initial PC == __iar_program_start,
<> 144:ef7eb2e8f9f7 8 ;* - Set the vector table entries with the exceptions ISR
<> 144:ef7eb2e8f9f7 9 ;* address,
<> 144:ef7eb2e8f9f7 10 ;* - Branches to main in the C library (which eventually
<> 144:ef7eb2e8f9f7 11 ;* calls main()).
<> 144:ef7eb2e8f9f7 12 ;* After Reset the Cortex-M0 processor is in Thread mode,
<> 144:ef7eb2e8f9f7 13 ;* priority is Privileged, and the Stack is set to Main.
<> 144:ef7eb2e8f9f7 14 ;*******************************************************************************
<> 144:ef7eb2e8f9f7 15 ;*
<> 144:ef7eb2e8f9f7 16 ;* Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 17 ;* are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 18 ;* 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 19 ;* this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 20 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 21 ;* this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 22 ;* and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 23 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 24 ;* may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 25 ;* without specific prior written permission.
<> 144:ef7eb2e8f9f7 26 ;*
<> 144:ef7eb2e8f9f7 27 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 28 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 29 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 30 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 31 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 32 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 33 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 34 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 35 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 36 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 37 ;*
<> 144:ef7eb2e8f9f7 38 ;*******************************************************************************
<> 144:ef7eb2e8f9f7 39 ;
<> 144:ef7eb2e8f9f7 40 ;
<> 144:ef7eb2e8f9f7 41 ; The modules in this file are included in the libraries, and may be replaced
<> 144:ef7eb2e8f9f7 42 ; by any user-defined modules that define the PUBLIC symbol _program_start or
<> 144:ef7eb2e8f9f7 43 ; a user defined start symbol.
<> 144:ef7eb2e8f9f7 44 ; To override the cstartup defined in the library, simply add your modified
<> 144:ef7eb2e8f9f7 45 ; version to the workbench project.
<> 144:ef7eb2e8f9f7 46 ;
<> 144:ef7eb2e8f9f7 47 ; The vector table is normally located at address 0.
<> 144:ef7eb2e8f9f7 48 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
<> 144:ef7eb2e8f9f7 49 ; The name "__vector_table" has special meaning for C-SPY:
<> 144:ef7eb2e8f9f7 50 ; it is where the SP start value is found, and the NVIC vector
<> 144:ef7eb2e8f9f7 51 ; table register (VTOR) is initialized to this address if != 0.
<> 144:ef7eb2e8f9f7 52 ;
<> 144:ef7eb2e8f9f7 53 ; Cortex-M version
<> 144:ef7eb2e8f9f7 54 ;
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 MODULE ?cstartup
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 ;; Forward declaration of sections.
<> 144:ef7eb2e8f9f7 59 SECTION CSTACK:DATA:NOROOT(3)
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 SECTION .intvec:CODE:NOROOT(2)
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 EXTERN __iar_program_start
<> 144:ef7eb2e8f9f7 64 EXTERN SystemInit
<> 144:ef7eb2e8f9f7 65 PUBLIC __vector_table
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 DATA
<> 144:ef7eb2e8f9f7 68 __vector_table
<> 144:ef7eb2e8f9f7 69 DCD sfe(CSTACK)
<> 144:ef7eb2e8f9f7 70 DCD Reset_Handler ; Reset Handler
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 DCD NMI_Handler ; NMI Handler
<> 144:ef7eb2e8f9f7 73 DCD HardFault_Handler ; Hard Fault Handler
<> 144:ef7eb2e8f9f7 74 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 75 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 76 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 77 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 78 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 79 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 80 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 81 DCD SVC_Handler ; SVCall Handler
<> 144:ef7eb2e8f9f7 82 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 83 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 84 DCD PendSV_Handler ; PendSV Handler
<> 144:ef7eb2e8f9f7 85 DCD SysTick_Handler ; SysTick Handler
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 ; External Interrupts
<> 144:ef7eb2e8f9f7 88 DCD WWDG_IRQHandler ; Window Watchdog
<> 144:ef7eb2e8f9f7 89 DCD PVD_IRQHandler ; PVD through EXTI Line detect
<> 144:ef7eb2e8f9f7 90 DCD RTC_IRQHandler ; RTC through EXTI Line
<> 144:ef7eb2e8f9f7 91 DCD FLASH_IRQHandler ; FLASH
<> 144:ef7eb2e8f9f7 92 DCD RCC_IRQHandler ; RCC
<> 144:ef7eb2e8f9f7 93 DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
<> 144:ef7eb2e8f9f7 94 DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
<> 144:ef7eb2e8f9f7 95 DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
<> 144:ef7eb2e8f9f7 96 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 97 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
<> 144:ef7eb2e8f9f7 98 DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
<> 144:ef7eb2e8f9f7 99 DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
<> 144:ef7eb2e8f9f7 100 DCD ADC1_IRQHandler ; ADC1
<> 144:ef7eb2e8f9f7 101 DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
<> 144:ef7eb2e8f9f7 102 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
<> 144:ef7eb2e8f9f7 103 DCD TIM2_IRQHandler ; TIM2
<> 144:ef7eb2e8f9f7 104 DCD TIM3_IRQHandler ; TIM3
<> 144:ef7eb2e8f9f7 105 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 106 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 107 DCD TIM14_IRQHandler ; TIM14
<> 144:ef7eb2e8f9f7 108 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 109 DCD TIM16_IRQHandler ; TIM16
<> 144:ef7eb2e8f9f7 110 DCD TIM17_IRQHandler ; TIM17
<> 144:ef7eb2e8f9f7 111 DCD I2C1_IRQHandler ; I2C1
<> 144:ef7eb2e8f9f7 112 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 113 DCD SPI1_IRQHandler ; SPI1
<> 144:ef7eb2e8f9f7 114 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 115 DCD USART1_IRQHandler ; USART1
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
<> 144:ef7eb2e8f9f7 118 ;;
<> 144:ef7eb2e8f9f7 119 ;; Default interrupt handlers.
<> 144:ef7eb2e8f9f7 120 ;;
<> 144:ef7eb2e8f9f7 121 THUMB
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 PUBWEAK Reset_Handler
<> 144:ef7eb2e8f9f7 124 SECTION .text:CODE:NOROOT:REORDER(2)
<> 144:ef7eb2e8f9f7 125 Reset_Handler
<> 144:ef7eb2e8f9f7 126 LDR R0, =SystemInit
<> 144:ef7eb2e8f9f7 127 BLX R0
<> 144:ef7eb2e8f9f7 128 LDR R0, =__iar_program_start
<> 144:ef7eb2e8f9f7 129 BX R0
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 PUBWEAK NMI_Handler
<> 144:ef7eb2e8f9f7 132 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 133 NMI_Handler
<> 144:ef7eb2e8f9f7 134 B NMI_Handler
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 PUBWEAK HardFault_Handler
<> 144:ef7eb2e8f9f7 137 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 138 HardFault_Handler
<> 144:ef7eb2e8f9f7 139 B HardFault_Handler
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 PUBWEAK SVC_Handler
<> 144:ef7eb2e8f9f7 142 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 143 SVC_Handler
<> 144:ef7eb2e8f9f7 144 B SVC_Handler
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 PUBWEAK PendSV_Handler
<> 144:ef7eb2e8f9f7 147 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 148 PendSV_Handler
<> 144:ef7eb2e8f9f7 149 B PendSV_Handler
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 PUBWEAK SysTick_Handler
<> 144:ef7eb2e8f9f7 152 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 153 SysTick_Handler
<> 144:ef7eb2e8f9f7 154 B SysTick_Handler
<> 144:ef7eb2e8f9f7 155
<> 144:ef7eb2e8f9f7 156 PUBWEAK WWDG_IRQHandler
<> 144:ef7eb2e8f9f7 157 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 158 WWDG_IRQHandler
<> 144:ef7eb2e8f9f7 159 B WWDG_IRQHandler
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 PUBWEAK PVD_IRQHandler
<> 144:ef7eb2e8f9f7 162 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 163 PVD_IRQHandler
<> 144:ef7eb2e8f9f7 164 B PVD_IRQHandler
<> 144:ef7eb2e8f9f7 165
<> 144:ef7eb2e8f9f7 166 PUBWEAK RTC_IRQHandler
<> 144:ef7eb2e8f9f7 167 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 168 RTC_IRQHandler
<> 144:ef7eb2e8f9f7 169 B RTC_IRQHandler
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 PUBWEAK FLASH_IRQHandler
<> 144:ef7eb2e8f9f7 172 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 173 FLASH_IRQHandler
<> 144:ef7eb2e8f9f7 174 B FLASH_IRQHandler
<> 144:ef7eb2e8f9f7 175
<> 144:ef7eb2e8f9f7 176 PUBWEAK RCC_IRQHandler
<> 144:ef7eb2e8f9f7 177 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 178 RCC_IRQHandler
<> 144:ef7eb2e8f9f7 179 B RCC_IRQHandler
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 PUBWEAK EXTI0_1_IRQHandler
<> 144:ef7eb2e8f9f7 182 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 183 EXTI0_1_IRQHandler
<> 144:ef7eb2e8f9f7 184 B EXTI0_1_IRQHandler
<> 144:ef7eb2e8f9f7 185
<> 144:ef7eb2e8f9f7 186 PUBWEAK EXTI2_3_IRQHandler
<> 144:ef7eb2e8f9f7 187 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 188 EXTI2_3_IRQHandler
<> 144:ef7eb2e8f9f7 189 B EXTI2_3_IRQHandler
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 PUBWEAK EXTI4_15_IRQHandler
<> 144:ef7eb2e8f9f7 192 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 193 EXTI4_15_IRQHandler
<> 144:ef7eb2e8f9f7 194 B EXTI4_15_IRQHandler
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 PUBWEAK DMA1_Channel1_IRQHandler
<> 144:ef7eb2e8f9f7 197 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 198 DMA1_Channel1_IRQHandler
<> 144:ef7eb2e8f9f7 199 B DMA1_Channel1_IRQHandler
<> 144:ef7eb2e8f9f7 200
<> 144:ef7eb2e8f9f7 201 PUBWEAK DMA1_Channel2_3_IRQHandler
<> 144:ef7eb2e8f9f7 202 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 203 DMA1_Channel2_3_IRQHandler
<> 144:ef7eb2e8f9f7 204 B DMA1_Channel2_3_IRQHandler
<> 144:ef7eb2e8f9f7 205
<> 144:ef7eb2e8f9f7 206 PUBWEAK DMA1_Channel4_5_IRQHandler
<> 144:ef7eb2e8f9f7 207 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 208 DMA1_Channel4_5_IRQHandler
<> 144:ef7eb2e8f9f7 209 B DMA1_Channel4_5_IRQHandler
<> 144:ef7eb2e8f9f7 210
<> 144:ef7eb2e8f9f7 211 PUBWEAK ADC1_IRQHandler
<> 144:ef7eb2e8f9f7 212 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 213 ADC1_IRQHandler
<> 144:ef7eb2e8f9f7 214 B ADC1_IRQHandler
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
<> 144:ef7eb2e8f9f7 217 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 218 TIM1_BRK_UP_TRG_COM_IRQHandler
<> 144:ef7eb2e8f9f7 219 B TIM1_BRK_UP_TRG_COM_IRQHandler
<> 144:ef7eb2e8f9f7 220
<> 144:ef7eb2e8f9f7 221 PUBWEAK TIM1_CC_IRQHandler
<> 144:ef7eb2e8f9f7 222 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 223 TIM1_CC_IRQHandler
<> 144:ef7eb2e8f9f7 224 B TIM1_CC_IRQHandler
<> 144:ef7eb2e8f9f7 225
<> 144:ef7eb2e8f9f7 226 PUBWEAK TIM2_IRQHandler
<> 144:ef7eb2e8f9f7 227 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 228 TIM2_IRQHandler
<> 144:ef7eb2e8f9f7 229 B TIM2_IRQHandler
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231 PUBWEAK TIM3_IRQHandler
<> 144:ef7eb2e8f9f7 232 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 233 TIM3_IRQHandler
<> 144:ef7eb2e8f9f7 234 B TIM3_IRQHandler
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 PUBWEAK TIM14_IRQHandler
<> 144:ef7eb2e8f9f7 237 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 238 TIM14_IRQHandler
<> 144:ef7eb2e8f9f7 239 B TIM14_IRQHandler
<> 144:ef7eb2e8f9f7 240
<> 144:ef7eb2e8f9f7 241 PUBWEAK TIM16_IRQHandler
<> 144:ef7eb2e8f9f7 242 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 243 TIM16_IRQHandler
<> 144:ef7eb2e8f9f7 244 B TIM16_IRQHandler
<> 144:ef7eb2e8f9f7 245
<> 144:ef7eb2e8f9f7 246 PUBWEAK TIM17_IRQHandler
<> 144:ef7eb2e8f9f7 247 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 248 TIM17_IRQHandler
<> 144:ef7eb2e8f9f7 249 B TIM17_IRQHandler
<> 144:ef7eb2e8f9f7 250
<> 144:ef7eb2e8f9f7 251 PUBWEAK I2C1_IRQHandler
<> 144:ef7eb2e8f9f7 252 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 253 I2C1_IRQHandler
<> 144:ef7eb2e8f9f7 254 B I2C1_IRQHandler
<> 144:ef7eb2e8f9f7 255
<> 144:ef7eb2e8f9f7 256 PUBWEAK SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 257 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 258 SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 259 B SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 PUBWEAK USART1_IRQHandler
<> 144:ef7eb2e8f9f7 262 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 263 USART1_IRQHandler
<> 144:ef7eb2e8f9f7 264 B USART1_IRQHandler
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266
<> 144:ef7eb2e8f9f7 267 END
<> 144:ef7eb2e8f9f7 268 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****