Modified for BG96
Fork of mbed-dev by
targets/TARGET_STM/nvic_addr.h@168:9672193075cf, 2017-07-06 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Jul 06 15:42:05 2017 +0100
- Revision:
- 168:9672193075cf
- Parent:
- targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/nvic_addr.h@160:d5399cc887bb
- Child:
- 174:b96e65c34a4d
This updates the lib to the mbed lib v 146
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 160:d5399cc887bb | 1 | /* mbed Microcontroller Library |
<> | 160:d5399cc887bb | 2 | * Copyright (c) 2017-2017 ARM Limited |
<> | 160:d5399cc887bb | 3 | * |
<> | 160:d5399cc887bb | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 160:d5399cc887bb | 5 | * you may not use this file except in compliance with the License. |
<> | 160:d5399cc887bb | 6 | * You may obtain a copy of the License at |
<> | 160:d5399cc887bb | 7 | * |
<> | 160:d5399cc887bb | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 160:d5399cc887bb | 9 | * |
<> | 160:d5399cc887bb | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 160:d5399cc887bb | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 160:d5399cc887bb | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 160:d5399cc887bb | 13 | * See the License for the specific language governing permissions and |
<> | 160:d5399cc887bb | 14 | * limitations under the License. |
<> | 160:d5399cc887bb | 15 | */ |
<> | 160:d5399cc887bb | 16 | #ifndef NVIC_ADDR_H |
<> | 160:d5399cc887bb | 17 | #define NVIC_ADDR_H |
<> | 160:d5399cc887bb | 18 | |
<> | 160:d5399cc887bb | 19 | #ifdef __cplusplus |
<> | 160:d5399cc887bb | 20 | extern "C" { |
<> | 160:d5399cc887bb | 21 | #endif |
<> | 160:d5399cc887bb | 22 | |
<> | 160:d5399cc887bb | 23 | #if defined(__ICCARM__) |
<> | 160:d5399cc887bb | 24 | #pragma section=".intvec" |
<> | 160:d5399cc887bb | 25 | #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)__section_begin(".intvec")) |
<> | 160:d5399cc887bb | 26 | #elif defined(__CC_ARM) |
<> | 160:d5399cc887bb | 27 | extern uint32_t Load$$LR$$LR_IROM1$$Base[]; |
<> | 160:d5399cc887bb | 28 | #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)Load$$LR$$LR_IROM1$$Base) |
<> | 160:d5399cc887bb | 29 | #elif defined(__GNUC__) |
<> | 160:d5399cc887bb | 30 | extern uint32_t g_pfnVectors[]; |
<> | 160:d5399cc887bb | 31 | #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)g_pfnVectors) |
<> | 160:d5399cc887bb | 32 | #else |
<> | 160:d5399cc887bb | 33 | #error "Flash vector address not set for this toolchain" |
<> | 160:d5399cc887bb | 34 | #endif |
<> | 160:d5399cc887bb | 35 | |
<> | 160:d5399cc887bb | 36 | #ifdef __cplusplus |
<> | 160:d5399cc887bb | 37 | } |
<> | 160:d5399cc887bb | 38 | #endif |
<> | 160:d5399cc887bb | 39 | |
<> | 160:d5399cc887bb | 40 | #endif |