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targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/gpio_irq_api.c@178:79309dc6340a, 2017-11-23 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 23 11:57:25 2017 +0000
Revision:
178:79309dc6340a
Child:
180:96ed750bd169
mbed-dev library. Release version 156

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 178:79309dc6340a 1 /*******************************************************************************
AnnaBridge 178:79309dc6340a 2 * Copyright (c) 2010-2017 Analog Devices, Inc.
AnnaBridge 178:79309dc6340a 3 *
AnnaBridge 178:79309dc6340a 4 * All rights reserved.
AnnaBridge 178:79309dc6340a 5 *
AnnaBridge 178:79309dc6340a 6 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 178:79309dc6340a 7 * are permitted provided that the following conditions are met:
AnnaBridge 178:79309dc6340a 8 * - Redistributions of source code must retain the above copyright notice,
AnnaBridge 178:79309dc6340a 9 * this list of conditions and the following disclaimer.
AnnaBridge 178:79309dc6340a 10 * - Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 178:79309dc6340a 11 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 178:79309dc6340a 12 * and/or other materials provided with the distribution.
AnnaBridge 178:79309dc6340a 13 * - Modified versions of the software must be conspicuously marked as such.
AnnaBridge 178:79309dc6340a 14 * - This software is licensed solely and exclusively for use with processors
AnnaBridge 178:79309dc6340a 15 * manufactured by or for Analog Devices, Inc.
AnnaBridge 178:79309dc6340a 16 * - This software may not be combined or merged with other code in any manner
AnnaBridge 178:79309dc6340a 17 * that would cause the software to become subject to terms and conditions
AnnaBridge 178:79309dc6340a 18 * which differ from those listed here.
AnnaBridge 178:79309dc6340a 19 * - Neither the name of Analog Devices, Inc. nor the names of its
AnnaBridge 178:79309dc6340a 20 * contributors may be used to endorse or promote products derived
AnnaBridge 178:79309dc6340a 21 * from this software without specific prior written permission.
AnnaBridge 178:79309dc6340a 22 * - The use of this software may or may not infringe the patent rights of one
AnnaBridge 178:79309dc6340a 23 * or more patent holders. This license does not release you from the
AnnaBridge 178:79309dc6340a 24 * requirement that you obtain separate licenses from these patent holders
AnnaBridge 178:79309dc6340a 25 * to use this software.
AnnaBridge 178:79309dc6340a 26 *
AnnaBridge 178:79309dc6340a 27 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AnnaBridge 178:79309dc6340a 28 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
AnnaBridge 178:79309dc6340a 29 * INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 178:79309dc6340a 30 * DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
AnnaBridge 178:79309dc6340a 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
AnnaBridge 178:79309dc6340a 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
AnnaBridge 178:79309dc6340a 33 * CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
AnnaBridge 178:79309dc6340a 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
AnnaBridge 178:79309dc6340a 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
AnnaBridge 178:79309dc6340a 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
AnnaBridge 178:79309dc6340a 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
AnnaBridge 178:79309dc6340a 38 * POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 178:79309dc6340a 39 ******************************************************************************/
AnnaBridge 178:79309dc6340a 40
AnnaBridge 178:79309dc6340a 41 #include "gpio_irq_api.h"
AnnaBridge 178:79309dc6340a 42 #include "adi_gpio.h"
AnnaBridge 178:79309dc6340a 43 #include "adi_gpio_def.h"
AnnaBridge 178:79309dc6340a 44
AnnaBridge 178:79309dc6340a 45 #ifdef DEVICE_INTERRUPTIN
AnnaBridge 178:79309dc6340a 46
AnnaBridge 178:79309dc6340a 47 #define MAX_GPIO_LINES 16
AnnaBridge 178:79309dc6340a 48 #define MAX_GPIO_PORTS ADI_GPIO_NUM_PORTS
AnnaBridge 178:79309dc6340a 49
AnnaBridge 178:79309dc6340a 50 typedef struct {
AnnaBridge 178:79309dc6340a 51 unsigned int id;
AnnaBridge 178:79309dc6340a 52 gpio_irq_event event;
AnnaBridge 178:79309dc6340a 53 uint8_t int_enable;
AnnaBridge 178:79309dc6340a 54 } gpio_chan_info_t;
AnnaBridge 178:79309dc6340a 55
AnnaBridge 178:79309dc6340a 56 extern uint8_t gpioMemory[ADI_GPIO_MEMORY_SIZE];
AnnaBridge 178:79309dc6340a 57 extern uint8_t gpio_initialized;
AnnaBridge 178:79309dc6340a 58 static gpio_chan_info_t channel_ids[MAX_GPIO_PORTS][MAX_GPIO_LINES];
AnnaBridge 178:79309dc6340a 59 static gpio_irq_handler irq_handler = NULL;
AnnaBridge 178:79309dc6340a 60
AnnaBridge 178:79309dc6340a 61
AnnaBridge 178:79309dc6340a 62 /** Local interrupt callback routine.
AnnaBridge 178:79309dc6340a 63 */
AnnaBridge 178:79309dc6340a 64 static void gpio_irq_callback(void *pCBParam, uint32_t Event, void *pArg)
AnnaBridge 178:79309dc6340a 65 {
AnnaBridge 178:79309dc6340a 66 uint16_t pin = *(ADI_GPIO_DATA*)pArg;
AnnaBridge 178:79309dc6340a 67 int index = 0;
AnnaBridge 178:79309dc6340a 68
AnnaBridge 178:79309dc6340a 69 // determine the index of the pin that caused the interrupt
AnnaBridge 178:79309dc6340a 70 while (pin) {
AnnaBridge 178:79309dc6340a 71 if (pin & 0x01) {
AnnaBridge 178:79309dc6340a 72 // call the user ISR. The argument Event is the port number of the GPIO line.
AnnaBridge 178:79309dc6340a 73 if (irq_handler != NULL)
AnnaBridge 178:79309dc6340a 74 irq_handler((uint32_t)channel_ids[Event][index].id, channel_ids[Event][index].event);
AnnaBridge 178:79309dc6340a 75 }
AnnaBridge 178:79309dc6340a 76 index++;
AnnaBridge 178:79309dc6340a 77 pin >>= 1;
AnnaBridge 178:79309dc6340a 78 }
AnnaBridge 178:79309dc6340a 79 }
AnnaBridge 178:79309dc6340a 80
AnnaBridge 178:79309dc6340a 81
AnnaBridge 178:79309dc6340a 82 /** Function to get the IENA and IENB register values.
AnnaBridge 178:79309dc6340a 83 * Added here based on code from ADuCM302x
AnnaBridge 178:79309dc6340a 84 */
AnnaBridge 178:79309dc6340a 85 static ADI_GPIO_RESULT adi_gpio_GetGroupInterruptPins(const ADI_GPIO_PORT Port, const IRQn_Type eIrq,
AnnaBridge 178:79309dc6340a 86 const ADI_GPIO_DATA Pins, uint16_t* const pValue)
AnnaBridge 178:79309dc6340a 87 {
AnnaBridge 178:79309dc6340a 88 ADI_GPIO_TypeDef *pReg[ADI_GPIO_NUM_PORTS] = {pADI_GPIO0, pADI_GPIO1, pADI_GPIO2, pADI_GPIO3};
AnnaBridge 178:79309dc6340a 89 ADI_GPIO_TypeDef *pPort; /* pointer to port registers */
AnnaBridge 178:79309dc6340a 90 uint16_t Value = 0u;
AnnaBridge 178:79309dc6340a 91
AnnaBridge 178:79309dc6340a 92 pPort = pReg[Port];
AnnaBridge 178:79309dc6340a 93
AnnaBridge 178:79309dc6340a 94 switch (eIrq) {
AnnaBridge 178:79309dc6340a 95 case SYS_GPIO_INTA_IRQn:
AnnaBridge 178:79309dc6340a 96 Value = pPort->IENA;
AnnaBridge 178:79309dc6340a 97 break;
AnnaBridge 178:79309dc6340a 98 case SYS_GPIO_INTB_IRQn:
AnnaBridge 178:79309dc6340a 99 Value = pPort->IENB;
AnnaBridge 178:79309dc6340a 100 break;
AnnaBridge 178:79309dc6340a 101 default:
AnnaBridge 178:79309dc6340a 102 break; /* This shall never reach */
AnnaBridge 178:79309dc6340a 103 }
AnnaBridge 178:79309dc6340a 104
AnnaBridge 178:79309dc6340a 105 *pValue = (Value & Pins);
AnnaBridge 178:79309dc6340a 106 return (ADI_GPIO_SUCCESS);
AnnaBridge 178:79309dc6340a 107 }
AnnaBridge 178:79309dc6340a 108
AnnaBridge 178:79309dc6340a 109
AnnaBridge 178:79309dc6340a 110 /** Function to get the interrupt polarity register content.
AnnaBridge 178:79309dc6340a 111 * Added here based on code from ADuCM302x
AnnaBridge 178:79309dc6340a 112 */
AnnaBridge 178:79309dc6340a 113 static ADI_GPIO_RESULT adi_gpio_GetGroupInterruptPolarity(const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins,
AnnaBridge 178:79309dc6340a 114 uint16_t* const pValue)
AnnaBridge 178:79309dc6340a 115 {
AnnaBridge 178:79309dc6340a 116 ADI_GPIO_TypeDef *pPort; /* pointer to port registers */
AnnaBridge 178:79309dc6340a 117 ADI_GPIO_TypeDef *pReg[ADI_GPIO_NUM_PORTS] = {pADI_GPIO0, pADI_GPIO1, pADI_GPIO2, pADI_GPIO3};
AnnaBridge 178:79309dc6340a 118
AnnaBridge 178:79309dc6340a 119 pPort = pReg[Port];
AnnaBridge 178:79309dc6340a 120
AnnaBridge 178:79309dc6340a 121 *pValue = (pPort->POL & Pins);
AnnaBridge 178:79309dc6340a 122
AnnaBridge 178:79309dc6340a 123 return (ADI_GPIO_SUCCESS);
AnnaBridge 178:79309dc6340a 124 }
AnnaBridge 178:79309dc6340a 125
AnnaBridge 178:79309dc6340a 126
AnnaBridge 178:79309dc6340a 127 /** Function to clear the relevant interrupt enable bits in both the IENA and IENB registers
AnnaBridge 178:79309dc6340a 128 * for the given GPIO pin.
AnnaBridge 178:79309dc6340a 129 */
AnnaBridge 178:79309dc6340a 130 static void disable_pin_interrupt(ADI_GPIO_PORT port, uint32_t pin_number)
AnnaBridge 178:79309dc6340a 131 {
AnnaBridge 178:79309dc6340a 132 uint16_t int_reg_val;
AnnaBridge 178:79309dc6340a 133
AnnaBridge 178:79309dc6340a 134 // Read the current content of the IENA register
AnnaBridge 178:79309dc6340a 135 adi_gpio_GetGroupInterruptPins(port, SYS_GPIO_INTA_IRQn, 1 << pin_number, &int_reg_val);
AnnaBridge 178:79309dc6340a 136
AnnaBridge 178:79309dc6340a 137 // clear the bit for the pin
AnnaBridge 178:79309dc6340a 138 int_reg_val &= ~(1 << pin_number);
AnnaBridge 178:79309dc6340a 139
AnnaBridge 178:79309dc6340a 140 // write the interrupt register
AnnaBridge 178:79309dc6340a 141 adi_gpio_SetGroupInterruptPins(port, SYS_GPIO_INTA_IRQn, int_reg_val);
AnnaBridge 178:79309dc6340a 142
AnnaBridge 178:79309dc6340a 143 // Do the same to IENB
AnnaBridge 178:79309dc6340a 144 adi_gpio_GetGroupInterruptPins(port, SYS_GPIO_INTB_IRQn, 1 << pin_number, &int_reg_val);
AnnaBridge 178:79309dc6340a 145
AnnaBridge 178:79309dc6340a 146 // clear the bit for the pin
AnnaBridge 178:79309dc6340a 147 int_reg_val &= ~(1 << pin_number);
AnnaBridge 178:79309dc6340a 148
AnnaBridge 178:79309dc6340a 149 // write the interrupt register
AnnaBridge 178:79309dc6340a 150 adi_gpio_SetGroupInterruptPins(port, SYS_GPIO_INTB_IRQn, int_reg_val);
AnnaBridge 178:79309dc6340a 151 }
AnnaBridge 178:79309dc6340a 152
AnnaBridge 178:79309dc6340a 153
AnnaBridge 178:79309dc6340a 154 /** Function to set the relevant interrupt enable bits in either the IENA and IENB registers
AnnaBridge 178:79309dc6340a 155 * for the given GPIO pin.
AnnaBridge 178:79309dc6340a 156 */
AnnaBridge 178:79309dc6340a 157 static void enable_pin_interrupt(ADI_GPIO_PORT port, uint32_t pin_number, IRQn_Type eIrq)
AnnaBridge 178:79309dc6340a 158 {
AnnaBridge 178:79309dc6340a 159 uint16_t int_reg_val;
AnnaBridge 178:79309dc6340a 160
AnnaBridge 178:79309dc6340a 161 // Read the current interrupt enable register content
AnnaBridge 178:79309dc6340a 162 adi_gpio_GetGroupInterruptPins(port, eIrq, 1 << pin_number, &int_reg_val);
AnnaBridge 178:79309dc6340a 163
AnnaBridge 178:79309dc6340a 164 // set the bit for the pin
AnnaBridge 178:79309dc6340a 165 int_reg_val |= (1 << pin_number);
AnnaBridge 178:79309dc6340a 166
AnnaBridge 178:79309dc6340a 167 // write the interrupt register
AnnaBridge 178:79309dc6340a 168 adi_gpio_SetGroupInterruptPins(port, eIrq, int_reg_val);
AnnaBridge 178:79309dc6340a 169 }
AnnaBridge 178:79309dc6340a 170
AnnaBridge 178:79309dc6340a 171
AnnaBridge 178:79309dc6340a 172 /** Initialize the GPIO IRQ pin
AnnaBridge 178:79309dc6340a 173 *
AnnaBridge 178:79309dc6340a 174 * @param obj The GPIO object to initialize
AnnaBridge 178:79309dc6340a 175 * @param pin The GPIO pin name
AnnaBridge 178:79309dc6340a 176 * @param handler The handler to be attached to GPIO IRQ
AnnaBridge 178:79309dc6340a 177 * @param id The object ID (id != 0, 0 is reserved)
AnnaBridge 178:79309dc6340a 178 * @return -1 if pin is NC, 0 otherwise
AnnaBridge 178:79309dc6340a 179 */
AnnaBridge 178:79309dc6340a 180 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
AnnaBridge 178:79309dc6340a 181 {
AnnaBridge 178:79309dc6340a 182 uint32_t port = pin >> GPIO_PORT_SHIFT;
AnnaBridge 178:79309dc6340a 183 uint32_t pin_num = pin & 0xFF;
AnnaBridge 178:79309dc6340a 184
AnnaBridge 178:79309dc6340a 185 // check for valid pin and ID
AnnaBridge 178:79309dc6340a 186 if ((pin == NC) || (id == 0)) {
AnnaBridge 178:79309dc6340a 187 return -1;
AnnaBridge 178:79309dc6340a 188 }
AnnaBridge 178:79309dc6340a 189
AnnaBridge 178:79309dc6340a 190 // make sure gpio driver has been initialized
AnnaBridge 178:79309dc6340a 191 if (!gpio_initialized) {
AnnaBridge 178:79309dc6340a 192 adi_gpio_Init(gpioMemory,ADI_GPIO_MEMORY_SIZE);
AnnaBridge 178:79309dc6340a 193 gpio_initialized = 1;
AnnaBridge 178:79309dc6340a 194 }
AnnaBridge 178:79309dc6340a 195
AnnaBridge 178:79309dc6340a 196 // save the handler
AnnaBridge 178:79309dc6340a 197 if (handler) {
AnnaBridge 178:79309dc6340a 198 irq_handler = handler;
AnnaBridge 178:79309dc6340a 199 }
AnnaBridge 178:79309dc6340a 200
AnnaBridge 178:79309dc6340a 201 // disable the interrupt for the given pin
AnnaBridge 178:79309dc6340a 202 disable_pin_interrupt((ADI_GPIO_PORT)port, pin_num);
AnnaBridge 178:79309dc6340a 203
AnnaBridge 178:79309dc6340a 204 // set the port pin as input
AnnaBridge 178:79309dc6340a 205 adi_gpio_InputEnable(port, 1 << pin_num, true);
AnnaBridge 178:79309dc6340a 206
AnnaBridge 178:79309dc6340a 207 // save the ID for future reference
AnnaBridge 178:79309dc6340a 208 channel_ids[port][pin_num].id = id;
AnnaBridge 178:79309dc6340a 209 channel_ids[port][pin_num].event = IRQ_NONE;
AnnaBridge 178:79309dc6340a 210 channel_ids[port][pin_num].int_enable = 0;
AnnaBridge 178:79309dc6340a 211 obj->id = id;
AnnaBridge 178:79309dc6340a 212 obj->pinname = pin;
AnnaBridge 178:79309dc6340a 213
AnnaBridge 178:79309dc6340a 214 return 0;
AnnaBridge 178:79309dc6340a 215 }
AnnaBridge 178:79309dc6340a 216
AnnaBridge 178:79309dc6340a 217 /** Release the GPIO IRQ PIN
AnnaBridge 178:79309dc6340a 218 *
AnnaBridge 178:79309dc6340a 219 * @param obj The gpio object
AnnaBridge 178:79309dc6340a 220 */
AnnaBridge 178:79309dc6340a 221 void gpio_irq_free(gpio_irq_t *obj)
AnnaBridge 178:79309dc6340a 222 {
AnnaBridge 178:79309dc6340a 223 uint32_t port = obj->pinname >> GPIO_PORT_SHIFT;
AnnaBridge 178:79309dc6340a 224 uint32_t pin_num = obj->pinname & 0xFF;
AnnaBridge 178:79309dc6340a 225
AnnaBridge 178:79309dc6340a 226 // disable interrupt for the given pin
AnnaBridge 178:79309dc6340a 227 gpio_irq_disable(obj);
AnnaBridge 178:79309dc6340a 228
AnnaBridge 178:79309dc6340a 229 // clear the status table
AnnaBridge 178:79309dc6340a 230 channel_ids[port][pin_num].id = 0;
AnnaBridge 178:79309dc6340a 231 channel_ids[port][pin_num].event = IRQ_NONE;
AnnaBridge 178:79309dc6340a 232 channel_ids[port][pin_num].int_enable = 0;
AnnaBridge 178:79309dc6340a 233 }
AnnaBridge 178:79309dc6340a 234
AnnaBridge 178:79309dc6340a 235 /** Enable/disable pin IRQ event
AnnaBridge 178:79309dc6340a 236 *
AnnaBridge 178:79309dc6340a 237 * @param obj The GPIO object
AnnaBridge 178:79309dc6340a 238 * @param event The GPIO IRQ event
AnnaBridge 178:79309dc6340a 239 * @param enable The enable flag
AnnaBridge 178:79309dc6340a 240 */
AnnaBridge 178:79309dc6340a 241 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
AnnaBridge 178:79309dc6340a 242 {
AnnaBridge 178:79309dc6340a 243 uint16_t int_polarity_reg;
AnnaBridge 178:79309dc6340a 244 uint32_t port = obj->pinname >> GPIO_PORT_SHIFT;
AnnaBridge 178:79309dc6340a 245 uint32_t pin_num = obj->pinname & 0xFF;
AnnaBridge 178:79309dc6340a 246
AnnaBridge 178:79309dc6340a 247 if (event == IRQ_NONE) {
AnnaBridge 178:79309dc6340a 248 return;
AnnaBridge 178:79309dc6340a 249 }
AnnaBridge 178:79309dc6340a 250
AnnaBridge 178:79309dc6340a 251 // read the current polarity register
AnnaBridge 178:79309dc6340a 252 adi_gpio_GetGroupInterruptPolarity((ADI_GPIO_PORT)port, 1 << pin_num, &int_polarity_reg);
AnnaBridge 178:79309dc6340a 253
AnnaBridge 178:79309dc6340a 254 if (event == IRQ_RISE) {
AnnaBridge 178:79309dc6340a 255 int_polarity_reg |= (1 << pin_num);
AnnaBridge 178:79309dc6340a 256 } else {
AnnaBridge 178:79309dc6340a 257 int_polarity_reg &= ~(1 << pin_num);
AnnaBridge 178:79309dc6340a 258 }
AnnaBridge 178:79309dc6340a 259
AnnaBridge 178:79309dc6340a 260 // set the polarity register
AnnaBridge 178:79309dc6340a 261 adi_gpio_SetGroupInterruptPolarity((ADI_GPIO_PORT)port, int_polarity_reg);
AnnaBridge 178:79309dc6340a 262
AnnaBridge 178:79309dc6340a 263 channel_ids[port][pin_num].event = event;
AnnaBridge 178:79309dc6340a 264
AnnaBridge 178:79309dc6340a 265 // enable interrupt for this pin if enable flag is set
AnnaBridge 178:79309dc6340a 266 if (enable) {
AnnaBridge 178:79309dc6340a 267 gpio_irq_enable(obj);
AnnaBridge 178:79309dc6340a 268 } else {
AnnaBridge 178:79309dc6340a 269 gpio_irq_disable(obj);
AnnaBridge 178:79309dc6340a 270 }
AnnaBridge 178:79309dc6340a 271 }
AnnaBridge 178:79309dc6340a 272
AnnaBridge 178:79309dc6340a 273 /** Enable GPIO IRQ
AnnaBridge 178:79309dc6340a 274 *
AnnaBridge 178:79309dc6340a 275 * This is target dependent, as it might enable the entire port or just a pin
AnnaBridge 178:79309dc6340a 276 * @param obj The GPIO object
AnnaBridge 178:79309dc6340a 277 */
AnnaBridge 178:79309dc6340a 278 void gpio_irq_enable(gpio_irq_t *obj)
AnnaBridge 178:79309dc6340a 279 {
AnnaBridge 178:79309dc6340a 280 uint32_t port = obj->pinname >> GPIO_PORT_SHIFT;
AnnaBridge 178:79309dc6340a 281 uint32_t pin_num = obj->pinname & 0xFF;
AnnaBridge 178:79309dc6340a 282
AnnaBridge 178:79309dc6340a 283 if (channel_ids[port][pin_num].event == IRQ_NONE) {
AnnaBridge 178:79309dc6340a 284 return;
AnnaBridge 178:79309dc6340a 285 }
AnnaBridge 178:79309dc6340a 286
AnnaBridge 178:79309dc6340a 287 // Group all RISE interrupts in INTA and FALL interrupts in INTB
AnnaBridge 178:79309dc6340a 288 if (channel_ids[port][pin_num].event == IRQ_RISE) {
AnnaBridge 178:79309dc6340a 289 // set the callback routine
AnnaBridge 178:79309dc6340a 290 adi_gpio_RegisterCallback(SYS_GPIO_INTA_IRQn, gpio_irq_callback, obj);
AnnaBridge 178:79309dc6340a 291 enable_pin_interrupt((ADI_GPIO_PORT)port, pin_num, SYS_GPIO_INTA_IRQn);
AnnaBridge 178:79309dc6340a 292 } else if (channel_ids[port][pin_num].event == IRQ_FALL) {
AnnaBridge 178:79309dc6340a 293 // set the callback routine
AnnaBridge 178:79309dc6340a 294 adi_gpio_RegisterCallback(SYS_GPIO_INTB_IRQn, gpio_irq_callback, obj);
AnnaBridge 178:79309dc6340a 295 enable_pin_interrupt((ADI_GPIO_PORT)port, pin_num, SYS_GPIO_INTB_IRQn);
AnnaBridge 178:79309dc6340a 296 }
AnnaBridge 178:79309dc6340a 297
AnnaBridge 178:79309dc6340a 298 channel_ids[port][pin_num].int_enable = 1;
AnnaBridge 178:79309dc6340a 299 }
AnnaBridge 178:79309dc6340a 300
AnnaBridge 178:79309dc6340a 301 /** Disable GPIO IRQ
AnnaBridge 178:79309dc6340a 302 *
AnnaBridge 178:79309dc6340a 303 * This is target dependent, as it might disable the entire port or just a pin
AnnaBridge 178:79309dc6340a 304 * @param obj The GPIO object
AnnaBridge 178:79309dc6340a 305 */
AnnaBridge 178:79309dc6340a 306 void gpio_irq_disable(gpio_irq_t *obj)
AnnaBridge 178:79309dc6340a 307 {
AnnaBridge 178:79309dc6340a 308 uint32_t port = obj->pinname >> GPIO_PORT_SHIFT;
AnnaBridge 178:79309dc6340a 309 uint32_t pin_num = obj->pinname & 0xFF;
AnnaBridge 178:79309dc6340a 310
AnnaBridge 178:79309dc6340a 311 if (channel_ids[port][pin_num].event == IRQ_NONE) {
AnnaBridge 178:79309dc6340a 312 return;
AnnaBridge 178:79309dc6340a 313 }
AnnaBridge 178:79309dc6340a 314
AnnaBridge 178:79309dc6340a 315 // Group all RISE interrupts in INTA and FALL interrupts in INTB
AnnaBridge 178:79309dc6340a 316 if (channel_ids[port][pin_num].event == IRQ_RISE) {
AnnaBridge 178:79309dc6340a 317 disable_pin_interrupt((ADI_GPIO_PORT)port, pin_num);
AnnaBridge 178:79309dc6340a 318 }
AnnaBridge 178:79309dc6340a 319 else if (channel_ids[port][pin_num].event == IRQ_FALL) {
AnnaBridge 178:79309dc6340a 320 disable_pin_interrupt((ADI_GPIO_PORT)port, pin_num);
AnnaBridge 178:79309dc6340a 321 }
AnnaBridge 178:79309dc6340a 322
AnnaBridge 178:79309dc6340a 323 channel_ids[port][pin_num].int_enable = 0;
AnnaBridge 178:79309dc6340a 324 }
AnnaBridge 178:79309dc6340a 325
AnnaBridge 178:79309dc6340a 326 #endif // #ifdef DEVICE_INTERRUPTIN