SilentSensors / mbed-dev

Modified for BG96

Fork of mbed-dev by mbed official

targets/TARGET_STM/gpio_api.c@188:60408c49b6d4, 2018-09-20 (annotated)

Committer:
WaleedElmughrabi
Date:
Thu Sep 20 16:11:23 2018 +0000
Revision:
188:60408c49b6d4
Parent:
187:0387e8f68319 
Fork modified for BG96 error

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 157:ff67d9f36b67 1 /* mbed Microcontroller Library
<> 157:ff67d9f36b67 2 *******************************************************************************
<> 157:ff67d9f36b67 3 * Copyright (c) 2015, STMicroelectronics
<> 157:ff67d9f36b67 4 * All rights reserved.
<> 157:ff67d9f36b67 5 *
<> 157:ff67d9f36b67 6 * Redistribution and use in source and binary forms, with or without
<> 157:ff67d9f36b67 7 * modification, are permitted provided that the following conditions are met:
<> 157:ff67d9f36b67 8 *
<> 157:ff67d9f36b67 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 157:ff67d9f36b67 10 * this list of conditions and the following disclaimer.
<> 157:ff67d9f36b67 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 157:ff67d9f36b67 12 * this list of conditions and the following disclaimer in the documentation
<> 157:ff67d9f36b67 13 * and/or other materials provided with the distribution.
<> 157:ff67d9f36b67 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 157:ff67d9f36b67 15 * may be used to endorse or promote products derived from this software
<> 157:ff67d9f36b67 16 * without specific prior written permission.
<> 157:ff67d9f36b67 17 *
<> 157:ff67d9f36b67 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 157:ff67d9f36b67 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 157:ff67d9f36b67 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 157:ff67d9f36b67 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 157:ff67d9f36b67 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 157:ff67d9f36b67 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 157:ff67d9f36b67 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 157:ff67d9f36b67 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 157:ff67d9f36b67 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 157:ff67d9f36b67 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 157:ff67d9f36b67 28 *******************************************************************************
<> 157:ff67d9f36b67 29 */
<> 157:ff67d9f36b67 30 #include "mbed_assert.h"
<> 157:ff67d9f36b67 31 #include "gpio_api.h"
<> 157:ff67d9f36b67 32 #include "pinmap.h"
<> 157:ff67d9f36b67 33 #include "mbed_error.h"
<> 160:d5399cc887bb 34 #include "pin_device.h"
<> 157:ff67d9f36b67 35
<> 160:d5399cc887bb 36 extern const uint32_t ll_pin_defines[16];
<> 160:d5399cc887bb 37
<> 160:d5399cc887bb 38 // Enable GPIO clock and return GPIO base address
AnnaBridge 187:0387e8f68319 39 GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx)
AnnaBridge 187:0387e8f68319 40 {
<> 160:d5399cc887bb 41 uint32_t gpio_add = 0;
<> 160:d5399cc887bb 42 switch (port_idx) {
<> 160:d5399cc887bb 43 case PortA:
<> 160:d5399cc887bb 44 gpio_add = GPIOA_BASE;
AnnaBridge 165:e614a9f1c9e2 45 __HAL_RCC_GPIOA_CLK_ENABLE();
<> 160:d5399cc887bb 46 break;
<> 160:d5399cc887bb 47 case PortB:
<> 160:d5399cc887bb 48 gpio_add = GPIOB_BASE;
AnnaBridge 165:e614a9f1c9e2 49 __HAL_RCC_GPIOB_CLK_ENABLE();
<> 160:d5399cc887bb 50 break;
<> 160:d5399cc887bb 51 #if defined(GPIOC_BASE)
<> 160:d5399cc887bb 52 case PortC:
<> 160:d5399cc887bb 53 gpio_add = GPIOC_BASE;
AnnaBridge 165:e614a9f1c9e2 54 __HAL_RCC_GPIOC_CLK_ENABLE();
<> 160:d5399cc887bb 55 break;
<> 160:d5399cc887bb 56 #endif
<> 160:d5399cc887bb 57 #if defined GPIOD_BASE
<> 160:d5399cc887bb 58 case PortD:
<> 160:d5399cc887bb 59 gpio_add = GPIOD_BASE;
AnnaBridge 165:e614a9f1c9e2 60 __HAL_RCC_GPIOD_CLK_ENABLE();
<> 160:d5399cc887bb 61 break;
<> 160:d5399cc887bb 62 #endif
<> 160:d5399cc887bb 63 #if defined GPIOE_BASE
<> 160:d5399cc887bb 64 case PortE:
<> 160:d5399cc887bb 65 gpio_add = GPIOE_BASE;
AnnaBridge 165:e614a9f1c9e2 66 __HAL_RCC_GPIOE_CLK_ENABLE();
<> 160:d5399cc887bb 67 break;
<> 160:d5399cc887bb 68 #endif
<> 160:d5399cc887bb 69 #if defined GPIOF_BASE
<> 160:d5399cc887bb 70 case PortF:
<> 160:d5399cc887bb 71 gpio_add = GPIOF_BASE;
AnnaBridge 165:e614a9f1c9e2 72 __HAL_RCC_GPIOF_CLK_ENABLE();
<> 160:d5399cc887bb 73 break;
<> 160:d5399cc887bb 74 #endif
<> 160:d5399cc887bb 75 #if defined GPIOG_BASE
<> 160:d5399cc887bb 76 case PortG:
<> 160:d5399cc887bb 77 #if defined TARGET_STM32L4
<> 160:d5399cc887bb 78 __HAL_RCC_PWR_CLK_ENABLE();
<> 160:d5399cc887bb 79 HAL_PWREx_EnableVddIO2();
<> 160:d5399cc887bb 80 #endif
<> 160:d5399cc887bb 81 gpio_add = GPIOG_BASE;
AnnaBridge 165:e614a9f1c9e2 82 __HAL_RCC_GPIOG_CLK_ENABLE();
<> 160:d5399cc887bb 83 break;
<> 160:d5399cc887bb 84 #endif
<> 160:d5399cc887bb 85 #if defined GPIOH_BASE
<> 160:d5399cc887bb 86 case PortH:
<> 160:d5399cc887bb 87 gpio_add = GPIOH_BASE;
AnnaBridge 165:e614a9f1c9e2 88 __HAL_RCC_GPIOH_CLK_ENABLE();
<> 160:d5399cc887bb 89 break;
<> 160:d5399cc887bb 90 #endif
<> 160:d5399cc887bb 91 #if defined GPIOI_BASE
<> 160:d5399cc887bb 92 case PortI:
<> 160:d5399cc887bb 93 gpio_add = GPIOI_BASE;
AnnaBridge 165:e614a9f1c9e2 94 __HAL_RCC_GPIOI_CLK_ENABLE();
<> 160:d5399cc887bb 95 break;
<> 160:d5399cc887bb 96 #endif
<> 160:d5399cc887bb 97 #if defined GPIOJ_BASE
<> 160:d5399cc887bb 98 case PortJ:
<> 160:d5399cc887bb 99 gpio_add = GPIOJ_BASE;
AnnaBridge 165:e614a9f1c9e2 100 __HAL_RCC_GPIOJ_CLK_ENABLE();
<> 160:d5399cc887bb 101 break;
<> 160:d5399cc887bb 102 #endif
<> 160:d5399cc887bb 103 #if defined GPIOK_BASE
<> 160:d5399cc887bb 104 case PortK:
<> 160:d5399cc887bb 105 gpio_add = GPIOK_BASE;
AnnaBridge 165:e614a9f1c9e2 106 __HAL_RCC_GPIOK_CLK_ENABLE();
<> 160:d5399cc887bb 107 break;
<> 160:d5399cc887bb 108 #endif
<> 160:d5399cc887bb 109 default:
<> 160:d5399cc887bb 110 error("Pinmap error: wrong port number.");
<> 160:d5399cc887bb 111 break;
<> 160:d5399cc887bb 112 }
<> 160:d5399cc887bb 113 return (GPIO_TypeDef *) gpio_add;
<> 160:d5399cc887bb 114 }
<> 157:ff67d9f36b67 115
AnnaBridge 187:0387e8f68319 116 uint32_t gpio_set(PinName pin)
AnnaBridge 187:0387e8f68319 117 {
<> 157:ff67d9f36b67 118 MBED_ASSERT(pin != (PinName)NC);
<> 157:ff67d9f36b67 119
<> 157:ff67d9f36b67 120 pin_function(pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
<> 157:ff67d9f36b67 121
<> 157:ff67d9f36b67 122 return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask
<> 157:ff67d9f36b67 123 }
<> 157:ff67d9f36b67 124
<> 160:d5399cc887bb 125
AnnaBridge 187:0387e8f68319 126 void gpio_init(gpio_t *obj, PinName pin)
AnnaBridge 187:0387e8f68319 127 {
<> 157:ff67d9f36b67 128 obj->pin = pin;
<> 157:ff67d9f36b67 129 if (pin == (PinName)NC) {
<> 157:ff67d9f36b67 130 return;
<> 157:ff67d9f36b67 131 }
<> 157:ff67d9f36b67 132
<> 157:ff67d9f36b67 133 uint32_t port_index = STM_PORT(pin);
<> 157:ff67d9f36b67 134
<> 157:ff67d9f36b67 135 // Enable GPIO clock
<> 160:d5399cc887bb 136 GPIO_TypeDef *gpio = Set_GPIO_Clock(port_index);
<> 157:ff67d9f36b67 137
<> 157:ff67d9f36b67 138 // Fill GPIO object structure for future use
<> 157:ff67d9f36b67 139 obj->mask = gpio_set(pin);
<> 160:d5399cc887bb 140 obj->gpio = gpio;
<> 160:d5399cc887bb 141 obj->ll_pin = ll_pin_defines[STM_PIN(obj->pin)];
<> 157:ff67d9f36b67 142 obj->reg_in = &gpio->IDR;
<> 157:ff67d9f36b67 143 obj->reg_set = &gpio->BSRR;
<> 157:ff67d9f36b67 144 #ifdef GPIO_IP_WITHOUT_BRR
<> 157:ff67d9f36b67 145 obj->reg_clr = &gpio->BSRR;
<> 157:ff67d9f36b67 146 #else
<> 157:ff67d9f36b67 147 obj->reg_clr = &gpio->BRR;
<> 157:ff67d9f36b67 148 #endif
<> 157:ff67d9f36b67 149 }
<> 157:ff67d9f36b67 150
AnnaBridge 187:0387e8f68319 151 void gpio_mode(gpio_t *obj, PinMode mode)
AnnaBridge 187:0387e8f68319 152 {
<> 157:ff67d9f36b67 153 pin_mode(obj->pin, mode);
<> 157:ff67d9f36b67 154 }
<> 157:ff67d9f36b67 155
AnnaBridge 187:0387e8f68319 156 inline void gpio_dir(gpio_t *obj, PinDirection direction)
AnnaBridge 187:0387e8f68319 157 {
<> 160:d5399cc887bb 158 if (direction == PIN_INPUT) {
<> 160:d5399cc887bb 159 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_INPUT);
<> 160:d5399cc887bb 160 } else {
<> 160:d5399cc887bb 161 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_OUTPUT);
<> 157:ff67d9f36b67 162 }
<> 157:ff67d9f36b67 163 }
<> 160:d5399cc887bb 164