SilentSensors / mbed-dev

Modified for BG96

Fork of mbed-dev by mbed official

targets/TARGET_STM/sleep.c@181:57724642e740, 2018-02-16 (annotated)

Committer:
AnnaBridge
Date:
Fri Feb 16 16:09:33 2018 +0000
Revision:
181:57724642e740
Parent:
180:96ed750bd169
Child:
186:707f6e361f3e
mbed-dev library. Release version 159.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 154:37f96f9d4de2 1 /* mbed Microcontroller Library
<> 154:37f96f9d4de2 2 *******************************************************************************
<> 154:37f96f9d4de2 3 * Copyright (c) 2016, STMicroelectronics
<> 154:37f96f9d4de2 4 * All rights reserved.
<> 154:37f96f9d4de2 5 *
<> 154:37f96f9d4de2 6 * Redistribution and use in source and binary forms, with or without
<> 154:37f96f9d4de2 7 * modification, are permitted provided that the following conditions are met:
<> 154:37f96f9d4de2 8 *
<> 154:37f96f9d4de2 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 154:37f96f9d4de2 10 * this list of conditions and the following disclaimer.
<> 154:37f96f9d4de2 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 154:37f96f9d4de2 12 * this list of conditions and the following disclaimer in the documentation
<> 154:37f96f9d4de2 13 * and/or other materials provided with the distribution.
<> 154:37f96f9d4de2 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 154:37f96f9d4de2 15 * may be used to endorse or promote products derived from this software
<> 154:37f96f9d4de2 16 * without specific prior written permission.
<> 154:37f96f9d4de2 17 *
<> 154:37f96f9d4de2 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 154:37f96f9d4de2 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 154:37f96f9d4de2 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 154:37f96f9d4de2 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 154:37f96f9d4de2 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 154:37f96f9d4de2 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 154:37f96f9d4de2 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 154:37f96f9d4de2 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 154:37f96f9d4de2 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 154:37f96f9d4de2 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 154:37f96f9d4de2 28 *******************************************************************************
<> 154:37f96f9d4de2 29 */
<> 154:37f96f9d4de2 30 #if DEVICE_SLEEP
<> 154:37f96f9d4de2 31
<> 160:d5399cc887bb 32 #include "sleep_api.h"
<> 160:d5399cc887bb 33 #include "rtc_api_hal.h"
<> 154:37f96f9d4de2 34
<> 160:d5399cc887bb 35 extern void HAL_SuspendTick(void);
<> 160:d5399cc887bb 36 extern void HAL_ResumeTick(void);
<> 160:d5399cc887bb 37
<> 160:d5399cc887bb 38 void hal_sleep(void)
<> 154:37f96f9d4de2 39 {
AnnaBridge 172:7d866c31b3c5 40 // Disable IRQs
AnnaBridge 172:7d866c31b3c5 41 core_util_critical_section_enter();
AnnaBridge 172:7d866c31b3c5 42
<> 160:d5399cc887bb 43 // Stop HAL tick to avoid to exit sleep in 1ms
<> 154:37f96f9d4de2 44 HAL_SuspendTick();
<> 154:37f96f9d4de2 45 // Request to enter SLEEP mode
<> 154:37f96f9d4de2 46 HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI);
<> 160:d5399cc887bb 47 // Restart HAL tick
<> 154:37f96f9d4de2 48 HAL_ResumeTick();
AnnaBridge 172:7d866c31b3c5 49
AnnaBridge 172:7d866c31b3c5 50 // Enable IRQs
AnnaBridge 172:7d866c31b3c5 51 core_util_critical_section_exit();
<> 154:37f96f9d4de2 52 }
<> 154:37f96f9d4de2 53
<> 160:d5399cc887bb 54 void hal_deepsleep(void)
<> 154:37f96f9d4de2 55 {
AnnaBridge 172:7d866c31b3c5 56 // Disable IRQs
AnnaBridge 172:7d866c31b3c5 57 core_util_critical_section_enter();
AnnaBridge 172:7d866c31b3c5 58
<> 160:d5399cc887bb 59 // Stop HAL tick
<> 154:37f96f9d4de2 60 HAL_SuspendTick();
<> 160:d5399cc887bb 61 uint32_t EnterTimeUS = us_ticker_read();
<> 154:37f96f9d4de2 62
<> 154:37f96f9d4de2 63 // Request to enter STOP mode with regulator in low power mode
<> 154:37f96f9d4de2 64 #if TARGET_STM32L4
<> 160:d5399cc887bb 65 int pwrClockEnabled = __HAL_RCC_PWR_IS_CLK_ENABLED();
<> 160:d5399cc887bb 66 int lowPowerModeEnabled = PWR->CR1 & PWR_CR1_LPR;
Anna Bridge 180:96ed750bd169 67
<> 160:d5399cc887bb 68 if (!pwrClockEnabled) {
<> 160:d5399cc887bb 69 __HAL_RCC_PWR_CLK_ENABLE();
<> 160:d5399cc887bb 70 }
<> 160:d5399cc887bb 71 if (lowPowerModeEnabled) {
<> 156:95d6b41a828b 72 HAL_PWREx_DisableLowPowerRunMode();
<> 160:d5399cc887bb 73 }
Anna Bridge 180:96ed750bd169 74
<> 160:d5399cc887bb 75 HAL_PWREx_EnterSTOP2Mode(PWR_STOPENTRY_WFI);
Anna Bridge 180:96ed750bd169 76
<> 160:d5399cc887bb 77 if (lowPowerModeEnabled) {
<> 156:95d6b41a828b 78 HAL_PWREx_EnableLowPowerRunMode();
<> 160:d5399cc887bb 79 }
<> 160:d5399cc887bb 80 if (!pwrClockEnabled) {
<> 156:95d6b41a828b 81 __HAL_RCC_PWR_CLK_DISABLE();
<> 156:95d6b41a828b 82 }
<> 154:37f96f9d4de2 83 #else /* TARGET_STM32L4 */
<> 154:37f96f9d4de2 84 HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI);
<> 154:37f96f9d4de2 85 #endif /* TARGET_STM32L4 */
<> 154:37f96f9d4de2 86
<> 160:d5399cc887bb 87 // Restart HAL tick
<> 154:37f96f9d4de2 88 HAL_ResumeTick();
<> 154:37f96f9d4de2 89
AnnaBridge 172:7d866c31b3c5 90 // Enable IRQs
AnnaBridge 172:7d866c31b3c5 91 core_util_critical_section_exit();
AnnaBridge 172:7d866c31b3c5 92
<> 154:37f96f9d4de2 93 // After wake-up from STOP reconfigure the PLL
<> 154:37f96f9d4de2 94 SetSysClock();
<> 154:37f96f9d4de2 95
<> 160:d5399cc887bb 96 TIM_HandleTypeDef TimMasterHandle;
<> 160:d5399cc887bb 97 TimMasterHandle.Instance = TIM_MST;
<> 160:d5399cc887bb 98 __HAL_TIM_SET_COUNTER(&TimMasterHandle, EnterTimeUS);
<> 160:d5399cc887bb 99
Anna Bridge 180:96ed750bd169 100 #if DEVICE_RTC
Anna Bridge 180:96ed750bd169 101 /* Wait for RTC RSF bit synchro if RTC is configured */
Anna Bridge 180:96ed750bd169 102 #if (TARGET_STM32F2) || (TARGET_STM32F4) || (TARGET_STM32F7)
Anna Bridge 180:96ed750bd169 103 if (READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL)) {
Anna Bridge 180:96ed750bd169 104 #else /* (TARGET_STM32F2) || (TARGET_STM32F4) || (TARGET_STM32F7) */
Anna Bridge 180:96ed750bd169 105 if (__HAL_RCC_GET_RTC_SOURCE()) {
Anna Bridge 180:96ed750bd169 106 #endif /* (TARGET_STM32F2) || (TARGET_STM32F4) || (TARGET_STM32F7) */
Anna Bridge 180:96ed750bd169 107 rtc_synchronize();
Anna Bridge 180:96ed750bd169 108 }
<> 154:37f96f9d4de2 109 #endif
<> 154:37f96f9d4de2 110 }
<> 154:37f96f9d4de2 111
<> 154:37f96f9d4de2 112 #endif