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lwip-eth/arch/TARGET_NXP/lpc_phy.h@0:d7bd7384a37c, 2016-12-07 (annotated)

Committer:
grzemich
Date:
Wed Dec 07 23:47:50 2016 +0000
Revision:
0:d7bd7384a37c
dgd

Who changed what in which revision?

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grzemich 0:d7bd7384a37c 1 /**********************************************************************
grzemich 0:d7bd7384a37c 2 * $Id$ lpc_phy.h 2011-11-20
grzemich 0:d7bd7384a37c 3 *//**
grzemich 0:d7bd7384a37c 4 * @file lpc_phy.h
grzemich 0:d7bd7384a37c 5 * @brief Common PHY definitions used with all PHYs
grzemich 0:d7bd7384a37c 6 * @version 1.0
grzemich 0:d7bd7384a37c 7 * @date 20 Nov. 2011
grzemich 0:d7bd7384a37c 8 * @author NXP MCU SW Application Team
grzemich 0:d7bd7384a37c 9 *
grzemich 0:d7bd7384a37c 10 * Copyright(C) 2011, NXP Semiconductor
grzemich 0:d7bd7384a37c 11 * All rights reserved.
grzemich 0:d7bd7384a37c 12 *
grzemich 0:d7bd7384a37c 13 ***********************************************************************
grzemich 0:d7bd7384a37c 14 * Software that is described herein is for illustrative purposes only
grzemich 0:d7bd7384a37c 15 * which provides customers with programming information regarding the
grzemich 0:d7bd7384a37c 16 * products. This software is supplied "AS IS" without any warranties.
grzemich 0:d7bd7384a37c 17 * NXP Semiconductors assumes no responsibility or liability for the
grzemich 0:d7bd7384a37c 18 * use of the software, conveys no license or title under any patent,
grzemich 0:d7bd7384a37c 19 * copyright, or mask work right to the product. NXP Semiconductors
grzemich 0:d7bd7384a37c 20 * reserves the right to make changes in the software without
grzemich 0:d7bd7384a37c 21 * notification. NXP Semiconductors also make no representation or
grzemich 0:d7bd7384a37c 22 * warranty that such application will be suitable for the specified
grzemich 0:d7bd7384a37c 23 * use without further testing or modification.
grzemich 0:d7bd7384a37c 24 **********************************************************************/
grzemich 0:d7bd7384a37c 25
grzemich 0:d7bd7384a37c 26 #ifndef __LPC_PHY_H_
grzemich 0:d7bd7384a37c 27 #define __LPC_PHY_H_
grzemich 0:d7bd7384a37c 28
grzemich 0:d7bd7384a37c 29 #include "lwip/opt.h"
grzemich 0:d7bd7384a37c 30 #include "lwip/err.h"
grzemich 0:d7bd7384a37c 31 #include "lwip/netif.h"
grzemich 0:d7bd7384a37c 32
grzemich 0:d7bd7384a37c 33 #ifdef __cplusplus
grzemich 0:d7bd7384a37c 34 extern "C"
grzemich 0:d7bd7384a37c 35 {
grzemich 0:d7bd7384a37c 36 #endif
grzemich 0:d7bd7384a37c 37
grzemich 0:d7bd7384a37c 38 /* These PHY functions are usually part of the EMAC driver */
grzemich 0:d7bd7384a37c 39
grzemich 0:d7bd7384a37c 40 /** \brief Phy status update state machine
grzemich 0:d7bd7384a37c 41 *
grzemich 0:d7bd7384a37c 42 * This function provides a state machine for maintaining the PHY
grzemich 0:d7bd7384a37c 43 * status without blocking. It must be occasionally called for the
grzemich 0:d7bd7384a37c 44 * PHY status to be maintained.
grzemich 0:d7bd7384a37c 45 *
grzemich 0:d7bd7384a37c 46 * \param[in] netif NETIF structure
grzemich 0:d7bd7384a37c 47 */
grzemich 0:d7bd7384a37c 48 s32_t lpc_phy_sts_sm(struct netif *netif);
grzemich 0:d7bd7384a37c 49
grzemich 0:d7bd7384a37c 50 /** \brief Initialize the PHY
grzemich 0:d7bd7384a37c 51 *
grzemich 0:d7bd7384a37c 52 * This function initializes the PHY. It will block until complete.
grzemich 0:d7bd7384a37c 53 * This function is called as part of the EMAC driver
grzemich 0:d7bd7384a37c 54 * initialization. Configuration of the PHY at startup is
grzemich 0:d7bd7384a37c 55 * controlled by setting up configuration defines in lpc_phy.h.
grzemich 0:d7bd7384a37c 56 *
grzemich 0:d7bd7384a37c 57 * \param[in] netif NETIF structure
grzemich 0:d7bd7384a37c 58 * \param[in] rmii If set, configures the PHY for RMII mode
grzemich 0:d7bd7384a37c 59 * \return ERR_OK if the setup was successful, otherwise ERR_TIMEOUT
grzemich 0:d7bd7384a37c 60 */
grzemich 0:d7bd7384a37c 61 err_t lpc_phy_init(struct netif *netif, int rmii);
grzemich 0:d7bd7384a37c 62
grzemich 0:d7bd7384a37c 63 /** \brief Write a value via the MII link (non-blocking)
grzemich 0:d7bd7384a37c 64 *
grzemich 0:d7bd7384a37c 65 * This function will write a value on the MII link interface to a PHY
grzemich 0:d7bd7384a37c 66 * or a connected device. The function will return immediately without
grzemich 0:d7bd7384a37c 67 * a status. Status needs to be polled later to determine if the write
grzemich 0:d7bd7384a37c 68 * was successful.
grzemich 0:d7bd7384a37c 69 *
grzemich 0:d7bd7384a37c 70 * \param[in] PhyReg PHY register to write to
grzemich 0:d7bd7384a37c 71 * \param[in] Value Value to write
grzemich 0:d7bd7384a37c 72 */
grzemich 0:d7bd7384a37c 73 void lpc_mii_write_noblock(u32_t PhyReg, u32_t Value);
grzemich 0:d7bd7384a37c 74
grzemich 0:d7bd7384a37c 75 /** \brief Write a value via the MII link (blocking)
grzemich 0:d7bd7384a37c 76 *
grzemich 0:d7bd7384a37c 77 * This function will write a value on the MII link interface to a PHY
grzemich 0:d7bd7384a37c 78 * or a connected device. The function will block until complete.
grzemich 0:d7bd7384a37c 79 *
grzemich 0:d7bd7384a37c 80 * \param[in] PhyReg PHY register to write to
grzemich 0:d7bd7384a37c 81 * \param[in] Value Value to write
grzemich 0:d7bd7384a37c 82 * \returns 0 if the write was successful, otherwise !0
grzemich 0:d7bd7384a37c 83 */
grzemich 0:d7bd7384a37c 84 err_t lpc_mii_write(u32_t PhyReg, u32_t Value);
grzemich 0:d7bd7384a37c 85
grzemich 0:d7bd7384a37c 86 /** \brief Reads current MII link busy status
grzemich 0:d7bd7384a37c 87 *
grzemich 0:d7bd7384a37c 88 * This function will return the current MII link busy status and is meant to
grzemich 0:d7bd7384a37c 89 * be used with non-blocking functions for monitor PHY status such as
grzemich 0:d7bd7384a37c 90 * connection state.
grzemich 0:d7bd7384a37c 91 *
grzemich 0:d7bd7384a37c 92 * \returns !0 if the MII link is busy, otherwise 0
grzemich 0:d7bd7384a37c 93 */
grzemich 0:d7bd7384a37c 94 u32_t lpc_mii_is_busy(void);
grzemich 0:d7bd7384a37c 95
grzemich 0:d7bd7384a37c 96 /** \brief Starts a read operation via the MII link (non-blocking)
grzemich 0:d7bd7384a37c 97 *
grzemich 0:d7bd7384a37c 98 * This function returns the current value in the MII data register. It is
grzemich 0:d7bd7384a37c 99 * meant to be used with the non-blocking oeprations. This value should
grzemich 0:d7bd7384a37c 100 * only be read after a non-block read command has been issued and the
grzemich 0:d7bd7384a37c 101 * MII status has been determined to be good.
grzemich 0:d7bd7384a37c 102 *
grzemich 0:d7bd7384a37c 103 * \returns The current value in the MII value register
grzemich 0:d7bd7384a37c 104 */
grzemich 0:d7bd7384a37c 105 u32_t lpc_mii_read_data(void);
grzemich 0:d7bd7384a37c 106
grzemich 0:d7bd7384a37c 107 /** \brief Starts a read operation via the MII link (non-blocking)
grzemich 0:d7bd7384a37c 108 *
grzemich 0:d7bd7384a37c 109 * This function will start a read operation on the MII link interface
grzemich 0:d7bd7384a37c 110 * from a PHY or a connected device. The function will not block and
grzemich 0:d7bd7384a37c 111 * the status mist be polled until complete. Once complete, the data
grzemich 0:d7bd7384a37c 112 * can be read.
grzemich 0:d7bd7384a37c 113 *
grzemich 0:d7bd7384a37c 114 * \param[in] PhyReg PHY register to read from
grzemich 0:d7bd7384a37c 115 */
grzemich 0:d7bd7384a37c 116 err_t lpc_mii_read(u32_t PhyReg, u32_t *data);
grzemich 0:d7bd7384a37c 117
grzemich 0:d7bd7384a37c 118 /** \brief Read a value via the MII link (blocking)
grzemich 0:d7bd7384a37c 119 *
grzemich 0:d7bd7384a37c 120 * This function will read a value on the MII link interface from a PHY
grzemich 0:d7bd7384a37c 121 * or a connected device. The function will block until complete.
grzemich 0:d7bd7384a37c 122 *
grzemich 0:d7bd7384a37c 123 * \param[in] PhyReg PHY register to read from
grzemich 0:d7bd7384a37c 124 * \param[in] data Pointer to where to save data read via MII
grzemich 0:d7bd7384a37c 125 * \returns 0 if the read was successful, otherwise !0
grzemich 0:d7bd7384a37c 126 */
grzemich 0:d7bd7384a37c 127 void lpc_mii_read_noblock(u32_t PhyReg);
grzemich 0:d7bd7384a37c 128
grzemich 0:d7bd7384a37c 129 /**
grzemich 0:d7bd7384a37c 130 * This function provides a method for the PHY to setup the EMAC
grzemich 0:d7bd7384a37c 131 * for the PHY negotiated duplex mode.
grzemich 0:d7bd7384a37c 132 *
grzemich 0:d7bd7384a37c 133 * @param[in] full_duplex 0 = half duplex, 1 = full duplex
grzemich 0:d7bd7384a37c 134 */
grzemich 0:d7bd7384a37c 135 void lpc_emac_set_duplex(int full_duplex);
grzemich 0:d7bd7384a37c 136
grzemich 0:d7bd7384a37c 137 /**
grzemich 0:d7bd7384a37c 138 * This function provides a method for the PHY to setup the EMAC
grzemich 0:d7bd7384a37c 139 * for the PHY negotiated bit rate.
grzemich 0:d7bd7384a37c 140 *
grzemich 0:d7bd7384a37c 141 * @param[in] mbs_100 0 = 10mbs mode, 1 = 100mbs mode
grzemich 0:d7bd7384a37c 142 */
grzemich 0:d7bd7384a37c 143 void lpc_emac_set_speed(int mbs_100);
grzemich 0:d7bd7384a37c 144
grzemich 0:d7bd7384a37c 145 #ifdef __cplusplus
grzemich 0:d7bd7384a37c 146 }
grzemich 0:d7bd7384a37c 147 #endif
grzemich 0:d7bd7384a37c 148
grzemich 0:d7bd7384a37c 149 #endif /* __LPC_PHY_H_ */
grzemich 0:d7bd7384a37c 150
grzemich 0:d7bd7384a37c 151 /* --------------------------------- End Of File ------------------------------ */