SiSK / EthernetInterface

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lwip-eth/arch/TARGET_Freescale/hardware_init_MK64F12.c@0:d7bd7384a37c, 2016-12-07 (annotated)

Committer:
grzemich
Date:
Wed Dec 07 23:47:50 2016 +0000
Revision:
0:d7bd7384a37c
dgd

Who changed what in which revision?

UserRevisionLine numberNew contents of line
grzemich 0:d7bd7384a37c 1 /*
grzemich 0:d7bd7384a37c 2 * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
grzemich 0:d7bd7384a37c 3 * All rights reserved.
grzemich 0:d7bd7384a37c 4 *
grzemich 0:d7bd7384a37c 5 * Redistribution and use in source and binary forms, with or without modification,
grzemich 0:d7bd7384a37c 6 * are permitted provided that the following conditions are met:
grzemich 0:d7bd7384a37c 7 *
grzemich 0:d7bd7384a37c 8 * o Redistributions of source code must retain the above copyright notice, this list
grzemich 0:d7bd7384a37c 9 * of conditions and the following disclaimer.
grzemich 0:d7bd7384a37c 10 *
grzemich 0:d7bd7384a37c 11 * o Redistributions in binary form must reproduce the above copyright notice, this
grzemich 0:d7bd7384a37c 12 * list of conditions and the following disclaimer in the documentation and/or
grzemich 0:d7bd7384a37c 13 * other materials provided with the distribution.
grzemich 0:d7bd7384a37c 14 *
grzemich 0:d7bd7384a37c 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
grzemich 0:d7bd7384a37c 16 * contributors may be used to endorse or promote products derived from this
grzemich 0:d7bd7384a37c 17 * software without specific prior written permission.
grzemich 0:d7bd7384a37c 18 *
grzemich 0:d7bd7384a37c 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
grzemich 0:d7bd7384a37c 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
grzemich 0:d7bd7384a37c 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
grzemich 0:d7bd7384a37c 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
grzemich 0:d7bd7384a37c 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
grzemich 0:d7bd7384a37c 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
grzemich 0:d7bd7384a37c 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
grzemich 0:d7bd7384a37c 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
grzemich 0:d7bd7384a37c 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
grzemich 0:d7bd7384a37c 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
grzemich 0:d7bd7384a37c 29 */
grzemich 0:d7bd7384a37c 30
grzemich 0:d7bd7384a37c 31 #include "fsl_port.h"
grzemich 0:d7bd7384a37c 32
grzemich 0:d7bd7384a37c 33 /*******************************************************************************
grzemich 0:d7bd7384a37c 34 * Code
grzemich 0:d7bd7384a37c 35 ******************************************************************************/
grzemich 0:d7bd7384a37c 36 void k64f_init_eth_hardware(void)
grzemich 0:d7bd7384a37c 37 {
grzemich 0:d7bd7384a37c 38 port_pin_config_t configENET = {0};
grzemich 0:d7bd7384a37c 39
grzemich 0:d7bd7384a37c 40 /* Disable MPU. */
grzemich 0:d7bd7384a37c 41 MPU->CESR &= ~MPU_CESR_VLD_MASK;
grzemich 0:d7bd7384a37c 42
grzemich 0:d7bd7384a37c 43 CLOCK_EnableClock(kCLOCK_PortC);
grzemich 0:d7bd7384a37c 44 /* Affects PORTC_PCR16 register */
grzemich 0:d7bd7384a37c 45 PORT_SetPinMux(PORTC, 16u, kPORT_MuxAlt4);
grzemich 0:d7bd7384a37c 46 /* Affects PORTC_PCR17 register */
grzemich 0:d7bd7384a37c 47 PORT_SetPinMux(PORTC, 17u, kPORT_MuxAlt4);
grzemich 0:d7bd7384a37c 48 /* Affects PORTC_PCR18 register */
grzemich 0:d7bd7384a37c 49 PORT_SetPinMux(PORTC, 18u, kPORT_MuxAlt4);
grzemich 0:d7bd7384a37c 50 /* Affects PORTC_PCR19 register */
grzemich 0:d7bd7384a37c 51 PORT_SetPinMux(PORTC, 19u, kPORT_MuxAlt4);
grzemich 0:d7bd7384a37c 52 /* Affects PORTB_PCR1 register */
grzemich 0:d7bd7384a37c 53 PORT_SetPinMux(PORTB, 1u, kPORT_MuxAlt4);
grzemich 0:d7bd7384a37c 54
grzemich 0:d7bd7384a37c 55 configENET.openDrainEnable = kPORT_OpenDrainEnable;
grzemich 0:d7bd7384a37c 56 configENET.mux = kPORT_MuxAlt4;
grzemich 0:d7bd7384a37c 57 configENET.pullSelect = kPORT_PullUp;
grzemich 0:d7bd7384a37c 58 /* Ungate the port clock */
grzemich 0:d7bd7384a37c 59 CLOCK_EnableClock(kCLOCK_PortA);
grzemich 0:d7bd7384a37c 60 /* Affects PORTB_PCR0 register */
grzemich 0:d7bd7384a37c 61 PORT_SetPinConfig(PORTB, 0u, &configENET);
grzemich 0:d7bd7384a37c 62
grzemich 0:d7bd7384a37c 63 /* Affects PORTA_PCR13 register */
grzemich 0:d7bd7384a37c 64 PORT_SetPinMux(PORTA, 13u, kPORT_MuxAlt4);
grzemich 0:d7bd7384a37c 65 /* Affects PORTA_PCR12 register */
grzemich 0:d7bd7384a37c 66 PORT_SetPinMux(PORTA, 12u, kPORT_MuxAlt4);
grzemich 0:d7bd7384a37c 67 /* Affects PORTA_PCR14 register */
grzemich 0:d7bd7384a37c 68 PORT_SetPinMux(PORTA, 14u, kPORT_MuxAlt4);
grzemich 0:d7bd7384a37c 69 /* Affects PORTA_PCR5 register */
grzemich 0:d7bd7384a37c 70 PORT_SetPinMux(PORTA, 5u, kPORT_MuxAlt4);
grzemich 0:d7bd7384a37c 71 /* Affects PORTA_PCR16 register */
grzemich 0:d7bd7384a37c 72 PORT_SetPinMux(PORTA, 16u, kPORT_MuxAlt4);
grzemich 0:d7bd7384a37c 73 /* Affects PORTA_PCR17 register */
grzemich 0:d7bd7384a37c 74 PORT_SetPinMux(PORTA, 17u, kPORT_MuxAlt4);
grzemich 0:d7bd7384a37c 75 /* Affects PORTA_PCR15 register */
grzemich 0:d7bd7384a37c 76 PORT_SetPinMux(PORTA, 15u, kPORT_MuxAlt4);
grzemich 0:d7bd7384a37c 77 /* Affects PORTA_PCR28 register */
grzemich 0:d7bd7384a37c 78 PORT_SetPinMux(PORTA, 28u, kPORT_MuxAlt4);
grzemich 0:d7bd7384a37c 79
grzemich 0:d7bd7384a37c 80 /* Select the Ethernet timestamp clock source */
grzemich 0:d7bd7384a37c 81 CLOCK_SetEnetTime0Clock(0x2);
grzemich 0:d7bd7384a37c 82 }
grzemich 0:d7bd7384a37c 83
grzemich 0:d7bd7384a37c 84 /*******************************************************************************
grzemich 0:d7bd7384a37c 85 * EOF
grzemich 0:d7bd7384a37c 86 ******************************************************************************/
grzemich 0:d7bd7384a37c 87
grzemich 0:d7bd7384a37c 88