Senior Design: Sound Monitor / STM32L4xx_HAL_Driver

L4 HAL Drivers

Inc/stm32l4xx_hal.h@0:80ee8f3b695e, 2015-11-02 (annotated)

Committer:
EricLew
Date:
Mon Nov 02 19:37:23 2015 +0000
Revision:
0:80ee8f3b695e
Errors are with definitions of LCD and QSPI functions. I believe all .h and .c files are  uploaded, but there may need to be certain functions called.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
EricLew 0:80ee8f3b695e 1 /**
EricLew 0:80ee8f3b695e 2 ******************************************************************************
EricLew 0:80ee8f3b695e 3 * @file stm32l4xx_hal.h
EricLew 0:80ee8f3b695e 4 * @author MCD Application Team
EricLew 0:80ee8f3b695e 5 * @version V1.1.0
EricLew 0:80ee8f3b695e 6 * @date 16-September-2015
EricLew 0:80ee8f3b695e 7 * @brief This file contains all the functions prototypes for the HAL
EricLew 0:80ee8f3b695e 8 * module driver.
EricLew 0:80ee8f3b695e 9 ******************************************************************************
EricLew 0:80ee8f3b695e 10 * @attention
EricLew 0:80ee8f3b695e 11 *
EricLew 0:80ee8f3b695e 12 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew 0:80ee8f3b695e 13 *
EricLew 0:80ee8f3b695e 14 * Redistribution and use in source and binary forms, with or without modification,
EricLew 0:80ee8f3b695e 15 * are permitted provided that the following conditions are met:
EricLew 0:80ee8f3b695e 16 * 1. Redistributions of source code must retain the above copyright notice,
EricLew 0:80ee8f3b695e 17 * this list of conditions and the following disclaimer.
EricLew 0:80ee8f3b695e 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew 0:80ee8f3b695e 19 * this list of conditions and the following disclaimer in the documentation
EricLew 0:80ee8f3b695e 20 * and/or other materials provided with the distribution.
EricLew 0:80ee8f3b695e 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew 0:80ee8f3b695e 22 * may be used to endorse or promote products derived from this software
EricLew 0:80ee8f3b695e 23 * without specific prior written permission.
EricLew 0:80ee8f3b695e 24 *
EricLew 0:80ee8f3b695e 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew 0:80ee8f3b695e 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew 0:80ee8f3b695e 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew 0:80ee8f3b695e 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew 0:80ee8f3b695e 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew 0:80ee8f3b695e 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew 0:80ee8f3b695e 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew 0:80ee8f3b695e 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew 0:80ee8f3b695e 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew 0:80ee8f3b695e 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew 0:80ee8f3b695e 35 *
EricLew 0:80ee8f3b695e 36 ******************************************************************************
EricLew 0:80ee8f3b695e 37 */
EricLew 0:80ee8f3b695e 38
EricLew 0:80ee8f3b695e 39 /* Define to prevent recursive inclusion -------------------------------------*/
EricLew 0:80ee8f3b695e 40 #ifndef __STM32L4xx_HAL_H
EricLew 0:80ee8f3b695e 41 #define __STM32L4xx_HAL_H
EricLew 0:80ee8f3b695e 42
EricLew 0:80ee8f3b695e 43 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 44 extern "C" {
EricLew 0:80ee8f3b695e 45 #endif
EricLew 0:80ee8f3b695e 46
EricLew 0:80ee8f3b695e 47 /* Includes ------------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 48 #include "stm32l4xx_hal_conf.h"
EricLew 0:80ee8f3b695e 49
EricLew 0:80ee8f3b695e 50 /** @addtogroup STM32L4xx_HAL_Driver
EricLew 0:80ee8f3b695e 51 * @{
EricLew 0:80ee8f3b695e 52 */
EricLew 0:80ee8f3b695e 53
EricLew 0:80ee8f3b695e 54 /** @addtogroup HAL
EricLew 0:80ee8f3b695e 55 * @{
EricLew 0:80ee8f3b695e 56 */
EricLew 0:80ee8f3b695e 57
EricLew 0:80ee8f3b695e 58 /* Exported types ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 59 /* Exported constants --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 60 /** @defgroup SYSCFG_Exported_Constants SYSCFG Exported Constants
EricLew 0:80ee8f3b695e 61 * @{
EricLew 0:80ee8f3b695e 62 */
EricLew 0:80ee8f3b695e 63
EricLew 0:80ee8f3b695e 64 /** @defgroup SYSCFG_BootMode Boot Mode
EricLew 0:80ee8f3b695e 65 * @{
EricLew 0:80ee8f3b695e 66 */
EricLew 0:80ee8f3b695e 67 #define SYSCFG_BOOT_MAINFLASH ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 68 #define SYSCFG_BOOT_SYSTEMFLASH SYSCFG_MEMRMP_MEM_MODE_0
EricLew 0:80ee8f3b695e 69 #define SYSCFG_BOOT_FMC SYSCFG_MEMRMP_MEM_MODE_1
EricLew 0:80ee8f3b695e 70 #define SYSCFG_BOOT_SRAM (SYSCFG_MEMRMP_MEM_MODE_1 | SYSCFG_MEMRMP_MEM_MODE_0)
EricLew 0:80ee8f3b695e 71 #define SYSCFG_BOOT_QUADSPI (SYSCFG_MEMRMP_MEM_MODE_2 | SYSCFG_MEMRMP_MEM_MODE_1)
EricLew 0:80ee8f3b695e 72
EricLew 0:80ee8f3b695e 73 /**
EricLew 0:80ee8f3b695e 74 * @}
EricLew 0:80ee8f3b695e 75 */
EricLew 0:80ee8f3b695e 76
EricLew 0:80ee8f3b695e 77 /** @defgroup SYSCFG_FPU_Interrupts FPU Interrupts
EricLew 0:80ee8f3b695e 78 * @{
EricLew 0:80ee8f3b695e 79 */
EricLew 0:80ee8f3b695e 80 #define SYSCFG_IT_FPU_IOC SYSCFG_CFGR1_FPU_IE_0 /*!< Floating Point Unit Invalid operation Interrupt */
EricLew 0:80ee8f3b695e 81 #define SYSCFG_IT_FPU_DZC SYSCFG_CFGR1_FPU_IE_1 /*!< Floating Point Unit Divide-by-zero Interrupt */
EricLew 0:80ee8f3b695e 82 #define SYSCFG_IT_FPU_UFC SYSCFG_CFGR1_FPU_IE_2 /*!< Floating Point Unit Underflow Interrupt */
EricLew 0:80ee8f3b695e 83 #define SYSCFG_IT_FPU_OFC SYSCFG_CFGR1_FPU_IE_3 /*!< Floating Point Unit Overflow Interrupt */
EricLew 0:80ee8f3b695e 84 #define SYSCFG_IT_FPU_IDC SYSCFG_CFGR1_FPU_IE_4 /*!< Floating Point Unit Input denormal Interrupt */
EricLew 0:80ee8f3b695e 85 #define SYSCFG_IT_FPU_IXC SYSCFG_CFGR1_FPU_IE_5 /*!< Floating Point Unit Inexact Interrupt */
EricLew 0:80ee8f3b695e 86
EricLew 0:80ee8f3b695e 87 /**
EricLew 0:80ee8f3b695e 88 * @}
EricLew 0:80ee8f3b695e 89 */
EricLew 0:80ee8f3b695e 90
EricLew 0:80ee8f3b695e 91 /** @defgroup SYSCFG_SRAM2WRP SRAM2 Write protection
EricLew 0:80ee8f3b695e 92 * @{
EricLew 0:80ee8f3b695e 93 */
EricLew 0:80ee8f3b695e 94 #define SYSCFG_SRAM2WRP_PAGE0 SYSCFG_SWPR_PAGE0 /*!< SRAM2 Write protection page 0 */
EricLew 0:80ee8f3b695e 95 #define SYSCFG_SRAM2WRP_PAGE1 SYSCFG_SWPR_PAGE1 /*!< SRAM2 Write protection page 1 */
EricLew 0:80ee8f3b695e 96 #define SYSCFG_SRAM2WRP_PAGE2 SYSCFG_SWPR_PAGE2 /*!< SRAM2 Write protection page 2 */
EricLew 0:80ee8f3b695e 97 #define SYSCFG_SRAM2WRP_PAGE3 SYSCFG_SWPR_PAGE3 /*!< SRAM2 Write protection page 3 */
EricLew 0:80ee8f3b695e 98 #define SYSCFG_SRAM2WRP_PAGE4 SYSCFG_SWPR_PAGE4 /*!< SRAM2 Write protection page 4 */
EricLew 0:80ee8f3b695e 99 #define SYSCFG_SRAM2WRP_PAGE5 SYSCFG_SWPR_PAGE5 /*!< SRAM2 Write protection page 5 */
EricLew 0:80ee8f3b695e 100 #define SYSCFG_SRAM2WRP_PAGE6 SYSCFG_SWPR_PAGE6 /*!< SRAM2 Write protection page 6 */
EricLew 0:80ee8f3b695e 101 #define SYSCFG_SRAM2WRP_PAGE7 SYSCFG_SWPR_PAGE7 /*!< SRAM2 Write protection page 7 */
EricLew 0:80ee8f3b695e 102 #define SYSCFG_SRAM2WRP_PAGE8 SYSCFG_SWPR_PAGE8 /*!< SRAM2 Write protection page 8 */
EricLew 0:80ee8f3b695e 103 #define SYSCFG_SRAM2WRP_PAGE9 SYSCFG_SWPR_PAGE9 /*!< SRAM2 Write protection page 9 */
EricLew 0:80ee8f3b695e 104 #define SYSCFG_SRAM2WRP_PAGE10 SYSCFG_SWPR_PAGE10 /*!< SRAM2 Write protection page 10 */
EricLew 0:80ee8f3b695e 105 #define SYSCFG_SRAM2WRP_PAGE11 SYSCFG_SWPR_PAGE11 /*!< SRAM2 Write protection page 11 */
EricLew 0:80ee8f3b695e 106 #define SYSCFG_SRAM2WRP_PAGE12 SYSCFG_SWPR_PAGE12 /*!< SRAM2 Write protection page 12 */
EricLew 0:80ee8f3b695e 107 #define SYSCFG_SRAM2WRP_PAGE13 SYSCFG_SWPR_PAGE13 /*!< SRAM2 Write protection page 13 */
EricLew 0:80ee8f3b695e 108 #define SYSCFG_SRAM2WRP_PAGE14 SYSCFG_SWPR_PAGE14 /*!< SRAM2 Write protection page 14 */
EricLew 0:80ee8f3b695e 109 #define SYSCFG_SRAM2WRP_PAGE15 SYSCFG_SWPR_PAGE15 /*!< SRAM2 Write protection page 15 */
EricLew 0:80ee8f3b695e 110 #define SYSCFG_SRAM2WRP_PAGE16 SYSCFG_SWPR_PAGE16 /*!< SRAM2 Write protection page 16 */
EricLew 0:80ee8f3b695e 111 #define SYSCFG_SRAM2WRP_PAGE17 SYSCFG_SWPR_PAGE17 /*!< SRAM2 Write protection page 17 */
EricLew 0:80ee8f3b695e 112 #define SYSCFG_SRAM2WRP_PAGE18 SYSCFG_SWPR_PAGE18 /*!< SRAM2 Write protection page 18 */
EricLew 0:80ee8f3b695e 113 #define SYSCFG_SRAM2WRP_PAGE19 SYSCFG_SWPR_PAGE19 /*!< SRAM2 Write protection page 19 */
EricLew 0:80ee8f3b695e 114 #define SYSCFG_SRAM2WRP_PAGE20 SYSCFG_SWPR_PAGE20 /*!< SRAM2 Write protection page 20 */
EricLew 0:80ee8f3b695e 115 #define SYSCFG_SRAM2WRP_PAGE21 SYSCFG_SWPR_PAGE21 /*!< SRAM2 Write protection page 21 */
EricLew 0:80ee8f3b695e 116 #define SYSCFG_SRAM2WRP_PAGE22 SYSCFG_SWPR_PAGE22 /*!< SRAM2 Write protection page 22 */
EricLew 0:80ee8f3b695e 117 #define SYSCFG_SRAM2WRP_PAGE23 SYSCFG_SWPR_PAGE23 /*!< SRAM2 Write protection page 23 */
EricLew 0:80ee8f3b695e 118 #define SYSCFG_SRAM2WRP_PAGE24 SYSCFG_SWPR_PAGE24 /*!< SRAM2 Write protection page 24 */
EricLew 0:80ee8f3b695e 119 #define SYSCFG_SRAM2WRP_PAGE25 SYSCFG_SWPR_PAGE25 /*!< SRAM2 Write protection page 25 */
EricLew 0:80ee8f3b695e 120 #define SYSCFG_SRAM2WRP_PAGE26 SYSCFG_SWPR_PAGE26 /*!< SRAM2 Write protection page 26 */
EricLew 0:80ee8f3b695e 121 #define SYSCFG_SRAM2WRP_PAGE27 SYSCFG_SWPR_PAGE27 /*!< SRAM2 Write protection page 27 */
EricLew 0:80ee8f3b695e 122 #define SYSCFG_SRAM2WRP_PAGE28 SYSCFG_SWPR_PAGE28 /*!< SRAM2 Write protection page 28 */
EricLew 0:80ee8f3b695e 123 #define SYSCFG_SRAM2WRP_PAGE29 SYSCFG_SWPR_PAGE29 /*!< SRAM2 Write protection page 29 */
EricLew 0:80ee8f3b695e 124 #define SYSCFG_SRAM2WRP_PAGE30 SYSCFG_SWPR_PAGE30 /*!< SRAM2 Write protection page 30 */
EricLew 0:80ee8f3b695e 125 #define SYSCFG_SRAM2WRP_PAGE31 SYSCFG_SWPR_PAGE31 /*!< SRAM2 Write protection page 31 */
EricLew 0:80ee8f3b695e 126
EricLew 0:80ee8f3b695e 127 /**
EricLew 0:80ee8f3b695e 128 * @}
EricLew 0:80ee8f3b695e 129 */
EricLew 0:80ee8f3b695e 130
EricLew 0:80ee8f3b695e 131 /** @defgroup SYSCFG_VREFBUF_VoltageScale VREFBUF Voltage Scale
EricLew 0:80ee8f3b695e 132 * @{
EricLew 0:80ee8f3b695e 133 */
EricLew 0:80ee8f3b695e 134 #define SYSCFG_VREFBUF_VOLTAGE_SCALE0 ((uint32_t)0x00000000) /*!< Voltage reference scale 0 (VREF_OUT1) */
EricLew 0:80ee8f3b695e 135 #define SYSCFG_VREFBUF_VOLTAGE_SCALE1 VREFBUF_CSR_VRS /*!< Voltage reference scale 1 (VREF_OUT2) */
EricLew 0:80ee8f3b695e 136
EricLew 0:80ee8f3b695e 137 /**
EricLew 0:80ee8f3b695e 138 * @}
EricLew 0:80ee8f3b695e 139 */
EricLew 0:80ee8f3b695e 140
EricLew 0:80ee8f3b695e 141 /** @defgroup SYSCFG_VREFBUF_HighImpedance VREFBUF High Impedance
EricLew 0:80ee8f3b695e 142 * @{
EricLew 0:80ee8f3b695e 143 */
EricLew 0:80ee8f3b695e 144 #define SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE ((uint32_t)0x00000000) /*!< VREF_plus pin is internally connected to Voltage reference buffer output */
EricLew 0:80ee8f3b695e 145 #define SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE VREFBUF_CSR_HIZ /*!< VREF_plus pin is high impedance */
EricLew 0:80ee8f3b695e 146
EricLew 0:80ee8f3b695e 147 /**
EricLew 0:80ee8f3b695e 148 * @}
EricLew 0:80ee8f3b695e 149 */
EricLew 0:80ee8f3b695e 150
EricLew 0:80ee8f3b695e 151 /** @defgroup SYSCFG_flags_definition Flags
EricLew 0:80ee8f3b695e 152 * @{
EricLew 0:80ee8f3b695e 153 */
EricLew 0:80ee8f3b695e 154
EricLew 0:80ee8f3b695e 155 #define SYSCFG_FLAG_SRAM2_PE SYSCFG_CFGR2_SPF /*!< SRAM2 parity error */
EricLew 0:80ee8f3b695e 156 #define SYSCFG_FLAG_SRAM2_BUSY SYSCFG_SCSR_SRAM2BSY /*!< SRAM2 busy by erase operation */
EricLew 0:80ee8f3b695e 157
EricLew 0:80ee8f3b695e 158 /**
EricLew 0:80ee8f3b695e 159 * @}
EricLew 0:80ee8f3b695e 160 */
EricLew 0:80ee8f3b695e 161
EricLew 0:80ee8f3b695e 162 /** @defgroup SYSCFG_FastModePlus_GPIO Fast-mode Plus on GPIO
EricLew 0:80ee8f3b695e 163 * @{
EricLew 0:80ee8f3b695e 164 */
EricLew 0:80ee8f3b695e 165
EricLew 0:80ee8f3b695e 166 /** @brief Fast-mode Plus driving capability on a specific GPIO
EricLew 0:80ee8f3b695e 167 */
EricLew 0:80ee8f3b695e 168 #define SYSCFG_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast-mode Plus on PB6 */
EricLew 0:80ee8f3b695e 169 #define SYSCFG_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast-mode Plus on PB7 */
EricLew 0:80ee8f3b695e 170 #define SYSCFG_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast-mode Plus on PB8 */
EricLew 0:80ee8f3b695e 171 #define SYSCFG_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast-mode Plus on PB9 */
EricLew 0:80ee8f3b695e 172
EricLew 0:80ee8f3b695e 173 /**
EricLew 0:80ee8f3b695e 174 * @}
EricLew 0:80ee8f3b695e 175 */
EricLew 0:80ee8f3b695e 176
EricLew 0:80ee8f3b695e 177 /**
EricLew 0:80ee8f3b695e 178 * @}
EricLew 0:80ee8f3b695e 179 */
EricLew 0:80ee8f3b695e 180
EricLew 0:80ee8f3b695e 181 /* Exported macros -----------------------------------------------------------*/
EricLew 0:80ee8f3b695e 182
EricLew 0:80ee8f3b695e 183 /** @defgroup DBGMCU_Exported_Macros DBGMCU Exported Macros
EricLew 0:80ee8f3b695e 184 * @{
EricLew 0:80ee8f3b695e 185 */
EricLew 0:80ee8f3b695e 186
EricLew 0:80ee8f3b695e 187 /** @brief Freeze/Unfreeze Peripherals in Debug mode
EricLew 0:80ee8f3b695e 188 */
EricLew 0:80ee8f3b695e 189 #if defined(DBGMCU_APB1FZR1_DBG_TIM2_STOP)
EricLew 0:80ee8f3b695e 190 #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM2_STOP)
EricLew 0:80ee8f3b695e 191 #define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM2_STOP)
EricLew 0:80ee8f3b695e 192 #endif
EricLew 0:80ee8f3b695e 193
EricLew 0:80ee8f3b695e 194 #if defined(DBGMCU_APB1FZR1_DBG_TIM3_STOP)
EricLew 0:80ee8f3b695e 195 #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM3_STOP)
EricLew 0:80ee8f3b695e 196 #define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM3_STOP)
EricLew 0:80ee8f3b695e 197 #endif
EricLew 0:80ee8f3b695e 198
EricLew 0:80ee8f3b695e 199 #if defined(DBGMCU_APB1FZR1_DBG_TIM4_STOP)
EricLew 0:80ee8f3b695e 200 #define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM4_STOP)
EricLew 0:80ee8f3b695e 201 #define __HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM4_STOP)
EricLew 0:80ee8f3b695e 202 #endif
EricLew 0:80ee8f3b695e 203
EricLew 0:80ee8f3b695e 204 #if defined(DBGMCU_APB1FZR1_DBG_TIM5_STOP)
EricLew 0:80ee8f3b695e 205 #define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM5_STOP)
EricLew 0:80ee8f3b695e 206 #define __HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM5_STOP)
EricLew 0:80ee8f3b695e 207 #endif
EricLew 0:80ee8f3b695e 208
EricLew 0:80ee8f3b695e 209 #if defined(DBGMCU_APB1FZR1_DBG_TIM6_STOP)
EricLew 0:80ee8f3b695e 210 #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM6_STOP)
EricLew 0:80ee8f3b695e 211 #define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM6_STOP)
EricLew 0:80ee8f3b695e 212 #endif
EricLew 0:80ee8f3b695e 213
EricLew 0:80ee8f3b695e 214 #if defined(DBGMCU_APB1FZR1_DBG_TIM7_STOP)
EricLew 0:80ee8f3b695e 215 #define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM7_STOP)
EricLew 0:80ee8f3b695e 216 #define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM7_STOP)
EricLew 0:80ee8f3b695e 217 #endif
EricLew 0:80ee8f3b695e 218
EricLew 0:80ee8f3b695e 219 #if defined(DBGMCU_APB1FZR1_DBG_RTC_STOP)
EricLew 0:80ee8f3b695e 220 #define __HAL_DBGMCU_FREEZE_RTC() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_RTC_STOP)
EricLew 0:80ee8f3b695e 221 #define __HAL_DBGMCU_UNFREEZE_RTC() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_RTC_STOP)
EricLew 0:80ee8f3b695e 222 #endif
EricLew 0:80ee8f3b695e 223
EricLew 0:80ee8f3b695e 224 #if defined(DBGMCU_APB1FZR1_DBG_WWDG_STOP)
EricLew 0:80ee8f3b695e 225 #define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_WWDG_STOP)
EricLew 0:80ee8f3b695e 226 #define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_WWDG_STOP)
EricLew 0:80ee8f3b695e 227 #endif
EricLew 0:80ee8f3b695e 228
EricLew 0:80ee8f3b695e 229 #if defined(DBGMCU_APB1FZR1_DBG_IWDG_STOP)
EricLew 0:80ee8f3b695e 230 #define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_IWDG_STOP)
EricLew 0:80ee8f3b695e 231 #define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_IWDG_STOP)
EricLew 0:80ee8f3b695e 232 #endif
EricLew 0:80ee8f3b695e 233
EricLew 0:80ee8f3b695e 234 #if defined(DBGMCU_APB1FZR1_DBG_I2C1_STOP)
EricLew 0:80ee8f3b695e 235 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C1_STOP)
EricLew 0:80ee8f3b695e 236 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C1_STOP)
EricLew 0:80ee8f3b695e 237 #endif
EricLew 0:80ee8f3b695e 238
EricLew 0:80ee8f3b695e 239 #if defined(DBGMCU_APB1FZR1_DBG_I2C2_STOP)
EricLew 0:80ee8f3b695e 240 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C2_STOP)
EricLew 0:80ee8f3b695e 241 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C2_STOP)
EricLew 0:80ee8f3b695e 242 #endif
EricLew 0:80ee8f3b695e 243
EricLew 0:80ee8f3b695e 244 #if defined(DBGMCU_APB1FZR1_DBG_I2C3_STOP)
EricLew 0:80ee8f3b695e 245 #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C3_STOP)
EricLew 0:80ee8f3b695e 246 #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C3_STOP)
EricLew 0:80ee8f3b695e 247 #endif
EricLew 0:80ee8f3b695e 248
EricLew 0:80ee8f3b695e 249 #if defined(DBGMCU_APB1FZR1_DBG_CAN_STOP)
EricLew 0:80ee8f3b695e 250 #define __HAL_DBGMCU_FREEZE_CAN1() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_CAN_STOP)
EricLew 0:80ee8f3b695e 251 #define __HAL_DBGMCU_UNFREEZE_CAN1() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_CAN_STOP)
EricLew 0:80ee8f3b695e 252 #endif
EricLew 0:80ee8f3b695e 253
EricLew 0:80ee8f3b695e 254 #if defined(DBGMCU_APB1FZR1_DBG_LPTIM1_STOP)
EricLew 0:80ee8f3b695e 255 #define __HAL_DBGMCU_FREEZE_LPTIM1() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_LPTIM1_STOP)
EricLew 0:80ee8f3b695e 256 #define __HAL_DBGMCU_UNFREEZE_LPTIM1() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_LPTIM1_STOP)
EricLew 0:80ee8f3b695e 257 #endif
EricLew 0:80ee8f3b695e 258
EricLew 0:80ee8f3b695e 259 #if defined(DBGMCU_APB1FZR2_DBG_LPTIM2_STOP)
EricLew 0:80ee8f3b695e 260 #define __HAL_DBGMCU_FREEZE_LPTIM2() SET_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_LPTIM2_STOP)
EricLew 0:80ee8f3b695e 261 #define __HAL_DBGMCU_UNFREEZE_LPTIM2() CLEAR_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_LPTIM2_STOP)
EricLew 0:80ee8f3b695e 262 #endif
EricLew 0:80ee8f3b695e 263
EricLew 0:80ee8f3b695e 264 #if defined(DBGMCU_APB2FZ_DBG_TIM1_STOP)
EricLew 0:80ee8f3b695e 265 #define __HAL_DBGMCU_FREEZE_TIM1() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM1_STOP)
EricLew 0:80ee8f3b695e 266 #define __HAL_DBGMCU_UNFREEZE_TIM1() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM1_STOP)
EricLew 0:80ee8f3b695e 267 #endif
EricLew 0:80ee8f3b695e 268
EricLew 0:80ee8f3b695e 269 #if defined(DBGMCU_APB2FZ_DBG_TIM8_STOP)
EricLew 0:80ee8f3b695e 270 #define __HAL_DBGMCU_FREEZE_TIM8() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM8_STOP)
EricLew 0:80ee8f3b695e 271 #define __HAL_DBGMCU_UNFREEZE_TIM8() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM8_STOP)
EricLew 0:80ee8f3b695e 272 #endif
EricLew 0:80ee8f3b695e 273
EricLew 0:80ee8f3b695e 274 #if defined(DBGMCU_APB2FZ_DBG_TIM15_STOP)
EricLew 0:80ee8f3b695e 275 #define __HAL_DBGMCU_FREEZE_TIM15() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM15_STOP)
EricLew 0:80ee8f3b695e 276 #define __HAL_DBGMCU_UNFREEZE_TIM15() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM15_STOP)
EricLew 0:80ee8f3b695e 277 #endif
EricLew 0:80ee8f3b695e 278
EricLew 0:80ee8f3b695e 279 #if defined(DBGMCU_APB2FZ_DBG_TIM16_STOP)
EricLew 0:80ee8f3b695e 280 #define __HAL_DBGMCU_FREEZE_TIM16() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM16_STOP)
EricLew 0:80ee8f3b695e 281 #define __HAL_DBGMCU_UNFREEZE_TIM16() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM16_STOP)
EricLew 0:80ee8f3b695e 282 #endif
EricLew 0:80ee8f3b695e 283
EricLew 0:80ee8f3b695e 284 #if defined(DBGMCU_APB2FZ_DBG_TIM17_STOP)
EricLew 0:80ee8f3b695e 285 #define __HAL_DBGMCU_FREEZE_TIM17() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM17_STOP)
EricLew 0:80ee8f3b695e 286 #define __HAL_DBGMCU_UNFREEZE_TIM17() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM17_STOP)
EricLew 0:80ee8f3b695e 287 #endif
EricLew 0:80ee8f3b695e 288
EricLew 0:80ee8f3b695e 289 /**
EricLew 0:80ee8f3b695e 290 * @}
EricLew 0:80ee8f3b695e 291 */
EricLew 0:80ee8f3b695e 292
EricLew 0:80ee8f3b695e 293 /** @defgroup SYSCFG_Exported_Macros SYSCFG Exported Macros
EricLew 0:80ee8f3b695e 294 * @{
EricLew 0:80ee8f3b695e 295 */
EricLew 0:80ee8f3b695e 296
EricLew 0:80ee8f3b695e 297 /** @brief Main Flash memory mapped at 0x00000000.
EricLew 0:80ee8f3b695e 298 */
EricLew 0:80ee8f3b695e 299 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE)
EricLew 0:80ee8f3b695e 300
EricLew 0:80ee8f3b695e 301 /** @brief System Flash memory mapped at 0x00000000.
EricLew 0:80ee8f3b695e 302 */
EricLew 0:80ee8f3b695e 303 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_0)
EricLew 0:80ee8f3b695e 304
EricLew 0:80ee8f3b695e 305 /** @brief Embedded SRAM mapped at 0x00000000.
EricLew 0:80ee8f3b695e 306 */
EricLew 0:80ee8f3b695e 307 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_1|SYSCFG_MEMRMP_MEM_MODE_0))
EricLew 0:80ee8f3b695e 308
EricLew 0:80ee8f3b695e 309 /** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000.
EricLew 0:80ee8f3b695e 310 */
EricLew 0:80ee8f3b695e 311 #define __HAL_SYSCFG_REMAPMEMORY_FMC() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_1)
EricLew 0:80ee8f3b695e 312
EricLew 0:80ee8f3b695e 313 /** @brief QUADSPI mapped at 0x00000000.
EricLew 0:80ee8f3b695e 314 */
EricLew 0:80ee8f3b695e 315 #define __HAL_SYSCFG_REMAPMEMORY_QUADSPI() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_2|SYSCFG_MEMRMP_MEM_MODE_1))
EricLew 0:80ee8f3b695e 316
EricLew 0:80ee8f3b695e 317 /**
EricLew 0:80ee8f3b695e 318 * @brief Return the boot mode as configured by user.
EricLew 0:80ee8f3b695e 319 * @retval The boot mode as configured by user. The returned value can be one
EricLew 0:80ee8f3b695e 320 * of the following values:
EricLew 0:80ee8f3b695e 321 * @arg SYSCFG_BOOT_MAINFLASH
EricLew 0:80ee8f3b695e 322 * @arg SYSCFG_BOOT_SYSTEMFLASH
EricLew 0:80ee8f3b695e 323 * @arg SYSCFG_BOOT_FMC
EricLew 0:80ee8f3b695e 324 * @arg SYSCFG_BOOT_SRAM
EricLew 0:80ee8f3b695e 325 * @arg SYSCFG_BOOT_QUADSPI
EricLew 0:80ee8f3b695e 326 */
EricLew 0:80ee8f3b695e 327 #define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE)
EricLew 0:80ee8f3b695e 328
EricLew 0:80ee8f3b695e 329 /** @brief SRAM2 page write protection enable macro
EricLew 0:80ee8f3b695e 330 * @param __SRAM2WRP__: This parameter can be a value of @ref SYSCFG_SRAM2WRP
EricLew 0:80ee8f3b695e 331 * @note write protection can only be disabled by a system reset
EricLew 0:80ee8f3b695e 332 */
EricLew 0:80ee8f3b695e 333 #define __HAL_SYSCFG_SRAM2_WRP_ENABLE(__SRAM2WRP__) do {assert_param(IS_SYSCFG_SRAM2WRP_PAGE((__SRAM2WRP__)));\
EricLew 0:80ee8f3b695e 334 SET_BIT(SYSCFG->SWPR, (__SRAM2WRP__));\
EricLew 0:80ee8f3b695e 335 }while(0)
EricLew 0:80ee8f3b695e 336
EricLew 0:80ee8f3b695e 337 /** @brief SRAM2 page write protection unlock prior to erase
EricLew 0:80ee8f3b695e 338 * @note Writing a wrong key reactivates the write protection
EricLew 0:80ee8f3b695e 339 */
EricLew 0:80ee8f3b695e 340 #define __HAL_SYSCFG_SRAM2_WRP_UNLOCK() do {SYSCFG->SKR = 0xCA;\
EricLew 0:80ee8f3b695e 341 SYSCFG->SKR = 0x53;\
EricLew 0:80ee8f3b695e 342 }while(0)
EricLew 0:80ee8f3b695e 343
EricLew 0:80ee8f3b695e 344 /** @brief SRAM2 erase
EricLew 0:80ee8f3b695e 345 * @note __SYSCFG_GET_FLAG(SYSCFG_FLAG_SRAM2_BUSY) may be used to check end of erase
EricLew 0:80ee8f3b695e 346 */
EricLew 0:80ee8f3b695e 347 #define __HAL_SYSCFG_SRAM2_ERASE() SET_BIT(SYSCFG->SCSR, SYSCFG_SCSR_SRAM2ER)
EricLew 0:80ee8f3b695e 348
EricLew 0:80ee8f3b695e 349 /** @brief Floating Point Unit interrupt enable/disable macros
EricLew 0:80ee8f3b695e 350 * @param __INTERRUPT__: This parameter can be a value of @ref SYSCFG_FPU_Interrupts
EricLew 0:80ee8f3b695e 351 */
EricLew 0:80ee8f3b695e 352 #define __HAL_SYSCFG_FPU_INTERRUPT_ENABLE(__INTERRUPT__) do {assert_param(IS_SYSCFG_FPU_INTERRUPT((__INTERRUPT__)));\
EricLew 0:80ee8f3b695e 353 SET_BIT(SYSCFG->CFGR1, (__INTERRUPT__));\
EricLew 0:80ee8f3b695e 354 }while(0)
EricLew 0:80ee8f3b695e 355
EricLew 0:80ee8f3b695e 356 #define __HAL_SYSCFG_FPU_INTERRUPT_DISABLE(__INTERRUPT__) do {assert_param(IS_SYSCFG_FPU_INTERRUPT((__INTERRUPT__)));\
EricLew 0:80ee8f3b695e 357 CLEAR_BIT(SYSCFG->CFGR1, (__INTERRUPT__));\
EricLew 0:80ee8f3b695e 358 }while(0)
EricLew 0:80ee8f3b695e 359
EricLew 0:80ee8f3b695e 360 /** @brief SYSCFG Break ECC lock.
EricLew 0:80ee8f3b695e 361 * Enable and lock the connection of Flash ECC error connection to TIM1/8/15/16/17 Break input.
EricLew 0:80ee8f3b695e 362 * @note The selected configuration is locked and can be unlocked only by system reset.
EricLew 0:80ee8f3b695e 363 */
EricLew 0:80ee8f3b695e 364 #define __HAL_SYSCFG_BREAK_ECC_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_ECCL)
EricLew 0:80ee8f3b695e 365
EricLew 0:80ee8f3b695e 366 /** @brief SYSCFG Break Cortex-M4 Lockup lock.
EricLew 0:80ee8f3b695e 367 * Enable and lock the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8/15/16/17 Break input.
EricLew 0:80ee8f3b695e 368 * @note The selected configuration is locked and can be unlocked only by system reset.
EricLew 0:80ee8f3b695e 369 */
EricLew 0:80ee8f3b695e 370 #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_CLL)
EricLew 0:80ee8f3b695e 371
EricLew 0:80ee8f3b695e 372 /** @brief SYSCFG Break PVD lock.
EricLew 0:80ee8f3b695e 373 * Enable and lock the PVD connection to Timer1/8/15/16/17 Break input, as well as the PVDE and PLS[2:0] in the PWR_CR2 register.
EricLew 0:80ee8f3b695e 374 * @note The selected configuration is locked and can be unlocked only by system reset.
EricLew 0:80ee8f3b695e 375 */
EricLew 0:80ee8f3b695e 376 #define __HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_PVDL)
EricLew 0:80ee8f3b695e 377
EricLew 0:80ee8f3b695e 378 /** @brief SYSCFG Break SRAM2 parity lock.
EricLew 0:80ee8f3b695e 379 * Enable and lock the SRAM2 parity error signal connection to TIM1/8/15/16/17 Break input.
EricLew 0:80ee8f3b695e 380 * @note The selected configuration is locked and can be unlocked by system reset.
EricLew 0:80ee8f3b695e 381 */
EricLew 0:80ee8f3b695e 382 #define __HAL_SYSCFG_BREAK_SRAM2PARITY_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPL)
EricLew 0:80ee8f3b695e 383
EricLew 0:80ee8f3b695e 384 /** @brief Check SYSCFG flag is set or not.
EricLew 0:80ee8f3b695e 385 * @param __FLAG__: specifies the flag to check.
EricLew 0:80ee8f3b695e 386 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 387 * @arg SYSCFG_FLAG_SRAM2_PE: SRAM2 Parity Error Flag
EricLew 0:80ee8f3b695e 388 * @arg SYSCFG_FLAG_SRAM2_BUSY: SRAM2 Erase Ongoing
EricLew 0:80ee8f3b695e 389 * @retval The new state of __FLAG__ (TRUE or FALSE).
EricLew 0:80ee8f3b695e 390 */
EricLew 0:80ee8f3b695e 391 #define __HAL_SYSCFG_GET_FLAG(__FLAG__) ((((((__FLAG__) == SYSCFG_SCSR_SRAM2BSY)? SYSCFG->SCSR : SYSCFG->CFGR2) & (__FLAG__))!= 0) ? 1 : 0)
EricLew 0:80ee8f3b695e 392
EricLew 0:80ee8f3b695e 393 /** @brief Set the SPF bit to clear the SRAM Parity Error Flag.
EricLew 0:80ee8f3b695e 394 */
EricLew 0:80ee8f3b695e 395 #define __HAL_SYSCFG_CLEAR_FLAG() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPF)
EricLew 0:80ee8f3b695e 396
EricLew 0:80ee8f3b695e 397 /** @brief Fast-mode Plus driving capability enable/disable macros
EricLew 0:80ee8f3b695e 398 * @param __FASTMODEPLUS__: This parameter can be a value of :
EricLew 0:80ee8f3b695e 399 * @arg SYSCFG_FASTMODEPLUS_PB6: Fast-mode Plus driving capability activation on PB6
EricLew 0:80ee8f3b695e 400 * @arg SYSCFG_FASTMODEPLUS_PB7: Fast-mode Plus driving capability activation on PB7
EricLew 0:80ee8f3b695e 401 * @arg SYSCFG_FASTMODEPLUS_PB8: Fast-mode Plus driving capability activation on PB8
EricLew 0:80ee8f3b695e 402 * @arg SYSCFG_FASTMODEPLUS_PB9: Fast-mode Plus driving capability activation on PB9
EricLew 0:80ee8f3b695e 403 */
EricLew 0:80ee8f3b695e 404 #define __HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
EricLew 0:80ee8f3b695e 405 SET_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
EricLew 0:80ee8f3b695e 406 }while(0)
EricLew 0:80ee8f3b695e 407
EricLew 0:80ee8f3b695e 408 #define __HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
EricLew 0:80ee8f3b695e 409 CLEAR_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
EricLew 0:80ee8f3b695e 410 }while(0)
EricLew 0:80ee8f3b695e 411
EricLew 0:80ee8f3b695e 412 /**
EricLew 0:80ee8f3b695e 413 * @}
EricLew 0:80ee8f3b695e 414 */
EricLew 0:80ee8f3b695e 415
EricLew 0:80ee8f3b695e 416 /* Private macros ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 417 /** @defgroup SYSCFG_Private_Macros SYSCFG Private Macros
EricLew 0:80ee8f3b695e 418 * @{
EricLew 0:80ee8f3b695e 419 */
EricLew 0:80ee8f3b695e 420
EricLew 0:80ee8f3b695e 421 #define IS_SYSCFG_FPU_INTERRUPT(__INTERRUPT__) ((((__INTERRUPT__) & SYSCFG_IT_FPU_IOC) == SYSCFG_IT_FPU_IOC) || \
EricLew 0:80ee8f3b695e 422 (((__INTERRUPT__) & SYSCFG_IT_FPU_DZC) == SYSCFG_IT_FPU_DZC) || \
EricLew 0:80ee8f3b695e 423 (((__INTERRUPT__) & SYSCFG_IT_FPU_UFC) == SYSCFG_IT_FPU_UFC) || \
EricLew 0:80ee8f3b695e 424 (((__INTERRUPT__) & SYSCFG_IT_FPU_OFC) == SYSCFG_IT_FPU_OFC) || \
EricLew 0:80ee8f3b695e 425 (((__INTERRUPT__) & SYSCFG_IT_FPU_IDC) == SYSCFG_IT_FPU_IDC) || \
EricLew 0:80ee8f3b695e 426 (((__INTERRUPT__) & SYSCFG_IT_FPU_IXC) == SYSCFG_IT_FPU_IXC))
EricLew 0:80ee8f3b695e 427
EricLew 0:80ee8f3b695e 428 #define IS_SYSCFG_BREAK_CONFIG(__CONFIG__) (((__CONFIG__) == SYSCFG_BREAK_ECC) || \
EricLew 0:80ee8f3b695e 429 ((__CONFIG__) == SYSCFG_BREAK_PVD) || \
EricLew 0:80ee8f3b695e 430 ((__CONFIG__) == SYSCFG_BREAK_SRAM2_PARITY) || \
EricLew 0:80ee8f3b695e 431 ((__CONFIG__) == SYSCFG_BREAK_LOCKUP))
EricLew 0:80ee8f3b695e 432
EricLew 0:80ee8f3b695e 433 #define IS_SYSCFG_SRAM2WRP_PAGE(__PAGE__) (((__PAGE__) > 0) && ((__PAGE__) <= 0xFFFFFFFF))
EricLew 0:80ee8f3b695e 434
EricLew 0:80ee8f3b695e 435 #define IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(__SCALE__) (((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE0) || \
EricLew 0:80ee8f3b695e 436 ((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE1))
EricLew 0:80ee8f3b695e 437
EricLew 0:80ee8f3b695e 438 #define IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(__VALUE__) (((__VALUE__) == SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE) || \
EricLew 0:80ee8f3b695e 439 ((__VALUE__) == SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE))
EricLew 0:80ee8f3b695e 440
EricLew 0:80ee8f3b695e 441 #define IS_SYSCFG_VREFBUF_TRIMMING(__VALUE__) (((__VALUE__) > 0) && ((__VALUE__) <= VREFBUF_CCR_TRIM))
EricLew 0:80ee8f3b695e 442
EricLew 0:80ee8f3b695e 443
EricLew 0:80ee8f3b695e 444 #define IS_SYSCFG_FASTMODEPLUS(__PIN__) ((((__PIN__) & SYSCFG_FASTMODEPLUS_PB6) == SYSCFG_FASTMODEPLUS_PB6) || \
EricLew 0:80ee8f3b695e 445 (((__PIN__) & SYSCFG_FASTMODEPLUS_PB7) == SYSCFG_FASTMODEPLUS_PB7) || \
EricLew 0:80ee8f3b695e 446 (((__PIN__) & SYSCFG_FASTMODEPLUS_PB8) == SYSCFG_FASTMODEPLUS_PB8) || \
EricLew 0:80ee8f3b695e 447 (((__PIN__) & SYSCFG_FASTMODEPLUS_PB9) == SYSCFG_FASTMODEPLUS_PB9))
EricLew 0:80ee8f3b695e 448
EricLew 0:80ee8f3b695e 449 /**
EricLew 0:80ee8f3b695e 450 * @}
EricLew 0:80ee8f3b695e 451 */
EricLew 0:80ee8f3b695e 452
EricLew 0:80ee8f3b695e 453 /* Exported functions --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 454
EricLew 0:80ee8f3b695e 455 /** @addtogroup HAL_Exported_Functions
EricLew 0:80ee8f3b695e 456 * @{
EricLew 0:80ee8f3b695e 457 */
EricLew 0:80ee8f3b695e 458
EricLew 0:80ee8f3b695e 459 /** @addtogroup HAL_Exported_Functions_Group1
EricLew 0:80ee8f3b695e 460 * @{
EricLew 0:80ee8f3b695e 461 */
EricLew 0:80ee8f3b695e 462
EricLew 0:80ee8f3b695e 463 /* Initialization and de-initialization functions ******************************/
EricLew 0:80ee8f3b695e 464 HAL_StatusTypeDef HAL_Init(void);
EricLew 0:80ee8f3b695e 465 HAL_StatusTypeDef HAL_DeInit(void);
EricLew 0:80ee8f3b695e 466 void HAL_MspInit(void);
EricLew 0:80ee8f3b695e 467 void HAL_MspDeInit(void);
EricLew 0:80ee8f3b695e 468 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
EricLew 0:80ee8f3b695e 469
EricLew 0:80ee8f3b695e 470 /**
EricLew 0:80ee8f3b695e 471 * @}
EricLew 0:80ee8f3b695e 472 */
EricLew 0:80ee8f3b695e 473
EricLew 0:80ee8f3b695e 474 /** @addtogroup HAL_Exported_Functions_Group2
EricLew 0:80ee8f3b695e 475 * @{
EricLew 0:80ee8f3b695e 476 */
EricLew 0:80ee8f3b695e 477
EricLew 0:80ee8f3b695e 478 /* Peripheral Control functions ************************************************/
EricLew 0:80ee8f3b695e 479 void HAL_IncTick(void);
EricLew 0:80ee8f3b695e 480 void HAL_Delay(uint32_t Delay);
EricLew 0:80ee8f3b695e 481 uint32_t HAL_GetTick(void);
EricLew 0:80ee8f3b695e 482 void HAL_SuspendTick(void);
EricLew 0:80ee8f3b695e 483 void HAL_ResumeTick(void);
EricLew 0:80ee8f3b695e 484 uint32_t HAL_GetHalVersion(void);
EricLew 0:80ee8f3b695e 485 uint32_t HAL_GetREVID(void);
EricLew 0:80ee8f3b695e 486 uint32_t HAL_GetDEVID(void);
EricLew 0:80ee8f3b695e 487
EricLew 0:80ee8f3b695e 488 /**
EricLew 0:80ee8f3b695e 489 * @}
EricLew 0:80ee8f3b695e 490 */
EricLew 0:80ee8f3b695e 491
EricLew 0:80ee8f3b695e 492 /** @addtogroup HAL_Exported_Functions_Group3
EricLew 0:80ee8f3b695e 493 * @{
EricLew 0:80ee8f3b695e 494 */
EricLew 0:80ee8f3b695e 495
EricLew 0:80ee8f3b695e 496 /* DBGMCU Peripheral Control functions *****************************************/
EricLew 0:80ee8f3b695e 497 void HAL_DBGMCU_EnableDBGSleepMode(void);
EricLew 0:80ee8f3b695e 498 void HAL_DBGMCU_DisableDBGSleepMode(void);
EricLew 0:80ee8f3b695e 499 void HAL_DBGMCU_EnableDBGStopMode(void);
EricLew 0:80ee8f3b695e 500 void HAL_DBGMCU_DisableDBGStopMode(void);
EricLew 0:80ee8f3b695e 501 void HAL_DBGMCU_EnableDBGStandbyMode(void);
EricLew 0:80ee8f3b695e 502 void HAL_DBGMCU_DisableDBGStandbyMode(void);
EricLew 0:80ee8f3b695e 503
EricLew 0:80ee8f3b695e 504 /**
EricLew 0:80ee8f3b695e 505 * @}
EricLew 0:80ee8f3b695e 506 */
EricLew 0:80ee8f3b695e 507
EricLew 0:80ee8f3b695e 508 /** @addtogroup HAL_Exported_Functions_Group4
EricLew 0:80ee8f3b695e 509 * @{
EricLew 0:80ee8f3b695e 510 */
EricLew 0:80ee8f3b695e 511
EricLew 0:80ee8f3b695e 512 /* SYSCFG Control functions ****************************************************/
EricLew 0:80ee8f3b695e 513 void HAL_SYSCFG_SRAM2Erase(void);
EricLew 0:80ee8f3b695e 514 void HAL_SYSCFG_EnableMemorySwappingBank(void);
EricLew 0:80ee8f3b695e 515 void HAL_SYSCFG_DisableMemorySwappingBank(void);
EricLew 0:80ee8f3b695e 516
EricLew 0:80ee8f3b695e 517 void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling);
EricLew 0:80ee8f3b695e 518 void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode);
EricLew 0:80ee8f3b695e 519 void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue);
EricLew 0:80ee8f3b695e 520 HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void);
EricLew 0:80ee8f3b695e 521 void HAL_SYSCFG_DisableVREFBUF(void);
EricLew 0:80ee8f3b695e 522
EricLew 0:80ee8f3b695e 523 /**
EricLew 0:80ee8f3b695e 524 * @}
EricLew 0:80ee8f3b695e 525 */
EricLew 0:80ee8f3b695e 526
EricLew 0:80ee8f3b695e 527 /**
EricLew 0:80ee8f3b695e 528 * @}
EricLew 0:80ee8f3b695e 529 */
EricLew 0:80ee8f3b695e 530
EricLew 0:80ee8f3b695e 531 /**
EricLew 0:80ee8f3b695e 532 * @}
EricLew 0:80ee8f3b695e 533 */
EricLew 0:80ee8f3b695e 534
EricLew 0:80ee8f3b695e 535 /**
EricLew 0:80ee8f3b695e 536 * @}
EricLew 0:80ee8f3b695e 537 */
EricLew 0:80ee8f3b695e 538
EricLew 0:80ee8f3b695e 539 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 540 }
EricLew 0:80ee8f3b695e 541 #endif
EricLew 0:80ee8f3b695e 542
EricLew 0:80ee8f3b695e 543 #endif /* __STM32L4xx_HAL_H */
EricLew 0:80ee8f3b695e 544
EricLew 0:80ee8f3b695e 545 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
EricLew 0:80ee8f3b695e 546