BSP Drivers

Dependencies:   CMSIS_STM32L4xx CMSIS_DSP_401 STM32L4xx_HAL_Driver

Dependents:   DiscoAudioRecord

Committer:
EricLew
Date:
Sun Nov 22 21:15:34 2015 +0000
Revision:
4:a1219ef3537f
Parent:
0:ad9dfc0179dc
11/22/2015

Who changed what in which revision?

UserRevisionLine numberNew contents of line
EricLew 0:ad9dfc0179dc 1 /**
EricLew 0:ad9dfc0179dc 2 ******************************************************************************
EricLew 0:ad9dfc0179dc 3 * @file wm8994.c
EricLew 0:ad9dfc0179dc 4 * @author MCD Application Team
EricLew 0:ad9dfc0179dc 5 * @version V2.0.0
EricLew 0:ad9dfc0179dc 6 * @date 24-June-2015
EricLew 0:ad9dfc0179dc 7 * @brief This file provides the WM8994 Audio Codec driver.
EricLew 0:ad9dfc0179dc 8 ******************************************************************************
EricLew 0:ad9dfc0179dc 9 * @attention
EricLew 0:ad9dfc0179dc 10 *
EricLew 0:ad9dfc0179dc 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew 0:ad9dfc0179dc 12 *
EricLew 0:ad9dfc0179dc 13 * Redistribution and use in source and binary forms, with or without modification,
EricLew 0:ad9dfc0179dc 14 * are permitted provided that the following conditions are met:
EricLew 0:ad9dfc0179dc 15 * 1. Redistributions of source code must retain the above copyright notice,
EricLew 0:ad9dfc0179dc 16 * this list of conditions and the following disclaimer.
EricLew 0:ad9dfc0179dc 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew 0:ad9dfc0179dc 18 * this list of conditions and the following disclaimer in the documentation
EricLew 0:ad9dfc0179dc 19 * and/or other materials provided with the distribution.
EricLew 0:ad9dfc0179dc 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew 0:ad9dfc0179dc 21 * may be used to endorse or promote products derived from this software
EricLew 0:ad9dfc0179dc 22 * without specific prior written permission.
EricLew 0:ad9dfc0179dc 23 *
EricLew 0:ad9dfc0179dc 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew 0:ad9dfc0179dc 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew 0:ad9dfc0179dc 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew 0:ad9dfc0179dc 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew 0:ad9dfc0179dc 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew 0:ad9dfc0179dc 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew 0:ad9dfc0179dc 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew 0:ad9dfc0179dc 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew 0:ad9dfc0179dc 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew 0:ad9dfc0179dc 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew 0:ad9dfc0179dc 34 *
EricLew 0:ad9dfc0179dc 35 ******************************************************************************
EricLew 0:ad9dfc0179dc 36 */
EricLew 0:ad9dfc0179dc 37
EricLew 0:ad9dfc0179dc 38 /* Includes ------------------------------------------------------------------*/
EricLew 0:ad9dfc0179dc 39 #include "wm8994.h"
EricLew 0:ad9dfc0179dc 40
EricLew 0:ad9dfc0179dc 41 /** @addtogroup BSP
EricLew 0:ad9dfc0179dc 42 * @{
EricLew 0:ad9dfc0179dc 43 */
EricLew 0:ad9dfc0179dc 44
EricLew 0:ad9dfc0179dc 45 /** @addtogroup Components
EricLew 0:ad9dfc0179dc 46 * @{
EricLew 0:ad9dfc0179dc 47 */
EricLew 0:ad9dfc0179dc 48
EricLew 0:ad9dfc0179dc 49 /** @addtogroup wm8994
EricLew 0:ad9dfc0179dc 50 * @brief This file provides a set of functions needed to drive the
EricLew 0:ad9dfc0179dc 51 * WM8994 audio codec.
EricLew 0:ad9dfc0179dc 52 * @{
EricLew 0:ad9dfc0179dc 53 */
EricLew 0:ad9dfc0179dc 54
EricLew 0:ad9dfc0179dc 55 /** @defgroup WM8994_Private_Types
EricLew 0:ad9dfc0179dc 56 * @{
EricLew 0:ad9dfc0179dc 57 */
EricLew 0:ad9dfc0179dc 58
EricLew 0:ad9dfc0179dc 59 /**
EricLew 0:ad9dfc0179dc 60 * @}
EricLew 0:ad9dfc0179dc 61 */
EricLew 0:ad9dfc0179dc 62
EricLew 0:ad9dfc0179dc 63 /** @defgroup WM8994_Private_Defines
EricLew 0:ad9dfc0179dc 64 * @{
EricLew 0:ad9dfc0179dc 65 */
EricLew 0:ad9dfc0179dc 66 /* Uncomment this line to enable verifying data sent to codec after each write
EricLew 0:ad9dfc0179dc 67 operation (for debug purpose) */
EricLew 0:ad9dfc0179dc 68 #if !defined (VERIFY_WRITTENDATA)
EricLew 0:ad9dfc0179dc 69 /* #define VERIFY_WRITTENDATA */
EricLew 0:ad9dfc0179dc 70 #endif /* VERIFY_WRITTENDATA */
EricLew 0:ad9dfc0179dc 71 /**
EricLew 0:ad9dfc0179dc 72 * @}
EricLew 0:ad9dfc0179dc 73 */
EricLew 0:ad9dfc0179dc 74
EricLew 0:ad9dfc0179dc 75 /** @defgroup WM8994_Private_Macros
EricLew 0:ad9dfc0179dc 76 * @{
EricLew 0:ad9dfc0179dc 77 */
EricLew 0:ad9dfc0179dc 78
EricLew 0:ad9dfc0179dc 79 /**
EricLew 0:ad9dfc0179dc 80 * @}
EricLew 0:ad9dfc0179dc 81 */
EricLew 0:ad9dfc0179dc 82
EricLew 0:ad9dfc0179dc 83 /** @defgroup WM8994_Private_Variables
EricLew 0:ad9dfc0179dc 84 * @{
EricLew 0:ad9dfc0179dc 85 */
EricLew 0:ad9dfc0179dc 86
EricLew 0:ad9dfc0179dc 87 /* Audio codec driver structure initialization */
EricLew 0:ad9dfc0179dc 88 AUDIO_DrvTypeDef wm8994_drv =
EricLew 0:ad9dfc0179dc 89 {
EricLew 0:ad9dfc0179dc 90 wm8994_Init,
EricLew 0:ad9dfc0179dc 91 wm8994_DeInit,
EricLew 0:ad9dfc0179dc 92 wm8994_ReadID,
EricLew 0:ad9dfc0179dc 93
EricLew 0:ad9dfc0179dc 94 wm8994_Play,
EricLew 0:ad9dfc0179dc 95 wm8994_Pause,
EricLew 0:ad9dfc0179dc 96 wm8994_Resume,
EricLew 0:ad9dfc0179dc 97 wm8994_Stop,
EricLew 0:ad9dfc0179dc 98
EricLew 0:ad9dfc0179dc 99 wm8994_SetFrequency,
EricLew 0:ad9dfc0179dc 100 wm8994_SetVolume,
EricLew 0:ad9dfc0179dc 101 wm8994_SetMute,
EricLew 0:ad9dfc0179dc 102 wm8994_SetOutputMode,
EricLew 0:ad9dfc0179dc 103
EricLew 0:ad9dfc0179dc 104 wm8994_Reset
EricLew 0:ad9dfc0179dc 105 };
EricLew 0:ad9dfc0179dc 106
EricLew 0:ad9dfc0179dc 107 static uint32_t outputEnabled = 0;
EricLew 0:ad9dfc0179dc 108 static uint32_t inputEnabled = 0;
EricLew 0:ad9dfc0179dc 109 /**
EricLew 0:ad9dfc0179dc 110 * @}
EricLew 0:ad9dfc0179dc 111 */
EricLew 0:ad9dfc0179dc 112
EricLew 0:ad9dfc0179dc 113 /** @defgroup WM8994_Function_Prototypes
EricLew 0:ad9dfc0179dc 114 * @{
EricLew 0:ad9dfc0179dc 115 */
EricLew 0:ad9dfc0179dc 116 static uint8_t CODEC_IO_Write(uint8_t Addr, uint16_t Reg, uint16_t Value);
EricLew 0:ad9dfc0179dc 117 /**
EricLew 0:ad9dfc0179dc 118 * @}
EricLew 0:ad9dfc0179dc 119 */
EricLew 0:ad9dfc0179dc 120
EricLew 0:ad9dfc0179dc 121 /** @defgroup WM8994_Private_Functions
EricLew 0:ad9dfc0179dc 122 * @{
EricLew 0:ad9dfc0179dc 123 */
EricLew 0:ad9dfc0179dc 124
EricLew 0:ad9dfc0179dc 125 /**
EricLew 0:ad9dfc0179dc 126 * @brief Initializes the audio codec and the control interface.
EricLew 0:ad9dfc0179dc 127 * @param DeviceAddr: Device address on communication Bus.
EricLew 0:ad9dfc0179dc 128 * @param OutputInputDevice: can be OUTPUT_DEVICE_SPEAKER, OUTPUT_DEVICE_HEADPHONE,
EricLew 0:ad9dfc0179dc 129 * OUTPUT_DEVICE_BOTH, OUTPUT_DEVICE_AUTO, INPUT_DEVICE_DIGITAL_MICROPHONE_1,
EricLew 0:ad9dfc0179dc 130 * INPUT_DEVICE_DIGITAL_MICROPHONE_2, INPUT_DEVICE_INPUT_LINE_1 or INPUT_DEVICE_INPUT_LINE_2.
EricLew 0:ad9dfc0179dc 131 * @param Volume: Initial volume level (from 0 (Mute) to 100 (Max))
EricLew 0:ad9dfc0179dc 132 * @param AudioFreq: Audio Frequency
EricLew 0:ad9dfc0179dc 133 * @retval 0 if correct communication, else wrong communication
EricLew 0:ad9dfc0179dc 134 */
EricLew 0:ad9dfc0179dc 135 uint32_t wm8994_Init(uint16_t DeviceAddr, uint16_t OutputInputDevice, uint8_t Volume, uint32_t AudioFreq)
EricLew 0:ad9dfc0179dc 136 {
EricLew 0:ad9dfc0179dc 137 uint32_t counter = 0;
EricLew 0:ad9dfc0179dc 138 uint16_t output_device = OutputInputDevice & 0xFF;
EricLew 0:ad9dfc0179dc 139 uint16_t input_device = OutputInputDevice & 0xFF00;
EricLew 0:ad9dfc0179dc 140 uint16_t power_mgnt_reg_1 = 0;
EricLew 0:ad9dfc0179dc 141
EricLew 0:ad9dfc0179dc 142 /* Initialize the Control interface of the Audio Codec */
EricLew 0:ad9dfc0179dc 143 AUDIO_IO_Init();
EricLew 0:ad9dfc0179dc 144 /* wm8994 Errata Work-Arounds */
EricLew 0:ad9dfc0179dc 145 counter += CODEC_IO_Write(DeviceAddr, 0x102, 0x0003);
EricLew 0:ad9dfc0179dc 146 counter += CODEC_IO_Write(DeviceAddr, 0x817, 0x0000);
EricLew 0:ad9dfc0179dc 147 counter += CODEC_IO_Write(DeviceAddr, 0x102, 0x0000);
EricLew 0:ad9dfc0179dc 148
EricLew 0:ad9dfc0179dc 149 /* Enable VMID soft start (fast), Start-up Bias Current Enabled */
EricLew 0:ad9dfc0179dc 150 counter += CODEC_IO_Write(DeviceAddr, 0x39, 0x006C);
EricLew 0:ad9dfc0179dc 151
EricLew 0:ad9dfc0179dc 152 /* Enable bias generator, Enable VMID */
EricLew 0:ad9dfc0179dc 153 counter += CODEC_IO_Write(DeviceAddr, 0x01, 0x0003);
EricLew 0:ad9dfc0179dc 154
EricLew 0:ad9dfc0179dc 155 /* Add Delay */
EricLew 0:ad9dfc0179dc 156 AUDIO_IO_Delay(50);
EricLew 0:ad9dfc0179dc 157
EricLew 0:ad9dfc0179dc 158 /* Path Configurations for output */
EricLew 0:ad9dfc0179dc 159 if (output_device > 0)
EricLew 0:ad9dfc0179dc 160 {
EricLew 0:ad9dfc0179dc 161 outputEnabled = 1;
EricLew 0:ad9dfc0179dc 162 switch (output_device)
EricLew 0:ad9dfc0179dc 163 {
EricLew 0:ad9dfc0179dc 164 case OUTPUT_DEVICE_SPEAKER:
EricLew 0:ad9dfc0179dc 165 /* Enable DAC1 (Left), Enable DAC1 (Right),
EricLew 0:ad9dfc0179dc 166 Disable DAC2 (Left), Disable DAC2 (Right)*/
EricLew 0:ad9dfc0179dc 167 counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0C0C);
EricLew 0:ad9dfc0179dc 168
EricLew 0:ad9dfc0179dc 169 /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
EricLew 0:ad9dfc0179dc 170 counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0000);
EricLew 0:ad9dfc0179dc 171
EricLew 0:ad9dfc0179dc 172 /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
EricLew 0:ad9dfc0179dc 173 counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0000);
EricLew 0:ad9dfc0179dc 174
EricLew 0:ad9dfc0179dc 175 /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
EricLew 0:ad9dfc0179dc 176 counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0002);
EricLew 0:ad9dfc0179dc 177
EricLew 0:ad9dfc0179dc 178 /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
EricLew 0:ad9dfc0179dc 179 counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0002);
EricLew 0:ad9dfc0179dc 180 break;
EricLew 0:ad9dfc0179dc 181
EricLew 0:ad9dfc0179dc 182 case OUTPUT_DEVICE_HEADPHONE:
EricLew 0:ad9dfc0179dc 183 /* Disable DAC1 (Left), Disable DAC1 (Right),
EricLew 0:ad9dfc0179dc 184 Enable DAC2 (Left), Enable DAC2 (Right)*/
EricLew 0:ad9dfc0179dc 185 counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303);
EricLew 0:ad9dfc0179dc 186
EricLew 0:ad9dfc0179dc 187 /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
EricLew 0:ad9dfc0179dc 188 counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001);
EricLew 0:ad9dfc0179dc 189
EricLew 0:ad9dfc0179dc 190 /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
EricLew 0:ad9dfc0179dc 191 counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001);
EricLew 0:ad9dfc0179dc 192
EricLew 0:ad9dfc0179dc 193 /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
EricLew 0:ad9dfc0179dc 194 counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0000);
EricLew 0:ad9dfc0179dc 195
EricLew 0:ad9dfc0179dc 196 /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
EricLew 0:ad9dfc0179dc 197 counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0000);
EricLew 0:ad9dfc0179dc 198 break;
EricLew 0:ad9dfc0179dc 199
EricLew 0:ad9dfc0179dc 200 case OUTPUT_DEVICE_BOTH:
EricLew 0:ad9dfc0179dc 201 /* Enable DAC1 (Left), Enable DAC1 (Right),
EricLew 0:ad9dfc0179dc 202 also Enable DAC2 (Left), Enable DAC2 (Right)*/
EricLew 0:ad9dfc0179dc 203 counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303 | 0x0C0C);
EricLew 0:ad9dfc0179dc 204
EricLew 0:ad9dfc0179dc 205 /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
EricLew 0:ad9dfc0179dc 206 counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001);
EricLew 0:ad9dfc0179dc 207
EricLew 0:ad9dfc0179dc 208 /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
EricLew 0:ad9dfc0179dc 209 counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001);
EricLew 0:ad9dfc0179dc 210
EricLew 0:ad9dfc0179dc 211 /* Enable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
EricLew 0:ad9dfc0179dc 212 counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0002);
EricLew 0:ad9dfc0179dc 213
EricLew 0:ad9dfc0179dc 214 /* Enable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
EricLew 0:ad9dfc0179dc 215 counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0002);
EricLew 0:ad9dfc0179dc 216 break;
EricLew 0:ad9dfc0179dc 217
EricLew 0:ad9dfc0179dc 218 case OUTPUT_DEVICE_AUTO :
EricLew 0:ad9dfc0179dc 219 default:
EricLew 0:ad9dfc0179dc 220 /* Disable DAC1 (Left), Disable DAC1 (Right),
EricLew 0:ad9dfc0179dc 221 Enable DAC2 (Left), Enable DAC2 (Right)*/
EricLew 0:ad9dfc0179dc 222 counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303);
EricLew 0:ad9dfc0179dc 223
EricLew 0:ad9dfc0179dc 224 /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
EricLew 0:ad9dfc0179dc 225 counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001);
EricLew 0:ad9dfc0179dc 226
EricLew 0:ad9dfc0179dc 227 /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
EricLew 0:ad9dfc0179dc 228 counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001);
EricLew 0:ad9dfc0179dc 229
EricLew 0:ad9dfc0179dc 230 /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
EricLew 0:ad9dfc0179dc 231 counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0000);
EricLew 0:ad9dfc0179dc 232
EricLew 0:ad9dfc0179dc 233 /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
EricLew 0:ad9dfc0179dc 234 counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0000);
EricLew 0:ad9dfc0179dc 235 break;
EricLew 0:ad9dfc0179dc 236 }
EricLew 0:ad9dfc0179dc 237 }
EricLew 0:ad9dfc0179dc 238 else
EricLew 0:ad9dfc0179dc 239 {
EricLew 0:ad9dfc0179dc 240 outputEnabled = 0;
EricLew 0:ad9dfc0179dc 241 }
EricLew 0:ad9dfc0179dc 242
EricLew 0:ad9dfc0179dc 243 /* Path Configurations for input */
EricLew 0:ad9dfc0179dc 244 if (input_device > 0)
EricLew 0:ad9dfc0179dc 245 {
EricLew 0:ad9dfc0179dc 246 inputEnabled = 1;
EricLew 0:ad9dfc0179dc 247 switch (input_device)
EricLew 0:ad9dfc0179dc 248 {
EricLew 0:ad9dfc0179dc 249 case INPUT_DEVICE_DIGITAL_MICROPHONE_2 :
EricLew 0:ad9dfc0179dc 250 /* Enable AIF1ADC2 (Left), Enable AIF1ADC2 (Right)
EricLew 0:ad9dfc0179dc 251 * Enable DMICDAT2 (Left), Enable DMICDAT2 (Right)
EricLew 0:ad9dfc0179dc 252 * Enable Left ADC, Enable Right ADC */
EricLew 0:ad9dfc0179dc 253 counter += CODEC_IO_Write(DeviceAddr, 0x04, 0x0C30);
EricLew 0:ad9dfc0179dc 254
EricLew 0:ad9dfc0179dc 255 /* Enable AIF1 DRC2 Signal Detect & DRC in AIF1ADC2 Left/Right Timeslot 1 */
EricLew 0:ad9dfc0179dc 256 counter += CODEC_IO_Write(DeviceAddr, 0x450, 0x00DB);
EricLew 0:ad9dfc0179dc 257
EricLew 0:ad9dfc0179dc 258 /* Disable IN1L, IN1R, IN2L, IN2R, Enable Thermal sensor & shutdown */
EricLew 0:ad9dfc0179dc 259 counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x6000);
EricLew 0:ad9dfc0179dc 260
EricLew 0:ad9dfc0179dc 261 /* Enable the DMIC2(Left) to AIF1 Timeslot 1 (Left) mixer path */
EricLew 0:ad9dfc0179dc 262 counter += CODEC_IO_Write(DeviceAddr, 0x608, 0x0002);
EricLew 0:ad9dfc0179dc 263
EricLew 0:ad9dfc0179dc 264 /* Enable the DMIC2(Right) to AIF1 Timeslot 1 (Right) mixer path */
EricLew 0:ad9dfc0179dc 265 counter += CODEC_IO_Write(DeviceAddr, 0x609, 0x0002);
EricLew 0:ad9dfc0179dc 266
EricLew 0:ad9dfc0179dc 267 /* GPIO1 pin configuration GP1_DIR = output, GP1_FN = AIF1 DRC2 signal detect */
EricLew 0:ad9dfc0179dc 268 counter += CODEC_IO_Write(DeviceAddr, 0x700, 0x000E);
EricLew 0:ad9dfc0179dc 269 break;
EricLew 0:ad9dfc0179dc 270
EricLew 0:ad9dfc0179dc 271 case INPUT_DEVICE_INPUT_LINE_1 :
EricLew 0:ad9dfc0179dc 272 /* Enable AIF1ADC1 (Left), Enable AIF1ADC1 (Right)
EricLew 0:ad9dfc0179dc 273 * Enable Left ADC, Enable Right ADC */
EricLew 0:ad9dfc0179dc 274 counter += CODEC_IO_Write(DeviceAddr, 0x04, 0x0303);
EricLew 0:ad9dfc0179dc 275
EricLew 0:ad9dfc0179dc 276 /* Enable AIF1 DRC1 Signal Detect & DRC in AIF1ADC1 Left/Right Timeslot 0 */
EricLew 0:ad9dfc0179dc 277 counter += CODEC_IO_Write(DeviceAddr, 0x440, 0x00DB);
EricLew 0:ad9dfc0179dc 278
EricLew 0:ad9dfc0179dc 279 /* Enable IN1L and IN1R, Disable IN2L and IN2R, Enable Thermal sensor & shutdown */
EricLew 0:ad9dfc0179dc 280 counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x6350);
EricLew 0:ad9dfc0179dc 281
EricLew 0:ad9dfc0179dc 282 /* Enable the ADCL(Left) to AIF1 Timeslot 0 (Left) mixer path */
EricLew 0:ad9dfc0179dc 283 counter += CODEC_IO_Write(DeviceAddr, 0x606, 0x0002);
EricLew 0:ad9dfc0179dc 284
EricLew 0:ad9dfc0179dc 285 /* Enable the ADCR(Right) to AIF1 Timeslot 0 (Right) mixer path */
EricLew 0:ad9dfc0179dc 286 counter += CODEC_IO_Write(DeviceAddr, 0x607, 0x0002);
EricLew 0:ad9dfc0179dc 287
EricLew 0:ad9dfc0179dc 288 /* GPIO1 pin configuration GP1_DIR = output, GP1_FN = AIF1 DRC1 signal detect */
EricLew 0:ad9dfc0179dc 289 counter += CODEC_IO_Write(DeviceAddr, 0x700, 0x000D);
EricLew 0:ad9dfc0179dc 290 break;
EricLew 0:ad9dfc0179dc 291
EricLew 0:ad9dfc0179dc 292 case INPUT_DEVICE_DIGITAL_MICROPHONE_1 :
EricLew 0:ad9dfc0179dc 293 case INPUT_DEVICE_INPUT_LINE_2 :
EricLew 0:ad9dfc0179dc 294 default:
EricLew 0:ad9dfc0179dc 295 /* Actually, no other input devices supported */
EricLew 0:ad9dfc0179dc 296 counter++;
EricLew 0:ad9dfc0179dc 297 break;
EricLew 0:ad9dfc0179dc 298 }
EricLew 0:ad9dfc0179dc 299 }
EricLew 0:ad9dfc0179dc 300 else
EricLew 0:ad9dfc0179dc 301 {
EricLew 0:ad9dfc0179dc 302 inputEnabled = 0;
EricLew 0:ad9dfc0179dc 303 }
EricLew 0:ad9dfc0179dc 304
EricLew 0:ad9dfc0179dc 305 /* Clock Configurations */
EricLew 0:ad9dfc0179dc 306 switch (AudioFreq)
EricLew 0:ad9dfc0179dc 307 {
EricLew 0:ad9dfc0179dc 308 case AUDIO_FREQUENCY_8K:
EricLew 0:ad9dfc0179dc 309 /* AIF1 Sample Rate = 8 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 310 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0003);
EricLew 0:ad9dfc0179dc 311 break;
EricLew 0:ad9dfc0179dc 312
EricLew 0:ad9dfc0179dc 313 case AUDIO_FREQUENCY_16K:
EricLew 0:ad9dfc0179dc 314 /* AIF1 Sample Rate = 16 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 315 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0033);
EricLew 0:ad9dfc0179dc 316 break;
EricLew 0:ad9dfc0179dc 317
EricLew 0:ad9dfc0179dc 318 case AUDIO_FREQUENCY_48K:
EricLew 0:ad9dfc0179dc 319 /* AIF1 Sample Rate = 48 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 320 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0083);
EricLew 0:ad9dfc0179dc 321 break;
EricLew 0:ad9dfc0179dc 322
EricLew 0:ad9dfc0179dc 323 case AUDIO_FREQUENCY_96K:
EricLew 0:ad9dfc0179dc 324 /* AIF1 Sample Rate = 96 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 325 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x00A3);
EricLew 0:ad9dfc0179dc 326 break;
EricLew 0:ad9dfc0179dc 327
EricLew 0:ad9dfc0179dc 328 case AUDIO_FREQUENCY_11K:
EricLew 0:ad9dfc0179dc 329 /* AIF1 Sample Rate = 11.025 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 330 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0013);
EricLew 0:ad9dfc0179dc 331 break;
EricLew 0:ad9dfc0179dc 332
EricLew 0:ad9dfc0179dc 333 case AUDIO_FREQUENCY_22K:
EricLew 0:ad9dfc0179dc 334 /* AIF1 Sample Rate = 22.050 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 335 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0043);
EricLew 0:ad9dfc0179dc 336 break;
EricLew 0:ad9dfc0179dc 337
EricLew 0:ad9dfc0179dc 338 case AUDIO_FREQUENCY_44K:
EricLew 0:ad9dfc0179dc 339 /* AIF1 Sample Rate = 44.1 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 340 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0073);
EricLew 0:ad9dfc0179dc 341 break;
EricLew 0:ad9dfc0179dc 342
EricLew 0:ad9dfc0179dc 343 default:
EricLew 0:ad9dfc0179dc 344 /* AIF1 Sample Rate = 48 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 345 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0083);
EricLew 0:ad9dfc0179dc 346 break;
EricLew 0:ad9dfc0179dc 347 }
EricLew 0:ad9dfc0179dc 348 /* AIF1 Word Length = 16-bits, AIF1 Format = I2S (Default Register Value) */
EricLew 0:ad9dfc0179dc 349 counter += CODEC_IO_Write(DeviceAddr, 0x300, 0x4010);
EricLew 0:ad9dfc0179dc 350
EricLew 0:ad9dfc0179dc 351 /* slave mode */
EricLew 0:ad9dfc0179dc 352 counter += CODEC_IO_Write(DeviceAddr, 0x302, 0x0000);
EricLew 0:ad9dfc0179dc 353
EricLew 0:ad9dfc0179dc 354 /* Enable the DSP processing clock for AIF1, Enable the core clock */
EricLew 0:ad9dfc0179dc 355 counter += CODEC_IO_Write(DeviceAddr, 0x208, 0x000A);
EricLew 0:ad9dfc0179dc 356
EricLew 0:ad9dfc0179dc 357 /* Enable AIF1 Clock, AIF1 Clock Source = MCLK1 pin */
EricLew 0:ad9dfc0179dc 358 counter += CODEC_IO_Write(DeviceAddr, 0x200, 0x0001);
EricLew 0:ad9dfc0179dc 359
EricLew 0:ad9dfc0179dc 360 if (output_device > 0) /* Audio output selected */
EricLew 0:ad9dfc0179dc 361 {
EricLew 0:ad9dfc0179dc 362 /* Analog Output Configuration */
EricLew 0:ad9dfc0179dc 363
EricLew 0:ad9dfc0179dc 364 /* Enable SPKRVOL PGA, Enable SPKMIXR, Enable SPKLVOL PGA, Enable SPKMIXL */
EricLew 0:ad9dfc0179dc 365 counter += CODEC_IO_Write(DeviceAddr, 0x03, 0x0300);
EricLew 0:ad9dfc0179dc 366
EricLew 0:ad9dfc0179dc 367 /* Left Speaker Mixer Volume = 0dB */
EricLew 0:ad9dfc0179dc 368 counter += CODEC_IO_Write(DeviceAddr, 0x22, 0x0000);
EricLew 0:ad9dfc0179dc 369
EricLew 0:ad9dfc0179dc 370 /* Speaker output mode = Class D, Right Speaker Mixer Volume = 0dB ((0x23, 0x0100) = class AB)*/
EricLew 0:ad9dfc0179dc 371 counter += CODEC_IO_Write(DeviceAddr, 0x23, 0x0000);
EricLew 0:ad9dfc0179dc 372
EricLew 0:ad9dfc0179dc 373 /* Unmute DAC2 (Left) to Left Speaker Mixer (SPKMIXL) path,
EricLew 0:ad9dfc0179dc 374 Unmute DAC2 (Right) to Right Speaker Mixer (SPKMIXR) path */
EricLew 0:ad9dfc0179dc 375 counter += CODEC_IO_Write(DeviceAddr, 0x36, 0x0300);
EricLew 0:ad9dfc0179dc 376
EricLew 0:ad9dfc0179dc 377 /* Enable bias generator, Enable VMID, Enable SPKOUTL, Enable SPKOUTR */
EricLew 0:ad9dfc0179dc 378 counter += CODEC_IO_Write(DeviceAddr, 0x01, 0x3003);
EricLew 0:ad9dfc0179dc 379
EricLew 0:ad9dfc0179dc 380 /* Headphone/Speaker Enable */
EricLew 0:ad9dfc0179dc 381
EricLew 0:ad9dfc0179dc 382 /* Enable Class W, Class W Envelope Tracking = AIF1 Timeslot 0 */
EricLew 0:ad9dfc0179dc 383 counter += CODEC_IO_Write(DeviceAddr, 0x51, 0x0005);
EricLew 0:ad9dfc0179dc 384
EricLew 0:ad9dfc0179dc 385 /* Enable bias generator, Enable VMID, Enable HPOUT1 (Left) and Enable HPOUT1 (Right) input stages */
EricLew 0:ad9dfc0179dc 386 /* idem for Speaker */
EricLew 0:ad9dfc0179dc 387 power_mgnt_reg_1 |= 0x0303 | 0x3003;
EricLew 0:ad9dfc0179dc 388 counter += CODEC_IO_Write(DeviceAddr, 0x01, power_mgnt_reg_1);
EricLew 0:ad9dfc0179dc 389
EricLew 0:ad9dfc0179dc 390 /* Enable HPOUT1 (Left) and HPOUT1 (Right) intermediate stages */
EricLew 0:ad9dfc0179dc 391 counter += CODEC_IO_Write(DeviceAddr, 0x60, 0x0022);
EricLew 0:ad9dfc0179dc 392
EricLew 0:ad9dfc0179dc 393 /* Enable Charge Pump */
EricLew 0:ad9dfc0179dc 394 counter += CODEC_IO_Write(DeviceAddr, 0x4C, 0x9F25);
EricLew 0:ad9dfc0179dc 395
EricLew 0:ad9dfc0179dc 396 /* Add Delay */
EricLew 0:ad9dfc0179dc 397 AUDIO_IO_Delay(15);
EricLew 0:ad9dfc0179dc 398
EricLew 0:ad9dfc0179dc 399 /* Select DAC1 (Left) to Left Headphone Output PGA (HPOUT1LVOL) path */
EricLew 0:ad9dfc0179dc 400 counter += CODEC_IO_Write(DeviceAddr, 0x2D, 0x0001);
EricLew 0:ad9dfc0179dc 401
EricLew 0:ad9dfc0179dc 402 /* Select DAC1 (Right) to Right Headphone Output PGA (HPOUT1RVOL) path */
EricLew 0:ad9dfc0179dc 403 counter += CODEC_IO_Write(DeviceAddr, 0x2E, 0x0001);
EricLew 0:ad9dfc0179dc 404
EricLew 0:ad9dfc0179dc 405 /* Enable Left Output Mixer (MIXOUTL), Enable Right Output Mixer (MIXOUTR) */
EricLew 0:ad9dfc0179dc 406 /* idem for SPKOUTL and SPKOUTR */
EricLew 0:ad9dfc0179dc 407 counter += CODEC_IO_Write(DeviceAddr, 0x03, 0x0030 | 0x0300);
EricLew 0:ad9dfc0179dc 408
EricLew 0:ad9dfc0179dc 409 /* Enable DC Servo and trigger start-up mode on left and right channels */
EricLew 0:ad9dfc0179dc 410 counter += CODEC_IO_Write(DeviceAddr, 0x54, 0x0033);
EricLew 0:ad9dfc0179dc 411
EricLew 0:ad9dfc0179dc 412 /* Add Delay */
EricLew 0:ad9dfc0179dc 413 AUDIO_IO_Delay(250);
EricLew 0:ad9dfc0179dc 414
EricLew 0:ad9dfc0179dc 415 /* Enable HPOUT1 (Left) and HPOUT1 (Right) intermediate and output stages. Remove clamps */
EricLew 0:ad9dfc0179dc 416 counter += CODEC_IO_Write(DeviceAddr, 0x60, 0x00EE);
EricLew 0:ad9dfc0179dc 417
EricLew 0:ad9dfc0179dc 418 /* Unmutes */
EricLew 0:ad9dfc0179dc 419
EricLew 0:ad9dfc0179dc 420 /* Unmute DAC 1 (Left) */
EricLew 0:ad9dfc0179dc 421 counter += CODEC_IO_Write(DeviceAddr, 0x610, 0x00C0);
EricLew 0:ad9dfc0179dc 422
EricLew 0:ad9dfc0179dc 423 /* Unmute DAC 1 (Right) */
EricLew 0:ad9dfc0179dc 424 counter += CODEC_IO_Write(DeviceAddr, 0x611, 0x00C0);
EricLew 0:ad9dfc0179dc 425
EricLew 0:ad9dfc0179dc 426 /* Unmute the AIF1 Timeslot 0 DAC path */
EricLew 0:ad9dfc0179dc 427 counter += CODEC_IO_Write(DeviceAddr, 0x420, 0x0000);
EricLew 0:ad9dfc0179dc 428
EricLew 0:ad9dfc0179dc 429 /* Unmute DAC 2 (Left) */
EricLew 0:ad9dfc0179dc 430 counter += CODEC_IO_Write(DeviceAddr, 0x612, 0x00C0);
EricLew 0:ad9dfc0179dc 431
EricLew 0:ad9dfc0179dc 432 /* Unmute DAC 2 (Right) */
EricLew 0:ad9dfc0179dc 433 counter += CODEC_IO_Write(DeviceAddr, 0x613, 0x00C0);
EricLew 0:ad9dfc0179dc 434
EricLew 0:ad9dfc0179dc 435 /* Unmute the AIF1 Timeslot 1 DAC2 path */
EricLew 0:ad9dfc0179dc 436 counter += CODEC_IO_Write(DeviceAddr, 0x422, 0x0000);
EricLew 0:ad9dfc0179dc 437
EricLew 0:ad9dfc0179dc 438 /* Volume Control */
EricLew 0:ad9dfc0179dc 439 wm8994_SetVolume(DeviceAddr, Volume);
EricLew 0:ad9dfc0179dc 440 }
EricLew 0:ad9dfc0179dc 441
EricLew 0:ad9dfc0179dc 442 if (input_device > 0) /* Audio input selected */
EricLew 0:ad9dfc0179dc 443 {
EricLew 0:ad9dfc0179dc 444 if ((input_device == INPUT_DEVICE_DIGITAL_MICROPHONE_1) || (input_device == INPUT_DEVICE_DIGITAL_MICROPHONE_2))
EricLew 0:ad9dfc0179dc 445 {
EricLew 0:ad9dfc0179dc 446 /* Enable Microphone bias 1 generator, Enable VMID */
EricLew 0:ad9dfc0179dc 447 power_mgnt_reg_1 |= 0x0013;
EricLew 0:ad9dfc0179dc 448 counter += CODEC_IO_Write(DeviceAddr, 0x01, power_mgnt_reg_1);
EricLew 0:ad9dfc0179dc 449
EricLew 0:ad9dfc0179dc 450 /* ADC oversample enable */
EricLew 0:ad9dfc0179dc 451 counter += CODEC_IO_Write(DeviceAddr, 0x620, 0x0002);
EricLew 0:ad9dfc0179dc 452
EricLew 0:ad9dfc0179dc 453 /* AIF ADC2 HPF enable, HPF cut = voice mode 1 fc=127Hz at fs=8kHz */
EricLew 0:ad9dfc0179dc 454 counter += CODEC_IO_Write(DeviceAddr, 0x411, 0x3800);
EricLew 0:ad9dfc0179dc 455 }
EricLew 0:ad9dfc0179dc 456 else if ((input_device == INPUT_DEVICE_INPUT_LINE_1) || (input_device == INPUT_DEVICE_INPUT_LINE_2))
EricLew 0:ad9dfc0179dc 457 {
EricLew 0:ad9dfc0179dc 458 /* Enable normal bias generator, Enable VMID */
EricLew 0:ad9dfc0179dc 459 power_mgnt_reg_1 |= 0x0003;
EricLew 0:ad9dfc0179dc 460 counter += CODEC_IO_Write(DeviceAddr, 0x01, power_mgnt_reg_1);
EricLew 0:ad9dfc0179dc 461
EricLew 0:ad9dfc0179dc 462 /* Disable mute on IN1L, IN1L Volume = +0dB */
EricLew 0:ad9dfc0179dc 463 counter += CODEC_IO_Write(DeviceAddr, 0x18, 0x000B);
EricLew 0:ad9dfc0179dc 464
EricLew 0:ad9dfc0179dc 465 /* Disable mute on IN1R, IN1R Volume = +0dB */
EricLew 0:ad9dfc0179dc 466 counter += CODEC_IO_Write(DeviceAddr, 0x1A, 0x000B);
EricLew 0:ad9dfc0179dc 467
EricLew 0:ad9dfc0179dc 468 /* Disable mute on IN1L_TO_MIXINL, Gain = +0dB */
EricLew 0:ad9dfc0179dc 469 counter += CODEC_IO_Write(DeviceAddr, 0x29, 0x0025);
EricLew 0:ad9dfc0179dc 470
EricLew 0:ad9dfc0179dc 471 /* Disable mute on IN1R_TO_MIXINL, Gain = +0dB */
EricLew 0:ad9dfc0179dc 472 counter += CODEC_IO_Write(DeviceAddr, 0x2A, 0x0025);
EricLew 0:ad9dfc0179dc 473
EricLew 0:ad9dfc0179dc 474 /* IN1LN_TO_IN1L, IN1LP_TO_VMID, IN1RN_TO_IN1R, IN1RP_TO_VMID */
EricLew 0:ad9dfc0179dc 475 counter += CODEC_IO_Write(DeviceAddr, 0x28, 0x0011);
EricLew 0:ad9dfc0179dc 476
EricLew 0:ad9dfc0179dc 477 /* AIF ADC1 HPF enable, HPF cut = hifi mode fc=4Hz at fs=48kHz */
EricLew 0:ad9dfc0179dc 478 counter += CODEC_IO_Write(DeviceAddr, 0x410, 0x1800);
EricLew 0:ad9dfc0179dc 479 }
EricLew 0:ad9dfc0179dc 480 /* Volume Control */
EricLew 0:ad9dfc0179dc 481 wm8994_SetVolume(DeviceAddr, Volume);
EricLew 0:ad9dfc0179dc 482 }
EricLew 0:ad9dfc0179dc 483 /* Return communication control value */
EricLew 0:ad9dfc0179dc 484 return counter;
EricLew 0:ad9dfc0179dc 485 }
EricLew 0:ad9dfc0179dc 486
EricLew 0:ad9dfc0179dc 487 /**
EricLew 0:ad9dfc0179dc 488 * @brief Deinitializes the audio codec.
EricLew 0:ad9dfc0179dc 489 * @param None
EricLew 0:ad9dfc0179dc 490 * @retval None
EricLew 0:ad9dfc0179dc 491 */
EricLew 0:ad9dfc0179dc 492 void wm8994_DeInit(void)
EricLew 0:ad9dfc0179dc 493 {
EricLew 0:ad9dfc0179dc 494 /* Deinitialize Audio Codec interface */
EricLew 0:ad9dfc0179dc 495 AUDIO_IO_DeInit();
EricLew 0:ad9dfc0179dc 496 }
EricLew 0:ad9dfc0179dc 497
EricLew 0:ad9dfc0179dc 498 /**
EricLew 0:ad9dfc0179dc 499 * @brief Get the WM8994 ID.
EricLew 0:ad9dfc0179dc 500 * @param DeviceAddr: Device address on communication Bus.
EricLew 0:ad9dfc0179dc 501 * @retval The WM8994 ID
EricLew 0:ad9dfc0179dc 502 */
EricLew 0:ad9dfc0179dc 503 uint32_t wm8994_ReadID(uint16_t DeviceAddr)
EricLew 0:ad9dfc0179dc 504 {
EricLew 0:ad9dfc0179dc 505 /* Initialize the Control interface of the Audio Codec */
EricLew 0:ad9dfc0179dc 506 AUDIO_IO_Init();
EricLew 0:ad9dfc0179dc 507
EricLew 0:ad9dfc0179dc 508 return ((uint32_t)AUDIO_IO_Read(DeviceAddr, WM8994_CHIPID_ADDR));
EricLew 0:ad9dfc0179dc 509 }
EricLew 0:ad9dfc0179dc 510
EricLew 0:ad9dfc0179dc 511 /**
EricLew 0:ad9dfc0179dc 512 * @brief Start the audio Codec play feature.
EricLew 0:ad9dfc0179dc 513 * @note For this codec no Play options are required.
EricLew 0:ad9dfc0179dc 514 * @param DeviceAddr: Device address on communication Bus.
EricLew 0:ad9dfc0179dc 515 * @retval 0 if correct communication, else wrong communication
EricLew 0:ad9dfc0179dc 516 */
EricLew 0:ad9dfc0179dc 517 uint32_t wm8994_Play(uint16_t DeviceAddr, uint16_t* pBuffer, uint16_t Size)
EricLew 0:ad9dfc0179dc 518 {
EricLew 0:ad9dfc0179dc 519 uint32_t counter = 0;
EricLew 0:ad9dfc0179dc 520
EricLew 0:ad9dfc0179dc 521 /* Resumes the audio file playing */
EricLew 0:ad9dfc0179dc 522 /* Unmute the output first */
EricLew 0:ad9dfc0179dc 523 counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
EricLew 0:ad9dfc0179dc 524
EricLew 0:ad9dfc0179dc 525 return counter;
EricLew 0:ad9dfc0179dc 526 }
EricLew 0:ad9dfc0179dc 527
EricLew 0:ad9dfc0179dc 528 /**
EricLew 0:ad9dfc0179dc 529 * @brief Pauses playing on the audio codec.
EricLew 0:ad9dfc0179dc 530 * @param DeviceAddr: Device address on communication Bus.
EricLew 0:ad9dfc0179dc 531 * @retval 0 if correct communication, else wrong communication
EricLew 0:ad9dfc0179dc 532 */
EricLew 0:ad9dfc0179dc 533 uint32_t wm8994_Pause(uint16_t DeviceAddr)
EricLew 0:ad9dfc0179dc 534 {
EricLew 0:ad9dfc0179dc 535 uint32_t counter = 0;
EricLew 0:ad9dfc0179dc 536
EricLew 0:ad9dfc0179dc 537 /* Pause the audio file playing */
EricLew 0:ad9dfc0179dc 538 /* Mute the output first */
EricLew 0:ad9dfc0179dc 539 counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_ON);
EricLew 0:ad9dfc0179dc 540
EricLew 0:ad9dfc0179dc 541 /* Put the Codec in Power save mode */
EricLew 0:ad9dfc0179dc 542 counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x01);
EricLew 0:ad9dfc0179dc 543
EricLew 0:ad9dfc0179dc 544 return counter;
EricLew 0:ad9dfc0179dc 545 }
EricLew 0:ad9dfc0179dc 546
EricLew 0:ad9dfc0179dc 547 /**
EricLew 0:ad9dfc0179dc 548 * @brief Resumes playing on the audio codec.
EricLew 0:ad9dfc0179dc 549 * @param DeviceAddr: Device address on communication Bus.
EricLew 0:ad9dfc0179dc 550 * @retval 0 if correct communication, else wrong communication
EricLew 0:ad9dfc0179dc 551 */
EricLew 0:ad9dfc0179dc 552 uint32_t wm8994_Resume(uint16_t DeviceAddr)
EricLew 0:ad9dfc0179dc 553 {
EricLew 0:ad9dfc0179dc 554 uint32_t counter = 0;
EricLew 0:ad9dfc0179dc 555
EricLew 0:ad9dfc0179dc 556 /* Resumes the audio file playing */
EricLew 0:ad9dfc0179dc 557 /* Unmute the output first */
EricLew 0:ad9dfc0179dc 558 counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
EricLew 0:ad9dfc0179dc 559
EricLew 0:ad9dfc0179dc 560 return counter;
EricLew 0:ad9dfc0179dc 561 }
EricLew 0:ad9dfc0179dc 562
EricLew 0:ad9dfc0179dc 563 /**
EricLew 0:ad9dfc0179dc 564 * @brief Stops audio Codec playing. It powers down the codec.
EricLew 0:ad9dfc0179dc 565 * @param DeviceAddr: Device address on communication Bus.
EricLew 0:ad9dfc0179dc 566 * @param CodecPdwnMode: selects the power down mode.
EricLew 0:ad9dfc0179dc 567 * - CODEC_PDWN_SW: only mutes the audio codec. When resuming from this
EricLew 0:ad9dfc0179dc 568 * mode the codec keeps the previous initialization
EricLew 0:ad9dfc0179dc 569 * (no need to re-Initialize the codec registers).
EricLew 0:ad9dfc0179dc 570 * - CODEC_PDWN_HW: Physically power down the codec. When resuming from this
EricLew 0:ad9dfc0179dc 571 * mode, the codec is set to default configuration
EricLew 0:ad9dfc0179dc 572 * (user should re-Initialize the codec in order to
EricLew 0:ad9dfc0179dc 573 * play again the audio stream).
EricLew 0:ad9dfc0179dc 574 * @retval 0 if correct communication, else wrong communication
EricLew 0:ad9dfc0179dc 575 */
EricLew 0:ad9dfc0179dc 576 uint32_t wm8994_Stop(uint16_t DeviceAddr, uint32_t CodecPdwnMode)
EricLew 0:ad9dfc0179dc 577 {
EricLew 0:ad9dfc0179dc 578 uint32_t counter = 0;
EricLew 0:ad9dfc0179dc 579
EricLew 0:ad9dfc0179dc 580 if (outputEnabled != 0)
EricLew 0:ad9dfc0179dc 581 {
EricLew 0:ad9dfc0179dc 582 /* Mute the output first */
EricLew 0:ad9dfc0179dc 583 counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_ON);
EricLew 0:ad9dfc0179dc 584
EricLew 0:ad9dfc0179dc 585 if (CodecPdwnMode == CODEC_PDWN_SW)
EricLew 0:ad9dfc0179dc 586 {
EricLew 0:ad9dfc0179dc 587 /* Only output mute required*/
EricLew 0:ad9dfc0179dc 588 }
EricLew 0:ad9dfc0179dc 589 else /* CODEC_PDWN_HW */
EricLew 0:ad9dfc0179dc 590 {
EricLew 0:ad9dfc0179dc 591 /* Mute the AIF1 Timeslot 0 DAC1 path */
EricLew 0:ad9dfc0179dc 592 counter += CODEC_IO_Write(DeviceAddr, 0x420, 0x0200);
EricLew 0:ad9dfc0179dc 593
EricLew 0:ad9dfc0179dc 594 /* Mute the AIF1 Timeslot 1 DAC2 path */
EricLew 0:ad9dfc0179dc 595 counter += CODEC_IO_Write(DeviceAddr, 0x422, 0x0200);
EricLew 0:ad9dfc0179dc 596
EricLew 0:ad9dfc0179dc 597 /* Disable DAC1L_TO_HPOUT1L */
EricLew 0:ad9dfc0179dc 598 counter += CODEC_IO_Write(DeviceAddr, 0x2D, 0x0000);
EricLew 0:ad9dfc0179dc 599
EricLew 0:ad9dfc0179dc 600 /* Disable DAC1R_TO_HPOUT1R */
EricLew 0:ad9dfc0179dc 601 counter += CODEC_IO_Write(DeviceAddr, 0x2E, 0x0000);
EricLew 0:ad9dfc0179dc 602
EricLew 0:ad9dfc0179dc 603 /* Disable DAC1 and DAC2 */
EricLew 0:ad9dfc0179dc 604 counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0000);
EricLew 0:ad9dfc0179dc 605
EricLew 0:ad9dfc0179dc 606 /* Reset Codec by writing in 0x0000 address register */
EricLew 0:ad9dfc0179dc 607 counter += CODEC_IO_Write(DeviceAddr, 0x0000, 0x0000);
EricLew 0:ad9dfc0179dc 608
EricLew 0:ad9dfc0179dc 609 outputEnabled = 0;
EricLew 0:ad9dfc0179dc 610 }
EricLew 0:ad9dfc0179dc 611 }
EricLew 0:ad9dfc0179dc 612 return counter;
EricLew 0:ad9dfc0179dc 613 }
EricLew 0:ad9dfc0179dc 614
EricLew 0:ad9dfc0179dc 615 /**
EricLew 0:ad9dfc0179dc 616 * @brief Sets higher or lower the codec volume level.
EricLew 0:ad9dfc0179dc 617 * @param DeviceAddr: Device address on communication Bus.
EricLew 0:ad9dfc0179dc 618 * @param Volume: a byte value from 0 to 255 (refer to codec registers
EricLew 0:ad9dfc0179dc 619 * description for more details).
EricLew 0:ad9dfc0179dc 620 * @retval 0 if correct communication, else wrong communication
EricLew 0:ad9dfc0179dc 621 */
EricLew 0:ad9dfc0179dc 622 uint32_t wm8994_SetVolume(uint16_t DeviceAddr, uint8_t Volume)
EricLew 0:ad9dfc0179dc 623 {
EricLew 0:ad9dfc0179dc 624 uint32_t counter = 0;
EricLew 0:ad9dfc0179dc 625 uint8_t convertedvol = VOLUME_CONVERT(Volume);
EricLew 0:ad9dfc0179dc 626
EricLew 0:ad9dfc0179dc 627 /* Output volume */
EricLew 0:ad9dfc0179dc 628 if (outputEnabled != 0)
EricLew 0:ad9dfc0179dc 629 {
EricLew 0:ad9dfc0179dc 630 if(convertedvol > 0x3E)
EricLew 0:ad9dfc0179dc 631 {
EricLew 0:ad9dfc0179dc 632 /* Unmute audio codec */
EricLew 0:ad9dfc0179dc 633 counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
EricLew 0:ad9dfc0179dc 634
EricLew 0:ad9dfc0179dc 635 /* Left Headphone Volume */
EricLew 0:ad9dfc0179dc 636 counter += CODEC_IO_Write(DeviceAddr, 0x1C, 0x3F | 0x140);
EricLew 0:ad9dfc0179dc 637
EricLew 0:ad9dfc0179dc 638 /* Right Headphone Volume */
EricLew 0:ad9dfc0179dc 639 counter += CODEC_IO_Write(DeviceAddr, 0x1D, 0x3F | 0x140);
EricLew 0:ad9dfc0179dc 640
EricLew 0:ad9dfc0179dc 641 /* Left Speaker Volume */
EricLew 0:ad9dfc0179dc 642 counter += CODEC_IO_Write(DeviceAddr, 0x26, 0x3F | 0x140);
EricLew 0:ad9dfc0179dc 643
EricLew 0:ad9dfc0179dc 644 /* Right Speaker Volume */
EricLew 0:ad9dfc0179dc 645 counter += CODEC_IO_Write(DeviceAddr, 0x27, 0x3F | 0x140);
EricLew 0:ad9dfc0179dc 646 }
EricLew 0:ad9dfc0179dc 647 else if (Volume == 0)
EricLew 0:ad9dfc0179dc 648 {
EricLew 0:ad9dfc0179dc 649 /* Mute audio codec */
EricLew 0:ad9dfc0179dc 650 counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_ON);
EricLew 0:ad9dfc0179dc 651 }
EricLew 0:ad9dfc0179dc 652 else
EricLew 0:ad9dfc0179dc 653 {
EricLew 0:ad9dfc0179dc 654 /* Unmute audio codec */
EricLew 0:ad9dfc0179dc 655 counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
EricLew 0:ad9dfc0179dc 656
EricLew 0:ad9dfc0179dc 657 /* Left Headphone Volume */
EricLew 0:ad9dfc0179dc 658 counter += CODEC_IO_Write(DeviceAddr, 0x1C, convertedvol | 0x140);
EricLew 0:ad9dfc0179dc 659
EricLew 0:ad9dfc0179dc 660 /* Right Headphone Volume */
EricLew 0:ad9dfc0179dc 661 counter += CODEC_IO_Write(DeviceAddr, 0x1D, convertedvol | 0x140);
EricLew 0:ad9dfc0179dc 662
EricLew 0:ad9dfc0179dc 663 /* Left Speaker Volume */
EricLew 0:ad9dfc0179dc 664 counter += CODEC_IO_Write(DeviceAddr, 0x26, convertedvol | 0x140);
EricLew 0:ad9dfc0179dc 665
EricLew 0:ad9dfc0179dc 666 /* Right Speaker Volume */
EricLew 0:ad9dfc0179dc 667 counter += CODEC_IO_Write(DeviceAddr, 0x27, convertedvol | 0x140);
EricLew 0:ad9dfc0179dc 668 }
EricLew 0:ad9dfc0179dc 669 }
EricLew 0:ad9dfc0179dc 670
EricLew 0:ad9dfc0179dc 671 /* Input volume */
EricLew 0:ad9dfc0179dc 672 if (inputEnabled != 0)
EricLew 0:ad9dfc0179dc 673 {
EricLew 0:ad9dfc0179dc 674 convertedvol = VOLUME_IN_CONVERT(Volume);
EricLew 0:ad9dfc0179dc 675
EricLew 0:ad9dfc0179dc 676 /* Left AIF1 ADC1 volume */
EricLew 0:ad9dfc0179dc 677 counter += CODEC_IO_Write(DeviceAddr, 0x400, convertedvol | 0x100);
EricLew 0:ad9dfc0179dc 678
EricLew 0:ad9dfc0179dc 679 /* Right AIF1 ADC1 volume */
EricLew 0:ad9dfc0179dc 680 counter += CODEC_IO_Write(DeviceAddr, 0x401, convertedvol | 0x100);
EricLew 0:ad9dfc0179dc 681
EricLew 0:ad9dfc0179dc 682 /* Left AIF1 ADC2 volume */
EricLew 0:ad9dfc0179dc 683 counter += CODEC_IO_Write(DeviceAddr, 0x404, convertedvol | 0x100);
EricLew 0:ad9dfc0179dc 684
EricLew 0:ad9dfc0179dc 685 /* Right AIF1 ADC2 volume */
EricLew 0:ad9dfc0179dc 686 counter += CODEC_IO_Write(DeviceAddr, 0x405, convertedvol | 0x100);
EricLew 0:ad9dfc0179dc 687 }
EricLew 0:ad9dfc0179dc 688 return counter;
EricLew 0:ad9dfc0179dc 689 }
EricLew 0:ad9dfc0179dc 690
EricLew 0:ad9dfc0179dc 691 /**
EricLew 0:ad9dfc0179dc 692 * @brief Enables or disables the mute feature on the audio codec.
EricLew 0:ad9dfc0179dc 693 * @param DeviceAddr: Device address on communication Bus.
EricLew 0:ad9dfc0179dc 694 * @param Cmd: AUDIO_MUTE_ON to enable the mute or AUDIO_MUTE_OFF to disable the
EricLew 0:ad9dfc0179dc 695 * mute mode.
EricLew 0:ad9dfc0179dc 696 * @retval 0 if correct communication, else wrong communication
EricLew 0:ad9dfc0179dc 697 */
EricLew 0:ad9dfc0179dc 698 uint32_t wm8994_SetMute(uint16_t DeviceAddr, uint32_t Cmd)
EricLew 0:ad9dfc0179dc 699 {
EricLew 0:ad9dfc0179dc 700 uint32_t counter = 0;
EricLew 0:ad9dfc0179dc 701
EricLew 0:ad9dfc0179dc 702 if (outputEnabled != 0)
EricLew 0:ad9dfc0179dc 703 {
EricLew 0:ad9dfc0179dc 704 /* Set the Mute mode */
EricLew 0:ad9dfc0179dc 705 if(Cmd == AUDIO_MUTE_ON)
EricLew 0:ad9dfc0179dc 706 {
EricLew 0:ad9dfc0179dc 707 /* Soft Mute the AIF1 Timeslot 0 DAC1 path L&R */
EricLew 0:ad9dfc0179dc 708 counter += CODEC_IO_Write(DeviceAddr, 0x420, 0x0200);
EricLew 0:ad9dfc0179dc 709
EricLew 0:ad9dfc0179dc 710 /* Soft Mute the AIF1 Timeslot 1 DAC2 path L&R */
EricLew 0:ad9dfc0179dc 711 counter += CODEC_IO_Write(DeviceAddr, 0x422, 0x0200);
EricLew 0:ad9dfc0179dc 712 }
EricLew 0:ad9dfc0179dc 713 else /* AUDIO_MUTE_OFF Disable the Mute */
EricLew 0:ad9dfc0179dc 714 {
EricLew 0:ad9dfc0179dc 715 /* Unmute the AIF1 Timeslot 0 DAC1 path L&R */
EricLew 0:ad9dfc0179dc 716 counter += CODEC_IO_Write(DeviceAddr, 0x420, 0x0000);
EricLew 0:ad9dfc0179dc 717
EricLew 0:ad9dfc0179dc 718 /* Unmute the AIF1 Timeslot 1 DAC2 path L&R */
EricLew 0:ad9dfc0179dc 719 counter += CODEC_IO_Write(DeviceAddr, 0x422, 0x0000);
EricLew 0:ad9dfc0179dc 720 }
EricLew 0:ad9dfc0179dc 721 }
EricLew 0:ad9dfc0179dc 722 return counter;
EricLew 0:ad9dfc0179dc 723 }
EricLew 0:ad9dfc0179dc 724
EricLew 0:ad9dfc0179dc 725 /**
EricLew 0:ad9dfc0179dc 726 * @brief Switch dynamically (while audio file is played) the output target
EricLew 0:ad9dfc0179dc 727 * (speaker or headphone).
EricLew 0:ad9dfc0179dc 728 * @param DeviceAddr: Device address on communication Bus.
EricLew 0:ad9dfc0179dc 729 * @param Output: specifies the audio output target: OUTPUT_DEVICE_SPEAKER,
EricLew 0:ad9dfc0179dc 730 * OUTPUT_DEVICE_HEADPHONE, OUTPUT_DEVICE_BOTH or OUTPUT_DEVICE_AUTO
EricLew 0:ad9dfc0179dc 731 * @retval 0 if correct communication, else wrong communication
EricLew 0:ad9dfc0179dc 732 */
EricLew 0:ad9dfc0179dc 733 uint32_t wm8994_SetOutputMode(uint16_t DeviceAddr, uint8_t Output)
EricLew 0:ad9dfc0179dc 734 {
EricLew 0:ad9dfc0179dc 735 uint32_t counter = 0;
EricLew 0:ad9dfc0179dc 736
EricLew 0:ad9dfc0179dc 737 switch (Output)
EricLew 0:ad9dfc0179dc 738 {
EricLew 0:ad9dfc0179dc 739 case OUTPUT_DEVICE_SPEAKER:
EricLew 0:ad9dfc0179dc 740 /* Enable DAC1 (Left), Enable DAC1 (Right),
EricLew 0:ad9dfc0179dc 741 Disable DAC2 (Left), Disable DAC2 (Right)*/
EricLew 0:ad9dfc0179dc 742 counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0C0C);
EricLew 0:ad9dfc0179dc 743
EricLew 0:ad9dfc0179dc 744 /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
EricLew 0:ad9dfc0179dc 745 counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0000);
EricLew 0:ad9dfc0179dc 746
EricLew 0:ad9dfc0179dc 747 /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
EricLew 0:ad9dfc0179dc 748 counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0000);
EricLew 0:ad9dfc0179dc 749
EricLew 0:ad9dfc0179dc 750 /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
EricLew 0:ad9dfc0179dc 751 counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0002);
EricLew 0:ad9dfc0179dc 752
EricLew 0:ad9dfc0179dc 753 /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
EricLew 0:ad9dfc0179dc 754 counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0002);
EricLew 0:ad9dfc0179dc 755 break;
EricLew 0:ad9dfc0179dc 756
EricLew 0:ad9dfc0179dc 757 case OUTPUT_DEVICE_HEADPHONE:
EricLew 0:ad9dfc0179dc 758 /* Disable DAC1 (Left), Disable DAC1 (Right),
EricLew 0:ad9dfc0179dc 759 Enable DAC2 (Left), Enable DAC2 (Right)*/
EricLew 0:ad9dfc0179dc 760 counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303);
EricLew 0:ad9dfc0179dc 761
EricLew 0:ad9dfc0179dc 762 /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
EricLew 0:ad9dfc0179dc 763 counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001);
EricLew 0:ad9dfc0179dc 764
EricLew 0:ad9dfc0179dc 765 /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
EricLew 0:ad9dfc0179dc 766 counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001);
EricLew 0:ad9dfc0179dc 767
EricLew 0:ad9dfc0179dc 768 /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
EricLew 0:ad9dfc0179dc 769 counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0000);
EricLew 0:ad9dfc0179dc 770
EricLew 0:ad9dfc0179dc 771 /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
EricLew 0:ad9dfc0179dc 772 counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0000);
EricLew 0:ad9dfc0179dc 773 break;
EricLew 0:ad9dfc0179dc 774
EricLew 0:ad9dfc0179dc 775 case OUTPUT_DEVICE_BOTH:
EricLew 0:ad9dfc0179dc 776 /* Enable DAC1 (Left), Enable DAC1 (Right),
EricLew 0:ad9dfc0179dc 777 also Enable DAC2 (Left), Enable DAC2 (Right)*/
EricLew 0:ad9dfc0179dc 778 counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303 | 0x0C0C);
EricLew 0:ad9dfc0179dc 779
EricLew 0:ad9dfc0179dc 780 /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
EricLew 0:ad9dfc0179dc 781 counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001);
EricLew 0:ad9dfc0179dc 782
EricLew 0:ad9dfc0179dc 783 /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
EricLew 0:ad9dfc0179dc 784 counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001);
EricLew 0:ad9dfc0179dc 785
EricLew 0:ad9dfc0179dc 786 /* Enable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
EricLew 0:ad9dfc0179dc 787 counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0002);
EricLew 0:ad9dfc0179dc 788
EricLew 0:ad9dfc0179dc 789 /* Enable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
EricLew 0:ad9dfc0179dc 790 counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0002);
EricLew 0:ad9dfc0179dc 791 break;
EricLew 0:ad9dfc0179dc 792
EricLew 0:ad9dfc0179dc 793 default:
EricLew 0:ad9dfc0179dc 794 /* Disable DAC1 (Left), Disable DAC1 (Right),
EricLew 0:ad9dfc0179dc 795 Enable DAC2 (Left), Enable DAC2 (Right)*/
EricLew 0:ad9dfc0179dc 796 counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303);
EricLew 0:ad9dfc0179dc 797
EricLew 0:ad9dfc0179dc 798 /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
EricLew 0:ad9dfc0179dc 799 counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001);
EricLew 0:ad9dfc0179dc 800
EricLew 0:ad9dfc0179dc 801 /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
EricLew 0:ad9dfc0179dc 802 counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001);
EricLew 0:ad9dfc0179dc 803
EricLew 0:ad9dfc0179dc 804 /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
EricLew 0:ad9dfc0179dc 805 counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0000);
EricLew 0:ad9dfc0179dc 806
EricLew 0:ad9dfc0179dc 807 /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
EricLew 0:ad9dfc0179dc 808 counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0000);
EricLew 0:ad9dfc0179dc 809 break;
EricLew 0:ad9dfc0179dc 810 }
EricLew 0:ad9dfc0179dc 811 return counter;
EricLew 0:ad9dfc0179dc 812 }
EricLew 0:ad9dfc0179dc 813
EricLew 0:ad9dfc0179dc 814 /**
EricLew 0:ad9dfc0179dc 815 * @brief Sets new frequency.
EricLew 0:ad9dfc0179dc 816 * @param DeviceAddr: Device address on communication Bus.
EricLew 0:ad9dfc0179dc 817 * @param AudioFreq: Audio frequency used to play the audio stream.
EricLew 0:ad9dfc0179dc 818 * @retval 0 if correct communication, else wrong communication
EricLew 0:ad9dfc0179dc 819 */
EricLew 0:ad9dfc0179dc 820 uint32_t wm8994_SetFrequency(uint16_t DeviceAddr, uint32_t AudioFreq)
EricLew 0:ad9dfc0179dc 821 {
EricLew 0:ad9dfc0179dc 822 uint32_t counter = 0;
EricLew 0:ad9dfc0179dc 823
EricLew 0:ad9dfc0179dc 824 /* Clock Configurations */
EricLew 0:ad9dfc0179dc 825 switch (AudioFreq)
EricLew 0:ad9dfc0179dc 826 {
EricLew 0:ad9dfc0179dc 827 case AUDIO_FREQUENCY_8K:
EricLew 0:ad9dfc0179dc 828 /* AIF1 Sample Rate = 8 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 829 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0003);
EricLew 0:ad9dfc0179dc 830 break;
EricLew 0:ad9dfc0179dc 831
EricLew 0:ad9dfc0179dc 832 case AUDIO_FREQUENCY_16K:
EricLew 0:ad9dfc0179dc 833 /* AIF1 Sample Rate = 16 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 834 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0033);
EricLew 0:ad9dfc0179dc 835 break;
EricLew 0:ad9dfc0179dc 836
EricLew 0:ad9dfc0179dc 837 case AUDIO_FREQUENCY_48K:
EricLew 0:ad9dfc0179dc 838 /* AIF1 Sample Rate = 48 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 839 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0083);
EricLew 0:ad9dfc0179dc 840 break;
EricLew 0:ad9dfc0179dc 841
EricLew 0:ad9dfc0179dc 842 case AUDIO_FREQUENCY_96K:
EricLew 0:ad9dfc0179dc 843 /* AIF1 Sample Rate = 96 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 844 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x00A3);
EricLew 0:ad9dfc0179dc 845 break;
EricLew 0:ad9dfc0179dc 846
EricLew 0:ad9dfc0179dc 847 case AUDIO_FREQUENCY_11K:
EricLew 0:ad9dfc0179dc 848 /* AIF1 Sample Rate = 11.025 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 849 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0013);
EricLew 0:ad9dfc0179dc 850 break;
EricLew 0:ad9dfc0179dc 851
EricLew 0:ad9dfc0179dc 852 case AUDIO_FREQUENCY_22K:
EricLew 0:ad9dfc0179dc 853 /* AIF1 Sample Rate = 22.050 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 854 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0043);
EricLew 0:ad9dfc0179dc 855 break;
EricLew 0:ad9dfc0179dc 856
EricLew 0:ad9dfc0179dc 857 case AUDIO_FREQUENCY_44K:
EricLew 0:ad9dfc0179dc 858 /* AIF1 Sample Rate = 44.1 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 859 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0073);
EricLew 0:ad9dfc0179dc 860 break;
EricLew 0:ad9dfc0179dc 861
EricLew 0:ad9dfc0179dc 862 default:
EricLew 0:ad9dfc0179dc 863 /* AIF1 Sample Rate = 48 (KHz), ratio=256 */
EricLew 0:ad9dfc0179dc 864 counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0083);
EricLew 0:ad9dfc0179dc 865 break;
EricLew 0:ad9dfc0179dc 866 }
EricLew 0:ad9dfc0179dc 867 return counter;
EricLew 0:ad9dfc0179dc 868 }
EricLew 0:ad9dfc0179dc 869
EricLew 0:ad9dfc0179dc 870 /**
EricLew 0:ad9dfc0179dc 871 * @brief Resets wm8994 registers.
EricLew 0:ad9dfc0179dc 872 * @param DeviceAddr: Device address on communication Bus.
EricLew 0:ad9dfc0179dc 873 * @retval 0 if correct communication, else wrong communication
EricLew 0:ad9dfc0179dc 874 */
EricLew 0:ad9dfc0179dc 875 uint32_t wm8994_Reset(uint16_t DeviceAddr)
EricLew 0:ad9dfc0179dc 876 {
EricLew 0:ad9dfc0179dc 877 uint32_t counter = 0;
EricLew 0:ad9dfc0179dc 878
EricLew 0:ad9dfc0179dc 879 /* Reset Codec by writing in 0x0000 address register */
EricLew 0:ad9dfc0179dc 880 counter = CODEC_IO_Write(DeviceAddr, 0x0000, 0x0000);
EricLew 0:ad9dfc0179dc 881 outputEnabled = 0;
EricLew 0:ad9dfc0179dc 882 inputEnabled=0;
EricLew 0:ad9dfc0179dc 883
EricLew 0:ad9dfc0179dc 884 return counter;
EricLew 0:ad9dfc0179dc 885 }
EricLew 0:ad9dfc0179dc 886
EricLew 0:ad9dfc0179dc 887 /**
EricLew 0:ad9dfc0179dc 888 * @brief Writes/Read a single data.
EricLew 0:ad9dfc0179dc 889 * @param Addr: I2C address
EricLew 0:ad9dfc0179dc 890 * @param Reg: Reg address
EricLew 0:ad9dfc0179dc 891 * @param Value: Data to be written
EricLew 0:ad9dfc0179dc 892 * @retval None
EricLew 0:ad9dfc0179dc 893 */
EricLew 0:ad9dfc0179dc 894 static uint8_t CODEC_IO_Write(uint8_t Addr, uint16_t Reg, uint16_t Value)
EricLew 0:ad9dfc0179dc 895 {
EricLew 0:ad9dfc0179dc 896 uint32_t result = 0;
EricLew 0:ad9dfc0179dc 897
EricLew 0:ad9dfc0179dc 898 AUDIO_IO_Write(Addr, Reg, Value);
EricLew 0:ad9dfc0179dc 899
EricLew 0:ad9dfc0179dc 900 #ifdef VERIFY_WRITTENDATA
EricLew 0:ad9dfc0179dc 901 /* Verify that the data has been correctly written */
EricLew 0:ad9dfc0179dc 902 result = (AUDIO_IO_Read(Addr, Reg) == Value)? 0:1;
EricLew 0:ad9dfc0179dc 903 #endif /* VERIFY_WRITTENDATA */
EricLew 0:ad9dfc0179dc 904
EricLew 0:ad9dfc0179dc 905 return result;
EricLew 0:ad9dfc0179dc 906 }
EricLew 0:ad9dfc0179dc 907
EricLew 0:ad9dfc0179dc 908 /**
EricLew 0:ad9dfc0179dc 909 * @}
EricLew 0:ad9dfc0179dc 910 */
EricLew 0:ad9dfc0179dc 911
EricLew 0:ad9dfc0179dc 912 /**
EricLew 0:ad9dfc0179dc 913 * @}
EricLew 0:ad9dfc0179dc 914 */
EricLew 0:ad9dfc0179dc 915
EricLew 0:ad9dfc0179dc 916 /**
EricLew 0:ad9dfc0179dc 917 * @}
EricLew 0:ad9dfc0179dc 918 */
EricLew 0:ad9dfc0179dc 919
EricLew 0:ad9dfc0179dc 920 /**
EricLew 0:ad9dfc0179dc 921 * @}
EricLew 0:ad9dfc0179dc 922 */
EricLew 0:ad9dfc0179dc 923
EricLew 0:ad9dfc0179dc 924 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
EricLew 0:ad9dfc0179dc 925