ST / USBHOST

USBHOST lib for STM

Dependents:   door-access-controller-dev

USBHost/TARGET_STM/USBHALHost_STM_144_64pins.h@6:d3ac9e1c0035, 2017-04-26 (annotated)

Committer:
jamike
Date:
Wed Apr 26 20:08:31 2017 +0000
Revision:
6:d3ac9e1c0035
Parent:
1:ab240722d7ef 
fix error in read and write

Who changed what in which revision?

UserRevisionLine numberNew contents of line
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 1 /* mbed USBHost Library
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 2 * Copyright (c) 2006-2013 ARM Limited
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 3 *
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 4 * Licensed under the Apache License, Version 2.0 (the "License");
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 5 * you may not use this file except in compliance with the License.
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 6 * You may obtain a copy of the License at
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 7 *
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 8 * http://www.apache.org/licenses/LICENSE-2.0
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 9 *
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 10 * Unless required by applicable law or agreed to in writing, software
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 11 * distributed under the License is distributed on an "AS IS" BASIS,
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 13 * See the License for the specific language governing permissions and
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 14 * limitations under the License.
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 15 */
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 16 #ifndef USBHALHOST_STM32_144_64
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 17 #define USBHALHOST_STM32_144_64
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 18
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 19 #define USBHAL_IRQn OTG_FS_IRQn
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 20
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 21 #define HCCA_SIZE sizeof(HCD_HandleTypeDef)
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 22 #define ED_SIZE sizeof(HCED)
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 23 #define TD_SIZE sizeof(HCTD)
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 24
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 25 #define TOTAL_SIZE (HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE) + (MAX_TD*TD_SIZE))
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 26 /* STM device FS have 11 channels (definition is for 60 channels) */
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 27 static volatile uint8_t usb_buf[TOTAL_SIZE];
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 28 typedef struct
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 29 {
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 30 /* store the request ongoing on each endpoit */
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 31 /* 1st field of structure avoid giving knowledge of all structure to
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 32 * endpoint */
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 33 volatile uint32_t addr[MAX_ENDPOINT];
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 34 USBHALHost *inst;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 35 void (USBHALHost::*deviceConnected)(int hub, int port, bool lowSpeed, USBHostHub * hub_parent);
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 36 void (USBHALHost::*deviceDisconnected)(int hub, int port, USBHostHub * hub_parent, volatile uint32_t addr);
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 37 void (USBHALHost::*transferCompleted)(volatile uint32_t addr);
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 38 }USBHALHost_Private_t;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 39
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 40 /* CONFIGURATION for USB_VBUS
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 41 * on 64 bits board PC_0 is used (0 VBUS on, 1 VBUS off)
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 42 * on 144 pins board PG_6 is used ( 1 VBUS on, 0 VBUS on)
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 43 */
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 44 static gpio_t gpio_vbus;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 45
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 46 #if defined(USBHALHOST_64pins)
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 47 #define VBUS_OFF 1
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 48 #define VBUS_ON 0
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 49 #define USB_VBUS_CONFIG \
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 50 do {__HAL_RCC_GPIOC_CLK_ENABLE();\
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 51 gpio_init_out_ex(&gpio_vbus, PC_0, VBUS_OFF);\
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 52 }while(0);
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 53 #else
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 54 #define VBUS_OFF 0
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 55 #define VBUS_ON 1
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 56 #define USB_VBUS_CONFIG \
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 57 do {__HAL_RCC_GPIOG_CLK_ENABLE();\
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 58 gpio_init_out_ex(&gpio_vbus, PG_6, VBUS_OFF);\
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 59 }while(0);
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 60 #endif
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 61
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 62 void usb_vbus( uint8_t state)
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 63 {
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 64 if(state == 0)
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 65 {
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 66 gpio_write(&gpio_vbus, VBUS_OFF);
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 67 }
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 68 else
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 69 {
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 70 gpio_write(&gpio_vbus, VBUS_ON);
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 71 }
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 72 wait(0.2);
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 73 }
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 74
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 75 USBHALHost::USBHALHost() {
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 76 instHost = this;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 77 HCD_HandleTypeDef *hhcd;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 78 USBHALHost_Private_t *HALPriv = new(USBHALHost_Private_t);
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 79 memset(HALPriv, 0, sizeof(USBHALHost_Private_t));
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 80 memInit();
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 81 memset((void*)usb_hcca, 0, HCCA_SIZE);
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 82 hhcd = (HCD_HandleTypeDef *)usb_hcca;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 83 hhcd->Instance = USB_OTG_FS;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 84 hhcd->pData = (void*)HALPriv;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 85 hhcd->Init.Host_channels = 11;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 86 hhcd->Init.speed = HCD_SPEED_FULL;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 87 hhcd->Init.phy_itface = HCD_PHY_EMBEDDED;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 88 HALPriv->inst = this;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 89 HALPriv->deviceConnected = &USBHALHost::deviceConnected;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 90 HALPriv->deviceDisconnected = &USBHALHost::deviceDisconnected;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 91 HALPriv->transferCompleted = &USBHALHost::transferCompleted;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 92 for (int i = 0; i < MAX_ENDPOINT; i++) {
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 93 edBufAlloc[i] = false;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 94 HALPriv->addr[i]=(uint32_t)-1;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 95 }
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 96 for (int i = 0; i < MAX_TD; i++) {
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 97 tdBufAlloc[i] = false;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 98 }
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 99 __HAL_RCC_PWR_CLK_ENABLE();
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 100 #ifdef TARGET_STM32L4
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 101 HAL_PWREx_EnableVddUSB();
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 102 #endif
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 103 /* Configure USB FS GPIOs */
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 104 __HAL_RCC_GPIOA_CLK_ENABLE();
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 105
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 106 /*USB DM and DP */
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 107 pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS));
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 108 pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS));
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 109 /*USB ID */
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 110 pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS));
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 111
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 112 __HAL_RCC_SYSCFG_CLK_ENABLE();
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 113 /* Configure POWER_SWITCH IO pin */
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 114 USB_VBUS_CONFIG;
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 115 /* Enable USB FS Clocks */
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 116 __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 117
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 118 /* Set USBFS Interrupt priority */
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 119 HAL_NVIC_SetPriority(OTG_FS_IRQn, 6, 0);
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 120 }
frq08711@LMECWL0871.LME.ST.COM 1:ab240722d7ef 121 #endif