lps22hh_reg.c

00001 /*
00002  ******************************************************************************
00003  * @file    lps22hh_reg.c
00004  * @author  Sensors Software Solution Team
00005  * @brief   LPS22HH driver file
00006  ******************************************************************************
00007  * @attention
00008  *
00009  * <h2><center>&copy; COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
00010  *
00011  * Redistribution and use in source and binary forms, with or without
00012  * modification, are permitted provided that the following conditions
00013  * are met:
00014  *   1. Redistributions of source code must retain the above copyright notice,
00015  *      this list of conditions and the following disclaimer.
00016  *   2. Redistributions in binary form must reproduce the above copyright
00017  *      notice, this list of conditions and the following disclaimer in the
00018  *      documentation and/or other materials provided with the distribution.
00019  *   3. Neither the name of STMicroelectronics nor the names of its
00020  *      contributors may be used to endorse or promote products derived from
00021  *      this software without specific prior written permission.
00022  *
00023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
00027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
00028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
00029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
00031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
00032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00033  * POSSIBILITY OF SUCH DAMAGE.
00034  *
00035 */
00036 
00037 #include "lps22hh_reg.h"
00038 
00039 /**
00040   * @defgroup  LPS22HH
00041   * @brief     This file provides a set of functions needed to drive the
00042   *            lps22hh enhanced inertial module.
00043   * @{
00044   *
00045   */
00046 
00047 /**
00048   * @defgroup  LPS22HH_Interfaces_Functions
00049   * @brief     This section provide a set of functions used to read and
00050   *            write a generic register of the device.
00051   *            MANDATORY: return 0 -> no Error.
00052   * @{
00053   *
00054   */
00055 
00056 /**
00057   * @brief  Read generic device register
00058   *
00059   * @param  ctx   read / write interface definitions(ptr)
00060   * @param  reg   register to read
00061   * @param  data  pointer to buffer that store the data read(ptr)
00062   * @param  len   number of consecutive register to read
00063   * @retval       interface status (MANDATORY: return 0 -> no Error)
00064   *
00065   */
00066 int32_t lps22hh_read_reg(lps22hh_ctx_t *ctx, uint8_t reg, uint8_t *data,
00067                          uint16_t len)
00068 {
00069     int32_t ret;
00070     ret = ctx->read_reg(ctx->handle, reg, data, len);
00071     return ret;
00072 }
00073 
00074 /**
00075   * @brief  Write generic device register
00076   *
00077   * @param  ctx   read / write interface definitions(ptr)
00078   * @param  reg   register to write
00079   * @param  data  pointer to data to write in register reg(ptr)
00080   * @param  len   number of consecutive register to write
00081   * @retval       interface status (MANDATORY: return 0 -> no Error)
00082   *
00083   */
00084 int32_t lps22hh_write_reg(lps22hh_ctx_t *ctx, uint8_t reg, uint8_t *data,
00085                           uint16_t len)
00086 {
00087     int32_t ret;
00088     ret = ctx->write_reg(ctx->handle, reg, data, len);
00089     return ret;
00090 }
00091 
00092 /**
00093   * @}
00094   *
00095   */
00096 
00097 /**
00098   * @defgroup    LPS22HH_Sensitivity
00099   * @brief       These functions convert raw-data into engineering units.
00100   * @{
00101   *
00102   */
00103 float lps22hh_from_lsb_to_hpa(int16_t lsb)
00104 {
00105     return ((float) lsb / 4096.0f);
00106 }
00107 
00108 float lps22hh_from_lsb_to_celsius(int16_t lsb)
00109 {
00110     return ((float) lsb / 100.0f);
00111 }
00112 
00113 /**
00114   * @}
00115   *
00116   */
00117 
00118 /**
00119   * @defgroup  LPS22HH_Data_Generation
00120   * @brief     This section groups all the functions concerning
00121   *            data generation.
00122   * @{
00123   *
00124   */
00125 
00126 /**
00127   * @brief  Reset Autozero function.[set]
00128   *
00129   * @param  ctx      read / write interface definitions
00130   * @param  val      change the values of reset_az in reg INTERRUPT_CFG
00131   * @retval          interface status (MANDATORY: return 0 -> no Error)
00132   *
00133   */
00134 int32_t lps22hh_autozero_rst_set(lps22hh_ctx_t *ctx, uint8_t val)
00135 {
00136     lps22hh_interrupt_cfg_t reg;
00137     int32_t ret;
00138 
00139     ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
00140     if (ret == 0) {
00141         reg.reset_az = val;
00142         ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
00143     }
00144     return ret;
00145 }
00146 
00147 /**
00148   * @brief  Reset Autozero function.[get]
00149   *
00150   * @param  ctx      read / write interface definitions
00151   * @param  val      change the values of reset_az in reg INTERRUPT_CFG
00152   * @retval          interface status (MANDATORY: return 0 -> no Error)
00153   *
00154   */
00155 int32_t lps22hh_autozero_rst_get(lps22hh_ctx_t *ctx, uint8_t *val)
00156 {
00157     lps22hh_interrupt_cfg_t reg;
00158     int32_t ret;
00159 
00160     ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
00161     *val = reg.reset_az;
00162 
00163     return ret;
00164 }
00165 
00166 /**
00167   * @brief  Enable Autozero function.[set]
00168   *
00169   * @param  ctx      read / write interface definitions
00170   * @param  val      change the values of autozero in reg INTERRUPT_CFG
00171   * @retval          interface status (MANDATORY: return 0 -> no Error)
00172   *
00173   */
00174 int32_t lps22hh_autozero_set(lps22hh_ctx_t *ctx, uint8_t val)
00175 {
00176     lps22hh_interrupt_cfg_t reg;
00177     int32_t ret;
00178 
00179     ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
00180     if (ret == 0) {
00181         reg.autozero = val;
00182         ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
00183     }
00184     return ret;
00185 }
00186 
00187 /**
00188   * @brief  Enable Autozero function.[get]
00189   *
00190   * @param  ctx      read / write interface definitions
00191   * @param  val      change the values of autozero in reg INTERRUPT_CFG
00192   * @retval          interface status (MANDATORY: return 0 -> no Error)
00193   *
00194   */
00195 int32_t lps22hh_autozero_get(lps22hh_ctx_t *ctx, uint8_t *val)
00196 {
00197     lps22hh_interrupt_cfg_t reg;
00198     int32_t ret;
00199 
00200     ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
00201     *val = reg.autozero;
00202 
00203     return ret;
00204 }
00205 
00206 /**
00207   * @brief  Reset AutoRifP function.[set]
00208   *
00209   * @param  ctx      read / write interface definitions
00210   * @param  val      change the values of reset_arp in reg INTERRUPT_CFG
00211   * @retval          interface status (MANDATORY: return 0 -> no Error)
00212   *
00213   */
00214 int32_t lps22hh_pressure_snap_rst_set(lps22hh_ctx_t *ctx, uint8_t val)
00215 {
00216     lps22hh_interrupt_cfg_t reg;
00217     int32_t ret;
00218 
00219     ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
00220     if (ret == 0) {
00221         reg.reset_arp = val;
00222         ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
00223     }
00224     return ret;
00225 }
00226 
00227 /**
00228   * @brief  Reset AutoRifP function.[get]
00229   *
00230   * @param  ctx      read / write interface definitions
00231   * @param  val      change the values of reset_arp in reg INTERRUPT_CFG
00232   * @retval          interface status (MANDATORY: return 0 -> no Error)
00233   *
00234   */
00235 int32_t lps22hh_pressure_snap_rst_get(lps22hh_ctx_t *ctx, uint8_t *val)
00236 {
00237     lps22hh_interrupt_cfg_t reg;
00238     int32_t ret;
00239 
00240     ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
00241     *val = reg.reset_arp;
00242 
00243     return ret;
00244 }
00245 
00246 /**
00247   * @brief  Enable AutoRefP function.[set]
00248   *
00249   * @param  ctx      read / write interface definitions
00250   * @param  val      change the values of autorefp in reg INTERRUPT_CFG
00251   * @retval          interface status (MANDATORY: return 0 -> no Error)
00252   *
00253   */
00254 int32_t lps22hh_pressure_snap_set(lps22hh_ctx_t *ctx, uint8_t val)
00255 {
00256     lps22hh_interrupt_cfg_t reg;
00257     int32_t ret;
00258 
00259     ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
00260     if (ret == 0) {
00261         reg.autorefp = val;
00262         ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
00263     }
00264     return ret;
00265 }
00266 
00267 /**
00268   * @brief  Enable AutoRefP function.[get]
00269   *
00270   * @param  ctx      read / write interface definitions
00271   * @param  val      change the values of autorefp in reg INTERRUPT_CFG
00272   * @retval          interface status (MANDATORY: return 0 -> no Error)
00273   *
00274   */
00275 int32_t lps22hh_pressure_snap_get(lps22hh_ctx_t *ctx, uint8_t *val)
00276 {
00277     lps22hh_interrupt_cfg_t reg;
00278     int32_t ret;
00279 
00280     ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
00281     *val = reg.autorefp;
00282 
00283     return ret;
00284 }
00285 
00286 /**
00287   * @brief  Block Data Update.[set]
00288   *
00289   * @param  ctx      read / write interface definitions
00290   * @param  val      change the values of bdu in reg CTRL_REG1
00291   * @retval          interface status (MANDATORY: return 0 -> no Error)
00292   *
00293   */
00294 int32_t lps22hh_block_data_update_set(lps22hh_ctx_t *ctx, uint8_t val)
00295 {
00296     lps22hh_ctrl_reg1_t reg;
00297     int32_t ret;
00298 
00299     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) &reg, 1);
00300     if (ret == 0) {
00301         reg.bdu = val;
00302         ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) &reg, 1);
00303     }
00304     return ret;
00305 }
00306 
00307 /**
00308   * @brief  Block Data Update.[get]
00309   *
00310   * @param  ctx      read / write interface definitions
00311   * @param  val      change the values of bdu in reg CTRL_REG1
00312   * @retval          interface status (MANDATORY: return 0 -> no Error)
00313   *
00314   */
00315 int32_t lps22hh_block_data_update_get(lps22hh_ctx_t *ctx, uint8_t *val)
00316 {
00317     lps22hh_ctrl_reg1_t reg;
00318     int32_t ret;
00319 
00320     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) &reg, 1);
00321     *val = reg.bdu;
00322 
00323     return ret;
00324 }
00325 
00326 /**
00327   * @brief  Output data rate selection.[set]
00328   *
00329   * @param  ctx      read / write interface definitions
00330   * @param  val      change the values of odr in reg CTRL_REG1
00331   * @retval          interface status (MANDATORY: return 0 -> no Error)
00332   *
00333   */
00334 int32_t lps22hh_data_rate_set(lps22hh_ctx_t *ctx, lps22hh_odr_t val)
00335 {
00336     lps22hh_ctrl_reg1_t ctrl_reg1;
00337     lps22hh_ctrl_reg2_t ctrl_reg2;
00338     int32_t ret;
00339 
00340     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
00341     if (ret == 0) {
00342         ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
00343     }
00344     if (ret == 0) {
00345         ctrl_reg1.odr = (uint8_t)val & 0x07U;
00346         ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
00347     }
00348     if (ret == 0) {
00349         ctrl_reg2.low_noise_en = ((uint8_t)val & 0x10U) >> 4;
00350         ctrl_reg2.one_shot = ((uint8_t)val & 0x08U) >> 3;
00351         ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
00352     }
00353     return ret;
00354 }
00355 
00356 /**
00357   * @brief  Output data rate selection.[get]
00358   *
00359   * @param  ctx      read / write interface definitions
00360   * @param  val      Get the values of odr in reg CTRL_REG1
00361   * @retval          interface status (MANDATORY: return 0 -> no Error)
00362   *
00363   */
00364 int32_t lps22hh_data_rate_get(lps22hh_ctx_t *ctx, lps22hh_odr_t *val)
00365 {
00366     lps22hh_ctrl_reg1_t ctrl_reg1;
00367     lps22hh_ctrl_reg2_t ctrl_reg2;
00368     int32_t ret;
00369 
00370     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
00371     if (ret == 0) {
00372         ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
00373     }
00374     if (ret == 0) {
00375         ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
00376         switch (((ctrl_reg2.low_noise_en << 4) + (ctrl_reg2.one_shot << 3) +
00377                  ctrl_reg1.odr)) {
00378             case LPS22HH_POWER_DOWN:
00379                 *val = LPS22HH_POWER_DOWN;
00380                 break;
00381             case LPS22HH_ONE_SHOOT:
00382                 *val = LPS22HH_ONE_SHOOT;
00383                 break;
00384             case LPS22HH_1_Hz:
00385                 *val = LPS22HH_1_Hz;
00386                 break;
00387             case LPS22HH_10_Hz:
00388                 *val = LPS22HH_10_Hz;
00389                 break;
00390             case LPS22HH_25_Hz:
00391                 *val = LPS22HH_25_Hz;
00392                 break;
00393             case LPS22HH_50_Hz:
00394                 *val = LPS22HH_50_Hz;
00395                 break;
00396             case LPS22HH_75_Hz:
00397                 *val = LPS22HH_75_Hz;
00398                 break;
00399             case LPS22HH_1_Hz_LOW_NOISE:
00400                 *val = LPS22HH_1_Hz_LOW_NOISE;
00401                 break;
00402             case LPS22HH_10_Hz_LOW_NOISE:
00403                 *val = LPS22HH_10_Hz_LOW_NOISE;
00404                 break;
00405             case LPS22HH_25_Hz_LOW_NOISE:
00406                 *val = LPS22HH_25_Hz_LOW_NOISE;
00407                 break;
00408             case LPS22HH_50_Hz_LOW_NOISE:
00409                 *val = LPS22HH_50_Hz_LOW_NOISE;
00410                 break;
00411             case LPS22HH_75_Hz_LOW_NOISE:
00412                 *val = LPS22HH_75_Hz_LOW_NOISE;
00413                 break;
00414             case LPS22HH_100_Hz:
00415                 *val = LPS22HH_100_Hz;
00416                 break;
00417             case LPS22HH_200_Hz:
00418                 *val = LPS22HH_200_Hz;
00419                 break;
00420             default:
00421                 *val = LPS22HH_POWER_DOWN;
00422                 break;
00423         }
00424     }
00425     return ret;
00426 }
00427 
00428 /**
00429   * @brief  The Reference pressure value is a 16-bit data
00430   *         expressed as 2’s complement. The value is used
00431   *         when AUTOZERO or AUTORIFP function is enabled.[set]
00432   *
00433   * @param  ctx      read / write interface definitions
00434   * @param  buff     buffer that contains data to write
00435   * @retval          interface status (MANDATORY: return 0 -> no Error)
00436   *
00437   */
00438 int32_t lps22hh_pressure_ref_set(lps22hh_ctx_t *ctx, uint8_t *buff)
00439 {
00440     int32_t ret;
00441     ret = lps22hh_write_reg(ctx, LPS22HH_REF_P_XL, buff, 2);
00442     return ret;
00443 }
00444 
00445 /**
00446   * @brief  The Reference pressure value is a 16-bit
00447   *         data expressed as 2’s complement.
00448   *         The value is used when AUTOZERO or AUTORIFP
00449   *         function is enabled.[get]
00450   *
00451   * @param  ctx      read / write interface definitions
00452   * @param  buff     buffer that stores data read
00453   * @retval          interface status (MANDATORY: return 0 -> no Error)
00454   *
00455   */
00456 int32_t lps22hh_pressure_ref_get(lps22hh_ctx_t *ctx, uint8_t *buff)
00457 {
00458     int32_t ret;
00459     ret =  lps22hh_read_reg(ctx, LPS22HH_REF_P_XL, buff, 2);
00460     return ret;
00461 }
00462 
00463 /**
00464   * @brief  The pressure offset value is 16-bit data
00465   *         that can be used to implement one-point
00466   *         calibration (OPC) after soldering.[set]
00467   *
00468   * @param  ctx      read / write interface definitions
00469   * @param  buff     buffer that contains data to write
00470   * @retval          interface status (MANDATORY: return 0 -> no Error)
00471   *
00472   */
00473 int32_t lps22hh_pressure_offset_set(lps22hh_ctx_t *ctx, uint8_t *buff)
00474 {
00475     int32_t ret;
00476     ret =  lps22hh_write_reg(ctx, LPS22HH_RPDS_L, buff, 2);
00477     return ret;
00478 }
00479 
00480 /**
00481   * @brief  The pressure offset value is 16-bit
00482   *         data that can be used to implement
00483   *         one-point calibration (OPC) after
00484   *         soldering.[get]
00485   *
00486   * @param  ctx      read / write interface definitions
00487   * @param  buff     buffer that stores data read
00488   * @retval          interface status (MANDATORY: return 0 -> no Error)
00489   *
00490   */
00491 int32_t lps22hh_pressure_offset_get(lps22hh_ctx_t *ctx, uint8_t *buff)
00492 {
00493     int32_t ret;
00494     ret =  lps22hh_read_reg(ctx, LPS22HH_RPDS_L, buff, 2);
00495     return ret;
00496 }
00497 
00498 /**
00499   * @brief  Read all the interrupt/status flag of the device.[get]
00500   *
00501   * @param  ctx      read / write interface definitions
00502   * @param  val      registers STATUS,FIFO_STATUS2,INT_SOURCE
00503   * @retval          interface status (MANDATORY: return 0 -> no Error)
00504   *
00505   */
00506 int32_t lps22hh_all_sources_get(lps22hh_ctx_t *ctx, lps22hh_all_sources_t *val)
00507 {
00508     int32_t ret;
00509 
00510     ret = lps22hh_read_reg(ctx, LPS22HH_INT_SOURCE,
00511                            (uint8_t *) & (val->int_source), 1);
00512     if (ret == 0) {
00513         ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2,
00514                                (uint8_t *) & (val->fifo_status2), 1);
00515     }
00516     if (ret == 0) {
00517         ret = lps22hh_read_reg(ctx, LPS22HH_STATUS,
00518                                (uint8_t *) & (val->status), 1);
00519     }
00520     return ret;
00521 }
00522 
00523 /**
00524   * @brief  The STATUS_REG register is read by the primary interface.[get]
00525   *
00526   * @param  ctx      read / write interface definitions
00527   * @param  val      structure of registers from STATUS to STATUS_REG
00528   * @retval          interface status (MANDATORY: return 0 -> no Error)
00529   *
00530   */
00531 int32_t lps22hh_status_reg_get(lps22hh_ctx_t *ctx, lps22hh_status_t *val)
00532 {
00533     int32_t ret;
00534     ret =  lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t *) val, 1);
00535     return ret;
00536 }
00537 
00538 /**
00539   * @brief  Pressure new data available.[get]
00540   *
00541   * @param  ctx      read / write interface definitions
00542   * @param  val      change the values of p_da in reg STATUS
00543   * @retval          interface status (MANDATORY: return 0 -> no Error)
00544   *
00545   */
00546 int32_t lps22hh_press_flag_data_ready_get(lps22hh_ctx_t *ctx, uint8_t *val)
00547 {
00548     lps22hh_status_t reg;
00549     int32_t ret;
00550 
00551     ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t *) &reg, 1);
00552     *val = reg.p_da;
00553 
00554     return ret;
00555 }
00556 
00557 /**
00558   * @brief  Temperature data available.[get]
00559   *
00560   * @param  ctx      read / write interface definitions
00561   * @param  val      change the values of t_da in reg STATUS
00562   * @retval          interface status (MANDATORY: return 0 -> no Error)
00563   *
00564   */
00565 int32_t lps22hh_temp_flag_data_ready_get(lps22hh_ctx_t *ctx, uint8_t *val)
00566 {
00567     lps22hh_status_t reg;
00568     int32_t ret;
00569 
00570     ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t *) &reg, 1);
00571     *val = reg.t_da;
00572 
00573     return ret;
00574 }
00575 
00576 /**
00577   * @}
00578   *
00579   */
00580 
00581 /**
00582   * @defgroup  LPS22HH_Data_Output
00583   * @brief     This section groups all the data output functions.
00584   * @{
00585   *
00586   */
00587 
00588 /**
00589   * @brief  Pressure output value.[get]
00590   *
00591   * @param  ctx      read / write interface definitions
00592   * @param  buff     buffer that stores data read
00593   * @retval          interface status (MANDATORY: return 0 -> no Error)
00594   *
00595   */
00596 int32_t lps22hh_pressure_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff)
00597 {
00598     int32_t ret;
00599     ret =  lps22hh_read_reg(ctx, LPS22HH_PRESSURE_OUT_XL, buff, 3);
00600     return ret;
00601 }
00602 
00603 /**
00604   * @brief  Temperature output value.[get]
00605   *
00606   * @param  ctx      read / write interface definitions
00607   * @param  buff     buffer that stores data read
00608   * @retval          interface status (MANDATORY: return 0 -> no Error)
00609   *
00610   */
00611 int32_t lps22hh_temperature_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff)
00612 {
00613     int32_t ret;
00614     ret =  lps22hh_read_reg(ctx, LPS22HH_TEMP_OUT_L, buff, 2);
00615     return ret;
00616 }
00617 
00618 /**
00619   * @brief  Pressure output from FIFO value.[get]
00620   *
00621   * @param  ctx      read / write interface definitions
00622   * @param  buff     buffer that stores data read
00623   * @retval          interface status (MANDATORY: return 0 -> no Error)
00624   *
00625   */
00626 int32_t lps22hh_fifo_pressure_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff)
00627 {
00628     int32_t ret;
00629     ret =  lps22hh_read_reg(ctx, LPS22HH_FIFO_DATA_OUT_PRESS_XL, buff, 3);
00630     return ret;
00631 }
00632 
00633 /**
00634   * @brief  Temperature output from FIFO value.[get]
00635   *
00636   * @param  ctx      read / write interface definitions
00637   * @param  buff     buffer that stores data read
00638   * @retval          interface status (MANDATORY: return 0 -> no Error)
00639   *
00640   */
00641 int32_t lps22hh_fifo_temperature_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff)
00642 {
00643     int32_t ret;
00644     ret =  lps22hh_read_reg(ctx, LPS22HH_FIFO_DATA_OUT_TEMP_L, buff, 2);
00645     return ret;
00646 }
00647 
00648 /**
00649   * @}
00650   *
00651   */
00652 
00653 /**
00654   * @defgroup  LPS22HH_Common
00655   * @brief     This section groups common useful functions.
00656   * @{
00657   *
00658   */
00659 
00660 /**
00661   * @brief  DeviceWhoamI[get]
00662   *
00663   * @param  ctx      read / write interface definitions
00664   * @param  buff     buffer that stores data read
00665   * @retval          interface status (MANDATORY: return 0 -> no Error)
00666   *
00667   */
00668 int32_t lps22hh_device_id_get(lps22hh_ctx_t *ctx, uint8_t *buff)
00669 {
00670     int32_t ret;
00671     ret =  lps22hh_read_reg(ctx, LPS22HH_WHO_AM_I, buff, 1);
00672     return ret;
00673 }
00674 
00675 /**
00676   * @brief  Software reset. Restore the default values
00677   *         in user registers.[set]
00678   *
00679   * @param  ctx      read / write interface definitions
00680   * @param  val      change the values of swreset in reg CTRL_REG2
00681   * @retval          interface status (MANDATORY: return 0 -> no Error)
00682   *
00683   */
00684 int32_t lps22hh_reset_set(lps22hh_ctx_t *ctx, uint8_t val)
00685 {
00686     lps22hh_ctrl_reg2_t reg;
00687     int32_t ret;
00688 
00689     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) &reg, 1);
00690     if (ret == 0) {
00691         reg.swreset = val;
00692         ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) &reg, 1);
00693     }
00694     return ret;
00695 }
00696 
00697 /**
00698   * @brief   Software reset. Restore the default values
00699   *          in user registers.[get]
00700   *
00701   * @param  ctx      read / write interface definitions
00702   * @param  val      change the values of swreset in reg CTRL_REG2
00703   * @retval          interface status (MANDATORY: return 0 -> no Error)
00704   *
00705   */
00706 int32_t lps22hh_reset_get(lps22hh_ctx_t *ctx, uint8_t *val)
00707 {
00708     lps22hh_ctrl_reg2_t reg;
00709     int32_t ret;
00710 
00711     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) &reg, 1);
00712     *val = reg.swreset;
00713 
00714     return ret;
00715 }
00716 
00717 /**
00718   * @brief  Register address automatically
00719   *         incremented during a multiple byte access
00720   *         with a serial interface.[set]
00721   *
00722   * @param  ctx      read / write interface definitions
00723   * @param  val      change the values of if_add_inc in reg CTRL_REG2
00724   * @retval          interface status (MANDATORY: return 0 -> no Error)
00725   *
00726   */
00727 int32_t lps22hh_auto_increment_set(lps22hh_ctx_t *ctx, uint8_t val)
00728 {
00729     lps22hh_ctrl_reg2_t reg;
00730     int32_t ret;
00731 
00732     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) &reg, 1);
00733     if (ret == 0) {
00734         reg.if_add_inc = val;
00735         ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) &reg, 1);
00736     }
00737     return ret;
00738 }
00739 
00740 /**
00741   * @brief  Register address automatically
00742   *         incremented during a multiple byte
00743   *         access with a serial interface.[get]
00744   *
00745   * @param  ctx      read / write interface definitions
00746   * @param  val      change the values of if_add_inc in reg CTRL_REG2
00747   * @retval          interface status (MANDATORY: return 0 -> no Error)
00748   *
00749   */
00750 int32_t lps22hh_auto_increment_get(lps22hh_ctx_t *ctx, uint8_t *val)
00751 {
00752     lps22hh_ctrl_reg2_t reg;
00753     int32_t ret;
00754 
00755     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) &reg, 1);
00756     *val = reg.if_add_inc;
00757 
00758     return ret;
00759 }
00760 
00761 /**
00762   * @brief  Reboot memory content. Reload the calibration
00763   *         parameters.[set]
00764   *
00765   * @param  ctx      read / write interface definitions
00766   * @param  val      change the values of boot in reg CTRL_REG2
00767   * @retval          interface status (MANDATORY: return 0 -> no Error)
00768   *
00769   */
00770 int32_t lps22hh_boot_set(lps22hh_ctx_t *ctx, uint8_t val)
00771 {
00772     lps22hh_ctrl_reg2_t reg;
00773     int32_t ret;
00774 
00775     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) &reg, 1);
00776     if (ret == 0) {
00777         reg.boot = val;
00778         ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) &reg, 1);
00779     }
00780     return ret;
00781 }
00782 
00783 /**
00784   * @brief  Reboot memory content. Reload the calibration
00785   *         parameters.[get]
00786   *
00787   * @param  ctx      read / write interface definitions
00788   * @param  val      change the values of boot in reg CTRL_REG2
00789   * @retval          interface status (MANDATORY: return 0 -> no Error)
00790   *
00791   */
00792 int32_t lps22hh_boot_get(lps22hh_ctx_t *ctx, uint8_t *val)
00793 {
00794     lps22hh_ctrl_reg2_t reg;
00795     int32_t ret;
00796 
00797     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) &reg, 1);
00798     *val = reg.boot;
00799 
00800     return ret;
00801 }
00802 
00803 /**
00804   * @}
00805   *
00806   */
00807 
00808 /**
00809   * @defgroup  LPS22HH_Filters
00810   * @brief     This section group all the functions concerning the
00811   *            filters configuration.
00812   * @{
00813   *
00814   */
00815 
00816 /**
00817   * @brief  Low-pass bandwidth selection.[set]
00818   *
00819   * @param  ctx      read / write interface definitions
00820   * @param  val      change the values of lpfp_cfg in reg CTRL_REG1
00821   * @retval          interface status (MANDATORY: return 0 -> no Error)
00822   *
00823   */
00824 int32_t lps22hh_lp_bandwidth_set(lps22hh_ctx_t *ctx, lps22hh_lpfp_cfg_t val)
00825 {
00826     lps22hh_ctrl_reg1_t reg;
00827     int32_t ret;
00828 
00829     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) &reg, 1);
00830     if (ret == 0) {
00831         reg.lpfp_cfg = (uint8_t)val;
00832         ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) &reg, 1);
00833     }
00834     return ret;
00835 }
00836 
00837 /**
00838   * @brief  Low-pass bandwidth selection.[get]
00839   *
00840   * @param  ctx      read / write interface definitions
00841   * @param  val      Get the values of lpfp_cfg in reg CTRL_REG1
00842   * @retval          interface status (MANDATORY: return 0 -> no Error)
00843   *
00844   */
00845 int32_t lps22hh_lp_bandwidth_get(lps22hh_ctx_t *ctx, lps22hh_lpfp_cfg_t *val)
00846 {
00847     lps22hh_ctrl_reg1_t reg;
00848     int32_t ret;
00849 
00850     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) &reg, 1);
00851     switch (reg.lpfp_cfg) {
00852         case LPS22HH_LPF_ODR_DIV_2:
00853             *val = LPS22HH_LPF_ODR_DIV_2;
00854             break;
00855         case LPS22HH_LPF_ODR_DIV_9:
00856             *val = LPS22HH_LPF_ODR_DIV_9;
00857             break;
00858         case LPS22HH_LPF_ODR_DIV_20:
00859             *val = LPS22HH_LPF_ODR_DIV_20;
00860             break;
00861         default:
00862             *val = LPS22HH_LPF_ODR_DIV_2;
00863             break;
00864     }
00865 
00866     return ret;
00867 }
00868 
00869 /**
00870   * @}
00871   *
00872   */
00873 
00874 /**
00875   * @defgroup  LPS22HH_Serial_Interface
00876   * @brief     This section groups all the functions concerning serial
00877   *            interface management
00878   * @{
00879   *
00880   */
00881 
00882 /**
00883   * @brief  Enable/Disable I2C interface.[set]
00884   *
00885   * @param  ctx      read / write interface definitions
00886   * @param  val      change the values of i2c_disable in reg IF_CTRL
00887   * @retval          interface status (MANDATORY: return 0 -> no Error)
00888   *
00889   */
00890 int32_t lps22hh_i2c_interface_set(lps22hh_ctx_t *ctx,
00891                                   lps22hh_i2c_disable_t val)
00892 {
00893     lps22hh_if_ctrl_t reg;
00894     int32_t ret;
00895 
00896     ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) &reg, 1);
00897     if (ret == 0) {
00898         reg.i2c_disable = (uint8_t)val;
00899         ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) &reg, 1);
00900     }
00901     return ret;
00902 }
00903 
00904 /**
00905   * @brief  Enable/Disable I2C interface.[get]
00906   *
00907   * @param  ctx      read / write interface definitions
00908   * @param  val      Get the values of i2c_disable in reg IF_CTRL
00909   * @retval          interface status (MANDATORY: return 0 -> no Error)
00910   *
00911   */
00912 int32_t lps22hh_i2c_interface_get(lps22hh_ctx_t *ctx,
00913                                   lps22hh_i2c_disable_t *val)
00914 {
00915     lps22hh_if_ctrl_t reg;
00916     int32_t ret;
00917 
00918     ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) &reg, 1);
00919     switch (reg.i2c_disable) {
00920         case LPS22HH_I2C_ENABLE:
00921             *val = LPS22HH_I2C_ENABLE;
00922             break;
00923         case LPS22HH_I2C_DISABLE:
00924             *val = LPS22HH_I2C_DISABLE;
00925             break;
00926         default:
00927             *val = LPS22HH_I2C_ENABLE;
00928             break;
00929     }
00930 
00931     return ret;
00932 }
00933 
00934 /**
00935   * @brief  I3C Enable/Disable communication protocol.[set]
00936   *
00937   * @param  ctx      read / write interface definitions
00938   * @param  val      change the values of int_en_i3c in reg IF_CTRL
00939   * @retval          interface status (MANDATORY: return 0 -> no Error)
00940   *
00941   */
00942 int32_t lps22hh_i3c_interface_set(lps22hh_ctx_t *ctx,
00943                                   lps22hh_i3c_disable_t val)
00944 {
00945     lps22hh_if_ctrl_t reg;
00946     int32_t ret;
00947 
00948     ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) &reg, 1);
00949     if (ret == 0) {
00950         reg.i3c_disable = ((uint8_t)val & 0x01u);
00951         reg.int_en_i3c = ((uint8_t)val & 0x10U) >> 4;
00952         ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) &reg, 1);
00953     }
00954     return ret;
00955 }
00956 
00957 /**
00958   * @brief  I3C Enable/Disable communication protocol.[get]
00959   *
00960   * @param  ctx      read / write interface definitions
00961   * @param  val      change the values of int_en_i3c in reg IF_CTRL
00962   * @retval          interface status (MANDATORY: return 0 -> no Error)
00963   *
00964   */
00965 int32_t lps22hh_i3c_interface_get(lps22hh_ctx_t *ctx,
00966                                   lps22hh_i3c_disable_t *val)
00967 {
00968     lps22hh_if_ctrl_t reg;
00969     int32_t ret;
00970 
00971     ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) &reg, 1);
00972 
00973     switch ((reg.int_en_i3c << 4) + reg.int_en_i3c) {
00974         case LPS22HH_I3C_ENABLE:
00975             *val = LPS22HH_I3C_ENABLE;
00976             break;
00977         case LPS22HH_I3C_ENABLE_INT_PIN_ENABLE:
00978             *val = LPS22HH_I3C_ENABLE_INT_PIN_ENABLE;
00979             break;
00980         case LPS22HH_I3C_DISABLE:
00981             *val = LPS22HH_I3C_DISABLE;
00982             break;
00983         default:
00984             *val = LPS22HH_I3C_ENABLE;
00985             break;
00986     }
00987     return ret;
00988 }
00989 
00990 /**
00991   * @brief  Enable/Disable pull-up on SDO pin.[set]
00992   *
00993   * @param  ctx      read / write interface definitions
00994   * @param  val      change the values of sdo_pu_en in reg IF_CTRL
00995   * @retval          interface status (MANDATORY: return 0 -> no Error)
00996   *
00997   */
00998 int32_t lps22hh_sdo_sa0_mode_set(lps22hh_ctx_t *ctx, lps22hh_pu_en_t val)
00999 {
01000     lps22hh_if_ctrl_t reg;
01001     int32_t ret;
01002 
01003     ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) &reg, 1);
01004     if (ret == 0) {
01005         reg.sdo_pu_en = (uint8_t)val;
01006         ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) &reg, 1);
01007     }
01008     return ret;
01009 }
01010 
01011 /**
01012   * @brief  Enable/Disable pull-up on SDO pin.[get]
01013   *
01014   * @param  ctx      read / write interface definitions
01015   * @param  val      Get the values of sdo_pu_en in reg IF_CTRL
01016   * @retval          interface status (MANDATORY: return 0 -> no Error)
01017   *
01018   */
01019 int32_t lps22hh_sdo_sa0_mode_get(lps22hh_ctx_t *ctx, lps22hh_pu_en_t *val)
01020 {
01021     lps22hh_if_ctrl_t reg;
01022     int32_t ret;
01023 
01024     ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) &reg, 1);
01025     switch (reg.sdo_pu_en) {
01026         case LPS22HH_PULL_UP_DISCONNECT:
01027             *val = LPS22HH_PULL_UP_DISCONNECT;
01028             break;
01029         case LPS22HH_PULL_UP_CONNECT:
01030             *val = LPS22HH_PULL_UP_CONNECT;
01031             break;
01032         default:
01033             *val = LPS22HH_PULL_UP_DISCONNECT;
01034             break;
01035     }
01036 
01037     return ret;
01038 }
01039 
01040 /**
01041   * @brief  Connect/Disconnect SDO/SA0 internal pull-up.[set]
01042   *
01043   * @param  ctx      read / write interface definitions
01044   * @param  val      change the values of sda_pu_en in reg IF_CTRL
01045   * @retval          interface status (MANDATORY: return 0 -> no Error)
01046   *
01047   */
01048 int32_t lps22hh_sda_mode_set(lps22hh_ctx_t *ctx, lps22hh_pu_en_t val)
01049 {
01050     lps22hh_if_ctrl_t reg;
01051     int32_t ret;
01052 
01053     ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) &reg, 1);
01054     if (ret == 0) {
01055         reg.sda_pu_en = (uint8_t)val;
01056         ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) &reg, 1);
01057     }
01058     return ret;
01059 }
01060 
01061 /**
01062   * @brief  Connect/Disconnect SDO/SA0 internal pull-up.[get]
01063   *
01064   * @param  ctx      read / write interface definitions
01065   * @param  val      Get the values of sda_pu_en in reg IF_CTRL
01066   * @retval          interface status (MANDATORY: return 0 -> no Error)
01067   *
01068   */
01069 int32_t lps22hh_sda_mode_get(lps22hh_ctx_t *ctx, lps22hh_pu_en_t *val)
01070 {
01071     lps22hh_if_ctrl_t reg;
01072     int32_t ret;
01073 
01074     ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) &reg, 1);
01075     switch (reg.sda_pu_en) {
01076         case LPS22HH_PULL_UP_DISCONNECT:
01077             *val = LPS22HH_PULL_UP_DISCONNECT;
01078             break;
01079         case LPS22HH_PULL_UP_CONNECT:
01080             *val = LPS22HH_PULL_UP_CONNECT;
01081             break;
01082         default:
01083             *val = LPS22HH_PULL_UP_DISCONNECT;
01084             break;
01085     }
01086     return ret;
01087 }
01088 
01089 /**
01090   * @brief  SPI Serial Interface Mode selection.[set]
01091   *
01092   * @param  ctx      read / write interface definitions
01093   * @param  val      change the values of sim in reg CTRL_REG1
01094   * @retval          interface status (MANDATORY: return 0 -> no Error)
01095   *
01096   */
01097 int32_t lps22hh_spi_mode_set(lps22hh_ctx_t *ctx, lps22hh_sim_t val)
01098 {
01099     lps22hh_ctrl_reg1_t reg;
01100     int32_t ret;
01101 
01102     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) &reg, 1);
01103     if (ret == 0) {
01104         reg.sim = (uint8_t)val;
01105         ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) &reg, 1);
01106     }
01107     return ret;
01108 }
01109 
01110 /**
01111   * @brief  SPI Serial Interface Mode selection.[get]
01112   *
01113   * @param  ctx      read / write interface definitions
01114   * @param  val      Get the values of sim in reg CTRL_REG1
01115   * @retval          interface status (MANDATORY: return 0 -> no Error)
01116   *
01117   */
01118 int32_t lps22hh_spi_mode_get(lps22hh_ctx_t *ctx, lps22hh_sim_t *val)
01119 {
01120     lps22hh_ctrl_reg1_t reg;
01121     int32_t ret;
01122 
01123     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) &reg, 1);
01124     switch (reg.sim) {
01125         case LPS22HH_SPI_4_WIRE:
01126             *val = LPS22HH_SPI_4_WIRE;
01127             break;
01128         case LPS22HH_SPI_3_WIRE:
01129             *val = LPS22HH_SPI_3_WIRE;
01130             break;
01131         default:
01132             *val = LPS22HH_SPI_4_WIRE;
01133             break;
01134     }
01135     return ret;
01136 }
01137 
01138 /**
01139   * @}
01140   *
01141   */
01142 
01143 /**
01144   * @defgroup  LPS22HH_Interrupt_Pins
01145   * @brief     This section groups all the functions that manage
01146   *            interrupt pins.
01147   * @{
01148   *
01149   */
01150 
01151 /**
01152   * @brief  Latch interrupt request to the INT_SOURCE (24h) register.[set]
01153   *
01154   * @param  ctx      read / write interface definitions
01155   * @param  val      change the values of lir in reg INTERRUPT_CFG
01156   * @retval          interface status (MANDATORY: return 0 -> no Error)
01157   *
01158   */
01159 int32_t lps22hh_int_notification_set(lps22hh_ctx_t *ctx, lps22hh_lir_t val)
01160 {
01161     lps22hh_interrupt_cfg_t reg;
01162     int32_t ret;
01163 
01164     ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
01165     if (ret == 0) {
01166         reg.lir = (uint8_t)val;
01167         ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
01168     }
01169     return ret;
01170 }
01171 
01172 /**
01173   * @brief  Latch interrupt request to the INT_SOURCE (24h) register.[get]
01174   *
01175   * @param  ctx      read / write interface definitions
01176   * @param  val      Get the values of lir in reg INTERRUPT_CFG
01177   * @retval          interface status (MANDATORY: return 0 -> no Error)
01178   *
01179   */
01180 int32_t lps22hh_int_notification_get(lps22hh_ctx_t *ctx, lps22hh_lir_t *val)
01181 {
01182     lps22hh_interrupt_cfg_t reg;
01183     int32_t ret;
01184 
01185     ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
01186 
01187     switch (reg.lir) {
01188         case LPS22HH_INT_PULSED:
01189             *val = LPS22HH_INT_PULSED;
01190             break;
01191         case LPS22HH_INT_LATCHED:
01192             *val = LPS22HH_INT_LATCHED;
01193             break;
01194         default:
01195             *val = LPS22HH_INT_PULSED;
01196             break;
01197     }
01198     return ret;
01199 }
01200 
01201 /**
01202   * @brief  Push-pull/open drain selection on interrupt pads.[set]
01203   *
01204   * @param  ctx      read / write interface definitions
01205   * @param  val      change the values of pp_od in reg CTRL_REG2
01206   * @retval          interface status (MANDATORY: return 0 -> no Error)
01207   *
01208   */
01209 int32_t lps22hh_pin_mode_set(lps22hh_ctx_t *ctx, lps22hh_pp_od_t val)
01210 {
01211     lps22hh_ctrl_reg2_t reg;
01212     int32_t ret;
01213 
01214     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) &reg, 1);
01215     if (ret == 0) {
01216         reg.pp_od = (uint8_t)val;
01217         ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) &reg, 1);
01218     }
01219 
01220     return ret;
01221 }
01222 
01223 /**
01224   * @brief  Push-pull/open drain selection on interrupt pads.[get]
01225   *
01226   * @param  ctx      read / write interface definitions
01227   * @param  val      Get the values of pp_od in reg CTRL_REG2
01228   * @retval          interface status (MANDATORY: return 0 -> no Error)
01229   *
01230   */
01231 int32_t lps22hh_pin_mode_get(lps22hh_ctx_t *ctx, lps22hh_pp_od_t *val)
01232 {
01233     lps22hh_ctrl_reg2_t reg;
01234     int32_t ret;
01235 
01236     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) &reg, 1);
01237 
01238 
01239     switch (reg.pp_od) {
01240         case LPS22HH_PUSH_PULL:
01241             *val = LPS22HH_PUSH_PULL;
01242             break;
01243         case LPS22HH_OPEN_DRAIN:
01244             *val = LPS22HH_OPEN_DRAIN;
01245             break;
01246         default:
01247             *val = LPS22HH_PUSH_PULL;
01248             break;
01249     }
01250 
01251     return ret;
01252 }
01253 
01254 /**
01255   * @brief  Interrupt active-high/low.[set]
01256   *
01257   * @param  ctx      read / write interface definitions
01258   * @param  val      change the values of int_h_l in reg CTRL_REG2
01259   * @retval          interface status (MANDATORY: return 0 -> no Error)
01260   *
01261   */
01262 int32_t lps22hh_pin_polarity_set(lps22hh_ctx_t *ctx, lps22hh_int_h_l_t val)
01263 {
01264     lps22hh_ctrl_reg2_t reg;
01265     int32_t ret;
01266 
01267     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) &reg, 1);
01268     if (ret == 0) {
01269         reg.int_h_l = (uint8_t)val;
01270         ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) &reg, 1);
01271     }
01272 
01273     return ret;
01274 }
01275 
01276 /**
01277   * @brief  Interrupt active-high/low.[get]
01278   *
01279   * @param  ctx      read / write interface definitions
01280   * @param  val      Get the values of int_h_l in reg CTRL_REG2
01281   * @retval          interface status (MANDATORY: return 0 -> no Error)
01282   *
01283   */
01284 int32_t lps22hh_pin_polarity_get(lps22hh_ctx_t *ctx, lps22hh_int_h_l_t *val)
01285 {
01286     lps22hh_ctrl_reg2_t reg;
01287     int32_t ret;
01288 
01289     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) &reg, 1);
01290 
01291     switch (reg.int_h_l) {
01292         case LPS22HH_ACTIVE_HIGH:
01293             *val = LPS22HH_ACTIVE_HIGH;
01294             break;
01295         case LPS22HH_ACTIVE_LOW:
01296             *val = LPS22HH_ACTIVE_LOW;
01297             break;
01298         default:
01299             *val = LPS22HH_ACTIVE_HIGH;
01300             break;
01301     }
01302 
01303     return ret;
01304 }
01305 
01306 /**
01307   * @brief  Select the signal that need to route on int pad.[set]
01308   *
01309   * @param  ctx      read / write interface definitions
01310   * @param  val      registers CTRL_REG3
01311   * @retval          interface status (MANDATORY: return 0 -> no Error)
01312   *
01313   */
01314 int32_t lps22hh_pin_int_route_set(lps22hh_ctx_t *ctx,
01315                                   lps22hh_ctrl_reg3_t *val)
01316 {
01317     int32_t ret;
01318     ret =  lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, (uint8_t *) val, 1);
01319     return ret;
01320 }
01321 
01322 /**
01323   * @brief  Select the signal that need to route on int pad.[get]
01324   *
01325   * @param  ctx      read / write interface definitions
01326   * @param  val      registers CTRL_REG3
01327   * @retval          interface status (MANDATORY: return 0 -> no Error)
01328   *
01329   */
01330 int32_t lps22hh_pin_int_route_get(lps22hh_ctx_t *ctx,
01331                                   lps22hh_ctrl_reg3_t *val)
01332 {
01333     int32_t ret;
01334     ret =  lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, (uint8_t *) val, 1);
01335     return ret;
01336 }
01337 
01338 /**
01339   * @}
01340   *
01341   */
01342 
01343 /**
01344   * @defgroup   LPS22HH_Interrupt_on_Threshold
01345   * @brief      This section groups all the functions that manage the
01346   *             interrupt on threshold event generation.
01347   * @{
01348   *
01349   */
01350 
01351 /**
01352   * @brief   Enable interrupt generation on pressure low/high event.[set]
01353   *
01354   * @param  ctx      read / write interface definitions
01355   * @param  val      change the values of pe in reg INTERRUPT_CFG
01356   * @retval          interface status (MANDATORY: return 0 -> no Error)
01357   *
01358   */
01359 int32_t lps22hh_int_on_threshold_set(lps22hh_ctx_t *ctx, lps22hh_pe_t val)
01360 {
01361     lps22hh_interrupt_cfg_t reg;
01362     int32_t ret;
01363 
01364     ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
01365     if (ret == 0) {
01366         reg.pe = (uint8_t)val;
01367 
01368         if (val == LPS22HH_NO_THRESHOLD) {
01369             reg.diff_en = PROPERTY_DISABLE;
01370         } else {
01371             reg.diff_en = PROPERTY_ENABLE;
01372         }
01373         ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
01374     }
01375     return ret;
01376 }
01377 
01378 /**
01379   * @brief  Enable interrupt generation on pressure low/high event.[get]
01380   *
01381   * @param  ctx      read / write interface definitions
01382   * @param  val      Get the values of pe in reg INTERRUPT_CFG
01383   * @retval          interface status (MANDATORY: return 0 -> no Error)
01384   *
01385   */
01386 int32_t lps22hh_int_on_threshold_get(lps22hh_ctx_t *ctx, lps22hh_pe_t *val)
01387 {
01388     lps22hh_interrupt_cfg_t reg;
01389     int32_t ret;
01390 
01391     ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) &reg, 1);
01392 
01393     switch (reg.pe) {
01394         case LPS22HH_NO_THRESHOLD:
01395             *val = LPS22HH_NO_THRESHOLD;
01396             break;
01397         case LPS22HH_POSITIVE:
01398             *val = LPS22HH_POSITIVE;
01399             break;
01400         case LPS22HH_NEGATIVE:
01401             *val = LPS22HH_NEGATIVE;
01402             break;
01403         case LPS22HH_BOTH:
01404             *val = LPS22HH_BOTH;
01405             break;
01406         default:
01407             *val = LPS22HH_NO_THRESHOLD;
01408             break;
01409     }
01410 
01411     return ret;
01412 }
01413 
01414 /**
01415   * @brief  User-defined threshold value for pressure interrupt event.[set]
01416   *
01417   * @param  ctx      read / write interface definitions
01418   * @param  buff     buffer that contains data to write
01419   * @retval          interface status (MANDATORY: return 0 -> no Error)
01420   *
01421   */
01422 int32_t lps22hh_int_treshold_set(lps22hh_ctx_t *ctx, uint16_t buff)
01423 {
01424     int32_t ret;
01425     lps22hh_ths_p_l_t ths_p_l;
01426     lps22hh_ths_p_h_t ths_p_h;
01427 
01428     ths_p_l.ths = (uint8_t)(buff & 0x00FFU);
01429     ths_p_h.ths = (uint8_t)((buff & 0x7F00U) >> 8);
01430 
01431     ret =  lps22hh_write_reg(ctx, LPS22HH_THS_P_L,
01432                              (uint8_t *)&ths_p_l, 1);
01433     if (ret == 0) {
01434         ret =  lps22hh_write_reg(ctx, LPS22HH_THS_P_H,
01435                                  (uint8_t *)&ths_p_h, 1);
01436     }
01437     return ret;
01438 }
01439 
01440 /**
01441   * @brief   User-defined threshold value for pressure interrupt event.[get]
01442   *
01443   * @param  ctx      read / write interface definitions
01444   * @param  buff     buffer that stores data read
01445   * @retval          interface status (MANDATORY: return 0 -> no Error)
01446   *
01447   */
01448 int32_t lps22hh_int_treshold_get(lps22hh_ctx_t *ctx, uint16_t *buff)
01449 {
01450     int32_t ret;
01451     lps22hh_ths_p_l_t ths_p_l;
01452     lps22hh_ths_p_h_t ths_p_h;
01453 
01454     ret =  lps22hh_read_reg(ctx, LPS22HH_THS_P_L,
01455                             (uint8_t *)&ths_p_l, 1);
01456     if (ret == 0) {
01457         ret =  lps22hh_read_reg(ctx, LPS22HH_THS_P_H,
01458                                 (uint8_t *)&ths_p_h, 1);
01459         *buff = (uint16_t)ths_p_h.ths << 8;
01460         *buff |= (uint16_t)ths_p_l.ths;
01461     }
01462     return ret;
01463 }
01464 
01465 /**
01466   * @}
01467   *
01468   */
01469 
01470 /**
01471   * @defgroup  LPS22HH_Fifo
01472   * @brief   This section group all the functions concerning the fifo usage.
01473   * @{
01474   *
01475   */
01476 
01477 /**
01478   * @brief  Fifo Mode selection.[set]
01479   *
01480   * @param  ctx      read / write interface definitions
01481   * @param  val      change the values of f_mode in reg FIFO_CTRL
01482   * @retval          interface status (MANDATORY: return 0 -> no Error)
01483   *
01484   */
01485 int32_t lps22hh_fifo_mode_set(lps22hh_ctx_t *ctx, lps22hh_f_mode_t val)
01486 {
01487     lps22hh_fifo_ctrl_t reg;
01488     int32_t ret;
01489 
01490     ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) &reg, 1);
01491     if (ret == 0) {
01492         reg.f_mode = (uint8_t)val;
01493         ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) &reg, 1);
01494     }
01495     return ret;
01496 }
01497 
01498 /**
01499   * @brief  Fifo Mode selection.[get]
01500   *
01501   * @param  ctx      read / write interface definitions
01502   * @param  val      Get the values of f_mode in reg FIFO_CTRL
01503   * @retval          interface status (MANDATORY: return 0 -> no Error)
01504   *
01505   */
01506 int32_t lps22hh_fifo_mode_get(lps22hh_ctx_t *ctx, lps22hh_f_mode_t *val)
01507 {
01508     lps22hh_fifo_ctrl_t reg;
01509     int32_t ret;
01510 
01511     ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) &reg, 1);
01512 
01513     switch (reg.f_mode) {
01514         case LPS22HH_BYPASS_MODE:
01515             *val = LPS22HH_BYPASS_MODE;
01516             break;
01517         case LPS22HH_FIFO_MODE:
01518             *val = LPS22HH_FIFO_MODE;
01519             break;
01520         case LPS22HH_STREAM_MODE:
01521             *val = LPS22HH_STREAM_MODE;
01522             break;
01523         case LPS22HH_DYNAMIC_STREAM_MODE:
01524             *val = LPS22HH_DYNAMIC_STREAM_MODE;
01525             break;
01526         case LPS22HH_BYPASS_TO_FIFO_MODE:
01527             *val = LPS22HH_BYPASS_TO_FIFO_MODE;
01528             break;
01529         case LPS22HH_BYPASS_TO_STREAM_MODE:
01530             *val = LPS22HH_BYPASS_TO_STREAM_MODE;
01531             break;
01532         case LPS22HH_STREAM_TO_FIFO_MODE:
01533             *val = LPS22HH_STREAM_TO_FIFO_MODE;
01534             break;
01535         default:
01536             *val = LPS22HH_BYPASS_MODE;
01537             break;
01538     }
01539 
01540     return ret;
01541 }
01542 
01543 /**
01544   * @brief  Sensing chain FIFO stop values memorization at
01545   *         threshold level.[set]
01546   *
01547   * @param  ctx      read / write interface definitions
01548   * @param  val      change the values of stop_on_wtm in reg FIFO_CTRL
01549   * @retval          interface status (MANDATORY: return 0 -> no Error)
01550   *
01551   */
01552 int32_t lps22hh_fifo_stop_on_wtm_set(lps22hh_ctx_t *ctx, uint8_t val)
01553 {
01554     lps22hh_fifo_ctrl_t reg;
01555     int32_t ret;
01556 
01557     ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) &reg, 1);
01558     if (ret == 0) {
01559         reg.stop_on_wtm = val;
01560         ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) &reg, 1);
01561     }
01562     return ret;
01563 }
01564 
01565 /**
01566   * @brief   Sensing chain FIFO stop values memorization at threshold
01567   *          level.[get]
01568   *
01569   * @param  ctx      read / write interface definitions
01570   * @param  val      change the values of stop_on_wtm in reg FIFO_CTRL
01571   * @retval          interface status (MANDATORY: return 0 -> no Error)
01572   *
01573   */
01574 int32_t lps22hh_fifo_stop_on_wtm_get(lps22hh_ctx_t *ctx, uint8_t *val)
01575 {
01576     lps22hh_fifo_ctrl_t reg;
01577     int32_t ret;
01578 
01579     ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) &reg, 1);
01580     *val = reg.stop_on_wtm;
01581 
01582     return ret;
01583 }
01584 
01585 /**
01586   * @brief  FIFO watermark level selection.[set]
01587   *
01588   * @param  ctx      read / write interface definitions
01589   * @param  val      change the values of wtm in reg FIFO_WTM
01590   * @retval          interface status (MANDATORY: return 0 -> no Error)
01591   *
01592   */
01593 int32_t lps22hh_fifo_watermark_set(lps22hh_ctx_t *ctx, uint8_t val)
01594 {
01595     lps22hh_fifo_wtm_t reg;
01596     int32_t ret;
01597 
01598     ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t *) &reg, 1);
01599     if (ret == 0) {
01600         reg.wtm = val;
01601         ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t *) &reg, 1);
01602     }
01603     return ret;
01604 }
01605 
01606 /**
01607   * @brief  FIFO watermark level selection.[get]
01608   *
01609   * @param  ctx      read / write interface definitions
01610   * @param  val      change the values of wtm in reg FIFO_WTM
01611   * @retval          interface status (MANDATORY: return 0 -> no Error)
01612   *
01613   */
01614 int32_t lps22hh_fifo_watermark_get(lps22hh_ctx_t *ctx, uint8_t *val)
01615 {
01616     lps22hh_fifo_wtm_t reg;
01617     int32_t ret;
01618 
01619     ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t *) &reg, 1);
01620     *val = reg.wtm;
01621 
01622     return ret;
01623 }
01624 
01625 /**
01626   * @brief  FIFO stored data level.[get]
01627   *
01628   * @param  ctx      read / write interface definitions
01629   * @param  buff     buffer that stores data read
01630   * @retval          interface status (MANDATORY: return 0 -> no Error)
01631   *
01632   */
01633 int32_t lps22hh_fifo_data_level_get(lps22hh_ctx_t *ctx, uint8_t *buff)
01634 {
01635     int32_t ret;
01636     ret =  lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS1, buff, 1);
01637     return ret;
01638 }
01639 
01640 /**
01641   * @brief  Read all the FIFO status flag of the device.[get]
01642   *
01643   * @param  ctx      read / write interface definitions
01644   * @param  val      registers FIFO_STATUS2
01645   * @retval          interface status (MANDATORY: return 0 -> no Error)
01646   *
01647   */
01648 int32_t lps22hh_fifo_src_get(lps22hh_ctx_t *ctx, lps22hh_fifo_status2_t *val)
01649 {
01650     int32_t ret;
01651     ret =  lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t *) val, 1);
01652     return ret;
01653 }
01654 
01655 /**
01656   * @brief  Smart FIFO full status.[get]
01657   *
01658   * @param  ctx      read / write interface definitions
01659   * @param  val      change the values of fifo_full_ia in reg FIFO_STATUS2
01660   * @retval          interface status (MANDATORY: return 0 -> no Error)
01661   *
01662   */
01663 int32_t lps22hh_fifo_full_flag_get(lps22hh_ctx_t *ctx, uint8_t *val)
01664 {
01665     lps22hh_fifo_status2_t reg;
01666     int32_t ret;
01667 
01668     ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t *) &reg, 1);
01669     *val = reg.fifo_full_ia;
01670 
01671     return ret;
01672 }
01673 
01674 /**
01675   * @brief  FIFO overrun status.[get]
01676   *
01677   * @param  ctx      read / write interface definitions
01678   * @param  val      change the values of fifo_ovr_ia in reg FIFO_STATUS2
01679   * @retval          interface status (MANDATORY: return 0 -> no Error)
01680   *
01681   */
01682 int32_t lps22hh_fifo_ovr_flag_get(lps22hh_ctx_t *ctx, uint8_t *val)
01683 {
01684     lps22hh_fifo_status2_t reg;
01685     int32_t ret;
01686 
01687     ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t *) &reg, 1);
01688     *val = reg.fifo_ovr_ia;
01689 
01690     return ret;
01691 }
01692 
01693 /**
01694   * @brief  FIFO watermark status.[get]
01695   *
01696   * @param  ctx      read / write interface definitions
01697   * @param  val      change the values of fifo_wtm_ia in reg FIFO_STATUS2
01698   * @retval          interface status (MANDATORY: return 0 -> no Error)
01699   *
01700   */
01701 int32_t lps22hh_fifo_wtm_flag_get(lps22hh_ctx_t *ctx, uint8_t *val)
01702 {
01703     lps22hh_fifo_status2_t reg;
01704     int32_t ret;
01705 
01706     ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t *) &reg, 1);
01707     *val = reg.fifo_wtm_ia;
01708 
01709     return ret;
01710 }
01711 
01712 /**
01713   * @brief  FIFO overrun interrupt on INT_DRDY pin.[set]
01714   *
01715   * @param  lps22hh_ctx_t *ctx: read / write interface definitions
01716   * @param  uint8_t val: change the values of f_ovr in reg CTRL_REG3
01717   *
01718   */
01719 int32_t lps22hh_fifo_ovr_on_int_set(lps22hh_ctx_t *ctx, uint8_t val)
01720 {
01721     lps22hh_reg_t reg;
01722     int32_t ret;
01723 
01724     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
01725     reg.ctrl_reg3.int_f_ovr = val;
01726     ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
01727 
01728     return ret;
01729 }
01730 
01731 /**
01732   * @brief  FIFO overrun interrupt on INT_DRDY pin.[get]
01733   *
01734   * @param  lps22hh_ctx_t *ctx: read / write interface definitions
01735   * @param  uint8_t: change the values of f_ovr in reg CTRL_REG3
01736   *
01737   */
01738 int32_t lps22hh_fifo_ovr_on_int_get(lps22hh_ctx_t *ctx, uint8_t *val)
01739 {
01740     lps22hh_reg_t reg;
01741     int32_t ret;
01742 
01743     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
01744     *val = reg.ctrl_reg3.int_f_ovr;
01745 
01746     return ret;
01747 }
01748 
01749 /**
01750   * @brief  FIFO watermark status on INT_DRDY pin.[set]
01751   *
01752   * @param  lps22hh_ctx_t *ctx: read / write interface definitions
01753   * @param  uint8_t val: change the values of f_fth in reg CTRL_REG3
01754   *
01755   */
01756 int32_t lps22hh_fifo_threshold_on_int_set(lps22hh_ctx_t *ctx, uint8_t val)
01757 {
01758     lps22hh_reg_t reg;
01759     int32_t ret;
01760 
01761     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
01762     reg.ctrl_reg3.int_f_wtm = val;
01763     ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
01764 
01765     return ret;
01766 }
01767 
01768 /**
01769   * @brief  FIFO watermark status on INT_DRDY pin.[get]
01770   *
01771   * @param  lps22hb_ctx_t *ctx: read / write interface definitions
01772   * @param  uint8_t: change the values of f_fth in reg CTRL_REG3
01773   *
01774   */
01775 int32_t lps22hh_fifo_threshold_on_int_get(lps22hh_ctx_t *ctx, uint8_t *val)
01776 {
01777     lps22hh_reg_t reg;
01778     int32_t ret;
01779 
01780     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
01781     *val = reg.ctrl_reg3.int_f_wtm;
01782 
01783     return ret;
01784 }
01785 
01786 /**
01787   * @brief  FIFO full flag on INT_DRDY pin.[set]
01788   *
01789   * @param  lps22hh_ctx_t *ctx: read / write interface definitions
01790   * @param  uint8_t val: change the values of f_fss5 in reg CTRL_REG3
01791   *
01792   */
01793 int32_t lps22hh_fifo_full_on_int_set(lps22hh_ctx_t *ctx, uint8_t val)
01794 {
01795     lps22hh_reg_t reg;
01796     int32_t ret;
01797 
01798     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
01799     reg.ctrl_reg3.int_f_full = val;
01800     ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
01801 
01802     return ret;
01803 }
01804 
01805 /**
01806   * @brief  FIFO full flag on INT_DRDY pin.[get]
01807   *
01808   * @param  lps22hh_ctx_t *ctx: read / write interface definitions
01809   * @param  uint8_t: change the values of f_fss5 in reg CTRL_REG3
01810   *
01811   */
01812 int32_t lps22hh_fifo_full_on_int_get(lps22hh_ctx_t *ctx, uint8_t *val)
01813 {
01814     lps22hh_reg_t reg;
01815     int32_t ret;
01816 
01817     ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
01818     *val = reg.ctrl_reg3.int_f_full;
01819 
01820     return ret;
01821 }
01822 
01823 /**
01824   * @}
01825   *
01826   */
01827 
01828 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/