ST / IIS2DLPC

MEMS digital output motion sensor: high-performance ultra-low-power 3-axis accelerometer for industrial applications

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

IIS2DLPCSensor.h@0:13631b50eae6, 2018-11-19 (annotated)

Committer:
cparata
Date:
Mon Nov 19 13:14:04 2018 +0000
Revision:
0:13631b50eae6
First release of IIS2DLPC library

Who changed what in which revision?

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cparata 0:13631b50eae6 1 /**
cparata 0:13631b50eae6 2 ******************************************************************************
cparata 0:13631b50eae6 3 * @file IIS2DLPCSensor.h
cparata 0:13631b50eae6 4 * @author CLab
cparata 0:13631b50eae6 5 * @version V1.0.0
cparata 0:13631b50eae6 6 * @date 15 November 2018
cparata 0:13631b50eae6 7 * @brief Abstract Class of an IIS2DLPC Inertial Measurement Unit (IMU) 3 axes
cparata 0:13631b50eae6 8 * sensor.
cparata 0:13631b50eae6 9 ******************************************************************************
cparata 0:13631b50eae6 10 * @attention
cparata 0:13631b50eae6 11 *
cparata 0:13631b50eae6 12 * <h2><center>&copy; COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
cparata 0:13631b50eae6 13 *
cparata 0:13631b50eae6 14 * Redistribution and use in source and binary forms, with or without modification,
cparata 0:13631b50eae6 15 * are permitted provided that the following conditions are met:
cparata 0:13631b50eae6 16 * 1. Redistributions of source code must retain the above copyright notice,
cparata 0:13631b50eae6 17 * this list of conditions and the following disclaimer.
cparata 0:13631b50eae6 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
cparata 0:13631b50eae6 19 * this list of conditions and the following disclaimer in the documentation
cparata 0:13631b50eae6 20 * and/or other materials provided with the distribution.
cparata 0:13631b50eae6 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
cparata 0:13631b50eae6 22 * may be used to endorse or promote products derived from this software
cparata 0:13631b50eae6 23 * without specific prior written permission.
cparata 0:13631b50eae6 24 *
cparata 0:13631b50eae6 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
cparata 0:13631b50eae6 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
cparata 0:13631b50eae6 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
cparata 0:13631b50eae6 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
cparata 0:13631b50eae6 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
cparata 0:13631b50eae6 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
cparata 0:13631b50eae6 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
cparata 0:13631b50eae6 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
cparata 0:13631b50eae6 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
cparata 0:13631b50eae6 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
cparata 0:13631b50eae6 35 *
cparata 0:13631b50eae6 36 ******************************************************************************
cparata 0:13631b50eae6 37 */
cparata 0:13631b50eae6 38
cparata 0:13631b50eae6 39
cparata 0:13631b50eae6 40 /* Prevent recursive inclusion -----------------------------------------------*/
cparata 0:13631b50eae6 41
cparata 0:13631b50eae6 42 #ifndef __IIS2DLPCSensor_H__
cparata 0:13631b50eae6 43 #define __IIS2DLPCSensor_H__
cparata 0:13631b50eae6 44
cparata 0:13631b50eae6 45
cparata 0:13631b50eae6 46 /* Includes ------------------------------------------------------------------*/
cparata 0:13631b50eae6 47
cparata 0:13631b50eae6 48 #include "DevI2C.h"
cparata 0:13631b50eae6 49 #include "iis2dlpc_reg.h"
cparata 0:13631b50eae6 50 #include "MotionSensor.h"
cparata 0:13631b50eae6 51 #include <assert.h>
cparata 0:13631b50eae6 52
cparata 0:13631b50eae6 53 /* Defines -------------------------------------------------------------------*/
cparata 0:13631b50eae6 54
cparata 0:13631b50eae6 55 #define IIS2DLPC_ACC_SENSITIVITY_FOR_FS_2G_LOPOW1_MODE 0.976f /**< Sensitivity value for 2g full scale, Low-power1 mode [mg/LSB] */
cparata 0:13631b50eae6 56 #define IIS2DLPC_ACC_SENSITIVITY_FOR_FS_2G_OTHER_MODES 0.244f /**< Sensitivity value for 2g full scale, all other modes except Low-power1 [mg/LSB] */
cparata 0:13631b50eae6 57
cparata 0:13631b50eae6 58 #define IIS2DLPC_ACC_SENSITIVITY_FOR_FS_4G_LOPOW1_MODE 1.952f /**< Sensitivity value for 4g full scale, Low-power1 mode [mg/LSB] */
cparata 0:13631b50eae6 59 #define IIS2DLPC_ACC_SENSITIVITY_FOR_FS_4G_OTHER_MODES 0.488f /**< Sensitivity value for 4g full scale, all other modes except Low-power1 [mg/LSB] */
cparata 0:13631b50eae6 60
cparata 0:13631b50eae6 61 #define IIS2DLPC_ACC_SENSITIVITY_FOR_FS_8G_LOPOW1_MODE 3.904f /**< Sensitivity value for 8g full scale, Low-power1 mode [mg/LSB] */
cparata 0:13631b50eae6 62 #define IIS2DLPC_ACC_SENSITIVITY_FOR_FS_8G_OTHER_MODES 0.976f /**< Sensitivity value for 8g full scale, all other modes except Low-power1 [mg/LSB] */
cparata 0:13631b50eae6 63
cparata 0:13631b50eae6 64 #define IIS2DLPC_ACC_SENSITIVITY_FOR_FS_16G_LOPOW1_MODE 7.808f /**< Sensitivity value for 16g full scale, Low-power1 mode [mg/LSB] */
cparata 0:13631b50eae6 65 #define IIS2DLPC_ACC_SENSITIVITY_FOR_FS_16G_OTHER_MODES 1.952f /**< Sensitivity value for 16g full scale, all other modes except Low-power1 [mg/LSB] */
cparata 0:13631b50eae6 66
cparata 0:13631b50eae6 67 /* Typedefs ------------------------------------------------------------------*/
cparata 0:13631b50eae6 68
cparata 0:13631b50eae6 69 typedef struct
cparata 0:13631b50eae6 70 {
cparata 0:13631b50eae6 71 unsigned int WakeUpStatus : 1;
cparata 0:13631b50eae6 72 unsigned int D6DOrientationStatus : 1;
cparata 0:13631b50eae6 73 unsigned int SleepStatus : 1;
cparata 0:13631b50eae6 74 } IIS2DLPC_Event_Status_t;
cparata 0:13631b50eae6 75
cparata 0:13631b50eae6 76 typedef enum
cparata 0:13631b50eae6 77 {
cparata 0:13631b50eae6 78 IIS2DLPC_HIGH_PERFORMANCE_MODE,
cparata 0:13631b50eae6 79 IIS2DLPC_LOW_POWER_MODE4,
cparata 0:13631b50eae6 80 IIS2DLPC_LOW_POWER_MODE3,
cparata 0:13631b50eae6 81 IIS2DLPC_LOW_POWER_MODE2,
cparata 0:13631b50eae6 82 IIS2DLPC_LOW_POWER_MODE1
cparata 0:13631b50eae6 83 } IIS2DLPC_Operating_Mode_t;
cparata 0:13631b50eae6 84
cparata 0:13631b50eae6 85 typedef enum
cparata 0:13631b50eae6 86 {
cparata 0:13631b50eae6 87 IIS2DLPC_LOW_NOISE_DISABLE,
cparata 0:13631b50eae6 88 IIS2DLPC_LOW_NOISE_ENABLE
cparata 0:13631b50eae6 89 } IIS2DLPC_Low_Noise_t;
cparata 0:13631b50eae6 90
cparata 0:13631b50eae6 91 /* Class Declaration ---------------------------------------------------------*/
cparata 0:13631b50eae6 92
cparata 0:13631b50eae6 93 /**
cparata 0:13631b50eae6 94 * Abstract class of an IIS2DLPC Inertial Measurement Unit (IMU) 3 axes
cparata 0:13631b50eae6 95 * sensor.
cparata 0:13631b50eae6 96 */
cparata 0:13631b50eae6 97 class IIS2DLPCSensor : public MotionSensor
cparata 0:13631b50eae6 98 {
cparata 0:13631b50eae6 99 public:
cparata 0:13631b50eae6 100 enum SPI_type_t {SPI3W, SPI4W};
cparata 0:13631b50eae6 101 IIS2DLPCSensor(DevI2C *i2c, uint8_t address=IIS2DLPC_I2C_ADD_H, PinName int1_pin=NC, PinName int2_pin=NC);
cparata 0:13631b50eae6 102 IIS2DLPCSensor(SPI *spi, PinName cs_pin, PinName int1_pin=NC, PinName int2_pin=NC, SPI_type_t spi_type=SPI4W);
cparata 0:13631b50eae6 103 virtual int init(void *init);
cparata 0:13631b50eae6 104 virtual int read_id(uint8_t *id);
cparata 0:13631b50eae6 105 virtual int get_x_axes(int32_t *pData);
cparata 0:13631b50eae6 106 virtual int get_x_sensitivity(float *pfData);
cparata 0:13631b50eae6 107 virtual int get_x_axes_raw(int16_t *pData);
cparata 0:13631b50eae6 108 virtual int get_x_odr(float *odr);
cparata 0:13631b50eae6 109 virtual int set_x_odr(float odr);
cparata 0:13631b50eae6 110 virtual int get_x_fs(float *fullScale);
cparata 0:13631b50eae6 111 virtual int set_x_fs(float fullScale);
cparata 0:13631b50eae6 112 int set_x_odr_with_mode(float odr, IIS2DLPC_Operating_Mode_t mode=IIS2DLPC_HIGH_PERFORMANCE_MODE, IIS2DLPC_Low_Noise_t noise=IIS2DLPC_LOW_NOISE_DISABLE);
cparata 0:13631b50eae6 113 int enable_x(void);
cparata 0:13631b50eae6 114 int disable_x(void);
cparata 0:13631b50eae6 115 int enable_wake_up_detection(void);
cparata 0:13631b50eae6 116 int disable_wake_up_detection(void);
cparata 0:13631b50eae6 117 int set_wake_up_threshold(uint8_t thr);
cparata 0:13631b50eae6 118 int set_wake_up_duration(uint8_t dur);
cparata 0:13631b50eae6 119 int enable_inactivity_detection(void);
cparata 0:13631b50eae6 120 int disable_inactivity_detection(void);
cparata 0:13631b50eae6 121 int set_sleep_duration(uint8_t dur);
cparata 0:13631b50eae6 122 int enable_6d_orientation(void);
cparata 0:13631b50eae6 123 int disable_6d_orientation(void);
cparata 0:13631b50eae6 124 int set_6d_orientation_threshold(uint8_t thr);
cparata 0:13631b50eae6 125 int get_6d_orientation_xl(uint8_t *xl);
cparata 0:13631b50eae6 126 int get_6d_orientation_xh(uint8_t *xh);
cparata 0:13631b50eae6 127 int get_6d_orientation_yl(uint8_t *yl);
cparata 0:13631b50eae6 128 int get_6d_orientation_yh(uint8_t *yh);
cparata 0:13631b50eae6 129 int get_6d_orientation_zl(uint8_t *zl);
cparata 0:13631b50eae6 130 int get_6d_orientation_zh(uint8_t *zh);
cparata 0:13631b50eae6 131 int get_event_status(IIS2DLPC_Event_Status_t *status);
cparata 0:13631b50eae6 132 int get_fifo_num_samples(uint16_t *num_samples);
cparata 0:13631b50eae6 133 int set_fifo_mode(uint8_t mode);
cparata 0:13631b50eae6 134 int read_reg(uint8_t reg, uint8_t *data);
cparata 0:13631b50eae6 135 int write_reg(uint8_t reg, uint8_t data);
cparata 0:13631b50eae6 136
cparata 0:13631b50eae6 137 /**
cparata 0:13631b50eae6 138 * @brief Attaching an interrupt handler to the INT1 interrupt.
cparata 0:13631b50eae6 139 * @param fptr An interrupt handler.
cparata 0:13631b50eae6 140 * @retval None.
cparata 0:13631b50eae6 141 */
cparata 0:13631b50eae6 142 void attach_int1_irq(void (*fptr)(void))
cparata 0:13631b50eae6 143 {
cparata 0:13631b50eae6 144 _int1_irq.rise(fptr);
cparata 0:13631b50eae6 145 }
cparata 0:13631b50eae6 146
cparata 0:13631b50eae6 147 /**
cparata 0:13631b50eae6 148 * @brief Enabling the INT1 interrupt handling.
cparata 0:13631b50eae6 149 * @param None.
cparata 0:13631b50eae6 150 * @retval None.
cparata 0:13631b50eae6 151 */
cparata 0:13631b50eae6 152 void enable_int1_irq(void)
cparata 0:13631b50eae6 153 {
cparata 0:13631b50eae6 154 _int1_irq.enable_irq();
cparata 0:13631b50eae6 155 }
cparata 0:13631b50eae6 156
cparata 0:13631b50eae6 157 /**
cparata 0:13631b50eae6 158 * @brief Disabling the INT1 interrupt handling.
cparata 0:13631b50eae6 159 * @param None.
cparata 0:13631b50eae6 160 * @retval None.
cparata 0:13631b50eae6 161 */
cparata 0:13631b50eae6 162 void disable_int1_irq(void)
cparata 0:13631b50eae6 163 {
cparata 0:13631b50eae6 164 _int1_irq.disable_irq();
cparata 0:13631b50eae6 165 }
cparata 0:13631b50eae6 166
cparata 0:13631b50eae6 167 /**
cparata 0:13631b50eae6 168 * @brief Attaching an interrupt handler to the INT2 interrupt.
cparata 0:13631b50eae6 169 * @param fptr An interrupt handler.
cparata 0:13631b50eae6 170 * @retval None.
cparata 0:13631b50eae6 171 */
cparata 0:13631b50eae6 172 void attach_int2_irq(void (*fptr)(void))
cparata 0:13631b50eae6 173 {
cparata 0:13631b50eae6 174 _int2_irq.rise(fptr);
cparata 0:13631b50eae6 175 }
cparata 0:13631b50eae6 176
cparata 0:13631b50eae6 177 /**
cparata 0:13631b50eae6 178 * @brief Enabling the INT2 interrupt handling.
cparata 0:13631b50eae6 179 * @param None.
cparata 0:13631b50eae6 180 * @retval None.
cparata 0:13631b50eae6 181 */
cparata 0:13631b50eae6 182 void enable_int2_irq(void)
cparata 0:13631b50eae6 183 {
cparata 0:13631b50eae6 184 _int2_irq.enable_irq();
cparata 0:13631b50eae6 185 }
cparata 0:13631b50eae6 186
cparata 0:13631b50eae6 187 /**
cparata 0:13631b50eae6 188 * @brief Disabling the INT2 interrupt handling.
cparata 0:13631b50eae6 189 * @param None.
cparata 0:13631b50eae6 190 * @retval None.
cparata 0:13631b50eae6 191 */
cparata 0:13631b50eae6 192 void disable_int2_irq(void)
cparata 0:13631b50eae6 193 {
cparata 0:13631b50eae6 194 _int2_irq.disable_irq();
cparata 0:13631b50eae6 195 }
cparata 0:13631b50eae6 196
cparata 0:13631b50eae6 197 /**
cparata 0:13631b50eae6 198 * @brief Utility function to read data.
cparata 0:13631b50eae6 199 * @param pBuffer: pointer to data to be read.
cparata 0:13631b50eae6 200 * @param RegisterAddr: specifies internal address register to be read.
cparata 0:13631b50eae6 201 * @param NumByteToRead: number of bytes to be read.
cparata 0:13631b50eae6 202 * @retval 0 if ok, an error code otherwise.
cparata 0:13631b50eae6 203 */
cparata 0:13631b50eae6 204 uint8_t io_read(uint8_t* pBuffer, uint8_t RegisterAddr, uint16_t NumByteToRead)
cparata 0:13631b50eae6 205 {
cparata 0:13631b50eae6 206 if (_dev_spi) {
cparata 0:13631b50eae6 207 /* Write Reg Address */
cparata 0:13631b50eae6 208 _dev_spi->lock();
cparata 0:13631b50eae6 209 _cs_pin = 0;
cparata 0:13631b50eae6 210 if (_spi_type == SPI4W) {
cparata 0:13631b50eae6 211 _dev_spi->write(RegisterAddr | 0x80);
cparata 0:13631b50eae6 212 for (int i=0; i<NumByteToRead; i++) {
cparata 0:13631b50eae6 213 *(pBuffer+i) = _dev_spi->write(0x00);
cparata 0:13631b50eae6 214 }
cparata 0:13631b50eae6 215 } else if (_spi_type == SPI3W){
cparata 0:13631b50eae6 216 /* Write RD Reg Address with RD bit*/
cparata 0:13631b50eae6 217 uint8_t TxByte = RegisterAddr | 0x80;
cparata 0:13631b50eae6 218 _dev_spi->write((char *)&TxByte, 1, (char *)pBuffer, (int) NumByteToRead);
cparata 0:13631b50eae6 219 }
cparata 0:13631b50eae6 220 _cs_pin = 1;
cparata 0:13631b50eae6 221 _dev_spi->unlock();
cparata 0:13631b50eae6 222 return 0;
cparata 0:13631b50eae6 223 }
cparata 0:13631b50eae6 224 if (_dev_i2c) return (uint8_t) _dev_i2c->i2c_read(pBuffer, _address, RegisterAddr, NumByteToRead);
cparata 0:13631b50eae6 225 return 1;
cparata 0:13631b50eae6 226 }
cparata 0:13631b50eae6 227
cparata 0:13631b50eae6 228 /**
cparata 0:13631b50eae6 229 * @brief Utility function to write data.
cparata 0:13631b50eae6 230 * @param pBuffer: pointer to data to be written.
cparata 0:13631b50eae6 231 * @param RegisterAddr: specifies internal address register to be written.
cparata 0:13631b50eae6 232 * @param NumByteToWrite: number of bytes to write.
cparata 0:13631b50eae6 233 * @retval 0 if ok, an error code otherwise.
cparata 0:13631b50eae6 234 */
cparata 0:13631b50eae6 235 uint8_t io_write(uint8_t* pBuffer, uint8_t RegisterAddr, uint16_t NumByteToWrite)
cparata 0:13631b50eae6 236 {
cparata 0:13631b50eae6 237 if (_dev_spi) {
cparata 0:13631b50eae6 238 _dev_spi->lock();
cparata 0:13631b50eae6 239 _cs_pin = 0;
cparata 0:13631b50eae6 240 _dev_spi->write(RegisterAddr);
cparata 0:13631b50eae6 241 _dev_spi->write((char *)pBuffer, (int) NumByteToWrite, NULL, 0);
cparata 0:13631b50eae6 242 _cs_pin = 1;
cparata 0:13631b50eae6 243 _dev_spi->unlock();
cparata 0:13631b50eae6 244 return 0;
cparata 0:13631b50eae6 245 }
cparata 0:13631b50eae6 246 if (_dev_i2c) return (uint8_t) _dev_i2c->i2c_write(pBuffer, _address, RegisterAddr, NumByteToWrite);
cparata 0:13631b50eae6 247 return 1;
cparata 0:13631b50eae6 248 }
cparata 0:13631b50eae6 249
cparata 0:13631b50eae6 250 private:
cparata 0:13631b50eae6 251 int set_x_odr_when_enabled(float odr, IIS2DLPC_Operating_Mode_t mode, IIS2DLPC_Low_Noise_t noise);
cparata 0:13631b50eae6 252 int set_x_odr_when_disabled(float odr, IIS2DLPC_Operating_Mode_t mode, IIS2DLPC_Low_Noise_t noise);
cparata 0:13631b50eae6 253
cparata 0:13631b50eae6 254 /* Helper classes. */
cparata 0:13631b50eae6 255 DevI2C *_dev_i2c;
cparata 0:13631b50eae6 256 SPI *_dev_spi;
cparata 0:13631b50eae6 257
cparata 0:13631b50eae6 258 /* Configuration */
cparata 0:13631b50eae6 259 uint8_t _address;
cparata 0:13631b50eae6 260 DigitalOut _cs_pin;
cparata 0:13631b50eae6 261 InterruptIn _int1_irq;
cparata 0:13631b50eae6 262 InterruptIn _int2_irq;
cparata 0:13631b50eae6 263 SPI_type_t _spi_type;
cparata 0:13631b50eae6 264
cparata 0:13631b50eae6 265 uint8_t _x_is_enabled;
cparata 0:13631b50eae6 266 float _x_last_odr;
cparata 0:13631b50eae6 267 IIS2DLPC_Operating_Mode_t _x_last_operating_mode;
cparata 0:13631b50eae6 268 IIS2DLPC_Low_Noise_t _x_last_noise;
cparata 0:13631b50eae6 269
cparata 0:13631b50eae6 270 iis2dlpc_ctx_t _reg_ctx;
cparata 0:13631b50eae6 271 };
cparata 0:13631b50eae6 272
cparata 0:13631b50eae6 273 #ifdef __cplusplus
cparata 0:13631b50eae6 274 extern "C" {
cparata 0:13631b50eae6 275 #endif
cparata 0:13631b50eae6 276 int32_t IIS2DLPC_io_write( void *handle, uint8_t WriteAddr, uint8_t *pBuffer, uint16_t nBytesToWrite );
cparata 0:13631b50eae6 277 int32_t IIS2DLPC_io_read( void *handle, uint8_t ReadAddr, uint8_t *pBuffer, uint16_t nBytesToRead );
cparata 0:13631b50eae6 278 #ifdef __cplusplus
cparata 0:13631b50eae6 279 }
cparata 0:13631b50eae6 280 #endif
cparata 0:13631b50eae6 281
cparata 0:13631b50eae6 282 #endif