ST / Mbed 2 deprecated DISCO_F413ZH-PSRAM-demo

PSRAM example.

Dependencies:   BSP_DISCO_F413ZH mbed

main.cpp@0:e86d70f1f2ce, 2017-05-23 (annotated)

Committer:
arostm
Date:
Tue May 23 10:50:50 2017 +0200
Revision:
0:e86d70f1f2ce
Child:
1:61482ef96890
Main.cpp creation for the psram example of the DISCO_F413ZH

Who changed what in which revision?

UserRevisionLine numberNew contents of line
arostm 0:e86d70f1f2ce 1 #include "mbed.h"
arostm 0:e86d70f1f2ce 2 #include "stm32f413h_discovery.h"
arostm 0:e86d70f1f2ce 3 #include "stm32f413h_discovery_lcd.h"
arostm 0:e86d70f1f2ce 4 #include "stm32f413h_discovery_psram.h"
arostm 0:e86d70f1f2ce 5
arostm 0:e86d70f1f2ce 6 /** @addtogroup STM32F7xx_HAL_Examples
arostm 0:e86d70f1f2ce 7 * @{
arostm 0:e86d70f1f2ce 8 */
arostm 0:e86d70f1f2ce 9
arostm 0:e86d70f1f2ce 10 /** @addtogroup BSP
arostm 0:e86d70f1f2ce 11 * @{
arostm 0:e86d70f1f2ce 12 */
arostm 0:e86d70f1f2ce 13
arostm 0:e86d70f1f2ce 14 /* Private typedef -----------------------------------------------------------*/
arostm 0:e86d70f1f2ce 15 /* Private define ------------------------------------------------------------*/
arostm 0:e86d70f1f2ce 16 #define BUFFER_SIZE ((uint32_t)0x1000)
arostm 0:e86d70f1f2ce 17 #define PSRAM_WRITE_READ_ADDR ((uint32_t)0x0800)
arostm 0:e86d70f1f2ce 18 /* Private macro -------------------------------------------------------------*/
arostm 0:e86d70f1f2ce 19 /* Private variables ---------------------------------------------------------*/
arostm 0:e86d70f1f2ce 20 uint16_t sram_aTxBuffer[BUFFER_SIZE];
arostm 0:e86d70f1f2ce 21 uint16_t sram_aRxBuffer[BUFFER_SIZE];
arostm 0:e86d70f1f2ce 22 uint8_t ubSramWrite = 0, ubSramRead = 0, ubSramInit = 0, ubCompare = 0;
arostm 0:e86d70f1f2ce 23 __IO uint8_t write_complete = 0;
arostm 0:e86d70f1f2ce 24 /* Private function prototypes -----------------------------------------------*/
arostm 0:e86d70f1f2ce 25 static void PSRAM_SetHint(void);
arostm 0:e86d70f1f2ce 26 static void Fill_Buffer(uint16_t *pBuffer, uint32_t uwBufferLength, uint32_t uwOffset);
arostm 0:e86d70f1f2ce 27 static uint8_t Buffercmp(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength);
arostm 0:e86d70f1f2ce 28 static uint8_t CheckForUserInput(void);
arostm 0:e86d70f1f2ce 29 /* Private functions ---------------------------------------------------------*/
arostm 0:e86d70f1f2ce 30
arostm 0:e86d70f1f2ce 31 /**
arostm 0:e86d70f1f2ce 32 * @brief PSRAM Demo
arostm 0:e86d70f1f2ce 33 * @param None
arostm 0:e86d70f1f2ce 34 * @retval None
arostm 0:e86d70f1f2ce 35 */
arostm 0:e86d70f1f2ce 36 int main()
arostm 0:e86d70f1f2ce 37 {
arostm 0:e86d70f1f2ce 38 BSP_LCD_Init();
arostm 0:e86d70f1f2ce 39
arostm 0:e86d70f1f2ce 40 PSRAM_SetHint();
arostm 0:e86d70f1f2ce 41
arostm 0:e86d70f1f2ce 42 /* Disable the LCD to avoid the refrech from the SDRAM */
arostm 0:e86d70f1f2ce 43 BSP_LCD_DisplayOff();
arostm 0:e86d70f1f2ce 44
arostm 0:e86d70f1f2ce 45 /*##-1- Configure the PSRAM device ##########################################*/
arostm 0:e86d70f1f2ce 46 /* PSRAM device configuration */
arostm 0:e86d70f1f2ce 47 if(BSP_PSRAM_Init() != PSRAM_OK)
arostm 0:e86d70f1f2ce 48 {
arostm 0:e86d70f1f2ce 49 ubSramInit++;
arostm 0:e86d70f1f2ce 50 }
arostm 0:e86d70f1f2ce 51
arostm 0:e86d70f1f2ce 52 /*##-2- PSRAM memory read/write access ######################################*/
arostm 0:e86d70f1f2ce 53 /* Fill the buffer to write */
arostm 0:e86d70f1f2ce 54 Fill_Buffer(sram_aTxBuffer, BUFFER_SIZE, 0xC20F);
arostm 0:e86d70f1f2ce 55
arostm 0:e86d70f1f2ce 56 /* Write data to the PSRAM memory */
arostm 0:e86d70f1f2ce 57 if(BSP_PSRAM_WriteData(PSRAM_DEVICE_ADDR + PSRAM_WRITE_READ_ADDR, sram_aTxBuffer, BUFFER_SIZE) != PSRAM_OK)
arostm 0:e86d70f1f2ce 58 {
arostm 0:e86d70f1f2ce 59 ubSramWrite++;
arostm 0:e86d70f1f2ce 60 }
arostm 0:e86d70f1f2ce 61
arostm 0:e86d70f1f2ce 62 /* Read back data from the PSRAM memory */
arostm 0:e86d70f1f2ce 63 if(BSP_PSRAM_ReadData(PSRAM_DEVICE_ADDR + PSRAM_WRITE_READ_ADDR, sram_aRxBuffer, BUFFER_SIZE) != PSRAM_OK)
arostm 0:e86d70f1f2ce 64 {
arostm 0:e86d70f1f2ce 65 ubSramRead++;
arostm 0:e86d70f1f2ce 66 }
arostm 0:e86d70f1f2ce 67
arostm 0:e86d70f1f2ce 68 /*##-3- Checking data integrity ############################################*/
arostm 0:e86d70f1f2ce 69 /* Enable the LCD */
arostm 0:e86d70f1f2ce 70 BSP_LCD_DisplayOn();
arostm 0:e86d70f1f2ce 71
arostm 0:e86d70f1f2ce 72 if(ubSramInit != 0)
arostm 0:e86d70f1f2ce 73 {
arostm 0:e86d70f1f2ce 74 BSP_LCD_DisplayStringAt(20, 100, (uint8_t *)"PSRAM Initialization : FAILED.", LEFT_MODE);
arostm 0:e86d70f1f2ce 75 BSP_LCD_DisplayStringAt(20, 115, (uint8_t *)"PSRAM Test Aborted.", LEFT_MODE);
arostm 0:e86d70f1f2ce 76 ubSramInit = 0xFF;
arostm 0:e86d70f1f2ce 77 }
arostm 0:e86d70f1f2ce 78 else
arostm 0:e86d70f1f2ce 79 {
arostm 0:e86d70f1f2ce 80 BSP_LCD_DisplayStringAt(20, 100, (uint8_t *)"PSRAM Initialization : OK.", LEFT_MODE);
arostm 0:e86d70f1f2ce 81 ubSramInit = 0;
arostm 0:e86d70f1f2ce 82 }
arostm 0:e86d70f1f2ce 83 if(ubSramWrite != 0)
arostm 0:e86d70f1f2ce 84 {
arostm 0:e86d70f1f2ce 85 BSP_LCD_DisplayStringAt(20, 115, (uint8_t *)"PSRAM WRITE : FAILED.", LEFT_MODE);
arostm 0:e86d70f1f2ce 86 BSP_LCD_DisplayStringAt(20, 130, (uint8_t *)"PSRAM Test Aborted.", LEFT_MODE);
arostm 0:e86d70f1f2ce 87 ubSramWrite = 0xFF;
arostm 0:e86d70f1f2ce 88 }
arostm 0:e86d70f1f2ce 89 else
arostm 0:e86d70f1f2ce 90 {
arostm 0:e86d70f1f2ce 91 BSP_LCD_DisplayStringAt(20, 115, (uint8_t *)"PSRAM WRITE : OK.", LEFT_MODE);
arostm 0:e86d70f1f2ce 92 ubSramWrite = 0;
arostm 0:e86d70f1f2ce 93 }
arostm 0:e86d70f1f2ce 94 if(ubSramRead != 0)
arostm 0:e86d70f1f2ce 95 {
arostm 0:e86d70f1f2ce 96 BSP_LCD_DisplayStringAt(20, 130, (uint8_t *)"PSRAM READ : FAILED.", LEFT_MODE);
arostm 0:e86d70f1f2ce 97 BSP_LCD_DisplayStringAt(20, 145, (uint8_t *)"PSRAM Test Aborted.", LEFT_MODE);
arostm 0:e86d70f1f2ce 98 ubSramRead = 0xFF;
arostm 0:e86d70f1f2ce 99 }
arostm 0:e86d70f1f2ce 100 else
arostm 0:e86d70f1f2ce 101 {
arostm 0:e86d70f1f2ce 102 BSP_LCD_DisplayStringAt(20, 130, (uint8_t *)"PSRAM READ : OK.", LEFT_MODE);
arostm 0:e86d70f1f2ce 103 ubSramRead = 0;
arostm 0:e86d70f1f2ce 104 }
arostm 0:e86d70f1f2ce 105
arostm 0:e86d70f1f2ce 106 if(Buffercmp(sram_aRxBuffer, sram_aTxBuffer, BUFFER_SIZE) > 0)
arostm 0:e86d70f1f2ce 107 {
arostm 0:e86d70f1f2ce 108 BSP_LCD_DisplayStringAt(20, 145, (uint8_t *)"PSRAM COMPARE : FAILED.", LEFT_MODE);
arostm 0:e86d70f1f2ce 109 BSP_LCD_DisplayStringAt(20, 160, (uint8_t *)"PSRAM Test Aborted.", LEFT_MODE);
arostm 0:e86d70f1f2ce 110 ubCompare ++;
arostm 0:e86d70f1f2ce 111 }
arostm 0:e86d70f1f2ce 112 else
arostm 0:e86d70f1f2ce 113 {
arostm 0:e86d70f1f2ce 114 BSP_LCD_DisplayStringAt(20, 145, (uint8_t *)"PSRAM Test : OK.", LEFT_MODE);
arostm 0:e86d70f1f2ce 115 ubCompare =0;
arostm 0:e86d70f1f2ce 116 }
arostm 0:e86d70f1f2ce 117
arostm 0:e86d70f1f2ce 118 while (1)
arostm 0:e86d70f1f2ce 119 {
arostm 0:e86d70f1f2ce 120 if(CheckForUserInput() > 0)
arostm 0:e86d70f1f2ce 121 {
arostm 0:e86d70f1f2ce 122 return 0;
arostm 0:e86d70f1f2ce 123 }
arostm 0:e86d70f1f2ce 124 }
arostm 0:e86d70f1f2ce 125 }
arostm 0:e86d70f1f2ce 126
arostm 0:e86d70f1f2ce 127 /**
arostm 0:e86d70f1f2ce 128 * @brief PSRAM Demo
arostm 0:e86d70f1f2ce 129 * @param None
arostm 0:e86d70f1f2ce 130 * @retval None
arostm 0:e86d70f1f2ce 131 */
arostm 0:e86d70f1f2ce 132 void PSRAM_DMA_demo (void)
arostm 0:e86d70f1f2ce 133 {
arostm 0:e86d70f1f2ce 134 PSRAM_SetHint();
arostm 0:e86d70f1f2ce 135
arostm 0:e86d70f1f2ce 136 /* Disable the LCD to avoid the refrech from the PSRAM */
arostm 0:e86d70f1f2ce 137 BSP_LCD_DisplayOff();
arostm 0:e86d70f1f2ce 138
arostm 0:e86d70f1f2ce 139 /*##-1- Configure the PSRAM device ##########################################*/
arostm 0:e86d70f1f2ce 140 /* PSRAM device configuration */
arostm 0:e86d70f1f2ce 141 if(BSP_PSRAM_Init() != PSRAM_OK)
arostm 0:e86d70f1f2ce 142 {
arostm 0:e86d70f1f2ce 143 ubSramInit++;
arostm 0:e86d70f1f2ce 144 }
arostm 0:e86d70f1f2ce 145
arostm 0:e86d70f1f2ce 146 /*##-2- PSRAM memory read/write access ######################################*/
arostm 0:e86d70f1f2ce 147 /* Fill the buffer to write */
arostm 0:e86d70f1f2ce 148 Fill_Buffer(sram_aTxBuffer, BUFFER_SIZE, 0xC20F);
arostm 0:e86d70f1f2ce 149
arostm 0:e86d70f1f2ce 150 /* Write data to the PSRAM memory */
arostm 0:e86d70f1f2ce 151 if(BSP_PSRAM_WriteData_DMA(PSRAM_DEVICE_ADDR + PSRAM_WRITE_READ_ADDR, sram_aTxBuffer, BUFFER_SIZE) != PSRAM_OK)
arostm 0:e86d70f1f2ce 152 {
arostm 0:e86d70f1f2ce 153 ubSramWrite++;
arostm 0:e86d70f1f2ce 154 }
arostm 0:e86d70f1f2ce 155
arostm 0:e86d70f1f2ce 156
arostm 0:e86d70f1f2ce 157 /* Wait for Transfer complete */
arostm 0:e86d70f1f2ce 158 while(write_complete == 0);
arostm 0:e86d70f1f2ce 159
arostm 0:e86d70f1f2ce 160 /* Read back data from the PSRAM memory */
arostm 0:e86d70f1f2ce 161 if(BSP_PSRAM_ReadData_DMA(PSRAM_DEVICE_ADDR + PSRAM_WRITE_READ_ADDR, sram_aRxBuffer, BUFFER_SIZE) != PSRAM_OK)
arostm 0:e86d70f1f2ce 162 {
arostm 0:e86d70f1f2ce 163 ubSramRead++;
arostm 0:e86d70f1f2ce 164 }
arostm 0:e86d70f1f2ce 165
arostm 0:e86d70f1f2ce 166 /*##-3- Checking data integrity ############################################*/
arostm 0:e86d70f1f2ce 167 /* Enable the LCD */
arostm 0:e86d70f1f2ce 168 BSP_LCD_DisplayOn();
arostm 0:e86d70f1f2ce 169
arostm 0:e86d70f1f2ce 170 if(ubSramInit != 0)
arostm 0:e86d70f1f2ce 171 {
arostm 0:e86d70f1f2ce 172 BSP_LCD_DisplayStringAt(20, 100, (uint8_t *)"PSRAM Initialization : FAILED.", LEFT_MODE);
arostm 0:e86d70f1f2ce 173 BSP_LCD_DisplayStringAt(20, 115, (uint8_t *)"PSRAM Test Aborted.", LEFT_MODE);
arostm 0:e86d70f1f2ce 174 }
arostm 0:e86d70f1f2ce 175 else
arostm 0:e86d70f1f2ce 176 {
arostm 0:e86d70f1f2ce 177 BSP_LCD_DisplayStringAt(20, 100, (uint8_t *)"PSRAM Initialization : OK.", LEFT_MODE);
arostm 0:e86d70f1f2ce 178 }
arostm 0:e86d70f1f2ce 179 if(ubSramWrite != 0)
arostm 0:e86d70f1f2ce 180 {
arostm 0:e86d70f1f2ce 181 BSP_LCD_DisplayStringAt(20, 115, (uint8_t *)"PSRAM WRITE : FAILED.", LEFT_MODE);
arostm 0:e86d70f1f2ce 182 BSP_LCD_DisplayStringAt(20, 130, (uint8_t *)"PSRAM Test Aborted.", LEFT_MODE);
arostm 0:e86d70f1f2ce 183 }
arostm 0:e86d70f1f2ce 184 else
arostm 0:e86d70f1f2ce 185 {
arostm 0:e86d70f1f2ce 186 BSP_LCD_DisplayStringAt(20, 115, (uint8_t *)"PSRAM WRITE : OK.", LEFT_MODE);
arostm 0:e86d70f1f2ce 187 }
arostm 0:e86d70f1f2ce 188 if(ubSramRead != 0)
arostm 0:e86d70f1f2ce 189 {
arostm 0:e86d70f1f2ce 190 BSP_LCD_DisplayStringAt(20, 130, (uint8_t *)"PSRAM READ : FAILED.", LEFT_MODE);
arostm 0:e86d70f1f2ce 191 BSP_LCD_DisplayStringAt(20, 145, (uint8_t *)"PSRAM Test Aborted.", LEFT_MODE);
arostm 0:e86d70f1f2ce 192 }
arostm 0:e86d70f1f2ce 193 else
arostm 0:e86d70f1f2ce 194 {
arostm 0:e86d70f1f2ce 195 BSP_LCD_DisplayStringAt(20, 130, (uint8_t *)"PSRAM READ : OK.", LEFT_MODE);
arostm 0:e86d70f1f2ce 196 }
arostm 0:e86d70f1f2ce 197
arostm 0:e86d70f1f2ce 198 if(Buffercmp(sram_aRxBuffer, sram_aTxBuffer, BUFFER_SIZE) > 0)
arostm 0:e86d70f1f2ce 199 {
arostm 0:e86d70f1f2ce 200 BSP_LCD_DisplayStringAt(20, 145, (uint8_t *)"PSRAM COMPARE : FAILED.", LEFT_MODE);
arostm 0:e86d70f1f2ce 201 BSP_LCD_DisplayStringAt(20, 160, (uint8_t *)"PSRAM Test Aborted.", LEFT_MODE);
arostm 0:e86d70f1f2ce 202 }
arostm 0:e86d70f1f2ce 203 else
arostm 0:e86d70f1f2ce 204 {
arostm 0:e86d70f1f2ce 205 BSP_LCD_DisplayStringAt(20, 145, (uint8_t *)"PSRAM Test : OK.", LEFT_MODE);
arostm 0:e86d70f1f2ce 206 }
arostm 0:e86d70f1f2ce 207
arostm 0:e86d70f1f2ce 208 while (1)
arostm 0:e86d70f1f2ce 209 {
arostm 0:e86d70f1f2ce 210 if(CheckForUserInput() > 0)
arostm 0:e86d70f1f2ce 211 {
arostm 0:e86d70f1f2ce 212 return;
arostm 0:e86d70f1f2ce 213 }
arostm 0:e86d70f1f2ce 214 }
arostm 0:e86d70f1f2ce 215 }
arostm 0:e86d70f1f2ce 216
arostm 0:e86d70f1f2ce 217 /**
arostm 0:e86d70f1f2ce 218 * @brief Display PSRAM Demo Hint
arostm 0:e86d70f1f2ce 219 * @param None
arostm 0:e86d70f1f2ce 220 * @retval None
arostm 0:e86d70f1f2ce 221 */
arostm 0:e86d70f1f2ce 222 static void PSRAM_SetHint(void)
arostm 0:e86d70f1f2ce 223 {
arostm 0:e86d70f1f2ce 224 /* Clear the LCD */
arostm 0:e86d70f1f2ce 225 BSP_LCD_Clear(LCD_COLOR_WHITE);
arostm 0:e86d70f1f2ce 226
arostm 0:e86d70f1f2ce 227 /* Set LCD Demo description */
arostm 0:e86d70f1f2ce 228 BSP_LCD_SetTextColor(LCD_COLOR_GREEN);
arostm 0:e86d70f1f2ce 229 BSP_LCD_FillRect(0, 0, BSP_LCD_GetXSize(), 80);
arostm 0:e86d70f1f2ce 230 BSP_LCD_SetTextColor(LCD_COLOR_BLACK);
arostm 0:e86d70f1f2ce 231 BSP_LCD_SetBackColor(LCD_COLOR_GREEN);
arostm 0:e86d70f1f2ce 232 BSP_LCD_SetFont(&Font24);
arostm 0:e86d70f1f2ce 233 BSP_LCD_DisplayStringAt(0, 0, (uint8_t *)"PSRAM", CENTER_MODE);
arostm 0:e86d70f1f2ce 234 BSP_LCD_SetFont(&Font12);
arostm 0:e86d70f1f2ce 235 BSP_LCD_DisplayStringAt(0, 30, (uint8_t *)"This example shows how to write", CENTER_MODE);
arostm 0:e86d70f1f2ce 236 BSP_LCD_DisplayStringAt(0, 45, (uint8_t *)"and read data on the PSRAM", CENTER_MODE);
arostm 0:e86d70f1f2ce 237
arostm 0:e86d70f1f2ce 238 /* Set the LCD Text Color */
arostm 0:e86d70f1f2ce 239 BSP_LCD_SetTextColor(LCD_COLOR_GREEN);
arostm 0:e86d70f1f2ce 240 BSP_LCD_DrawRect(10, 90, BSP_LCD_GetXSize() - 20, BSP_LCD_GetYSize()- 100);
arostm 0:e86d70f1f2ce 241 BSP_LCD_DrawRect(11, 91, BSP_LCD_GetXSize() - 22, BSP_LCD_GetYSize()- 102);
arostm 0:e86d70f1f2ce 242
arostm 0:e86d70f1f2ce 243 BSP_LCD_SetTextColor(LCD_COLOR_BLACK);
arostm 0:e86d70f1f2ce 244 BSP_LCD_SetBackColor(LCD_COLOR_WHITE);
arostm 0:e86d70f1f2ce 245 }
arostm 0:e86d70f1f2ce 246
arostm 0:e86d70f1f2ce 247 /**
arostm 0:e86d70f1f2ce 248 * @brief Fills buffer with user predefined data.
arostm 0:e86d70f1f2ce 249 * @param pBuffer: pointer on the buffer to fill
arostm 0:e86d70f1f2ce 250 * @param uwBufferLength: size of the buffer to fill
arostm 0:e86d70f1f2ce 251 * @param uwOffset: first value to fill on the buffer
arostm 0:e86d70f1f2ce 252 * @retval None
arostm 0:e86d70f1f2ce 253 */
arostm 0:e86d70f1f2ce 254 static void Fill_Buffer(uint16_t *pBuffer, uint32_t uwBufferLength, uint32_t uwOffset)
arostm 0:e86d70f1f2ce 255 {
arostm 0:e86d70f1f2ce 256 uint32_t tmpindex = 0;
arostm 0:e86d70f1f2ce 257
arostm 0:e86d70f1f2ce 258 /* Put in global buffer different values */
arostm 0:e86d70f1f2ce 259 for (tmpindex = 0; tmpindex < uwBufferLength; tmpindex++ )
arostm 0:e86d70f1f2ce 260 {
arostm 0:e86d70f1f2ce 261 pBuffer[tmpindex] = tmpindex + uwOffset;
arostm 0:e86d70f1f2ce 262 }
arostm 0:e86d70f1f2ce 263 }
arostm 0:e86d70f1f2ce 264
arostm 0:e86d70f1f2ce 265 /**
arostm 0:e86d70f1f2ce 266 * @brief Compares two buffers.
arostm 0:e86d70f1f2ce 267 * @param pBuffer1, pBuffer2: buffers to be compared.
arostm 0:e86d70f1f2ce 268 * @param BufferLength: buffer's length
arostm 0:e86d70f1f2ce 269 * @retval 1: pBuffer identical to pBuffer1
arostm 0:e86d70f1f2ce 270 * 0: pBuffer differs from pBuffer1
arostm 0:e86d70f1f2ce 271 */
arostm 0:e86d70f1f2ce 272 static uint8_t Buffercmp(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength)
arostm 0:e86d70f1f2ce 273 {
arostm 0:e86d70f1f2ce 274 while (BufferLength--)
arostm 0:e86d70f1f2ce 275 {
arostm 0:e86d70f1f2ce 276 if (*pBuffer1 != *pBuffer2)
arostm 0:e86d70f1f2ce 277 {
arostm 0:e86d70f1f2ce 278 return 1;
arostm 0:e86d70f1f2ce 279 }
arostm 0:e86d70f1f2ce 280
arostm 0:e86d70f1f2ce 281 pBuffer1++;
arostm 0:e86d70f1f2ce 282 pBuffer2++;
arostm 0:e86d70f1f2ce 283 }
arostm 0:e86d70f1f2ce 284
arostm 0:e86d70f1f2ce 285 return 0;
arostm 0:e86d70f1f2ce 286 }
arostm 0:e86d70f1f2ce 287
arostm 0:e86d70f1f2ce 288 /**
arostm 0:e86d70f1f2ce 289 * @brief DMA transfer complete callback.
arostm 0:e86d70f1f2ce 290 * @param hdma: pointer to a SRAM_HandleTypeDef structure that contains
arostm 0:e86d70f1f2ce 291 * the configuration information for SRAM module.
arostm 0:e86d70f1f2ce 292 * @retval None
arostm 0:e86d70f1f2ce 293 */
arostm 0:e86d70f1f2ce 294 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
arostm 0:e86d70f1f2ce 295 {
arostm 0:e86d70f1f2ce 296 write_complete = 1;
arostm 0:e86d70f1f2ce 297 }
arostm 0:e86d70f1f2ce 298
arostm 0:e86d70f1f2ce 299 uint8_t CheckForUserInput(void)
arostm 0:e86d70f1f2ce 300 {
arostm 0:e86d70f1f2ce 301 if(BSP_PB_GetState(BUTTON_WAKEUP) != GPIO_PIN_RESET)
arostm 0:e86d70f1f2ce 302 {
arostm 0:e86d70f1f2ce 303 while (BSP_PB_GetState(BUTTON_WAKEUP) != GPIO_PIN_RESET);
arostm 0:e86d70f1f2ce 304 return 1 ;
arostm 0:e86d70f1f2ce 305 }
arostm 0:e86d70f1f2ce 306 return 0;
arostm 0:e86d70f1f2ce 307 }
arostm 0:e86d70f1f2ce 308 /**
arostm 0:e86d70f1f2ce 309 * @}
arostm 0:e86d70f1f2ce 310 */
arostm 0:e86d70f1f2ce 311
arostm 0:e86d70f1f2ce 312 /**
arostm 0:e86d70f1f2ce 313 * @}
arostm 0:e86d70f1f2ce 314 */
arostm 0:e86d70f1f2ce 315 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/