stm32l4r9i_discovery_psram.c

00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4r9i_discovery_psram.c
00004   * @author  MCD Application Team
00005   * @brief   This file includes the PSRAM driver for the IS61WV51216BLL-10MLI memory
00006   *          device mounted on STM32L4R9I_DISCOVERY boards.
00007   @verbatim
00008   How To use this driver:
00009   -----------------------
00010    - This driver is used to drive the IS66WVC2M16ECLL-7010BLI external memory mounted
00011      on STM32L4R9I discovery board.
00012    - This driver does not need a specific component driver for the PSRAM device
00013      to be included with.
00014 
00015   Driver description:
00016   ------------------
00017   + Initialization steps:
00018      o Initialize the PSRAM external memory using the BSP_PSRAM_Init() function. This
00019        function includes the MSP layer hardware resources initialization and the
00020        FMC controller configuration to interface with the external PSRAM memory.
00021 
00022   + PSRAM read/write operations
00023      o PSRAM external memory can be accessed with read/write operations once it is
00024        initialized.
00025        Read/write operation can be performed with AHB access using the functions
00026        BSP_PSRAM_ReadData()/BSP_PSRAM_WriteData(), or by DMA transfer using the functions
00027        BSP_PSRAM_ReadData_DMA()/BSP_PSRAM_WriteData_DMA().
00028      o The AHB access is performed with 16-bit width transaction, the DMA transfer
00029        configuration is fixed at single (no burst) halfword transfer.
00030      o User can implement his own functions for read/write access with his desired
00031        configurations.
00032      o If interrupt mode is used for DMA transfer, the function BSP_PSRAM_DMA_IRQHandler()
00033        is called in IRQ handler file, to serve the generated interrupt once the DMA
00034        transfer is complete.
00035   @endverbatim
00036   ******************************************************************************
00037   * @attention
00038   *
00039   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
00040   * All rights reserved.</center></h2>
00041   *
00042   * This software component is licensed by ST under BSD 3-Clause license,
00043   * the "License"; You may not use this file except in compliance with the
00044   * License. You may obtain a copy of the License at:
00045   *                        opensource.org/licenses/BSD-3-Clause
00046   *
00047   ******************************************************************************
00048   */
00049 
00050 /* Includes ------------------------------------------------------------------*/
00051 #include "stm32l4r9i_discovery_psram.h"
00052 #include "stm32l4r9i_discovery_io.h"
00053 
00054 /** @addtogroup BSP
00055   * @{
00056   */
00057 
00058 /** @addtogroup STM32L4R9I_DISCOVERY
00059   * @{
00060   */
00061 
00062 /** @defgroup STM32L4R9I_DISCOVERY_PSRAM STM32L4R9I_DISCOVERY PSRAM
00063   * @{
00064   */
00065 
00066 /** @defgroup STM32L4R9I_DISCOVERY_PSRAM_Private_Variables Exported Variables
00067   * @{
00068   */
00069 SRAM_HandleTypeDef psramHandle = {0};
00070 
00071 /* LCD/PSRAM initialization status sharing the same power source */
00072 extern uint32_t bsp_lcd_initialized;
00073 extern uint32_t bsp_psram_initialized;
00074 
00075 /**
00076   * @}
00077   */
00078 
00079 /** @defgroup STM32L4R9I_DISCOVERY_PSRAM_Private_Function_Prototypes Private Function Prototypes
00080   * @{
00081   */
00082 static void PSRAM_PowerOn(void);
00083 static void PSRAM_PowerOff(void);
00084 /**
00085   * @}
00086   */
00087 
00088 /** @defgroup STM32L4R9I_DISCOVERY_PSRAM_Private_Functions Private Functions
00089   * @{
00090   */
00091 
00092 /**
00093   * @brief  Initializes the PSRAM device.
00094   * @retval PSRAM status
00095   */
00096 uint8_t BSP_PSRAM_Init(void)
00097 {
00098   static uint8_t psram_status = PSRAM_OK;
00099 
00100   if (bsp_psram_initialized == 0)
00101   {
00102     static FMC_NORSRAM_TimingTypeDef Timing;
00103 
00104     /* Power on PSRAM */
00105     PSRAM_PowerOn();
00106 
00107     /* PSRAM device configuration */
00108     /* Timing configuration derived from system clock (up to 120Mhz)
00109     for 60Mhz as PSRAM clock frequency */
00110     Timing.AddressSetupTime      = 4;
00111     Timing.AddressHoldTime       = 2;
00112     Timing.DataSetupTime         = 6;
00113     Timing.BusTurnAroundDuration = 1;
00114     Timing.CLKDivision           = 2;
00115     Timing.DataLatency           = 2;
00116     Timing.AccessMode        = FMC_ACCESS_MODE_A;
00117 
00118     psramHandle.Init.NSBank             = FMC_NORSRAM_BANK1;
00119     psramHandle.Init.DataAddressMux     = FMC_DATA_ADDRESS_MUX_DISABLE;
00120     psramHandle.Init.MemoryType         = FMC_MEMORY_TYPE_PSRAM;
00121     psramHandle.Init.MemoryDataWidth    = FMC_NORSRAM_MEM_BUS_WIDTH_16;
00122     psramHandle.Init.BurstAccessMode    = FMC_BURST_ACCESS_MODE_DISABLE;
00123     psramHandle.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_HIGH;
00124     psramHandle.Init.WaitSignalActive   = FMC_WAIT_TIMING_BEFORE_WS;
00125     psramHandle.Init.WriteOperation     = FMC_WRITE_OPERATION_ENABLE;
00126     psramHandle.Init.WaitSignal         = FMC_WAIT_SIGNAL_DISABLE;
00127     psramHandle.Init.ExtendedMode       = FMC_EXTENDED_MODE_DISABLE;
00128     psramHandle.Init.AsynchronousWait   = FMC_ASYNCHRONOUS_WAIT_DISABLE;
00129     psramHandle.Init.WriteBurst         = FMC_WRITE_BURST_DISABLE;
00130     psramHandle.Init.ContinuousClock    = FMC_CONTINUOUS_CLOCK_SYNC_ASYNC;
00131     psramHandle.Init.WriteFifo          = FMC_WRITE_FIFO_DISABLE;
00132     psramHandle.Init.NBLSetupTime       = 0;
00133     psramHandle.Init.PageSize           = FMC_PAGE_SIZE_NONE;
00134 
00135     psramHandle.Instance  = FMC_NORSRAM_DEVICE;
00136     psramHandle.Extended  = FMC_NORSRAM_EXTENDED_DEVICE;
00137 
00138     /* PSRAM controller initialization */
00139     BSP_PSRAM_MspInit(&psramHandle, NULL); /* __weak function can be rewritten by the application */
00140     if(HAL_SRAM_Init(&psramHandle, &Timing, &Timing) != HAL_OK)
00141     {
00142       psram_status = PSRAM_ERROR;
00143     }
00144     else
00145     {
00146       psram_status = PSRAM_OK;
00147     }
00148 
00149     bsp_psram_initialized = 1;
00150   }
00151 
00152   return psram_status;
00153 }
00154 
00155 /**
00156   * @brief  DeInitializes the PSRAM device.
00157   * @retval PSRAM status
00158   */
00159 uint8_t BSP_PSRAM_DeInit(void)
00160 {
00161   static uint8_t psram_status = PSRAM_OK;
00162 
00163   if (bsp_psram_initialized == 1)
00164   {
00165     /* PSRAM device de-initialization */
00166     psramHandle.Instance = FMC_NORSRAM_DEVICE;
00167     psramHandle.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
00168 
00169     if(HAL_SRAM_DeInit(&psramHandle) != HAL_OK)
00170     {
00171       psram_status = PSRAM_ERROR;
00172     }
00173     else
00174     {
00175       psram_status = PSRAM_OK;
00176     }
00177 
00178     /* PSRAM controller de-initialization */
00179     BSP_PSRAM_MspDeInit(&psramHandle, NULL);
00180 
00181     /* Power off PSRAM */
00182     PSRAM_PowerOff();
00183 
00184     bsp_psram_initialized = 0;
00185   }
00186 
00187   return psram_status;
00188 }
00189 
00190 /**
00191   * @brief  Reads an amount of data from the PSRAM device in polling mode.
00192   * @param  uwStartAddress: Read start address
00193   * @param  pData: Pointer to data to be read
00194   * @param  uwDataSize: Size of read data from the memory
00195   * @retval PSRAM status
00196   */
00197 uint8_t BSP_PSRAM_ReadData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize)
00198 {
00199   if(HAL_SRAM_Read_16b(&psramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
00200   {
00201     return PSRAM_ERROR;
00202   }
00203   else
00204   {
00205     return PSRAM_OK;
00206   }
00207 }
00208 
00209 /**
00210   * @brief  Reads an amount of data from the PSRAM device in DMA mode.
00211   * @param  uwStartAddress: Read start address
00212   * @param  pData: Pointer to data to be read
00213   * @param  uwDataSize: Size of read data from the memory
00214   * @retval PSRAM status
00215   */
00216 uint8_t BSP_PSRAM_ReadData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize)
00217 {
00218   if(HAL_SRAM_Read_DMA(&psramHandle, (uint32_t *)uwStartAddress, (uint32_t *)pData, uwDataSize) != HAL_OK)
00219   {
00220     return PSRAM_ERROR;
00221   }
00222   else
00223   {
00224     return PSRAM_OK;
00225   }
00226 }
00227 
00228 /**
00229   * @brief  Writes an amount of data from the PSRAM device in polling mode.
00230   * @param  uwStartAddress: Write start address
00231   * @param  pData: Pointer to data to be written
00232   * @param  uwDataSize: Size of written data from the memory
00233   * @retval PSRAM status
00234   */
00235 uint8_t BSP_PSRAM_WriteData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize)
00236 {
00237   if(HAL_SRAM_Write_16b(&psramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
00238   {
00239     return PSRAM_ERROR;
00240   }
00241   else
00242   {
00243     return PSRAM_OK;
00244   }
00245 }
00246 
00247 /**
00248   * @brief  Writes an amount of data from the PSRAM device in DMA mode.
00249   * @param  uwStartAddress: Write start address
00250   * @param  pData: Pointer to data to be written
00251   * @param  uwDataSize: Size of written data from the memory
00252   * @retval PSRAM status
00253   */
00254 uint8_t BSP_PSRAM_WriteData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize)
00255 {
00256   if(HAL_SRAM_Write_DMA(&psramHandle, (uint32_t *)uwStartAddress, (uint32_t *)pData, uwDataSize) != HAL_OK)
00257   {
00258     return PSRAM_ERROR;
00259   }
00260   else
00261   {
00262     return PSRAM_OK;
00263   }
00264 }
00265 
00266 /**
00267   * @brief  Initializes PSRAM MSP.
00268   * @param  hsram: PSRAM handle
00269   * @param  Params
00270   * @retval None
00271   */
00272 __weak void BSP_PSRAM_MspInit(SRAM_HandleTypeDef  *hsram, void *Params)
00273 {
00274   static DMA_HandleTypeDef dma_handle;
00275   GPIO_InitTypeDef GPIO_Init_Structure;
00276 
00277   /* Enable DMAx clock */
00278   __PSRAM_DMAx_CLK_ENABLE();
00279   __HAL_RCC_DMAMUX1_CLK_ENABLE();
00280 
00281   /* Enable FMC clock */
00282   __HAL_RCC_FMC_CLK_ENABLE();
00283 
00284   /* Enable GPIOs clock */
00285   __HAL_RCC_GPIOB_CLK_ENABLE();
00286   __HAL_RCC_GPIOD_CLK_ENABLE();
00287   __HAL_RCC_GPIOE_CLK_ENABLE();
00288   __HAL_RCC_GPIOF_CLK_ENABLE();
00289   __HAL_RCC_GPIOG_CLK_ENABLE();
00290   /* IOSV bit MUST be set to access GPIO port G[2:15] */
00291   __HAL_RCC_PWR_CLK_ENABLE();
00292   SET_BIT(PWR->CR2, PWR_CR2_IOSV);
00293 
00294   /* Common GPIO configuration */
00295   GPIO_Init_Structure.Mode      = GPIO_MODE_AF_PP;
00296   GPIO_Init_Structure.Pull      = GPIO_NOPULL;
00297   GPIO_Init_Structure.Speed     = GPIO_SPEED_FREQ_VERY_HIGH;
00298   GPIO_Init_Structure.Alternate = GPIO_AF12_FMC;
00299 
00300   /*## Data Bus #######*/
00301   /* GPIOD configuration */
00302   GPIO_Init_Structure.Pin   = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_8 | GPIO_PIN_9 |
00303                               GPIO_PIN_10 | GPIO_PIN_14 | GPIO_PIN_15;
00304   HAL_GPIO_Init(GPIOD, &GPIO_Init_Structure);
00305 
00306   /* GPIOE configuration */
00307   GPIO_Init_Structure.Pin   = GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 |
00308                               GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 |
00309                               GPIO_PIN_14 | GPIO_PIN_15;
00310   HAL_GPIO_Init(GPIOE, &GPIO_Init_Structure);
00311 
00312 
00313   /*## Address Bus #######*/
00314   /* GPIOF configuration */
00315   GPIO_Init_Structure.Pin   = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 |
00316                               GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_12 | GPIO_PIN_13 |
00317                               GPIO_PIN_14 | GPIO_PIN_15;
00318   HAL_GPIO_Init(GPIOF, &GPIO_Init_Structure);
00319 
00320 
00321   /* GPIOG configuration */
00322   GPIO_Init_Structure.Pin   = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |
00323                               GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5;
00324   HAL_GPIO_Init(GPIOG, &GPIO_Init_Structure);
00325 
00326   /* GPIOD configuration */
00327   GPIO_Init_Structure.Pin   = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13;
00328   HAL_GPIO_Init(GPIOD, &GPIO_Init_Structure);
00329 
00330   /* GPIOE configuration */
00331   GPIO_Init_Structure.Pin   = GPIO_PIN_3 | GPIO_PIN_4;
00332   HAL_GPIO_Init(GPIOE, &GPIO_Init_Structure);
00333   GPIO_Init_Structure.Pull = GPIO_PULLUP;
00334 
00335 
00336   /*## NOE and NWE configuration #######*/
00337   GPIO_Init_Structure.Pin = GPIO_PIN_4 |GPIO_PIN_5;
00338   HAL_GPIO_Init(GPIOD, &GPIO_Init_Structure);
00339 
00340   /* Chip select configuration */
00341   /*## NE1 configuration #######*/
00342   GPIO_Init_Structure.Pin = GPIO_PIN_7;
00343   HAL_GPIO_Init(GPIOD, &GPIO_Init_Structure);
00344 
00345   /*## NE2, NE3, NE4 configuration #######*/
00346   GPIO_Init_Structure.Pin = GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_12;
00347   HAL_GPIO_Init(GPIOG, &GPIO_Init_Structure);
00348 
00349   /*## NBL0, NBL1 configuration #######*/
00350   GPIO_Init_Structure.Pin = GPIO_PIN_0 | GPIO_PIN_1;
00351   GPIO_Init_Structure.Pull      = GPIO_PULLUP;
00352   HAL_GPIO_Init(GPIOE, &GPIO_Init_Structure);
00353 
00354 
00355   GPIO_Init_Structure.Pull      = GPIO_PULLDOWN;
00356   /*## CLK and NWAIT configuration #######*/
00357   GPIO_Init_Structure.Pin = GPIO_PIN_3 | GPIO_PIN_6;
00358   HAL_GPIO_Init(GPIOD, &GPIO_Init_Structure);
00359 
00360   /*## ADVn configuration #######*/
00361   GPIO_Init_Structure.Pin = GPIO_PIN_7;
00362   HAL_GPIO_Init(GPIOB, &GPIO_Init_Structure);
00363 
00364   /* Configure common DMA parameters */
00365   dma_handle.Init.Direction           = DMA_MEMORY_TO_MEMORY;
00366   dma_handle.Init.PeriphInc           = DMA_PINC_ENABLE;
00367   dma_handle.Init.MemInc              = DMA_MINC_ENABLE;
00368   dma_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
00369   dma_handle.Init.MemDataAlignment    = DMA_MDATAALIGN_HALFWORD;
00370   dma_handle.Init.Mode                = DMA_NORMAL;
00371   dma_handle.Init.Priority            = DMA_PRIORITY_HIGH;
00372 
00373   dma_handle.Instance = PSRAM_DMAx_INSTANCE;
00374 
00375   /* Deinitialize the Channel for new transfer */
00376   HAL_DMA_DeInit(&dma_handle);
00377 
00378   /* Configure the DMA Channel */
00379   HAL_DMA_Init(&dma_handle);
00380 
00381   /* Associate the DMA handle to the FMC SRAM one */
00382   hsram->hdma = &dma_handle;
00383 
00384   HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
00385 
00386   /* NVIC configuration for DMA transfer complete interrupt */
00387   HAL_NVIC_SetPriority(PSRAM_DMAx_IRQn, 0, 0);
00388   HAL_NVIC_EnableIRQ(PSRAM_DMAx_IRQn);
00389 }
00390 
00391 
00392 /**
00393   * @brief  DeInitializes SRAM MSP.
00394   * @param  hsram: SRAM handle
00395   * @param  Params
00396   * @retval None
00397   */
00398 __weak void BSP_PSRAM_MspDeInit(SRAM_HandleTypeDef  *hsram, void *Params)
00399 {
00400   static DMA_HandleTypeDef dma_handle;
00401 
00402   /* Disable NVIC configuration for DMA interrupt */
00403   HAL_NVIC_DisableIRQ(PSRAM_DMAx_IRQn);
00404 
00405   /* Deinitialize the stream for new transfer */
00406   dma_handle.Instance = PSRAM_DMAx_INSTANCE;
00407   HAL_DMA_DeInit(&dma_handle);
00408 
00409   /* Deinitialize GPIOs */
00410   HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
00411   HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0  | GPIO_PIN_1  | GPIO_PIN_3  | GPIO_PIN_4  |
00412                          GPIO_PIN_5  | GPIO_PIN_6  | GPIO_PIN_7  | GPIO_PIN_8  |
00413                          GPIO_PIN_9  | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 |
00414                          GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15);
00415   HAL_GPIO_DeInit(GPIOE, GPIO_PIN_0  | GPIO_PIN_1  | GPIO_PIN_3  | GPIO_PIN_4  |
00416                          GPIO_PIN_7  | GPIO_PIN_8  | GPIO_PIN_9  | GPIO_PIN_10 |
00417                          GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |
00418                          GPIO_PIN_15);
00419   HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0  | GPIO_PIN_1  | GPIO_PIN_2  | GPIO_PIN_3  |
00420                          GPIO_PIN_4  | GPIO_PIN_5  | GPIO_PIN_12 | GPIO_PIN_13 |
00421                          GPIO_PIN_14 | GPIO_PIN_15);
00422   HAL_GPIO_DeInit(GPIOG, GPIO_PIN_0  | GPIO_PIN_1  | GPIO_PIN_2  | GPIO_PIN_3  |
00423                          GPIO_PIN_4  | GPIO_PIN_5  | GPIO_PIN_9  | GPIO_PIN_10 |
00424                          GPIO_PIN_12);
00425 
00426   /* GPIO pins clock, FMC clock and DMA clock can be shut down in the applications
00427      by surcharging this __weak function */
00428 }
00429 
00430 /**
00431   * @brief  PSRAM power on
00432   *         Power on PSRAM.
00433   */
00434 static void PSRAM_PowerOn(void)
00435 {
00436   /* Configure DSI_RESET and DSI_POWER_ON only if lcd is not currently used */
00437   if(bsp_lcd_initialized == 0)
00438   {
00439     BSP_IO_Init();
00440 
00441 #if defined(USE_STM32L4R9I_DISCO_REVA) || defined(USE_STM32L4R9I_DISCO_REVB)
00442     /* Set DSI_POWER_ON to input floating to avoid I2C issue during input PD configuration */
00443     BSP_IO_ConfigPin(IO_PIN_8, IO_MODE_INPUT);
00444 
00445     /* Configure the GPIO connected to DSI_RESET signal */
00446     BSP_IO_ConfigPin(IO_PIN_10, IO_MODE_OUTPUT);
00447 
00448     /* Activate DSI_RESET (active low) */
00449     BSP_IO_WritePin(IO_PIN_10, GPIO_PIN_RESET);
00450 
00451     /* Configure the GPIO connected to DSI_POWER_ON signal as input pull down */
00452     /* to activate 3V3_LCD. VDD_LCD is also activated if VDD = 3,3V */
00453     BSP_IO_ConfigPin(IO_PIN_8, IO_MODE_INPUT_PD);
00454 
00455     /* Wait at least 1ms before enabling 1V8_LCD */
00456     HAL_Delay(1);
00457 
00458     /* Configure the GPIO connected to DSI_POWER_ON signal as output low */
00459     /* to activate 1V8_LCD. VDD_LCD is also activated if VDD = 1,8V */
00460     BSP_IO_WritePin(IO_PIN_8, GPIO_PIN_RESET);
00461     BSP_IO_ConfigPin(IO_PIN_8, IO_MODE_OUTPUT);
00462 #else /* USE_STM32L4R9I_DISCO_REVA || USE_STM32L4R9I_DISCO_REVB */
00463     /* Configure the GPIO connected to DSI_3V3_POWERON signal as output low */
00464     /* to activate 3V3_LCD. VDD_LCD is also activated if VDD = 3,3V */
00465     BSP_IO_WritePin(IO_PIN_8, GPIO_PIN_RESET);
00466     BSP_IO_ConfigPin(IO_PIN_8, IO_MODE_OUTPUT);
00467 
00468     /* Wait at least 1ms before enabling 1V8_LCD */
00469     HAL_Delay(1);
00470 
00471     /* Configure the GPIO connected to DSI_1V8_POWERON signal as output low */
00472     /* to activate 1V8_LCD. VDD_LCD is also activated if VDD = 1,8V */
00473     BSP_IO_WritePin(AGPIO_PIN_2, GPIO_PIN_RESET);
00474     BSP_IO_ConfigPin(AGPIO_PIN_2, IO_MODE_OUTPUT);
00475 #endif /* USE_STM32L4R9I_DISCO_REVA || USE_STM32L4R9I_DISCO_REVB */
00476 
00477     /* Wait at least 15 ms (minimum reset low width is 10ms and add margin for 1V8_LCD ramp-up) */
00478     HAL_Delay(15);
00479   }
00480 }
00481 
00482 /**
00483   * @brief  PSRAM power off
00484   *         Power off PSRAM.
00485   */
00486 static void PSRAM_PowerOff(void)
00487 {
00488   /* Set DSI_POWER_ON to analog mode only if lcd is not currently used */
00489   if(bsp_lcd_initialized == 0)
00490   {
00491 #if defined(USE_STM32L4R9I_DISCO_REVA) || defined(USE_STM32L4R9I_DISCO_REVB)
00492     BSP_IO_ConfigPin(IO_PIN_8, IO_MODE_ANALOG);
00493 #else /* USE_STM32L4R9I_DISCO_REVA || USE_STM32L4R9I_DISCO_REVB */
00494     /* Disable first DSI_1V8_PWRON then DSI_3V3_PWRON */
00495     BSP_IO_ConfigPin(AGPIO_PIN_2, IO_MODE_ANALOG);
00496     BSP_IO_ConfigPin(IO_PIN_8, IO_MODE_ANALOG);
00497 #endif /* USE_STM32L4R9I_DISCO_REVA || USE_STM32L4R9I_DISCO_REVB */
00498   }
00499 }
00500 
00501 /**
00502   * @}
00503   */
00504 
00505 /**
00506   * @}
00507   */
00508 
00509 /**
00510   * @}
00511   */
00512 
00513 /**
00514   * @}
00515   */
00516 
00517 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/