BSP_DISCO_L4R9I
Dependents: DISCO_L4R9I-LCD-demo
Drivers/BSP/STM32L4R9I-Discovery/stm32l4r9i_discovery_psram.h@1:2105b8894450, 2019-11-26 (annotated)
- Committer:
- Jerome Coutant
- Date:
- Tue Nov 26 14:35:07 2019 +0100
- Revision:
- 1:2105b8894450
- Parent:
- 0:31ddfafdd3da
Update for MBED use
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/**
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******************************************************************************
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* @file stm32l4r9i_discovery_psram.h
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* @author MCD Application Team
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* @brief This file contains the common defines and functions prototypes for
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* the stm32l4r9i_discovery_psram.c driver.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32L4R9I_DISCOVERY_PSRAM_H
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#define __STM32L4R9I_DISCOVERY_PSRAM_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l4xx_hal.h"
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup STM32L4R9I_DISCOVERY
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* @{
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*/
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/** @addtogroup STM32L4R9I_DISCOVERY_PSRAM
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* @{
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*/
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/** @defgroup STM32L4R9I_DISCOVERY_PSRAM_Exported_Types Exported Constants
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* @{
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*/
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/**
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* @brief PSRAM status structure definition
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*/
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#define PSRAM_OK ((uint8_t)0x00)
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#define PSRAM_ERROR ((uint8_t)0x01)
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#define PSRAM_DEVICE_ADDR ((uint32_t)0x60000000)
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#define PSRAM_DEVICE_SIZE ((uint32_t)0x400000) /* PSRAM device size in Bytes */
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/* #define SRAM_MEMORY_WIDTH FMC_NORSRAM_MEM_BUS_WIDTH_8*/
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#define PSRAM_MEMORY_WIDTH FMC_NORSRAM_MEM_BUS_WIDTH_16
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#define PSRAM_BURSTACCESS FMC_BURST_ACCESS_MODE_DISABLE
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/* #define PSRAM_BURSTACCESS FMC_BURST_ACCESS_MODE_ENABLE*/
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#define PSRAM_WRITEBURST FMC_WRITE_BURST_DISABLE
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/* #define PSRAM_WRITEBURST FMC_WRITE_BURST_ENABLE */
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#define CONTINUOUSCLOCK_FEATURE FMC_CONTINUOUS_CLOCK_SYNC_ONLY
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/* #define CONTINUOUSCLOCK_FEATURE FMC_CONTINUOUS_CLOCK_SYNC_ASYNC */
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/* DMA definitions for SRAM DMA transfer */
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#define __PSRAM_DMAx_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
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#define __PSRAM_DMAx_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
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#define PSRAM_DMAx_INSTANCE DMA2_Channel3
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#define PSRAM_DMAx_IRQn DMA2_Channel3_IRQn
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#define BSP_PSRAM_DMA_IRQHandler DMA2_Channel3_IRQHandler
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/** @defgroup STM32L4R9I_DISCOVERY_PSRAM_Exported_Variables Exported Variables
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* @{
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*/
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extern SRAM_HandleTypeDef psramHandle;
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/**
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* @}
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*/
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/** @defgroup STM32L4R9I_DISCOVERY_PSRAM_Exported_Functions Exported Functions
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* @{
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*/
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uint8_t BSP_PSRAM_Init(void);
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uint8_t BSP_PSRAM_DeInit(void);
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uint8_t BSP_PSRAM_ReadData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
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uint8_t BSP_PSRAM_ReadData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
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uint8_t BSP_PSRAM_WriteData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
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uint8_t BSP_PSRAM_WriteData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
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/* These __weak functions can be surcharged by application code in case the current settings
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(eg. interrupt priority) need to be changed for specific application needs */
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void BSP_PSRAM_MspInit(SRAM_HandleTypeDef *hsram, void *Params);
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void BSP_PSRAM_MspDeInit(SRAM_HandleTypeDef *hsram, void *Params);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM32L4R9I_DISCOVERY_PSRAM_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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