ST / BSP_DISCO_L4R9I

BSP_DISCO_L4R9I

Dependents:   DISCO_L4R9I-LCD-demo

Drivers/BSP/STM32L4R9I-Discovery/stm32l4r9i_discovery_psram.c@1:2105b8894450, 2019-11-26 (annotated)

Committer:
Jerome Coutant
Date:
Tue Nov 26 14:35:07 2019 +0100
Revision:
1:2105b8894450
Parent:
0:31ddfafdd3da 
Update for MBED use

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Jerome Coutant 0:31ddfafdd3da 1 /**
Jerome Coutant 0:31ddfafdd3da 2 ******************************************************************************
Jerome Coutant 0:31ddfafdd3da 3 * @file stm32l4r9i_discovery_psram.c
Jerome Coutant 0:31ddfafdd3da 4 * @author MCD Application Team
Jerome Coutant 0:31ddfafdd3da 5 * @brief This file includes the PSRAM driver for the IS61WV51216BLL-10MLI memory
Jerome Coutant 0:31ddfafdd3da 6 * device mounted on STM32L4R9I_DISCOVERY boards.
Jerome Coutant 0:31ddfafdd3da 7 @verbatim
Jerome Coutant 0:31ddfafdd3da 8 How To use this driver:
Jerome Coutant 0:31ddfafdd3da 9 -----------------------
Jerome Coutant 0:31ddfafdd3da 10 - This driver is used to drive the IS66WVC2M16ECLL-7010BLI external memory mounted
Jerome Coutant 0:31ddfafdd3da 11 on STM32L4R9I discovery board.
Jerome Coutant 0:31ddfafdd3da 12 - This driver does not need a specific component driver for the PSRAM device
Jerome Coutant 0:31ddfafdd3da 13 to be included with.
Jerome Coutant 0:31ddfafdd3da 14
Jerome Coutant 0:31ddfafdd3da 15 Driver description:
Jerome Coutant 0:31ddfafdd3da 16 ------------------
Jerome Coutant 0:31ddfafdd3da 17 + Initialization steps:
Jerome Coutant 0:31ddfafdd3da 18 o Initialize the PSRAM external memory using the BSP_PSRAM_Init() function. This
Jerome Coutant 0:31ddfafdd3da 19 function includes the MSP layer hardware resources initialization and the
Jerome Coutant 0:31ddfafdd3da 20 FMC controller configuration to interface with the external PSRAM memory.
Jerome Coutant 0:31ddfafdd3da 21
Jerome Coutant 0:31ddfafdd3da 22 + PSRAM read/write operations
Jerome Coutant 0:31ddfafdd3da 23 o PSRAM external memory can be accessed with read/write operations once it is
Jerome Coutant 0:31ddfafdd3da 24 initialized.
Jerome Coutant 0:31ddfafdd3da 25 Read/write operation can be performed with AHB access using the functions
Jerome Coutant 0:31ddfafdd3da 26 BSP_PSRAM_ReadData()/BSP_PSRAM_WriteData(), or by DMA transfer using the functions
Jerome Coutant 0:31ddfafdd3da 27 BSP_PSRAM_ReadData_DMA()/BSP_PSRAM_WriteData_DMA().
Jerome Coutant 0:31ddfafdd3da 28 o The AHB access is performed with 16-bit width transaction, the DMA transfer
Jerome Coutant 0:31ddfafdd3da 29 configuration is fixed at single (no burst) halfword transfer.
Jerome Coutant 0:31ddfafdd3da 30 o User can implement his own functions for read/write access with his desired
Jerome Coutant 0:31ddfafdd3da 31 configurations.
Jerome Coutant 0:31ddfafdd3da 32 o If interrupt mode is used for DMA transfer, the function BSP_PSRAM_DMA_IRQHandler()
Jerome Coutant 0:31ddfafdd3da 33 is called in IRQ handler file, to serve the generated interrupt once the DMA
Jerome Coutant 0:31ddfafdd3da 34 transfer is complete.
Jerome Coutant 0:31ddfafdd3da 35 @endverbatim
Jerome Coutant 0:31ddfafdd3da 36 ******************************************************************************
Jerome Coutant 0:31ddfafdd3da 37 * @attention
Jerome Coutant 0:31ddfafdd3da 38 *
Jerome Coutant 0:31ddfafdd3da 39 * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
Jerome Coutant 0:31ddfafdd3da 40 * All rights reserved.</center></h2>
Jerome Coutant 0:31ddfafdd3da 41 *
Jerome Coutant 0:31ddfafdd3da 42 * This software component is licensed by ST under BSD 3-Clause license,
Jerome Coutant 0:31ddfafdd3da 43 * the "License"; You may not use this file except in compliance with the
Jerome Coutant 0:31ddfafdd3da 44 * License. You may obtain a copy of the License at:
Jerome Coutant 0:31ddfafdd3da 45 * opensource.org/licenses/BSD-3-Clause
Jerome Coutant 0:31ddfafdd3da 46 *
Jerome Coutant 0:31ddfafdd3da 47 ******************************************************************************
Jerome Coutant 0:31ddfafdd3da 48 */
Jerome Coutant 0:31ddfafdd3da 49
Jerome Coutant 0:31ddfafdd3da 50 /* Includes ------------------------------------------------------------------*/
Jerome Coutant 0:31ddfafdd3da 51 #include "stm32l4r9i_discovery_psram.h"
Jerome Coutant 0:31ddfafdd3da 52 #include "stm32l4r9i_discovery_io.h"
Jerome Coutant 0:31ddfafdd3da 53
Jerome Coutant 0:31ddfafdd3da 54 /** @addtogroup BSP
Jerome Coutant 0:31ddfafdd3da 55 * @{
Jerome Coutant 0:31ddfafdd3da 56 */
Jerome Coutant 0:31ddfafdd3da 57
Jerome Coutant 0:31ddfafdd3da 58 /** @addtogroup STM32L4R9I_DISCOVERY
Jerome Coutant 0:31ddfafdd3da 59 * @{
Jerome Coutant 0:31ddfafdd3da 60 */
Jerome Coutant 0:31ddfafdd3da 61
Jerome Coutant 0:31ddfafdd3da 62 /** @defgroup STM32L4R9I_DISCOVERY_PSRAM STM32L4R9I_DISCOVERY PSRAM
Jerome Coutant 0:31ddfafdd3da 63 * @{
Jerome Coutant 0:31ddfafdd3da 64 */
Jerome Coutant 0:31ddfafdd3da 65
Jerome Coutant 0:31ddfafdd3da 66 /** @defgroup STM32L4R9I_DISCOVERY_PSRAM_Private_Variables Exported Variables
Jerome Coutant 0:31ddfafdd3da 67 * @{
Jerome Coutant 0:31ddfafdd3da 68 */
Jerome Coutant 0:31ddfafdd3da 69 SRAM_HandleTypeDef psramHandle = {0};
Jerome Coutant 0:31ddfafdd3da 70
Jerome Coutant 0:31ddfafdd3da 71 /* LCD/PSRAM initialization status sharing the same power source */
Jerome Coutant 0:31ddfafdd3da 72 extern uint32_t bsp_lcd_initialized;
Jerome Coutant 0:31ddfafdd3da 73 extern uint32_t bsp_psram_initialized;
Jerome Coutant 0:31ddfafdd3da 74
Jerome Coutant 0:31ddfafdd3da 75 /**
Jerome Coutant 0:31ddfafdd3da 76 * @}
Jerome Coutant 0:31ddfafdd3da 77 */
Jerome Coutant 0:31ddfafdd3da 78
Jerome Coutant 0:31ddfafdd3da 79 /** @defgroup STM32L4R9I_DISCOVERY_PSRAM_Private_Function_Prototypes Private Function Prototypes
Jerome Coutant 0:31ddfafdd3da 80 * @{
Jerome Coutant 0:31ddfafdd3da 81 */
Jerome Coutant 0:31ddfafdd3da 82 static void PSRAM_PowerOn(void);
Jerome Coutant 0:31ddfafdd3da 83 static void PSRAM_PowerOff(void);
Jerome Coutant 0:31ddfafdd3da 84 /**
Jerome Coutant 0:31ddfafdd3da 85 * @}
Jerome Coutant 0:31ddfafdd3da 86 */
Jerome Coutant 0:31ddfafdd3da 87
Jerome Coutant 0:31ddfafdd3da 88 /** @defgroup STM32L4R9I_DISCOVERY_PSRAM_Private_Functions Private Functions
Jerome Coutant 0:31ddfafdd3da 89 * @{
Jerome Coutant 0:31ddfafdd3da 90 */
Jerome Coutant 0:31ddfafdd3da 91
Jerome Coutant 0:31ddfafdd3da 92 /**
Jerome Coutant 0:31ddfafdd3da 93 * @brief Initializes the PSRAM device.
Jerome Coutant 0:31ddfafdd3da 94 * @retval PSRAM status
Jerome Coutant 0:31ddfafdd3da 95 */
Jerome Coutant 0:31ddfafdd3da 96 uint8_t BSP_PSRAM_Init(void)
Jerome Coutant 0:31ddfafdd3da 97 {
Jerome Coutant 0:31ddfafdd3da 98 static uint8_t psram_status = PSRAM_OK;
Jerome Coutant 0:31ddfafdd3da 99
Jerome Coutant 0:31ddfafdd3da 100 if (bsp_psram_initialized == 0)
Jerome Coutant 0:31ddfafdd3da 101 {
Jerome Coutant 0:31ddfafdd3da 102 static FMC_NORSRAM_TimingTypeDef Timing;
Jerome Coutant 0:31ddfafdd3da 103
Jerome Coutant 0:31ddfafdd3da 104 /* Power on PSRAM */
Jerome Coutant 0:31ddfafdd3da 105 PSRAM_PowerOn();
Jerome Coutant 0:31ddfafdd3da 106
Jerome Coutant 0:31ddfafdd3da 107 /* PSRAM device configuration */
Jerome Coutant 0:31ddfafdd3da 108 /* Timing configuration derived from system clock (up to 120Mhz)
Jerome Coutant 0:31ddfafdd3da 109 for 60Mhz as PSRAM clock frequency */
Jerome Coutant 0:31ddfafdd3da 110 Timing.AddressSetupTime = 4;
Jerome Coutant 0:31ddfafdd3da 111 Timing.AddressHoldTime = 2;
Jerome Coutant 0:31ddfafdd3da 112 Timing.DataSetupTime = 6;
Jerome Coutant 0:31ddfafdd3da 113 Timing.BusTurnAroundDuration = 1;
Jerome Coutant 0:31ddfafdd3da 114 Timing.CLKDivision = 2;
Jerome Coutant 0:31ddfafdd3da 115 Timing.DataLatency = 2;
Jerome Coutant 0:31ddfafdd3da 116 Timing.AccessMode = FMC_ACCESS_MODE_A;
Jerome Coutant 0:31ddfafdd3da 117
Jerome Coutant 0:31ddfafdd3da 118 psramHandle.Init.NSBank = FMC_NORSRAM_BANK1;
Jerome Coutant 0:31ddfafdd3da 119 psramHandle.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
Jerome Coutant 0:31ddfafdd3da 120 psramHandle.Init.MemoryType = FMC_MEMORY_TYPE_PSRAM;
Jerome Coutant 0:31ddfafdd3da 121 psramHandle.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_16;
Jerome Coutant 0:31ddfafdd3da 122 psramHandle.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
Jerome Coutant 0:31ddfafdd3da 123 psramHandle.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_HIGH;
Jerome Coutant 0:31ddfafdd3da 124 psramHandle.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
Jerome Coutant 0:31ddfafdd3da 125 psramHandle.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
Jerome Coutant 0:31ddfafdd3da 126 psramHandle.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
Jerome Coutant 0:31ddfafdd3da 127 psramHandle.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
Jerome Coutant 0:31ddfafdd3da 128 psramHandle.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
Jerome Coutant 0:31ddfafdd3da 129 psramHandle.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
Jerome Coutant 0:31ddfafdd3da 130 psramHandle.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ASYNC;
Jerome Coutant 0:31ddfafdd3da 131 psramHandle.Init.WriteFifo = FMC_WRITE_FIFO_DISABLE;
Jerome Coutant 0:31ddfafdd3da 132 psramHandle.Init.NBLSetupTime = 0;
Jerome Coutant 0:31ddfafdd3da 133 psramHandle.Init.PageSize = FMC_PAGE_SIZE_NONE;
Jerome Coutant 0:31ddfafdd3da 134
Jerome Coutant 0:31ddfafdd3da 135 psramHandle.Instance = FMC_NORSRAM_DEVICE;
Jerome Coutant 0:31ddfafdd3da 136 psramHandle.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
Jerome Coutant 0:31ddfafdd3da 137
Jerome Coutant 0:31ddfafdd3da 138 /* PSRAM controller initialization */
Jerome Coutant 0:31ddfafdd3da 139 BSP_PSRAM_MspInit(&psramHandle, NULL); /* __weak function can be rewritten by the application */
Jerome Coutant 0:31ddfafdd3da 140 if(HAL_SRAM_Init(&psramHandle, &Timing, &Timing) != HAL_OK)
Jerome Coutant 0:31ddfafdd3da 141 {
Jerome Coutant 0:31ddfafdd3da 142 psram_status = PSRAM_ERROR;
Jerome Coutant 0:31ddfafdd3da 143 }
Jerome Coutant 0:31ddfafdd3da 144 else
Jerome Coutant 0:31ddfafdd3da 145 {
Jerome Coutant 0:31ddfafdd3da 146 psram_status = PSRAM_OK;
Jerome Coutant 0:31ddfafdd3da 147 }
Jerome Coutant 0:31ddfafdd3da 148
Jerome Coutant 0:31ddfafdd3da 149 bsp_psram_initialized = 1;
Jerome Coutant 0:31ddfafdd3da 150 }
Jerome Coutant 0:31ddfafdd3da 151
Jerome Coutant 0:31ddfafdd3da 152 return psram_status;
Jerome Coutant 0:31ddfafdd3da 153 }
Jerome Coutant 0:31ddfafdd3da 154
Jerome Coutant 0:31ddfafdd3da 155 /**
Jerome Coutant 0:31ddfafdd3da 156 * @brief DeInitializes the PSRAM device.
Jerome Coutant 0:31ddfafdd3da 157 * @retval PSRAM status
Jerome Coutant 0:31ddfafdd3da 158 */
Jerome Coutant 0:31ddfafdd3da 159 uint8_t BSP_PSRAM_DeInit(void)
Jerome Coutant 0:31ddfafdd3da 160 {
Jerome Coutant 0:31ddfafdd3da 161 static uint8_t psram_status = PSRAM_OK;
Jerome Coutant 0:31ddfafdd3da 162
Jerome Coutant 0:31ddfafdd3da 163 if (bsp_psram_initialized == 1)
Jerome Coutant 0:31ddfafdd3da 164 {
Jerome Coutant 0:31ddfafdd3da 165 /* PSRAM device de-initialization */
Jerome Coutant 0:31ddfafdd3da 166 psramHandle.Instance = FMC_NORSRAM_DEVICE;
Jerome Coutant 0:31ddfafdd3da 167 psramHandle.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
Jerome Coutant 0:31ddfafdd3da 168
Jerome Coutant 0:31ddfafdd3da 169 if(HAL_SRAM_DeInit(&psramHandle) != HAL_OK)
Jerome Coutant 0:31ddfafdd3da 170 {
Jerome Coutant 0:31ddfafdd3da 171 psram_status = PSRAM_ERROR;
Jerome Coutant 0:31ddfafdd3da 172 }
Jerome Coutant 0:31ddfafdd3da 173 else
Jerome Coutant 0:31ddfafdd3da 174 {
Jerome Coutant 0:31ddfafdd3da 175 psram_status = PSRAM_OK;
Jerome Coutant 0:31ddfafdd3da 176 }
Jerome Coutant 0:31ddfafdd3da 177
Jerome Coutant 0:31ddfafdd3da 178 /* PSRAM controller de-initialization */
Jerome Coutant 0:31ddfafdd3da 179 BSP_PSRAM_MspDeInit(&psramHandle, NULL);
Jerome Coutant 0:31ddfafdd3da 180
Jerome Coutant 0:31ddfafdd3da 181 /* Power off PSRAM */
Jerome Coutant 0:31ddfafdd3da 182 PSRAM_PowerOff();
Jerome Coutant 0:31ddfafdd3da 183
Jerome Coutant 0:31ddfafdd3da 184 bsp_psram_initialized = 0;
Jerome Coutant 0:31ddfafdd3da 185 }
Jerome Coutant 0:31ddfafdd3da 186
Jerome Coutant 0:31ddfafdd3da 187 return psram_status;
Jerome Coutant 0:31ddfafdd3da 188 }
Jerome Coutant 0:31ddfafdd3da 189
Jerome Coutant 0:31ddfafdd3da 190 /**
Jerome Coutant 0:31ddfafdd3da 191 * @brief Reads an amount of data from the PSRAM device in polling mode.
Jerome Coutant 0:31ddfafdd3da 192 * @param uwStartAddress: Read start address
Jerome Coutant 0:31ddfafdd3da 193 * @param pData: Pointer to data to be read
Jerome Coutant 0:31ddfafdd3da 194 * @param uwDataSize: Size of read data from the memory
Jerome Coutant 0:31ddfafdd3da 195 * @retval PSRAM status
Jerome Coutant 0:31ddfafdd3da 196 */
Jerome Coutant 0:31ddfafdd3da 197 uint8_t BSP_PSRAM_ReadData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize)
Jerome Coutant 0:31ddfafdd3da 198 {
Jerome Coutant 0:31ddfafdd3da 199 if(HAL_SRAM_Read_16b(&psramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
Jerome Coutant 0:31ddfafdd3da 200 {
Jerome Coutant 0:31ddfafdd3da 201 return PSRAM_ERROR;
Jerome Coutant 0:31ddfafdd3da 202 }
Jerome Coutant 0:31ddfafdd3da 203 else
Jerome Coutant 0:31ddfafdd3da 204 {
Jerome Coutant 0:31ddfafdd3da 205 return PSRAM_OK;
Jerome Coutant 0:31ddfafdd3da 206 }
Jerome Coutant 0:31ddfafdd3da 207 }
Jerome Coutant 0:31ddfafdd3da 208
Jerome Coutant 0:31ddfafdd3da 209 /**
Jerome Coutant 0:31ddfafdd3da 210 * @brief Reads an amount of data from the PSRAM device in DMA mode.
Jerome Coutant 0:31ddfafdd3da 211 * @param uwStartAddress: Read start address
Jerome Coutant 0:31ddfafdd3da 212 * @param pData: Pointer to data to be read
Jerome Coutant 0:31ddfafdd3da 213 * @param uwDataSize: Size of read data from the memory
Jerome Coutant 0:31ddfafdd3da 214 * @retval PSRAM status
Jerome Coutant 0:31ddfafdd3da 215 */
Jerome Coutant 0:31ddfafdd3da 216 uint8_t BSP_PSRAM_ReadData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize)
Jerome Coutant 0:31ddfafdd3da 217 {
Jerome Coutant 0:31ddfafdd3da 218 if(HAL_SRAM_Read_DMA(&psramHandle, (uint32_t *)uwStartAddress, (uint32_t *)pData, uwDataSize) != HAL_OK)
Jerome Coutant 0:31ddfafdd3da 219 {
Jerome Coutant 0:31ddfafdd3da 220 return PSRAM_ERROR;
Jerome Coutant 0:31ddfafdd3da 221 }
Jerome Coutant 0:31ddfafdd3da 222 else
Jerome Coutant 0:31ddfafdd3da 223 {
Jerome Coutant 0:31ddfafdd3da 224 return PSRAM_OK;
Jerome Coutant 0:31ddfafdd3da 225 }
Jerome Coutant 0:31ddfafdd3da 226 }
Jerome Coutant 0:31ddfafdd3da 227
Jerome Coutant 0:31ddfafdd3da 228 /**
Jerome Coutant 0:31ddfafdd3da 229 * @brief Writes an amount of data from the PSRAM device in polling mode.
Jerome Coutant 0:31ddfafdd3da 230 * @param uwStartAddress: Write start address
Jerome Coutant 0:31ddfafdd3da 231 * @param pData: Pointer to data to be written
Jerome Coutant 0:31ddfafdd3da 232 * @param uwDataSize: Size of written data from the memory
Jerome Coutant 0:31ddfafdd3da 233 * @retval PSRAM status
Jerome Coutant 0:31ddfafdd3da 234 */
Jerome Coutant 0:31ddfafdd3da 235 uint8_t BSP_PSRAM_WriteData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize)
Jerome Coutant 0:31ddfafdd3da 236 {
Jerome Coutant 0:31ddfafdd3da 237 if(HAL_SRAM_Write_16b(&psramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
Jerome Coutant 0:31ddfafdd3da 238 {
Jerome Coutant 0:31ddfafdd3da 239 return PSRAM_ERROR;
Jerome Coutant 0:31ddfafdd3da 240 }
Jerome Coutant 0:31ddfafdd3da 241 else
Jerome Coutant 0:31ddfafdd3da 242 {
Jerome Coutant 0:31ddfafdd3da 243 return PSRAM_OK;
Jerome Coutant 0:31ddfafdd3da 244 }
Jerome Coutant 0:31ddfafdd3da 245 }
Jerome Coutant 0:31ddfafdd3da 246
Jerome Coutant 0:31ddfafdd3da 247 /**
Jerome Coutant 0:31ddfafdd3da 248 * @brief Writes an amount of data from the PSRAM device in DMA mode.
Jerome Coutant 0:31ddfafdd3da 249 * @param uwStartAddress: Write start address
Jerome Coutant 0:31ddfafdd3da 250 * @param pData: Pointer to data to be written
Jerome Coutant 0:31ddfafdd3da 251 * @param uwDataSize: Size of written data from the memory
Jerome Coutant 0:31ddfafdd3da 252 * @retval PSRAM status
Jerome Coutant 0:31ddfafdd3da 253 */
Jerome Coutant 0:31ddfafdd3da 254 uint8_t BSP_PSRAM_WriteData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize)
Jerome Coutant 0:31ddfafdd3da 255 {
Jerome Coutant 0:31ddfafdd3da 256 if(HAL_SRAM_Write_DMA(&psramHandle, (uint32_t *)uwStartAddress, (uint32_t *)pData, uwDataSize) != HAL_OK)
Jerome Coutant 0:31ddfafdd3da 257 {
Jerome Coutant 0:31ddfafdd3da 258 return PSRAM_ERROR;
Jerome Coutant 0:31ddfafdd3da 259 }
Jerome Coutant 0:31ddfafdd3da 260 else
Jerome Coutant 0:31ddfafdd3da 261 {
Jerome Coutant 0:31ddfafdd3da 262 return PSRAM_OK;
Jerome Coutant 0:31ddfafdd3da 263 }
Jerome Coutant 0:31ddfafdd3da 264 }
Jerome Coutant 0:31ddfafdd3da 265
Jerome Coutant 0:31ddfafdd3da 266 /**
Jerome Coutant 0:31ddfafdd3da 267 * @brief Initializes PSRAM MSP.
Jerome Coutant 0:31ddfafdd3da 268 * @param hsram: PSRAM handle
Jerome Coutant 0:31ddfafdd3da 269 * @param Params
Jerome Coutant 0:31ddfafdd3da 270 * @retval None
Jerome Coutant 0:31ddfafdd3da 271 */
Jerome Coutant 0:31ddfafdd3da 272 __weak void BSP_PSRAM_MspInit(SRAM_HandleTypeDef *hsram, void *Params)
Jerome Coutant 0:31ddfafdd3da 273 {
Jerome Coutant 0:31ddfafdd3da 274 static DMA_HandleTypeDef dma_handle;
Jerome Coutant 0:31ddfafdd3da 275 GPIO_InitTypeDef GPIO_Init_Structure;
Jerome Coutant 0:31ddfafdd3da 276
Jerome Coutant 0:31ddfafdd3da 277 /* Enable DMAx clock */
Jerome Coutant 0:31ddfafdd3da 278 __PSRAM_DMAx_CLK_ENABLE();
Jerome Coutant 0:31ddfafdd3da 279 __HAL_RCC_DMAMUX1_CLK_ENABLE();
Jerome Coutant 0:31ddfafdd3da 280
Jerome Coutant 0:31ddfafdd3da 281 /* Enable FMC clock */
Jerome Coutant 0:31ddfafdd3da 282 __HAL_RCC_FMC_CLK_ENABLE();
Jerome Coutant 0:31ddfafdd3da 283
Jerome Coutant 0:31ddfafdd3da 284 /* Enable GPIOs clock */
Jerome Coutant 0:31ddfafdd3da 285 __HAL_RCC_GPIOB_CLK_ENABLE();
Jerome Coutant 0:31ddfafdd3da 286 __HAL_RCC_GPIOD_CLK_ENABLE();
Jerome Coutant 0:31ddfafdd3da 287 __HAL_RCC_GPIOE_CLK_ENABLE();
Jerome Coutant 0:31ddfafdd3da 288 __HAL_RCC_GPIOF_CLK_ENABLE();
Jerome Coutant 0:31ddfafdd3da 289 __HAL_RCC_GPIOG_CLK_ENABLE();
Jerome Coutant 0:31ddfafdd3da 290 /* IOSV bit MUST be set to access GPIO port G[2:15] */
Jerome Coutant 0:31ddfafdd3da 291 __HAL_RCC_PWR_CLK_ENABLE();
Jerome Coutant 0:31ddfafdd3da 292 SET_BIT(PWR->CR2, PWR_CR2_IOSV);
Jerome Coutant 0:31ddfafdd3da 293
Jerome Coutant 0:31ddfafdd3da 294 /* Common GPIO configuration */
Jerome Coutant 0:31ddfafdd3da 295 GPIO_Init_Structure.Mode = GPIO_MODE_AF_PP;
Jerome Coutant 0:31ddfafdd3da 296 GPIO_Init_Structure.Pull = GPIO_NOPULL;
Jerome Coutant 0:31ddfafdd3da 297 GPIO_Init_Structure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
Jerome Coutant 0:31ddfafdd3da 298 GPIO_Init_Structure.Alternate = GPIO_AF12_FMC;
Jerome Coutant 0:31ddfafdd3da 299
Jerome Coutant 0:31ddfafdd3da 300 /*## Data Bus #######*/
Jerome Coutant 0:31ddfafdd3da 301 /* GPIOD configuration */
Jerome Coutant 0:31ddfafdd3da 302 GPIO_Init_Structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_8 | GPIO_PIN_9 |
Jerome Coutant 0:31ddfafdd3da 303 GPIO_PIN_10 | GPIO_PIN_14 | GPIO_PIN_15;
Jerome Coutant 0:31ddfafdd3da 304 HAL_GPIO_Init(GPIOD, &GPIO_Init_Structure);
Jerome Coutant 0:31ddfafdd3da 305
Jerome Coutant 0:31ddfafdd3da 306 /* GPIOE configuration */
Jerome Coutant 0:31ddfafdd3da 307 GPIO_Init_Structure.Pin = GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 |
Jerome Coutant 0:31ddfafdd3da 308 GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 |
Jerome Coutant 0:31ddfafdd3da 309 GPIO_PIN_14 | GPIO_PIN_15;
Jerome Coutant 0:31ddfafdd3da 310 HAL_GPIO_Init(GPIOE, &GPIO_Init_Structure);
Jerome Coutant 0:31ddfafdd3da 311
Jerome Coutant 0:31ddfafdd3da 312
Jerome Coutant 0:31ddfafdd3da 313 /*## Address Bus #######*/
Jerome Coutant 0:31ddfafdd3da 314 /* GPIOF configuration */
Jerome Coutant 0:31ddfafdd3da 315 GPIO_Init_Structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 |
Jerome Coutant 0:31ddfafdd3da 316 GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_12 | GPIO_PIN_13 |
Jerome Coutant 0:31ddfafdd3da 317 GPIO_PIN_14 | GPIO_PIN_15;
Jerome Coutant 0:31ddfafdd3da 318 HAL_GPIO_Init(GPIOF, &GPIO_Init_Structure);
Jerome Coutant 0:31ddfafdd3da 319
Jerome Coutant 0:31ddfafdd3da 320
Jerome Coutant 0:31ddfafdd3da 321 /* GPIOG configuration */
Jerome Coutant 0:31ddfafdd3da 322 GPIO_Init_Structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |
Jerome Coutant 0:31ddfafdd3da 323 GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5;
Jerome Coutant 0:31ddfafdd3da 324 HAL_GPIO_Init(GPIOG, &GPIO_Init_Structure);
Jerome Coutant 0:31ddfafdd3da 325
Jerome Coutant 0:31ddfafdd3da 326 /* GPIOD configuration */
Jerome Coutant 0:31ddfafdd3da 327 GPIO_Init_Structure.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13;
Jerome Coutant 0:31ddfafdd3da 328 HAL_GPIO_Init(GPIOD, &GPIO_Init_Structure);
Jerome Coutant 0:31ddfafdd3da 329
Jerome Coutant 0:31ddfafdd3da 330 /* GPIOE configuration */
Jerome Coutant 0:31ddfafdd3da 331 GPIO_Init_Structure.Pin = GPIO_PIN_3 | GPIO_PIN_4;
Jerome Coutant 0:31ddfafdd3da 332 HAL_GPIO_Init(GPIOE, &GPIO_Init_Structure);
Jerome Coutant 0:31ddfafdd3da 333 GPIO_Init_Structure.Pull = GPIO_PULLUP;
Jerome Coutant 0:31ddfafdd3da 334
Jerome Coutant 0:31ddfafdd3da 335
Jerome Coutant 0:31ddfafdd3da 336 /*## NOE and NWE configuration #######*/
Jerome Coutant 0:31ddfafdd3da 337 GPIO_Init_Structure.Pin = GPIO_PIN_4 |GPIO_PIN_5;
Jerome Coutant 0:31ddfafdd3da 338 HAL_GPIO_Init(GPIOD, &GPIO_Init_Structure);
Jerome Coutant 0:31ddfafdd3da 339
Jerome Coutant 0:31ddfafdd3da 340 /* Chip select configuration */
Jerome Coutant 0:31ddfafdd3da 341 /*## NE1 configuration #######*/
Jerome Coutant 0:31ddfafdd3da 342 GPIO_Init_Structure.Pin = GPIO_PIN_7;
Jerome Coutant 0:31ddfafdd3da 343 HAL_GPIO_Init(GPIOD, &GPIO_Init_Structure);
Jerome Coutant 0:31ddfafdd3da 344
Jerome Coutant 0:31ddfafdd3da 345 /*## NE2, NE3, NE4 configuration #######*/
Jerome Coutant 0:31ddfafdd3da 346 GPIO_Init_Structure.Pin = GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_12;
Jerome Coutant 0:31ddfafdd3da 347 HAL_GPIO_Init(GPIOG, &GPIO_Init_Structure);
Jerome Coutant 0:31ddfafdd3da 348
Jerome Coutant 0:31ddfafdd3da 349 /*## NBL0, NBL1 configuration #######*/
Jerome Coutant 0:31ddfafdd3da 350 GPIO_Init_Structure.Pin = GPIO_PIN_0 | GPIO_PIN_1;
Jerome Coutant 0:31ddfafdd3da 351 GPIO_Init_Structure.Pull = GPIO_PULLUP;
Jerome Coutant 0:31ddfafdd3da 352 HAL_GPIO_Init(GPIOE, &GPIO_Init_Structure);
Jerome Coutant 0:31ddfafdd3da 353
Jerome Coutant 0:31ddfafdd3da 354
Jerome Coutant 0:31ddfafdd3da 355 GPIO_Init_Structure.Pull = GPIO_PULLDOWN;
Jerome Coutant 0:31ddfafdd3da 356 /*## CLK and NWAIT configuration #######*/
Jerome Coutant 0:31ddfafdd3da 357 GPIO_Init_Structure.Pin = GPIO_PIN_3 | GPIO_PIN_6;
Jerome Coutant 0:31ddfafdd3da 358 HAL_GPIO_Init(GPIOD, &GPIO_Init_Structure);
Jerome Coutant 0:31ddfafdd3da 359
Jerome Coutant 0:31ddfafdd3da 360 /*## ADVn configuration #######*/
Jerome Coutant 0:31ddfafdd3da 361 GPIO_Init_Structure.Pin = GPIO_PIN_7;
Jerome Coutant 0:31ddfafdd3da 362 HAL_GPIO_Init(GPIOB, &GPIO_Init_Structure);
Jerome Coutant 0:31ddfafdd3da 363
Jerome Coutant 0:31ddfafdd3da 364 /* Configure common DMA parameters */
Jerome Coutant 0:31ddfafdd3da 365 dma_handle.Init.Direction = DMA_MEMORY_TO_MEMORY;
Jerome Coutant 0:31ddfafdd3da 366 dma_handle.Init.PeriphInc = DMA_PINC_ENABLE;
Jerome Coutant 0:31ddfafdd3da 367 dma_handle.Init.MemInc = DMA_MINC_ENABLE;
Jerome Coutant 0:31ddfafdd3da 368 dma_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
Jerome Coutant 0:31ddfafdd3da 369 dma_handle.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
Jerome Coutant 0:31ddfafdd3da 370 dma_handle.Init.Mode = DMA_NORMAL;
Jerome Coutant 0:31ddfafdd3da 371 dma_handle.Init.Priority = DMA_PRIORITY_HIGH;
Jerome Coutant 0:31ddfafdd3da 372
Jerome Coutant 0:31ddfafdd3da 373 dma_handle.Instance = PSRAM_DMAx_INSTANCE;
Jerome Coutant 0:31ddfafdd3da 374
Jerome Coutant 0:31ddfafdd3da 375 /* Deinitialize the Channel for new transfer */
Jerome Coutant 0:31ddfafdd3da 376 HAL_DMA_DeInit(&dma_handle);
Jerome Coutant 0:31ddfafdd3da 377
Jerome Coutant 0:31ddfafdd3da 378 /* Configure the DMA Channel */
Jerome Coutant 0:31ddfafdd3da 379 HAL_DMA_Init(&dma_handle);
Jerome Coutant 0:31ddfafdd3da 380
Jerome Coutant 0:31ddfafdd3da 381 /* Associate the DMA handle to the FMC SRAM one */
Jerome Coutant 0:31ddfafdd3da 382 hsram->hdma = &dma_handle;
Jerome Coutant 0:31ddfafdd3da 383
Jerome Coutant 0:31ddfafdd3da 384 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
Jerome Coutant 0:31ddfafdd3da 385
Jerome Coutant 0:31ddfafdd3da 386 /* NVIC configuration for DMA transfer complete interrupt */
Jerome Coutant 0:31ddfafdd3da 387 HAL_NVIC_SetPriority(PSRAM_DMAx_IRQn, 0, 0);
Jerome Coutant 0:31ddfafdd3da 388 HAL_NVIC_EnableIRQ(PSRAM_DMAx_IRQn);
Jerome Coutant 0:31ddfafdd3da 389 }
Jerome Coutant 0:31ddfafdd3da 390
Jerome Coutant 0:31ddfafdd3da 391
Jerome Coutant 0:31ddfafdd3da 392 /**
Jerome Coutant 0:31ddfafdd3da 393 * @brief DeInitializes SRAM MSP.
Jerome Coutant 0:31ddfafdd3da 394 * @param hsram: SRAM handle
Jerome Coutant 0:31ddfafdd3da 395 * @param Params
Jerome Coutant 0:31ddfafdd3da 396 * @retval None
Jerome Coutant 0:31ddfafdd3da 397 */
Jerome Coutant 0:31ddfafdd3da 398 __weak void BSP_PSRAM_MspDeInit(SRAM_HandleTypeDef *hsram, void *Params)
Jerome Coutant 0:31ddfafdd3da 399 {
Jerome Coutant 0:31ddfafdd3da 400 static DMA_HandleTypeDef dma_handle;
Jerome Coutant 0:31ddfafdd3da 401
Jerome Coutant 0:31ddfafdd3da 402 /* Disable NVIC configuration for DMA interrupt */
Jerome Coutant 0:31ddfafdd3da 403 HAL_NVIC_DisableIRQ(PSRAM_DMAx_IRQn);
Jerome Coutant 0:31ddfafdd3da 404
Jerome Coutant 0:31ddfafdd3da 405 /* Deinitialize the stream for new transfer */
Jerome Coutant 0:31ddfafdd3da 406 dma_handle.Instance = PSRAM_DMAx_INSTANCE;
Jerome Coutant 0:31ddfafdd3da 407 HAL_DMA_DeInit(&dma_handle);
Jerome Coutant 0:31ddfafdd3da 408
Jerome Coutant 0:31ddfafdd3da 409 /* Deinitialize GPIOs */
Jerome Coutant 0:31ddfafdd3da 410 HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
Jerome Coutant 0:31ddfafdd3da 411 HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_3 | GPIO_PIN_4 |
Jerome Coutant 0:31ddfafdd3da 412 GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8 |
Jerome Coutant 0:31ddfafdd3da 413 GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 |
Jerome Coutant 0:31ddfafdd3da 414 GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15);
Jerome Coutant 0:31ddfafdd3da 415 HAL_GPIO_DeInit(GPIOE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_3 | GPIO_PIN_4 |
Jerome Coutant 0:31ddfafdd3da 416 GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 |
Jerome Coutant 0:31ddfafdd3da 417 GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |
Jerome Coutant 0:31ddfafdd3da 418 GPIO_PIN_15);
Jerome Coutant 0:31ddfafdd3da 419 HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 |
Jerome Coutant 0:31ddfafdd3da 420 GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_12 | GPIO_PIN_13 |
Jerome Coutant 0:31ddfafdd3da 421 GPIO_PIN_14 | GPIO_PIN_15);
Jerome Coutant 0:31ddfafdd3da 422 HAL_GPIO_DeInit(GPIOG, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 |
Jerome Coutant 0:31ddfafdd3da 423 GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_9 | GPIO_PIN_10 |
Jerome Coutant 0:31ddfafdd3da 424 GPIO_PIN_12);
Jerome Coutant 0:31ddfafdd3da 425
Jerome Coutant 0:31ddfafdd3da 426 /* GPIO pins clock, FMC clock and DMA clock can be shut down in the applications
Jerome Coutant 0:31ddfafdd3da 427 by surcharging this __weak function */
Jerome Coutant 0:31ddfafdd3da 428 }
Jerome Coutant 0:31ddfafdd3da 429
Jerome Coutant 0:31ddfafdd3da 430 /**
Jerome Coutant 0:31ddfafdd3da 431 * @brief PSRAM power on
Jerome Coutant 0:31ddfafdd3da 432 * Power on PSRAM.
Jerome Coutant 0:31ddfafdd3da 433 */
Jerome Coutant 0:31ddfafdd3da 434 static void PSRAM_PowerOn(void)
Jerome Coutant 0:31ddfafdd3da 435 {
Jerome Coutant 0:31ddfafdd3da 436 /* Configure DSI_RESET and DSI_POWER_ON only if lcd is not currently used */
Jerome Coutant 0:31ddfafdd3da 437 if(bsp_lcd_initialized == 0)
Jerome Coutant 0:31ddfafdd3da 438 {
Jerome Coutant 0:31ddfafdd3da 439 BSP_IO_Init();
Jerome Coutant 0:31ddfafdd3da 440
Jerome Coutant 0:31ddfafdd3da 441 #if defined(USE_STM32L4R9I_DISCO_REVA) || defined(USE_STM32L4R9I_DISCO_REVB)
Jerome Coutant 0:31ddfafdd3da 442 /* Set DSI_POWER_ON to input floating to avoid I2C issue during input PD configuration */
Jerome Coutant 0:31ddfafdd3da 443 BSP_IO_ConfigPin(IO_PIN_8, IO_MODE_INPUT);
Jerome Coutant 0:31ddfafdd3da 444
Jerome Coutant 0:31ddfafdd3da 445 /* Configure the GPIO connected to DSI_RESET signal */
Jerome Coutant 0:31ddfafdd3da 446 BSP_IO_ConfigPin(IO_PIN_10, IO_MODE_OUTPUT);
Jerome Coutant 0:31ddfafdd3da 447
Jerome Coutant 0:31ddfafdd3da 448 /* Activate DSI_RESET (active low) */
Jerome Coutant 0:31ddfafdd3da 449 BSP_IO_WritePin(IO_PIN_10, GPIO_PIN_RESET);
Jerome Coutant 0:31ddfafdd3da 450
Jerome Coutant 0:31ddfafdd3da 451 /* Configure the GPIO connected to DSI_POWER_ON signal as input pull down */
Jerome Coutant 0:31ddfafdd3da 452 /* to activate 3V3_LCD. VDD_LCD is also activated if VDD = 3,3V */
Jerome Coutant 0:31ddfafdd3da 453 BSP_IO_ConfigPin(IO_PIN_8, IO_MODE_INPUT_PD);
Jerome Coutant 0:31ddfafdd3da 454
Jerome Coutant 0:31ddfafdd3da 455 /* Wait at least 1ms before enabling 1V8_LCD */
Jerome Coutant 0:31ddfafdd3da 456 HAL_Delay(1);
Jerome Coutant 0:31ddfafdd3da 457
Jerome Coutant 0:31ddfafdd3da 458 /* Configure the GPIO connected to DSI_POWER_ON signal as output low */
Jerome Coutant 0:31ddfafdd3da 459 /* to activate 1V8_LCD. VDD_LCD is also activated if VDD = 1,8V */
Jerome Coutant 0:31ddfafdd3da 460 BSP_IO_WritePin(IO_PIN_8, GPIO_PIN_RESET);
Jerome Coutant 0:31ddfafdd3da 461 BSP_IO_ConfigPin(IO_PIN_8, IO_MODE_OUTPUT);
Jerome Coutant 0:31ddfafdd3da 462 #else /* USE_STM32L4R9I_DISCO_REVA || USE_STM32L4R9I_DISCO_REVB */
Jerome Coutant 0:31ddfafdd3da 463 /* Configure the GPIO connected to DSI_3V3_POWERON signal as output low */
Jerome Coutant 0:31ddfafdd3da 464 /* to activate 3V3_LCD. VDD_LCD is also activated if VDD = 3,3V */
Jerome Coutant 0:31ddfafdd3da 465 BSP_IO_WritePin(IO_PIN_8, GPIO_PIN_RESET);
Jerome Coutant 0:31ddfafdd3da 466 BSP_IO_ConfigPin(IO_PIN_8, IO_MODE_OUTPUT);
Jerome Coutant 0:31ddfafdd3da 467
Jerome Coutant 0:31ddfafdd3da 468 /* Wait at least 1ms before enabling 1V8_LCD */
Jerome Coutant 0:31ddfafdd3da 469 HAL_Delay(1);
Jerome Coutant 0:31ddfafdd3da 470
Jerome Coutant 0:31ddfafdd3da 471 /* Configure the GPIO connected to DSI_1V8_POWERON signal as output low */
Jerome Coutant 0:31ddfafdd3da 472 /* to activate 1V8_LCD. VDD_LCD is also activated if VDD = 1,8V */
Jerome Coutant 0:31ddfafdd3da 473 BSP_IO_WritePin(AGPIO_PIN_2, GPIO_PIN_RESET);
Jerome Coutant 0:31ddfafdd3da 474 BSP_IO_ConfigPin(AGPIO_PIN_2, IO_MODE_OUTPUT);
Jerome Coutant 0:31ddfafdd3da 475 #endif /* USE_STM32L4R9I_DISCO_REVA || USE_STM32L4R9I_DISCO_REVB */
Jerome Coutant 0:31ddfafdd3da 476
Jerome Coutant 0:31ddfafdd3da 477 /* Wait at least 15 ms (minimum reset low width is 10ms and add margin for 1V8_LCD ramp-up) */
Jerome Coutant 0:31ddfafdd3da 478 HAL_Delay(15);
Jerome Coutant 0:31ddfafdd3da 479 }
Jerome Coutant 0:31ddfafdd3da 480 }
Jerome Coutant 0:31ddfafdd3da 481
Jerome Coutant 0:31ddfafdd3da 482 /**
Jerome Coutant 0:31ddfafdd3da 483 * @brief PSRAM power off
Jerome Coutant 0:31ddfafdd3da 484 * Power off PSRAM.
Jerome Coutant 0:31ddfafdd3da 485 */
Jerome Coutant 0:31ddfafdd3da 486 static void PSRAM_PowerOff(void)
Jerome Coutant 0:31ddfafdd3da 487 {
Jerome Coutant 0:31ddfafdd3da 488 /* Set DSI_POWER_ON to analog mode only if lcd is not currently used */
Jerome Coutant 0:31ddfafdd3da 489 if(bsp_lcd_initialized == 0)
Jerome Coutant 0:31ddfafdd3da 490 {
Jerome Coutant 0:31ddfafdd3da 491 #if defined(USE_STM32L4R9I_DISCO_REVA) || defined(USE_STM32L4R9I_DISCO_REVB)
Jerome Coutant 0:31ddfafdd3da 492 BSP_IO_ConfigPin(IO_PIN_8, IO_MODE_ANALOG);
Jerome Coutant 0:31ddfafdd3da 493 #else /* USE_STM32L4R9I_DISCO_REVA || USE_STM32L4R9I_DISCO_REVB */
Jerome Coutant 0:31ddfafdd3da 494 /* Disable first DSI_1V8_PWRON then DSI_3V3_PWRON */
Jerome Coutant 0:31ddfafdd3da 495 BSP_IO_ConfigPin(AGPIO_PIN_2, IO_MODE_ANALOG);
Jerome Coutant 0:31ddfafdd3da 496 BSP_IO_ConfigPin(IO_PIN_8, IO_MODE_ANALOG);
Jerome Coutant 0:31ddfafdd3da 497 #endif /* USE_STM32L4R9I_DISCO_REVA || USE_STM32L4R9I_DISCO_REVB */
Jerome Coutant 0:31ddfafdd3da 498 }
Jerome Coutant 0:31ddfafdd3da 499 }
Jerome Coutant 0:31ddfafdd3da 500
Jerome Coutant 0:31ddfafdd3da 501 /**
Jerome Coutant 0:31ddfafdd3da 502 * @}
Jerome Coutant 0:31ddfafdd3da 503 */
Jerome Coutant 0:31ddfafdd3da 504
Jerome Coutant 0:31ddfafdd3da 505 /**
Jerome Coutant 0:31ddfafdd3da 506 * @}
Jerome Coutant 0:31ddfafdd3da 507 */
Jerome Coutant 0:31ddfafdd3da 508
Jerome Coutant 0:31ddfafdd3da 509 /**
Jerome Coutant 0:31ddfafdd3da 510 * @}
Jerome Coutant 0:31ddfafdd3da 511 */
Jerome Coutant 0:31ddfafdd3da 512
Jerome Coutant 0:31ddfafdd3da 513 /**
Jerome Coutant 0:31ddfafdd3da 514 * @}
Jerome Coutant 0:31ddfafdd3da 515 */
Jerome Coutant 0:31ddfafdd3da 516
Jerome Coutant 0:31ddfafdd3da 517 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/