BSP files for STM32H747I-Discovery Copy from ST Cube delivery
Dependents: DISCO_H747I_LCD_demo DISCO_H747I_AUDIO_demo
otm8009a.c
00001 /** 00002 ****************************************************************************** 00003 * @file otm8009a.c 00004 * @author MCD Application Team 00005 * @version V1.0.2 00006 * @date 27-January-2017 00007 * @brief This file provides the LCD Driver for KoD KM-040TMP-02-0621 (WVGA) 00008 * DSI LCD Display OTM8009A. 00009 ****************************************************************************** 00010 * @attention 00011 * 00012 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00013 * 00014 * Redistribution and use in source and binary forms, with or without modification, 00015 * are permitted provided that the following conditions are met: 00016 * 1. Redistributions of source code must retain the above copyright notice, 00017 * this list of conditions and the following disclaimer. 00018 * 2. Redistributions in binary form must reproduce the above copyright notice, 00019 * this list of conditions and the following disclaimer in the documentation 00020 * and/or other materials provided with the distribution. 00021 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00022 * may be used to endorse or promote products derived from this software 00023 * without specific prior written permission. 00024 * 00025 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00026 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00027 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00028 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00029 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00030 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00031 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00032 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00033 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00034 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00035 * 00036 ****************************************************************************** 00037 */ 00038 00039 /* Includes ------------------------------------------------------------------*/ 00040 #include "otm8009a.h" 00041 00042 /** @addtogroup BSP 00043 * @{ 00044 */ 00045 00046 /** @addtogroup Components 00047 * @{ 00048 */ 00049 00050 /** @defgroup OTM8009A OTM8009A 00051 * @brief This file provides a set of functions needed to drive the 00052 * otm8009a IC display driver. 00053 * @{ 00054 */ 00055 00056 /* Private types -------------------------------------------------------------*/ 00057 /* Private variables ---------------------------------------------------------*/ 00058 /* Private constants ---------------------------------------------------------*/ 00059 /** @defgroup OTM8009A_Private_Constants OTM8009A Private Constants 00060 * @{ 00061 */ 00062 00063 /* 00064 * @brief Constant tables of register settings used to transmit DSI 00065 * command packets as power up initialization sequence of the KoD LCD (OTM8009A LCD Driver) 00066 */ 00067 const uint8_t lcdRegData1[] = {0x80,0x09,0x01,0xFF}; 00068 const uint8_t lcdRegData2[] = {0x80,0x09,0xFF}; 00069 const uint8_t lcdRegData3[] = {0x00,0x09,0x0F,0x0E,0x07,0x10,0x0B,0x0A,0x04,0x07,0x0B,0x08,0x0F,0x10,0x0A,0x01,0xE1}; 00070 const uint8_t lcdRegData4[] = {0x00,0x09,0x0F,0x0E,0x07,0x10,0x0B,0x0A,0x04,0x07,0x0B,0x08,0x0F,0x10,0x0A,0x01,0xE2}; 00071 const uint8_t lcdRegData5[] = {0x79,0x79,0xD8}; 00072 const uint8_t lcdRegData6[] = {0x00,0x01,0xB3}; 00073 const uint8_t lcdRegData7[] = {0x85,0x01,0x00,0x84,0x01,0x00,0xCE}; 00074 const uint8_t lcdRegData8[] = {0x18,0x04,0x03,0x39,0x00,0x00,0x00,0x18,0x03,0x03,0x3A,0x00,0x00,0x00,0xCE}; 00075 const uint8_t lcdRegData9[] = {0x18,0x02,0x03,0x3B,0x00,0x00,0x00,0x18,0x01,0x03,0x3C,0x00,0x00,0x00,0xCE}; 00076 const uint8_t lcdRegData10[] = {0x01,0x01,0x20,0x20,0x00,0x00,0x01,0x02,0x00,0x00,0xCF}; 00077 const uint8_t lcdRegData11[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB}; 00078 const uint8_t lcdRegData12[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB}; 00079 const uint8_t lcdRegData13[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB}; 00080 const uint8_t lcdRegData14[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB}; 00081 const uint8_t lcdRegData15[] = {0x00,0x04,0x04,0x04,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB}; 00082 const uint8_t lcdRegData16[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x04,0x04,0x04,0x00,0x00,0x00,0x00,0xCB}; 00083 const uint8_t lcdRegData17[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB}; 00084 const uint8_t lcdRegData18[] = {0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xCB}; 00085 const uint8_t lcdRegData19[] = {0x00,0x26,0x09,0x0B,0x01,0x25,0x00,0x00,0x00,0x00,0xCC}; 00086 const uint8_t lcdRegData20[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x26,0x0A,0x0C,0x02,0xCC}; 00087 const uint8_t lcdRegData21[] = {0x25,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCC}; 00088 const uint8_t lcdRegData22[] = {0x00,0x25,0x0C,0x0A,0x02,0x26,0x00,0x00,0x00,0x00,0xCC}; 00089 const uint8_t lcdRegData23[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x25,0x0B,0x09,0x01,0xCC}; 00090 const uint8_t lcdRegData24[] = {0x26,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCC}; 00091 const uint8_t lcdRegData25[] = {0xFF,0xFF,0xFF,0xFF}; 00092 /* 00093 * CASET value (Column Address Set) : X direction LCD GRAM boundaries 00094 * depending on LCD orientation mode and PASET value (Page Address Set) : Y direction 00095 * LCD GRAM boundaries depending on LCD orientation mode 00096 * XS[15:0] = 0x000 = 0, XE[15:0] = 0x31F = 799 for landscape mode : apply to CASET 00097 * YS[15:0] = 0x000 = 0, YE[15:0] = 0x31F = 799 for portrait mode : : apply to PASET 00098 */ 00099 const uint8_t lcdRegData27[] = {0x00, 0x00, 0x03, 0x1F, OTM8009A_CMD_CASET}; 00100 /* 00101 * XS[15:0] = 0x000 = 0, XE[15:0] = 0x1DF = 479 for portrait mode : apply to CASET 00102 * YS[15:0] = 0x000 = 0, YE[15:0] = 0x1DF = 479 for landscape mode : apply to PASET 00103 */ 00104 const uint8_t lcdRegData28[] = {0x00, 0x00, 0x01, 0xDF, OTM8009A_CMD_PASET}; 00105 00106 00107 const uint8_t ShortRegData1[] = {OTM8009A_CMD_NOP, 0x00}; 00108 const uint8_t ShortRegData2[] = {OTM8009A_CMD_NOP, 0x80}; 00109 const uint8_t ShortRegData3[] = {0xC4, 0x30}; 00110 const uint8_t ShortRegData4[] = {OTM8009A_CMD_NOP, 0x8A}; 00111 const uint8_t ShortRegData5[] = {0xC4, 0x40}; 00112 const uint8_t ShortRegData6[] = {OTM8009A_CMD_NOP, 0xB1}; 00113 const uint8_t ShortRegData7[] = {0xC5, 0xA9}; 00114 const uint8_t ShortRegData8[] = {OTM8009A_CMD_NOP, 0x91}; 00115 const uint8_t ShortRegData9[] = {0xC5, 0x34}; 00116 const uint8_t ShortRegData10[] = {OTM8009A_CMD_NOP, 0xB4}; 00117 const uint8_t ShortRegData11[] = {0xC0, 0x50}; 00118 const uint8_t ShortRegData12[] = {0xD9, 0x4E}; 00119 const uint8_t ShortRegData13[] = {OTM8009A_CMD_NOP, 0x81}; 00120 const uint8_t ShortRegData14[] = {0xC1, 0x66}; 00121 const uint8_t ShortRegData15[] = {OTM8009A_CMD_NOP, 0xA1}; 00122 const uint8_t ShortRegData16[] = {0xC1, 0x08}; 00123 const uint8_t ShortRegData17[] = {OTM8009A_CMD_NOP, 0x92}; 00124 const uint8_t ShortRegData18[] = {0xC5, 0x01}; 00125 const uint8_t ShortRegData19[] = {OTM8009A_CMD_NOP, 0x95}; 00126 const uint8_t ShortRegData20[] = {OTM8009A_CMD_NOP, 0x94}; 00127 const uint8_t ShortRegData21[] = {0xC5, 0x33}; 00128 const uint8_t ShortRegData22[] = {OTM8009A_CMD_NOP, 0xA3}; 00129 const uint8_t ShortRegData23[] = {0xC0, 0x1B}; 00130 const uint8_t ShortRegData24[] = {OTM8009A_CMD_NOP, 0x82}; 00131 const uint8_t ShortRegData25[] = {0xC5, 0x83}; 00132 const uint8_t ShortRegData26[] = {0xC4, 0x83}; 00133 const uint8_t ShortRegData27[] = {0xC1, 0x0E}; 00134 const uint8_t ShortRegData28[] = {OTM8009A_CMD_NOP, 0xA6}; 00135 const uint8_t ShortRegData29[] = {OTM8009A_CMD_NOP, 0xA0}; 00136 const uint8_t ShortRegData30[] = {OTM8009A_CMD_NOP, 0xB0}; 00137 const uint8_t ShortRegData31[] = {OTM8009A_CMD_NOP, 0xC0}; 00138 const uint8_t ShortRegData32[] = {OTM8009A_CMD_NOP, 0xD0}; 00139 const uint8_t ShortRegData33[] = {OTM8009A_CMD_NOP, 0x90}; 00140 const uint8_t ShortRegData34[] = {OTM8009A_CMD_NOP, 0xE0}; 00141 const uint8_t ShortRegData35[] = {OTM8009A_CMD_NOP, 0xF0}; 00142 const uint8_t ShortRegData36[] = {OTM8009A_CMD_SLPOUT, 0x00}; 00143 const uint8_t ShortRegData37[] = {OTM8009A_CMD_COLMOD, OTM8009A_COLMOD_RGB565}; 00144 const uint8_t ShortRegData38[] = {OTM8009A_CMD_COLMOD, OTM8009A_COLMOD_RGB888}; 00145 const uint8_t ShortRegData39[] = {OTM8009A_CMD_MADCTR, OTM8009A_MADCTR_MODE_LANDSCAPE}; 00146 const uint8_t ShortRegData40[] = {OTM8009A_CMD_WRDISBV, 0x7F}; 00147 const uint8_t ShortRegData41[] = {OTM8009A_CMD_WRCTRLD, 0x2C}; 00148 const uint8_t ShortRegData42[] = {OTM8009A_CMD_WRCABC, 0x02}; 00149 const uint8_t ShortRegData43[] = {OTM8009A_CMD_WRCABCMB, 0xFF}; 00150 const uint8_t ShortRegData44[] = {OTM8009A_CMD_DISPON, 0x00}; 00151 const uint8_t ShortRegData45[] = {OTM8009A_CMD_RAMWR, 0x00}; 00152 const uint8_t ShortRegData46[] = {0xCF, 0x00}; 00153 const uint8_t ShortRegData47[] = {0xC5, 0x66}; 00154 const uint8_t ShortRegData48[] = {OTM8009A_CMD_NOP, 0xB6}; 00155 const uint8_t ShortRegData49[] = {0xF5, 0x06}; 00156 const uint8_t ShortRegData50[] = {OTM8009A_CMD_NOP, 0xB1}; 00157 const uint8_t ShortRegData51[] = {0xC6, 0x06}; 00158 /** 00159 * @} 00160 */ 00161 00162 /* Private macros ------------------------------------------------------------*/ 00163 /* Private functions ---------------------------------------------------------*/ 00164 /** @defgroup OTM8009A_Exported_Variables 00165 * @{ 00166 */ 00167 00168 /** 00169 * @} 00170 */ 00171 00172 /* Exported functions ---------------------------------------------------------*/ 00173 /** @defgroup OTM8009A_Exported_Functions OTM8009A Exported Functions 00174 * @{ 00175 */ 00176 00177 /** 00178 * @brief DSI IO write short/long command. 00179 * @note : Can be surcharged by application code implementation of the function. 00180 */ 00181 __weak void DSI_IO_WriteCmd(uint32_t NbrParams, uint8_t *pParams) 00182 { 00183 /* NOTE : This function Should not be modified, when it is needed, 00184 the DSI_IO_WriteCmd could be implemented in the user file 00185 */ 00186 } 00187 00188 /** 00189 * @brief Initializes the LCD KoD display part by communication in DSI mode in Video Mode 00190 * with IC Display Driver OTM8009A (see IC Driver specification for more information). 00191 * @param hdsi_eval : pointer on DSI configuration structure 00192 * @param hdsivideo_handle : pointer on DSI video mode configuration structure 00193 * @retval Status 00194 */ 00195 uint8_t OTM8009A_Init(uint32_t ColorCoding, uint32_t orientation) 00196 { 00197 /* Enable CMD2 to access vendor specific commands */ 00198 /* Enter in command 2 mode and set EXTC to enable address shift function (0x00) */ 00199 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00200 DSI_IO_WriteCmd( 3, (uint8_t *)lcdRegData1); 00201 00202 /* Enter ORISE Command 2 */ 00203 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2); /* Shift address to 0x80 */ 00204 DSI_IO_WriteCmd( 2, (uint8_t *)lcdRegData2); 00205 00206 ///////////////////////////////////////////////////////////////////// 00207 /* SD_PCH_CTRL - 0xC480h - 129th parameter - Default 0x00 */ 00208 /* Set SD_PT */ 00209 /* -> Source output level during porch and non-display area to GND */ 00210 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2); 00211 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData3); 00212 OTM8009A_IO_Delay(10); 00213 /* Not documented */ 00214 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData4); 00215 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData5); 00216 OTM8009A_IO_Delay(10); 00217 ///////////////////////////////////////////////////////////////////// 00218 00219 /* PWR_CTRL4 - 0xC4B0h - 178th parameter - Default 0xA8 */ 00220 /* Set gvdd_en_test */ 00221 /* -> enable GVDD test mode !!! */ 00222 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData6); 00223 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData7); 00224 00225 /* PWR_CTRL2 - 0xC590h - 146th parameter - Default 0x79 */ 00226 /* Set pump 4 vgh voltage */ 00227 /* -> from 15.0v down to 13.0v */ 00228 /* Set pump 5 vgh voltage */ 00229 /* -> from -12.0v downto -9.0v */ 00230 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData8); 00231 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData9); 00232 00233 /* P_DRV_M - 0xC0B4h - 181th parameter - Default 0x00 */ 00234 /* -> Column inversion */ 00235 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData10); 00236 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData11); 00237 00238 /* VCOMDC - 0xD900h - 1st parameter - Default 0x39h */ 00239 /* VCOM Voltage settings */ 00240 /* -> from -1.0000v downto -1.2625v */ 00241 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00242 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData12); 00243 00244 /* Oscillator adjustment for Idle/Normal mode (LPDT only) set to 65Hz (default is 60Hz) */ 00245 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData13); 00246 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData14); 00247 00248 /* Video mode internal */ 00249 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData15); 00250 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData16); 00251 00252 /* PWR_CTRL2 - 0xC590h - 147h parameter - Default 0x00 */ 00253 /* Set pump 4&5 x6 */ 00254 /* -> ONLY VALID when PUMP4_EN_ASDM_HV = "0" */ 00255 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData17); 00256 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData18); 00257 00258 /* PWR_CTRL2 - 0xC590h - 150th parameter - Default 0x33h */ 00259 /* Change pump4 clock ratio */ 00260 /* -> from 1 line to 1/2 line */ 00261 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData19); 00262 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData9); 00263 00264 /* GVDD/NGVDD settings */ 00265 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00266 DSI_IO_WriteCmd( 2, (uint8_t *)lcdRegData5); 00267 00268 /* PWR_CTRL2 - 0xC590h - 149th parameter - Default 0x33h */ 00269 /* Rewrite the default value ! */ 00270 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData20); 00271 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData21); 00272 00273 /* Panel display timing Setting 3 */ 00274 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData22); 00275 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData23); 00276 00277 /* Power control 1 */ 00278 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData24); 00279 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData25); 00280 00281 /* Source driver precharge */ 00282 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData13); 00283 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData26); 00284 00285 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData15); 00286 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData27); 00287 00288 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData28); 00289 DSI_IO_WriteCmd( 2, (uint8_t *)lcdRegData6); 00290 00291 /* GOAVST */ 00292 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2); 00293 DSI_IO_WriteCmd( 6, (uint8_t *)lcdRegData7); 00294 00295 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData29); 00296 DSI_IO_WriteCmd( 14, (uint8_t *)lcdRegData8); 00297 00298 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData30); 00299 DSI_IO_WriteCmd( 14, (uint8_t *)lcdRegData9); 00300 00301 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData31); 00302 DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData10); 00303 00304 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData32); 00305 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData46); 00306 00307 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2); 00308 DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData11); 00309 00310 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData33); 00311 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData12); 00312 00313 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData29); 00314 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData13); 00315 00316 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData30); 00317 DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData14); 00318 00319 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData31); 00320 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData15); 00321 00322 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData32); 00323 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData16); 00324 00325 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData34); 00326 DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData17); 00327 00328 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData35); 00329 DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData18); 00330 00331 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2); 00332 DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData19); 00333 00334 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData33); 00335 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData20); 00336 00337 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData29); 00338 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData21); 00339 00340 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData30); 00341 DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData22); 00342 00343 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData31); 00344 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData23); 00345 00346 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData32); 00347 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData24); 00348 00349 ///////////////////////////////////////////////////////////////////////////// 00350 /* PWR_CTRL1 - 0xc580h - 130th parameter - default 0x00 */ 00351 /* Pump 1 min and max DM */ 00352 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData13); 00353 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData47); 00354 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData48); 00355 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData49); 00356 ///////////////////////////////////////////////////////////////////////////// 00357 00358 /* CABC LEDPWM frequency adjusted to 19,5kHz */ 00359 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData50); 00360 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData51); 00361 00362 /* Exit CMD2 mode */ 00363 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00364 DSI_IO_WriteCmd( 3, (uint8_t *)lcdRegData25); 00365 00366 /*************************************************************************** */ 00367 /* Standard DCS Initialization TO KEEP CAN BE DONE IN HSDT */ 00368 /*************************************************************************** */ 00369 00370 /* NOP - goes back to DCS std command ? */ 00371 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00372 00373 /* Gamma correction 2.2+ table (HSDT possible) */ 00374 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00375 DSI_IO_WriteCmd( 16, (uint8_t *)lcdRegData3); 00376 00377 /* Gamma correction 2.2- table (HSDT possible) */ 00378 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00379 DSI_IO_WriteCmd( 16, (uint8_t *)lcdRegData4); 00380 00381 /* Send Sleep Out command to display : no parameter */ 00382 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData36); 00383 00384 /* Wait for sleep out exit */ 00385 OTM8009A_IO_Delay(120); 00386 00387 switch(ColorCoding) 00388 { 00389 case OTM8009A_FORMAT_RBG565 : 00390 /* Set Pixel color format to RGB565 */ 00391 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData37); 00392 break; 00393 case OTM8009A_FORMAT_RGB888 : 00394 /* Set Pixel color format to RGB888 */ 00395 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData38); 00396 break; 00397 default : 00398 break; 00399 } 00400 00401 /* Send command to configure display in landscape orientation mode. By default 00402 the orientation mode is portrait */ 00403 if(orientation == OTM8009A_ORIENTATION_LANDSCAPE) 00404 { 00405 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData39); 00406 DSI_IO_WriteCmd( 4, (uint8_t *)lcdRegData27); 00407 DSI_IO_WriteCmd( 4, (uint8_t *)lcdRegData28); 00408 } 00409 00410 /** CABC : Content Adaptive Backlight Control section start >> */ 00411 /* Note : defaut is 0 (lowest Brightness), 0xFF is highest Brightness, try 0x7F : intermediate value */ 00412 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData40); 00413 00414 /* defaut is 0, try 0x2C - Brightness Control Block, Display Dimming & BackLight on */ 00415 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData41); 00416 00417 /* defaut is 0, try 0x02 - image Content based Adaptive Brightness [Still Picture] */ 00418 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData42); 00419 00420 /* defaut is 0 (lowest Brightness), 0xFF is highest Brightness */ 00421 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData43); 00422 00423 /** CABC : Content Adaptive Backlight Control section end << */ 00424 00425 /* Send Command Display On */ 00426 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData44); 00427 00428 /* NOP command */ 00429 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00430 00431 /* Send Command GRAM memory write (no parameters) : this initiates frame write via other DSI commands sent by */ 00432 /* DSI host from LTDC incoming pixels in video mode */ 00433 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData45); 00434 00435 return 0; 00436 } 00437 00438 /** 00439 * @} 00440 */ 00441 00442 /** 00443 * @} 00444 */ 00445 00446 /** 00447 * @} 00448 */ 00449 00450 /** 00451 * @} 00452 */ 00453 00454 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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