ST Expansion SW Team / X_NUCLEO_IKS01A2_SPI3W

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Dependencies:   ST_INTERFACES X_NUCLEO_COMMON_SPI3W

Dependents:   sensor-node-ble

Fork of X_NUCLEO_IKS01A2 by Licio Mapelli

Components/LSM6DSLSensor/LSM6DSLSensor.h@19:bfb25ac47fb5, 2017-06-05 (annotated)

Committer:
mapellil
Date:
Mon Jun 05 10:03:30 2017 +0000
Revision:
19:bfb25ac47fb5
Parent:
18:5ac81bd5cbe2
Child:
23:9ffbb64a8c19
Removed CS pin from I2C sensors constructor

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mapellil 18:5ac81bd5cbe2 1 /**
mapellil 18:5ac81bd5cbe2 2 ******************************************************************************
mapellil 18:5ac81bd5cbe2 3 * @file LSM6DSLSensor.h
mapellil 18:5ac81bd5cbe2 4 * @author CLab
mapellil 18:5ac81bd5cbe2 5 * @version V1.0.0
mapellil 18:5ac81bd5cbe2 6 * @date 5 August 2016
mapellil 18:5ac81bd5cbe2 7 * @brief Abstract Class of an LSM6DSL Inertial Measurement Unit (IMU) 6 axes
mapellil 18:5ac81bd5cbe2 8 * sensor.
mapellil 18:5ac81bd5cbe2 9 ******************************************************************************
mapellil 18:5ac81bd5cbe2 10 * @attention
mapellil 18:5ac81bd5cbe2 11 *
mapellil 18:5ac81bd5cbe2 12 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
mapellil 18:5ac81bd5cbe2 13 *
mapellil 18:5ac81bd5cbe2 14 * Redistribution and use in source and binary forms, with or without modification,
mapellil 18:5ac81bd5cbe2 15 * are permitted provided that the following conditions are met:
mapellil 18:5ac81bd5cbe2 16 * 1. Redistributions of source code must retain the above copyright notice,
mapellil 18:5ac81bd5cbe2 17 * this list of conditions and the following disclaimer.
mapellil 18:5ac81bd5cbe2 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
mapellil 18:5ac81bd5cbe2 19 * this list of conditions and the following disclaimer in the documentation
mapellil 18:5ac81bd5cbe2 20 * and/or other materials provided with the distribution.
mapellil 18:5ac81bd5cbe2 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mapellil 18:5ac81bd5cbe2 22 * may be used to endorse or promote products derived from this software
mapellil 18:5ac81bd5cbe2 23 * without specific prior written permission.
mapellil 18:5ac81bd5cbe2 24 *
mapellil 18:5ac81bd5cbe2 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mapellil 18:5ac81bd5cbe2 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mapellil 18:5ac81bd5cbe2 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mapellil 18:5ac81bd5cbe2 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mapellil 18:5ac81bd5cbe2 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mapellil 18:5ac81bd5cbe2 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mapellil 18:5ac81bd5cbe2 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mapellil 18:5ac81bd5cbe2 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mapellil 18:5ac81bd5cbe2 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mapellil 18:5ac81bd5cbe2 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mapellil 18:5ac81bd5cbe2 35 *
mapellil 18:5ac81bd5cbe2 36 ******************************************************************************
mapellil 18:5ac81bd5cbe2 37 */
mapellil 18:5ac81bd5cbe2 38
mapellil 18:5ac81bd5cbe2 39
mapellil 18:5ac81bd5cbe2 40 /* Prevent recursive inclusion -----------------------------------------------*/
mapellil 18:5ac81bd5cbe2 41
mapellil 18:5ac81bd5cbe2 42 #ifndef __LSM6DSLSensor_H__
mapellil 18:5ac81bd5cbe2 43 #define __LSM6DSLSensor_H__
mapellil 18:5ac81bd5cbe2 44
mapellil 18:5ac81bd5cbe2 45
mapellil 18:5ac81bd5cbe2 46 /* Includes ------------------------------------------------------------------*/
mapellil 18:5ac81bd5cbe2 47
mapellil 18:5ac81bd5cbe2 48 #include "DevI2C.h"
mapellil 18:5ac81bd5cbe2 49 #include "LSM6DSL_acc_gyro_driver.h"
mapellil 18:5ac81bd5cbe2 50 #include "MotionSensor.h"
mapellil 18:5ac81bd5cbe2 51 #include "GyroSensor.h"
mapellil 18:5ac81bd5cbe2 52
mapellil 18:5ac81bd5cbe2 53 /* Defines -------------------------------------------------------------------*/
mapellil 18:5ac81bd5cbe2 54
mapellil 18:5ac81bd5cbe2 55 #define LSM6DSL_ACC_SENSITIVITY_FOR_FS_2G 0.061 /**< Sensitivity value for 2 g full scale [mg/LSB] */
mapellil 18:5ac81bd5cbe2 56 #define LSM6DSL_ACC_SENSITIVITY_FOR_FS_4G 0.122 /**< Sensitivity value for 4 g full scale [mg/LSB] */
mapellil 18:5ac81bd5cbe2 57 #define LSM6DSL_ACC_SENSITIVITY_FOR_FS_8G 0.244 /**< Sensitivity value for 8 g full scale [mg/LSB] */
mapellil 18:5ac81bd5cbe2 58 #define LSM6DSL_ACC_SENSITIVITY_FOR_FS_16G 0.488 /**< Sensitivity value for 16 g full scale [mg/LSB] */
mapellil 18:5ac81bd5cbe2 59
mapellil 18:5ac81bd5cbe2 60 #define LSM6DSL_GYRO_SENSITIVITY_FOR_FS_125DPS 04.375 /**< Sensitivity value for 125 dps full scale [mdps/LSB] */
mapellil 18:5ac81bd5cbe2 61 #define LSM6DSL_GYRO_SENSITIVITY_FOR_FS_245DPS 08.750 /**< Sensitivity value for 245 dps full scale [mdps/LSB] */
mapellil 18:5ac81bd5cbe2 62 #define LSM6DSL_GYRO_SENSITIVITY_FOR_FS_500DPS 17.500 /**< Sensitivity value for 500 dps full scale [mdps/LSB] */
mapellil 18:5ac81bd5cbe2 63 #define LSM6DSL_GYRO_SENSITIVITY_FOR_FS_1000DPS 35.000 /**< Sensitivity value for 1000 dps full scale [mdps/LSB] */
mapellil 18:5ac81bd5cbe2 64 #define LSM6DSL_GYRO_SENSITIVITY_FOR_FS_2000DPS 70.000 /**< Sensitivity value for 2000 dps full scale [mdps/LSB] */
mapellil 18:5ac81bd5cbe2 65
mapellil 18:5ac81bd5cbe2 66 #define LSM6DSL_PEDOMETER_THRESHOLD_LOW 0x00 /**< Lowest value of pedometer threshold */
mapellil 18:5ac81bd5cbe2 67 #define LSM6DSL_PEDOMETER_THRESHOLD_MID_LOW 0x07
mapellil 18:5ac81bd5cbe2 68 #define LSM6DSL_PEDOMETER_THRESHOLD_MID 0x0F
mapellil 18:5ac81bd5cbe2 69 #define LSM6DSL_PEDOMETER_THRESHOLD_MID_HIGH 0x17
mapellil 18:5ac81bd5cbe2 70 #define LSM6DSL_PEDOMETER_THRESHOLD_HIGH 0x1F /**< Highest value of pedometer threshold */
mapellil 18:5ac81bd5cbe2 71
mapellil 18:5ac81bd5cbe2 72 #define LSM6DSL_WAKE_UP_THRESHOLD_LOW 0x01 /**< Lowest value of wake up threshold */
mapellil 18:5ac81bd5cbe2 73 #define LSM6DSL_WAKE_UP_THRESHOLD_MID_LOW 0x0F
mapellil 18:5ac81bd5cbe2 74 #define LSM6DSL_WAKE_UP_THRESHOLD_MID 0x1F
mapellil 18:5ac81bd5cbe2 75 #define LSM6DSL_WAKE_UP_THRESHOLD_MID_HIGH 0x2F
mapellil 18:5ac81bd5cbe2 76 #define LSM6DSL_WAKE_UP_THRESHOLD_HIGH 0x3F /**< Highest value of wake up threshold */
mapellil 18:5ac81bd5cbe2 77
mapellil 18:5ac81bd5cbe2 78 #define LSM6DSL_TAP_THRESHOLD_LOW 0x01 /**< Lowest value of wake up threshold */
mapellil 18:5ac81bd5cbe2 79 #define LSM6DSL_TAP_THRESHOLD_MID_LOW 0x08
mapellil 18:5ac81bd5cbe2 80 #define LSM6DSL_TAP_THRESHOLD_MID 0x10
mapellil 18:5ac81bd5cbe2 81 #define LSM6DSL_TAP_THRESHOLD_MID_HIGH 0x18
mapellil 18:5ac81bd5cbe2 82 #define LSM6DSL_TAP_THRESHOLD_HIGH 0x1F /**< Highest value of wake up threshold */
mapellil 18:5ac81bd5cbe2 83
mapellil 18:5ac81bd5cbe2 84 #define LSM6DSL_TAP_SHOCK_TIME_LOW 0x00 /**< Lowest value of wake up threshold */
mapellil 18:5ac81bd5cbe2 85 #define LSM6DSL_TAP_SHOCK_TIME_MID_LOW 0x01
mapellil 18:5ac81bd5cbe2 86 #define LSM6DSL_TAP_SHOCK_TIME_MID_HIGH 0x02
mapellil 18:5ac81bd5cbe2 87 #define LSM6DSL_TAP_SHOCK_TIME_HIGH 0x03 /**< Highest value of wake up threshold */
mapellil 18:5ac81bd5cbe2 88
mapellil 18:5ac81bd5cbe2 89 #define LSM6DSL_TAP_QUIET_TIME_LOW 0x00 /**< Lowest value of wake up threshold */
mapellil 18:5ac81bd5cbe2 90 #define LSM6DSL_TAP_QUIET_TIME_MID_LOW 0x01
mapellil 18:5ac81bd5cbe2 91 #define LSM6DSL_TAP_QUIET_TIME_MID_HIGH 0x02
mapellil 18:5ac81bd5cbe2 92 #define LSM6DSL_TAP_QUIET_TIME_HIGH 0x03 /**< Highest value of wake up threshold */
mapellil 18:5ac81bd5cbe2 93
mapellil 18:5ac81bd5cbe2 94 #define LSM6DSL_TAP_DURATION_TIME_LOW 0x00 /**< Lowest value of wake up threshold */
mapellil 18:5ac81bd5cbe2 95 #define LSM6DSL_TAP_DURATION_TIME_MID_LOW 0x04
mapellil 18:5ac81bd5cbe2 96 #define LSM6DSL_TAP_DURATION_TIME_MID 0x08
mapellil 18:5ac81bd5cbe2 97 #define LSM6DSL_TAP_DURATION_TIME_MID_HIGH 0x0C
mapellil 18:5ac81bd5cbe2 98 #define LSM6DSL_TAP_DURATION_TIME_HIGH 0x0F /**< Highest value of wake up threshold */
mapellil 18:5ac81bd5cbe2 99
mapellil 18:5ac81bd5cbe2 100 /* Typedefs ------------------------------------------------------------------*/
mapellil 18:5ac81bd5cbe2 101
mapellil 18:5ac81bd5cbe2 102 typedef enum
mapellil 18:5ac81bd5cbe2 103 {
mapellil 18:5ac81bd5cbe2 104 LSM6DSL_INT1_PIN,
mapellil 18:5ac81bd5cbe2 105 LSM6DSL_INT2_PIN
mapellil 18:5ac81bd5cbe2 106 } LSM6DSL_Interrupt_Pin_t;
mapellil 18:5ac81bd5cbe2 107
mapellil 18:5ac81bd5cbe2 108 typedef struct
mapellil 18:5ac81bd5cbe2 109 {
mapellil 18:5ac81bd5cbe2 110 unsigned int FreeFallStatus : 1;
mapellil 18:5ac81bd5cbe2 111 unsigned int TapStatus : 1;
mapellil 18:5ac81bd5cbe2 112 unsigned int DoubleTapStatus : 1;
mapellil 18:5ac81bd5cbe2 113 unsigned int WakeUpStatus : 1;
mapellil 18:5ac81bd5cbe2 114 unsigned int StepStatus : 1;
mapellil 18:5ac81bd5cbe2 115 unsigned int TiltStatus : 1;
mapellil 18:5ac81bd5cbe2 116 unsigned int D6DOrientationStatus : 1;
mapellil 18:5ac81bd5cbe2 117 } LSM6DSL_Event_Status_t;
mapellil 18:5ac81bd5cbe2 118
mapellil 18:5ac81bd5cbe2 119 /* Class Declaration ---------------------------------------------------------*/
mapellil 18:5ac81bd5cbe2 120
mapellil 18:5ac81bd5cbe2 121 /**
mapellil 18:5ac81bd5cbe2 122 * Abstract class of an LSM6DSL Inertial Measurement Unit (IMU) 6 axes
mapellil 18:5ac81bd5cbe2 123 * sensor.
mapellil 18:5ac81bd5cbe2 124 */
mapellil 18:5ac81bd5cbe2 125 class LSM6DSLSensor : public MotionSensor, public GyroSensor
mapellil 18:5ac81bd5cbe2 126 {
mapellil 18:5ac81bd5cbe2 127 public:
mapellil 18:5ac81bd5cbe2 128 LSM6DSLSensor(SPI3W *spi3w, PinName cs_pin, PinName INT1_pin=NC, PinName INT2_pin=NC);
mapellil 18:5ac81bd5cbe2 129 LSM6DSLSensor(SPI *spi, PinName cs_pin, PinName INT1_pin=NC, PinName INT2_pin=NC);
mapellil 19:bfb25ac47fb5 130 LSM6DSLSensor(DevI2C *i2c, uint8_t address=LSM6DSL_ACC_GYRO_I2C_ADDRESS_HIGH, PinName INT1_pin=NC, PinName INT2_pin=NC);
mapellil 18:5ac81bd5cbe2 131 virtual int init(void *init);
mapellil 18:5ac81bd5cbe2 132 virtual int read_id(uint8_t *id);
mapellil 18:5ac81bd5cbe2 133 virtual int get_x_axes(int32_t *pData);
mapellil 18:5ac81bd5cbe2 134 virtual int get_g_axes(int32_t *pData);
mapellil 18:5ac81bd5cbe2 135 virtual int get_x_sensitivity(float *pfData);
mapellil 18:5ac81bd5cbe2 136 virtual int get_g_sensitivity(float *pfData);
mapellil 18:5ac81bd5cbe2 137 virtual int get_x_axes_raw(int16_t *pData);
mapellil 18:5ac81bd5cbe2 138 virtual int get_g_axes_raw(int16_t *pData);
mapellil 18:5ac81bd5cbe2 139 virtual int get_x_odr(float *odr);
mapellil 18:5ac81bd5cbe2 140 virtual int get_g_odr(float *odr);
mapellil 18:5ac81bd5cbe2 141 virtual int set_x_odr(float odr);
mapellil 18:5ac81bd5cbe2 142 virtual int set_g_odr(float odr);
mapellil 18:5ac81bd5cbe2 143 virtual int get_x_fs(float *fullScale);
mapellil 18:5ac81bd5cbe2 144 virtual int get_g_fs(float *fullScale);
mapellil 18:5ac81bd5cbe2 145 virtual int set_x_fs(float fullScale);
mapellil 18:5ac81bd5cbe2 146 virtual int set_g_fs(float fullScale);
mapellil 18:5ac81bd5cbe2 147 int enable_x(void);
mapellil 18:5ac81bd5cbe2 148 int enable_g(void);
mapellil 18:5ac81bd5cbe2 149 int disable_x(void);
mapellil 18:5ac81bd5cbe2 150 int disable_g(void);
mapellil 18:5ac81bd5cbe2 151 int enable_free_fall_detection(LSM6DSL_Interrupt_Pin_t pin = LSM6DSL_INT1_PIN);
mapellil 18:5ac81bd5cbe2 152 int disable_free_fall_detection(void);
mapellil 18:5ac81bd5cbe2 153 int set_free_fall_threshold(uint8_t thr);
mapellil 18:5ac81bd5cbe2 154 int enable_pedometer(void);
mapellil 18:5ac81bd5cbe2 155 int disable_pedometer(void);
mapellil 18:5ac81bd5cbe2 156 int get_step_counter(uint16_t *step_count);
mapellil 18:5ac81bd5cbe2 157 int reset_step_counter(void);
mapellil 18:5ac81bd5cbe2 158 int set_pedometer_threshold(uint8_t thr);
mapellil 18:5ac81bd5cbe2 159 int enable_tilt_detection(LSM6DSL_Interrupt_Pin_t pin = LSM6DSL_INT1_PIN);
mapellil 18:5ac81bd5cbe2 160 int disable_tilt_detection(void);
mapellil 18:5ac81bd5cbe2 161 int enable_wake_up_detection(LSM6DSL_Interrupt_Pin_t pin = LSM6DSL_INT2_PIN);
mapellil 18:5ac81bd5cbe2 162 int disable_wake_up_detection(void);
mapellil 18:5ac81bd5cbe2 163 int set_wake_up_threshold(uint8_t thr);
mapellil 18:5ac81bd5cbe2 164 int enable_single_tap_detection(LSM6DSL_Interrupt_Pin_t pin = LSM6DSL_INT1_PIN);
mapellil 18:5ac81bd5cbe2 165 int disable_single_tap_detection(void);
mapellil 18:5ac81bd5cbe2 166 int enable_double_tap_detection(LSM6DSL_Interrupt_Pin_t pin = LSM6DSL_INT1_PIN);
mapellil 18:5ac81bd5cbe2 167 int disable_double_tap_detection(void);
mapellil 18:5ac81bd5cbe2 168 int set_tap_threshold(uint8_t thr);
mapellil 18:5ac81bd5cbe2 169 int set_tap_shock_time(uint8_t time);
mapellil 18:5ac81bd5cbe2 170 int set_tap_quiet_time(uint8_t time);
mapellil 18:5ac81bd5cbe2 171 int set_tap_duration_time(uint8_t time);
mapellil 18:5ac81bd5cbe2 172 int enable_6d_orientation(LSM6DSL_Interrupt_Pin_t pin = LSM6DSL_INT1_PIN);
mapellil 18:5ac81bd5cbe2 173 int disable_6d_orientation(void);
mapellil 18:5ac81bd5cbe2 174 int get_6d_orientation_xl(uint8_t *xl);
mapellil 18:5ac81bd5cbe2 175 int get_6d_orientation_xh(uint8_t *xh);
mapellil 18:5ac81bd5cbe2 176 int get_6d_orientation_yl(uint8_t *yl);
mapellil 18:5ac81bd5cbe2 177 int get_6d_orientation_yh(uint8_t *yh);
mapellil 18:5ac81bd5cbe2 178 int get_6d_orientation_zl(uint8_t *zl);
mapellil 18:5ac81bd5cbe2 179 int get_6d_orientation_zh(uint8_t *zh);
mapellil 18:5ac81bd5cbe2 180 int get_event_status(LSM6DSL_Event_Status_t *status);
mapellil 18:5ac81bd5cbe2 181 int read_reg(uint8_t reg, uint8_t *data);
mapellil 18:5ac81bd5cbe2 182 int write_reg(uint8_t reg, uint8_t data);
mapellil 18:5ac81bd5cbe2 183
mapellil 18:5ac81bd5cbe2 184 /**
mapellil 18:5ac81bd5cbe2 185 * @brief Attaching an interrupt handler to the INT1 interrupt.
mapellil 18:5ac81bd5cbe2 186 * @param fptr An interrupt handler.
mapellil 18:5ac81bd5cbe2 187 * @retval None.
mapellil 18:5ac81bd5cbe2 188 */
mapellil 18:5ac81bd5cbe2 189 void attach_int1_irq(void (*fptr)(void))
mapellil 18:5ac81bd5cbe2 190 {
mapellil 18:5ac81bd5cbe2 191 _int1_irq.rise(fptr);
mapellil 18:5ac81bd5cbe2 192 }
mapellil 18:5ac81bd5cbe2 193
mapellil 18:5ac81bd5cbe2 194 /**
mapellil 18:5ac81bd5cbe2 195 * @brief Enabling the INT1 interrupt handling.
mapellil 18:5ac81bd5cbe2 196 * @param None.
mapellil 18:5ac81bd5cbe2 197 * @retval None.
mapellil 18:5ac81bd5cbe2 198 */
mapellil 18:5ac81bd5cbe2 199 void enable_int1_irq(void)
mapellil 18:5ac81bd5cbe2 200 {
mapellil 18:5ac81bd5cbe2 201 _int1_irq.enable_irq();
mapellil 18:5ac81bd5cbe2 202 }
mapellil 18:5ac81bd5cbe2 203
mapellil 18:5ac81bd5cbe2 204 /**
mapellil 18:5ac81bd5cbe2 205 * @brief Disabling the INT1 interrupt handling.
mapellil 18:5ac81bd5cbe2 206 * @param None.
mapellil 18:5ac81bd5cbe2 207 * @retval None.
mapellil 18:5ac81bd5cbe2 208 */
mapellil 18:5ac81bd5cbe2 209 void disable_int1_irq(void)
mapellil 18:5ac81bd5cbe2 210 {
mapellil 18:5ac81bd5cbe2 211 _int1_irq.disable_irq();
mapellil 18:5ac81bd5cbe2 212 }
mapellil 18:5ac81bd5cbe2 213
mapellil 18:5ac81bd5cbe2 214 /**
mapellil 18:5ac81bd5cbe2 215 * @brief Attaching an interrupt handler to the INT2 interrupt.
mapellil 18:5ac81bd5cbe2 216 * @param fptr An interrupt handler.
mapellil 18:5ac81bd5cbe2 217 * @retval None.
mapellil 18:5ac81bd5cbe2 218 */
mapellil 18:5ac81bd5cbe2 219 void attach_int2_irq(void (*fptr)(void))
mapellil 18:5ac81bd5cbe2 220 {
mapellil 18:5ac81bd5cbe2 221 _int2_irq.rise(fptr);
mapellil 18:5ac81bd5cbe2 222 }
mapellil 18:5ac81bd5cbe2 223
mapellil 18:5ac81bd5cbe2 224 /**
mapellil 18:5ac81bd5cbe2 225 * @brief Enabling the INT2 interrupt handling.
mapellil 18:5ac81bd5cbe2 226 * @param None.
mapellil 18:5ac81bd5cbe2 227 * @retval None.
mapellil 18:5ac81bd5cbe2 228 */
mapellil 18:5ac81bd5cbe2 229 void enable_int2_irq(void)
mapellil 18:5ac81bd5cbe2 230 {
mapellil 18:5ac81bd5cbe2 231 _int2_irq.enable_irq();
mapellil 18:5ac81bd5cbe2 232 }
mapellil 18:5ac81bd5cbe2 233
mapellil 18:5ac81bd5cbe2 234 /**
mapellil 18:5ac81bd5cbe2 235 * @brief Disabling the INT2 interrupt handling.
mapellil 18:5ac81bd5cbe2 236 * @param None.
mapellil 18:5ac81bd5cbe2 237 * @retval None.
mapellil 18:5ac81bd5cbe2 238 */
mapellil 18:5ac81bd5cbe2 239 void disable_int2_irq(void)
mapellil 18:5ac81bd5cbe2 240 {
mapellil 18:5ac81bd5cbe2 241 _int2_irq.disable_irq();
mapellil 18:5ac81bd5cbe2 242 }
mapellil 18:5ac81bd5cbe2 243
mapellil 18:5ac81bd5cbe2 244 /**
mapellil 18:5ac81bd5cbe2 245 * @brief Utility function to read data.
mapellil 18:5ac81bd5cbe2 246 * @param pBuffer: pointer to data to be read.
mapellil 18:5ac81bd5cbe2 247 * @param RegisterAddr: specifies internal address register to be read.
mapellil 18:5ac81bd5cbe2 248 * @param NumByteToRead: number of bytes to be read.
mapellil 18:5ac81bd5cbe2 249 * @retval 0 if ok, an error code otherwise.
mapellil 18:5ac81bd5cbe2 250 */
mapellil 18:5ac81bd5cbe2 251 uint8_t io_read(uint8_t* pBuffer, uint8_t RegisterAddr, uint16_t NumByteToRead)
mapellil 18:5ac81bd5cbe2 252 {
mapellil 18:5ac81bd5cbe2 253 if (_dev_spi) {
mapellil 18:5ac81bd5cbe2 254 /* Write Reg Address */
mapellil 18:5ac81bd5cbe2 255 _dev_spi->lock();
mapellil 18:5ac81bd5cbe2 256 _cs_pin = 0;
mapellil 18:5ac81bd5cbe2 257 _dev_spi->write(RegisterAddr | 0x80);
mapellil 18:5ac81bd5cbe2 258
mapellil 18:5ac81bd5cbe2 259 for (int i=0; i<NumByteToRead; i++) {
mapellil 18:5ac81bd5cbe2 260 *(pBuffer+i) = _dev_spi->write(0x00);
mapellil 18:5ac81bd5cbe2 261 }
mapellil 18:5ac81bd5cbe2 262
mapellil 18:5ac81bd5cbe2 263 _cs_pin = 1;
mapellil 18:5ac81bd5cbe2 264 _dev_spi->unlock();
mapellil 18:5ac81bd5cbe2 265 return 0;
mapellil 18:5ac81bd5cbe2 266 }
mapellil 18:5ac81bd5cbe2 267
mapellil 18:5ac81bd5cbe2 268 if (_dev_spi3w) return _dev_spi3w->spi3w_read(pBuffer, &_cs_pin, RegisterAddr, NumByteToRead);
mapellil 18:5ac81bd5cbe2 269 if (_dev_i2c) return (uint8_t) _dev_i2c->i2c_read(pBuffer, _address, RegisterAddr, NumByteToRead);
mapellil 18:5ac81bd5cbe2 270 return 1;
mapellil 18:5ac81bd5cbe2 271 }
mapellil 18:5ac81bd5cbe2 272
mapellil 18:5ac81bd5cbe2 273 /**
mapellil 18:5ac81bd5cbe2 274 * @brief Utility function to write data.
mapellil 18:5ac81bd5cbe2 275 * @param pBuffer: pointer to data to be written.
mapellil 18:5ac81bd5cbe2 276 * @param RegisterAddr: specifies internal address register to be written.
mapellil 18:5ac81bd5cbe2 277 * @param NumByteToWrite: number of bytes to write.
mapellil 18:5ac81bd5cbe2 278 * @retval 0 if ok, an error code otherwise.
mapellil 18:5ac81bd5cbe2 279 */
mapellil 18:5ac81bd5cbe2 280 uint8_t io_write(uint8_t* pBuffer, uint8_t RegisterAddr, uint16_t NumByteToWrite)
mapellil 18:5ac81bd5cbe2 281 {
mapellil 18:5ac81bd5cbe2 282 int data;
mapellil 18:5ac81bd5cbe2 283 if (_dev_spi) {
mapellil 18:5ac81bd5cbe2 284 _dev_spi->lock();
mapellil 18:5ac81bd5cbe2 285 _cs_pin = 0;
mapellil 18:5ac81bd5cbe2 286 data = _dev_spi->write(RegisterAddr);
mapellil 18:5ac81bd5cbe2 287
mapellil 18:5ac81bd5cbe2 288 for (int i=0; i<NumByteToWrite; i++) {
mapellil 18:5ac81bd5cbe2 289 data = _dev_spi->write(*(pBuffer+i));
mapellil 18:5ac81bd5cbe2 290 }
mapellil 18:5ac81bd5cbe2 291
mapellil 18:5ac81bd5cbe2 292 _cs_pin = 1;
mapellil 18:5ac81bd5cbe2 293 _dev_spi->unlock();
mapellil 18:5ac81bd5cbe2 294 return data;
mapellil 18:5ac81bd5cbe2 295 }
mapellil 18:5ac81bd5cbe2 296
mapellil 18:5ac81bd5cbe2 297 if (_dev_spi3w) return _dev_spi3w->spi3w_write(pBuffer, &_cs_pin, RegisterAddr, NumByteToWrite);
mapellil 18:5ac81bd5cbe2 298 if (_dev_i2c) return (uint8_t) _dev_i2c->i2c_write(pBuffer, _address, RegisterAddr, NumByteToWrite);
mapellil 18:5ac81bd5cbe2 299 return 1;
mapellil 18:5ac81bd5cbe2 300 }
mapellil 18:5ac81bd5cbe2 301
mapellil 18:5ac81bd5cbe2 302 private:
mapellil 18:5ac81bd5cbe2 303 int set_x_odr_when_enabled(float odr);
mapellil 18:5ac81bd5cbe2 304 int set_g_odr_when_enabled(float odr);
mapellil 18:5ac81bd5cbe2 305 int set_x_odr_when_disabled(float odr);
mapellil 18:5ac81bd5cbe2 306 int set_g_odr_when_disabled(float odr);
mapellil 18:5ac81bd5cbe2 307
mapellil 18:5ac81bd5cbe2 308 /* Helper classes. */
mapellil 18:5ac81bd5cbe2 309 SPI3W *_dev_spi3w;
mapellil 18:5ac81bd5cbe2 310 SPI *_dev_spi;
mapellil 18:5ac81bd5cbe2 311 DevI2C *_dev_i2c;
mapellil 18:5ac81bd5cbe2 312
mapellil 18:5ac81bd5cbe2 313 /* Configuration */
mapellil 18:5ac81bd5cbe2 314 uint8_t _address;
mapellil 18:5ac81bd5cbe2 315 DigitalOut _cs_pin;
mapellil 18:5ac81bd5cbe2 316 InterruptIn _int1_irq;
mapellil 18:5ac81bd5cbe2 317 InterruptIn _int2_irq;
mapellil 18:5ac81bd5cbe2 318
mapellil 18:5ac81bd5cbe2 319 uint8_t _x_is_enabled;
mapellil 18:5ac81bd5cbe2 320 float _x_last_odr;
mapellil 18:5ac81bd5cbe2 321 uint8_t _g_is_enabled;
mapellil 18:5ac81bd5cbe2 322 float _g_last_odr;
mapellil 18:5ac81bd5cbe2 323 };
mapellil 18:5ac81bd5cbe2 324
mapellil 18:5ac81bd5cbe2 325 #ifdef __cplusplus
mapellil 18:5ac81bd5cbe2 326 extern "C" {
mapellil 18:5ac81bd5cbe2 327 #endif
mapellil 18:5ac81bd5cbe2 328 uint8_t LSM6DSL_io_write( void *handle, uint8_t WriteAddr, uint8_t *pBuffer, uint16_t nBytesToWrite );
mapellil 18:5ac81bd5cbe2 329 uint8_t LSM6DSL_io_read( void *handle, uint8_t ReadAddr, uint8_t *pBuffer, uint16_t nBytesToRead );
mapellil 18:5ac81bd5cbe2 330 #ifdef __cplusplus
mapellil 18:5ac81bd5cbe2 331 }
mapellil 18:5ac81bd5cbe2 332 #endif
mapellil 18:5ac81bd5cbe2 333
mapellil 18:5ac81bd5cbe2 334 #endif