ST Expansion SW Team / VL53L1CB

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Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   VL53L1CB_noshield_1sensor_polls_auton VL53L1CB_noshield_1sensor_interrupt_auton X_NUCLEO_53L1A2

inc/vl53l1_register_map.h@0:3ac96e360672, 2020-11-06 (annotated)

Committer:
charlesmn
Date:
Fri Nov 06 10:06:37 2020 +0000
Revision:
0:3ac96e360672
Child:
7:1add29d51e72
Library for ST Vl53L1A1 time of flight sensor.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
charlesmn 0:3ac96e360672 1
charlesmn 0:3ac96e360672 2 /*******************************************************************************
charlesmn 0:3ac96e360672 3 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
charlesmn 0:3ac96e360672 4
charlesmn 0:3ac96e360672 5 This file is part of VL53L1 Core and is dual licensed,
charlesmn 0:3ac96e360672 6 either 'STMicroelectronics
charlesmn 0:3ac96e360672 7 Proprietary license'
charlesmn 0:3ac96e360672 8 or 'BSD 3-clause "New" or "Revised" License' , at your option.
charlesmn 0:3ac96e360672 9
charlesmn 0:3ac96e360672 10 ********************************************************************************
charlesmn 0:3ac96e360672 11
charlesmn 0:3ac96e360672 12 'STMicroelectronics Proprietary license'
charlesmn 0:3ac96e360672 13
charlesmn 0:3ac96e360672 14 ********************************************************************************
charlesmn 0:3ac96e360672 15
charlesmn 0:3ac96e360672 16 License terms: STMicroelectronics Proprietary in accordance with licensing
charlesmn 0:3ac96e360672 17 terms at www.st.com/sla0081
charlesmn 0:3ac96e360672 18
charlesmn 0:3ac96e360672 19 STMicroelectronics confidential
charlesmn 0:3ac96e360672 20 Reproduction and Communication of this document is strictly prohibited unless
charlesmn 0:3ac96e360672 21 specifically authorized in writing by STMicroelectronics.
charlesmn 0:3ac96e360672 22
charlesmn 0:3ac96e360672 23
charlesmn 0:3ac96e360672 24 ********************************************************************************
charlesmn 0:3ac96e360672 25
charlesmn 0:3ac96e360672 26 Alternatively, VL53L1 Core may be distributed under the terms of
charlesmn 0:3ac96e360672 27 'BSD 3-clause "New" or "Revised" License', in which case the following
charlesmn 0:3ac96e360672 28 provisions apply instead of the ones
charlesmn 0:3ac96e360672 29 mentioned above :
charlesmn 0:3ac96e360672 30
charlesmn 0:3ac96e360672 31 ********************************************************************************
charlesmn 0:3ac96e360672 32
charlesmn 0:3ac96e360672 33 License terms: BSD 3-clause "New" or "Revised" License.
charlesmn 0:3ac96e360672 34
charlesmn 0:3ac96e360672 35 Redistribution and use in source and binary forms, with or without
charlesmn 0:3ac96e360672 36 modification, are permitted provided that the following conditions are met:
charlesmn 0:3ac96e360672 37
charlesmn 0:3ac96e360672 38 1. Redistributions of source code must retain the above copyright notice, this
charlesmn 0:3ac96e360672 39 list of conditions and the following disclaimer.
charlesmn 0:3ac96e360672 40
charlesmn 0:3ac96e360672 41 2. Redistributions in binary form must reproduce the above copyright notice,
charlesmn 0:3ac96e360672 42 this list of conditions and the following disclaimer in the documentation
charlesmn 0:3ac96e360672 43 and/or other materials provided with the distribution.
charlesmn 0:3ac96e360672 44
charlesmn 0:3ac96e360672 45 3. Neither the name of the copyright holder nor the names of its contributors
charlesmn 0:3ac96e360672 46 may be used to endorse or promote products derived from this software
charlesmn 0:3ac96e360672 47 without specific prior written permission.
charlesmn 0:3ac96e360672 48
charlesmn 0:3ac96e360672 49 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
charlesmn 0:3ac96e360672 50 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
charlesmn 0:3ac96e360672 51 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
charlesmn 0:3ac96e360672 52 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
charlesmn 0:3ac96e360672 53 FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
charlesmn 0:3ac96e360672 54 DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
charlesmn 0:3ac96e360672 55 SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
charlesmn 0:3ac96e360672 56 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
charlesmn 0:3ac96e360672 57 OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
charlesmn 0:3ac96e360672 58 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
charlesmn 0:3ac96e360672 59
charlesmn 0:3ac96e360672 60
charlesmn 0:3ac96e360672 61 ********************************************************************************
charlesmn 0:3ac96e360672 62
charlesmn 0:3ac96e360672 63 */
charlesmn 0:3ac96e360672 64
charlesmn 0:3ac96e360672 65
charlesmn 0:3ac96e360672 66
charlesmn 0:3ac96e360672 67
charlesmn 0:3ac96e360672 68 #ifndef _VL53L1_REGISTER_MAP_H_
charlesmn 0:3ac96e360672 69 #define _VL53L1_REGISTER_MAP_H_
charlesmn 0:3ac96e360672 70
charlesmn 0:3ac96e360672 71
charlesmn 0:3ac96e360672 72
charlesmn 0:3ac96e360672 73 #define VL53L1_SOFT_RESET 0x0000
charlesmn 0:3ac96e360672 74
charlesmn 0:3ac96e360672 75 #define VL53L1_I2C_SLAVE__DEVICE_ADDRESS 0x0001
charlesmn 0:3ac96e360672 76
charlesmn 0:3ac96e360672 77 #define VL53L1_ANA_CONFIG__VHV_REF_SEL_VDDPIX 0x0002
charlesmn 0:3ac96e360672 78
charlesmn 0:3ac96e360672 79 #define VL53L1_ANA_CONFIG__VHV_REF_SEL_VQUENCH 0x0003
charlesmn 0:3ac96e360672 80
charlesmn 0:3ac96e360672 81 #define VL53L1_ANA_CONFIG__REG_AVDD1V2_SEL 0x0004
charlesmn 0:3ac96e360672 82
charlesmn 0:3ac96e360672 83 #define VL53L1_ANA_CONFIG__FAST_OSC__TRIM 0x0005
charlesmn 0:3ac96e360672 84
charlesmn 0:3ac96e360672 85 #define VL53L1_OSC_MEASURED__FAST_OSC__FREQUENCY 0x0006
charlesmn 0:3ac96e360672 86
charlesmn 0:3ac96e360672 87 #define VL53L1_OSC_MEASURED__FAST_OSC__FREQUENCY_HI 0x0006
charlesmn 0:3ac96e360672 88
charlesmn 0:3ac96e360672 89 #define VL53L1_OSC_MEASURED__FAST_OSC__FREQUENCY_LO 0x0007
charlesmn 0:3ac96e360672 90
charlesmn 0:3ac96e360672 91 #define VL53L1_VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND 0x0008
charlesmn 0:3ac96e360672 92
charlesmn 0:3ac96e360672 93 #define VL53L1_VHV_CONFIG__COUNT_THRESH 0x0009
charlesmn 0:3ac96e360672 94
charlesmn 0:3ac96e360672 95 #define VL53L1_VHV_CONFIG__OFFSET 0x000A
charlesmn 0:3ac96e360672 96
charlesmn 0:3ac96e360672 97 #define VL53L1_VHV_CONFIG__INIT 0x000B
charlesmn 0:3ac96e360672 98
charlesmn 0:3ac96e360672 99 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_0 0x000D
charlesmn 0:3ac96e360672 100
charlesmn 0:3ac96e360672 101 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_1 0x000E
charlesmn 0:3ac96e360672 102
charlesmn 0:3ac96e360672 103 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_2 0x000F
charlesmn 0:3ac96e360672 104
charlesmn 0:3ac96e360672 105 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_3 0x0010
charlesmn 0:3ac96e360672 106
charlesmn 0:3ac96e360672 107 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_4 0x0011
charlesmn 0:3ac96e360672 108
charlesmn 0:3ac96e360672 109 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_5 0x0012
charlesmn 0:3ac96e360672 110
charlesmn 0:3ac96e360672 111 #define VL53L1_GLOBAL_CONFIG__REF_EN_START_SELECT 0x0013
charlesmn 0:3ac96e360672 112
charlesmn 0:3ac96e360672 113 #define VL53L1_REF_SPAD_MAN__NUM_REQUESTED_REF_SPADS 0x0014
charlesmn 0:3ac96e360672 114
charlesmn 0:3ac96e360672 115 #define VL53L1_REF_SPAD_MAN__REF_LOCATION 0x0015
charlesmn 0:3ac96e360672 116
charlesmn 0:3ac96e360672 117 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS 0x0016
charlesmn 0:3ac96e360672 118
charlesmn 0:3ac96e360672 119 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS_HI 0x0016
charlesmn 0:3ac96e360672 120
charlesmn 0:3ac96e360672 121 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS_LO 0x0017
charlesmn 0:3ac96e360672 122
charlesmn 0:3ac96e360672 123 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS 0x0018
charlesmn 0:3ac96e360672 124
charlesmn 0:3ac96e360672 125 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS_HI 0x0018
charlesmn 0:3ac96e360672 126
charlesmn 0:3ac96e360672 127 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS_LO 0x0019
charlesmn 0:3ac96e360672 128
charlesmn 0:3ac96e360672 129 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS 0x001A
charlesmn 0:3ac96e360672 130
charlesmn 0:3ac96e360672 131 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS_HI 0x001A
charlesmn 0:3ac96e360672 132
charlesmn 0:3ac96e360672 133 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS_LO 0x001B
charlesmn 0:3ac96e360672 134
charlesmn 0:3ac96e360672 135 #define VL53L1_REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS 0x001C
charlesmn 0:3ac96e360672 136
charlesmn 0:3ac96e360672 137 #define VL53L1_REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS_HI 0x001C
charlesmn 0:3ac96e360672 138
charlesmn 0:3ac96e360672 139 #define VL53L1_REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS_LO 0x001D
charlesmn 0:3ac96e360672 140
charlesmn 0:3ac96e360672 141 #define VL53L1_ALGO__PART_TO_PART_RANGE_OFFSET_MM 0x001E
charlesmn 0:3ac96e360672 142
charlesmn 0:3ac96e360672 143 #define VL53L1_ALGO__PART_TO_PART_RANGE_OFFSET_MM_HI 0x001E
charlesmn 0:3ac96e360672 144
charlesmn 0:3ac96e360672 145 #define VL53L1_ALGO__PART_TO_PART_RANGE_OFFSET_MM_LO 0x001F
charlesmn 0:3ac96e360672 146
charlesmn 0:3ac96e360672 147 #define VL53L1_MM_CONFIG__INNER_OFFSET_MM 0x0020
charlesmn 0:3ac96e360672 148
charlesmn 0:3ac96e360672 149 #define VL53L1_MM_CONFIG__INNER_OFFSET_MM_HI 0x0020
charlesmn 0:3ac96e360672 150
charlesmn 0:3ac96e360672 151 #define VL53L1_MM_CONFIG__INNER_OFFSET_MM_LO 0x0021
charlesmn 0:3ac96e360672 152
charlesmn 0:3ac96e360672 153 #define VL53L1_MM_CONFIG__OUTER_OFFSET_MM 0x0022
charlesmn 0:3ac96e360672 154
charlesmn 0:3ac96e360672 155 #define VL53L1_MM_CONFIG__OUTER_OFFSET_MM_HI 0x0022
charlesmn 0:3ac96e360672 156
charlesmn 0:3ac96e360672 157 #define VL53L1_MM_CONFIG__OUTER_OFFSET_MM_LO 0x0023
charlesmn 0:3ac96e360672 158
charlesmn 0:3ac96e360672 159 #define VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS 0x0024
charlesmn 0:3ac96e360672 160
charlesmn 0:3ac96e360672 161 #define VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS_HI 0x0024
charlesmn 0:3ac96e360672 162
charlesmn 0:3ac96e360672 163 #define VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS_LO 0x0025
charlesmn 0:3ac96e360672 164
charlesmn 0:3ac96e360672 165 #define VL53L1_DEBUG__CTRL 0x0026
charlesmn 0:3ac96e360672 166
charlesmn 0:3ac96e360672 167 #define VL53L1_TEST_MODE__CTRL 0x0027
charlesmn 0:3ac96e360672 168
charlesmn 0:3ac96e360672 169 #define VL53L1_CLK_GATING__CTRL 0x0028
charlesmn 0:3ac96e360672 170
charlesmn 0:3ac96e360672 171 #define VL53L1_NVM_BIST__CTRL 0x0029
charlesmn 0:3ac96e360672 172
charlesmn 0:3ac96e360672 173 #define VL53L1_NVM_BIST__NUM_NVM_WORDS 0x002A
charlesmn 0:3ac96e360672 174
charlesmn 0:3ac96e360672 175 #define VL53L1_NVM_BIST__START_ADDRESS 0x002B
charlesmn 0:3ac96e360672 176
charlesmn 0:3ac96e360672 177 #define VL53L1_HOST_IF__STATUS 0x002C
charlesmn 0:3ac96e360672 178
charlesmn 0:3ac96e360672 179 #define VL53L1_PAD_I2C_HV__CONFIG 0x002D
charlesmn 0:3ac96e360672 180
charlesmn 0:3ac96e360672 181 #define VL53L1_PAD_I2C_HV__EXTSUP_CONFIG 0x002E
charlesmn 0:3ac96e360672 182
charlesmn 0:3ac96e360672 183 #define VL53L1_GPIO_HV_PAD__CTRL 0x002F
charlesmn 0:3ac96e360672 184
charlesmn 0:3ac96e360672 185 #define VL53L1_GPIO_HV_MUX__CTRL 0x0030
charlesmn 0:3ac96e360672 186
charlesmn 0:3ac96e360672 187 #define VL53L1_GPIO__TIO_HV_STATUS 0x0031
charlesmn 0:3ac96e360672 188
charlesmn 0:3ac96e360672 189 #define VL53L1_GPIO__FIO_HV_STATUS 0x0032
charlesmn 0:3ac96e360672 190
charlesmn 0:3ac96e360672 191 #define VL53L1_ANA_CONFIG__SPAD_SEL_PSWIDTH 0x0033
charlesmn 0:3ac96e360672 192
charlesmn 0:3ac96e360672 193 #define VL53L1_ANA_CONFIG__VCSEL_PULSE_WIDTH_OFFSET 0x0034
charlesmn 0:3ac96e360672 194
charlesmn 0:3ac96e360672 195 #define VL53L1_ANA_CONFIG__FAST_OSC__CONFIG_CTRL 0x0035
charlesmn 0:3ac96e360672 196
charlesmn 0:3ac96e360672 197 #define VL53L1_SIGMA_ESTIMATOR__EFFECTIVE_PULSE_WIDTH_NS 0x0036
charlesmn 0:3ac96e360672 198
charlesmn 0:3ac96e360672 199 #define VL53L1_SIGMA_ESTIMATOR__EFFECTIVE_AMBIENT_WIDTH_NS 0x0037
charlesmn 0:3ac96e360672 200
charlesmn 0:3ac96e360672 201 #define VL53L1_SIGMA_ESTIMATOR__SIGMA_REF_MM 0x0038
charlesmn 0:3ac96e360672 202
charlesmn 0:3ac96e360672 203 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_VALID_HEIGHT_MM 0x0039
charlesmn 0:3ac96e360672 204
charlesmn 0:3ac96e360672 205 #define VL53L1_SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_0 0x003A
charlesmn 0:3ac96e360672 206
charlesmn 0:3ac96e360672 207 #define VL53L1_SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_1 0x003B
charlesmn 0:3ac96e360672 208
charlesmn 0:3ac96e360672 209 #define VL53L1_ALGO__RANGE_IGNORE_THRESHOLD_MCPS 0x003C
charlesmn 0:3ac96e360672 210
charlesmn 0:3ac96e360672 211 #define VL53L1_ALGO__RANGE_IGNORE_THRESHOLD_MCPS_HI 0x003C
charlesmn 0:3ac96e360672 212
charlesmn 0:3ac96e360672 213 #define VL53L1_ALGO__RANGE_IGNORE_THRESHOLD_MCPS_LO 0x003D
charlesmn 0:3ac96e360672 214
charlesmn 0:3ac96e360672 215 #define VL53L1_ALGO__RANGE_IGNORE_VALID_HEIGHT_MM 0x003E
charlesmn 0:3ac96e360672 216
charlesmn 0:3ac96e360672 217 #define VL53L1_ALGO__RANGE_MIN_CLIP 0x003F
charlesmn 0:3ac96e360672 218
charlesmn 0:3ac96e360672 219 #define VL53L1_ALGO__CONSISTENCY_CHECK__TOLERANCE 0x0040
charlesmn 0:3ac96e360672 220
charlesmn 0:3ac96e360672 221 #define VL53L1_SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_2 0x0041
charlesmn 0:3ac96e360672 222
charlesmn 0:3ac96e360672 223 #define VL53L1_SD_CONFIG__RESET_STAGES_MSB 0x0042
charlesmn 0:3ac96e360672 224
charlesmn 0:3ac96e360672 225 #define VL53L1_SD_CONFIG__RESET_STAGES_LSB 0x0043
charlesmn 0:3ac96e360672 226
charlesmn 0:3ac96e360672 227 #define VL53L1_GPH_CONFIG__STREAM_COUNT_UPDATE_VALUE 0x0044
charlesmn 0:3ac96e360672 228
charlesmn 0:3ac96e360672 229 #define VL53L1_GLOBAL_CONFIG__STREAM_DIVIDER 0x0045
charlesmn 0:3ac96e360672 230
charlesmn 0:3ac96e360672 231 #define VL53L1_SYSTEM__INTERRUPT_CONFIG_GPIO 0x0046
charlesmn 0:3ac96e360672 232
charlesmn 0:3ac96e360672 233 #define VL53L1_CAL_CONFIG__VCSEL_START 0x0047
charlesmn 0:3ac96e360672 234
charlesmn 0:3ac96e360672 235 #define VL53L1_CAL_CONFIG__REPEAT_RATE 0x0048
charlesmn 0:3ac96e360672 236
charlesmn 0:3ac96e360672 237 #define VL53L1_CAL_CONFIG__REPEAT_RATE_HI 0x0048
charlesmn 0:3ac96e360672 238
charlesmn 0:3ac96e360672 239 #define VL53L1_CAL_CONFIG__REPEAT_RATE_LO 0x0049
charlesmn 0:3ac96e360672 240
charlesmn 0:3ac96e360672 241 #define VL53L1_GLOBAL_CONFIG__VCSEL_WIDTH 0x004A
charlesmn 0:3ac96e360672 242
charlesmn 0:3ac96e360672 243 #define VL53L1_PHASECAL_CONFIG__TIMEOUT_MACROP 0x004B
charlesmn 0:3ac96e360672 244
charlesmn 0:3ac96e360672 245 #define VL53L1_PHASECAL_CONFIG__TARGET 0x004C
charlesmn 0:3ac96e360672 246
charlesmn 0:3ac96e360672 247 #define VL53L1_PHASECAL_CONFIG__OVERRIDE 0x004D
charlesmn 0:3ac96e360672 248
charlesmn 0:3ac96e360672 249 #define VL53L1_DSS_CONFIG__ROI_MODE_CONTROL 0x004F
charlesmn 0:3ac96e360672 250
charlesmn 0:3ac96e360672 251 #define VL53L1_SYSTEM__THRESH_RATE_HIGH 0x0050
charlesmn 0:3ac96e360672 252
charlesmn 0:3ac96e360672 253 #define VL53L1_SYSTEM__THRESH_RATE_HIGH_HI 0x0050
charlesmn 0:3ac96e360672 254
charlesmn 0:3ac96e360672 255 #define VL53L1_SYSTEM__THRESH_RATE_HIGH_LO 0x0051
charlesmn 0:3ac96e360672 256
charlesmn 0:3ac96e360672 257 #define VL53L1_SYSTEM__THRESH_RATE_LOW 0x0052
charlesmn 0:3ac96e360672 258
charlesmn 0:3ac96e360672 259 #define VL53L1_SYSTEM__THRESH_RATE_LOW_HI 0x0052
charlesmn 0:3ac96e360672 260
charlesmn 0:3ac96e360672 261 #define VL53L1_SYSTEM__THRESH_RATE_LOW_LO 0x0053
charlesmn 0:3ac96e360672 262
charlesmn 0:3ac96e360672 263 #define VL53L1_DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT 0x0054
charlesmn 0:3ac96e360672 264
charlesmn 0:3ac96e360672 265 #define VL53L1_DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_HI 0x0054
charlesmn 0:3ac96e360672 266
charlesmn 0:3ac96e360672 267 #define VL53L1_DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_LO 0x0055
charlesmn 0:3ac96e360672 268
charlesmn 0:3ac96e360672 269 #define VL53L1_DSS_CONFIG__MANUAL_BLOCK_SELECT 0x0056
charlesmn 0:3ac96e360672 270
charlesmn 0:3ac96e360672 271 #define VL53L1_DSS_CONFIG__APERTURE_ATTENUATION 0x0057
charlesmn 0:3ac96e360672 272
charlesmn 0:3ac96e360672 273 #define VL53L1_DSS_CONFIG__MAX_SPADS_LIMIT 0x0058
charlesmn 0:3ac96e360672 274
charlesmn 0:3ac96e360672 275 #define VL53L1_DSS_CONFIG__MIN_SPADS_LIMIT 0x0059
charlesmn 0:3ac96e360672 276
charlesmn 0:3ac96e360672 277 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_A_HI 0x005A
charlesmn 0:3ac96e360672 278
charlesmn 0:3ac96e360672 279 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_A_LO 0x005B
charlesmn 0:3ac96e360672 280
charlesmn 0:3ac96e360672 281 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_B_HI 0x005C
charlesmn 0:3ac96e360672 282
charlesmn 0:3ac96e360672 283 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_B_LO 0x005D
charlesmn 0:3ac96e360672 284
charlesmn 0:3ac96e360672 285 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_A_HI 0x005E
charlesmn 0:3ac96e360672 286
charlesmn 0:3ac96e360672 287 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_A_LO 0x005F
charlesmn 0:3ac96e360672 288
charlesmn 0:3ac96e360672 289 #define VL53L1_RANGE_CONFIG__VCSEL_PERIOD_A 0x0060
charlesmn 0:3ac96e360672 290
charlesmn 0:3ac96e360672 291 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_B_HI 0x0061
charlesmn 0:3ac96e360672 292
charlesmn 0:3ac96e360672 293 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_B_LO 0x0062
charlesmn 0:3ac96e360672 294
charlesmn 0:3ac96e360672 295 #define VL53L1_RANGE_CONFIG__VCSEL_PERIOD_B 0x0063
charlesmn 0:3ac96e360672 296
charlesmn 0:3ac96e360672 297 #define VL53L1_RANGE_CONFIG__SIGMA_THRESH 0x0064
charlesmn 0:3ac96e360672 298
charlesmn 0:3ac96e360672 299 #define VL53L1_RANGE_CONFIG__SIGMA_THRESH_HI 0x0064
charlesmn 0:3ac96e360672 300
charlesmn 0:3ac96e360672 301 #define VL53L1_RANGE_CONFIG__SIGMA_THRESH_LO 0x0065
charlesmn 0:3ac96e360672 302
charlesmn 0:3ac96e360672 303 #define VL53L1_RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS 0x0066
charlesmn 0:3ac96e360672 304
charlesmn 0:3ac96e360672 305 #define VL53L1_RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_HI 0x0066
charlesmn 0:3ac96e360672 306
charlesmn 0:3ac96e360672 307 #define VL53L1_RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_LO 0x0067
charlesmn 0:3ac96e360672 308
charlesmn 0:3ac96e360672 309 #define VL53L1_RANGE_CONFIG__VALID_PHASE_LOW 0x0068
charlesmn 0:3ac96e360672 310
charlesmn 0:3ac96e360672 311 #define VL53L1_RANGE_CONFIG__VALID_PHASE_HIGH 0x0069
charlesmn 0:3ac96e360672 312
charlesmn 0:3ac96e360672 313 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD 0x006C
charlesmn 0:3ac96e360672 314
charlesmn 0:3ac96e360672 315 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_3 0x006C
charlesmn 0:3ac96e360672 316
charlesmn 0:3ac96e360672 317 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_2 0x006D
charlesmn 0:3ac96e360672 318
charlesmn 0:3ac96e360672 319 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_1 0x006E
charlesmn 0:3ac96e360672 320
charlesmn 0:3ac96e360672 321 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_0 0x006F
charlesmn 0:3ac96e360672 322
charlesmn 0:3ac96e360672 323 #define VL53L1_SYSTEM__FRACTIONAL_ENABLE 0x0070
charlesmn 0:3ac96e360672 324
charlesmn 0:3ac96e360672 325 #define VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD_0 0x0071
charlesmn 0:3ac96e360672 326
charlesmn 0:3ac96e360672 327 #define VL53L1_SYSTEM__THRESH_HIGH 0x0072
charlesmn 0:3ac96e360672 328
charlesmn 0:3ac96e360672 329 #define VL53L1_SYSTEM__THRESH_HIGH_HI 0x0072
charlesmn 0:3ac96e360672 330
charlesmn 0:3ac96e360672 331 #define VL53L1_SYSTEM__THRESH_HIGH_LO 0x0073
charlesmn 0:3ac96e360672 332
charlesmn 0:3ac96e360672 333 #define VL53L1_SYSTEM__THRESH_LOW 0x0074
charlesmn 0:3ac96e360672 334
charlesmn 0:3ac96e360672 335 #define VL53L1_SYSTEM__THRESH_LOW_HI 0x0074
charlesmn 0:3ac96e360672 336
charlesmn 0:3ac96e360672 337 #define VL53L1_SYSTEM__THRESH_LOW_LO 0x0075
charlesmn 0:3ac96e360672 338
charlesmn 0:3ac96e360672 339 #define VL53L1_SYSTEM__ENABLE_XTALK_PER_QUADRANT 0x0076
charlesmn 0:3ac96e360672 340
charlesmn 0:3ac96e360672 341 #define VL53L1_SYSTEM__SEED_CONFIG 0x0077
charlesmn 0:3ac96e360672 342
charlesmn 0:3ac96e360672 343 #define VL53L1_SD_CONFIG__WOI_SD0 0x0078
charlesmn 0:3ac96e360672 344
charlesmn 0:3ac96e360672 345 #define VL53L1_SD_CONFIG__WOI_SD1 0x0079
charlesmn 0:3ac96e360672 346
charlesmn 0:3ac96e360672 347 #define VL53L1_SD_CONFIG__INITIAL_PHASE_SD0 0x007A
charlesmn 0:3ac96e360672 348
charlesmn 0:3ac96e360672 349 #define VL53L1_SD_CONFIG__INITIAL_PHASE_SD1 0x007B
charlesmn 0:3ac96e360672 350
charlesmn 0:3ac96e360672 351 #define VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD_1 0x007C
charlesmn 0:3ac96e360672 352
charlesmn 0:3ac96e360672 353 #define VL53L1_SD_CONFIG__FIRST_ORDER_SELECT 0x007D
charlesmn 0:3ac96e360672 354
charlesmn 0:3ac96e360672 355 #define VL53L1_SD_CONFIG__QUANTIFIER 0x007E
charlesmn 0:3ac96e360672 356
charlesmn 0:3ac96e360672 357 #define VL53L1_ROI_CONFIG__USER_ROI_CENTRE_SPAD 0x007F
charlesmn 0:3ac96e360672 358
charlesmn 0:3ac96e360672 359 #define VL53L1_ROI_CONFIG__USER_ROI_REQUESTED_GLOBAL_XY_SIZE 0x0080
charlesmn 0:3ac96e360672 360
charlesmn 0:3ac96e360672 361 #define VL53L1_SYSTEM__SEQUENCE_CONFIG 0x0081
charlesmn 0:3ac96e360672 362
charlesmn 0:3ac96e360672 363 #define VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD 0x0082
charlesmn 0:3ac96e360672 364
charlesmn 0:3ac96e360672 365 #define VL53L1_POWER_MANAGEMENT__GO1_POWER_FORCE 0x0083
charlesmn 0:3ac96e360672 366
charlesmn 0:3ac96e360672 367 #define VL53L1_SYSTEM__STREAM_COUNT_CTRL 0x0084
charlesmn 0:3ac96e360672 368
charlesmn 0:3ac96e360672 369 #define VL53L1_FIRMWARE__ENABLE 0x0085
charlesmn 0:3ac96e360672 370
charlesmn 0:3ac96e360672 371 #define VL53L1_SYSTEM__INTERRUPT_CLEAR 0x0086
charlesmn 0:3ac96e360672 372
charlesmn 0:3ac96e360672 373 #define VL53L1_SYSTEM__MODE_START 0x0087
charlesmn 0:3ac96e360672 374
charlesmn 0:3ac96e360672 375 #define VL53L1_RESULT__INTERRUPT_STATUS 0x0088
charlesmn 0:3ac96e360672 376
charlesmn 0:3ac96e360672 377 #define VL53L1_RESULT__RANGE_STATUS 0x0089
charlesmn 0:3ac96e360672 378
charlesmn 0:3ac96e360672 379 #define VL53L1_RESULT__REPORT_STATUS 0x008A
charlesmn 0:3ac96e360672 380
charlesmn 0:3ac96e360672 381 #define VL53L1_RESULT__STREAM_COUNT 0x008B
charlesmn 0:3ac96e360672 382
charlesmn 0:3ac96e360672 383 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 0x008C
charlesmn 0:3ac96e360672 384
charlesmn 0:3ac96e360672 385 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x008C
charlesmn 0:3ac96e360672 386
charlesmn 0:3ac96e360672 387 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x008D
charlesmn 0:3ac96e360672 388
charlesmn 0:3ac96e360672 389 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 0x008E
charlesmn 0:3ac96e360672 390
charlesmn 0:3ac96e360672 391 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x008E
charlesmn 0:3ac96e360672 392
charlesmn 0:3ac96e360672 393 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x008F
charlesmn 0:3ac96e360672 394
charlesmn 0:3ac96e360672 395 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 0x0090
charlesmn 0:3ac96e360672 396
charlesmn 0:3ac96e360672 397 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI 0x0090
charlesmn 0:3ac96e360672 398
charlesmn 0:3ac96e360672 399 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO 0x0091
charlesmn 0:3ac96e360672 400
charlesmn 0:3ac96e360672 401 #define VL53L1_RESULT__SIGMA_SD0 0x0092
charlesmn 0:3ac96e360672 402
charlesmn 0:3ac96e360672 403 #define VL53L1_RESULT__SIGMA_SD0_HI 0x0092
charlesmn 0:3ac96e360672 404
charlesmn 0:3ac96e360672 405 #define VL53L1_RESULT__SIGMA_SD0_LO 0x0093
charlesmn 0:3ac96e360672 406
charlesmn 0:3ac96e360672 407 #define VL53L1_RESULT__PHASE_SD0 0x0094
charlesmn 0:3ac96e360672 408
charlesmn 0:3ac96e360672 409 #define VL53L1_RESULT__PHASE_SD0_HI 0x0094
charlesmn 0:3ac96e360672 410
charlesmn 0:3ac96e360672 411 #define VL53L1_RESULT__PHASE_SD0_LO 0x0095
charlesmn 0:3ac96e360672 412
charlesmn 0:3ac96e360672 413 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0096
charlesmn 0:3ac96e360672 414
charlesmn 0:3ac96e360672 415 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI 0x0096
charlesmn 0:3ac96e360672 416
charlesmn 0:3ac96e360672 417 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO 0x0097
charlesmn 0:3ac96e360672 418
charlesmn 0:3ac96e360672 419 #define VL53L1_PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 0x0098
charlesmn 0:3ac96e360672 420
charlesmn 0:3ac96e360672 421 #define VL53L1__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI 0x0098
charlesmn 0:3ac96e360672 422
charlesmn 0:3ac96e360672 423 #define VL53L1___PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO 0x0099
charlesmn 0:3ac96e360672 424
charlesmn 0:3ac96e360672 425 #define VL53L1_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 0x009A
charlesmn 0:3ac96e360672 426
charlesmn 0:3ac96e360672 427 #define VL53L1_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x009A
charlesmn 0:3ac96e360672 428
charlesmn 0:3ac96e360672 429 #define VL53L1_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x009B
charlesmn 0:3ac96e360672 430
charlesmn 0:3ac96e360672 431 #define VL53L1_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 0x009C
charlesmn 0:3ac96e360672 432
charlesmn 0:3ac96e360672 433 #define VL53L1_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x009C
charlesmn 0:3ac96e360672 434
charlesmn 0:3ac96e360672 435 #define VL53L1_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x009D
charlesmn 0:3ac96e360672 436
charlesmn 0:3ac96e360672 437 #define VL53L1_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 0x009E
charlesmn 0:3ac96e360672 438
charlesmn 0:3ac96e360672 439 #define VL53L1_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x009E
charlesmn 0:3ac96e360672 440
charlesmn 0:3ac96e360672 441 #define VL53L1_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x009F
charlesmn 0:3ac96e360672 442
charlesmn 0:3ac96e360672 443 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 0x00A0
charlesmn 0:3ac96e360672 444
charlesmn 0:3ac96e360672 445 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI 0x00A0
charlesmn 0:3ac96e360672 446
charlesmn 0:3ac96e360672 447 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO 0x00A1
charlesmn 0:3ac96e360672 448
charlesmn 0:3ac96e360672 449 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 0x00A2
charlesmn 0:3ac96e360672 450
charlesmn 0:3ac96e360672 451 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI 0x00A2
charlesmn 0:3ac96e360672 452
charlesmn 0:3ac96e360672 453 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO 0x00A3
charlesmn 0:3ac96e360672 454
charlesmn 0:3ac96e360672 455 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 0x00A4
charlesmn 0:3ac96e360672 456
charlesmn 0:3ac96e360672 457 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI 0x00A4
charlesmn 0:3ac96e360672 458
charlesmn 0:3ac96e360672 459 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO 0x00A5
charlesmn 0:3ac96e360672 460
charlesmn 0:3ac96e360672 461 #define VL53L1_RESULT__SIGMA_SD1 0x00A6
charlesmn 0:3ac96e360672 462
charlesmn 0:3ac96e360672 463 #define VL53L1_RESULT__SIGMA_SD1_HI 0x00A6
charlesmn 0:3ac96e360672 464
charlesmn 0:3ac96e360672 465 #define VL53L1_RESULT__SIGMA_SD1_LO 0x00A7
charlesmn 0:3ac96e360672 466
charlesmn 0:3ac96e360672 467 #define VL53L1_RESULT__PHASE_SD1 0x00A8
charlesmn 0:3ac96e360672 468
charlesmn 0:3ac96e360672 469 #define VL53L1_RESULT__PHASE_SD1_HI 0x00A8
charlesmn 0:3ac96e360672 470
charlesmn 0:3ac96e360672 471 #define VL53L1_RESULT__PHASE_SD1_LO 0x00A9
charlesmn 0:3ac96e360672 472
charlesmn 0:3ac96e360672 473 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 0x00AA
charlesmn 0:3ac96e360672 474
charlesmn 0:3ac96e360672 475 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI 0x00AA
charlesmn 0:3ac96e360672 476
charlesmn 0:3ac96e360672 477 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO 0x00AB
charlesmn 0:3ac96e360672 478
charlesmn 0:3ac96e360672 479 #define VL53L1_RESULT__SPARE_0_SD1 0x00AC
charlesmn 0:3ac96e360672 480
charlesmn 0:3ac96e360672 481 #define VL53L1_RESULT__SPARE_0_SD1_HI 0x00AC
charlesmn 0:3ac96e360672 482
charlesmn 0:3ac96e360672 483 #define VL53L1_RESULT__SPARE_0_SD1_LO 0x00AD
charlesmn 0:3ac96e360672 484
charlesmn 0:3ac96e360672 485 #define VL53L1_RESULT__SPARE_1_SD1 0x00AE
charlesmn 0:3ac96e360672 486
charlesmn 0:3ac96e360672 487 #define VL53L1_RESULT__SPARE_1_SD1_HI 0x00AE
charlesmn 0:3ac96e360672 488
charlesmn 0:3ac96e360672 489 #define VL53L1_RESULT__SPARE_1_SD1_LO 0x00AF
charlesmn 0:3ac96e360672 490
charlesmn 0:3ac96e360672 491 #define VL53L1_RESULT__SPARE_2_SD1 0x00B0
charlesmn 0:3ac96e360672 492
charlesmn 0:3ac96e360672 493 #define VL53L1_RESULT__SPARE_2_SD1_HI 0x00B0
charlesmn 0:3ac96e360672 494
charlesmn 0:3ac96e360672 495 #define VL53L1_RESULT__SPARE_2_SD1_LO 0x00B1
charlesmn 0:3ac96e360672 496
charlesmn 0:3ac96e360672 497 #define VL53L1_RESULT__SPARE_3_SD1 0x00B2
charlesmn 0:3ac96e360672 498
charlesmn 0:3ac96e360672 499 #define VL53L1_RESULT__THRESH_INFO 0x00B3
charlesmn 0:3ac96e360672 500
charlesmn 0:3ac96e360672 501 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 0x00B4
charlesmn 0:3ac96e360672 502
charlesmn 0:3ac96e360672 503 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 0x00B4
charlesmn 0:3ac96e360672 504
charlesmn 0:3ac96e360672 505 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 0x00B5
charlesmn 0:3ac96e360672 506
charlesmn 0:3ac96e360672 507 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 0x00B6
charlesmn 0:3ac96e360672 508
charlesmn 0:3ac96e360672 509 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 0x00B7
charlesmn 0:3ac96e360672 510
charlesmn 0:3ac96e360672 511 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 0x00B8
charlesmn 0:3ac96e360672 512
charlesmn 0:3ac96e360672 513 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 0x00B8
charlesmn 0:3ac96e360672 514
charlesmn 0:3ac96e360672 515 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 0x00B9
charlesmn 0:3ac96e360672 516
charlesmn 0:3ac96e360672 517 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 0x00BA
charlesmn 0:3ac96e360672 518
charlesmn 0:3ac96e360672 519 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 0x00BB
charlesmn 0:3ac96e360672 520
charlesmn 0:3ac96e360672 521 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 0x00BC
charlesmn 0:3ac96e360672 522
charlesmn 0:3ac96e360672 523 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 0x00BC
charlesmn 0:3ac96e360672 524
charlesmn 0:3ac96e360672 525 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 0x00BD
charlesmn 0:3ac96e360672 526
charlesmn 0:3ac96e360672 527 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 0x00BE
charlesmn 0:3ac96e360672 528
charlesmn 0:3ac96e360672 529 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 0x00BF
charlesmn 0:3ac96e360672 530
charlesmn 0:3ac96e360672 531 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 0x00C0
charlesmn 0:3ac96e360672 532
charlesmn 0:3ac96e360672 533 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 0x00C0
charlesmn 0:3ac96e360672 534
charlesmn 0:3ac96e360672 535 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 0x00C1
charlesmn 0:3ac96e360672 536
charlesmn 0:3ac96e360672 537 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 0x00C2
charlesmn 0:3ac96e360672 538
charlesmn 0:3ac96e360672 539 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 0x00C3
charlesmn 0:3ac96e360672 540
charlesmn 0:3ac96e360672 541 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 0x00C4
charlesmn 0:3ac96e360672 542
charlesmn 0:3ac96e360672 543 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 0x00C4
charlesmn 0:3ac96e360672 544
charlesmn 0:3ac96e360672 545 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 0x00C5
charlesmn 0:3ac96e360672 546
charlesmn 0:3ac96e360672 547 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 0x00C6
charlesmn 0:3ac96e360672 548
charlesmn 0:3ac96e360672 549 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 0x00C7
charlesmn 0:3ac96e360672 550
charlesmn 0:3ac96e360672 551 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 0x00C8
charlesmn 0:3ac96e360672 552
charlesmn 0:3ac96e360672 553 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 0x00C8
charlesmn 0:3ac96e360672 554
charlesmn 0:3ac96e360672 555 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 0x00C9
charlesmn 0:3ac96e360672 556
charlesmn 0:3ac96e360672 557 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 0x00CA
charlesmn 0:3ac96e360672 558
charlesmn 0:3ac96e360672 559 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 0x00CB
charlesmn 0:3ac96e360672 560
charlesmn 0:3ac96e360672 561 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 0x00CC
charlesmn 0:3ac96e360672 562
charlesmn 0:3ac96e360672 563 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 0x00CC
charlesmn 0:3ac96e360672 564
charlesmn 0:3ac96e360672 565 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 0x00CD
charlesmn 0:3ac96e360672 566
charlesmn 0:3ac96e360672 567 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 0x00CE
charlesmn 0:3ac96e360672 568
charlesmn 0:3ac96e360672 569 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 0x00CF
charlesmn 0:3ac96e360672 570
charlesmn 0:3ac96e360672 571 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 0x00D0
charlesmn 0:3ac96e360672 572
charlesmn 0:3ac96e360672 573 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 0x00D0
charlesmn 0:3ac96e360672 574
charlesmn 0:3ac96e360672 575 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 0x00D1
charlesmn 0:3ac96e360672 576
charlesmn 0:3ac96e360672 577 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 0x00D2
charlesmn 0:3ac96e360672 578
charlesmn 0:3ac96e360672 579 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 0x00D3
charlesmn 0:3ac96e360672 580
charlesmn 0:3ac96e360672 581 #define VL53L1_RESULT_CORE__SPARE_0 0x00D4
charlesmn 0:3ac96e360672 582
charlesmn 0:3ac96e360672 583 #define VL53L1_PHASECAL_RESULT__REFERENCE_PHASE 0x00D6
charlesmn 0:3ac96e360672 584
charlesmn 0:3ac96e360672 585 #define VL53L1_PHASECAL_RESULT__REFERENCE_PHASE_HI 0x00D6
charlesmn 0:3ac96e360672 586
charlesmn 0:3ac96e360672 587 #define VL53L1_PHASECAL_RESULT__REFERENCE_PHASE_LO 0x00D7
charlesmn 0:3ac96e360672 588
charlesmn 0:3ac96e360672 589 #define VL53L1_PHASECAL_RESULT__VCSEL_START 0x00D8
charlesmn 0:3ac96e360672 590
charlesmn 0:3ac96e360672 591 #define VL53L1_REF_SPAD_CHAR_RESULT__NUM_ACTUAL_REF_SPADS 0x00D9
charlesmn 0:3ac96e360672 592
charlesmn 0:3ac96e360672 593 #define VL53L1_REF_SPAD_CHAR_RESULT__REF_LOCATION 0x00DA
charlesmn 0:3ac96e360672 594
charlesmn 0:3ac96e360672 595 #define VL53L1_VHV_RESULT__COLDBOOT_STATUS 0x00DB
charlesmn 0:3ac96e360672 596
charlesmn 0:3ac96e360672 597 #define VL53L1_VHV_RESULT__SEARCH_RESULT 0x00DC
charlesmn 0:3ac96e360672 598
charlesmn 0:3ac96e360672 599 #define VL53L1_VHV_RESULT__LATEST_SETTING 0x00DD
charlesmn 0:3ac96e360672 600
charlesmn 0:3ac96e360672 601 #define VL53L1_RESULT__OSC_CALIBRATE_VAL 0x00DE
charlesmn 0:3ac96e360672 602
charlesmn 0:3ac96e360672 603 #define VL53L1_RESULT__OSC_CALIBRATE_VAL_HI 0x00DE
charlesmn 0:3ac96e360672 604
charlesmn 0:3ac96e360672 605 #define VL53L1_RESULT__OSC_CALIBRATE_VAL_LO 0x00DF
charlesmn 0:3ac96e360672 606
charlesmn 0:3ac96e360672 607 #define VL53L1_ANA_CONFIG__POWERDOWN_GO1 0x00E0
charlesmn 0:3ac96e360672 608
charlesmn 0:3ac96e360672 609 #define VL53L1_ANA_CONFIG__REF_BG_CTRL 0x00E1
charlesmn 0:3ac96e360672 610
charlesmn 0:3ac96e360672 611 #define VL53L1_ANA_CONFIG__REGDVDD1V2_CTRL 0x00E2
charlesmn 0:3ac96e360672 612
charlesmn 0:3ac96e360672 613 #define VL53L1_ANA_CONFIG__OSC_SLOW_CTRL 0x00E3
charlesmn 0:3ac96e360672 614
charlesmn 0:3ac96e360672 615 #define VL53L1_TEST_MODE__STATUS 0x00E4
charlesmn 0:3ac96e360672 616
charlesmn 0:3ac96e360672 617 #define VL53L1_FIRMWARE__SYSTEM_STATUS 0x00E5
charlesmn 0:3ac96e360672 618
charlesmn 0:3ac96e360672 619 #define VL53L1_FIRMWARE__MODE_STATUS 0x00E6
charlesmn 0:3ac96e360672 620
charlesmn 0:3ac96e360672 621 #define VL53L1_FIRMWARE__SECONDARY_MODE_STATUS 0x00E7
charlesmn 0:3ac96e360672 622
charlesmn 0:3ac96e360672 623 #define VL53L1_FIRMWARE__CAL_REPEAT_RATE_COUNTER 0x00E8
charlesmn 0:3ac96e360672 624
charlesmn 0:3ac96e360672 625 #define VL53L1_FIRMWARE__CAL_REPEAT_RATE_COUNTER_HI 0x00E8
charlesmn 0:3ac96e360672 626
charlesmn 0:3ac96e360672 627 #define VL53L1_FIRMWARE__CAL_REPEAT_RATE_COUNTER_LO 0x00E9
charlesmn 0:3ac96e360672 628
charlesmn 0:3ac96e360672 629 #define VL53L1_FIRMWARE__HISTOGRAM_BIN 0x00EA
charlesmn 0:3ac96e360672 630
charlesmn 0:3ac96e360672 631 #define VL53L1_GPH__SYSTEM__THRESH_HIGH 0x00EC
charlesmn 0:3ac96e360672 632
charlesmn 0:3ac96e360672 633 #define VL53L1_GPH__SYSTEM__THRESH_HIGH_HI 0x00EC
charlesmn 0:3ac96e360672 634
charlesmn 0:3ac96e360672 635 #define VL53L1_GPH__SYSTEM__THRESH_HIGH_LO 0x00ED
charlesmn 0:3ac96e360672 636
charlesmn 0:3ac96e360672 637 #define VL53L1_GPH__SYSTEM__THRESH_LOW 0x00EE
charlesmn 0:3ac96e360672 638
charlesmn 0:3ac96e360672 639 #define VL53L1_GPH__SYSTEM__THRESH_LOW_HI 0x00EE
charlesmn 0:3ac96e360672 640
charlesmn 0:3ac96e360672 641 #define VL53L1_GPH__SYSTEM__THRESH_LOW_LO 0x00EF
charlesmn 0:3ac96e360672 642
charlesmn 0:3ac96e360672 643 #define VL53L1_GPH__SYSTEM__ENABLE_XTALK_PER_QUADRANT 0x00F0
charlesmn 0:3ac96e360672 644
charlesmn 0:3ac96e360672 645 #define VL53L1_GPH__SPARE_0 0x00F1
charlesmn 0:3ac96e360672 646
charlesmn 0:3ac96e360672 647 #define VL53L1_GPH__SD_CONFIG__WOI_SD0 0x00F2
charlesmn 0:3ac96e360672 648
charlesmn 0:3ac96e360672 649 #define VL53L1_GPH__SD_CONFIG__WOI_SD1 0x00F3
charlesmn 0:3ac96e360672 650
charlesmn 0:3ac96e360672 651 #define VL53L1_GPH__SD_CONFIG__INITIAL_PHASE_SD0 0x00F4
charlesmn 0:3ac96e360672 652
charlesmn 0:3ac96e360672 653 #define VL53L1_GPH__SD_CONFIG__INITIAL_PHASE_SD1 0x00F5
charlesmn 0:3ac96e360672 654
charlesmn 0:3ac96e360672 655 #define VL53L1_GPH__SD_CONFIG__FIRST_ORDER_SELECT 0x00F6
charlesmn 0:3ac96e360672 656
charlesmn 0:3ac96e360672 657 #define VL53L1_GPH__SD_CONFIG__QUANTIFIER 0x00F7
charlesmn 0:3ac96e360672 658
charlesmn 0:3ac96e360672 659 #define VL53L1_GPH__ROI_CONFIG__USER_ROI_CENTRE_SPAD 0x00F8
charlesmn 0:3ac96e360672 660
charlesmn 0:3ac96e360672 661 #define VL53L1_GPH__ROI_CONFIG__USER_ROI_REQUESTED_GLOBAL_XY_SIZE 0x00F9
charlesmn 0:3ac96e360672 662
charlesmn 0:3ac96e360672 663 #define VL53L1_GPH__SYSTEM__SEQUENCE_CONFIG 0x00FA
charlesmn 0:3ac96e360672 664
charlesmn 0:3ac96e360672 665 #define VL53L1_GPH__GPH_ID 0x00FB
charlesmn 0:3ac96e360672 666
charlesmn 0:3ac96e360672 667 #define VL53L1_SYSTEM__INTERRUPT_SET 0x00FC
charlesmn 0:3ac96e360672 668
charlesmn 0:3ac96e360672 669 #define VL53L1_INTERRUPT_MANAGER__ENABLES 0x00FD
charlesmn 0:3ac96e360672 670
charlesmn 0:3ac96e360672 671 #define VL53L1_INTERRUPT_MANAGER__CLEAR 0x00FE
charlesmn 0:3ac96e360672 672
charlesmn 0:3ac96e360672 673 #define VL53L1_INTERRUPT_MANAGER__STATUS 0x00FF
charlesmn 0:3ac96e360672 674
charlesmn 0:3ac96e360672 675 #define VL53L1_MCU_TO_HOST_BANK__WR_ACCESS_EN 0x0100
charlesmn 0:3ac96e360672 676
charlesmn 0:3ac96e360672 677 #define VL53L1_POWER_MANAGEMENT__GO1_RESET_STATUS 0x0101
charlesmn 0:3ac96e360672 678
charlesmn 0:3ac96e360672 679 #define VL53L1_PAD_STARTUP_MODE__VALUE_RO 0x0102
charlesmn 0:3ac96e360672 680
charlesmn 0:3ac96e360672 681 #define VL53L1_PAD_STARTUP_MODE__VALUE_CTRL 0x0103
charlesmn 0:3ac96e360672 682
charlesmn 0:3ac96e360672 683 #define VL53L1_PLL_PERIOD_US 0x0104
charlesmn 0:3ac96e360672 684
charlesmn 0:3ac96e360672 685 #define VL53L1_PLL_PERIOD_US_3 0x0104
charlesmn 0:3ac96e360672 686
charlesmn 0:3ac96e360672 687 #define VL53L1_PLL_PERIOD_US_2 0x0105
charlesmn 0:3ac96e360672 688
charlesmn 0:3ac96e360672 689 #define VL53L1_PLL_PERIOD_US_1 0x0106
charlesmn 0:3ac96e360672 690
charlesmn 0:3ac96e360672 691 #define VL53L1_PLL_PERIOD_US_0 0x0107
charlesmn 0:3ac96e360672 692
charlesmn 0:3ac96e360672 693 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT 0x0108
charlesmn 0:3ac96e360672 694
charlesmn 0:3ac96e360672 695 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_3 0x0108
charlesmn 0:3ac96e360672 696
charlesmn 0:3ac96e360672 697 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_2 0x0109
charlesmn 0:3ac96e360672 698
charlesmn 0:3ac96e360672 699 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_1 0x010A
charlesmn 0:3ac96e360672 700
charlesmn 0:3ac96e360672 701 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_0 0x010B
charlesmn 0:3ac96e360672 702
charlesmn 0:3ac96e360672 703 #define VL53L1_NVM_BIST__COMPLETE 0x010C
charlesmn 0:3ac96e360672 704
charlesmn 0:3ac96e360672 705 #define VL53L1_NVM_BIST__STATUS 0x010D
charlesmn 0:3ac96e360672 706
charlesmn 0:3ac96e360672 707 #define VL53L1_IDENTIFICATION__MODEL_ID 0x010F
charlesmn 0:3ac96e360672 708
charlesmn 0:3ac96e360672 709 #define VL53L1_IDENTIFICATION__MODULE_TYPE 0x0110
charlesmn 0:3ac96e360672 710
charlesmn 0:3ac96e360672 711 #define VL53L1_IDENTIFICATION__REVISION_ID 0x0111
charlesmn 0:3ac96e360672 712
charlesmn 0:3ac96e360672 713 #define VL53L1_IDENTIFICATION__MODULE_ID 0x0112
charlesmn 0:3ac96e360672 714
charlesmn 0:3ac96e360672 715 #define VL53L1_IDENTIFICATION__MODULE_ID_HI 0x0112
charlesmn 0:3ac96e360672 716
charlesmn 0:3ac96e360672 717 #define VL53L1_IDENTIFICATION__MODULE_ID_LO 0x0113
charlesmn 0:3ac96e360672 718
charlesmn 0:3ac96e360672 719 #define VL53L1_ANA_CONFIG__FAST_OSC__TRIM_MAX 0x0114
charlesmn 0:3ac96e360672 720
charlesmn 0:3ac96e360672 721 #define VL53L1_ANA_CONFIG__FAST_OSC__FREQ_SET 0x0115
charlesmn 0:3ac96e360672 722
charlesmn 0:3ac96e360672 723 #define VL53L1_ANA_CONFIG__VCSEL_TRIM 0x0116
charlesmn 0:3ac96e360672 724
charlesmn 0:3ac96e360672 725 #define VL53L1_ANA_CONFIG__VCSEL_SELION 0x0117
charlesmn 0:3ac96e360672 726
charlesmn 0:3ac96e360672 727 #define VL53L1_ANA_CONFIG__VCSEL_SELION_MAX 0x0118
charlesmn 0:3ac96e360672 728
charlesmn 0:3ac96e360672 729 #define VL53L1_PROTECTED_LASER_SAFETY__LOCK_BIT 0x0119
charlesmn 0:3ac96e360672 730
charlesmn 0:3ac96e360672 731 #define VL53L1_LASER_SAFETY__KEY 0x011A
charlesmn 0:3ac96e360672 732
charlesmn 0:3ac96e360672 733 #define VL53L1_LASER_SAFETY__KEY_RO 0x011B
charlesmn 0:3ac96e360672 734
charlesmn 0:3ac96e360672 735 #define VL53L1_LASER_SAFETY__CLIP 0x011C
charlesmn 0:3ac96e360672 736
charlesmn 0:3ac96e360672 737 #define VL53L1_LASER_SAFETY__MULT 0x011D
charlesmn 0:3ac96e360672 738
charlesmn 0:3ac96e360672 739 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_0 0x011E
charlesmn 0:3ac96e360672 740
charlesmn 0:3ac96e360672 741 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_1 0x011F
charlesmn 0:3ac96e360672 742
charlesmn 0:3ac96e360672 743 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_2 0x0120
charlesmn 0:3ac96e360672 744
charlesmn 0:3ac96e360672 745 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_3 0x0121
charlesmn 0:3ac96e360672 746
charlesmn 0:3ac96e360672 747 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_4 0x0122
charlesmn 0:3ac96e360672 748
charlesmn 0:3ac96e360672 749 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_5 0x0123
charlesmn 0:3ac96e360672 750
charlesmn 0:3ac96e360672 751 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_6 0x0124
charlesmn 0:3ac96e360672 752
charlesmn 0:3ac96e360672 753 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_7 0x0125
charlesmn 0:3ac96e360672 754
charlesmn 0:3ac96e360672 755 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_8 0x0126
charlesmn 0:3ac96e360672 756
charlesmn 0:3ac96e360672 757 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_9 0x0127
charlesmn 0:3ac96e360672 758
charlesmn 0:3ac96e360672 759 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_10 0x0128
charlesmn 0:3ac96e360672 760
charlesmn 0:3ac96e360672 761 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_11 0x0129
charlesmn 0:3ac96e360672 762
charlesmn 0:3ac96e360672 763 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_12 0x012A
charlesmn 0:3ac96e360672 764
charlesmn 0:3ac96e360672 765 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_13 0x012B
charlesmn 0:3ac96e360672 766
charlesmn 0:3ac96e360672 767 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_14 0x012C
charlesmn 0:3ac96e360672 768
charlesmn 0:3ac96e360672 769 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_15 0x012D
charlesmn 0:3ac96e360672 770
charlesmn 0:3ac96e360672 771 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_16 0x012E
charlesmn 0:3ac96e360672 772
charlesmn 0:3ac96e360672 773 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_17 0x012F
charlesmn 0:3ac96e360672 774
charlesmn 0:3ac96e360672 775 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_18 0x0130
charlesmn 0:3ac96e360672 776
charlesmn 0:3ac96e360672 777 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_19 0x0131
charlesmn 0:3ac96e360672 778
charlesmn 0:3ac96e360672 779 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_20 0x0132
charlesmn 0:3ac96e360672 780
charlesmn 0:3ac96e360672 781 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_21 0x0133
charlesmn 0:3ac96e360672 782
charlesmn 0:3ac96e360672 783 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_22 0x0134
charlesmn 0:3ac96e360672 784
charlesmn 0:3ac96e360672 785 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_23 0x0135
charlesmn 0:3ac96e360672 786
charlesmn 0:3ac96e360672 787 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_24 0x0136
charlesmn 0:3ac96e360672 788
charlesmn 0:3ac96e360672 789 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_25 0x0137
charlesmn 0:3ac96e360672 790
charlesmn 0:3ac96e360672 791 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_26 0x0138
charlesmn 0:3ac96e360672 792
charlesmn 0:3ac96e360672 793 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_27 0x0139
charlesmn 0:3ac96e360672 794
charlesmn 0:3ac96e360672 795 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_28 0x013A
charlesmn 0:3ac96e360672 796
charlesmn 0:3ac96e360672 797 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_29 0x013B
charlesmn 0:3ac96e360672 798
charlesmn 0:3ac96e360672 799 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_30 0x013C
charlesmn 0:3ac96e360672 800
charlesmn 0:3ac96e360672 801 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_31 0x013D
charlesmn 0:3ac96e360672 802
charlesmn 0:3ac96e360672 803 #define VL53L1_ROI_CONFIG__MODE_ROI_CENTRE_SPAD 0x013E
charlesmn 0:3ac96e360672 804
charlesmn 0:3ac96e360672 805 #define VL53L1_ROI_CONFIG__MODE_ROI_XY_SIZE 0x013F
charlesmn 0:3ac96e360672 806
charlesmn 0:3ac96e360672 807 #define VL53L1_GO2_HOST_BANK_ACCESS__OVERRIDE 0x0300
charlesmn 0:3ac96e360672 808
charlesmn 0:3ac96e360672 809 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND 0x0400
charlesmn 0:3ac96e360672 810
charlesmn 0:3ac96e360672 811 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_3 0x0400
charlesmn 0:3ac96e360672 812
charlesmn 0:3ac96e360672 813 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_2 0x0401
charlesmn 0:3ac96e360672 814
charlesmn 0:3ac96e360672 815 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_1 0x0402
charlesmn 0:3ac96e360672 816
charlesmn 0:3ac96e360672 817 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_0 0x0403
charlesmn 0:3ac96e360672 818
charlesmn 0:3ac96e360672 819 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER 0x0404
charlesmn 0:3ac96e360672 820
charlesmn 0:3ac96e360672 821 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_3 0x0404
charlesmn 0:3ac96e360672 822
charlesmn 0:3ac96e360672 823 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_2 0x0405
charlesmn 0:3ac96e360672 824
charlesmn 0:3ac96e360672 825 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_1 0x0406
charlesmn 0:3ac96e360672 826
charlesmn 0:3ac96e360672 827 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_0 0x0407
charlesmn 0:3ac96e360672 828
charlesmn 0:3ac96e360672 829 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI 0x0408
charlesmn 0:3ac96e360672 830
charlesmn 0:3ac96e360672 831 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_3 0x0408
charlesmn 0:3ac96e360672 832
charlesmn 0:3ac96e360672 833 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_2 0x0409
charlesmn 0:3ac96e360672 834
charlesmn 0:3ac96e360672 835 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_1 0x040A
charlesmn 0:3ac96e360672 836
charlesmn 0:3ac96e360672 837 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_0 0x040B
charlesmn 0:3ac96e360672 838
charlesmn 0:3ac96e360672 839 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO 0x040C
charlesmn 0:3ac96e360672 840
charlesmn 0:3ac96e360672 841 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_3 0x040C
charlesmn 0:3ac96e360672 842
charlesmn 0:3ac96e360672 843 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_2 0x040D
charlesmn 0:3ac96e360672 844
charlesmn 0:3ac96e360672 845 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_1 0x040E
charlesmn 0:3ac96e360672 846
charlesmn 0:3ac96e360672 847 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_0 0x040F
charlesmn 0:3ac96e360672 848
charlesmn 0:3ac96e360672 849 #define VL53L1_MCU_UTIL_MULTIPLIER__START 0x0410
charlesmn 0:3ac96e360672 850
charlesmn 0:3ac96e360672 851 #define VL53L1_MCU_UTIL_MULTIPLIER__STATUS 0x0411
charlesmn 0:3ac96e360672 852
charlesmn 0:3ac96e360672 853 #define VL53L1_MCU_UTIL_DIVIDER__START 0x0412
charlesmn 0:3ac96e360672 854
charlesmn 0:3ac96e360672 855 #define VL53L1_MCU_UTIL_DIVIDER__STATUS 0x0413
charlesmn 0:3ac96e360672 856
charlesmn 0:3ac96e360672 857 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND 0x0414
charlesmn 0:3ac96e360672 858
charlesmn 0:3ac96e360672 859 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_3 0x0414
charlesmn 0:3ac96e360672 860
charlesmn 0:3ac96e360672 861 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_2 0x0415
charlesmn 0:3ac96e360672 862
charlesmn 0:3ac96e360672 863 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_1 0x0416
charlesmn 0:3ac96e360672 864
charlesmn 0:3ac96e360672 865 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_0 0x0417
charlesmn 0:3ac96e360672 866
charlesmn 0:3ac96e360672 867 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR 0x0418
charlesmn 0:3ac96e360672 868
charlesmn 0:3ac96e360672 869 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_3 0x0418
charlesmn 0:3ac96e360672 870
charlesmn 0:3ac96e360672 871 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_2 0x0419
charlesmn 0:3ac96e360672 872
charlesmn 0:3ac96e360672 873 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_1 0x041A
charlesmn 0:3ac96e360672 874
charlesmn 0:3ac96e360672 875 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_0 0x041B
charlesmn 0:3ac96e360672 876
charlesmn 0:3ac96e360672 877 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT 0x041C
charlesmn 0:3ac96e360672 878
charlesmn 0:3ac96e360672 879 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_3 0x041C
charlesmn 0:3ac96e360672 880
charlesmn 0:3ac96e360672 881 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_2 0x041D
charlesmn 0:3ac96e360672 882
charlesmn 0:3ac96e360672 883 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_1 0x041E
charlesmn 0:3ac96e360672 884
charlesmn 0:3ac96e360672 885 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_0 0x041F
charlesmn 0:3ac96e360672 886
charlesmn 0:3ac96e360672 887 #define VL53L1_TIMER0__VALUE_IN 0x0420
charlesmn 0:3ac96e360672 888
charlesmn 0:3ac96e360672 889 #define VL53L1_TIMER0__VALUE_IN_3 0x0420
charlesmn 0:3ac96e360672 890
charlesmn 0:3ac96e360672 891 #define VL53L1_TIMER0__VALUE_IN_2 0x0421
charlesmn 0:3ac96e360672 892
charlesmn 0:3ac96e360672 893 #define VL53L1_TIMER0__VALUE_IN_1 0x0422
charlesmn 0:3ac96e360672 894
charlesmn 0:3ac96e360672 895 #define VL53L1_TIMER0__VALUE_IN_0 0x0423
charlesmn 0:3ac96e360672 896
charlesmn 0:3ac96e360672 897 #define VL53L1_TIMER1__VALUE_IN 0x0424
charlesmn 0:3ac96e360672 898
charlesmn 0:3ac96e360672 899 #define VL53L1_TIMER1__VALUE_IN_3 0x0424
charlesmn 0:3ac96e360672 900
charlesmn 0:3ac96e360672 901 #define VL53L1_TIMER1__VALUE_IN_2 0x0425
charlesmn 0:3ac96e360672 902
charlesmn 0:3ac96e360672 903 #define VL53L1_TIMER1__VALUE_IN_1 0x0426
charlesmn 0:3ac96e360672 904
charlesmn 0:3ac96e360672 905 #define VL53L1_TIMER1__VALUE_IN_0 0x0427
charlesmn 0:3ac96e360672 906
charlesmn 0:3ac96e360672 907 #define VL53L1_TIMER0__CTRL 0x0428
charlesmn 0:3ac96e360672 908
charlesmn 0:3ac96e360672 909 #define VL53L1_TIMER1__CTRL 0x0429
charlesmn 0:3ac96e360672 910
charlesmn 0:3ac96e360672 911 #define VL53L1_MCU_GENERAL_PURPOSE__GP_0 0x042C
charlesmn 0:3ac96e360672 912
charlesmn 0:3ac96e360672 913 #define VL53L1_MCU_GENERAL_PURPOSE__GP_1 0x042D
charlesmn 0:3ac96e360672 914
charlesmn 0:3ac96e360672 915 #define VL53L1_MCU_GENERAL_PURPOSE__GP_2 0x042E
charlesmn 0:3ac96e360672 916
charlesmn 0:3ac96e360672 917 #define VL53L1_MCU_GENERAL_PURPOSE__GP_3 0x042F
charlesmn 0:3ac96e360672 918
charlesmn 0:3ac96e360672 919 #define VL53L1_MCU_RANGE_CALC__CONFIG 0x0430
charlesmn 0:3ac96e360672 920
charlesmn 0:3ac96e360672 921 #define VL53L1_MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE 0x0432
charlesmn 0:3ac96e360672 922
charlesmn 0:3ac96e360672 923 #define VL53L1_MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE_HI 0x0432
charlesmn 0:3ac96e360672 924
charlesmn 0:3ac96e360672 925 #define VL53L1_MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE_LO 0x0433
charlesmn 0:3ac96e360672 926
charlesmn 0:3ac96e360672 927 #define VL53L1_MCU_RANGE_CALC__SPARE_4 0x0434
charlesmn 0:3ac96e360672 928
charlesmn 0:3ac96e360672 929 #define VL53L1_MCU_RANGE_CALC__SPARE_4_3 0x0434
charlesmn 0:3ac96e360672 930
charlesmn 0:3ac96e360672 931 #define VL53L1_MCU_RANGE_CALC__SPARE_4_2 0x0435
charlesmn 0:3ac96e360672 932
charlesmn 0:3ac96e360672 933 #define VL53L1_MCU_RANGE_CALC__SPARE_4_1 0x0436
charlesmn 0:3ac96e360672 934
charlesmn 0:3ac96e360672 935 #define VL53L1_MCU_RANGE_CALC__SPARE_4_0 0x0437
charlesmn 0:3ac96e360672 936
charlesmn 0:3ac96e360672 937 #define VL53L1_MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC 0x0438
charlesmn 0:3ac96e360672 938
charlesmn 0:3ac96e360672 939 #define VL53L1_MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC_HI 0x0438
charlesmn 0:3ac96e360672 940
charlesmn 0:3ac96e360672 941 #define VL53L1_MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC_LO 0x0439
charlesmn 0:3ac96e360672 942
charlesmn 0:3ac96e360672 943 #define VL53L1_MCU_RANGE_CALC__ALGO_VCSEL_PERIOD 0x043C
charlesmn 0:3ac96e360672 944
charlesmn 0:3ac96e360672 945 #define VL53L1_MCU_RANGE_CALC__SPARE_5 0x043D
charlesmn 0:3ac96e360672 946
charlesmn 0:3ac96e360672 947 #define VL53L1_MCU_RANGE_CALC__ALGO_TOTAL_PERIODS 0x043E
charlesmn 0:3ac96e360672 948
charlesmn 0:3ac96e360672 949 #define VL53L1_MCU_RANGE_CALC__ALGO_TOTAL_PERIODS_HI 0x043E
charlesmn 0:3ac96e360672 950
charlesmn 0:3ac96e360672 951 #define VL53L1_MCU_RANGE_CALC__ALGO_TOTAL_PERIODS_LO 0x043F
charlesmn 0:3ac96e360672 952
charlesmn 0:3ac96e360672 953 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE 0x0440
charlesmn 0:3ac96e360672 954
charlesmn 0:3ac96e360672 955 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_3 0x0440
charlesmn 0:3ac96e360672 956
charlesmn 0:3ac96e360672 957 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_2 0x0441
charlesmn 0:3ac96e360672 958
charlesmn 0:3ac96e360672 959 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_1 0x0442
charlesmn 0:3ac96e360672 960
charlesmn 0:3ac96e360672 961 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_0 0x0443
charlesmn 0:3ac96e360672 962
charlesmn 0:3ac96e360672 963 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS 0x0444
charlesmn 0:3ac96e360672 964
charlesmn 0:3ac96e360672 965 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_3 0x0444
charlesmn 0:3ac96e360672 966
charlesmn 0:3ac96e360672 967 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_2 0x0445
charlesmn 0:3ac96e360672 968
charlesmn 0:3ac96e360672 969 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_1 0x0446
charlesmn 0:3ac96e360672 970
charlesmn 0:3ac96e360672 971 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_0 0x0447
charlesmn 0:3ac96e360672 972
charlesmn 0:3ac96e360672 973 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS 0x0448
charlesmn 0:3ac96e360672 974
charlesmn 0:3ac96e360672 975 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_3 0x0448
charlesmn 0:3ac96e360672 976
charlesmn 0:3ac96e360672 977 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_2 0x0449
charlesmn 0:3ac96e360672 978
charlesmn 0:3ac96e360672 979 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_1 0x044A
charlesmn 0:3ac96e360672 980
charlesmn 0:3ac96e360672 981 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_0 0x044B
charlesmn 0:3ac96e360672 982
charlesmn 0:3ac96e360672 983 #define VL53L1_MCU_RANGE_CALC__SPARE_6 0x044C
charlesmn 0:3ac96e360672 984
charlesmn 0:3ac96e360672 985 #define VL53L1_MCU_RANGE_CALC__SPARE_6_HI 0x044C
charlesmn 0:3ac96e360672 986
charlesmn 0:3ac96e360672 987 #define VL53L1_MCU_RANGE_CALC__SPARE_6_LO 0x044D
charlesmn 0:3ac96e360672 988
charlesmn 0:3ac96e360672 989 #define VL53L1_MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD 0x044E
charlesmn 0:3ac96e360672 990
charlesmn 0:3ac96e360672 991 #define VL53L1_MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD_HI 0x044E
charlesmn 0:3ac96e360672 992
charlesmn 0:3ac96e360672 993 #define VL53L1_MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD_LO 0x044F
charlesmn 0:3ac96e360672 994
charlesmn 0:3ac96e360672 995 #define VL53L1_MCU_RANGE_CALC__NUM_SPADS 0x0450
charlesmn 0:3ac96e360672 996
charlesmn 0:3ac96e360672 997 #define VL53L1_MCU_RANGE_CALC__NUM_SPADS_HI 0x0450
charlesmn 0:3ac96e360672 998
charlesmn 0:3ac96e360672 999 #define VL53L1_MCU_RANGE_CALC__NUM_SPADS_LO 0x0451
charlesmn 0:3ac96e360672 1000
charlesmn 0:3ac96e360672 1001 #define VL53L1_MCU_RANGE_CALC__PHASE_OUTPUT 0x0452
charlesmn 0:3ac96e360672 1002
charlesmn 0:3ac96e360672 1003 #define VL53L1_MCU_RANGE_CALC__PHASE_OUTPUT_HI 0x0452
charlesmn 0:3ac96e360672 1004
charlesmn 0:3ac96e360672 1005 #define VL53L1_MCU_RANGE_CALC__PHASE_OUTPUT_LO 0x0453
charlesmn 0:3ac96e360672 1006
charlesmn 0:3ac96e360672 1007 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS 0x0454
charlesmn 0:3ac96e360672 1008
charlesmn 0:3ac96e360672 1009 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_3 0x0454
charlesmn 0:3ac96e360672 1010
charlesmn 0:3ac96e360672 1011 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_2 0x0455
charlesmn 0:3ac96e360672 1012
charlesmn 0:3ac96e360672 1013 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_1 0x0456
charlesmn 0:3ac96e360672 1014
charlesmn 0:3ac96e360672 1015 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_0 0x0457
charlesmn 0:3ac96e360672 1016
charlesmn 0:3ac96e360672 1017 #define VL53L1_MCU_RANGE_CALC__SPARE_7 0x0458
charlesmn 0:3ac96e360672 1018
charlesmn 0:3ac96e360672 1019 #define VL53L1_MCU_RANGE_CALC__SPARE_8 0x0459
charlesmn 0:3ac96e360672 1020
charlesmn 0:3ac96e360672 1021 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS 0x045A
charlesmn 0:3ac96e360672 1022
charlesmn 0:3ac96e360672 1023 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS_HI 0x045A
charlesmn 0:3ac96e360672 1024
charlesmn 0:3ac96e360672 1025 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS_LO 0x045B
charlesmn 0:3ac96e360672 1026
charlesmn 0:3ac96e360672 1027 #define VL53L1_MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS 0x045C
charlesmn 0:3ac96e360672 1028
charlesmn 0:3ac96e360672 1029 #define VL53L1_MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS_HI 0x045C
charlesmn 0:3ac96e360672 1030
charlesmn 0:3ac96e360672 1031 #define VL53L1_MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS_LO 0x045D
charlesmn 0:3ac96e360672 1032
charlesmn 0:3ac96e360672 1033 #define VL53L1_MCU_RANGE_CALC__AMBIENT_RATE_MCPS 0x045E
charlesmn 0:3ac96e360672 1034
charlesmn 0:3ac96e360672 1035 #define VL53L1_MCU_RANGE_CALC__AMBIENT_RATE_MCPS_HI 0x045E
charlesmn 0:3ac96e360672 1036
charlesmn 0:3ac96e360672 1037 #define VL53L1_MCU_RANGE_CALC__AMBIENT_RATE_MCPS_LO 0x045F
charlesmn 0:3ac96e360672 1038
charlesmn 0:3ac96e360672 1039 #define VL53L1_MCU_RANGE_CALC__XTALK 0x0460
charlesmn 0:3ac96e360672 1040
charlesmn 0:3ac96e360672 1041 #define VL53L1_MCU_RANGE_CALC__XTALK_HI 0x0460
charlesmn 0:3ac96e360672 1042
charlesmn 0:3ac96e360672 1043 #define VL53L1_MCU_RANGE_CALC__XTALK_LO 0x0461
charlesmn 0:3ac96e360672 1044
charlesmn 0:3ac96e360672 1045 #define VL53L1_MCU_RANGE_CALC__CALC_STATUS 0x0462
charlesmn 0:3ac96e360672 1046
charlesmn 0:3ac96e360672 1047 #define VL53L1_MCU_RANGE_CALC__DEBUG 0x0463
charlesmn 0:3ac96e360672 1048
charlesmn 0:3ac96e360672 1049 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS 0x0464
charlesmn 0:3ac96e360672 1050
charlesmn 0:3ac96e360672 1051 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS_HI 0x0464
charlesmn 0:3ac96e360672 1052
charlesmn 0:3ac96e360672 1053 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS_LO 0x0465
charlesmn 0:3ac96e360672 1054
charlesmn 0:3ac96e360672 1055 #define VL53L1_MCU_RANGE_CALC__SPARE_0 0x0468
charlesmn 0:3ac96e360672 1056
charlesmn 0:3ac96e360672 1057 #define VL53L1_MCU_RANGE_CALC__SPARE_1 0x0469
charlesmn 0:3ac96e360672 1058
charlesmn 0:3ac96e360672 1059 #define VL53L1_MCU_RANGE_CALC__SPARE_2 0x046A
charlesmn 0:3ac96e360672 1060
charlesmn 0:3ac96e360672 1061 #define VL53L1_MCU_RANGE_CALC__SPARE_3 0x046B
charlesmn 0:3ac96e360672 1062
charlesmn 0:3ac96e360672 1063 #define VL53L1_PATCH__CTRL 0x0470
charlesmn 0:3ac96e360672 1064
charlesmn 0:3ac96e360672 1065 #define VL53L1_PATCH__JMP_ENABLES 0x0472
charlesmn 0:3ac96e360672 1066
charlesmn 0:3ac96e360672 1067 #define VL53L1_PATCH__JMP_ENABLES_HI 0x0472
charlesmn 0:3ac96e360672 1068
charlesmn 0:3ac96e360672 1069 #define VL53L1_PATCH__JMP_ENABLES_LO 0x0473
charlesmn 0:3ac96e360672 1070
charlesmn 0:3ac96e360672 1071 #define VL53L1_PATCH__DATA_ENABLES 0x0474
charlesmn 0:3ac96e360672 1072
charlesmn 0:3ac96e360672 1073 #define VL53L1_PATCH__DATA_ENABLES_HI 0x0474
charlesmn 0:3ac96e360672 1074
charlesmn 0:3ac96e360672 1075 #define VL53L1_PATCH__DATA_ENABLES_LO 0x0475
charlesmn 0:3ac96e360672 1076
charlesmn 0:3ac96e360672 1077 #define VL53L1_PATCH__OFFSET_0 0x0476
charlesmn 0:3ac96e360672 1078
charlesmn 0:3ac96e360672 1079 #define VL53L1_PATCH__OFFSET_0_HI 0x0476
charlesmn 0:3ac96e360672 1080
charlesmn 0:3ac96e360672 1081 #define VL53L1_PATCH__OFFSET_0_LO 0x0477
charlesmn 0:3ac96e360672 1082
charlesmn 0:3ac96e360672 1083 #define VL53L1_PATCH__OFFSET_1 0x0478
charlesmn 0:3ac96e360672 1084
charlesmn 0:3ac96e360672 1085 #define VL53L1_PATCH__OFFSET_1_HI 0x0478
charlesmn 0:3ac96e360672 1086
charlesmn 0:3ac96e360672 1087 #define VL53L1_PATCH__OFFSET_1_LO 0x0479
charlesmn 0:3ac96e360672 1088
charlesmn 0:3ac96e360672 1089 #define VL53L1_PATCH__OFFSET_2 0x047A
charlesmn 0:3ac96e360672 1090
charlesmn 0:3ac96e360672 1091 #define VL53L1_PATCH__OFFSET_2_HI 0x047A
charlesmn 0:3ac96e360672 1092
charlesmn 0:3ac96e360672 1093 #define VL53L1_PATCH__OFFSET_2_LO 0x047B
charlesmn 0:3ac96e360672 1094
charlesmn 0:3ac96e360672 1095 #define VL53L1_PATCH__OFFSET_3 0x047C
charlesmn 0:3ac96e360672 1096
charlesmn 0:3ac96e360672 1097 #define VL53L1_PATCH__OFFSET_3_HI 0x047C
charlesmn 0:3ac96e360672 1098
charlesmn 0:3ac96e360672 1099 #define VL53L1_PATCH__OFFSET_3_LO 0x047D
charlesmn 0:3ac96e360672 1100
charlesmn 0:3ac96e360672 1101 #define VL53L1_PATCH__OFFSET_4 0x047E
charlesmn 0:3ac96e360672 1102
charlesmn 0:3ac96e360672 1103 #define VL53L1_PATCH__OFFSET_4_HI 0x047E
charlesmn 0:3ac96e360672 1104
charlesmn 0:3ac96e360672 1105 #define VL53L1_PATCH__OFFSET_4_LO 0x047F
charlesmn 0:3ac96e360672 1106
charlesmn 0:3ac96e360672 1107 #define VL53L1_PATCH__OFFSET_5 0x0480
charlesmn 0:3ac96e360672 1108
charlesmn 0:3ac96e360672 1109 #define VL53L1_PATCH__OFFSET_5_HI 0x0480
charlesmn 0:3ac96e360672 1110
charlesmn 0:3ac96e360672 1111 #define VL53L1_PATCH__OFFSET_5_LO 0x0481
charlesmn 0:3ac96e360672 1112
charlesmn 0:3ac96e360672 1113 #define VL53L1_PATCH__OFFSET_6 0x0482
charlesmn 0:3ac96e360672 1114
charlesmn 0:3ac96e360672 1115 #define VL53L1_PATCH__OFFSET_6_HI 0x0482
charlesmn 0:3ac96e360672 1116
charlesmn 0:3ac96e360672 1117 #define VL53L1_PATCH__OFFSET_6_LO 0x0483
charlesmn 0:3ac96e360672 1118
charlesmn 0:3ac96e360672 1119 #define VL53L1_PATCH__OFFSET_7 0x0484
charlesmn 0:3ac96e360672 1120
charlesmn 0:3ac96e360672 1121 #define VL53L1_PATCH__OFFSET_7_HI 0x0484
charlesmn 0:3ac96e360672 1122
charlesmn 0:3ac96e360672 1123 #define VL53L1_PATCH__OFFSET_7_LO 0x0485
charlesmn 0:3ac96e360672 1124
charlesmn 0:3ac96e360672 1125 #define VL53L1_PATCH__OFFSET_8 0x0486
charlesmn 0:3ac96e360672 1126
charlesmn 0:3ac96e360672 1127 #define VL53L1_PATCH__OFFSET_8_HI 0x0486
charlesmn 0:3ac96e360672 1128
charlesmn 0:3ac96e360672 1129 #define VL53L1_PATCH__OFFSET_8_LO 0x0487
charlesmn 0:3ac96e360672 1130
charlesmn 0:3ac96e360672 1131 #define VL53L1_PATCH__OFFSET_9 0x0488
charlesmn 0:3ac96e360672 1132
charlesmn 0:3ac96e360672 1133 #define VL53L1_PATCH__OFFSET_9_HI 0x0488
charlesmn 0:3ac96e360672 1134
charlesmn 0:3ac96e360672 1135 #define VL53L1_PATCH__OFFSET_9_LO 0x0489
charlesmn 0:3ac96e360672 1136
charlesmn 0:3ac96e360672 1137 #define VL53L1_PATCH__OFFSET_10 0x048A
charlesmn 0:3ac96e360672 1138
charlesmn 0:3ac96e360672 1139 #define VL53L1_PATCH__OFFSET_10_HI 0x048A
charlesmn 0:3ac96e360672 1140
charlesmn 0:3ac96e360672 1141 #define VL53L1_PATCH__OFFSET_10_LO 0x048B
charlesmn 0:3ac96e360672 1142
charlesmn 0:3ac96e360672 1143 #define VL53L1_PATCH__OFFSET_11 0x048C
charlesmn 0:3ac96e360672 1144
charlesmn 0:3ac96e360672 1145 #define VL53L1_PATCH__OFFSET_11_HI 0x048C
charlesmn 0:3ac96e360672 1146
charlesmn 0:3ac96e360672 1147 #define VL53L1_PATCH__OFFSET_11_LO 0x048D
charlesmn 0:3ac96e360672 1148
charlesmn 0:3ac96e360672 1149 #define VL53L1_PATCH__OFFSET_12 0x048E
charlesmn 0:3ac96e360672 1150
charlesmn 0:3ac96e360672 1151 #define VL53L1_PATCH__OFFSET_12_HI 0x048E
charlesmn 0:3ac96e360672 1152
charlesmn 0:3ac96e360672 1153 #define VL53L1_PATCH__OFFSET_12_LO 0x048F
charlesmn 0:3ac96e360672 1154
charlesmn 0:3ac96e360672 1155 #define VL53L1_PATCH__OFFSET_13 0x0490
charlesmn 0:3ac96e360672 1156
charlesmn 0:3ac96e360672 1157 #define VL53L1_PATCH__OFFSET_13_HI 0x0490
charlesmn 0:3ac96e360672 1158
charlesmn 0:3ac96e360672 1159 #define VL53L1_PATCH__OFFSET_13_LO 0x0491
charlesmn 0:3ac96e360672 1160
charlesmn 0:3ac96e360672 1161 #define VL53L1_PATCH__OFFSET_14 0x0492
charlesmn 0:3ac96e360672 1162
charlesmn 0:3ac96e360672 1163 #define VL53L1_PATCH__OFFSET_14_HI 0x0492
charlesmn 0:3ac96e360672 1164
charlesmn 0:3ac96e360672 1165 #define VL53L1_PATCH__OFFSET_14_LO 0x0493
charlesmn 0:3ac96e360672 1166
charlesmn 0:3ac96e360672 1167 #define VL53L1_PATCH__OFFSET_15 0x0494
charlesmn 0:3ac96e360672 1168
charlesmn 0:3ac96e360672 1169 #define VL53L1_PATCH__OFFSET_15_HI 0x0494
charlesmn 0:3ac96e360672 1170
charlesmn 0:3ac96e360672 1171 #define VL53L1_PATCH__OFFSET_15_LO 0x0495
charlesmn 0:3ac96e360672 1172
charlesmn 0:3ac96e360672 1173 #define VL53L1_PATCH__ADDRESS_0 0x0496
charlesmn 0:3ac96e360672 1174
charlesmn 0:3ac96e360672 1175 #define VL53L1_PATCH__ADDRESS_0_HI 0x0496
charlesmn 0:3ac96e360672 1176
charlesmn 0:3ac96e360672 1177 #define VL53L1_PATCH__ADDRESS_0_LO 0x0497
charlesmn 0:3ac96e360672 1178
charlesmn 0:3ac96e360672 1179 #define VL53L1_PATCH__ADDRESS_1 0x0498
charlesmn 0:3ac96e360672 1180
charlesmn 0:3ac96e360672 1181 #define VL53L1_PATCH__ADDRESS_1_HI 0x0498
charlesmn 0:3ac96e360672 1182
charlesmn 0:3ac96e360672 1183 #define VL53L1_PATCH__ADDRESS_1_LO 0x0499
charlesmn 0:3ac96e360672 1184
charlesmn 0:3ac96e360672 1185 #define VL53L1_PATCH__ADDRESS_2 0x049A
charlesmn 0:3ac96e360672 1186
charlesmn 0:3ac96e360672 1187 #define VL53L1_PATCH__ADDRESS_2_HI 0x049A
charlesmn 0:3ac96e360672 1188
charlesmn 0:3ac96e360672 1189 #define VL53L1_PATCH__ADDRESS_2_LO 0x049B
charlesmn 0:3ac96e360672 1190
charlesmn 0:3ac96e360672 1191 #define VL53L1_PATCH__ADDRESS_3 0x049C
charlesmn 0:3ac96e360672 1192
charlesmn 0:3ac96e360672 1193 #define VL53L1_PATCH__ADDRESS_3_HI 0x049C
charlesmn 0:3ac96e360672 1194
charlesmn 0:3ac96e360672 1195 #define VL53L1_PATCH__ADDRESS_3_LO 0x049D
charlesmn 0:3ac96e360672 1196
charlesmn 0:3ac96e360672 1197 #define VL53L1_PATCH__ADDRESS_4 0x049E
charlesmn 0:3ac96e360672 1198
charlesmn 0:3ac96e360672 1199 #define VL53L1_PATCH__ADDRESS_4_HI 0x049E
charlesmn 0:3ac96e360672 1200
charlesmn 0:3ac96e360672 1201 #define VL53L1_PATCH__ADDRESS_4_LO 0x049F
charlesmn 0:3ac96e360672 1202
charlesmn 0:3ac96e360672 1203 #define VL53L1_PATCH__ADDRESS_5 0x04A0
charlesmn 0:3ac96e360672 1204
charlesmn 0:3ac96e360672 1205 #define VL53L1_PATCH__ADDRESS_5_HI 0x04A0
charlesmn 0:3ac96e360672 1206
charlesmn 0:3ac96e360672 1207 #define VL53L1_PATCH__ADDRESS_5_LO 0x04A1
charlesmn 0:3ac96e360672 1208
charlesmn 0:3ac96e360672 1209 #define VL53L1_PATCH__ADDRESS_6 0x04A2
charlesmn 0:3ac96e360672 1210
charlesmn 0:3ac96e360672 1211 #define VL53L1_PATCH__ADDRESS_6_HI 0x04A2
charlesmn 0:3ac96e360672 1212
charlesmn 0:3ac96e360672 1213 #define VL53L1_PATCH__ADDRESS_6_LO 0x04A3
charlesmn 0:3ac96e360672 1214
charlesmn 0:3ac96e360672 1215 #define VL53L1_PATCH__ADDRESS_7 0x04A4
charlesmn 0:3ac96e360672 1216
charlesmn 0:3ac96e360672 1217 #define VL53L1_PATCH__ADDRESS_7_HI 0x04A4
charlesmn 0:3ac96e360672 1218
charlesmn 0:3ac96e360672 1219 #define VL53L1_PATCH__ADDRESS_7_LO 0x04A5
charlesmn 0:3ac96e360672 1220
charlesmn 0:3ac96e360672 1221 #define VL53L1_PATCH__ADDRESS_8 0x04A6
charlesmn 0:3ac96e360672 1222
charlesmn 0:3ac96e360672 1223 #define VL53L1_PATCH__ADDRESS_8_HI 0x04A6
charlesmn 0:3ac96e360672 1224
charlesmn 0:3ac96e360672 1225 #define VL53L1_PATCH__ADDRESS_8_LO 0x04A7
charlesmn 0:3ac96e360672 1226
charlesmn 0:3ac96e360672 1227 #define VL53L1_PATCH__ADDRESS_9 0x04A8
charlesmn 0:3ac96e360672 1228
charlesmn 0:3ac96e360672 1229 #define VL53L1_PATCH__ADDRESS_9_HI 0x04A8
charlesmn 0:3ac96e360672 1230
charlesmn 0:3ac96e360672 1231 #define VL53L1_PATCH__ADDRESS_9_LO 0x04A9
charlesmn 0:3ac96e360672 1232
charlesmn 0:3ac96e360672 1233 #define VL53L1_PATCH__ADDRESS_10 0x04AA
charlesmn 0:3ac96e360672 1234
charlesmn 0:3ac96e360672 1235 #define VL53L1_PATCH__ADDRESS_10_HI 0x04AA
charlesmn 0:3ac96e360672 1236
charlesmn 0:3ac96e360672 1237 #define VL53L1_PATCH__ADDRESS_10_LO 0x04AB
charlesmn 0:3ac96e360672 1238
charlesmn 0:3ac96e360672 1239 #define VL53L1_PATCH__ADDRESS_11 0x04AC
charlesmn 0:3ac96e360672 1240
charlesmn 0:3ac96e360672 1241 #define VL53L1_PATCH__ADDRESS_11_HI 0x04AC
charlesmn 0:3ac96e360672 1242
charlesmn 0:3ac96e360672 1243 #define VL53L1_PATCH__ADDRESS_11_LO 0x04AD
charlesmn 0:3ac96e360672 1244
charlesmn 0:3ac96e360672 1245 #define VL53L1_PATCH__ADDRESS_12 0x04AE
charlesmn 0:3ac96e360672 1246
charlesmn 0:3ac96e360672 1247 #define VL53L1_PATCH__ADDRESS_12_HI 0x04AE
charlesmn 0:3ac96e360672 1248
charlesmn 0:3ac96e360672 1249 #define VL53L1_PATCH__ADDRESS_12_LO 0x04AF
charlesmn 0:3ac96e360672 1250
charlesmn 0:3ac96e360672 1251 #define VL53L1_PATCH__ADDRESS_13 0x04B0
charlesmn 0:3ac96e360672 1252
charlesmn 0:3ac96e360672 1253 #define VL53L1_PATCH__ADDRESS_13_HI 0x04B0
charlesmn 0:3ac96e360672 1254
charlesmn 0:3ac96e360672 1255 #define VL53L1_PATCH__ADDRESS_13_LO 0x04B1
charlesmn 0:3ac96e360672 1256
charlesmn 0:3ac96e360672 1257 #define VL53L1_PATCH__ADDRESS_14 0x04B2
charlesmn 0:3ac96e360672 1258
charlesmn 0:3ac96e360672 1259 #define VL53L1_PATCH__ADDRESS_14_HI 0x04B2
charlesmn 0:3ac96e360672 1260
charlesmn 0:3ac96e360672 1261 #define VL53L1_PATCH__ADDRESS_14_LO 0x04B3
charlesmn 0:3ac96e360672 1262
charlesmn 0:3ac96e360672 1263 #define VL53L1_PATCH__ADDRESS_15 0x04B4
charlesmn 0:3ac96e360672 1264
charlesmn 0:3ac96e360672 1265 #define VL53L1_PATCH__ADDRESS_15_HI 0x04B4
charlesmn 0:3ac96e360672 1266
charlesmn 0:3ac96e360672 1267 #define VL53L1_PATCH__ADDRESS_15_LO 0x04B5
charlesmn 0:3ac96e360672 1268
charlesmn 0:3ac96e360672 1269 #define VL53L1_SPI_ASYNC_MUX__CTRL 0x04C0
charlesmn 0:3ac96e360672 1270
charlesmn 0:3ac96e360672 1271 #define VL53L1_CLK__CONFIG 0x04C4
charlesmn 0:3ac96e360672 1272
charlesmn 0:3ac96e360672 1273 #define VL53L1_GPIO_LV_MUX__CTRL 0x04CC
charlesmn 0:3ac96e360672 1274
charlesmn 0:3ac96e360672 1275 #define VL53L1_GPIO_LV_PAD__CTRL 0x04CD
charlesmn 0:3ac96e360672 1276
charlesmn 0:3ac96e360672 1277 #define VL53L1_PAD_I2C_LV__CONFIG 0x04D0
charlesmn 0:3ac96e360672 1278
charlesmn 0:3ac96e360672 1279 #define VL53L1_PAD_STARTUP_MODE__VALUE_RO_GO1 0x04D4
charlesmn 0:3ac96e360672 1280
charlesmn 0:3ac96e360672 1281 #define VL53L1_HOST_IF__STATUS_GO1 0x04D5
charlesmn 0:3ac96e360672 1282
charlesmn 0:3ac96e360672 1283 #define VL53L1_MCU_CLK_GATING__CTRL 0x04D8
charlesmn 0:3ac96e360672 1284
charlesmn 0:3ac96e360672 1285 #define VL53L1_TEST__BIST_ROM_CTRL 0x04E0
charlesmn 0:3ac96e360672 1286
charlesmn 0:3ac96e360672 1287 #define VL53L1_TEST__BIST_ROM_RESULT 0x04E1
charlesmn 0:3ac96e360672 1288
charlesmn 0:3ac96e360672 1289 #define VL53L1_TEST__BIST_ROM_MCU_SIG 0x04E2
charlesmn 0:3ac96e360672 1290
charlesmn 0:3ac96e360672 1291 #define VL53L1_TEST__BIST_ROM_MCU_SIG_HI 0x04E2
charlesmn 0:3ac96e360672 1292
charlesmn 0:3ac96e360672 1293 #define VL53L1_TEST__BIST_ROM_MCU_SIG_LO 0x04E3
charlesmn 0:3ac96e360672 1294
charlesmn 0:3ac96e360672 1295 #define VL53L1_TEST__BIST_RAM_CTRL 0x04E4
charlesmn 0:3ac96e360672 1296
charlesmn 0:3ac96e360672 1297 #define VL53L1_TEST__BIST_RAM_RESULT 0x04E5
charlesmn 0:3ac96e360672 1298
charlesmn 0:3ac96e360672 1299 #define VL53L1_TEST__TMC 0x04E8
charlesmn 0:3ac96e360672 1300
charlesmn 0:3ac96e360672 1301 #define VL53L1_TEST__PLL_BIST_MIN_THRESHOLD 0x04F0
charlesmn 0:3ac96e360672 1302
charlesmn 0:3ac96e360672 1303 #define VL53L1_TEST__PLL_BIST_MIN_THRESHOLD_HI 0x04F0
charlesmn 0:3ac96e360672 1304
charlesmn 0:3ac96e360672 1305 #define VL53L1_TEST__PLL_BIST_MIN_THRESHOLD_LO 0x04F1
charlesmn 0:3ac96e360672 1306
charlesmn 0:3ac96e360672 1307 #define VL53L1_TEST__PLL_BIST_MAX_THRESHOLD 0x04F2
charlesmn 0:3ac96e360672 1308
charlesmn 0:3ac96e360672 1309 #define VL53L1_TEST__PLL_BIST_MAX_THRESHOLD_HI 0x04F2
charlesmn 0:3ac96e360672 1310
charlesmn 0:3ac96e360672 1311 #define VL53L1_TEST__PLL_BIST_MAX_THRESHOLD_LO 0x04F3
charlesmn 0:3ac96e360672 1312
charlesmn 0:3ac96e360672 1313 #define VL53L1_TEST__PLL_BIST_COUNT_OUT 0x04F4
charlesmn 0:3ac96e360672 1314
charlesmn 0:3ac96e360672 1315 #define VL53L1_TEST__PLL_BIST_COUNT_OUT_HI 0x04F4
charlesmn 0:3ac96e360672 1316
charlesmn 0:3ac96e360672 1317 #define VL53L1_TEST__PLL_BIST_COUNT_OUT_LO 0x04F5
charlesmn 0:3ac96e360672 1318
charlesmn 0:3ac96e360672 1319 #define VL53L1_TEST__PLL_BIST_GONOGO 0x04F6
charlesmn 0:3ac96e360672 1320
charlesmn 0:3ac96e360672 1321 #define VL53L1_TEST__PLL_BIST_CTRL 0x04F7
charlesmn 0:3ac96e360672 1322
charlesmn 0:3ac96e360672 1323 #define VL53L1_RANGING_CORE__DEVICE_ID 0x0680
charlesmn 0:3ac96e360672 1324
charlesmn 0:3ac96e360672 1325 #define VL53L1_RANGING_CORE__REVISION_ID 0x0681
charlesmn 0:3ac96e360672 1326
charlesmn 0:3ac96e360672 1327 #define VL53L1_RANGING_CORE__CLK_CTRL1 0x0683
charlesmn 0:3ac96e360672 1328
charlesmn 0:3ac96e360672 1329 #define VL53L1_RANGING_CORE__CLK_CTRL2 0x0684
charlesmn 0:3ac96e360672 1330
charlesmn 0:3ac96e360672 1331 #define VL53L1_RANGING_CORE__WOI_1 0x0685
charlesmn 0:3ac96e360672 1332
charlesmn 0:3ac96e360672 1333 #define VL53L1_RANGING_CORE__WOI_REF_1 0x0686
charlesmn 0:3ac96e360672 1334
charlesmn 0:3ac96e360672 1335 #define VL53L1_RANGING_CORE__START_RANGING 0x0687
charlesmn 0:3ac96e360672 1336
charlesmn 0:3ac96e360672 1337 #define VL53L1_RANGING_CORE__LOW_LIMIT_1 0x0690
charlesmn 0:3ac96e360672 1338
charlesmn 0:3ac96e360672 1339 #define VL53L1_RANGING_CORE__HIGH_LIMIT_1 0x0691
charlesmn 0:3ac96e360672 1340
charlesmn 0:3ac96e360672 1341 #define VL53L1_RANGING_CORE__LOW_LIMIT_REF_1 0x0692
charlesmn 0:3ac96e360672 1342
charlesmn 0:3ac96e360672 1343 #define VL53L1_RANGING_CORE__HIGH_LIMIT_REF_1 0x0693
charlesmn 0:3ac96e360672 1344
charlesmn 0:3ac96e360672 1345 #define VL53L1_RANGING_CORE__QUANTIFIER_1_MSB 0x0694
charlesmn 0:3ac96e360672 1346
charlesmn 0:3ac96e360672 1347 #define VL53L1_RANGING_CORE__QUANTIFIER_1_LSB 0x0695
charlesmn 0:3ac96e360672 1348
charlesmn 0:3ac96e360672 1349 #define VL53L1_RANGING_CORE__QUANTIFIER_REF_1_MSB 0x0696
charlesmn 0:3ac96e360672 1350
charlesmn 0:3ac96e360672 1351 #define VL53L1_RANGING_CORE__QUANTIFIER_REF_1_LSB 0x0697
charlesmn 0:3ac96e360672 1352
charlesmn 0:3ac96e360672 1353 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_1_MSB 0x0698
charlesmn 0:3ac96e360672 1354
charlesmn 0:3ac96e360672 1355 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_1_LSB 0x0699
charlesmn 0:3ac96e360672 1356
charlesmn 0:3ac96e360672 1357 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_REF_1_MSB 0x069A
charlesmn 0:3ac96e360672 1358
charlesmn 0:3ac96e360672 1359 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_REF_1_LSB 0x069B
charlesmn 0:3ac96e360672 1360
charlesmn 0:3ac96e360672 1361 #define VL53L1_RANGING_CORE__FILTER_STRENGTH_1 0x069C
charlesmn 0:3ac96e360672 1362
charlesmn 0:3ac96e360672 1363 #define VL53L1_RANGING_CORE__FILTER_STRENGTH_REF_1 0x069D
charlesmn 0:3ac96e360672 1364
charlesmn 0:3ac96e360672 1365 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_1_MSB 0x069E
charlesmn 0:3ac96e360672 1366
charlesmn 0:3ac96e360672 1367 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_1_LSB 0x069F
charlesmn 0:3ac96e360672 1368
charlesmn 0:3ac96e360672 1369 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_REF_1_MSB 0x06A0
charlesmn 0:3ac96e360672 1370
charlesmn 0:3ac96e360672 1371 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_REF_1_LSB 0x06A1
charlesmn 0:3ac96e360672 1372
charlesmn 0:3ac96e360672 1373 #define VL53L1_RANGING_CORE__TIMEOUT_OVERALL_PERIODS_MSB 0x06A4
charlesmn 0:3ac96e360672 1374
charlesmn 0:3ac96e360672 1375 #define VL53L1_RANGING_CORE__TIMEOUT_OVERALL_PERIODS_LSB 0x06A5
charlesmn 0:3ac96e360672 1376
charlesmn 0:3ac96e360672 1377 #define VL53L1_RANGING_CORE__INVERT_HW 0x06A6
charlesmn 0:3ac96e360672 1378
charlesmn 0:3ac96e360672 1379 #define VL53L1_RANGING_CORE__FORCE_HW 0x06A7
charlesmn 0:3ac96e360672 1380
charlesmn 0:3ac96e360672 1381 #define VL53L1_RANGING_CORE__STATIC_HW_VALUE 0x06A8
charlesmn 0:3ac96e360672 1382
charlesmn 0:3ac96e360672 1383 #define VL53L1_RANGING_CORE__FORCE_CONTINUOUS_AMBIENT 0x06A9
charlesmn 0:3ac96e360672 1384
charlesmn 0:3ac96e360672 1385 #define VL53L1_RANGING_CORE__TEST_PHASE_SELECT_TO_FILTER 0x06AA
charlesmn 0:3ac96e360672 1386
charlesmn 0:3ac96e360672 1387 #define VL53L1_RANGING_CORE__TEST_PHASE_SELECT_TO_TIMING_GEN 0x06AB
charlesmn 0:3ac96e360672 1388
charlesmn 0:3ac96e360672 1389 #define VL53L1_RANGING_CORE__INITIAL_PHASE_VALUE_1 0x06AC
charlesmn 0:3ac96e360672 1390
charlesmn 0:3ac96e360672 1391 #define VL53L1_RANGING_CORE__INITIAL_PHASE_VALUE_REF_1 0x06AD
charlesmn 0:3ac96e360672 1392
charlesmn 0:3ac96e360672 1393 #define VL53L1_RANGING_CORE__FORCE_UP_IN 0x06AE
charlesmn 0:3ac96e360672 1394
charlesmn 0:3ac96e360672 1395 #define VL53L1_RANGING_CORE__FORCE_DN_IN 0x06AF
charlesmn 0:3ac96e360672 1396
charlesmn 0:3ac96e360672 1397 #define VL53L1_RANGING_CORE__STATIC_UP_VALUE_1 0x06B0
charlesmn 0:3ac96e360672 1398
charlesmn 0:3ac96e360672 1399 #define VL53L1_RANGING_CORE__STATIC_UP_VALUE_REF_1 0x06B1
charlesmn 0:3ac96e360672 1400
charlesmn 0:3ac96e360672 1401 #define VL53L1_RANGING_CORE__STATIC_DN_VALUE_1 0x06B2
charlesmn 0:3ac96e360672 1402
charlesmn 0:3ac96e360672 1403 #define VL53L1_RANGING_CORE__STATIC_DN_VALUE_REF_1 0x06B3
charlesmn 0:3ac96e360672 1404
charlesmn 0:3ac96e360672 1405 #define VL53L1_RANGING_CORE__MONITOR_UP_DN 0x06B4
charlesmn 0:3ac96e360672 1406
charlesmn 0:3ac96e360672 1407 #define VL53L1_RANGING_CORE__INVERT_UP_DN 0x06B5
charlesmn 0:3ac96e360672 1408
charlesmn 0:3ac96e360672 1409 #define VL53L1_RANGING_CORE__CPUMP_1 0x06B6
charlesmn 0:3ac96e360672 1410
charlesmn 0:3ac96e360672 1411 #define VL53L1_RANGING_CORE__CPUMP_2 0x06B7
charlesmn 0:3ac96e360672 1412
charlesmn 0:3ac96e360672 1413 #define VL53L1_RANGING_CORE__CPUMP_3 0x06B8
charlesmn 0:3ac96e360672 1414
charlesmn 0:3ac96e360672 1415 #define VL53L1_RANGING_CORE__OSC_1 0x06B9
charlesmn 0:3ac96e360672 1416
charlesmn 0:3ac96e360672 1417 #define VL53L1_RANGING_CORE__PLL_1 0x06BB
charlesmn 0:3ac96e360672 1418
charlesmn 0:3ac96e360672 1419 #define VL53L1_RANGING_CORE__PLL_2 0x06BC
charlesmn 0:3ac96e360672 1420
charlesmn 0:3ac96e360672 1421 #define VL53L1_RANGING_CORE__REFERENCE_1 0x06BD
charlesmn 0:3ac96e360672 1422
charlesmn 0:3ac96e360672 1423 #define VL53L1_RANGING_CORE__REFERENCE_3 0x06BF
charlesmn 0:3ac96e360672 1424
charlesmn 0:3ac96e360672 1425 #define VL53L1_RANGING_CORE__REFERENCE_4 0x06C0
charlesmn 0:3ac96e360672 1426
charlesmn 0:3ac96e360672 1427 #define VL53L1_RANGING_CORE__REFERENCE_5 0x06C1
charlesmn 0:3ac96e360672 1428
charlesmn 0:3ac96e360672 1429 #define VL53L1_RANGING_CORE__REGAVDD1V2 0x06C3
charlesmn 0:3ac96e360672 1430
charlesmn 0:3ac96e360672 1431 #define VL53L1_RANGING_CORE__CALIB_1 0x06C4
charlesmn 0:3ac96e360672 1432
charlesmn 0:3ac96e360672 1433 #define VL53L1_RANGING_CORE__CALIB_2 0x06C5
charlesmn 0:3ac96e360672 1434
charlesmn 0:3ac96e360672 1435 #define VL53L1_RANGING_CORE__CALIB_3 0x06C6
charlesmn 0:3ac96e360672 1436
charlesmn 0:3ac96e360672 1437 #define VL53L1_RANGING_CORE__TST_MUX_SEL1 0x06C9
charlesmn 0:3ac96e360672 1438
charlesmn 0:3ac96e360672 1439 #define VL53L1_RANGING_CORE__TST_MUX_SEL2 0x06CA
charlesmn 0:3ac96e360672 1440
charlesmn 0:3ac96e360672 1441 #define VL53L1_RANGING_CORE__TST_MUX 0x06CB
charlesmn 0:3ac96e360672 1442
charlesmn 0:3ac96e360672 1443 #define VL53L1_RANGING_CORE__GPIO_OUT_TESTMUX 0x06CC
charlesmn 0:3ac96e360672 1444
charlesmn 0:3ac96e360672 1445 #define VL53L1_RANGING_CORE__CUSTOM_FE 0x06CD
charlesmn 0:3ac96e360672 1446
charlesmn 0:3ac96e360672 1447 #define VL53L1_RANGING_CORE__CUSTOM_FE_2 0x06CE
charlesmn 0:3ac96e360672 1448
charlesmn 0:3ac96e360672 1449 #define VL53L1_RANGING_CORE__SPAD_READOUT 0x06CF
charlesmn 0:3ac96e360672 1450
charlesmn 0:3ac96e360672 1451 #define VL53L1_RANGING_CORE__SPAD_READOUT_1 0x06D0
charlesmn 0:3ac96e360672 1452
charlesmn 0:3ac96e360672 1453 #define VL53L1_RANGING_CORE__SPAD_READOUT_2 0x06D1
charlesmn 0:3ac96e360672 1454
charlesmn 0:3ac96e360672 1455 #define VL53L1_RANGING_CORE__SPAD_PS 0x06D2
charlesmn 0:3ac96e360672 1456
charlesmn 0:3ac96e360672 1457 #define VL53L1_RANGING_CORE__LASER_SAFETY_2 0x06D4
charlesmn 0:3ac96e360672 1458
charlesmn 0:3ac96e360672 1459 #define VL53L1_RANGING_CORE__NVM_CTRL__MODE 0x0780
charlesmn 0:3ac96e360672 1460
charlesmn 0:3ac96e360672 1461 #define VL53L1_RANGING_CORE__NVM_CTRL__PDN 0x0781
charlesmn 0:3ac96e360672 1462
charlesmn 0:3ac96e360672 1463 #define VL53L1_RANGING_CORE__NVM_CTRL__PROGN 0x0782
charlesmn 0:3ac96e360672 1464
charlesmn 0:3ac96e360672 1465 #define VL53L1_RANGING_CORE__NVM_CTRL__READN 0x0783
charlesmn 0:3ac96e360672 1466
charlesmn 0:3ac96e360672 1467 #define VL53L1_RANGING_CORE__NVM_CTRL__PULSE_WIDTH_MSB 0x0784
charlesmn 0:3ac96e360672 1468
charlesmn 0:3ac96e360672 1469 #define VL53L1_RANGING_CORE__NVM_CTRL__PULSE_WIDTH_LSB 0x0785
charlesmn 0:3ac96e360672 1470
charlesmn 0:3ac96e360672 1471 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_RISE_MSB 0x0786
charlesmn 0:3ac96e360672 1472
charlesmn 0:3ac96e360672 1473 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_RISE_LSB 0x0787
charlesmn 0:3ac96e360672 1474
charlesmn 0:3ac96e360672 1475 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_FALL_MSB 0x0788
charlesmn 0:3ac96e360672 1476
charlesmn 0:3ac96e360672 1477 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_FALL_LSB 0x0789
charlesmn 0:3ac96e360672 1478
charlesmn 0:3ac96e360672 1479 #define VL53L1_RANGING_CORE__NVM_CTRL__TST 0x078A
charlesmn 0:3ac96e360672 1480
charlesmn 0:3ac96e360672 1481 #define VL53L1_RANGING_CORE__NVM_CTRL__TESTREAD 0x078B
charlesmn 0:3ac96e360672 1482
charlesmn 0:3ac96e360672 1483 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_MMM 0x078C
charlesmn 0:3ac96e360672 1484
charlesmn 0:3ac96e360672 1485 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_LMM 0x078D
charlesmn 0:3ac96e360672 1486
charlesmn 0:3ac96e360672 1487 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_LLM 0x078E
charlesmn 0:3ac96e360672 1488
charlesmn 0:3ac96e360672 1489 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_LLL 0x078F
charlesmn 0:3ac96e360672 1490
charlesmn 0:3ac96e360672 1491 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_MMM 0x0790
charlesmn 0:3ac96e360672 1492
charlesmn 0:3ac96e360672 1493 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_LMM 0x0791
charlesmn 0:3ac96e360672 1494
charlesmn 0:3ac96e360672 1495 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_LLM 0x0792
charlesmn 0:3ac96e360672 1496
charlesmn 0:3ac96e360672 1497 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_LLL 0x0793
charlesmn 0:3ac96e360672 1498
charlesmn 0:3ac96e360672 1499 #define VL53L1_RANGING_CORE__NVM_CTRL__ADDR 0x0794
charlesmn 0:3ac96e360672 1500
charlesmn 0:3ac96e360672 1501 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_ECC 0x0795
charlesmn 0:3ac96e360672 1502
charlesmn 0:3ac96e360672 1503 #define VL53L1_RANGING_CORE__RET_SPAD_EN_0 0x0796
charlesmn 0:3ac96e360672 1504
charlesmn 0:3ac96e360672 1505 #define VL53L1_RANGING_CORE__RET_SPAD_EN_1 0x0797
charlesmn 0:3ac96e360672 1506
charlesmn 0:3ac96e360672 1507 #define VL53L1_RANGING_CORE__RET_SPAD_EN_2 0x0798
charlesmn 0:3ac96e360672 1508
charlesmn 0:3ac96e360672 1509 #define VL53L1_RANGING_CORE__RET_SPAD_EN_3 0x0799
charlesmn 0:3ac96e360672 1510
charlesmn 0:3ac96e360672 1511 #define VL53L1_RANGING_CORE__RET_SPAD_EN_4 0x079A
charlesmn 0:3ac96e360672 1512
charlesmn 0:3ac96e360672 1513 #define VL53L1_RANGING_CORE__RET_SPAD_EN_5 0x079B
charlesmn 0:3ac96e360672 1514
charlesmn 0:3ac96e360672 1515 #define VL53L1_RANGING_CORE__RET_SPAD_EN_6 0x079C
charlesmn 0:3ac96e360672 1516
charlesmn 0:3ac96e360672 1517 #define VL53L1_RANGING_CORE__RET_SPAD_EN_7 0x079D
charlesmn 0:3ac96e360672 1518
charlesmn 0:3ac96e360672 1519 #define VL53L1_RANGING_CORE__RET_SPAD_EN_8 0x079E
charlesmn 0:3ac96e360672 1520
charlesmn 0:3ac96e360672 1521 #define VL53L1_RANGING_CORE__RET_SPAD_EN_9 0x079F
charlesmn 0:3ac96e360672 1522
charlesmn 0:3ac96e360672 1523 #define VL53L1_RANGING_CORE__RET_SPAD_EN_10 0x07A0
charlesmn 0:3ac96e360672 1524
charlesmn 0:3ac96e360672 1525 #define VL53L1_RANGING_CORE__RET_SPAD_EN_11 0x07A1
charlesmn 0:3ac96e360672 1526
charlesmn 0:3ac96e360672 1527 #define VL53L1_RANGING_CORE__RET_SPAD_EN_12 0x07A2
charlesmn 0:3ac96e360672 1528
charlesmn 0:3ac96e360672 1529 #define VL53L1_RANGING_CORE__RET_SPAD_EN_13 0x07A3
charlesmn 0:3ac96e360672 1530
charlesmn 0:3ac96e360672 1531 #define VL53L1_RANGING_CORE__RET_SPAD_EN_14 0x07A4
charlesmn 0:3ac96e360672 1532
charlesmn 0:3ac96e360672 1533 #define VL53L1_RANGING_CORE__RET_SPAD_EN_15 0x07A5
charlesmn 0:3ac96e360672 1534
charlesmn 0:3ac96e360672 1535 #define VL53L1_RANGING_CORE__RET_SPAD_EN_16 0x07A6
charlesmn 0:3ac96e360672 1536
charlesmn 0:3ac96e360672 1537 #define VL53L1_RANGING_CORE__RET_SPAD_EN_17 0x07A7
charlesmn 0:3ac96e360672 1538
charlesmn 0:3ac96e360672 1539 #define VL53L1_RANGING_CORE__SPAD_SHIFT_EN 0x07BA
charlesmn 0:3ac96e360672 1540
charlesmn 0:3ac96e360672 1541 #define VL53L1_RANGING_CORE__SPAD_DISABLE_CTRL 0x07BB
charlesmn 0:3ac96e360672 1542
charlesmn 0:3ac96e360672 1543 #define VL53L1_RANGING_CORE__SPAD_EN_SHIFT_OUT_DEBUG 0x07BC
charlesmn 0:3ac96e360672 1544
charlesmn 0:3ac96e360672 1545 #define VL53L1_RANGING_CORE__SPI_MODE 0x07BD
charlesmn 0:3ac96e360672 1546
charlesmn 0:3ac96e360672 1547 #define VL53L1_RANGING_CORE__GPIO_DIR 0x07BE
charlesmn 0:3ac96e360672 1548
charlesmn 0:3ac96e360672 1549 #define VL53L1_RANGING_CORE__VCSEL_PERIOD 0x0880
charlesmn 0:3ac96e360672 1550
charlesmn 0:3ac96e360672 1551 #define VL53L1_RANGING_CORE__VCSEL_START 0x0881
charlesmn 0:3ac96e360672 1552
charlesmn 0:3ac96e360672 1553 #define VL53L1_RANGING_CORE__VCSEL_STOP 0x0882
charlesmn 0:3ac96e360672 1554
charlesmn 0:3ac96e360672 1555 #define VL53L1_RANGING_CORE__VCSEL_1 0x0885
charlesmn 0:3ac96e360672 1556
charlesmn 0:3ac96e360672 1557 #define VL53L1_RANGING_CORE__VCSEL_STATUS 0x088D
charlesmn 0:3ac96e360672 1558
charlesmn 0:3ac96e360672 1559 #define VL53L1_RANGING_CORE__STATUS 0x0980
charlesmn 0:3ac96e360672 1560
charlesmn 0:3ac96e360672 1561 #define VL53L1_RANGING_CORE__LASER_CONTINUITY_STATE 0x0981
charlesmn 0:3ac96e360672 1562
charlesmn 0:3ac96e360672 1563 #define VL53L1_RANGING_CORE__RANGE_1_MMM 0x0982
charlesmn 0:3ac96e360672 1564
charlesmn 0:3ac96e360672 1565 #define VL53L1_RANGING_CORE__RANGE_1_LMM 0x0983
charlesmn 0:3ac96e360672 1566
charlesmn 0:3ac96e360672 1567 #define VL53L1_RANGING_CORE__RANGE_1_LLM 0x0984
charlesmn 0:3ac96e360672 1568
charlesmn 0:3ac96e360672 1569 #define VL53L1_RANGING_CORE__RANGE_1_LLL 0x0985
charlesmn 0:3ac96e360672 1570
charlesmn 0:3ac96e360672 1571 #define VL53L1_RANGING_CORE__RANGE_REF_1_MMM 0x0986
charlesmn 0:3ac96e360672 1572
charlesmn 0:3ac96e360672 1573 #define VL53L1_RANGING_CORE__RANGE_REF_1_LMM 0x0987
charlesmn 0:3ac96e360672 1574
charlesmn 0:3ac96e360672 1575 #define VL53L1_RANGING_CORE__RANGE_REF_1_LLM 0x0988
charlesmn 0:3ac96e360672 1576
charlesmn 0:3ac96e360672 1577 #define VL53L1_RANGING_CORE__RANGE_REF_1_LLL 0x0989
charlesmn 0:3ac96e360672 1578
charlesmn 0:3ac96e360672 1579 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_MMM 0x098A
charlesmn 0:3ac96e360672 1580
charlesmn 0:3ac96e360672 1581 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LMM 0x098B
charlesmn 0:3ac96e360672 1582
charlesmn 0:3ac96e360672 1583 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LLM 0x098C
charlesmn 0:3ac96e360672 1584
charlesmn 0:3ac96e360672 1585 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LLL 0x098D
charlesmn 0:3ac96e360672 1586
charlesmn 0:3ac96e360672 1587 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_MMM 0x098E
charlesmn 0:3ac96e360672 1588
charlesmn 0:3ac96e360672 1589 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_LMM 0x098F
charlesmn 0:3ac96e360672 1590
charlesmn 0:3ac96e360672 1591 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_LLM 0x0990
charlesmn 0:3ac96e360672 1592
charlesmn 0:3ac96e360672 1593 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_LLL 0x0991
charlesmn 0:3ac96e360672 1594
charlesmn 0:3ac96e360672 1595 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_MMM 0x0992
charlesmn 0:3ac96e360672 1596
charlesmn 0:3ac96e360672 1597 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LMM 0x0993
charlesmn 0:3ac96e360672 1598
charlesmn 0:3ac96e360672 1599 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LLM 0x0994
charlesmn 0:3ac96e360672 1600
charlesmn 0:3ac96e360672 1601 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LLL 0x0995
charlesmn 0:3ac96e360672 1602
charlesmn 0:3ac96e360672 1603 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_MM 0x0996
charlesmn 0:3ac96e360672 1604
charlesmn 0:3ac96e360672 1605 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_LM 0x0997
charlesmn 0:3ac96e360672 1606
charlesmn 0:3ac96e360672 1607 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_LL 0x0998
charlesmn 0:3ac96e360672 1608
charlesmn 0:3ac96e360672 1609 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_MM 0x0999
charlesmn 0:3ac96e360672 1610
charlesmn 0:3ac96e360672 1611 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_LM 0x099A
charlesmn 0:3ac96e360672 1612
charlesmn 0:3ac96e360672 1613 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_LL 0x099B
charlesmn 0:3ac96e360672 1614
charlesmn 0:3ac96e360672 1615 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_MMM 0x099C
charlesmn 0:3ac96e360672 1616
charlesmn 0:3ac96e360672 1617 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LMM 0x099D
charlesmn 0:3ac96e360672 1618
charlesmn 0:3ac96e360672 1619 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LLM 0x099E
charlesmn 0:3ac96e360672 1620
charlesmn 0:3ac96e360672 1621 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LLL 0x099F
charlesmn 0:3ac96e360672 1622
charlesmn 0:3ac96e360672 1623 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_MMM 0x09A0
charlesmn 0:3ac96e360672 1624
charlesmn 0:3ac96e360672 1625 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LMM 0x09A1
charlesmn 0:3ac96e360672 1626
charlesmn 0:3ac96e360672 1627 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LLM 0x09A2
charlesmn 0:3ac96e360672 1628
charlesmn 0:3ac96e360672 1629 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LLL 0x09A3
charlesmn 0:3ac96e360672 1630
charlesmn 0:3ac96e360672 1631 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_MMM 0x09A4
charlesmn 0:3ac96e360672 1632
charlesmn 0:3ac96e360672 1633 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LMM 0x09A5
charlesmn 0:3ac96e360672 1634
charlesmn 0:3ac96e360672 1635 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LLM 0x09A6
charlesmn 0:3ac96e360672 1636
charlesmn 0:3ac96e360672 1637 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LLL 0x09A7
charlesmn 0:3ac96e360672 1638
charlesmn 0:3ac96e360672 1639 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_MM 0x09A8
charlesmn 0:3ac96e360672 1640
charlesmn 0:3ac96e360672 1641 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_LM 0x09A9
charlesmn 0:3ac96e360672 1642
charlesmn 0:3ac96e360672 1643 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_LL 0x09AA
charlesmn 0:3ac96e360672 1644
charlesmn 0:3ac96e360672 1645 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_REF_MM 0x09AB
charlesmn 0:3ac96e360672 1646
charlesmn 0:3ac96e360672 1647 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_REF_LM 0x09AC
charlesmn 0:3ac96e360672 1648
charlesmn 0:3ac96e360672 1649 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_REF_LL 0x09AD
charlesmn 0:3ac96e360672 1650
charlesmn 0:3ac96e360672 1651 #define VL53L1_RANGING_CORE__GPIO_CONFIG__A0 0x0A00
charlesmn 0:3ac96e360672 1652
charlesmn 0:3ac96e360672 1653 #define VL53L1_RANGING_CORE__RESET_CONTROL__A0 0x0A01
charlesmn 0:3ac96e360672 1654
charlesmn 0:3ac96e360672 1655 #define VL53L1_RANGING_CORE__INTR_MANAGER__A0 0x0A02
charlesmn 0:3ac96e360672 1656
charlesmn 0:3ac96e360672 1657 #define VL53L1_RANGING_CORE__POWER_FSM_TIME_OSC__A0 0x0A06
charlesmn 0:3ac96e360672 1658
charlesmn 0:3ac96e360672 1659 #define VL53L1_RANGING_CORE__VCSEL_ATEST__A0 0x0A07
charlesmn 0:3ac96e360672 1660
charlesmn 0:3ac96e360672 1661 #define VL53L1_RANGING_CORE__VCSEL_PERIOD_CLIPPED__A0 0x0A08
charlesmn 0:3ac96e360672 1662
charlesmn 0:3ac96e360672 1663 #define VL53L1_RANGING_CORE__VCSEL_STOP_CLIPPED__A0 0x0A09
charlesmn 0:3ac96e360672 1664
charlesmn 0:3ac96e360672 1665 #define VL53L1_RANGING_CORE__CALIB_2__A0 0x0A0A
charlesmn 0:3ac96e360672 1666
charlesmn 0:3ac96e360672 1667 #define VL53L1_RANGING_CORE__STOP_CONDITION__A0 0x0A0B
charlesmn 0:3ac96e360672 1668
charlesmn 0:3ac96e360672 1669 #define VL53L1_RANGING_CORE__STATUS_RESET__A0 0x0A0C
charlesmn 0:3ac96e360672 1670
charlesmn 0:3ac96e360672 1671 #define VL53L1_RANGING_CORE__READOUT_CFG__A0 0x0A0D
charlesmn 0:3ac96e360672 1672
charlesmn 0:3ac96e360672 1673 #define VL53L1_RANGING_CORE__WINDOW_SETTING__A0 0x0A0E
charlesmn 0:3ac96e360672 1674
charlesmn 0:3ac96e360672 1675 #define VL53L1_RANGING_CORE__VCSEL_DELAY__A0 0x0A1A
charlesmn 0:3ac96e360672 1676
charlesmn 0:3ac96e360672 1677 #define VL53L1_RANGING_CORE__REFERENCE_2__A0 0x0A1B
charlesmn 0:3ac96e360672 1678
charlesmn 0:3ac96e360672 1679 #define VL53L1_RANGING_CORE__REGAVDD1V2__A0 0x0A1D
charlesmn 0:3ac96e360672 1680
charlesmn 0:3ac96e360672 1681 #define VL53L1_RANGING_CORE__TST_MUX__A0 0x0A1F
charlesmn 0:3ac96e360672 1682
charlesmn 0:3ac96e360672 1683 #define VL53L1_RANGING_CORE__CUSTOM_FE_2__A0 0x0A20
charlesmn 0:3ac96e360672 1684
charlesmn 0:3ac96e360672 1685 #define VL53L1_RANGING_CORE__SPAD_READOUT__A0 0x0A21
charlesmn 0:3ac96e360672 1686
charlesmn 0:3ac96e360672 1687 #define VL53L1_RANGING_CORE__CPUMP_1__A0 0x0A22
charlesmn 0:3ac96e360672 1688
charlesmn 0:3ac96e360672 1689 #define VL53L1_RANGING_CORE__SPARE_REGISTER__A0 0x0A23
charlesmn 0:3ac96e360672 1690
charlesmn 0:3ac96e360672 1691 #define VL53L1_RANGING_CORE__VCSEL_CONT_STAGE5_BYPASS__A0 0x0A24
charlesmn 0:3ac96e360672 1692
charlesmn 0:3ac96e360672 1693 #define VL53L1_RANGING_CORE__RET_SPAD_EN_18 0x0A25
charlesmn 0:3ac96e360672 1694
charlesmn 0:3ac96e360672 1695 #define VL53L1_RANGING_CORE__RET_SPAD_EN_19 0x0A26
charlesmn 0:3ac96e360672 1696
charlesmn 0:3ac96e360672 1697 #define VL53L1_RANGING_CORE__RET_SPAD_EN_20 0x0A27
charlesmn 0:3ac96e360672 1698
charlesmn 0:3ac96e360672 1699 #define VL53L1_RANGING_CORE__RET_SPAD_EN_21 0x0A28
charlesmn 0:3ac96e360672 1700
charlesmn 0:3ac96e360672 1701 #define VL53L1_RANGING_CORE__RET_SPAD_EN_22 0x0A29
charlesmn 0:3ac96e360672 1702
charlesmn 0:3ac96e360672 1703 #define VL53L1_RANGING_CORE__RET_SPAD_EN_23 0x0A2A
charlesmn 0:3ac96e360672 1704
charlesmn 0:3ac96e360672 1705 #define VL53L1_RANGING_CORE__RET_SPAD_EN_24 0x0A2B
charlesmn 0:3ac96e360672 1706
charlesmn 0:3ac96e360672 1707 #define VL53L1_RANGING_CORE__RET_SPAD_EN_25 0x0A2C
charlesmn 0:3ac96e360672 1708
charlesmn 0:3ac96e360672 1709 #define VL53L1_RANGING_CORE__RET_SPAD_EN_26 0x0A2D
charlesmn 0:3ac96e360672 1710
charlesmn 0:3ac96e360672 1711 #define VL53L1_RANGING_CORE__RET_SPAD_EN_27 0x0A2E
charlesmn 0:3ac96e360672 1712
charlesmn 0:3ac96e360672 1713 #define VL53L1_RANGING_CORE__RET_SPAD_EN_28 0x0A2F
charlesmn 0:3ac96e360672 1714
charlesmn 0:3ac96e360672 1715 #define VL53L1_RANGING_CORE__RET_SPAD_EN_29 0x0A30
charlesmn 0:3ac96e360672 1716
charlesmn 0:3ac96e360672 1717 #define VL53L1_RANGING_CORE__RET_SPAD_EN_30 0x0A31
charlesmn 0:3ac96e360672 1718
charlesmn 0:3ac96e360672 1719 #define VL53L1_RANGING_CORE__RET_SPAD_EN_31 0x0A32
charlesmn 0:3ac96e360672 1720
charlesmn 0:3ac96e360672 1721 #define VL53L1_RANGING_CORE__REF_SPAD_EN_0__EWOK 0x0A33
charlesmn 0:3ac96e360672 1722
charlesmn 0:3ac96e360672 1723 #define VL53L1_RANGING_CORE__REF_SPAD_EN_1__EWOK 0x0A34
charlesmn 0:3ac96e360672 1724
charlesmn 0:3ac96e360672 1725 #define VL53L1_RANGING_CORE__REF_SPAD_EN_2__EWOK 0x0A35
charlesmn 0:3ac96e360672 1726
charlesmn 0:3ac96e360672 1727 #define VL53L1_RANGING_CORE__REF_SPAD_EN_3__EWOK 0x0A36
charlesmn 0:3ac96e360672 1728
charlesmn 0:3ac96e360672 1729 #define VL53L1_RANGING_CORE__REF_SPAD_EN_4__EWOK 0x0A37
charlesmn 0:3ac96e360672 1730
charlesmn 0:3ac96e360672 1731 #define VL53L1_RANGING_CORE__REF_SPAD_EN_5__EWOK 0x0A38
charlesmn 0:3ac96e360672 1732
charlesmn 0:3ac96e360672 1733 #define VL53L1_RANGING_CORE__REF_EN_START_SELECT 0x0A39
charlesmn 0:3ac96e360672 1734
charlesmn 0:3ac96e360672 1735 #define VL53L1_RANGING_CORE__REGDVDD1V2_ATEST__EWOK 0x0A41
charlesmn 0:3ac96e360672 1736
charlesmn 0:3ac96e360672 1737 #define VL53L1_SOFT_RESET_GO1 0x0B00
charlesmn 0:3ac96e360672 1738
charlesmn 0:3ac96e360672 1739 #define VL53L1_PRIVATE__PATCH_BASE_ADDR_RSLV 0x0E00
charlesmn 0:3ac96e360672 1740
charlesmn 0:3ac96e360672 1741 #define VL53L1_PREV_SHADOW_RESULT__INTERRUPT_STATUS 0x0ED0
charlesmn 0:3ac96e360672 1742
charlesmn 0:3ac96e360672 1743 #define VL53L1_PREV_SHADOW_RESULT__RANGE_STATUS 0x0ED1
charlesmn 0:3ac96e360672 1744
charlesmn 0:3ac96e360672 1745 #define VL53L1_PREV_SHADOW_RESULT__REPORT_STATUS 0x0ED2
charlesmn 0:3ac96e360672 1746
charlesmn 0:3ac96e360672 1747 #define VL53L1_PREV_SHADOW_RESULT__STREAM_COUNT 0x0ED3
charlesmn 0:3ac96e360672 1748
charlesmn 0:3ac96e360672 1749 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 0x0ED4
charlesmn 0:3ac96e360672 1750
charlesmn 0:3ac96e360672 1751 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0ED4
charlesmn 0:3ac96e360672 1752
charlesmn 0:3ac96e360672 1753 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0ED5
charlesmn 0:3ac96e360672 1754
charlesmn 0:3ac96e360672 1755 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 0x0ED6
charlesmn 0:3ac96e360672 1756
charlesmn 0:3ac96e360672 1757 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0ED6
charlesmn 0:3ac96e360672 1758
charlesmn 0:3ac96e360672 1759 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0ED7
charlesmn 0:3ac96e360672 1760
charlesmn 0:3ac96e360672 1761 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 0x0ED8
charlesmn 0:3ac96e360672 1762
charlesmn 0:3ac96e360672 1763 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI 0x0ED8
charlesmn 0:3ac96e360672 1764
charlesmn 0:3ac96e360672 1765 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO 0x0ED9
charlesmn 0:3ac96e360672 1766
charlesmn 0:3ac96e360672 1767 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD0 0x0EDA
charlesmn 0:3ac96e360672 1768
charlesmn 0:3ac96e360672 1769 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD0_HI 0x0EDA
charlesmn 0:3ac96e360672 1770
charlesmn 0:3ac96e360672 1771 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD0_LO 0x0EDB
charlesmn 0:3ac96e360672 1772
charlesmn 0:3ac96e360672 1773 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD0 0x0EDC
charlesmn 0:3ac96e360672 1774
charlesmn 0:3ac96e360672 1775 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD0_HI 0x0EDC
charlesmn 0:3ac96e360672 1776
charlesmn 0:3ac96e360672 1777 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD0_LO 0x0EDD
charlesmn 0:3ac96e360672 1778
charlesmn 0:3ac96e360672 1779 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0EDE
charlesmn 0:3ac96e360672 1780
charlesmn 0:3ac96e360672 1781 #define VL53L1_PREV__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI 0x0EDE
charlesmn 0:3ac96e360672 1782
charlesmn 0:3ac96e360672 1783 #define VL53L1_PREV__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO 0x0EDF
charlesmn 0:3ac96e360672 1784
charlesmn 0:3ac96e360672 1785 #define VL53L1_PREV__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 0x0EE0
charlesmn 0:3ac96e360672 1786
charlesmn 0:3ac96e360672 1787 #define VL53L1_PPEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI 0x0EE0
charlesmn 0:3ac96e360672 1788
charlesmn 0:3ac96e360672 1789 #define VL53L1_PPEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO 0x0EE1
charlesmn 0:3ac96e360672 1790
charlesmn 0:3ac96e360672 1791 #define VL53L1_PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0EE2
charlesmn 0:3ac96e360672 1792
charlesmn 0:3ac96e360672 1793 #define VL53L1_PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0EE2
charlesmn 0:3ac96e360672 1794
charlesmn 0:3ac96e360672 1795 #define VL53L1_PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0EE3
charlesmn 0:3ac96e360672 1796
charlesmn 0:3ac96e360672 1797 #define VL53L1_PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0EE4
charlesmn 0:3ac96e360672 1798
charlesmn 0:3ac96e360672 1799 #define VL53L1_PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0EE4
charlesmn 0:3ac96e360672 1800
charlesmn 0:3ac96e360672 1801 #define VL53L1_PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0EE5
charlesmn 0:3ac96e360672 1802
charlesmn 0:3ac96e360672 1803 #define VL53L1_PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 0x0EE6
charlesmn 0:3ac96e360672 1804
charlesmn 0:3ac96e360672 1805 #define VL53L1_PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0EE6
charlesmn 0:3ac96e360672 1806
charlesmn 0:3ac96e360672 1807 #define VL53L1_PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0EE7
charlesmn 0:3ac96e360672 1808
charlesmn 0:3ac96e360672 1809 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 0x0EE8
charlesmn 0:3ac96e360672 1810
charlesmn 0:3ac96e360672 1811 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI 0x0EE8
charlesmn 0:3ac96e360672 1812
charlesmn 0:3ac96e360672 1813 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO 0x0EE9
charlesmn 0:3ac96e360672 1814
charlesmn 0:3ac96e360672 1815 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 0x0EEA
charlesmn 0:3ac96e360672 1816
charlesmn 0:3ac96e360672 1817 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI 0x0EEA
charlesmn 0:3ac96e360672 1818
charlesmn 0:3ac96e360672 1819 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO 0x0EEB
charlesmn 0:3ac96e360672 1820
charlesmn 0:3ac96e360672 1821 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 0x0EEC
charlesmn 0:3ac96e360672 1822
charlesmn 0:3ac96e360672 1823 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI 0x0EEC
charlesmn 0:3ac96e360672 1824
charlesmn 0:3ac96e360672 1825 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO 0x0EED
charlesmn 0:3ac96e360672 1826
charlesmn 0:3ac96e360672 1827 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD1 0x0EEE
charlesmn 0:3ac96e360672 1828
charlesmn 0:3ac96e360672 1829 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD1_HI 0x0EEE
charlesmn 0:3ac96e360672 1830
charlesmn 0:3ac96e360672 1831 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD1_LO 0x0EEF
charlesmn 0:3ac96e360672 1832
charlesmn 0:3ac96e360672 1833 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD1 0x0EF0
charlesmn 0:3ac96e360672 1834
charlesmn 0:3ac96e360672 1835 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD1_HI 0x0EF0
charlesmn 0:3ac96e360672 1836
charlesmn 0:3ac96e360672 1837 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD1_LO 0x0EF1
charlesmn 0:3ac96e360672 1838
charlesmn 0:3ac96e360672 1839 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 0x0EF2
charlesmn 0:3ac96e360672 1840
charlesmn 0:3ac96e360672 1841 #define VL53L1_PFINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI 0x0EF2
charlesmn 0:3ac96e360672 1842
charlesmn 0:3ac96e360672 1843 #define VL53L1_PFINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO 0x0EF3
charlesmn 0:3ac96e360672 1844
charlesmn 0:3ac96e360672 1845 #define VL53L1_PREV_SHADOW_RESULT__SPARE_0_SD1 0x0EF4
charlesmn 0:3ac96e360672 1846
charlesmn 0:3ac96e360672 1847 #define VL53L1_PREV_SHADOW_RESULT__SPARE_0_SD1_HI 0x0EF4
charlesmn 0:3ac96e360672 1848
charlesmn 0:3ac96e360672 1849 #define VL53L1_PREV_SHADOW_RESULT__SPARE_0_SD1_LO 0x0EF5
charlesmn 0:3ac96e360672 1850
charlesmn 0:3ac96e360672 1851 #define VL53L1_PREV_SHADOW_RESULT__SPARE_1_SD1 0x0EF6
charlesmn 0:3ac96e360672 1852
charlesmn 0:3ac96e360672 1853 #define VL53L1_PREV_SHADOW_RESULT__SPARE_1_SD1_HI 0x0EF6
charlesmn 0:3ac96e360672 1854
charlesmn 0:3ac96e360672 1855 #define VL53L1_PREV_SHADOW_RESULT__SPARE_1_SD1_LO 0x0EF7
charlesmn 0:3ac96e360672 1856
charlesmn 0:3ac96e360672 1857 #define VL53L1_PREV_SHADOW_RESULT__SPARE_2_SD1 0x0EF8
charlesmn 0:3ac96e360672 1858
charlesmn 0:3ac96e360672 1859 #define VL53L1_PREV_SHADOW_RESULT__SPARE_2_SD1_HI 0x0EF8
charlesmn 0:3ac96e360672 1860
charlesmn 0:3ac96e360672 1861 #define VL53L1_PREV_SHADOW_RESULT__SPARE_2_SD1_LO 0x0EF9
charlesmn 0:3ac96e360672 1862
charlesmn 0:3ac96e360672 1863 #define VL53L1_PREV_SHADOW_RESULT__SPARE_3_SD1 0x0EFA
charlesmn 0:3ac96e360672 1864
charlesmn 0:3ac96e360672 1865 #define VL53L1_PREV_SHADOW_RESULT__SPARE_3_SD1_HI 0x0EFA
charlesmn 0:3ac96e360672 1866
charlesmn 0:3ac96e360672 1867 #define VL53L1_PREV_SHADOW_RESULT__SPARE_3_SD1_LO 0x0EFB
charlesmn 0:3ac96e360672 1868
charlesmn 0:3ac96e360672 1869 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 0x0EFC
charlesmn 0:3ac96e360672 1870
charlesmn 0:3ac96e360672 1871 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 0x0EFC
charlesmn 0:3ac96e360672 1872
charlesmn 0:3ac96e360672 1873 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 0x0EFD
charlesmn 0:3ac96e360672 1874
charlesmn 0:3ac96e360672 1875 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 0x0EFE
charlesmn 0:3ac96e360672 1876
charlesmn 0:3ac96e360672 1877 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 0x0EFF
charlesmn 0:3ac96e360672 1878
charlesmn 0:3ac96e360672 1879 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 0x0F00
charlesmn 0:3ac96e360672 1880
charlesmn 0:3ac96e360672 1881 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 0x0F00
charlesmn 0:3ac96e360672 1882
charlesmn 0:3ac96e360672 1883 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 0x0F01
charlesmn 0:3ac96e360672 1884
charlesmn 0:3ac96e360672 1885 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 0x0F02
charlesmn 0:3ac96e360672 1886
charlesmn 0:3ac96e360672 1887 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 0x0F03
charlesmn 0:3ac96e360672 1888
charlesmn 0:3ac96e360672 1889 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 0x0F04
charlesmn 0:3ac96e360672 1890
charlesmn 0:3ac96e360672 1891 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 0x0F04
charlesmn 0:3ac96e360672 1892
charlesmn 0:3ac96e360672 1893 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 0x0F05
charlesmn 0:3ac96e360672 1894
charlesmn 0:3ac96e360672 1895 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 0x0F06
charlesmn 0:3ac96e360672 1896
charlesmn 0:3ac96e360672 1897 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 0x0F07
charlesmn 0:3ac96e360672 1898
charlesmn 0:3ac96e360672 1899 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 0x0F08
charlesmn 0:3ac96e360672 1900
charlesmn 0:3ac96e360672 1901 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 0x0F08
charlesmn 0:3ac96e360672 1902
charlesmn 0:3ac96e360672 1903 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 0x0F09
charlesmn 0:3ac96e360672 1904
charlesmn 0:3ac96e360672 1905 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 0x0F0A
charlesmn 0:3ac96e360672 1906
charlesmn 0:3ac96e360672 1907 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 0x0F0B
charlesmn 0:3ac96e360672 1908
charlesmn 0:3ac96e360672 1909 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 0x0F0C
charlesmn 0:3ac96e360672 1910
charlesmn 0:3ac96e360672 1911 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 0x0F0C
charlesmn 0:3ac96e360672 1912
charlesmn 0:3ac96e360672 1913 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 0x0F0D
charlesmn 0:3ac96e360672 1914
charlesmn 0:3ac96e360672 1915 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 0x0F0E
charlesmn 0:3ac96e360672 1916
charlesmn 0:3ac96e360672 1917 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 0x0F0F
charlesmn 0:3ac96e360672 1918
charlesmn 0:3ac96e360672 1919 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 0x0F10
charlesmn 0:3ac96e360672 1920
charlesmn 0:3ac96e360672 1921 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 0x0F10
charlesmn 0:3ac96e360672 1922
charlesmn 0:3ac96e360672 1923 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 0x0F11
charlesmn 0:3ac96e360672 1924
charlesmn 0:3ac96e360672 1925 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 0x0F12
charlesmn 0:3ac96e360672 1926
charlesmn 0:3ac96e360672 1927 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 0x0F13
charlesmn 0:3ac96e360672 1928
charlesmn 0:3ac96e360672 1929 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 0x0F14
charlesmn 0:3ac96e360672 1930
charlesmn 0:3ac96e360672 1931 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 0x0F14
charlesmn 0:3ac96e360672 1932
charlesmn 0:3ac96e360672 1933 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 0x0F15
charlesmn 0:3ac96e360672 1934
charlesmn 0:3ac96e360672 1935 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 0x0F16
charlesmn 0:3ac96e360672 1936
charlesmn 0:3ac96e360672 1937 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 0x0F17
charlesmn 0:3ac96e360672 1938
charlesmn 0:3ac96e360672 1939 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 0x0F18
charlesmn 0:3ac96e360672 1940
charlesmn 0:3ac96e360672 1941 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 0x0F18
charlesmn 0:3ac96e360672 1942
charlesmn 0:3ac96e360672 1943 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 0x0F19
charlesmn 0:3ac96e360672 1944
charlesmn 0:3ac96e360672 1945 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 0x0F1A
charlesmn 0:3ac96e360672 1946
charlesmn 0:3ac96e360672 1947 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 0x0F1B
charlesmn 0:3ac96e360672 1948
charlesmn 0:3ac96e360672 1949 #define VL53L1_PREV_SHADOW_RESULT_CORE__SPARE_0 0x0F1C
charlesmn 0:3ac96e360672 1950
charlesmn 0:3ac96e360672 1951 #define VL53L1_RESULT__DEBUG_STATUS 0x0F20
charlesmn 0:3ac96e360672 1952
charlesmn 0:3ac96e360672 1953 #define VL53L1_RESULT__DEBUG_STAGE 0x0F21
charlesmn 0:3ac96e360672 1954
charlesmn 0:3ac96e360672 1955 #define VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH 0x0F24
charlesmn 0:3ac96e360672 1956
charlesmn 0:3ac96e360672 1957 #define VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH_HI 0x0F24
charlesmn 0:3ac96e360672 1958
charlesmn 0:3ac96e360672 1959 #define VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH_LO 0x0F25
charlesmn 0:3ac96e360672 1960
charlesmn 0:3ac96e360672 1961 #define VL53L1_GPH__SYSTEM__THRESH_RATE_LOW 0x0F26
charlesmn 0:3ac96e360672 1962
charlesmn 0:3ac96e360672 1963 #define VL53L1_GPH__SYSTEM__THRESH_RATE_LOW_HI 0x0F26
charlesmn 0:3ac96e360672 1964
charlesmn 0:3ac96e360672 1965 #define VL53L1_GPH__SYSTEM__THRESH_RATE_LOW_LO 0x0F27
charlesmn 0:3ac96e360672 1966
charlesmn 0:3ac96e360672 1967 #define VL53L1_GPH__SYSTEM__INTERRUPT_CONFIG_GPIO 0x0F28
charlesmn 0:3ac96e360672 1968
charlesmn 0:3ac96e360672 1969 #define VL53L1_GPH__DSS_CONFIG__ROI_MODE_CONTROL 0x0F2F
charlesmn 0:3ac96e360672 1970
charlesmn 0:3ac96e360672 1971 #define VL53L1_GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT 0x0F30
charlesmn 0:3ac96e360672 1972
charlesmn 0:3ac96e360672 1973 #define VL53L1_GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_HI 0x0F30
charlesmn 0:3ac96e360672 1974
charlesmn 0:3ac96e360672 1975 #define VL53L1_GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_LO 0x0F31
charlesmn 0:3ac96e360672 1976
charlesmn 0:3ac96e360672 1977 #define VL53L1_GPH__DSS_CONFIG__MANUAL_BLOCK_SELECT 0x0F32
charlesmn 0:3ac96e360672 1978
charlesmn 0:3ac96e360672 1979 #define VL53L1_GPH__DSS_CONFIG__MAX_SPADS_LIMIT 0x0F33
charlesmn 0:3ac96e360672 1980
charlesmn 0:3ac96e360672 1981 #define VL53L1_GPH__DSS_CONFIG__MIN_SPADS_LIMIT 0x0F34
charlesmn 0:3ac96e360672 1982
charlesmn 0:3ac96e360672 1983 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_A_HI 0x0F36
charlesmn 0:3ac96e360672 1984
charlesmn 0:3ac96e360672 1985 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_A_LO 0x0F37
charlesmn 0:3ac96e360672 1986
charlesmn 0:3ac96e360672 1987 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_B_HI 0x0F38
charlesmn 0:3ac96e360672 1988
charlesmn 0:3ac96e360672 1989 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_B_LO 0x0F39
charlesmn 0:3ac96e360672 1990
charlesmn 0:3ac96e360672 1991 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_A_HI 0x0F3A
charlesmn 0:3ac96e360672 1992
charlesmn 0:3ac96e360672 1993 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_A_LO 0x0F3B
charlesmn 0:3ac96e360672 1994
charlesmn 0:3ac96e360672 1995 #define VL53L1_GPH__RANGE_CONFIG__VCSEL_PERIOD_A 0x0F3C
charlesmn 0:3ac96e360672 1996
charlesmn 0:3ac96e360672 1997 #define VL53L1_GPH__RANGE_CONFIG__VCSEL_PERIOD_B 0x0F3D
charlesmn 0:3ac96e360672 1998
charlesmn 0:3ac96e360672 1999 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_B_HI 0x0F3E
charlesmn 0:3ac96e360672 2000
charlesmn 0:3ac96e360672 2001 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_B_LO 0x0F3F
charlesmn 0:3ac96e360672 2002
charlesmn 0:3ac96e360672 2003 #define VL53L1_GPH__RANGE_CONFIG__SIGMA_THRESH 0x0F40
charlesmn 0:3ac96e360672 2004
charlesmn 0:3ac96e360672 2005 #define VL53L1_GPH__RANGE_CONFIG__SIGMA_THRESH_HI 0x0F40
charlesmn 0:3ac96e360672 2006
charlesmn 0:3ac96e360672 2007 #define VL53L1_GPH__RANGE_CONFIG__SIGMA_THRESH_LO 0x0F41
charlesmn 0:3ac96e360672 2008
charlesmn 0:3ac96e360672 2009 #define VL53L1_GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS 0x0F42
charlesmn 0:3ac96e360672 2010
charlesmn 0:3ac96e360672 2011 #define VL53L1_GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_HI 0x0F42
charlesmn 0:3ac96e360672 2012
charlesmn 0:3ac96e360672 2013 #define VL53L1_GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_LO 0x0F43
charlesmn 0:3ac96e360672 2014
charlesmn 0:3ac96e360672 2015 #define VL53L1_GPH__RANGE_CONFIG__VALID_PHASE_LOW 0x0F44
charlesmn 0:3ac96e360672 2016
charlesmn 0:3ac96e360672 2017 #define VL53L1_GPH__RANGE_CONFIG__VALID_PHASE_HIGH 0x0F45
charlesmn 0:3ac96e360672 2018
charlesmn 0:3ac96e360672 2019 #define VL53L1_FIRMWARE__INTERNAL_STREAM_COUNT_DIV 0x0F46
charlesmn 0:3ac96e360672 2020
charlesmn 0:3ac96e360672 2021 #define VL53L1_FIRMWARE__INTERNAL_STREAM_COUNTER_VAL 0x0F47
charlesmn 0:3ac96e360672 2022
charlesmn 0:3ac96e360672 2023 #define VL53L1_DSS_CALC__ROI_CTRL 0x0F54
charlesmn 0:3ac96e360672 2024
charlesmn 0:3ac96e360672 2025 #define VL53L1_DSS_CALC__SPARE_1 0x0F55
charlesmn 0:3ac96e360672 2026
charlesmn 0:3ac96e360672 2027 #define VL53L1_DSS_CALC__SPARE_2 0x0F56
charlesmn 0:3ac96e360672 2028
charlesmn 0:3ac96e360672 2029 #define VL53L1_DSS_CALC__SPARE_3 0x0F57
charlesmn 0:3ac96e360672 2030
charlesmn 0:3ac96e360672 2031 #define VL53L1_DSS_CALC__SPARE_4 0x0F58
charlesmn 0:3ac96e360672 2032
charlesmn 0:3ac96e360672 2033 #define VL53L1_DSS_CALC__SPARE_5 0x0F59
charlesmn 0:3ac96e360672 2034
charlesmn 0:3ac96e360672 2035 #define VL53L1_DSS_CALC__SPARE_6 0x0F5A
charlesmn 0:3ac96e360672 2036
charlesmn 0:3ac96e360672 2037 #define VL53L1_DSS_CALC__SPARE_7 0x0F5B
charlesmn 0:3ac96e360672 2038
charlesmn 0:3ac96e360672 2039 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_0 0x0F5C
charlesmn 0:3ac96e360672 2040
charlesmn 0:3ac96e360672 2041 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_1 0x0F5D
charlesmn 0:3ac96e360672 2042
charlesmn 0:3ac96e360672 2043 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_2 0x0F5E
charlesmn 0:3ac96e360672 2044
charlesmn 0:3ac96e360672 2045 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_3 0x0F5F
charlesmn 0:3ac96e360672 2046
charlesmn 0:3ac96e360672 2047 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_4 0x0F60
charlesmn 0:3ac96e360672 2048
charlesmn 0:3ac96e360672 2049 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_5 0x0F61
charlesmn 0:3ac96e360672 2050
charlesmn 0:3ac96e360672 2051 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_6 0x0F62
charlesmn 0:3ac96e360672 2052
charlesmn 0:3ac96e360672 2053 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_7 0x0F63
charlesmn 0:3ac96e360672 2054
charlesmn 0:3ac96e360672 2055 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_8 0x0F64
charlesmn 0:3ac96e360672 2056
charlesmn 0:3ac96e360672 2057 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_9 0x0F65
charlesmn 0:3ac96e360672 2058
charlesmn 0:3ac96e360672 2059 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_10 0x0F66
charlesmn 0:3ac96e360672 2060
charlesmn 0:3ac96e360672 2061 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_11 0x0F67
charlesmn 0:3ac96e360672 2062
charlesmn 0:3ac96e360672 2063 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_12 0x0F68
charlesmn 0:3ac96e360672 2064
charlesmn 0:3ac96e360672 2065 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_13 0x0F69
charlesmn 0:3ac96e360672 2066
charlesmn 0:3ac96e360672 2067 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_14 0x0F6A
charlesmn 0:3ac96e360672 2068
charlesmn 0:3ac96e360672 2069 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_15 0x0F6B
charlesmn 0:3ac96e360672 2070
charlesmn 0:3ac96e360672 2071 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_16 0x0F6C
charlesmn 0:3ac96e360672 2072
charlesmn 0:3ac96e360672 2073 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_17 0x0F6D
charlesmn 0:3ac96e360672 2074
charlesmn 0:3ac96e360672 2075 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_18 0x0F6E
charlesmn 0:3ac96e360672 2076
charlesmn 0:3ac96e360672 2077 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_19 0x0F6F
charlesmn 0:3ac96e360672 2078
charlesmn 0:3ac96e360672 2079 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_20 0x0F70
charlesmn 0:3ac96e360672 2080
charlesmn 0:3ac96e360672 2081 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_21 0x0F71
charlesmn 0:3ac96e360672 2082
charlesmn 0:3ac96e360672 2083 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_22 0x0F72
charlesmn 0:3ac96e360672 2084
charlesmn 0:3ac96e360672 2085 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_23 0x0F73
charlesmn 0:3ac96e360672 2086
charlesmn 0:3ac96e360672 2087 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_24 0x0F74
charlesmn 0:3ac96e360672 2088
charlesmn 0:3ac96e360672 2089 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_25 0x0F75
charlesmn 0:3ac96e360672 2090
charlesmn 0:3ac96e360672 2091 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_26 0x0F76
charlesmn 0:3ac96e360672 2092
charlesmn 0:3ac96e360672 2093 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_27 0x0F77
charlesmn 0:3ac96e360672 2094
charlesmn 0:3ac96e360672 2095 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_28 0x0F78
charlesmn 0:3ac96e360672 2096
charlesmn 0:3ac96e360672 2097 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_29 0x0F79
charlesmn 0:3ac96e360672 2098
charlesmn 0:3ac96e360672 2099 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_30 0x0F7A
charlesmn 0:3ac96e360672 2100
charlesmn 0:3ac96e360672 2101 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_31 0x0F7B
charlesmn 0:3ac96e360672 2102
charlesmn 0:3ac96e360672 2103 #define VL53L1_DSS_CALC__USER_ROI_0 0x0F7C
charlesmn 0:3ac96e360672 2104
charlesmn 0:3ac96e360672 2105 #define VL53L1_DSS_CALC__USER_ROI_1 0x0F7D
charlesmn 0:3ac96e360672 2106
charlesmn 0:3ac96e360672 2107 #define VL53L1_DSS_CALC__MODE_ROI_0 0x0F7E
charlesmn 0:3ac96e360672 2108
charlesmn 0:3ac96e360672 2109 #define VL53L1_DSS_CALC__MODE_ROI_1 0x0F7F
charlesmn 0:3ac96e360672 2110
charlesmn 0:3ac96e360672 2111 #define VL53L1_SIGMA_ESTIMATOR_CALC__SPARE_0 0x0F80
charlesmn 0:3ac96e360672 2112
charlesmn 0:3ac96e360672 2113 #define VL53L1_VHV_RESULT__PEAK_SIGNAL_RATE_MCPS 0x0F82
charlesmn 0:3ac96e360672 2114
charlesmn 0:3ac96e360672 2115 #define VL53L1_VHV_RESULT__PEAK_SIGNAL_RATE_MCPS_HI 0x0F82
charlesmn 0:3ac96e360672 2116
charlesmn 0:3ac96e360672 2117 #define VL53L1_VHV_RESULT__PEAK_SIGNAL_RATE_MCPS_LO 0x0F83
charlesmn 0:3ac96e360672 2118
charlesmn 0:3ac96e360672 2119 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF 0x0F84
charlesmn 0:3ac96e360672 2120
charlesmn 0:3ac96e360672 2121 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_3 0x0F84
charlesmn 0:3ac96e360672 2122
charlesmn 0:3ac96e360672 2123 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_2 0x0F85
charlesmn 0:3ac96e360672 2124
charlesmn 0:3ac96e360672 2125 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_1 0x0F86
charlesmn 0:3ac96e360672 2126
charlesmn 0:3ac96e360672 2127 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_0 0x0F87
charlesmn 0:3ac96e360672 2128
charlesmn 0:3ac96e360672 2129 #define VL53L1_PHASECAL_RESULT__PHASE_OUTPUT_REF 0x0F88
charlesmn 0:3ac96e360672 2130
charlesmn 0:3ac96e360672 2131 #define VL53L1_PHASECAL_RESULT__PHASE_OUTPUT_REF_HI 0x0F88
charlesmn 0:3ac96e360672 2132
charlesmn 0:3ac96e360672 2133 #define VL53L1_PHASECAL_RESULT__PHASE_OUTPUT_REF_LO 0x0F89
charlesmn 0:3ac96e360672 2134
charlesmn 0:3ac96e360672 2135 #define VL53L1_DSS_RESULT__TOTAL_RATE_PER_SPAD 0x0F8A
charlesmn 0:3ac96e360672 2136
charlesmn 0:3ac96e360672 2137 #define VL53L1_DSS_RESULT__TOTAL_RATE_PER_SPAD_HI 0x0F8A
charlesmn 0:3ac96e360672 2138
charlesmn 0:3ac96e360672 2139 #define VL53L1_DSS_RESULT__TOTAL_RATE_PER_SPAD_LO 0x0F8B
charlesmn 0:3ac96e360672 2140
charlesmn 0:3ac96e360672 2141 #define VL53L1_DSS_RESULT__ENABLED_BLOCKS 0x0F8C
charlesmn 0:3ac96e360672 2142
charlesmn 0:3ac96e360672 2143 #define VL53L1_DSS_RESULT__NUM_REQUESTED_SPADS 0x0F8E
charlesmn 0:3ac96e360672 2144
charlesmn 0:3ac96e360672 2145 #define VL53L1_DSS_RESULT__NUM_REQUESTED_SPADS_HI 0x0F8E
charlesmn 0:3ac96e360672 2146
charlesmn 0:3ac96e360672 2147 #define VL53L1_DSS_RESULT__NUM_REQUESTED_SPADS_LO 0x0F8F
charlesmn 0:3ac96e360672 2148
charlesmn 0:3ac96e360672 2149 #define VL53L1_MM_RESULT__INNER_INTERSECTION_RATE 0x0F92
charlesmn 0:3ac96e360672 2150
charlesmn 0:3ac96e360672 2151 #define VL53L1_MM_RESULT__INNER_INTERSECTION_RATE_HI 0x0F92
charlesmn 0:3ac96e360672 2152
charlesmn 0:3ac96e360672 2153 #define VL53L1_MM_RESULT__INNER_INTERSECTION_RATE_LO 0x0F93
charlesmn 0:3ac96e360672 2154
charlesmn 0:3ac96e360672 2155 #define VL53L1_MM_RESULT__OUTER_COMPLEMENT_RATE 0x0F94
charlesmn 0:3ac96e360672 2156
charlesmn 0:3ac96e360672 2157 #define VL53L1_MM_RESULT__OUTER_COMPLEMENT_RATE_HI 0x0F94
charlesmn 0:3ac96e360672 2158
charlesmn 0:3ac96e360672 2159 #define VL53L1_MM_RESULT__OUTER_COMPLEMENT_RATE_LO 0x0F95
charlesmn 0:3ac96e360672 2160
charlesmn 0:3ac96e360672 2161 #define VL53L1_MM_RESULT__TOTAL_OFFSET 0x0F96
charlesmn 0:3ac96e360672 2162
charlesmn 0:3ac96e360672 2163 #define VL53L1_MM_RESULT__TOTAL_OFFSET_HI 0x0F96
charlesmn 0:3ac96e360672 2164
charlesmn 0:3ac96e360672 2165 #define VL53L1_MM_RESULT__TOTAL_OFFSET_LO 0x0F97
charlesmn 0:3ac96e360672 2166
charlesmn 0:3ac96e360672 2167 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS 0x0F98
charlesmn 0:3ac96e360672 2168
charlesmn 0:3ac96e360672 2169 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_3 0x0F98
charlesmn 0:3ac96e360672 2170
charlesmn 0:3ac96e360672 2171 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_2 0x0F99
charlesmn 0:3ac96e360672 2172
charlesmn 0:3ac96e360672 2173 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_1 0x0F9A
charlesmn 0:3ac96e360672 2174
charlesmn 0:3ac96e360672 2175 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_0 0x0F9B
charlesmn 0:3ac96e360672 2176
charlesmn 0:3ac96e360672 2177 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS 0x0F9C
charlesmn 0:3ac96e360672 2178
charlesmn 0:3ac96e360672 2179 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_3 0x0F9C
charlesmn 0:3ac96e360672 2180
charlesmn 0:3ac96e360672 2181 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_2 0x0F9D
charlesmn 0:3ac96e360672 2182
charlesmn 0:3ac96e360672 2183 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_1 0x0F9E
charlesmn 0:3ac96e360672 2184
charlesmn 0:3ac96e360672 2185 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_0 0x0F9F
charlesmn 0:3ac96e360672 2186
charlesmn 0:3ac96e360672 2187 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS 0x0FA0
charlesmn 0:3ac96e360672 2188
charlesmn 0:3ac96e360672 2189 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_3 0x0FA0
charlesmn 0:3ac96e360672 2190
charlesmn 0:3ac96e360672 2191 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_2 0x0FA1
charlesmn 0:3ac96e360672 2192
charlesmn 0:3ac96e360672 2193 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_1 0x0FA2
charlesmn 0:3ac96e360672 2194
charlesmn 0:3ac96e360672 2195 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_0 0x0FA3
charlesmn 0:3ac96e360672 2196
charlesmn 0:3ac96e360672 2197 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS 0x0FA4
charlesmn 0:3ac96e360672 2198
charlesmn 0:3ac96e360672 2199 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_3 0x0FA4
charlesmn 0:3ac96e360672 2200
charlesmn 0:3ac96e360672 2201 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_2 0x0FA5
charlesmn 0:3ac96e360672 2202
charlesmn 0:3ac96e360672 2203 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_1 0x0FA6
charlesmn 0:3ac96e360672 2204
charlesmn 0:3ac96e360672 2205 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_0 0x0FA7
charlesmn 0:3ac96e360672 2206
charlesmn 0:3ac96e360672 2207 #define VL53L1_RANGE_RESULT__ACCUM_PHASE 0x0FA8
charlesmn 0:3ac96e360672 2208
charlesmn 0:3ac96e360672 2209 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_3 0x0FA8
charlesmn 0:3ac96e360672 2210
charlesmn 0:3ac96e360672 2211 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_2 0x0FA9
charlesmn 0:3ac96e360672 2212
charlesmn 0:3ac96e360672 2213 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_1 0x0FAA
charlesmn 0:3ac96e360672 2214
charlesmn 0:3ac96e360672 2215 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_0 0x0FAB
charlesmn 0:3ac96e360672 2216
charlesmn 0:3ac96e360672 2217 #define VL53L1_RANGE_RESULT__OFFSET_CORRECTED_RANGE 0x0FAC
charlesmn 0:3ac96e360672 2218
charlesmn 0:3ac96e360672 2219 #define VL53L1_RANGE_RESULT__OFFSET_CORRECTED_RANGE_HI 0x0FAC
charlesmn 0:3ac96e360672 2220
charlesmn 0:3ac96e360672 2221 #define VL53L1_RANGE_RESULT__OFFSET_CORRECTED_RANGE_LO 0x0FAD
charlesmn 0:3ac96e360672 2222
charlesmn 0:3ac96e360672 2223 #define VL53L1_SHADOW_PHASECAL_RESULT__VCSEL_START 0x0FAE
charlesmn 0:3ac96e360672 2224
charlesmn 0:3ac96e360672 2225 #define VL53L1_SHADOW_RESULT__INTERRUPT_STATUS 0x0FB0
charlesmn 0:3ac96e360672 2226
charlesmn 0:3ac96e360672 2227 #define VL53L1_SHADOW_RESULT__RANGE_STATUS 0x0FB1
charlesmn 0:3ac96e360672 2228
charlesmn 0:3ac96e360672 2229 #define VL53L1_SHADOW_RESULT__REPORT_STATUS 0x0FB2
charlesmn 0:3ac96e360672 2230
charlesmn 0:3ac96e360672 2231 #define VL53L1_SHADOW_RESULT__STREAM_COUNT 0x0FB3
charlesmn 0:3ac96e360672 2232
charlesmn 0:3ac96e360672 2233 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 0x0FB4
charlesmn 0:3ac96e360672 2234
charlesmn 0:3ac96e360672 2235 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0FB4
charlesmn 0:3ac96e360672 2236
charlesmn 0:3ac96e360672 2237 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0FB5
charlesmn 0:3ac96e360672 2238
charlesmn 0:3ac96e360672 2239 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 0x0FB6
charlesmn 0:3ac96e360672 2240
charlesmn 0:3ac96e360672 2241 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0FB6
charlesmn 0:3ac96e360672 2242
charlesmn 0:3ac96e360672 2243 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0FB7
charlesmn 0:3ac96e360672 2244
charlesmn 0:3ac96e360672 2245 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 0x0FB8
charlesmn 0:3ac96e360672 2246
charlesmn 0:3ac96e360672 2247 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI 0x0FB8
charlesmn 0:3ac96e360672 2248
charlesmn 0:3ac96e360672 2249 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO 0x0FB9
charlesmn 0:3ac96e360672 2250
charlesmn 0:3ac96e360672 2251 #define VL53L1_SHADOW_RESULT__SIGMA_SD0 0x0FBA
charlesmn 0:3ac96e360672 2252
charlesmn 0:3ac96e360672 2253 #define VL53L1_SHADOW_RESULT__SIGMA_SD0_HI 0x0FBA
charlesmn 0:3ac96e360672 2254
charlesmn 0:3ac96e360672 2255 #define VL53L1_SHADOW_RESULT__SIGMA_SD0_LO 0x0FBB
charlesmn 0:3ac96e360672 2256
charlesmn 0:3ac96e360672 2257 #define VL53L1_SHADOW_RESULT__PHASE_SD0 0x0FBC
charlesmn 0:3ac96e360672 2258
charlesmn 0:3ac96e360672 2259 #define VL53L1_SHADOW_RESULT__PHASE_SD0_HI 0x0FBC
charlesmn 0:3ac96e360672 2260
charlesmn 0:3ac96e360672 2261 #define VL53L1_SHADOW_RESULT__PHASE_SD0_LO 0x0FBD
charlesmn 0:3ac96e360672 2262
charlesmn 0:3ac96e360672 2263 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0FBE
charlesmn 0:3ac96e360672 2264
charlesmn 0:3ac96e360672 2265 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI 0x0FBE
charlesmn 0:3ac96e360672 2266
charlesmn 0:3ac96e360672 2267 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO 0x0FBF
charlesmn 0:3ac96e360672 2268
charlesmn 0:3ac96e360672 2269 #define VL53L1_SHPEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 0x0FC0
charlesmn 0:3ac96e360672 2270
charlesmn 0:3ac96e360672 2271 #define VL53L1_SHPEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI 0x0FC0
charlesmn 0:3ac96e360672 2272
charlesmn 0:3ac96e360672 2273 #define VL53L1_SHPEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO 0x0FC1
charlesmn 0:3ac96e360672 2274
charlesmn 0:3ac96e360672 2275 #define VL53L1_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0FC2
charlesmn 0:3ac96e360672 2276
charlesmn 0:3ac96e360672 2277 #define VL53L1_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0FC2
charlesmn 0:3ac96e360672 2278
charlesmn 0:3ac96e360672 2279 #define VL53L1_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0FC3
charlesmn 0:3ac96e360672 2280
charlesmn 0:3ac96e360672 2281 #define VL53L1_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0FC4
charlesmn 0:3ac96e360672 2282
charlesmn 0:3ac96e360672 2283 #define VL53L1_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0FC4
charlesmn 0:3ac96e360672 2284
charlesmn 0:3ac96e360672 2285 #define VL53L1_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0FC5
charlesmn 0:3ac96e360672 2286
charlesmn 0:3ac96e360672 2287 #define VL53L1_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 0x0FC6
charlesmn 0:3ac96e360672 2288
charlesmn 0:3ac96e360672 2289 #define VL53L1_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0FC6
charlesmn 0:3ac96e360672 2290
charlesmn 0:3ac96e360672 2291 #define VL53L1_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0FC7
charlesmn 0:3ac96e360672 2292
charlesmn 0:3ac96e360672 2293 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 0x0FC8
charlesmn 0:3ac96e360672 2294
charlesmn 0:3ac96e360672 2295 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI 0x0FC8
charlesmn 0:3ac96e360672 2296
charlesmn 0:3ac96e360672 2297 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO 0x0FC9
charlesmn 0:3ac96e360672 2298
charlesmn 0:3ac96e360672 2299 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 0x0FCA
charlesmn 0:3ac96e360672 2300
charlesmn 0:3ac96e360672 2301 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI 0x0FCA
charlesmn 0:3ac96e360672 2302
charlesmn 0:3ac96e360672 2303 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO 0x0FCB
charlesmn 0:3ac96e360672 2304
charlesmn 0:3ac96e360672 2305 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 0x0FCC
charlesmn 0:3ac96e360672 2306
charlesmn 0:3ac96e360672 2307 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI 0x0FCC
charlesmn 0:3ac96e360672 2308
charlesmn 0:3ac96e360672 2309 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO 0x0FCD
charlesmn 0:3ac96e360672 2310
charlesmn 0:3ac96e360672 2311 #define VL53L1_SHADOW_RESULT__SIGMA_SD1 0x0FCE
charlesmn 0:3ac96e360672 2312
charlesmn 0:3ac96e360672 2313 #define VL53L1_SHADOW_RESULT__SIGMA_SD1_HI 0x0FCE
charlesmn 0:3ac96e360672 2314
charlesmn 0:3ac96e360672 2315 #define VL53L1_SHADOW_RESULT__SIGMA_SD1_LO 0x0FCF
charlesmn 0:3ac96e360672 2316
charlesmn 0:3ac96e360672 2317 #define VL53L1_SHADOW_RESULT__PHASE_SD1 0x0FD0
charlesmn 0:3ac96e360672 2318
charlesmn 0:3ac96e360672 2319 #define VL53L1_SHADOW_RESULT__PHASE_SD1_HI 0x0FD0
charlesmn 0:3ac96e360672 2320
charlesmn 0:3ac96e360672 2321 #define VL53L1_SHADOW_RESULT__PHASE_SD1_LO 0x0FD1
charlesmn 0:3ac96e360672 2322
charlesmn 0:3ac96e360672 2323 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 0x0FD2
charlesmn 0:3ac96e360672 2324
charlesmn 0:3ac96e360672 2325 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI 0x0FD2
charlesmn 0:3ac96e360672 2326
charlesmn 0:3ac96e360672 2327 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO 0x0FD3
charlesmn 0:3ac96e360672 2328
charlesmn 0:3ac96e360672 2329 #define VL53L1_SHADOW_RESULT__SPARE_0_SD1 0x0FD4
charlesmn 0:3ac96e360672 2330
charlesmn 0:3ac96e360672 2331 #define VL53L1_SHADOW_RESULT__SPARE_0_SD1_HI 0x0FD4
charlesmn 0:3ac96e360672 2332
charlesmn 0:3ac96e360672 2333 #define VL53L1_SHADOW_RESULT__SPARE_0_SD1_LO 0x0FD5
charlesmn 0:3ac96e360672 2334
charlesmn 0:3ac96e360672 2335 #define VL53L1_SHADOW_RESULT__SPARE_1_SD1 0x0FD6
charlesmn 0:3ac96e360672 2336
charlesmn 0:3ac96e360672 2337 #define VL53L1_SHADOW_RESULT__SPARE_1_SD1_HI 0x0FD6
charlesmn 0:3ac96e360672 2338
charlesmn 0:3ac96e360672 2339 #define VL53L1_SHADOW_RESULT__SPARE_1_SD1_LO 0x0FD7
charlesmn 0:3ac96e360672 2340
charlesmn 0:3ac96e360672 2341 #define VL53L1_SHADOW_RESULT__SPARE_2_SD1 0x0FD8
charlesmn 0:3ac96e360672 2342
charlesmn 0:3ac96e360672 2343 #define VL53L1_SHADOW_RESULT__SPARE_2_SD1_HI 0x0FD8
charlesmn 0:3ac96e360672 2344
charlesmn 0:3ac96e360672 2345 #define VL53L1_SHADOW_RESULT__SPARE_2_SD1_LO 0x0FD9
charlesmn 0:3ac96e360672 2346
charlesmn 0:3ac96e360672 2347 #define VL53L1_SHADOW_RESULT__SPARE_3_SD1 0x0FDA
charlesmn 0:3ac96e360672 2348
charlesmn 0:3ac96e360672 2349 #define VL53L1_SHADOW_RESULT__THRESH_INFO 0x0FDB
charlesmn 0:3ac96e360672 2350
charlesmn 0:3ac96e360672 2351 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 0x0FDC
charlesmn 0:3ac96e360672 2352
charlesmn 0:3ac96e360672 2353 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 0x0FDC
charlesmn 0:3ac96e360672 2354
charlesmn 0:3ac96e360672 2355 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 0x0FDD
charlesmn 0:3ac96e360672 2356
charlesmn 0:3ac96e360672 2357 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 0x0FDE
charlesmn 0:3ac96e360672 2358
charlesmn 0:3ac96e360672 2359 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 0x0FDF
charlesmn 0:3ac96e360672 2360
charlesmn 0:3ac96e360672 2361 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 0x0FE0
charlesmn 0:3ac96e360672 2362
charlesmn 0:3ac96e360672 2363 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 0x0FE0
charlesmn 0:3ac96e360672 2364
charlesmn 0:3ac96e360672 2365 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 0x0FE1
charlesmn 0:3ac96e360672 2366
charlesmn 0:3ac96e360672 2367 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 0x0FE2
charlesmn 0:3ac96e360672 2368
charlesmn 0:3ac96e360672 2369 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 0x0FE3
charlesmn 0:3ac96e360672 2370
charlesmn 0:3ac96e360672 2371 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 0x0FE4
charlesmn 0:3ac96e360672 2372
charlesmn 0:3ac96e360672 2373 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 0x0FE4
charlesmn 0:3ac96e360672 2374
charlesmn 0:3ac96e360672 2375 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 0x0FE5
charlesmn 0:3ac96e360672 2376
charlesmn 0:3ac96e360672 2377 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 0x0FE6
charlesmn 0:3ac96e360672 2378
charlesmn 0:3ac96e360672 2379 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 0x0FE7
charlesmn 0:3ac96e360672 2380
charlesmn 0:3ac96e360672 2381 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 0x0FE8
charlesmn 0:3ac96e360672 2382
charlesmn 0:3ac96e360672 2383 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 0x0FE8
charlesmn 0:3ac96e360672 2384
charlesmn 0:3ac96e360672 2385 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 0x0FE9
charlesmn 0:3ac96e360672 2386
charlesmn 0:3ac96e360672 2387 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 0x0FEA
charlesmn 0:3ac96e360672 2388
charlesmn 0:3ac96e360672 2389 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 0x0FEB
charlesmn 0:3ac96e360672 2390
charlesmn 0:3ac96e360672 2391 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 0x0FEC
charlesmn 0:3ac96e360672 2392
charlesmn 0:3ac96e360672 2393 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 0x0FEC
charlesmn 0:3ac96e360672 2394
charlesmn 0:3ac96e360672 2395 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 0x0FED
charlesmn 0:3ac96e360672 2396
charlesmn 0:3ac96e360672 2397 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 0x0FEE
charlesmn 0:3ac96e360672 2398
charlesmn 0:3ac96e360672 2399 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 0x0FEF
charlesmn 0:3ac96e360672 2400
charlesmn 0:3ac96e360672 2401 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 0x0FF0
charlesmn 0:3ac96e360672 2402
charlesmn 0:3ac96e360672 2403 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 0x0FF0
charlesmn 0:3ac96e360672 2404
charlesmn 0:3ac96e360672 2405 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 0x0FF1
charlesmn 0:3ac96e360672 2406
charlesmn 0:3ac96e360672 2407 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 0x0FF2
charlesmn 0:3ac96e360672 2408
charlesmn 0:3ac96e360672 2409 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 0x0FF3
charlesmn 0:3ac96e360672 2410
charlesmn 0:3ac96e360672 2411 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 0x0FF4
charlesmn 0:3ac96e360672 2412
charlesmn 0:3ac96e360672 2413 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 0x0FF4
charlesmn 0:3ac96e360672 2414
charlesmn 0:3ac96e360672 2415 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 0x0FF5
charlesmn 0:3ac96e360672 2416
charlesmn 0:3ac96e360672 2417 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 0x0FF6
charlesmn 0:3ac96e360672 2418
charlesmn 0:3ac96e360672 2419 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 0x0FF7
charlesmn 0:3ac96e360672 2420
charlesmn 0:3ac96e360672 2421 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 0x0FF8
charlesmn 0:3ac96e360672 2422
charlesmn 0:3ac96e360672 2423 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 0x0FF8
charlesmn 0:3ac96e360672 2424
charlesmn 0:3ac96e360672 2425 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 0x0FF9
charlesmn 0:3ac96e360672 2426
charlesmn 0:3ac96e360672 2427 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 0x0FFA
charlesmn 0:3ac96e360672 2428
charlesmn 0:3ac96e360672 2429 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 0x0FFB
charlesmn 0:3ac96e360672 2430
charlesmn 0:3ac96e360672 2431 #define VL53L1_SHADOW_RESULT_CORE__SPARE_0 0x0FFC
charlesmn 0:3ac96e360672 2432
charlesmn 0:3ac96e360672 2433 #define VL53L1_SHADOW_PHASECAL_RESULT__REFERENCE_PHASE_HI 0x0FFE
charlesmn 0:3ac96e360672 2434
charlesmn 0:3ac96e360672 2435 #define VL53L1_SHADOW_PHASECAL_RESULT__REFERENCE_PHASE_LO 0x0FFF
charlesmn 0:3ac96e360672 2436
charlesmn 0:3ac96e360672 2437
charlesmn 0:3ac96e360672 2438
charlesmn 0:3ac96e360672 2439
charlesmn 0:3ac96e360672 2440
charlesmn 0:3ac96e360672 2441 #endif
charlesmn 0:3ac96e360672 2442
charlesmn 0:3ac96e360672 2443
charlesmn 0:3ac96e360672 2444