ST Expansion SW Team / VL53L1CB

The VL53L1CB proximity sensor, based on ST’s FlightSense™, Time-of-Flight technology.

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   VL53L1CB_noshield_1sensor_polls_auton VL53L1CB_noshield_1sensor_interrupt_auton X_NUCLEO_53L1A2

Based on VL53L1 library, this is a library for the VL53L1CB ToF chip.

src/vl53l1_api_preset_modes.c@18:0696efe39d08, 2021-07-21 (annotated)

Committer:
lugandc
Date:
Wed Jul 21 17:06:38 2021 +0200
Revision:
18:0696efe39d08
Parent:
7:1add29d51e72 
Cleanup i2c functions, removed all bad references to L1X

Cleanup VL53L1CB class:

 - i2c device object is passed in a consistent way in MyDevice structure

 - removed useless functions

Updated VL53L1CB component driver with bare driver release 6.6.7 content

Who changed what in which revision?

UserRevisionLine numberNew contents of line
charlesmn 0:3ac96e360672 1
Charles MacNeill 7:1add29d51e72 2 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Charles MacNeill 7:1add29d51e72 3 /******************************************************************************
charlesmn 0:3ac96e360672 4 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
charlesmn 0:3ac96e360672 5
Charles MacNeill 7:1add29d51e72 6 This file is part of VL53L1 and is dual licensed,
Charles MacNeill 7:1add29d51e72 7 either GPL-2.0+
charlesmn 0:3ac96e360672 8 or 'BSD 3-clause "New" or "Revised" License' , at your option.
Charles MacNeill 7:1add29d51e72 9 ******************************************************************************
Charles MacNeill 7:1add29d51e72 10 */
charlesmn 0:3ac96e360672 11
charlesmn 0:3ac96e360672 12
charlesmn 0:3ac96e360672 13
charlesmn 0:3ac96e360672 14
charlesmn 0:3ac96e360672 15 #include "vl53l1_ll_def.h"
charlesmn 0:3ac96e360672 16 #include "vl53l1_platform_log.h"
charlesmn 0:3ac96e360672 17 #include "vl53l1_register_structs.h"
charlesmn 0:3ac96e360672 18 #include "vl53l1_register_settings.h"
charlesmn 0:3ac96e360672 19 #include "vl53l1_hist_structs.h"
charlesmn 0:3ac96e360672 20 #include "vl53l1_zone_presets.h"
charlesmn 0:3ac96e360672 21 #include "vl53l1_core.h"
charlesmn 0:3ac96e360672 22 #include "vl53l1_api_preset_modes.h"
charlesmn 0:3ac96e360672 23 #include "vl53l1_tuning_parm_defaults.h"
charlesmn 0:3ac96e360672 24
charlesmn 0:3ac96e360672 25
charlesmn 0:3ac96e360672 26 #define LOG_FUNCTION_START(fmt, ...) \
charlesmn 0:3ac96e360672 27 _LOG_FUNCTION_START(VL53L1_TRACE_MODULE_API, fmt, ##__VA_ARGS__)
charlesmn 0:3ac96e360672 28 #define LOG_FUNCTION_END(status, ...) \
charlesmn 0:3ac96e360672 29 _LOG_FUNCTION_END(VL53L1_TRACE_MODULE_API, status, ##__VA_ARGS__)
charlesmn 0:3ac96e360672 30 #define LOG_FUNCTION_END_FMT(status, fmt, ...) \
charlesmn 0:3ac96e360672 31 _LOG_FUNCTION_END_FMT(VL53L1_TRACE_MODULE_API,\
charlesmn 0:3ac96e360672 32 status, fmt, ##__VA_ARGS__)
charlesmn 0:3ac96e360672 33
charlesmn 0:3ac96e360672 34
charlesmn 0:3ac96e360672 35 VL53L1_Error VL53L1_init_refspadchar_config_struct(
charlesmn 0:3ac96e360672 36 VL53L1_refspadchar_config_t *pdata)
charlesmn 0:3ac96e360672 37 {
charlesmn 0:3ac96e360672 38
charlesmn 0:3ac96e360672 39
charlesmn 0:3ac96e360672 40 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 41
charlesmn 0:3ac96e360672 42 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 43
charlesmn 0:3ac96e360672 44
charlesmn 0:3ac96e360672 45
charlesmn 0:3ac96e360672 46 pdata->device_test_mode =
charlesmn 0:3ac96e360672 47 VL53L1_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE_DEFAULT;
charlesmn 0:3ac96e360672 48 pdata->VL53L1_p_009 =
charlesmn 0:3ac96e360672 49 VL53L1_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD_DEFAULT;
charlesmn 0:3ac96e360672 50 pdata->timeout_us =
charlesmn 0:3ac96e360672 51 VL53L1_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 52 pdata->target_count_rate_mcps =
charlesmn 0:3ac96e360672 53 VL53L1_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS_DEFAULT;
charlesmn 0:3ac96e360672 54 pdata->min_count_rate_limit_mcps =
charlesmn 0:3ac96e360672 55 VL53L1_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS_DEFAULT;
charlesmn 0:3ac96e360672 56 pdata->max_count_rate_limit_mcps =
charlesmn 0:3ac96e360672 57 VL53L1_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS_DEFAULT;
charlesmn 0:3ac96e360672 58
charlesmn 0:3ac96e360672 59 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 60
charlesmn 0:3ac96e360672 61 return status;
charlesmn 0:3ac96e360672 62 }
charlesmn 0:3ac96e360672 63
charlesmn 0:3ac96e360672 64
charlesmn 0:3ac96e360672 65 VL53L1_Error VL53L1_init_ssc_config_struct(
charlesmn 0:3ac96e360672 66 VL53L1_ssc_config_t *pdata)
charlesmn 0:3ac96e360672 67 {
charlesmn 0:3ac96e360672 68
charlesmn 0:3ac96e360672 69
charlesmn 0:3ac96e360672 70 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 71
charlesmn 0:3ac96e360672 72 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 73
charlesmn 0:3ac96e360672 74
charlesmn 0:3ac96e360672 75
charlesmn 0:3ac96e360672 76
charlesmn 0:3ac96e360672 77 pdata->array_select = VL53L1_DEVICESSCARRAY_RTN;
charlesmn 0:3ac96e360672 78
charlesmn 0:3ac96e360672 79
charlesmn 0:3ac96e360672 80 pdata->VL53L1_p_009 =
charlesmn 0:3ac96e360672 81 VL53L1_TUNINGPARM_SPADMAP_VCSEL_PERIOD_DEFAULT;
charlesmn 0:3ac96e360672 82
charlesmn 0:3ac96e360672 83
charlesmn 0:3ac96e360672 84 pdata->vcsel_start =
charlesmn 0:3ac96e360672 85 VL53L1_TUNINGPARM_SPADMAP_VCSEL_START_DEFAULT;
charlesmn 0:3ac96e360672 86
charlesmn 0:3ac96e360672 87
charlesmn 0:3ac96e360672 88 pdata->vcsel_width = 0x02;
charlesmn 0:3ac96e360672 89
charlesmn 0:3ac96e360672 90
charlesmn 0:3ac96e360672 91 pdata->timeout_us = 36000;
charlesmn 0:3ac96e360672 92
charlesmn 0:3ac96e360672 93
charlesmn 0:3ac96e360672 94 pdata->rate_limit_mcps =
charlesmn 0:3ac96e360672 95 VL53L1_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS_DEFAULT;
charlesmn 0:3ac96e360672 96
charlesmn 0:3ac96e360672 97 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 98
charlesmn 0:3ac96e360672 99 return status;
charlesmn 0:3ac96e360672 100 }
charlesmn 0:3ac96e360672 101
charlesmn 0:3ac96e360672 102
charlesmn 0:3ac96e360672 103 VL53L1_Error VL53L1_init_xtalk_config_struct(
charlesmn 0:3ac96e360672 104 VL53L1_customer_nvm_managed_t *pnvm,
charlesmn 0:3ac96e360672 105 VL53L1_xtalk_config_t *pdata)
charlesmn 0:3ac96e360672 106 {
charlesmn 0:3ac96e360672 107
charlesmn 0:3ac96e360672 108
charlesmn 0:3ac96e360672 109 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 110
charlesmn 0:3ac96e360672 111 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 112
charlesmn 0:3ac96e360672 113
charlesmn 0:3ac96e360672 114
charlesmn 0:3ac96e360672 115
charlesmn 0:3ac96e360672 116
charlesmn 0:3ac96e360672 117 pdata->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 118 pnvm->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 119 pdata->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 120 pnvm->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 121 pdata->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 122 pnvm->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 123
charlesmn 0:3ac96e360672 124
charlesmn 0:3ac96e360672 125
charlesmn 0:3ac96e360672 126 pdata->nvm_default__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 127 (uint32_t)pnvm->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 128 pdata->nvm_default__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 129 pnvm->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 130 pdata->nvm_default__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 131 pnvm->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 132
charlesmn 0:3ac96e360672 133 pdata->histogram_mode_crosstalk_margin_kcps =
charlesmn 0:3ac96e360672 134 VL53L1_TUNINGPARM_HIST_XTALK_MARGIN_KCPS_DEFAULT;
charlesmn 0:3ac96e360672 135 pdata->lite_mode_crosstalk_margin_kcps =
charlesmn 0:3ac96e360672 136 VL53L1_TUNINGPARM_LITE_XTALK_MARGIN_KCPS_DEFAULT;
charlesmn 0:3ac96e360672 137
charlesmn 0:3ac96e360672 138
charlesmn 0:3ac96e360672 139
charlesmn 0:3ac96e360672 140 pdata->crosstalk_range_ignore_threshold_mult =
charlesmn 0:3ac96e360672 141 VL53L1_TUNINGPARM_LITE_RIT_MULT_DEFAULT;
charlesmn 0:3ac96e360672 142
charlesmn 0:3ac96e360672 143 if ((pdata->algo__crosstalk_compensation_plane_offset_kcps == 0x00)
charlesmn 0:3ac96e360672 144 && (pdata->algo__crosstalk_compensation_x_plane_gradient_kcps
charlesmn 0:3ac96e360672 145 == 0x00)
charlesmn 0:3ac96e360672 146 && (pdata->algo__crosstalk_compensation_y_plane_gradient_kcps
charlesmn 0:3ac96e360672 147 == 0x00))
charlesmn 0:3ac96e360672 148 pdata->global_crosstalk_compensation_enable = 0x00;
charlesmn 0:3ac96e360672 149 else
charlesmn 0:3ac96e360672 150 pdata->global_crosstalk_compensation_enable = 0x01;
charlesmn 0:3ac96e360672 151
charlesmn 0:3ac96e360672 152
charlesmn 0:3ac96e360672 153 if ((status == VL53L1_ERROR_NONE) &&
charlesmn 0:3ac96e360672 154 (pdata->global_crosstalk_compensation_enable == 0x01)) {
charlesmn 0:3ac96e360672 155 pdata->crosstalk_range_ignore_threshold_rate_mcps =
charlesmn 0:3ac96e360672 156 VL53L1_calc_range_ignore_threshold(
charlesmn 0:3ac96e360672 157 pdata->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn 0:3ac96e360672 158 pdata->algo__crosstalk_compensation_x_plane_gradient_kcps,
charlesmn 0:3ac96e360672 159 pdata->algo__crosstalk_compensation_y_plane_gradient_kcps,
charlesmn 0:3ac96e360672 160 pdata->crosstalk_range_ignore_threshold_mult);
charlesmn 0:3ac96e360672 161 } else {
charlesmn 0:3ac96e360672 162 pdata->crosstalk_range_ignore_threshold_rate_mcps = 0;
charlesmn 0:3ac96e360672 163 }
charlesmn 0:3ac96e360672 164
charlesmn 0:3ac96e360672 165
charlesmn 0:3ac96e360672 166
charlesmn 0:3ac96e360672 167
charlesmn 0:3ac96e360672 168 pdata->algo__crosstalk_detect_min_valid_range_mm =
charlesmn 0:3ac96e360672 169 VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM_DEFAULT;
charlesmn 0:3ac96e360672 170 pdata->algo__crosstalk_detect_max_valid_range_mm =
charlesmn 0:3ac96e360672 171 VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM_DEFAULT;
charlesmn 0:3ac96e360672 172 pdata->algo__crosstalk_detect_max_valid_rate_kcps =
charlesmn 0:3ac96e360672 173 VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS_DEFAULT;
charlesmn 0:3ac96e360672 174 pdata->algo__crosstalk_detect_max_sigma_mm =
charlesmn 0:3ac96e360672 175 VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM_DEFAULT;
charlesmn 0:3ac96e360672 176
charlesmn 0:3ac96e360672 177 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 178
charlesmn 0:3ac96e360672 179 return status;
charlesmn 0:3ac96e360672 180 }
charlesmn 0:3ac96e360672 181
charlesmn 0:3ac96e360672 182 VL53L1_Error VL53L1_init_xtalk_extract_config_struct(
charlesmn 0:3ac96e360672 183 VL53L1_xtalkextract_config_t *pdata)
charlesmn 0:3ac96e360672 184 {
charlesmn 0:3ac96e360672 185
charlesmn 0:3ac96e360672 186
charlesmn 0:3ac96e360672 187 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 188
charlesmn 0:3ac96e360672 189 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 190
charlesmn 0:3ac96e360672 191
charlesmn 0:3ac96e360672 192
charlesmn 0:3ac96e360672 193 pdata->dss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 194 VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS_DEFAULT;
charlesmn 0:3ac96e360672 195
charlesmn 0:3ac96e360672 196 pdata->mm_config_timeout_us =
charlesmn 0:3ac96e360672 197 VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 198
charlesmn 0:3ac96e360672 199 pdata->num_of_samples =
charlesmn 0:3ac96e360672 200 VL53L1_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES_DEFAULT;
charlesmn 0:3ac96e360672 201
charlesmn 0:3ac96e360672 202 pdata->phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 203 VL53L1_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 204
charlesmn 0:3ac96e360672 205 pdata->range_config_timeout_us =
charlesmn 0:3ac96e360672 206 VL53L1_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 207
charlesmn 0:3ac96e360672 208
charlesmn 0:3ac96e360672 209
charlesmn 0:3ac96e360672 210
charlesmn 0:3ac96e360672 211 pdata->algo__crosstalk_extract_min_valid_range_mm =
charlesmn 0:3ac96e360672 212 VL53L1_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM_DEFAULT;
charlesmn 0:3ac96e360672 213 pdata->algo__crosstalk_extract_max_valid_range_mm =
charlesmn 0:3ac96e360672 214 VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM_DEFAULT;
charlesmn 0:3ac96e360672 215 pdata->algo__crosstalk_extract_max_valid_rate_kcps =
charlesmn 0:3ac96e360672 216 VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS_DEFAULT;
charlesmn 0:3ac96e360672 217 pdata->algo__crosstalk_extract_max_sigma_mm =
charlesmn 0:3ac96e360672 218 VL53L1_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM_DEFAULT;
charlesmn 0:3ac96e360672 219
charlesmn 0:3ac96e360672 220
charlesmn 0:3ac96e360672 221 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 222
charlesmn 0:3ac96e360672 223 return status;
charlesmn 0:3ac96e360672 224 }
charlesmn 0:3ac96e360672 225
charlesmn 0:3ac96e360672 226
charlesmn 0:3ac96e360672 227 VL53L1_Error VL53L1_init_offset_cal_config_struct(
charlesmn 0:3ac96e360672 228 VL53L1_offsetcal_config_t *pdata)
charlesmn 0:3ac96e360672 229 {
charlesmn 0:3ac96e360672 230
charlesmn 0:3ac96e360672 231
charlesmn 0:3ac96e360672 232 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 233
charlesmn 0:3ac96e360672 234 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 235
charlesmn 0:3ac96e360672 236
charlesmn 0:3ac96e360672 237
charlesmn 0:3ac96e360672 238 pdata->dss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 239 VL53L1_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS_DEFAULT;
charlesmn 0:3ac96e360672 240
charlesmn 0:3ac96e360672 241 pdata->phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 242 VL53L1_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 243
charlesmn 0:3ac96e360672 244 pdata->range_config_timeout_us =
charlesmn 0:3ac96e360672 245 VL53L1_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 246
charlesmn 0:3ac96e360672 247 pdata->mm_config_timeout_us =
charlesmn 0:3ac96e360672 248 VL53L1_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 249
charlesmn 0:3ac96e360672 250
charlesmn 0:3ac96e360672 251
charlesmn 0:3ac96e360672 252
charlesmn 0:3ac96e360672 253 pdata->pre_num_of_samples =
charlesmn 0:3ac96e360672 254 VL53L1_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES_DEFAULT;
charlesmn 0:3ac96e360672 255 pdata->mm1_num_of_samples =
charlesmn 0:3ac96e360672 256 VL53L1_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES_DEFAULT;
charlesmn 0:3ac96e360672 257 pdata->mm2_num_of_samples =
charlesmn 0:3ac96e360672 258 VL53L1_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES_DEFAULT;
charlesmn 0:3ac96e360672 259
charlesmn 0:3ac96e360672 260 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 261
charlesmn 0:3ac96e360672 262 return status;
charlesmn 0:3ac96e360672 263 }
charlesmn 0:3ac96e360672 264
charlesmn 0:3ac96e360672 265 VL53L1_Error VL53L1_init_zone_cal_config_struct(
charlesmn 0:3ac96e360672 266 VL53L1_zonecal_config_t *pdata)
charlesmn 0:3ac96e360672 267 {
charlesmn 0:3ac96e360672 268
charlesmn 0:3ac96e360672 269
charlesmn 0:3ac96e360672 270 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 271
charlesmn 0:3ac96e360672 272 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 273
charlesmn 0:3ac96e360672 274
charlesmn 0:3ac96e360672 275
charlesmn 0:3ac96e360672 276 pdata->dss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 277 VL53L1_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS_DEFAULT;
charlesmn 0:3ac96e360672 278
charlesmn 0:3ac96e360672 279 pdata->phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 280 VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 281
charlesmn 0:3ac96e360672 282 pdata->range_config_timeout_us =
charlesmn 0:3ac96e360672 283 VL53L1_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 284
charlesmn 0:3ac96e360672 285 pdata->mm_config_timeout_us =
charlesmn 0:3ac96e360672 286 VL53L1_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 287
charlesmn 0:3ac96e360672 288
charlesmn 0:3ac96e360672 289
charlesmn 0:3ac96e360672 290
charlesmn 0:3ac96e360672 291 pdata->phasecal_num_of_samples =
charlesmn 0:3ac96e360672 292 VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES_DEFAULT;
charlesmn 0:3ac96e360672 293 pdata->zone_num_of_samples =
charlesmn 0:3ac96e360672 294 VL53L1_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES_DEFAULT;
charlesmn 0:3ac96e360672 295
charlesmn 0:3ac96e360672 296 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 297
charlesmn 0:3ac96e360672 298 return status;
charlesmn 0:3ac96e360672 299 }
charlesmn 0:3ac96e360672 300
charlesmn 0:3ac96e360672 301
charlesmn 0:3ac96e360672 302 VL53L1_Error VL53L1_init_hist_post_process_config_struct(
charlesmn 0:3ac96e360672 303 uint8_t xtalk_compensation_enable,
charlesmn 0:3ac96e360672 304 VL53L1_hist_post_process_config_t *pdata)
charlesmn 0:3ac96e360672 305 {
charlesmn 0:3ac96e360672 306
charlesmn 0:3ac96e360672 307
charlesmn 0:3ac96e360672 308 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 309
charlesmn 0:3ac96e360672 310 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 311
charlesmn 0:3ac96e360672 312
charlesmn 0:3ac96e360672 313
charlesmn 0:3ac96e360672 314 pdata->hist_algo_select =
charlesmn 0:3ac96e360672 315 VL53L1_TUNINGPARM_HIST_ALGO_SELECT_DEFAULT;
charlesmn 0:3ac96e360672 316
charlesmn 0:3ac96e360672 317
charlesmn 0:3ac96e360672 318
charlesmn 0:3ac96e360672 319 pdata->hist_target_order =
charlesmn 0:3ac96e360672 320 VL53L1_TUNINGPARM_HIST_TARGET_ORDER_DEFAULT;
charlesmn 0:3ac96e360672 321
charlesmn 0:3ac96e360672 322
charlesmn 0:3ac96e360672 323
charlesmn 0:3ac96e360672 324 pdata->filter_woi0 =
charlesmn 0:3ac96e360672 325 VL53L1_TUNINGPARM_HIST_FILTER_WOI_0_DEFAULT;
charlesmn 0:3ac96e360672 326 pdata->filter_woi1 =
charlesmn 0:3ac96e360672 327 VL53L1_TUNINGPARM_HIST_FILTER_WOI_1_DEFAULT;
charlesmn 0:3ac96e360672 328
charlesmn 0:3ac96e360672 329
charlesmn 0:3ac96e360672 330 pdata->hist_amb_est_method =
charlesmn 0:3ac96e360672 331 VL53L1_TUNINGPARM_HIST_AMB_EST_METHOD_DEFAULT;
charlesmn 0:3ac96e360672 332
charlesmn 0:3ac96e360672 333 pdata->ambient_thresh_sigma0 =
charlesmn 0:3ac96e360672 334 VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0_DEFAULT;
charlesmn 0:3ac96e360672 335 pdata->ambient_thresh_sigma1 =
charlesmn 0:3ac96e360672 336 VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1_DEFAULT;
charlesmn 0:3ac96e360672 337
charlesmn 0:3ac96e360672 338
charlesmn 0:3ac96e360672 339 pdata->ambient_thresh_events_scaler =
charlesmn 0:3ac96e360672 340 VL53L1_TUNINGPARM_HIST_AMB_EVENTS_SCALER_DEFAULT;
charlesmn 0:3ac96e360672 341
charlesmn 0:3ac96e360672 342
charlesmn 0:3ac96e360672 343 pdata->min_ambient_thresh_events =
charlesmn 0:3ac96e360672 344 VL53L1_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS_DEFAULT;
charlesmn 0:3ac96e360672 345
charlesmn 0:3ac96e360672 346 pdata->noise_threshold =
charlesmn 0:3ac96e360672 347 VL53L1_TUNINGPARM_HIST_NOISE_THRESHOLD_DEFAULT;
charlesmn 0:3ac96e360672 348
charlesmn 0:3ac96e360672 349 pdata->signal_total_events_limit =
charlesmn 0:3ac96e360672 350 VL53L1_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT_DEFAULT;
charlesmn 0:3ac96e360672 351 pdata->sigma_estimator__sigma_ref_mm =
charlesmn 0:3ac96e360672 352 VL53L1_TUNINGPARM_HIST_SIGMA_EST_REF_MM_DEFAULT;
charlesmn 0:3ac96e360672 353
charlesmn 0:3ac96e360672 354
charlesmn 0:3ac96e360672 355 pdata->sigma_thresh =
charlesmn 0:3ac96e360672 356 VL53L1_TUNINGPARM_HIST_SIGMA_THRESH_MM_DEFAULT;
charlesmn 0:3ac96e360672 357
charlesmn 0:3ac96e360672 358 pdata->range_offset_mm = 0;
charlesmn 0:3ac96e360672 359
charlesmn 0:3ac96e360672 360 pdata->gain_factor =
charlesmn 0:3ac96e360672 361 VL53L1_TUNINGPARM_HIST_GAIN_FACTOR_DEFAULT;
charlesmn 0:3ac96e360672 362
charlesmn 0:3ac96e360672 363
charlesmn 0:3ac96e360672 364
charlesmn 0:3ac96e360672 365 pdata->valid_phase_low = 0x08;
charlesmn 0:3ac96e360672 366 pdata->valid_phase_high = 0x88;
charlesmn 0:3ac96e360672 367
charlesmn 0:3ac96e360672 368
charlesmn 0:3ac96e360672 369
charlesmn 0:3ac96e360672 370 pdata->algo__consistency_check__phase_tolerance =
charlesmn 0:3ac96e360672 371 VL53L1_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE_DEFAULT;
charlesmn 0:3ac96e360672 372
charlesmn 0:3ac96e360672 373
charlesmn 0:3ac96e360672 374
charlesmn 0:3ac96e360672 375 pdata->algo__consistency_check__event_sigma =
charlesmn 0:3ac96e360672 376 VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_DEFAULT;
charlesmn 0:3ac96e360672 377
charlesmn 0:3ac96e360672 378
charlesmn 0:3ac96e360672 379 pdata->algo__consistency_check__event_min_spad_count =
charlesmn 0:3ac96e360672 380 VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT_DEFAULT;
charlesmn 0:3ac96e360672 381
charlesmn 0:3ac96e360672 382
charlesmn 0:3ac96e360672 383
charlesmn 0:3ac96e360672 384 pdata->algo__consistency_check__min_max_tolerance =
charlesmn 0:3ac96e360672 385 VL53L1_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM_DEFAULT;
charlesmn 0:3ac96e360672 386
charlesmn 0:3ac96e360672 387
charlesmn 0:3ac96e360672 388 pdata->algo__crosstalk_compensation_enable = xtalk_compensation_enable;
charlesmn 0:3ac96e360672 389
charlesmn 0:3ac96e360672 390
charlesmn 0:3ac96e360672 391 pdata->algo__crosstalk_detect_min_valid_range_mm =
charlesmn 0:3ac96e360672 392 VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM_DEFAULT;
charlesmn 0:3ac96e360672 393 pdata->algo__crosstalk_detect_max_valid_range_mm =
charlesmn 0:3ac96e360672 394 VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM_DEFAULT;
charlesmn 0:3ac96e360672 395 pdata->algo__crosstalk_detect_max_valid_rate_kcps =
charlesmn 0:3ac96e360672 396 VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS_DEFAULT;
charlesmn 0:3ac96e360672 397 pdata->algo__crosstalk_detect_max_sigma_mm =
charlesmn 0:3ac96e360672 398 VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM_DEFAULT;
charlesmn 0:3ac96e360672 399
charlesmn 0:3ac96e360672 400
charlesmn 0:3ac96e360672 401
charlesmn 0:3ac96e360672 402
charlesmn 0:3ac96e360672 403
charlesmn 0:3ac96e360672 404 pdata->algo__crosstalk_detect_event_sigma =
charlesmn 0:3ac96e360672 405 VL53L1_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA_DEFAULT;
charlesmn 0:3ac96e360672 406
charlesmn 0:3ac96e360672 407
charlesmn 0:3ac96e360672 408
charlesmn 0:3ac96e360672 409 pdata->algo__crosstalk_detect_min_max_tolerance =
charlesmn 0:3ac96e360672 410 VL53L1_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE_DEFAULT;
charlesmn 0:3ac96e360672 411
charlesmn 0:3ac96e360672 412
charlesmn 0:3ac96e360672 413
charlesmn 0:3ac96e360672 414 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 415
charlesmn 0:3ac96e360672 416 return status;
charlesmn 0:3ac96e360672 417 }
charlesmn 0:3ac96e360672 418
charlesmn 0:3ac96e360672 419
charlesmn 0:3ac96e360672 420 VL53L1_Error VL53L1_init_dmax_calibration_data_struct(
charlesmn 0:3ac96e360672 421 VL53L1_dmax_calibration_data_t *pdata)
charlesmn 0:3ac96e360672 422 {
charlesmn 0:3ac96e360672 423
charlesmn 0:3ac96e360672 424
charlesmn 0:3ac96e360672 425 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 426
charlesmn 0:3ac96e360672 427 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 428
charlesmn 0:3ac96e360672 429
charlesmn 0:3ac96e360672 430
charlesmn 0:3ac96e360672 431
charlesmn 0:3ac96e360672 432 pdata->ref__actual_effective_spads = 0x5F2D;
charlesmn 0:3ac96e360672 433
charlesmn 0:3ac96e360672 434 pdata->ref__peak_signal_count_rate_mcps = 0x0844;
charlesmn 0:3ac96e360672 435
charlesmn 0:3ac96e360672 436 pdata->ref__distance_mm = 0x08A5;
charlesmn 0:3ac96e360672 437
charlesmn 0:3ac96e360672 438
charlesmn 0:3ac96e360672 439 pdata->ref_reflectance_pc = 0x0014;
charlesmn 0:3ac96e360672 440
charlesmn 0:3ac96e360672 441
charlesmn 0:3ac96e360672 442 pdata->coverglass_transmission = 0x0100;
charlesmn 0:3ac96e360672 443
charlesmn 0:3ac96e360672 444 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 445
charlesmn 0:3ac96e360672 446 return status;
charlesmn 0:3ac96e360672 447 }
charlesmn 0:3ac96e360672 448
charlesmn 0:3ac96e360672 449
charlesmn 0:3ac96e360672 450 VL53L1_Error VL53L1_init_tuning_parm_storage_struct(
charlesmn 0:3ac96e360672 451 VL53L1_tuning_parm_storage_t *pdata)
charlesmn 0:3ac96e360672 452 {
charlesmn 0:3ac96e360672 453
charlesmn 0:3ac96e360672 454
charlesmn 0:3ac96e360672 455 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 456
charlesmn 0:3ac96e360672 457 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 458
charlesmn 0:3ac96e360672 459
charlesmn 0:3ac96e360672 460
charlesmn 0:3ac96e360672 461 pdata->tp_tuning_parm_version =
charlesmn 0:3ac96e360672 462 VL53L1_TUNINGPARM_VERSION_DEFAULT;
charlesmn 0:3ac96e360672 463 pdata->tp_tuning_parm_key_table_version =
charlesmn 0:3ac96e360672 464 VL53L1_TUNINGPARM_KEY_TABLE_VERSION_DEFAULT;
charlesmn 0:3ac96e360672 465 pdata->tp_tuning_parm_lld_version =
charlesmn 0:3ac96e360672 466 VL53L1_TUNINGPARM_LLD_VERSION_DEFAULT;
charlesmn 0:3ac96e360672 467 pdata->tp_init_phase_rtn_lite_long =
charlesmn 0:3ac96e360672 468 VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE_DEFAULT;
charlesmn 0:3ac96e360672 469 pdata->tp_init_phase_rtn_lite_med =
charlesmn 0:3ac96e360672 470 VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE_DEFAULT;
charlesmn 0:3ac96e360672 471 pdata->tp_init_phase_rtn_lite_short =
charlesmn 0:3ac96e360672 472 VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE_DEFAULT;
charlesmn 0:3ac96e360672 473 pdata->tp_init_phase_ref_lite_long =
charlesmn 0:3ac96e360672 474 VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE_DEFAULT;
charlesmn 0:3ac96e360672 475 pdata->tp_init_phase_ref_lite_med =
charlesmn 0:3ac96e360672 476 VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE_DEFAULT;
charlesmn 0:3ac96e360672 477 pdata->tp_init_phase_ref_lite_short =
charlesmn 0:3ac96e360672 478 VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE_DEFAULT;
charlesmn 0:3ac96e360672 479 pdata->tp_init_phase_rtn_hist_long =
charlesmn 0:3ac96e360672 480 VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE_DEFAULT;
charlesmn 0:3ac96e360672 481 pdata->tp_init_phase_rtn_hist_med =
charlesmn 0:3ac96e360672 482 VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE_DEFAULT;
charlesmn 0:3ac96e360672 483 pdata->tp_init_phase_rtn_hist_short =
charlesmn 0:3ac96e360672 484 VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE_DEFAULT;
charlesmn 0:3ac96e360672 485 pdata->tp_init_phase_ref_hist_long =
charlesmn 0:3ac96e360672 486 VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE_DEFAULT;
charlesmn 0:3ac96e360672 487 pdata->tp_init_phase_ref_hist_med =
charlesmn 0:3ac96e360672 488 VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE_DEFAULT;
charlesmn 0:3ac96e360672 489 pdata->tp_init_phase_ref_hist_short =
charlesmn 0:3ac96e360672 490 VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE_DEFAULT;
charlesmn 0:3ac96e360672 491 pdata->tp_consistency_lite_phase_tolerance =
charlesmn 0:3ac96e360672 492 VL53L1_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE_DEFAULT;
charlesmn 0:3ac96e360672 493 pdata->tp_phasecal_target =
charlesmn 0:3ac96e360672 494 VL53L1_TUNINGPARM_PHASECAL_TARGET_DEFAULT;
charlesmn 0:3ac96e360672 495 pdata->tp_cal_repeat_rate =
charlesmn 0:3ac96e360672 496 VL53L1_TUNINGPARM_LITE_CAL_REPEAT_RATE_DEFAULT;
charlesmn 0:3ac96e360672 497 pdata->tp_lite_min_clip =
charlesmn 0:3ac96e360672 498 VL53L1_TUNINGPARM_LITE_MIN_CLIP_MM_DEFAULT;
charlesmn 0:3ac96e360672 499 pdata->tp_lite_long_sigma_thresh_mm =
charlesmn 0:3ac96e360672 500 VL53L1_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM_DEFAULT;
charlesmn 0:3ac96e360672 501 pdata->tp_lite_med_sigma_thresh_mm =
charlesmn 0:3ac96e360672 502 VL53L1_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM_DEFAULT;
charlesmn 0:3ac96e360672 503 pdata->tp_lite_short_sigma_thresh_mm =
charlesmn 0:3ac96e360672 504 VL53L1_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM_DEFAULT;
charlesmn 0:3ac96e360672 505 pdata->tp_lite_long_min_count_rate_rtn_mcps =
charlesmn 0:3ac96e360672 506 VL53L1_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS_DEFAULT;
charlesmn 0:3ac96e360672 507 pdata->tp_lite_med_min_count_rate_rtn_mcps =
charlesmn 0:3ac96e360672 508 VL53L1_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS_DEFAULT;
charlesmn 0:3ac96e360672 509 pdata->tp_lite_short_min_count_rate_rtn_mcps =
charlesmn 0:3ac96e360672 510 VL53L1_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS_DEFAULT;
charlesmn 0:3ac96e360672 511 pdata->tp_lite_sigma_est_pulse_width_ns =
charlesmn 0:3ac96e360672 512 VL53L1_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH_DEFAULT;
charlesmn 0:3ac96e360672 513 pdata->tp_lite_sigma_est_amb_width_ns =
charlesmn 0:3ac96e360672 514 VL53L1_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS_DEFAULT;
charlesmn 0:3ac96e360672 515 pdata->tp_lite_sigma_ref_mm =
charlesmn 0:3ac96e360672 516 VL53L1_TUNINGPARM_LITE_SIGMA_REF_MM_DEFAULT;
charlesmn 0:3ac96e360672 517 pdata->tp_lite_seed_cfg =
charlesmn 0:3ac96e360672 518 VL53L1_TUNINGPARM_LITE_SEED_CONFIG_DEFAULT;
charlesmn 0:3ac96e360672 519 pdata->tp_timed_seed_cfg =
charlesmn 0:3ac96e360672 520 VL53L1_TUNINGPARM_TIMED_SEED_CONFIG_DEFAULT;
charlesmn 0:3ac96e360672 521 pdata->tp_lite_quantifier =
charlesmn 0:3ac96e360672 522 VL53L1_TUNINGPARM_LITE_QUANTIFIER_DEFAULT;
charlesmn 0:3ac96e360672 523 pdata->tp_lite_first_order_select =
charlesmn 0:3ac96e360672 524 VL53L1_TUNINGPARM_LITE_FIRST_ORDER_SELECT_DEFAULT;
charlesmn 0:3ac96e360672 525
charlesmn 0:3ac96e360672 526
charlesmn 0:3ac96e360672 527
charlesmn 0:3ac96e360672 528
charlesmn 0:3ac96e360672 529 pdata->tp_dss_target_lite_mcps =
charlesmn 0:3ac96e360672 530 VL53L1_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
charlesmn 0:3ac96e360672 531 pdata->tp_dss_target_histo_mcps =
charlesmn 0:3ac96e360672 532 VL53L1_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
charlesmn 0:3ac96e360672 533 pdata->tp_dss_target_histo_mz_mcps =
charlesmn 0:3ac96e360672 534 VL53L1_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
charlesmn 0:3ac96e360672 535 pdata->tp_dss_target_timed_mcps =
charlesmn 0:3ac96e360672 536 VL53L1_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
charlesmn 0:3ac96e360672 537 pdata->tp_phasecal_timeout_lite_us =
charlesmn 0:3ac96e360672 538 VL53L1_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 539 pdata->tp_phasecal_timeout_hist_long_us =
charlesmn 0:3ac96e360672 540 VL53L1_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 541 pdata->tp_phasecal_timeout_hist_med_us =
charlesmn 0:3ac96e360672 542 VL53L1_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 543 pdata->tp_phasecal_timeout_hist_short_us =
charlesmn 0:3ac96e360672 544 VL53L1_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 545 pdata->tp_phasecal_timeout_mz_long_us =
charlesmn 0:3ac96e360672 546 VL53L1_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 547 pdata->tp_phasecal_timeout_mz_med_us =
charlesmn 0:3ac96e360672 548 VL53L1_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 549 pdata->tp_phasecal_timeout_mz_short_us =
charlesmn 0:3ac96e360672 550 VL53L1_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 551 pdata->tp_phasecal_timeout_timed_us =
charlesmn 0:3ac96e360672 552 VL53L1_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 553 pdata->tp_mm_timeout_lite_us =
charlesmn 0:3ac96e360672 554 VL53L1_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 555 pdata->tp_mm_timeout_histo_us =
charlesmn 0:3ac96e360672 556 VL53L1_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 557 pdata->tp_mm_timeout_mz_us =
charlesmn 0:3ac96e360672 558 VL53L1_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 559 pdata->tp_mm_timeout_timed_us =
charlesmn 0:3ac96e360672 560 VL53L1_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 561 pdata->tp_range_timeout_lite_us =
charlesmn 0:3ac96e360672 562 VL53L1_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 563 pdata->tp_range_timeout_histo_us =
charlesmn 0:3ac96e360672 564 VL53L1_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 565 pdata->tp_range_timeout_mz_us =
charlesmn 0:3ac96e360672 566 VL53L1_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 567 pdata->tp_range_timeout_timed_us =
charlesmn 0:3ac96e360672 568 VL53L1_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 569
charlesmn 0:3ac96e360672 570
charlesmn 0:3ac96e360672 571
charlesmn 0:3ac96e360672 572 pdata->tp_mm_timeout_lpa_us =
charlesmn 0:3ac96e360672 573 VL53L1_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 574 pdata->tp_range_timeout_lpa_us =
charlesmn 0:3ac96e360672 575 VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn 0:3ac96e360672 576
charlesmn 0:3ac96e360672 577 pdata->tp_dss_target_very_short_mcps =
charlesmn 0:3ac96e360672 578 VL53L1_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS_DEFAULT;
charlesmn 0:3ac96e360672 579
charlesmn 0:3ac96e360672 580 pdata->tp_phasecal_patch_power =
charlesmn 0:3ac96e360672 581 VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER_DEFAULT;
charlesmn 0:3ac96e360672 582
charlesmn 0:3ac96e360672 583 pdata->tp_hist_merge =
charlesmn 0:3ac96e360672 584 VL53L1_TUNINGPARM_HIST_MERGE_DEFAULT;
charlesmn 0:3ac96e360672 585
charlesmn 0:3ac96e360672 586 pdata->tp_reset_merge_threshold =
charlesmn 0:3ac96e360672 587 VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD_DEFAULT;
charlesmn 0:3ac96e360672 588
charlesmn 0:3ac96e360672 589 pdata->tp_hist_merge_max_size =
charlesmn 0:3ac96e360672 590 VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE_DEFAULT;
charlesmn 0:3ac96e360672 591
charlesmn 0:3ac96e360672 592 pdata->tp_uwr_enable =
charlesmn 0:3ac96e360672 593 VL53L1_TUNINGPARM_UWR_ENABLE_DEFAULT;
charlesmn 0:3ac96e360672 594 pdata->tp_uwr_med_z_1_min =
charlesmn 0:3ac96e360672 595 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN_DEFAULT;
charlesmn 0:3ac96e360672 596 pdata->tp_uwr_med_z_1_max =
charlesmn 0:3ac96e360672 597 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX_DEFAULT;
charlesmn 0:3ac96e360672 598 pdata->tp_uwr_med_z_2_min =
charlesmn 0:3ac96e360672 599 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN_DEFAULT;
charlesmn 0:3ac96e360672 600 pdata->tp_uwr_med_z_2_max =
charlesmn 0:3ac96e360672 601 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX_DEFAULT;
charlesmn 0:3ac96e360672 602 pdata->tp_uwr_med_z_3_min =
charlesmn 0:3ac96e360672 603 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN_DEFAULT;
charlesmn 0:3ac96e360672 604 pdata->tp_uwr_med_z_3_max =
charlesmn 0:3ac96e360672 605 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX_DEFAULT;
charlesmn 0:3ac96e360672 606 pdata->tp_uwr_med_z_4_min =
charlesmn 0:3ac96e360672 607 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN_DEFAULT;
charlesmn 0:3ac96e360672 608 pdata->tp_uwr_med_z_4_max =
charlesmn 0:3ac96e360672 609 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX_DEFAULT;
charlesmn 0:3ac96e360672 610 pdata->tp_uwr_med_z_5_min =
charlesmn 0:3ac96e360672 611 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN_DEFAULT;
charlesmn 0:3ac96e360672 612 pdata->tp_uwr_med_z_5_max =
charlesmn 0:3ac96e360672 613 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX_DEFAULT;
charlesmn 0:3ac96e360672 614 pdata->tp_uwr_med_z_6_min =
charlesmn 0:3ac96e360672 615 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MIN_DEFAULT;
charlesmn 0:3ac96e360672 616 pdata->tp_uwr_med_z_6_max =
charlesmn 0:3ac96e360672 617 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MAX_DEFAULT;
charlesmn 0:3ac96e360672 618 pdata->tp_uwr_med_corr_z_1_rangea =
charlesmn 0:3ac96e360672 619 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA_DEFAULT;
charlesmn 0:3ac96e360672 620 pdata->tp_uwr_med_corr_z_1_rangeb =
charlesmn 0:3ac96e360672 621 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB_DEFAULT;
charlesmn 0:3ac96e360672 622 pdata->tp_uwr_med_corr_z_2_rangea =
charlesmn 0:3ac96e360672 623 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA_DEFAULT;
charlesmn 0:3ac96e360672 624 pdata->tp_uwr_med_corr_z_2_rangeb =
charlesmn 0:3ac96e360672 625 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB_DEFAULT;
charlesmn 0:3ac96e360672 626 pdata->tp_uwr_med_corr_z_3_rangea =
charlesmn 0:3ac96e360672 627 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA_DEFAULT;
charlesmn 0:3ac96e360672 628 pdata->tp_uwr_med_corr_z_3_rangeb =
charlesmn 0:3ac96e360672 629 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB_DEFAULT;
charlesmn 0:3ac96e360672 630 pdata->tp_uwr_med_corr_z_4_rangea =
charlesmn 0:3ac96e360672 631 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA_DEFAULT;
charlesmn 0:3ac96e360672 632 pdata->tp_uwr_med_corr_z_4_rangeb =
charlesmn 0:3ac96e360672 633 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB_DEFAULT;
charlesmn 0:3ac96e360672 634 pdata->tp_uwr_med_corr_z_5_rangea =
charlesmn 0:3ac96e360672 635 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA_DEFAULT;
charlesmn 0:3ac96e360672 636 pdata->tp_uwr_med_corr_z_5_rangeb =
charlesmn 0:3ac96e360672 637 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB_DEFAULT;
charlesmn 0:3ac96e360672 638 pdata->tp_uwr_med_corr_z_6_rangea =
charlesmn 0:3ac96e360672 639 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEA_DEFAULT;
charlesmn 0:3ac96e360672 640 pdata->tp_uwr_med_corr_z_6_rangeb =
charlesmn 0:3ac96e360672 641 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEB_DEFAULT;
charlesmn 0:3ac96e360672 642 pdata->tp_uwr_lng_z_1_min =
charlesmn 0:3ac96e360672 643 VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MIN_DEFAULT;
charlesmn 0:3ac96e360672 644 pdata->tp_uwr_lng_z_1_max =
charlesmn 0:3ac96e360672 645 VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MAX_DEFAULT;
charlesmn 0:3ac96e360672 646 pdata->tp_uwr_lng_z_2_min =
charlesmn 0:3ac96e360672 647 VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MIN_DEFAULT;
charlesmn 0:3ac96e360672 648 pdata->tp_uwr_lng_z_2_max =
charlesmn 0:3ac96e360672 649 VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MAX_DEFAULT;
charlesmn 0:3ac96e360672 650 pdata->tp_uwr_lng_z_3_min =
charlesmn 0:3ac96e360672 651 VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MIN_DEFAULT;
charlesmn 0:3ac96e360672 652 pdata->tp_uwr_lng_z_3_max =
charlesmn 0:3ac96e360672 653 VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MAX_DEFAULT;
charlesmn 0:3ac96e360672 654 pdata->tp_uwr_lng_z_4_min =
charlesmn 0:3ac96e360672 655 VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MIN_DEFAULT;
charlesmn 0:3ac96e360672 656 pdata->tp_uwr_lng_z_4_max =
charlesmn 0:3ac96e360672 657 VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MAX_DEFAULT;
charlesmn 0:3ac96e360672 658 pdata->tp_uwr_lng_z_5_min =
charlesmn 0:3ac96e360672 659 VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MIN_DEFAULT;
charlesmn 0:3ac96e360672 660 pdata->tp_uwr_lng_z_5_max =
charlesmn 0:3ac96e360672 661 VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MAX_DEFAULT;
charlesmn 0:3ac96e360672 662 pdata->tp_uwr_lng_corr_z_1_rangea =
charlesmn 0:3ac96e360672 663 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA_DEFAULT;
charlesmn 0:3ac96e360672 664 pdata->tp_uwr_lng_corr_z_1_rangeb =
charlesmn 0:3ac96e360672 665 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB_DEFAULT;
charlesmn 0:3ac96e360672 666 pdata->tp_uwr_lng_corr_z_2_rangea =
charlesmn 0:3ac96e360672 667 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA_DEFAULT;
charlesmn 0:3ac96e360672 668 pdata->tp_uwr_lng_corr_z_2_rangeb =
charlesmn 0:3ac96e360672 669 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB_DEFAULT;
charlesmn 0:3ac96e360672 670 pdata->tp_uwr_lng_corr_z_3_rangea =
charlesmn 0:3ac96e360672 671 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA_DEFAULT;
charlesmn 0:3ac96e360672 672 pdata->tp_uwr_lng_corr_z_3_rangeb =
charlesmn 0:3ac96e360672 673 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB_DEFAULT;
charlesmn 0:3ac96e360672 674 pdata->tp_uwr_lng_corr_z_4_rangea =
charlesmn 0:3ac96e360672 675 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA_DEFAULT;
charlesmn 0:3ac96e360672 676 pdata->tp_uwr_lng_corr_z_4_rangeb =
charlesmn 0:3ac96e360672 677 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB_DEFAULT;
charlesmn 0:3ac96e360672 678 pdata->tp_uwr_lng_corr_z_5_rangea =
charlesmn 0:3ac96e360672 679 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA_DEFAULT;
charlesmn 0:3ac96e360672 680 pdata->tp_uwr_lng_corr_z_5_rangeb =
charlesmn 0:3ac96e360672 681 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB_DEFAULT;
lugandc 18:0696efe39d08 682 pdata->tp_min_signal_secondary_targets =
lugandc 18:0696efe39d08 683 VL53L1_TUNINGPARM_MIN_SIGNAL_SECONDARY_TARGETS_DEFAULT;
charlesmn 0:3ac96e360672 684 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 685
charlesmn 0:3ac96e360672 686 return status;
charlesmn 0:3ac96e360672 687 }
charlesmn 0:3ac96e360672 688
charlesmn 0:3ac96e360672 689
charlesmn 0:3ac96e360672 690 VL53L1_Error VL53L1_init_hist_gen3_dmax_config_struct(
charlesmn 0:3ac96e360672 691 VL53L1_hist_gen3_dmax_config_t *pdata)
charlesmn 0:3ac96e360672 692 {
charlesmn 0:3ac96e360672 693
charlesmn 0:3ac96e360672 694
charlesmn 0:3ac96e360672 695 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 696
charlesmn 0:3ac96e360672 697 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 698
charlesmn 0:3ac96e360672 699
charlesmn 0:3ac96e360672 700 pdata->dss_config__target_total_rate_mcps = 0x1400;
charlesmn 0:3ac96e360672 701 pdata->dss_config__aperture_attenuation = 0x38;
charlesmn 0:3ac96e360672 702
charlesmn 0:3ac96e360672 703 pdata->signal_thresh_sigma =
charlesmn 0:3ac96e360672 704 VL53L1_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA_DEFAULT;
charlesmn 0:3ac96e360672 705 pdata->ambient_thresh_sigma = 0x70;
charlesmn 0:3ac96e360672 706 pdata->min_ambient_thresh_events = 16;
charlesmn 0:3ac96e360672 707 pdata->signal_total_events_limit = 100;
charlesmn 0:3ac96e360672 708 pdata->max_effective_spads = 0xFFFF;
charlesmn 0:3ac96e360672 709
charlesmn 0:3ac96e360672 710
charlesmn 0:3ac96e360672 711
charlesmn 0:3ac96e360672 712 pdata->target_reflectance_for_dmax_calc[0] =
charlesmn 0:3ac96e360672 713 VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0_DEFAULT;
charlesmn 0:3ac96e360672 714 pdata->target_reflectance_for_dmax_calc[1] =
charlesmn 0:3ac96e360672 715 VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1_DEFAULT;
charlesmn 0:3ac96e360672 716 pdata->target_reflectance_for_dmax_calc[2] =
charlesmn 0:3ac96e360672 717 VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2_DEFAULT;
charlesmn 0:3ac96e360672 718 pdata->target_reflectance_for_dmax_calc[3] =
charlesmn 0:3ac96e360672 719 VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3_DEFAULT;
charlesmn 0:3ac96e360672 720 pdata->target_reflectance_for_dmax_calc[4] =
charlesmn 0:3ac96e360672 721 VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4_DEFAULT;
charlesmn 0:3ac96e360672 722
charlesmn 0:3ac96e360672 723 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 724
charlesmn 0:3ac96e360672 725 return status;
charlesmn 0:3ac96e360672 726 }
charlesmn 0:3ac96e360672 727
charlesmn 0:3ac96e360672 728
charlesmn 0:3ac96e360672 729 VL53L1_Error VL53L1_preset_mode_standard_ranging(
charlesmn 0:3ac96e360672 730 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 731 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 732 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 733 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 734 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 735 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 736 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 737 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 738 {
charlesmn 0:3ac96e360672 739
charlesmn 0:3ac96e360672 740
charlesmn 0:3ac96e360672 741 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 742
charlesmn 0:3ac96e360672 743 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 744
charlesmn 0:3ac96e360672 745
charlesmn 0:3ac96e360672 746
charlesmn 0:3ac96e360672 747
charlesmn 0:3ac96e360672 748 pstatic->dss_config__target_total_rate_mcps = 0x0A00;
charlesmn 0:3ac96e360672 749 pstatic->debug__ctrl = 0x00;
charlesmn 0:3ac96e360672 750 pstatic->test_mode__ctrl = 0x00;
charlesmn 0:3ac96e360672 751 pstatic->clk_gating__ctrl = 0x00;
charlesmn 0:3ac96e360672 752 pstatic->nvm_bist__ctrl = 0x00;
charlesmn 0:3ac96e360672 753 pstatic->nvm_bist__num_nvm_words = 0x00;
charlesmn 0:3ac96e360672 754 pstatic->nvm_bist__start_address = 0x00;
charlesmn 0:3ac96e360672 755 pstatic->host_if__status = 0x00;
charlesmn 0:3ac96e360672 756 pstatic->pad_i2c_hv__config = 0x00;
charlesmn 0:3ac96e360672 757 pstatic->pad_i2c_hv__extsup_config = 0x00;
charlesmn 0:3ac96e360672 758
charlesmn 0:3ac96e360672 759
charlesmn 0:3ac96e360672 760 pstatic->gpio_hv_pad__ctrl = 0x00;
charlesmn 0:3ac96e360672 761
charlesmn 0:3ac96e360672 762
charlesmn 0:3ac96e360672 763 pstatic->gpio_hv_mux__ctrl =
charlesmn 0:3ac96e360672 764 VL53L1_DEVICEINTERRUPTPOLARITY_ACTIVE_LOW |
charlesmn 0:3ac96e360672 765 VL53L1_DEVICEGPIOMODE_OUTPUT_RANGE_AND_ERROR_INTERRUPTS;
charlesmn 0:3ac96e360672 766
charlesmn 0:3ac96e360672 767 pstatic->gpio__tio_hv_status = 0x02;
charlesmn 0:3ac96e360672 768 pstatic->gpio__fio_hv_status = 0x00;
charlesmn 0:3ac96e360672 769 pstatic->ana_config__spad_sel_pswidth = 0x02;
charlesmn 0:3ac96e360672 770 pstatic->ana_config__vcsel_pulse_width_offset = 0x08;
charlesmn 0:3ac96e360672 771 pstatic->ana_config__fast_osc__config_ctrl = 0x00;
charlesmn 0:3ac96e360672 772
charlesmn 0:3ac96e360672 773 pstatic->sigma_estimator__effective_pulse_width_ns =
charlesmn 0:3ac96e360672 774 ptuning_parms->tp_lite_sigma_est_pulse_width_ns;
charlesmn 0:3ac96e360672 775 pstatic->sigma_estimator__effective_ambient_width_ns =
charlesmn 0:3ac96e360672 776 ptuning_parms->tp_lite_sigma_est_amb_width_ns;
charlesmn 0:3ac96e360672 777 pstatic->sigma_estimator__sigma_ref_mm =
charlesmn 0:3ac96e360672 778 ptuning_parms->tp_lite_sigma_ref_mm;
charlesmn 0:3ac96e360672 779
charlesmn 0:3ac96e360672 780 pstatic->algo__crosstalk_compensation_valid_height_mm = 0x01;
charlesmn 0:3ac96e360672 781 pstatic->spare_host_config__static_config_spare_0 = 0x00;
charlesmn 0:3ac96e360672 782 pstatic->spare_host_config__static_config_spare_1 = 0x00;
charlesmn 0:3ac96e360672 783
charlesmn 0:3ac96e360672 784 pstatic->algo__range_ignore_threshold_mcps = 0x0000;
charlesmn 0:3ac96e360672 785
charlesmn 0:3ac96e360672 786
charlesmn 0:3ac96e360672 787 pstatic->algo__range_ignore_valid_height_mm = 0xff;
charlesmn 0:3ac96e360672 788 pstatic->algo__range_min_clip =
charlesmn 0:3ac96e360672 789 ptuning_parms->tp_lite_min_clip;
charlesmn 0:3ac96e360672 790
charlesmn 0:3ac96e360672 791 pstatic->algo__consistency_check__tolerance =
charlesmn 0:3ac96e360672 792 ptuning_parms->tp_consistency_lite_phase_tolerance;
charlesmn 0:3ac96e360672 793 pstatic->spare_host_config__static_config_spare_2 = 0x00;
charlesmn 0:3ac96e360672 794 pstatic->sd_config__reset_stages_msb = 0x00;
charlesmn 0:3ac96e360672 795 pstatic->sd_config__reset_stages_lsb = 0x00;
charlesmn 0:3ac96e360672 796
charlesmn 0:3ac96e360672 797 pgeneral->gph_config__stream_count_update_value = 0x00;
charlesmn 0:3ac96e360672 798 pgeneral->global_config__stream_divider = 0x00;
charlesmn 0:3ac96e360672 799 pgeneral->system__interrupt_config_gpio =
charlesmn 0:3ac96e360672 800 VL53L1_INTERRUPT_CONFIG_NEW_SAMPLE_READY;
charlesmn 0:3ac96e360672 801 pgeneral->cal_config__vcsel_start = 0x0B;
charlesmn 0:3ac96e360672 802
charlesmn 0:3ac96e360672 803
charlesmn 0:3ac96e360672 804 pgeneral->cal_config__repeat_rate =
charlesmn 0:3ac96e360672 805 ptuning_parms->tp_cal_repeat_rate;
charlesmn 0:3ac96e360672 806 pgeneral->global_config__vcsel_width = 0x02;
charlesmn 0:3ac96e360672 807
charlesmn 0:3ac96e360672 808 pgeneral->phasecal_config__timeout_macrop = 0x0D;
charlesmn 0:3ac96e360672 809
charlesmn 0:3ac96e360672 810 pgeneral->phasecal_config__target =
charlesmn 0:3ac96e360672 811 ptuning_parms->tp_phasecal_target;
charlesmn 0:3ac96e360672 812 pgeneral->phasecal_config__override = 0x00;
charlesmn 0:3ac96e360672 813 pgeneral->dss_config__roi_mode_control =
charlesmn 0:3ac96e360672 814 VL53L1_DEVICEDSSMODE__TARGET_RATE;
charlesmn 0:3ac96e360672 815
charlesmn 0:3ac96e360672 816 pgeneral->system__thresh_rate_high = 0x0000;
charlesmn 0:3ac96e360672 817 pgeneral->system__thresh_rate_low = 0x0000;
charlesmn 0:3ac96e360672 818
charlesmn 0:3ac96e360672 819 pgeneral->dss_config__manual_effective_spads_select = 0x8C00;
charlesmn 0:3ac96e360672 820 pgeneral->dss_config__manual_block_select = 0x00;
charlesmn 0:3ac96e360672 821
charlesmn 0:3ac96e360672 822
charlesmn 0:3ac96e360672 823 pgeneral->dss_config__aperture_attenuation = 0x38;
charlesmn 0:3ac96e360672 824 pgeneral->dss_config__max_spads_limit = 0xFF;
charlesmn 0:3ac96e360672 825 pgeneral->dss_config__min_spads_limit = 0x01;
charlesmn 0:3ac96e360672 826
charlesmn 0:3ac96e360672 827
charlesmn 0:3ac96e360672 828
charlesmn 0:3ac96e360672 829
charlesmn 0:3ac96e360672 830 ptiming->mm_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 831 ptiming->mm_config__timeout_macrop_a_lo = 0x1a;
charlesmn 0:3ac96e360672 832 ptiming->mm_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 833 ptiming->mm_config__timeout_macrop_b_lo = 0x20;
charlesmn 0:3ac96e360672 834
charlesmn 0:3ac96e360672 835 ptiming->range_config__timeout_macrop_a_hi = 0x01;
charlesmn 0:3ac96e360672 836 ptiming->range_config__timeout_macrop_a_lo = 0xCC;
charlesmn 0:3ac96e360672 837
charlesmn 0:3ac96e360672 838 ptiming->range_config__vcsel_period_a = 0x0B;
charlesmn 0:3ac96e360672 839
charlesmn 0:3ac96e360672 840 ptiming->range_config__timeout_macrop_b_hi = 0x01;
charlesmn 0:3ac96e360672 841 ptiming->range_config__timeout_macrop_b_lo = 0xF5;
charlesmn 0:3ac96e360672 842
charlesmn 0:3ac96e360672 843 ptiming->range_config__vcsel_period_b = 0x09;
charlesmn 0:3ac96e360672 844
charlesmn 0:3ac96e360672 845 ptiming->range_config__sigma_thresh =
charlesmn 0:3ac96e360672 846 ptuning_parms->tp_lite_med_sigma_thresh_mm;
charlesmn 0:3ac96e360672 847
charlesmn 0:3ac96e360672 848 ptiming->range_config__min_count_rate_rtn_limit_mcps =
charlesmn 0:3ac96e360672 849 ptuning_parms->tp_lite_med_min_count_rate_rtn_mcps;
charlesmn 0:3ac96e360672 850
charlesmn 0:3ac96e360672 851
charlesmn 0:3ac96e360672 852 ptiming->range_config__valid_phase_low = 0x08;
charlesmn 0:3ac96e360672 853 ptiming->range_config__valid_phase_high = 0x78;
charlesmn 0:3ac96e360672 854 ptiming->system__intermeasurement_period = 0x00000000;
charlesmn 0:3ac96e360672 855 ptiming->system__fractional_enable = 0x00;
charlesmn 0:3ac96e360672 856
charlesmn 0:3ac96e360672 857
charlesmn 0:3ac96e360672 858
charlesmn 0:3ac96e360672 859 phistogram->histogram_config__low_amb_even_bin_0_1 = 0x07;
charlesmn 0:3ac96e360672 860 phistogram->histogram_config__low_amb_even_bin_2_3 = 0x21;
charlesmn 0:3ac96e360672 861 phistogram->histogram_config__low_amb_even_bin_4_5 = 0x43;
charlesmn 0:3ac96e360672 862
charlesmn 0:3ac96e360672 863 phistogram->histogram_config__low_amb_odd_bin_0_1 = 0x10;
charlesmn 0:3ac96e360672 864 phistogram->histogram_config__low_amb_odd_bin_2_3 = 0x32;
charlesmn 0:3ac96e360672 865 phistogram->histogram_config__low_amb_odd_bin_4_5 = 0x54;
charlesmn 0:3ac96e360672 866
charlesmn 0:3ac96e360672 867 phistogram->histogram_config__mid_amb_even_bin_0_1 = 0x07;
charlesmn 0:3ac96e360672 868 phistogram->histogram_config__mid_amb_even_bin_2_3 = 0x21;
charlesmn 0:3ac96e360672 869 phistogram->histogram_config__mid_amb_even_bin_4_5 = 0x43;
charlesmn 0:3ac96e360672 870
charlesmn 0:3ac96e360672 871 phistogram->histogram_config__mid_amb_odd_bin_0_1 = 0x10;
charlesmn 0:3ac96e360672 872 phistogram->histogram_config__mid_amb_odd_bin_2 = 0x02;
charlesmn 0:3ac96e360672 873 phistogram->histogram_config__mid_amb_odd_bin_3_4 = 0x43;
charlesmn 0:3ac96e360672 874 phistogram->histogram_config__mid_amb_odd_bin_5 = 0x05;
charlesmn 0:3ac96e360672 875
charlesmn 0:3ac96e360672 876 phistogram->histogram_config__user_bin_offset = 0x00;
charlesmn 0:3ac96e360672 877
charlesmn 0:3ac96e360672 878 phistogram->histogram_config__high_amb_even_bin_0_1 = 0x07;
charlesmn 0:3ac96e360672 879 phistogram->histogram_config__high_amb_even_bin_2_3 = 0x21;
charlesmn 0:3ac96e360672 880 phistogram->histogram_config__high_amb_even_bin_4_5 = 0x43;
charlesmn 0:3ac96e360672 881
charlesmn 0:3ac96e360672 882 phistogram->histogram_config__high_amb_odd_bin_0_1 = 0x10;
charlesmn 0:3ac96e360672 883 phistogram->histogram_config__high_amb_odd_bin_2_3 = 0x32;
charlesmn 0:3ac96e360672 884 phistogram->histogram_config__high_amb_odd_bin_4_5 = 0x54;
charlesmn 0:3ac96e360672 885
charlesmn 0:3ac96e360672 886 phistogram->histogram_config__amb_thresh_low = 0xFFFF;
charlesmn 0:3ac96e360672 887 phistogram->histogram_config__amb_thresh_high = 0xFFFF;
charlesmn 0:3ac96e360672 888
charlesmn 0:3ac96e360672 889 phistogram->histogram_config__spad_array_selection = 0x00;
charlesmn 0:3ac96e360672 890
charlesmn 0:3ac96e360672 891
charlesmn 0:3ac96e360672 892 pzone_cfg->max_zones = VL53L1_MAX_USER_ZONES;
charlesmn 0:3ac96e360672 893 pzone_cfg->active_zones = 0x00;
charlesmn 0:3ac96e360672 894 pzone_cfg->user_zones[0].height = 0x0f;
charlesmn 0:3ac96e360672 895 pzone_cfg->user_zones[0].width = 0x0f;
charlesmn 0:3ac96e360672 896 pzone_cfg->user_zones[0].x_centre = 0x08;
charlesmn 0:3ac96e360672 897 pzone_cfg->user_zones[0].y_centre = 0x08;
charlesmn 0:3ac96e360672 898
charlesmn 0:3ac96e360672 899
charlesmn 0:3ac96e360672 900
charlesmn 0:3ac96e360672 901 pdynamic->system__grouped_parameter_hold_0 = 0x01;
charlesmn 0:3ac96e360672 902
charlesmn 0:3ac96e360672 903 pdynamic->system__thresh_high = 0x0000;
charlesmn 0:3ac96e360672 904 pdynamic->system__thresh_low = 0x0000;
charlesmn 0:3ac96e360672 905 pdynamic->system__enable_xtalk_per_quadrant = 0x00;
charlesmn 0:3ac96e360672 906 pdynamic->system__seed_config =
charlesmn 0:3ac96e360672 907 ptuning_parms->tp_lite_seed_cfg;
charlesmn 0:3ac96e360672 908
charlesmn 0:3ac96e360672 909
charlesmn 0:3ac96e360672 910 pdynamic->sd_config__woi_sd0 = 0x0B;
charlesmn 0:3ac96e360672 911
charlesmn 0:3ac96e360672 912 pdynamic->sd_config__woi_sd1 = 0x09;
charlesmn 0:3ac96e360672 913
charlesmn 0:3ac96e360672 914 pdynamic->sd_config__initial_phase_sd0 =
charlesmn 0:3ac96e360672 915 ptuning_parms->tp_init_phase_rtn_lite_med;
charlesmn 0:3ac96e360672 916 pdynamic->sd_config__initial_phase_sd1 =
charlesmn 0:3ac96e360672 917 ptuning_parms->tp_init_phase_ref_lite_med;
charlesmn 0:3ac96e360672 918
charlesmn 0:3ac96e360672 919 pdynamic->system__grouped_parameter_hold_1 = 0x01;
charlesmn 0:3ac96e360672 920
charlesmn 0:3ac96e360672 921
charlesmn 0:3ac96e360672 922
charlesmn 0:3ac96e360672 923 pdynamic->sd_config__first_order_select =
charlesmn 0:3ac96e360672 924 ptuning_parms->tp_lite_first_order_select;
charlesmn 0:3ac96e360672 925 pdynamic->sd_config__quantifier =
charlesmn 0:3ac96e360672 926 ptuning_parms->tp_lite_quantifier;
charlesmn 0:3ac96e360672 927
charlesmn 0:3ac96e360672 928
charlesmn 0:3ac96e360672 929 pdynamic->roi_config__user_roi_centre_spad = 0xC7;
charlesmn 0:3ac96e360672 930
charlesmn 0:3ac96e360672 931 pdynamic->roi_config__user_roi_requested_global_xy_size = 0xFF;
charlesmn 0:3ac96e360672 932
charlesmn 0:3ac96e360672 933
charlesmn 0:3ac96e360672 934 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 935 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 936 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 937 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 938 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 939 VL53L1_SEQUENCE_MM2_EN |
charlesmn 0:3ac96e360672 940 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 941
charlesmn 0:3ac96e360672 942 pdynamic->system__grouped_parameter_hold = 0x02;
charlesmn 0:3ac96e360672 943
charlesmn 0:3ac96e360672 944
charlesmn 0:3ac96e360672 945
charlesmn 0:3ac96e360672 946
charlesmn 0:3ac96e360672 947 psystem->system__stream_count_ctrl = 0x00;
charlesmn 0:3ac96e360672 948 psystem->firmware__enable = 0x01;
charlesmn 0:3ac96e360672 949 psystem->system__interrupt_clear =
charlesmn 0:3ac96e360672 950 VL53L1_CLEAR_RANGE_INT;
charlesmn 0:3ac96e360672 951
charlesmn 0:3ac96e360672 952 psystem->system__mode_start =
charlesmn 0:3ac96e360672 953 VL53L1_DEVICESCHEDULERMODE_STREAMING |
charlesmn 0:3ac96e360672 954 VL53L1_DEVICEREADOUTMODE_SINGLE_SD |
charlesmn 0:3ac96e360672 955 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn 0:3ac96e360672 956
charlesmn 0:3ac96e360672 957 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 958
charlesmn 0:3ac96e360672 959 return status;
charlesmn 0:3ac96e360672 960 }
charlesmn 0:3ac96e360672 961
charlesmn 0:3ac96e360672 962
charlesmn 0:3ac96e360672 963 VL53L1_Error VL53L1_preset_mode_standard_ranging_short_range(
charlesmn 0:3ac96e360672 964 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 965 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 966 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 967 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 968 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 969 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 970 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 971 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 972 {
charlesmn 0:3ac96e360672 973
charlesmn 0:3ac96e360672 974
charlesmn 0:3ac96e360672 975 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 976
charlesmn 0:3ac96e360672 977 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 978
charlesmn 0:3ac96e360672 979
charlesmn 0:3ac96e360672 980
charlesmn 0:3ac96e360672 981 status = VL53L1_preset_mode_standard_ranging(
charlesmn 0:3ac96e360672 982 pstatic,
charlesmn 0:3ac96e360672 983 phistogram,
charlesmn 0:3ac96e360672 984 pgeneral,
charlesmn 0:3ac96e360672 985 ptiming,
charlesmn 0:3ac96e360672 986 pdynamic,
charlesmn 0:3ac96e360672 987 psystem,
charlesmn 0:3ac96e360672 988 ptuning_parms,
charlesmn 0:3ac96e360672 989 pzone_cfg);
charlesmn 0:3ac96e360672 990
charlesmn 0:3ac96e360672 991
charlesmn 0:3ac96e360672 992
charlesmn 0:3ac96e360672 993 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 994
charlesmn 0:3ac96e360672 995
charlesmn 0:3ac96e360672 996
charlesmn 0:3ac96e360672 997 ptiming->range_config__vcsel_period_a = 0x07;
charlesmn 0:3ac96e360672 998 ptiming->range_config__vcsel_period_b = 0x05;
charlesmn 0:3ac96e360672 999 ptiming->range_config__sigma_thresh =
charlesmn 0:3ac96e360672 1000 ptuning_parms->tp_lite_short_sigma_thresh_mm;
charlesmn 0:3ac96e360672 1001 ptiming->range_config__min_count_rate_rtn_limit_mcps =
charlesmn 0:3ac96e360672 1002 ptuning_parms->tp_lite_short_min_count_rate_rtn_mcps;
charlesmn 0:3ac96e360672 1003 ptiming->range_config__valid_phase_low = 0x08;
charlesmn 0:3ac96e360672 1004 ptiming->range_config__valid_phase_high = 0x38;
charlesmn 0:3ac96e360672 1005
charlesmn 0:3ac96e360672 1006
charlesmn 0:3ac96e360672 1007
charlesmn 0:3ac96e360672 1008 pdynamic->sd_config__woi_sd0 = 0x07;
charlesmn 0:3ac96e360672 1009 pdynamic->sd_config__woi_sd1 = 0x05;
charlesmn 0:3ac96e360672 1010 pdynamic->sd_config__initial_phase_sd0 =
charlesmn 0:3ac96e360672 1011 ptuning_parms->tp_init_phase_rtn_lite_short;
charlesmn 0:3ac96e360672 1012 pdynamic->sd_config__initial_phase_sd1 =
charlesmn 0:3ac96e360672 1013 ptuning_parms->tp_init_phase_ref_lite_short;
charlesmn 0:3ac96e360672 1014 }
charlesmn 0:3ac96e360672 1015
charlesmn 0:3ac96e360672 1016 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1017
charlesmn 0:3ac96e360672 1018 return status;
charlesmn 0:3ac96e360672 1019 }
charlesmn 0:3ac96e360672 1020
charlesmn 0:3ac96e360672 1021
charlesmn 0:3ac96e360672 1022 VL53L1_Error VL53L1_preset_mode_standard_ranging_long_range(
charlesmn 0:3ac96e360672 1023 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1024 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1025 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1026 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1027 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1028 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1029 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1030 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1031 {
charlesmn 0:3ac96e360672 1032
charlesmn 0:3ac96e360672 1033
charlesmn 0:3ac96e360672 1034 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1035
charlesmn 0:3ac96e360672 1036 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1037
charlesmn 0:3ac96e360672 1038
charlesmn 0:3ac96e360672 1039
charlesmn 0:3ac96e360672 1040 status = VL53L1_preset_mode_standard_ranging(
charlesmn 0:3ac96e360672 1041 pstatic,
charlesmn 0:3ac96e360672 1042 phistogram,
charlesmn 0:3ac96e360672 1043 pgeneral,
charlesmn 0:3ac96e360672 1044 ptiming,
charlesmn 0:3ac96e360672 1045 pdynamic,
charlesmn 0:3ac96e360672 1046 psystem,
charlesmn 0:3ac96e360672 1047 ptuning_parms,
charlesmn 0:3ac96e360672 1048 pzone_cfg);
charlesmn 0:3ac96e360672 1049
charlesmn 0:3ac96e360672 1050
charlesmn 0:3ac96e360672 1051
charlesmn 0:3ac96e360672 1052 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1053
charlesmn 0:3ac96e360672 1054
charlesmn 0:3ac96e360672 1055
charlesmn 0:3ac96e360672 1056 ptiming->range_config__vcsel_period_a = 0x0F;
charlesmn 0:3ac96e360672 1057 ptiming->range_config__vcsel_period_b = 0x0D;
charlesmn 0:3ac96e360672 1058 ptiming->range_config__sigma_thresh =
charlesmn 0:3ac96e360672 1059 ptuning_parms->tp_lite_long_sigma_thresh_mm;
charlesmn 0:3ac96e360672 1060 ptiming->range_config__min_count_rate_rtn_limit_mcps =
charlesmn 0:3ac96e360672 1061 ptuning_parms->tp_lite_long_min_count_rate_rtn_mcps;
charlesmn 0:3ac96e360672 1062 ptiming->range_config__valid_phase_low = 0x08;
charlesmn 0:3ac96e360672 1063 ptiming->range_config__valid_phase_high = 0xB8;
charlesmn 0:3ac96e360672 1064
charlesmn 0:3ac96e360672 1065
charlesmn 0:3ac96e360672 1066
charlesmn 0:3ac96e360672 1067 pdynamic->sd_config__woi_sd0 = 0x0F;
charlesmn 0:3ac96e360672 1068 pdynamic->sd_config__woi_sd1 = 0x0D;
charlesmn 0:3ac96e360672 1069 pdynamic->sd_config__initial_phase_sd0 =
charlesmn 0:3ac96e360672 1070 ptuning_parms->tp_init_phase_rtn_lite_long;
charlesmn 0:3ac96e360672 1071 pdynamic->sd_config__initial_phase_sd1 =
charlesmn 0:3ac96e360672 1072 ptuning_parms->tp_init_phase_ref_lite_long;
charlesmn 0:3ac96e360672 1073 }
charlesmn 0:3ac96e360672 1074
charlesmn 0:3ac96e360672 1075 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1076
charlesmn 0:3ac96e360672 1077 return status;
charlesmn 0:3ac96e360672 1078 }
charlesmn 0:3ac96e360672 1079
charlesmn 0:3ac96e360672 1080
charlesmn 0:3ac96e360672 1081 VL53L1_Error VL53L1_preset_mode_standard_ranging_mm1_cal(
charlesmn 0:3ac96e360672 1082 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1083 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1084 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1085 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1086 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1087 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1088 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1089 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1090 {
charlesmn 0:3ac96e360672 1091
charlesmn 0:3ac96e360672 1092
charlesmn 0:3ac96e360672 1093 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1094
charlesmn 0:3ac96e360672 1095 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1096
charlesmn 0:3ac96e360672 1097
charlesmn 0:3ac96e360672 1098
charlesmn 0:3ac96e360672 1099 status = VL53L1_preset_mode_standard_ranging(
charlesmn 0:3ac96e360672 1100 pstatic,
charlesmn 0:3ac96e360672 1101 phistogram,
charlesmn 0:3ac96e360672 1102 pgeneral,
charlesmn 0:3ac96e360672 1103 ptiming,
charlesmn 0:3ac96e360672 1104 pdynamic,
charlesmn 0:3ac96e360672 1105 psystem,
charlesmn 0:3ac96e360672 1106 ptuning_parms,
charlesmn 0:3ac96e360672 1107 pzone_cfg);
charlesmn 0:3ac96e360672 1108
charlesmn 0:3ac96e360672 1109
charlesmn 0:3ac96e360672 1110
charlesmn 0:3ac96e360672 1111 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1112
charlesmn 0:3ac96e360672 1113 pgeneral->dss_config__roi_mode_control =
charlesmn 0:3ac96e360672 1114 VL53L1_DEVICEDSSMODE__REQUESTED_EFFFECTIVE_SPADS;
charlesmn 0:3ac96e360672 1115
charlesmn 0:3ac96e360672 1116 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 1117 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 1118 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 1119 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 1120 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 1121 VL53L1_SEQUENCE_MM1_EN;
charlesmn 0:3ac96e360672 1122 }
charlesmn 0:3ac96e360672 1123
charlesmn 0:3ac96e360672 1124 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1125
charlesmn 0:3ac96e360672 1126 return status;
charlesmn 0:3ac96e360672 1127 }
charlesmn 0:3ac96e360672 1128
charlesmn 0:3ac96e360672 1129
charlesmn 0:3ac96e360672 1130 VL53L1_Error VL53L1_preset_mode_standard_ranging_mm2_cal(
charlesmn 0:3ac96e360672 1131 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1132 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1133 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1134 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1135 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1136 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1137 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1138 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1139 {
charlesmn 0:3ac96e360672 1140
charlesmn 0:3ac96e360672 1141
charlesmn 0:3ac96e360672 1142 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1143
charlesmn 0:3ac96e360672 1144 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1145
charlesmn 0:3ac96e360672 1146
charlesmn 0:3ac96e360672 1147
charlesmn 0:3ac96e360672 1148 status = VL53L1_preset_mode_standard_ranging(
charlesmn 0:3ac96e360672 1149 pstatic,
charlesmn 0:3ac96e360672 1150 phistogram,
charlesmn 0:3ac96e360672 1151 pgeneral,
charlesmn 0:3ac96e360672 1152 ptiming,
charlesmn 0:3ac96e360672 1153 pdynamic,
charlesmn 0:3ac96e360672 1154 psystem,
charlesmn 0:3ac96e360672 1155 ptuning_parms,
charlesmn 0:3ac96e360672 1156 pzone_cfg);
charlesmn 0:3ac96e360672 1157
charlesmn 0:3ac96e360672 1158
charlesmn 0:3ac96e360672 1159
charlesmn 0:3ac96e360672 1160 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1161
charlesmn 0:3ac96e360672 1162 pgeneral->dss_config__roi_mode_control =
charlesmn 0:3ac96e360672 1163 VL53L1_DEVICEDSSMODE__REQUESTED_EFFFECTIVE_SPADS;
charlesmn 0:3ac96e360672 1164
charlesmn 0:3ac96e360672 1165 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 1166 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 1167 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 1168 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 1169 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 1170 VL53L1_SEQUENCE_MM2_EN;
charlesmn 0:3ac96e360672 1171 }
charlesmn 0:3ac96e360672 1172
charlesmn 0:3ac96e360672 1173 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1174
charlesmn 0:3ac96e360672 1175 return status;
charlesmn 0:3ac96e360672 1176 }
charlesmn 0:3ac96e360672 1177
charlesmn 0:3ac96e360672 1178
charlesmn 0:3ac96e360672 1179 VL53L1_Error VL53L1_preset_mode_timed_ranging(
charlesmn 0:3ac96e360672 1180
charlesmn 0:3ac96e360672 1181 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1182 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1183 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1184 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1185 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1186 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1187 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1188 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1189 {
charlesmn 0:3ac96e360672 1190
charlesmn 0:3ac96e360672 1191
charlesmn 0:3ac96e360672 1192 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1193
charlesmn 0:3ac96e360672 1194 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1195
charlesmn 0:3ac96e360672 1196
charlesmn 0:3ac96e360672 1197
charlesmn 0:3ac96e360672 1198 status = VL53L1_preset_mode_standard_ranging(
charlesmn 0:3ac96e360672 1199 pstatic,
charlesmn 0:3ac96e360672 1200 phistogram,
charlesmn 0:3ac96e360672 1201 pgeneral,
charlesmn 0:3ac96e360672 1202 ptiming,
charlesmn 0:3ac96e360672 1203 pdynamic,
charlesmn 0:3ac96e360672 1204 psystem,
charlesmn 0:3ac96e360672 1205 ptuning_parms,
charlesmn 0:3ac96e360672 1206 pzone_cfg);
charlesmn 0:3ac96e360672 1207
charlesmn 0:3ac96e360672 1208
charlesmn 0:3ac96e360672 1209
charlesmn 0:3ac96e360672 1210 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1211
charlesmn 0:3ac96e360672 1212
charlesmn 0:3ac96e360672 1213
charlesmn 0:3ac96e360672 1214
charlesmn 0:3ac96e360672 1215 pdynamic->system__grouped_parameter_hold = 0x00;
charlesmn 0:3ac96e360672 1216
charlesmn 0:3ac96e360672 1217
charlesmn 0:3ac96e360672 1218 ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 1219 ptiming->range_config__timeout_macrop_a_lo = 0xB1;
charlesmn 0:3ac96e360672 1220
charlesmn 0:3ac96e360672 1221 ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 1222 ptiming->range_config__timeout_macrop_b_lo = 0xD4;
charlesmn 0:3ac96e360672 1223
charlesmn 0:3ac96e360672 1224
charlesmn 0:3ac96e360672 1225
charlesmn 0:3ac96e360672 1226 ptiming->system__intermeasurement_period = 0x00000600;
charlesmn 0:3ac96e360672 1227 pdynamic->system__seed_config =
charlesmn 0:3ac96e360672 1228 ptuning_parms->tp_timed_seed_cfg;
charlesmn 0:3ac96e360672 1229
charlesmn 0:3ac96e360672 1230
charlesmn 0:3ac96e360672 1231
charlesmn 0:3ac96e360672 1232
charlesmn 0:3ac96e360672 1233 psystem->system__mode_start =
charlesmn 0:3ac96e360672 1234 VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO |
charlesmn 0:3ac96e360672 1235 VL53L1_DEVICEREADOUTMODE_SINGLE_SD |
charlesmn 0:3ac96e360672 1236 VL53L1_DEVICEMEASUREMENTMODE_TIMED;
charlesmn 0:3ac96e360672 1237 }
charlesmn 0:3ac96e360672 1238
charlesmn 0:3ac96e360672 1239 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1240
charlesmn 0:3ac96e360672 1241 return status;
charlesmn 0:3ac96e360672 1242 }
charlesmn 0:3ac96e360672 1243
charlesmn 0:3ac96e360672 1244 VL53L1_Error VL53L1_preset_mode_timed_ranging_short_range(
charlesmn 0:3ac96e360672 1245
charlesmn 0:3ac96e360672 1246 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1247 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1248 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1249 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1250 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1251 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1252 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1253 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1254 {
charlesmn 0:3ac96e360672 1255
charlesmn 0:3ac96e360672 1256
charlesmn 0:3ac96e360672 1257 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1258
charlesmn 0:3ac96e360672 1259 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1260
charlesmn 0:3ac96e360672 1261
charlesmn 0:3ac96e360672 1262
charlesmn 0:3ac96e360672 1263 status = VL53L1_preset_mode_standard_ranging_short_range(
charlesmn 0:3ac96e360672 1264 pstatic,
charlesmn 0:3ac96e360672 1265 phistogram,
charlesmn 0:3ac96e360672 1266 pgeneral,
charlesmn 0:3ac96e360672 1267 ptiming,
charlesmn 0:3ac96e360672 1268 pdynamic,
charlesmn 0:3ac96e360672 1269 psystem,
charlesmn 0:3ac96e360672 1270 ptuning_parms,
charlesmn 0:3ac96e360672 1271 pzone_cfg);
charlesmn 0:3ac96e360672 1272
charlesmn 0:3ac96e360672 1273
charlesmn 0:3ac96e360672 1274
charlesmn 0:3ac96e360672 1275 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1276
charlesmn 0:3ac96e360672 1277
charlesmn 0:3ac96e360672 1278
charlesmn 0:3ac96e360672 1279
charlesmn 0:3ac96e360672 1280 pdynamic->system__grouped_parameter_hold = 0x00;
charlesmn 0:3ac96e360672 1281
charlesmn 0:3ac96e360672 1282
charlesmn 0:3ac96e360672 1283
charlesmn 0:3ac96e360672 1284
charlesmn 0:3ac96e360672 1285
charlesmn 0:3ac96e360672 1286 ptiming->range_config__timeout_macrop_a_hi = 0x01;
charlesmn 0:3ac96e360672 1287 ptiming->range_config__timeout_macrop_a_lo = 0x84;
charlesmn 0:3ac96e360672 1288
charlesmn 0:3ac96e360672 1289 ptiming->range_config__timeout_macrop_b_hi = 0x01;
charlesmn 0:3ac96e360672 1290 ptiming->range_config__timeout_macrop_b_lo = 0xB1;
charlesmn 0:3ac96e360672 1291
charlesmn 0:3ac96e360672 1292 ptiming->system__intermeasurement_period = 0x00000600;
charlesmn 0:3ac96e360672 1293 pdynamic->system__seed_config =
charlesmn 0:3ac96e360672 1294 ptuning_parms->tp_timed_seed_cfg;
charlesmn 0:3ac96e360672 1295
charlesmn 0:3ac96e360672 1296
charlesmn 0:3ac96e360672 1297
charlesmn 0:3ac96e360672 1298
charlesmn 0:3ac96e360672 1299 psystem->system__mode_start =
charlesmn 0:3ac96e360672 1300 VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO |
charlesmn 0:3ac96e360672 1301 VL53L1_DEVICEREADOUTMODE_SINGLE_SD |
charlesmn 0:3ac96e360672 1302 VL53L1_DEVICEMEASUREMENTMODE_TIMED;
charlesmn 0:3ac96e360672 1303 }
charlesmn 0:3ac96e360672 1304
charlesmn 0:3ac96e360672 1305 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1306
charlesmn 0:3ac96e360672 1307 return status;
charlesmn 0:3ac96e360672 1308 }
charlesmn 0:3ac96e360672 1309
charlesmn 0:3ac96e360672 1310 VL53L1_Error VL53L1_preset_mode_timed_ranging_long_range(
charlesmn 0:3ac96e360672 1311
charlesmn 0:3ac96e360672 1312 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1313 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1314 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1315 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1316 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1317 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1318 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1319 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1320 {
charlesmn 0:3ac96e360672 1321
charlesmn 0:3ac96e360672 1322
charlesmn 0:3ac96e360672 1323 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1324
charlesmn 0:3ac96e360672 1325 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1326
charlesmn 0:3ac96e360672 1327
charlesmn 0:3ac96e360672 1328
charlesmn 0:3ac96e360672 1329 status = VL53L1_preset_mode_standard_ranging_long_range(
charlesmn 0:3ac96e360672 1330 pstatic,
charlesmn 0:3ac96e360672 1331 phistogram,
charlesmn 0:3ac96e360672 1332 pgeneral,
charlesmn 0:3ac96e360672 1333 ptiming,
charlesmn 0:3ac96e360672 1334 pdynamic,
charlesmn 0:3ac96e360672 1335 psystem,
charlesmn 0:3ac96e360672 1336 ptuning_parms,
charlesmn 0:3ac96e360672 1337 pzone_cfg);
charlesmn 0:3ac96e360672 1338
charlesmn 0:3ac96e360672 1339
charlesmn 0:3ac96e360672 1340
charlesmn 0:3ac96e360672 1341 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1342
charlesmn 0:3ac96e360672 1343
charlesmn 0:3ac96e360672 1344
charlesmn 0:3ac96e360672 1345
charlesmn 0:3ac96e360672 1346 pdynamic->system__grouped_parameter_hold = 0x00;
charlesmn 0:3ac96e360672 1347
charlesmn 0:3ac96e360672 1348
charlesmn 0:3ac96e360672 1349
charlesmn 0:3ac96e360672 1350
charlesmn 0:3ac96e360672 1351
charlesmn 0:3ac96e360672 1352 ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 1353 ptiming->range_config__timeout_macrop_a_lo = 0x97;
charlesmn 0:3ac96e360672 1354
charlesmn 0:3ac96e360672 1355 ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 1356 ptiming->range_config__timeout_macrop_b_lo = 0xB1;
charlesmn 0:3ac96e360672 1357
charlesmn 0:3ac96e360672 1358 ptiming->system__intermeasurement_period = 0x00000600;
charlesmn 0:3ac96e360672 1359 pdynamic->system__seed_config =
charlesmn 0:3ac96e360672 1360 ptuning_parms->tp_timed_seed_cfg;
charlesmn 0:3ac96e360672 1361
charlesmn 0:3ac96e360672 1362
charlesmn 0:3ac96e360672 1363
charlesmn 0:3ac96e360672 1364
charlesmn 0:3ac96e360672 1365 psystem->system__mode_start =
charlesmn 0:3ac96e360672 1366 VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO |
charlesmn 0:3ac96e360672 1367 VL53L1_DEVICEREADOUTMODE_SINGLE_SD |
charlesmn 0:3ac96e360672 1368 VL53L1_DEVICEMEASUREMENTMODE_TIMED;
charlesmn 0:3ac96e360672 1369 }
charlesmn 0:3ac96e360672 1370
charlesmn 0:3ac96e360672 1371 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1372
charlesmn 0:3ac96e360672 1373 return status;
charlesmn 0:3ac96e360672 1374 }
charlesmn 0:3ac96e360672 1375
charlesmn 0:3ac96e360672 1376
charlesmn 0:3ac96e360672 1377 VL53L1_Error VL53L1_preset_mode_low_power_auto_ranging(
charlesmn 0:3ac96e360672 1378
charlesmn 0:3ac96e360672 1379 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1380 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1381 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1382 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1383 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1384 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1385 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1386 VL53L1_zone_config_t *pzone_cfg,
charlesmn 0:3ac96e360672 1387 VL53L1_low_power_auto_data_t *plpadata)
charlesmn 0:3ac96e360672 1388 {
charlesmn 0:3ac96e360672 1389
charlesmn 0:3ac96e360672 1390
charlesmn 0:3ac96e360672 1391 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1392
charlesmn 0:3ac96e360672 1393 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1394
charlesmn 0:3ac96e360672 1395
charlesmn 0:3ac96e360672 1396
charlesmn 0:3ac96e360672 1397 status = VL53L1_preset_mode_timed_ranging(
charlesmn 0:3ac96e360672 1398 pstatic,
charlesmn 0:3ac96e360672 1399 phistogram,
charlesmn 0:3ac96e360672 1400 pgeneral,
charlesmn 0:3ac96e360672 1401 ptiming,
charlesmn 0:3ac96e360672 1402 pdynamic,
charlesmn 0:3ac96e360672 1403 psystem,
charlesmn 0:3ac96e360672 1404 ptuning_parms,
charlesmn 0:3ac96e360672 1405 pzone_cfg);
charlesmn 0:3ac96e360672 1406
charlesmn 0:3ac96e360672 1407
charlesmn 0:3ac96e360672 1408
charlesmn 0:3ac96e360672 1409 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1410 status = VL53L1_config_low_power_auto_mode(
charlesmn 0:3ac96e360672 1411 pgeneral,
charlesmn 0:3ac96e360672 1412 pdynamic,
charlesmn 0:3ac96e360672 1413 plpadata
charlesmn 0:3ac96e360672 1414 );
charlesmn 0:3ac96e360672 1415 }
charlesmn 0:3ac96e360672 1416
charlesmn 0:3ac96e360672 1417 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1418
charlesmn 0:3ac96e360672 1419 return status;
charlesmn 0:3ac96e360672 1420 }
charlesmn 0:3ac96e360672 1421
charlesmn 0:3ac96e360672 1422 VL53L1_Error VL53L1_preset_mode_low_power_auto_short_ranging(
charlesmn 0:3ac96e360672 1423
charlesmn 0:3ac96e360672 1424 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1425 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1426 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1427 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1428 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1429 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1430 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1431 VL53L1_zone_config_t *pzone_cfg,
charlesmn 0:3ac96e360672 1432 VL53L1_low_power_auto_data_t *plpadata)
charlesmn 0:3ac96e360672 1433 {
charlesmn 0:3ac96e360672 1434
charlesmn 0:3ac96e360672 1435
charlesmn 0:3ac96e360672 1436 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1437
charlesmn 0:3ac96e360672 1438 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1439
charlesmn 0:3ac96e360672 1440
charlesmn 0:3ac96e360672 1441
charlesmn 0:3ac96e360672 1442 status = VL53L1_preset_mode_timed_ranging_short_range(
charlesmn 0:3ac96e360672 1443 pstatic,
charlesmn 0:3ac96e360672 1444 phistogram,
charlesmn 0:3ac96e360672 1445 pgeneral,
charlesmn 0:3ac96e360672 1446 ptiming,
charlesmn 0:3ac96e360672 1447 pdynamic,
charlesmn 0:3ac96e360672 1448 psystem,
charlesmn 0:3ac96e360672 1449 ptuning_parms,
charlesmn 0:3ac96e360672 1450 pzone_cfg);
charlesmn 0:3ac96e360672 1451
charlesmn 0:3ac96e360672 1452
charlesmn 0:3ac96e360672 1453
charlesmn 0:3ac96e360672 1454 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1455 status = VL53L1_config_low_power_auto_mode(
charlesmn 0:3ac96e360672 1456 pgeneral,
charlesmn 0:3ac96e360672 1457 pdynamic,
charlesmn 0:3ac96e360672 1458 plpadata
charlesmn 0:3ac96e360672 1459 );
charlesmn 0:3ac96e360672 1460 }
charlesmn 0:3ac96e360672 1461
charlesmn 0:3ac96e360672 1462 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1463
charlesmn 0:3ac96e360672 1464 return status;
charlesmn 0:3ac96e360672 1465 }
charlesmn 0:3ac96e360672 1466
charlesmn 0:3ac96e360672 1467 VL53L1_Error VL53L1_preset_mode_low_power_auto_long_ranging(
charlesmn 0:3ac96e360672 1468
charlesmn 0:3ac96e360672 1469 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1470 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1471 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1472 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1473 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1474 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1475 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1476 VL53L1_zone_config_t *pzone_cfg,
charlesmn 0:3ac96e360672 1477 VL53L1_low_power_auto_data_t *plpadata)
charlesmn 0:3ac96e360672 1478 {
charlesmn 0:3ac96e360672 1479
charlesmn 0:3ac96e360672 1480
charlesmn 0:3ac96e360672 1481 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1482
charlesmn 0:3ac96e360672 1483 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1484
charlesmn 0:3ac96e360672 1485
charlesmn 0:3ac96e360672 1486
charlesmn 0:3ac96e360672 1487 status = VL53L1_preset_mode_timed_ranging_long_range(
charlesmn 0:3ac96e360672 1488 pstatic,
charlesmn 0:3ac96e360672 1489 phistogram,
charlesmn 0:3ac96e360672 1490 pgeneral,
charlesmn 0:3ac96e360672 1491 ptiming,
charlesmn 0:3ac96e360672 1492 pdynamic,
charlesmn 0:3ac96e360672 1493 psystem,
charlesmn 0:3ac96e360672 1494 ptuning_parms,
charlesmn 0:3ac96e360672 1495 pzone_cfg);
charlesmn 0:3ac96e360672 1496
charlesmn 0:3ac96e360672 1497
charlesmn 0:3ac96e360672 1498
charlesmn 0:3ac96e360672 1499 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1500 status = VL53L1_config_low_power_auto_mode(
charlesmn 0:3ac96e360672 1501 pgeneral,
charlesmn 0:3ac96e360672 1502 pdynamic,
charlesmn 0:3ac96e360672 1503 plpadata
charlesmn 0:3ac96e360672 1504 );
charlesmn 0:3ac96e360672 1505 }
charlesmn 0:3ac96e360672 1506
charlesmn 0:3ac96e360672 1507 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1508
charlesmn 0:3ac96e360672 1509 return status;
charlesmn 0:3ac96e360672 1510 }
charlesmn 0:3ac96e360672 1511
charlesmn 0:3ac96e360672 1512
charlesmn 0:3ac96e360672 1513
charlesmn 0:3ac96e360672 1514 VL53L1_Error VL53L1_preset_mode_singleshot_ranging(
charlesmn 0:3ac96e360672 1515
charlesmn 0:3ac96e360672 1516 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1517 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1518 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1519 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1520 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1521 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1522 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1523 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1524 {
charlesmn 0:3ac96e360672 1525
charlesmn 0:3ac96e360672 1526
charlesmn 0:3ac96e360672 1527 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1528
charlesmn 0:3ac96e360672 1529 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1530
charlesmn 0:3ac96e360672 1531
charlesmn 0:3ac96e360672 1532
charlesmn 0:3ac96e360672 1533 status = VL53L1_preset_mode_standard_ranging(
charlesmn 0:3ac96e360672 1534 pstatic,
charlesmn 0:3ac96e360672 1535 phistogram,
charlesmn 0:3ac96e360672 1536 pgeneral,
charlesmn 0:3ac96e360672 1537 ptiming,
charlesmn 0:3ac96e360672 1538 pdynamic,
charlesmn 0:3ac96e360672 1539 psystem,
charlesmn 0:3ac96e360672 1540 ptuning_parms,
charlesmn 0:3ac96e360672 1541 pzone_cfg);
charlesmn 0:3ac96e360672 1542
charlesmn 0:3ac96e360672 1543
charlesmn 0:3ac96e360672 1544
charlesmn 0:3ac96e360672 1545 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1546
charlesmn 0:3ac96e360672 1547
charlesmn 0:3ac96e360672 1548
charlesmn 0:3ac96e360672 1549
charlesmn 0:3ac96e360672 1550 pdynamic->system__grouped_parameter_hold = 0x00;
charlesmn 0:3ac96e360672 1551
charlesmn 0:3ac96e360672 1552
charlesmn 0:3ac96e360672 1553
charlesmn 0:3ac96e360672 1554
charlesmn 0:3ac96e360672 1555 ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 1556 ptiming->range_config__timeout_macrop_a_lo = 0xB1;
charlesmn 0:3ac96e360672 1557
charlesmn 0:3ac96e360672 1558 ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 1559 ptiming->range_config__timeout_macrop_b_lo = 0xD4;
charlesmn 0:3ac96e360672 1560
charlesmn 0:3ac96e360672 1561 pdynamic->system__seed_config =
charlesmn 0:3ac96e360672 1562 ptuning_parms->tp_timed_seed_cfg;
charlesmn 0:3ac96e360672 1563
charlesmn 0:3ac96e360672 1564
charlesmn 0:3ac96e360672 1565
charlesmn 0:3ac96e360672 1566
charlesmn 0:3ac96e360672 1567 psystem->system__mode_start =
charlesmn 0:3ac96e360672 1568 VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO |
charlesmn 0:3ac96e360672 1569 VL53L1_DEVICEREADOUTMODE_SINGLE_SD |
charlesmn 0:3ac96e360672 1570 VL53L1_DEVICEMEASUREMENTMODE_SINGLESHOT;
charlesmn 0:3ac96e360672 1571 }
charlesmn 0:3ac96e360672 1572
charlesmn 0:3ac96e360672 1573 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1574
charlesmn 0:3ac96e360672 1575 return status;
charlesmn 0:3ac96e360672 1576 }
charlesmn 0:3ac96e360672 1577
charlesmn 0:3ac96e360672 1578
charlesmn 0:3ac96e360672 1579 VL53L1_Error VL53L1_preset_mode_histogram_ranging(
charlesmn 0:3ac96e360672 1580 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 1581 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1582 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1583 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1584 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1585 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1586 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1587 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1588 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1589 {
charlesmn 0:3ac96e360672 1590
charlesmn 0:3ac96e360672 1591
charlesmn 0:3ac96e360672 1592 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1593
charlesmn 0:3ac96e360672 1594 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1595
charlesmn 0:3ac96e360672 1596
charlesmn 0:3ac96e360672 1597
charlesmn 0:3ac96e360672 1598 status =
charlesmn 0:3ac96e360672 1599 VL53L1_preset_mode_standard_ranging(
charlesmn 0:3ac96e360672 1600 pstatic,
charlesmn 0:3ac96e360672 1601 phistogram,
charlesmn 0:3ac96e360672 1602 pgeneral,
charlesmn 0:3ac96e360672 1603 ptiming,
charlesmn 0:3ac96e360672 1604 pdynamic,
charlesmn 0:3ac96e360672 1605 psystem,
charlesmn 0:3ac96e360672 1606 ptuning_parms,
charlesmn 0:3ac96e360672 1607 pzone_cfg);
charlesmn 0:3ac96e360672 1608
charlesmn 0:3ac96e360672 1609
charlesmn 0:3ac96e360672 1610
charlesmn 0:3ac96e360672 1611 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1612
charlesmn 0:3ac96e360672 1613
charlesmn 0:3ac96e360672 1614
charlesmn 0:3ac96e360672 1615 pstatic->dss_config__target_total_rate_mcps = 0x1400;
charlesmn 0:3ac96e360672 1616
charlesmn 0:3ac96e360672 1617
charlesmn 0:3ac96e360672 1618
charlesmn 0:3ac96e360672 1619 VL53L1_init_histogram_config_structure(
charlesmn 0:3ac96e360672 1620 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 1621 0, 1, 2, 3, 4, 5,
charlesmn 0:3ac96e360672 1622 phistogram);
charlesmn 0:3ac96e360672 1623
charlesmn 0:3ac96e360672 1624
charlesmn 0:3ac96e360672 1625 VL53L1_init_histogram_multizone_config_structure(
charlesmn 0:3ac96e360672 1626 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 1627 0, 1, 2, 3, 4, 5,
charlesmn 0:3ac96e360672 1628 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 1629
charlesmn 0:3ac96e360672 1630
charlesmn 0:3ac96e360672 1631
charlesmn 0:3ac96e360672 1632
charlesmn 0:3ac96e360672 1633 ptiming->range_config__vcsel_period_a = 0x09;
charlesmn 0:3ac96e360672 1634 ptiming->range_config__vcsel_period_b = 0x0B;
charlesmn 0:3ac96e360672 1635 pdynamic->sd_config__woi_sd0 = 0x09;
charlesmn 0:3ac96e360672 1636 pdynamic->sd_config__woi_sd1 = 0x0B;
charlesmn 0:3ac96e360672 1637
charlesmn 0:3ac96e360672 1638
charlesmn 0:3ac96e360672 1639
charlesmn 0:3ac96e360672 1640
charlesmn 0:3ac96e360672 1641 ptiming->mm_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 1642 ptiming->mm_config__timeout_macrop_a_lo = 0x20;
charlesmn 0:3ac96e360672 1643 ptiming->mm_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 1644 ptiming->mm_config__timeout_macrop_b_lo = 0x1A;
charlesmn 0:3ac96e360672 1645
charlesmn 0:3ac96e360672 1646
charlesmn 0:3ac96e360672 1647 ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 1648 ptiming->range_config__timeout_macrop_a_lo = 0x28;
charlesmn 0:3ac96e360672 1649
charlesmn 0:3ac96e360672 1650
charlesmn 0:3ac96e360672 1651 ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 1652 ptiming->range_config__timeout_macrop_b_lo = 0x21;
charlesmn 0:3ac96e360672 1653
charlesmn 0:3ac96e360672 1654
charlesmn 0:3ac96e360672 1655 pgeneral->phasecal_config__timeout_macrop = 0xF5;
charlesmn 0:3ac96e360672 1656
charlesmn 0:3ac96e360672 1657
charlesmn 0:3ac96e360672 1658
charlesmn 0:3ac96e360672 1659 phistpostprocess->valid_phase_low = 0x08;
charlesmn 0:3ac96e360672 1660 phistpostprocess->valid_phase_high = 0x88;
charlesmn 0:3ac96e360672 1661
charlesmn 0:3ac96e360672 1662
charlesmn 0:3ac96e360672 1663
charlesmn 0:3ac96e360672 1664 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 1665 phistogram,
charlesmn 0:3ac96e360672 1666 pstatic,
charlesmn 0:3ac96e360672 1667 pgeneral,
charlesmn 0:3ac96e360672 1668 ptiming,
charlesmn 0:3ac96e360672 1669 pdynamic);
charlesmn 0:3ac96e360672 1670
charlesmn 0:3ac96e360672 1671
charlesmn 0:3ac96e360672 1672
charlesmn 0:3ac96e360672 1673
charlesmn 0:3ac96e360672 1674 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 1675 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 1676 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 1677 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 1678 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 1679
charlesmn 0:3ac96e360672 1680
charlesmn 0:3ac96e360672 1681 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 1682
charlesmn 0:3ac96e360672 1683
charlesmn 0:3ac96e360672 1684
charlesmn 0:3ac96e360672 1685
charlesmn 0:3ac96e360672 1686 psystem->system__mode_start =
charlesmn 0:3ac96e360672 1687 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM |
charlesmn 0:3ac96e360672 1688 VL53L1_DEVICEREADOUTMODE_DUAL_SD |
charlesmn 0:3ac96e360672 1689 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn 0:3ac96e360672 1690 }
charlesmn 0:3ac96e360672 1691
charlesmn 0:3ac96e360672 1692 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1693
charlesmn 0:3ac96e360672 1694 return status;
charlesmn 0:3ac96e360672 1695 }
charlesmn 0:3ac96e360672 1696
charlesmn 0:3ac96e360672 1697
charlesmn 0:3ac96e360672 1698 VL53L1_Error VL53L1_preset_mode_histogram_ranging_with_mm1(
charlesmn 0:3ac96e360672 1699 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 1700 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1701 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1702 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1703 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1704 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1705 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1706 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1707 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1708 {
charlesmn 0:3ac96e360672 1709
charlesmn 0:3ac96e360672 1710
charlesmn 0:3ac96e360672 1711 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1712
charlesmn 0:3ac96e360672 1713 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1714
charlesmn 0:3ac96e360672 1715
charlesmn 0:3ac96e360672 1716
charlesmn 0:3ac96e360672 1717 status =
charlesmn 0:3ac96e360672 1718 VL53L1_preset_mode_histogram_ranging(
charlesmn 0:3ac96e360672 1719 phistpostprocess,
charlesmn 0:3ac96e360672 1720 pstatic,
charlesmn 0:3ac96e360672 1721 phistogram,
charlesmn 0:3ac96e360672 1722 pgeneral,
charlesmn 0:3ac96e360672 1723 ptiming,
charlesmn 0:3ac96e360672 1724 pdynamic,
charlesmn 0:3ac96e360672 1725 psystem,
charlesmn 0:3ac96e360672 1726 ptuning_parms,
charlesmn 0:3ac96e360672 1727 pzone_cfg);
charlesmn 0:3ac96e360672 1728
charlesmn 0:3ac96e360672 1729
charlesmn 0:3ac96e360672 1730
charlesmn 0:3ac96e360672 1731 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1732
charlesmn 0:3ac96e360672 1733
charlesmn 0:3ac96e360672 1734
charlesmn 0:3ac96e360672 1735 VL53L1_init_histogram_config_structure(
charlesmn 0:3ac96e360672 1736 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 1737 8+0, 8+1, 8+2, 3, 4, 5,
charlesmn 0:3ac96e360672 1738 phistogram);
charlesmn 0:3ac96e360672 1739
charlesmn 0:3ac96e360672 1740
charlesmn 0:3ac96e360672 1741 VL53L1_init_histogram_multizone_config_structure(
charlesmn 0:3ac96e360672 1742 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 1743 8+0, 8+1, 8+2, 3, 4, 5,
charlesmn 0:3ac96e360672 1744 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 1745
charlesmn 0:3ac96e360672 1746
charlesmn 0:3ac96e360672 1747
charlesmn 0:3ac96e360672 1748 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 1749 phistogram,
charlesmn 0:3ac96e360672 1750 pstatic,
charlesmn 0:3ac96e360672 1751 pgeneral,
charlesmn 0:3ac96e360672 1752 ptiming,
charlesmn 0:3ac96e360672 1753 pdynamic);
charlesmn 0:3ac96e360672 1754
charlesmn 0:3ac96e360672 1755
charlesmn 0:3ac96e360672 1756
charlesmn 0:3ac96e360672 1757 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 1758 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 1759 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 1760 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 1761 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 1762 VL53L1_SEQUENCE_MM1_EN |
charlesmn 0:3ac96e360672 1763 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 1764
charlesmn 0:3ac96e360672 1765
charlesmn 0:3ac96e360672 1766
charlesmn 0:3ac96e360672 1767 psystem->system__mode_start =
charlesmn 0:3ac96e360672 1768 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM |
charlesmn 0:3ac96e360672 1769 VL53L1_DEVICEREADOUTMODE_DUAL_SD |
charlesmn 0:3ac96e360672 1770 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn 0:3ac96e360672 1771 }
charlesmn 0:3ac96e360672 1772
charlesmn 0:3ac96e360672 1773 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1774
charlesmn 0:3ac96e360672 1775 return status;
charlesmn 0:3ac96e360672 1776 }
charlesmn 0:3ac96e360672 1777
charlesmn 0:3ac96e360672 1778
charlesmn 0:3ac96e360672 1779 VL53L1_Error VL53L1_preset_mode_histogram_ranging_with_mm2(
charlesmn 0:3ac96e360672 1780 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 1781 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1782 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1783 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1784 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1785 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1786 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1787 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1788 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1789 {
charlesmn 0:3ac96e360672 1790
charlesmn 0:3ac96e360672 1791
charlesmn 0:3ac96e360672 1792 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1793
charlesmn 0:3ac96e360672 1794 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1795
charlesmn 0:3ac96e360672 1796
charlesmn 0:3ac96e360672 1797
charlesmn 0:3ac96e360672 1798 status =
charlesmn 0:3ac96e360672 1799 VL53L1_preset_mode_histogram_ranging_with_mm1(
charlesmn 0:3ac96e360672 1800 phistpostprocess,
charlesmn 0:3ac96e360672 1801 pstatic,
charlesmn 0:3ac96e360672 1802 phistogram,
charlesmn 0:3ac96e360672 1803 pgeneral,
charlesmn 0:3ac96e360672 1804 ptiming,
charlesmn 0:3ac96e360672 1805 pdynamic,
charlesmn 0:3ac96e360672 1806 psystem,
charlesmn 0:3ac96e360672 1807 ptuning_parms,
charlesmn 0:3ac96e360672 1808 pzone_cfg);
charlesmn 0:3ac96e360672 1809
charlesmn 0:3ac96e360672 1810
charlesmn 0:3ac96e360672 1811
charlesmn 0:3ac96e360672 1812 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1813
charlesmn 0:3ac96e360672 1814
charlesmn 0:3ac96e360672 1815
charlesmn 0:3ac96e360672 1816 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 1817 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 1818 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 1819 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 1820 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 1821 VL53L1_SEQUENCE_MM2_EN |
charlesmn 0:3ac96e360672 1822 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 1823 }
charlesmn 0:3ac96e360672 1824
charlesmn 0:3ac96e360672 1825 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1826
charlesmn 0:3ac96e360672 1827 return status;
charlesmn 0:3ac96e360672 1828 }
charlesmn 0:3ac96e360672 1829
charlesmn 0:3ac96e360672 1830
charlesmn 0:3ac96e360672 1831 VL53L1_Error VL53L1_preset_mode_histogram_ranging_mm1_cal(
charlesmn 0:3ac96e360672 1832 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 1833 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1834 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1835 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1836 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1837 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1838 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1839 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1840 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1841 {
charlesmn 0:3ac96e360672 1842
charlesmn 0:3ac96e360672 1843
charlesmn 0:3ac96e360672 1844 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1845
charlesmn 0:3ac96e360672 1846 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1847
charlesmn 0:3ac96e360672 1848
charlesmn 0:3ac96e360672 1849
charlesmn 0:3ac96e360672 1850 status =
charlesmn 0:3ac96e360672 1851 VL53L1_preset_mode_histogram_ranging(
charlesmn 0:3ac96e360672 1852 phistpostprocess,
charlesmn 0:3ac96e360672 1853 pstatic,
charlesmn 0:3ac96e360672 1854 phistogram,
charlesmn 0:3ac96e360672 1855 pgeneral,
charlesmn 0:3ac96e360672 1856 ptiming,
charlesmn 0:3ac96e360672 1857 pdynamic,
charlesmn 0:3ac96e360672 1858 psystem,
charlesmn 0:3ac96e360672 1859 ptuning_parms,
charlesmn 0:3ac96e360672 1860 pzone_cfg);
charlesmn 0:3ac96e360672 1861
charlesmn 0:3ac96e360672 1862
charlesmn 0:3ac96e360672 1863
charlesmn 0:3ac96e360672 1864 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1865
charlesmn 0:3ac96e360672 1866
charlesmn 0:3ac96e360672 1867
charlesmn 0:3ac96e360672 1868 VL53L1_init_histogram_config_structure(
charlesmn 0:3ac96e360672 1869 7, 8+0, 8+1, 8+2, 8+3, 8+4,
charlesmn 0:3ac96e360672 1870 8+0, 8+1, 8+2, 8+3, 8+4, 8+5,
charlesmn 0:3ac96e360672 1871 phistogram);
charlesmn 0:3ac96e360672 1872
charlesmn 0:3ac96e360672 1873
charlesmn 0:3ac96e360672 1874 VL53L1_init_histogram_multizone_config_structure(
charlesmn 0:3ac96e360672 1875 7, 8+0, 8+1, 8+2, 8+3, 8+4,
charlesmn 0:3ac96e360672 1876 8+0, 8+1, 8+2, 8+3, 8+4, 8+5,
charlesmn 0:3ac96e360672 1877 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 1878
charlesmn 0:3ac96e360672 1879
charlesmn 0:3ac96e360672 1880
charlesmn 0:3ac96e360672 1881 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 1882 phistogram,
charlesmn 0:3ac96e360672 1883 pstatic,
charlesmn 0:3ac96e360672 1884 pgeneral,
charlesmn 0:3ac96e360672 1885 ptiming,
charlesmn 0:3ac96e360672 1886 pdynamic);
charlesmn 0:3ac96e360672 1887
charlesmn 0:3ac96e360672 1888
charlesmn 0:3ac96e360672 1889
charlesmn 0:3ac96e360672 1890 pgeneral->dss_config__roi_mode_control =
charlesmn 0:3ac96e360672 1891 VL53L1_DEVICEDSSMODE__REQUESTED_EFFFECTIVE_SPADS;
charlesmn 0:3ac96e360672 1892
charlesmn 0:3ac96e360672 1893
charlesmn 0:3ac96e360672 1894
charlesmn 0:3ac96e360672 1895 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 1896 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 1897 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 1898 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 1899 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 1900 VL53L1_SEQUENCE_MM1_EN |
charlesmn 0:3ac96e360672 1901 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 1902
charlesmn 0:3ac96e360672 1903 }
charlesmn 0:3ac96e360672 1904
charlesmn 0:3ac96e360672 1905 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1906
charlesmn 0:3ac96e360672 1907 return status;
charlesmn 0:3ac96e360672 1908 }
charlesmn 0:3ac96e360672 1909
charlesmn 0:3ac96e360672 1910
charlesmn 0:3ac96e360672 1911 VL53L1_Error VL53L1_preset_mode_histogram_ranging_mm2_cal(
charlesmn 0:3ac96e360672 1912 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 1913 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1914 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1915 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1916 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1917 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1918 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1919 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1920 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1921 {
charlesmn 0:3ac96e360672 1922
charlesmn 0:3ac96e360672 1923
charlesmn 0:3ac96e360672 1924 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1925
charlesmn 0:3ac96e360672 1926 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1927
charlesmn 0:3ac96e360672 1928
charlesmn 0:3ac96e360672 1929
charlesmn 0:3ac96e360672 1930 status =
charlesmn 0:3ac96e360672 1931 VL53L1_preset_mode_histogram_ranging_mm1_cal(
charlesmn 0:3ac96e360672 1932 phistpostprocess,
charlesmn 0:3ac96e360672 1933 pstatic,
charlesmn 0:3ac96e360672 1934 phistogram,
charlesmn 0:3ac96e360672 1935 pgeneral,
charlesmn 0:3ac96e360672 1936 ptiming,
charlesmn 0:3ac96e360672 1937 pdynamic,
charlesmn 0:3ac96e360672 1938 psystem,
charlesmn 0:3ac96e360672 1939 ptuning_parms,
charlesmn 0:3ac96e360672 1940 pzone_cfg);
charlesmn 0:3ac96e360672 1941
charlesmn 0:3ac96e360672 1942 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1943
charlesmn 0:3ac96e360672 1944
charlesmn 0:3ac96e360672 1945
charlesmn 0:3ac96e360672 1946 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 1947 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 1948 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 1949 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 1950 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 1951 VL53L1_SEQUENCE_MM2_EN |
charlesmn 0:3ac96e360672 1952 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 1953
charlesmn 0:3ac96e360672 1954 }
charlesmn 0:3ac96e360672 1955
charlesmn 0:3ac96e360672 1956 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1957
charlesmn 0:3ac96e360672 1958 return status;
charlesmn 0:3ac96e360672 1959 }
charlesmn 0:3ac96e360672 1960
charlesmn 0:3ac96e360672 1961
charlesmn 0:3ac96e360672 1962 VL53L1_Error VL53L1_preset_mode_histogram_ranging_short_timing(
charlesmn 0:3ac96e360672 1963 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 1964 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 1965 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 1966 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 1967 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 1968 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 1969 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 1970 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 1971 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1972 {
charlesmn 0:3ac96e360672 1973
charlesmn 0:3ac96e360672 1974
charlesmn 0:3ac96e360672 1975 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1976
charlesmn 0:3ac96e360672 1977 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1978
charlesmn 0:3ac96e360672 1979
charlesmn 0:3ac96e360672 1980
charlesmn 0:3ac96e360672 1981 status =
charlesmn 0:3ac96e360672 1982 VL53L1_preset_mode_histogram_ranging(
charlesmn 0:3ac96e360672 1983 phistpostprocess,
charlesmn 0:3ac96e360672 1984 pstatic,
charlesmn 0:3ac96e360672 1985 phistogram,
charlesmn 0:3ac96e360672 1986 pgeneral,
charlesmn 0:3ac96e360672 1987 ptiming,
charlesmn 0:3ac96e360672 1988 pdynamic,
charlesmn 0:3ac96e360672 1989 psystem,
charlesmn 0:3ac96e360672 1990 ptuning_parms,
charlesmn 0:3ac96e360672 1991 pzone_cfg);
charlesmn 0:3ac96e360672 1992
charlesmn 0:3ac96e360672 1993
charlesmn 0:3ac96e360672 1994
charlesmn 0:3ac96e360672 1995 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1996
charlesmn 0:3ac96e360672 1997
charlesmn 0:3ac96e360672 1998
charlesmn 0:3ac96e360672 1999 pstatic->dss_config__target_total_rate_mcps = 0x1400;
charlesmn 0:3ac96e360672 2000
charlesmn 0:3ac96e360672 2001
charlesmn 0:3ac96e360672 2002
charlesmn 0:3ac96e360672 2003 VL53L1_init_histogram_config_structure(
charlesmn 0:3ac96e360672 2004 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 2005 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 2006 phistogram);
charlesmn 0:3ac96e360672 2007
charlesmn 0:3ac96e360672 2008
charlesmn 0:3ac96e360672 2009 VL53L1_init_histogram_multizone_config_structure(
charlesmn 0:3ac96e360672 2010 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 2011 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 2012 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 2013
charlesmn 0:3ac96e360672 2014
charlesmn 0:3ac96e360672 2015
charlesmn 0:3ac96e360672 2016 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 2017 phistogram,
charlesmn 0:3ac96e360672 2018 pstatic,
charlesmn 0:3ac96e360672 2019 pgeneral,
charlesmn 0:3ac96e360672 2020 ptiming,
charlesmn 0:3ac96e360672 2021 pdynamic);
charlesmn 0:3ac96e360672 2022
charlesmn 0:3ac96e360672 2023
charlesmn 0:3ac96e360672 2024
charlesmn 0:3ac96e360672 2025 ptiming->range_config__vcsel_period_a = 0x04;
charlesmn 0:3ac96e360672 2026 ptiming->range_config__vcsel_period_b = 0x03;
charlesmn 0:3ac96e360672 2027 ptiming->mm_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 2028 ptiming->mm_config__timeout_macrop_a_lo = 0x42;
charlesmn 0:3ac96e360672 2029 ptiming->mm_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 2030 ptiming->mm_config__timeout_macrop_b_lo = 0x42;
charlesmn 0:3ac96e360672 2031 ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 2032 ptiming->range_config__timeout_macrop_a_lo = 0x52;
charlesmn 0:3ac96e360672 2033 ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 2034 ptiming->range_config__timeout_macrop_b_lo = 0x66;
charlesmn 0:3ac96e360672 2035
charlesmn 0:3ac96e360672 2036 pgeneral->cal_config__vcsel_start = 0x04;
charlesmn 0:3ac96e360672 2037
charlesmn 0:3ac96e360672 2038
charlesmn 0:3ac96e360672 2039
charlesmn 0:3ac96e360672 2040 pgeneral->phasecal_config__timeout_macrop = 0xa4;
charlesmn 0:3ac96e360672 2041
charlesmn 0:3ac96e360672 2042
charlesmn 0:3ac96e360672 2043
charlesmn 0:3ac96e360672 2044 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 2045 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 2046 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 2047 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 2048 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 2049
charlesmn 0:3ac96e360672 2050
charlesmn 0:3ac96e360672 2051 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 2052
charlesmn 0:3ac96e360672 2053
charlesmn 0:3ac96e360672 2054
charlesmn 0:3ac96e360672 2055
charlesmn 0:3ac96e360672 2056 psystem->system__mode_start =
charlesmn 0:3ac96e360672 2057 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM |
charlesmn 0:3ac96e360672 2058 VL53L1_DEVICEREADOUTMODE_DUAL_SD |
charlesmn 0:3ac96e360672 2059 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn 0:3ac96e360672 2060 }
charlesmn 0:3ac96e360672 2061
charlesmn 0:3ac96e360672 2062 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2063
charlesmn 0:3ac96e360672 2064 return status;
charlesmn 0:3ac96e360672 2065 }
charlesmn 0:3ac96e360672 2066
charlesmn 0:3ac96e360672 2067
charlesmn 0:3ac96e360672 2068 VL53L1_Error VL53L1_preset_mode_histogram_long_range(
charlesmn 0:3ac96e360672 2069 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 2070 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 2071 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 2072 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 2073 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 2074 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 2075 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 2076 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 2077 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 2078 {
charlesmn 0:3ac96e360672 2079
charlesmn 0:3ac96e360672 2080
charlesmn 0:3ac96e360672 2081 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2082
charlesmn 0:3ac96e360672 2083 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2084
charlesmn 0:3ac96e360672 2085
charlesmn 0:3ac96e360672 2086
charlesmn 0:3ac96e360672 2087 status =
charlesmn 0:3ac96e360672 2088 VL53L1_preset_mode_histogram_ranging(
charlesmn 0:3ac96e360672 2089 phistpostprocess,
charlesmn 0:3ac96e360672 2090 pstatic,
charlesmn 0:3ac96e360672 2091 phistogram,
charlesmn 0:3ac96e360672 2092 pgeneral,
charlesmn 0:3ac96e360672 2093 ptiming,
charlesmn 0:3ac96e360672 2094 pdynamic,
charlesmn 0:3ac96e360672 2095 psystem,
charlesmn 0:3ac96e360672 2096 ptuning_parms,
charlesmn 0:3ac96e360672 2097 pzone_cfg);
charlesmn 0:3ac96e360672 2098
charlesmn 0:3ac96e360672 2099
charlesmn 0:3ac96e360672 2100
charlesmn 0:3ac96e360672 2101 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2102
charlesmn 0:3ac96e360672 2103
charlesmn 0:3ac96e360672 2104
charlesmn 0:3ac96e360672 2105
charlesmn 0:3ac96e360672 2106
charlesmn 0:3ac96e360672 2107 VL53L1_init_histogram_config_structure(
charlesmn 0:3ac96e360672 2108 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 2109 0, 1, 2, 3, 4, 5,
charlesmn 0:3ac96e360672 2110 phistogram);
charlesmn 0:3ac96e360672 2111
charlesmn 0:3ac96e360672 2112
charlesmn 0:3ac96e360672 2113 VL53L1_init_histogram_multizone_config_structure(
charlesmn 0:3ac96e360672 2114 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 2115 0, 1, 2, 3, 4, 5,
charlesmn 0:3ac96e360672 2116 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 2117
charlesmn 0:3ac96e360672 2118
charlesmn 0:3ac96e360672 2119
charlesmn 0:3ac96e360672 2120 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 2121 phistogram,
charlesmn 0:3ac96e360672 2122 pstatic,
charlesmn 0:3ac96e360672 2123 pgeneral,
charlesmn 0:3ac96e360672 2124 ptiming,
charlesmn 0:3ac96e360672 2125 pdynamic);
charlesmn 0:3ac96e360672 2126
charlesmn 0:3ac96e360672 2127
charlesmn 0:3ac96e360672 2128
charlesmn 0:3ac96e360672 2129 ptiming->range_config__vcsel_period_a = 0x09;
charlesmn 0:3ac96e360672 2130 ptiming->range_config__vcsel_period_b = 0x0b;
charlesmn 0:3ac96e360672 2131
charlesmn 0:3ac96e360672 2132
charlesmn 0:3ac96e360672 2133
charlesmn 0:3ac96e360672 2134 ptiming->mm_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 2135 ptiming->mm_config__timeout_macrop_a_lo = 0x21;
charlesmn 0:3ac96e360672 2136 ptiming->mm_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 2137 ptiming->mm_config__timeout_macrop_b_lo = 0x1b;
charlesmn 0:3ac96e360672 2138
charlesmn 0:3ac96e360672 2139
charlesmn 0:3ac96e360672 2140
charlesmn 0:3ac96e360672 2141 ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 2142 ptiming->range_config__timeout_macrop_a_lo = 0x29;
charlesmn 0:3ac96e360672 2143 ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 2144 ptiming->range_config__timeout_macrop_b_lo = 0x22;
charlesmn 0:3ac96e360672 2145
charlesmn 0:3ac96e360672 2146
charlesmn 0:3ac96e360672 2147
charlesmn 0:3ac96e360672 2148 pgeneral->cal_config__vcsel_start = 0x09;
charlesmn 0:3ac96e360672 2149
charlesmn 0:3ac96e360672 2150
charlesmn 0:3ac96e360672 2151
charlesmn 0:3ac96e360672 2152 pgeneral->phasecal_config__timeout_macrop = 0xF5;
charlesmn 0:3ac96e360672 2153
charlesmn 0:3ac96e360672 2154
charlesmn 0:3ac96e360672 2155
charlesmn 0:3ac96e360672 2156 pdynamic->sd_config__woi_sd0 = 0x09;
charlesmn 0:3ac96e360672 2157 pdynamic->sd_config__woi_sd1 = 0x0B;
charlesmn 0:3ac96e360672 2158 pdynamic->sd_config__initial_phase_sd0 =
charlesmn 0:3ac96e360672 2159 ptuning_parms->tp_init_phase_rtn_hist_long;
charlesmn 0:3ac96e360672 2160 pdynamic->sd_config__initial_phase_sd1 =
charlesmn 0:3ac96e360672 2161 ptuning_parms->tp_init_phase_ref_hist_long;
charlesmn 0:3ac96e360672 2162
charlesmn 0:3ac96e360672 2163
charlesmn 0:3ac96e360672 2164
charlesmn 0:3ac96e360672 2165 phistpostprocess->valid_phase_low = 0x08;
charlesmn 0:3ac96e360672 2166 phistpostprocess->valid_phase_high = 0x88;
charlesmn 0:3ac96e360672 2167
charlesmn 0:3ac96e360672 2168 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 2169 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 2170 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 2171 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 2172 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 2173 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 2174
charlesmn 0:3ac96e360672 2175
charlesmn 0:3ac96e360672 2176
charlesmn 0:3ac96e360672 2177
charlesmn 0:3ac96e360672 2178 psystem->system__mode_start =
charlesmn 0:3ac96e360672 2179 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM |
charlesmn 0:3ac96e360672 2180 VL53L1_DEVICEREADOUTMODE_DUAL_SD |
charlesmn 0:3ac96e360672 2181 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn 0:3ac96e360672 2182 }
charlesmn 0:3ac96e360672 2183
charlesmn 0:3ac96e360672 2184 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2185
charlesmn 0:3ac96e360672 2186 return status;
charlesmn 0:3ac96e360672 2187 }
charlesmn 0:3ac96e360672 2188
charlesmn 0:3ac96e360672 2189
charlesmn 0:3ac96e360672 2190 VL53L1_Error VL53L1_preset_mode_histogram_long_range_mm1(
charlesmn 0:3ac96e360672 2191 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 2192 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 2193 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 2194 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 2195 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 2196 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 2197 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 2198 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 2199 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 2200 {
charlesmn 0:3ac96e360672 2201
charlesmn 0:3ac96e360672 2202
charlesmn 0:3ac96e360672 2203 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2204
charlesmn 0:3ac96e360672 2205 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2206
charlesmn 0:3ac96e360672 2207
charlesmn 0:3ac96e360672 2208
charlesmn 0:3ac96e360672 2209 status =
charlesmn 0:3ac96e360672 2210 VL53L1_preset_mode_histogram_long_range(
charlesmn 0:3ac96e360672 2211 phistpostprocess,
charlesmn 0:3ac96e360672 2212 pstatic,
charlesmn 0:3ac96e360672 2213 phistogram,
charlesmn 0:3ac96e360672 2214 pgeneral,
charlesmn 0:3ac96e360672 2215 ptiming,
charlesmn 0:3ac96e360672 2216 pdynamic,
charlesmn 0:3ac96e360672 2217 psystem,
charlesmn 0:3ac96e360672 2218 ptuning_parms,
charlesmn 0:3ac96e360672 2219 pzone_cfg);
charlesmn 0:3ac96e360672 2220
charlesmn 0:3ac96e360672 2221
charlesmn 0:3ac96e360672 2222
charlesmn 0:3ac96e360672 2223 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2224
charlesmn 0:3ac96e360672 2225
charlesmn 0:3ac96e360672 2226
charlesmn 0:3ac96e360672 2227
charlesmn 0:3ac96e360672 2228
charlesmn 0:3ac96e360672 2229 VL53L1_init_histogram_config_structure(
charlesmn 0:3ac96e360672 2230 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 2231 8+0, 8+1, 8+2, 3, 4, 5,
charlesmn 0:3ac96e360672 2232 phistogram);
charlesmn 0:3ac96e360672 2233
charlesmn 0:3ac96e360672 2234
charlesmn 0:3ac96e360672 2235 VL53L1_init_histogram_multizone_config_structure(
charlesmn 0:3ac96e360672 2236 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 2237 8+0, 8+1, 8+2, 3, 4, 5,
charlesmn 0:3ac96e360672 2238 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 2239
charlesmn 0:3ac96e360672 2240
charlesmn 0:3ac96e360672 2241
charlesmn 0:3ac96e360672 2242 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 2243 phistogram,
charlesmn 0:3ac96e360672 2244 pstatic,
charlesmn 0:3ac96e360672 2245 pgeneral,
charlesmn 0:3ac96e360672 2246 ptiming,
charlesmn 0:3ac96e360672 2247 pdynamic);
charlesmn 0:3ac96e360672 2248
charlesmn 0:3ac96e360672 2249
charlesmn 0:3ac96e360672 2250
charlesmn 0:3ac96e360672 2251 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 2252 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 2253 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 2254 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 2255 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 2256 VL53L1_SEQUENCE_MM1_EN |
charlesmn 0:3ac96e360672 2257 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 2258 }
charlesmn 0:3ac96e360672 2259
charlesmn 0:3ac96e360672 2260 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2261
charlesmn 0:3ac96e360672 2262 return status;
charlesmn 0:3ac96e360672 2263 }
charlesmn 0:3ac96e360672 2264
charlesmn 0:3ac96e360672 2265
charlesmn 0:3ac96e360672 2266 VL53L1_Error VL53L1_preset_mode_histogram_long_range_mm2(
charlesmn 0:3ac96e360672 2267 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 2268 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 2269 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 2270 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 2271 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 2272 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 2273 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 2274 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 2275 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 2276 {
charlesmn 0:3ac96e360672 2277
charlesmn 0:3ac96e360672 2278
charlesmn 0:3ac96e360672 2279 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2280
charlesmn 0:3ac96e360672 2281 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2282
charlesmn 0:3ac96e360672 2283
charlesmn 0:3ac96e360672 2284
charlesmn 0:3ac96e360672 2285 status =
charlesmn 0:3ac96e360672 2286 VL53L1_preset_mode_histogram_long_range_mm1(
charlesmn 0:3ac96e360672 2287 phistpostprocess,
charlesmn 0:3ac96e360672 2288 pstatic,
charlesmn 0:3ac96e360672 2289 phistogram,
charlesmn 0:3ac96e360672 2290 pgeneral,
charlesmn 0:3ac96e360672 2291 ptiming,
charlesmn 0:3ac96e360672 2292 pdynamic,
charlesmn 0:3ac96e360672 2293 psystem,
charlesmn 0:3ac96e360672 2294 ptuning_parms,
charlesmn 0:3ac96e360672 2295 pzone_cfg);
charlesmn 0:3ac96e360672 2296
charlesmn 0:3ac96e360672 2297
charlesmn 0:3ac96e360672 2298
charlesmn 0:3ac96e360672 2299 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2300
charlesmn 0:3ac96e360672 2301
charlesmn 0:3ac96e360672 2302
charlesmn 0:3ac96e360672 2303 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 2304 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 2305 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 2306 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 2307 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 2308 VL53L1_SEQUENCE_MM2_EN |
charlesmn 0:3ac96e360672 2309 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 2310 }
charlesmn 0:3ac96e360672 2311
charlesmn 0:3ac96e360672 2312 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2313
charlesmn 0:3ac96e360672 2314 return status;
charlesmn 0:3ac96e360672 2315 }
charlesmn 0:3ac96e360672 2316
charlesmn 0:3ac96e360672 2317
charlesmn 0:3ac96e360672 2318
charlesmn 0:3ac96e360672 2319 VL53L1_Error VL53L1_preset_mode_histogram_medium_range(
charlesmn 0:3ac96e360672 2320 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 2321 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 2322 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 2323 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 2324 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 2325 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 2326 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 2327 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 2328 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 2329 {
charlesmn 0:3ac96e360672 2330
charlesmn 0:3ac96e360672 2331
charlesmn 0:3ac96e360672 2332 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2333
charlesmn 0:3ac96e360672 2334 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2335
charlesmn 0:3ac96e360672 2336
charlesmn 0:3ac96e360672 2337
charlesmn 0:3ac96e360672 2338 status =
charlesmn 0:3ac96e360672 2339 VL53L1_preset_mode_histogram_ranging(
charlesmn 0:3ac96e360672 2340 phistpostprocess,
charlesmn 0:3ac96e360672 2341 pstatic,
charlesmn 0:3ac96e360672 2342 phistogram,
charlesmn 0:3ac96e360672 2343 pgeneral,
charlesmn 0:3ac96e360672 2344 ptiming,
charlesmn 0:3ac96e360672 2345 pdynamic,
charlesmn 0:3ac96e360672 2346 psystem,
charlesmn 0:3ac96e360672 2347 ptuning_parms,
charlesmn 0:3ac96e360672 2348 pzone_cfg);
charlesmn 0:3ac96e360672 2349
charlesmn 0:3ac96e360672 2350
charlesmn 0:3ac96e360672 2351
charlesmn 0:3ac96e360672 2352 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2353
charlesmn 0:3ac96e360672 2354
charlesmn 0:3ac96e360672 2355
charlesmn 0:3ac96e360672 2356
charlesmn 0:3ac96e360672 2357
charlesmn 0:3ac96e360672 2358 VL53L1_init_histogram_config_structure(
charlesmn 0:3ac96e360672 2359 7, 0, 1, 1, 2, 2,
charlesmn 0:3ac96e360672 2360 0, 1, 2, 1, 2, 3,
charlesmn 0:3ac96e360672 2361 phistogram);
charlesmn 0:3ac96e360672 2362
charlesmn 0:3ac96e360672 2363
charlesmn 0:3ac96e360672 2364 VL53L1_init_histogram_multizone_config_structure(
charlesmn 0:3ac96e360672 2365 7, 0, 1, 1, 2, 2,
charlesmn 0:3ac96e360672 2366 0, 1, 2, 1, 2, 3,
charlesmn 0:3ac96e360672 2367 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 2368
charlesmn 0:3ac96e360672 2369
charlesmn 0:3ac96e360672 2370
charlesmn 0:3ac96e360672 2371 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 2372 phistogram,
charlesmn 0:3ac96e360672 2373 pstatic,
charlesmn 0:3ac96e360672 2374 pgeneral,
charlesmn 0:3ac96e360672 2375 ptiming,
charlesmn 0:3ac96e360672 2376 pdynamic);
charlesmn 0:3ac96e360672 2377
charlesmn 0:3ac96e360672 2378
charlesmn 0:3ac96e360672 2379
charlesmn 0:3ac96e360672 2380 ptiming->range_config__vcsel_period_a = 0x05;
charlesmn 0:3ac96e360672 2381 ptiming->range_config__vcsel_period_b = 0x07;
charlesmn 0:3ac96e360672 2382
charlesmn 0:3ac96e360672 2383
charlesmn 0:3ac96e360672 2384
charlesmn 0:3ac96e360672 2385 ptiming->mm_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 2386 ptiming->mm_config__timeout_macrop_a_lo = 0x36;
charlesmn 0:3ac96e360672 2387 ptiming->mm_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 2388 ptiming->mm_config__timeout_macrop_b_lo = 0x28;
charlesmn 0:3ac96e360672 2389
charlesmn 0:3ac96e360672 2390
charlesmn 0:3ac96e360672 2391
charlesmn 0:3ac96e360672 2392 ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 2393 ptiming->range_config__timeout_macrop_a_lo = 0x44;
charlesmn 0:3ac96e360672 2394 ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 2395 ptiming->range_config__timeout_macrop_b_lo = 0x33;
charlesmn 0:3ac96e360672 2396
charlesmn 0:3ac96e360672 2397
charlesmn 0:3ac96e360672 2398
charlesmn 0:3ac96e360672 2399 pgeneral->cal_config__vcsel_start = 0x05;
charlesmn 0:3ac96e360672 2400
charlesmn 0:3ac96e360672 2401
charlesmn 0:3ac96e360672 2402
charlesmn 0:3ac96e360672 2403 pgeneral->phasecal_config__timeout_macrop = 0xF5;
charlesmn 0:3ac96e360672 2404
charlesmn 0:3ac96e360672 2405
charlesmn 0:3ac96e360672 2406
charlesmn 0:3ac96e360672 2407 pdynamic->sd_config__woi_sd0 = 0x05;
charlesmn 0:3ac96e360672 2408 pdynamic->sd_config__woi_sd1 = 0x07;
charlesmn 0:3ac96e360672 2409 pdynamic->sd_config__initial_phase_sd0 =
charlesmn 0:3ac96e360672 2410 ptuning_parms->tp_init_phase_rtn_hist_med;
charlesmn 0:3ac96e360672 2411 pdynamic->sd_config__initial_phase_sd1 =
charlesmn 0:3ac96e360672 2412 ptuning_parms->tp_init_phase_ref_hist_med;
charlesmn 0:3ac96e360672 2413
charlesmn 0:3ac96e360672 2414
charlesmn 0:3ac96e360672 2415
charlesmn 0:3ac96e360672 2416 phistpostprocess->valid_phase_low = 0x08;
charlesmn 0:3ac96e360672 2417 phistpostprocess->valid_phase_high = 0x48;
charlesmn 0:3ac96e360672 2418
charlesmn 0:3ac96e360672 2419 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 2420 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 2421 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 2422 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 2423 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 2424 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 2425
charlesmn 0:3ac96e360672 2426
charlesmn 0:3ac96e360672 2427
charlesmn 0:3ac96e360672 2428
charlesmn 0:3ac96e360672 2429 psystem->system__mode_start =
charlesmn 0:3ac96e360672 2430 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM |
charlesmn 0:3ac96e360672 2431 VL53L1_DEVICEREADOUTMODE_DUAL_SD |
charlesmn 0:3ac96e360672 2432 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn 0:3ac96e360672 2433 }
charlesmn 0:3ac96e360672 2434
charlesmn 0:3ac96e360672 2435 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2436
charlesmn 0:3ac96e360672 2437 return status;
charlesmn 0:3ac96e360672 2438 }
charlesmn 0:3ac96e360672 2439
charlesmn 0:3ac96e360672 2440
charlesmn 0:3ac96e360672 2441 VL53L1_Error VL53L1_preset_mode_histogram_medium_range_mm1(
charlesmn 0:3ac96e360672 2442 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 2443 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 2444 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 2445 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 2446 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 2447 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 2448 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 2449 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 2450 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 2451 {
charlesmn 0:3ac96e360672 2452
charlesmn 0:3ac96e360672 2453
charlesmn 0:3ac96e360672 2454 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2455
charlesmn 0:3ac96e360672 2456 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2457
charlesmn 0:3ac96e360672 2458
charlesmn 0:3ac96e360672 2459
charlesmn 0:3ac96e360672 2460 status =
charlesmn 0:3ac96e360672 2461 VL53L1_preset_mode_histogram_medium_range(
charlesmn 0:3ac96e360672 2462 phistpostprocess,
charlesmn 0:3ac96e360672 2463 pstatic,
charlesmn 0:3ac96e360672 2464 phistogram,
charlesmn 0:3ac96e360672 2465 pgeneral,
charlesmn 0:3ac96e360672 2466 ptiming,
charlesmn 0:3ac96e360672 2467 pdynamic,
charlesmn 0:3ac96e360672 2468 psystem,
charlesmn 0:3ac96e360672 2469 ptuning_parms,
charlesmn 0:3ac96e360672 2470 pzone_cfg);
charlesmn 0:3ac96e360672 2471
charlesmn 0:3ac96e360672 2472
charlesmn 0:3ac96e360672 2473
charlesmn 0:3ac96e360672 2474 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2475
charlesmn 0:3ac96e360672 2476
charlesmn 0:3ac96e360672 2477
charlesmn 0:3ac96e360672 2478 VL53L1_init_histogram_config_structure(
charlesmn 0:3ac96e360672 2479 7, 0, 1, 1, 2, 2,
charlesmn 0:3ac96e360672 2480 8+0, 8+1, 8+2, 1, 2, 3,
charlesmn 0:3ac96e360672 2481 phistogram);
charlesmn 0:3ac96e360672 2482
charlesmn 0:3ac96e360672 2483
charlesmn 0:3ac96e360672 2484 VL53L1_init_histogram_multizone_config_structure(
charlesmn 0:3ac96e360672 2485 7, 0, 1, 1, 2, 2,
charlesmn 0:3ac96e360672 2486 8+0, 8+1, 8+2, 1, 2, 3,
charlesmn 0:3ac96e360672 2487 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 2488
charlesmn 0:3ac96e360672 2489
charlesmn 0:3ac96e360672 2490
charlesmn 0:3ac96e360672 2491 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 2492 phistogram,
charlesmn 0:3ac96e360672 2493 pstatic,
charlesmn 0:3ac96e360672 2494 pgeneral,
charlesmn 0:3ac96e360672 2495 ptiming,
charlesmn 0:3ac96e360672 2496 pdynamic);
charlesmn 0:3ac96e360672 2497
charlesmn 0:3ac96e360672 2498
charlesmn 0:3ac96e360672 2499
charlesmn 0:3ac96e360672 2500 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 2501 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 2502 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 2503 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 2504 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 2505 VL53L1_SEQUENCE_MM1_EN |
charlesmn 0:3ac96e360672 2506 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 2507 }
charlesmn 0:3ac96e360672 2508
charlesmn 0:3ac96e360672 2509 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2510
charlesmn 0:3ac96e360672 2511 return status;
charlesmn 0:3ac96e360672 2512 }
charlesmn 0:3ac96e360672 2513
charlesmn 0:3ac96e360672 2514
charlesmn 0:3ac96e360672 2515 VL53L1_Error VL53L1_preset_mode_histogram_medium_range_mm2(
charlesmn 0:3ac96e360672 2516 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 2517 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 2518 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 2519 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 2520 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 2521 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 2522 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 2523 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 2524 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 2525 {
charlesmn 0:3ac96e360672 2526
charlesmn 0:3ac96e360672 2527
charlesmn 0:3ac96e360672 2528 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2529
charlesmn 0:3ac96e360672 2530 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2531
charlesmn 0:3ac96e360672 2532
charlesmn 0:3ac96e360672 2533
charlesmn 0:3ac96e360672 2534 status =
charlesmn 0:3ac96e360672 2535 VL53L1_preset_mode_histogram_medium_range_mm1(
charlesmn 0:3ac96e360672 2536 phistpostprocess,
charlesmn 0:3ac96e360672 2537 pstatic,
charlesmn 0:3ac96e360672 2538 phistogram,
charlesmn 0:3ac96e360672 2539 pgeneral,
charlesmn 0:3ac96e360672 2540 ptiming,
charlesmn 0:3ac96e360672 2541 pdynamic,
charlesmn 0:3ac96e360672 2542 psystem,
charlesmn 0:3ac96e360672 2543 ptuning_parms,
charlesmn 0:3ac96e360672 2544 pzone_cfg);
charlesmn 0:3ac96e360672 2545
charlesmn 0:3ac96e360672 2546
charlesmn 0:3ac96e360672 2547
charlesmn 0:3ac96e360672 2548 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2549
charlesmn 0:3ac96e360672 2550
charlesmn 0:3ac96e360672 2551
charlesmn 0:3ac96e360672 2552 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 2553 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 2554 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 2555 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 2556 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 2557 VL53L1_SEQUENCE_MM2_EN |
charlesmn 0:3ac96e360672 2558 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 2559 }
charlesmn 0:3ac96e360672 2560
charlesmn 0:3ac96e360672 2561 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2562
charlesmn 0:3ac96e360672 2563 return status;
charlesmn 0:3ac96e360672 2564 }
charlesmn 0:3ac96e360672 2565
charlesmn 0:3ac96e360672 2566
charlesmn 0:3ac96e360672 2567 VL53L1_Error VL53L1_preset_mode_histogram_short_range(
charlesmn 0:3ac96e360672 2568 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 2569 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 2570 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 2571 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 2572 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 2573 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 2574 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 2575 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 2576 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 2577 {
charlesmn 0:3ac96e360672 2578
charlesmn 0:3ac96e360672 2579
charlesmn 0:3ac96e360672 2580 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2581
charlesmn 0:3ac96e360672 2582 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2583
charlesmn 0:3ac96e360672 2584
charlesmn 0:3ac96e360672 2585
charlesmn 0:3ac96e360672 2586 status =
charlesmn 0:3ac96e360672 2587 VL53L1_preset_mode_histogram_ranging(
charlesmn 0:3ac96e360672 2588 phistpostprocess,
charlesmn 0:3ac96e360672 2589 pstatic,
charlesmn 0:3ac96e360672 2590 phistogram,
charlesmn 0:3ac96e360672 2591 pgeneral,
charlesmn 0:3ac96e360672 2592 ptiming,
charlesmn 0:3ac96e360672 2593 pdynamic,
charlesmn 0:3ac96e360672 2594 psystem,
charlesmn 0:3ac96e360672 2595 ptuning_parms,
charlesmn 0:3ac96e360672 2596 pzone_cfg);
charlesmn 0:3ac96e360672 2597
charlesmn 0:3ac96e360672 2598
charlesmn 0:3ac96e360672 2599
charlesmn 0:3ac96e360672 2600 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2601
charlesmn 0:3ac96e360672 2602
charlesmn 0:3ac96e360672 2603
charlesmn 0:3ac96e360672 2604
charlesmn 0:3ac96e360672 2605
charlesmn 0:3ac96e360672 2606 VL53L1_init_histogram_config_structure(
charlesmn 0:3ac96e360672 2607 7, 7, 0, 1, 1, 1,
charlesmn 0:3ac96e360672 2608 0, 1, 1, 1, 2, 2,
charlesmn 0:3ac96e360672 2609 phistogram);
charlesmn 0:3ac96e360672 2610
charlesmn 0:3ac96e360672 2611
charlesmn 0:3ac96e360672 2612 VL53L1_init_histogram_multizone_config_structure(
charlesmn 0:3ac96e360672 2613 7, 7, 0, 1, 1, 1,
charlesmn 0:3ac96e360672 2614 0, 1, 1, 1, 2, 2,
charlesmn 0:3ac96e360672 2615 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 2616
charlesmn 0:3ac96e360672 2617
charlesmn 0:3ac96e360672 2618
charlesmn 0:3ac96e360672 2619 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 2620 phistogram,
charlesmn 0:3ac96e360672 2621 pstatic,
charlesmn 0:3ac96e360672 2622 pgeneral,
charlesmn 0:3ac96e360672 2623 ptiming,
charlesmn 0:3ac96e360672 2624 pdynamic);
charlesmn 0:3ac96e360672 2625
charlesmn 0:3ac96e360672 2626
charlesmn 0:3ac96e360672 2627
charlesmn 0:3ac96e360672 2628 ptiming->range_config__vcsel_period_a = 0x03;
charlesmn 0:3ac96e360672 2629 ptiming->range_config__vcsel_period_b = 0x05;
charlesmn 0:3ac96e360672 2630
charlesmn 0:3ac96e360672 2631
charlesmn 0:3ac96e360672 2632
charlesmn 0:3ac96e360672 2633 ptiming->mm_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 2634 ptiming->mm_config__timeout_macrop_a_lo = 0x52;
charlesmn 0:3ac96e360672 2635 ptiming->mm_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 2636 ptiming->mm_config__timeout_macrop_b_lo = 0x37;
charlesmn 0:3ac96e360672 2637
charlesmn 0:3ac96e360672 2638
charlesmn 0:3ac96e360672 2639
charlesmn 0:3ac96e360672 2640 ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 2641 ptiming->range_config__timeout_macrop_a_lo = 0x66;
charlesmn 0:3ac96e360672 2642 ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 2643 ptiming->range_config__timeout_macrop_b_lo = 0x44;
charlesmn 0:3ac96e360672 2644
charlesmn 0:3ac96e360672 2645
charlesmn 0:3ac96e360672 2646
charlesmn 0:3ac96e360672 2647 pgeneral->cal_config__vcsel_start = 0x03;
charlesmn 0:3ac96e360672 2648
charlesmn 0:3ac96e360672 2649
charlesmn 0:3ac96e360672 2650
charlesmn 0:3ac96e360672 2651 pgeneral->phasecal_config__timeout_macrop = 0xF5;
charlesmn 0:3ac96e360672 2652
charlesmn 0:3ac96e360672 2653
charlesmn 0:3ac96e360672 2654
charlesmn 0:3ac96e360672 2655 pdynamic->sd_config__woi_sd0 = 0x03;
charlesmn 0:3ac96e360672 2656 pdynamic->sd_config__woi_sd1 = 0x05;
charlesmn 0:3ac96e360672 2657 pdynamic->sd_config__initial_phase_sd0 =
charlesmn 0:3ac96e360672 2658 ptuning_parms->tp_init_phase_rtn_hist_short;
charlesmn 0:3ac96e360672 2659 pdynamic->sd_config__initial_phase_sd1 =
charlesmn 0:3ac96e360672 2660 ptuning_parms->tp_init_phase_ref_hist_short;
charlesmn 0:3ac96e360672 2661
charlesmn 0:3ac96e360672 2662
charlesmn 0:3ac96e360672 2663 phistpostprocess->valid_phase_low = 0x08;
charlesmn 0:3ac96e360672 2664 phistpostprocess->valid_phase_high = 0x28;
charlesmn 0:3ac96e360672 2665
charlesmn 0:3ac96e360672 2666 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 2667 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 2668 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 2669 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 2670 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 2671 VL53L1_SEQUENCE_MM1_EN |
charlesmn 0:3ac96e360672 2672
charlesmn 0:3ac96e360672 2673 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 2674
charlesmn 0:3ac96e360672 2675
charlesmn 0:3ac96e360672 2676
charlesmn 0:3ac96e360672 2677
charlesmn 0:3ac96e360672 2678 psystem->system__mode_start =
charlesmn 0:3ac96e360672 2679 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM |
charlesmn 0:3ac96e360672 2680 VL53L1_DEVICEREADOUTMODE_DUAL_SD |
charlesmn 0:3ac96e360672 2681 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn 0:3ac96e360672 2682 }
charlesmn 0:3ac96e360672 2683
charlesmn 0:3ac96e360672 2684 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2685
charlesmn 0:3ac96e360672 2686 return status;
charlesmn 0:3ac96e360672 2687 }
charlesmn 0:3ac96e360672 2688
charlesmn 0:3ac96e360672 2689
charlesmn 0:3ac96e360672 2690
charlesmn 0:3ac96e360672 2691 VL53L1_Error VL53L1_preset_mode_special_histogram_short_range(
charlesmn 0:3ac96e360672 2692 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 2693 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 2694 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 2695 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 2696 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 2697 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 2698 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 2699 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 2700 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 2701 {
charlesmn 0:3ac96e360672 2702
charlesmn 0:3ac96e360672 2703
charlesmn 0:3ac96e360672 2704 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2705
charlesmn 0:3ac96e360672 2706 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2707
charlesmn 0:3ac96e360672 2708
charlesmn 0:3ac96e360672 2709
charlesmn 0:3ac96e360672 2710 status =
charlesmn 0:3ac96e360672 2711 VL53L1_preset_mode_histogram_short_range(
charlesmn 0:3ac96e360672 2712 phistpostprocess,
charlesmn 0:3ac96e360672 2713 pstatic,
charlesmn 0:3ac96e360672 2714 phistogram,
charlesmn 0:3ac96e360672 2715 pgeneral,
charlesmn 0:3ac96e360672 2716 ptiming,
charlesmn 0:3ac96e360672 2717 pdynamic,
charlesmn 0:3ac96e360672 2718 psystem,
charlesmn 0:3ac96e360672 2719 ptuning_parms,
charlesmn 0:3ac96e360672 2720 pzone_cfg);
charlesmn 0:3ac96e360672 2721
charlesmn 0:3ac96e360672 2722
charlesmn 0:3ac96e360672 2723
charlesmn 0:3ac96e360672 2724 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2725
charlesmn 0:3ac96e360672 2726
charlesmn 0:3ac96e360672 2727
charlesmn 0:3ac96e360672 2728
charlesmn 0:3ac96e360672 2729
charlesmn 0:3ac96e360672 2730 VL53L1_init_histogram_config_structure(
charlesmn 0:3ac96e360672 2731 7, 7, 0, 0, 1, 1,
charlesmn 0:3ac96e360672 2732 0, 0, 0, 1, 1, 1,
charlesmn 0:3ac96e360672 2733 phistogram);
charlesmn 0:3ac96e360672 2734
charlesmn 0:3ac96e360672 2735
charlesmn 0:3ac96e360672 2736 VL53L1_init_histogram_multizone_config_structure(
charlesmn 0:3ac96e360672 2737 7, 7, 0, 0, 1, 1,
charlesmn 0:3ac96e360672 2738 0, 0, 0, 1, 1, 1,
charlesmn 0:3ac96e360672 2739 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 2740
charlesmn 0:3ac96e360672 2741
charlesmn 0:3ac96e360672 2742
charlesmn 0:3ac96e360672 2743 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 2744 phistogram,
charlesmn 0:3ac96e360672 2745 pstatic,
charlesmn 0:3ac96e360672 2746 pgeneral,
charlesmn 0:3ac96e360672 2747 ptiming,
charlesmn 0:3ac96e360672 2748 pdynamic);
charlesmn 0:3ac96e360672 2749
charlesmn 0:3ac96e360672 2750
charlesmn 0:3ac96e360672 2751
charlesmn 0:3ac96e360672 2752 ptiming->range_config__vcsel_period_a = 0x02;
charlesmn 0:3ac96e360672 2753 ptiming->range_config__vcsel_period_b = 0x03;
charlesmn 0:3ac96e360672 2754
charlesmn 0:3ac96e360672 2755
charlesmn 0:3ac96e360672 2756
charlesmn 0:3ac96e360672 2757 pgeneral->cal_config__vcsel_start = 0x00;
charlesmn 0:3ac96e360672 2758
charlesmn 0:3ac96e360672 2759
charlesmn 0:3ac96e360672 2760
charlesmn 0:3ac96e360672 2761 pgeneral->phasecal_config__target = 0x31;
charlesmn 0:3ac96e360672 2762
charlesmn 0:3ac96e360672 2763
charlesmn 0:3ac96e360672 2764
charlesmn 0:3ac96e360672 2765 pdynamic->sd_config__woi_sd0 = 0x02;
charlesmn 0:3ac96e360672 2766 pdynamic->sd_config__woi_sd1 = 0x03;
charlesmn 0:3ac96e360672 2767 pdynamic->sd_config__initial_phase_sd0 =
charlesmn 0:3ac96e360672 2768 ptuning_parms->tp_init_phase_rtn_hist_short;
charlesmn 0:3ac96e360672 2769 pdynamic->sd_config__initial_phase_sd1 =
charlesmn 0:3ac96e360672 2770 ptuning_parms->tp_init_phase_ref_hist_short;
charlesmn 0:3ac96e360672 2771
charlesmn 0:3ac96e360672 2772
charlesmn 0:3ac96e360672 2773
charlesmn 0:3ac96e360672 2774 phistpostprocess->valid_phase_low = 0x10;
charlesmn 0:3ac96e360672 2775 phistpostprocess->valid_phase_high = 0x18;
charlesmn 0:3ac96e360672 2776
charlesmn 0:3ac96e360672 2777 }
charlesmn 0:3ac96e360672 2778
charlesmn 0:3ac96e360672 2779 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2780
charlesmn 0:3ac96e360672 2781 return status;
charlesmn 0:3ac96e360672 2782 }
charlesmn 0:3ac96e360672 2783
charlesmn 0:3ac96e360672 2784
charlesmn 0:3ac96e360672 2785
charlesmn 0:3ac96e360672 2786 VL53L1_Error VL53L1_preset_mode_histogram_short_range_mm1(
charlesmn 0:3ac96e360672 2787 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 2788 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 2789 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 2790 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 2791 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 2792 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 2793 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 2794 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 2795 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 2796 {
charlesmn 0:3ac96e360672 2797
charlesmn 0:3ac96e360672 2798
charlesmn 0:3ac96e360672 2799 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2800
charlesmn 0:3ac96e360672 2801 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2802
charlesmn 0:3ac96e360672 2803
charlesmn 0:3ac96e360672 2804
charlesmn 0:3ac96e360672 2805 status =
charlesmn 0:3ac96e360672 2806 VL53L1_preset_mode_histogram_short_range(
charlesmn 0:3ac96e360672 2807 phistpostprocess,
charlesmn 0:3ac96e360672 2808 pstatic,
charlesmn 0:3ac96e360672 2809 phistogram,
charlesmn 0:3ac96e360672 2810 pgeneral,
charlesmn 0:3ac96e360672 2811 ptiming,
charlesmn 0:3ac96e360672 2812 pdynamic,
charlesmn 0:3ac96e360672 2813 psystem,
charlesmn 0:3ac96e360672 2814 ptuning_parms,
charlesmn 0:3ac96e360672 2815 pzone_cfg);
charlesmn 0:3ac96e360672 2816
charlesmn 0:3ac96e360672 2817
charlesmn 0:3ac96e360672 2818
charlesmn 0:3ac96e360672 2819 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2820
charlesmn 0:3ac96e360672 2821
charlesmn 0:3ac96e360672 2822
charlesmn 0:3ac96e360672 2823
charlesmn 0:3ac96e360672 2824
charlesmn 0:3ac96e360672 2825 VL53L1_init_histogram_config_structure(
charlesmn 0:3ac96e360672 2826 7, 7, 0, 1, 1, 1,
charlesmn 0:3ac96e360672 2827 8+0, 8+1, 1, 1, 2, 2,
charlesmn 0:3ac96e360672 2828 phistogram);
charlesmn 0:3ac96e360672 2829
charlesmn 0:3ac96e360672 2830
charlesmn 0:3ac96e360672 2831 VL53L1_init_histogram_multizone_config_structure(
charlesmn 0:3ac96e360672 2832 7, 7, 0, 1, 1, 1,
charlesmn 0:3ac96e360672 2833 8+0, 8+1, 1, 1, 2, 2,
charlesmn 0:3ac96e360672 2834 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 2835
charlesmn 0:3ac96e360672 2836
charlesmn 0:3ac96e360672 2837
charlesmn 0:3ac96e360672 2838 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 2839 phistogram,
charlesmn 0:3ac96e360672 2840 pstatic,
charlesmn 0:3ac96e360672 2841 pgeneral,
charlesmn 0:3ac96e360672 2842 ptiming,
charlesmn 0:3ac96e360672 2843 pdynamic);
charlesmn 0:3ac96e360672 2844
charlesmn 0:3ac96e360672 2845
charlesmn 0:3ac96e360672 2846
charlesmn 0:3ac96e360672 2847 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 2848 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 2849 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 2850 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 2851 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 2852 VL53L1_SEQUENCE_MM1_EN |
charlesmn 0:3ac96e360672 2853 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 2854
charlesmn 0:3ac96e360672 2855 }
charlesmn 0:3ac96e360672 2856
charlesmn 0:3ac96e360672 2857 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2858
charlesmn 0:3ac96e360672 2859 return status;
charlesmn 0:3ac96e360672 2860 }
charlesmn 0:3ac96e360672 2861
charlesmn 0:3ac96e360672 2862
charlesmn 0:3ac96e360672 2863 VL53L1_Error VL53L1_preset_mode_histogram_short_range_mm2(
charlesmn 0:3ac96e360672 2864 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 2865 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 2866 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 2867 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 2868 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 2869 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 2870 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 2871 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 2872 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 2873 {
charlesmn 0:3ac96e360672 2874
charlesmn 0:3ac96e360672 2875
charlesmn 0:3ac96e360672 2876 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2877
charlesmn 0:3ac96e360672 2878 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2879
charlesmn 0:3ac96e360672 2880
charlesmn 0:3ac96e360672 2881
charlesmn 0:3ac96e360672 2882 status =
charlesmn 0:3ac96e360672 2883 VL53L1_preset_mode_histogram_short_range_mm1(
charlesmn 0:3ac96e360672 2884 phistpostprocess,
charlesmn 0:3ac96e360672 2885 pstatic,
charlesmn 0:3ac96e360672 2886 phistogram,
charlesmn 0:3ac96e360672 2887 pgeneral,
charlesmn 0:3ac96e360672 2888 ptiming,
charlesmn 0:3ac96e360672 2889 pdynamic,
charlesmn 0:3ac96e360672 2890 psystem,
charlesmn 0:3ac96e360672 2891 ptuning_parms,
charlesmn 0:3ac96e360672 2892 pzone_cfg);
charlesmn 0:3ac96e360672 2893
charlesmn 0:3ac96e360672 2894
charlesmn 0:3ac96e360672 2895
charlesmn 0:3ac96e360672 2896 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2897
charlesmn 0:3ac96e360672 2898
charlesmn 0:3ac96e360672 2899
charlesmn 0:3ac96e360672 2900 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 2901 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 2902 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 2903 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 2904 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 2905 VL53L1_SEQUENCE_MM2_EN |
charlesmn 0:3ac96e360672 2906 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 2907 }
charlesmn 0:3ac96e360672 2908
charlesmn 0:3ac96e360672 2909 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2910
charlesmn 0:3ac96e360672 2911 return status;
charlesmn 0:3ac96e360672 2912 }
charlesmn 0:3ac96e360672 2913
charlesmn 0:3ac96e360672 2914
charlesmn 0:3ac96e360672 2915
charlesmn 0:3ac96e360672 2916 VL53L1_Error VL53L1_preset_mode_histogram_characterisation(
charlesmn 0:3ac96e360672 2917 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 2918 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 2919 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 2920 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 2921 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 2922 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 2923 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 2924 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 2925 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 2926 {
charlesmn 0:3ac96e360672 2927
charlesmn 0:3ac96e360672 2928
charlesmn 0:3ac96e360672 2929 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2930
charlesmn 0:3ac96e360672 2931 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2932
charlesmn 0:3ac96e360672 2933
charlesmn 0:3ac96e360672 2934
charlesmn 0:3ac96e360672 2935 status =
charlesmn 0:3ac96e360672 2936 VL53L1_preset_mode_histogram_ranging(
charlesmn 0:3ac96e360672 2937 phistpostprocess,
charlesmn 0:3ac96e360672 2938 pstatic,
charlesmn 0:3ac96e360672 2939 phistogram,
charlesmn 0:3ac96e360672 2940 pgeneral,
charlesmn 0:3ac96e360672 2941 ptiming,
charlesmn 0:3ac96e360672 2942 pdynamic,
charlesmn 0:3ac96e360672 2943 psystem,
charlesmn 0:3ac96e360672 2944 ptuning_parms,
charlesmn 0:3ac96e360672 2945 pzone_cfg);
charlesmn 0:3ac96e360672 2946
charlesmn 0:3ac96e360672 2947
charlesmn 0:3ac96e360672 2948
charlesmn 0:3ac96e360672 2949 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2950
charlesmn 0:3ac96e360672 2951
charlesmn 0:3ac96e360672 2952
charlesmn 0:3ac96e360672 2953 pstatic->debug__ctrl = 0x01;
charlesmn 0:3ac96e360672 2954 psystem->power_management__go1_power_force = 0x01;
charlesmn 0:3ac96e360672 2955
charlesmn 0:3ac96e360672 2956 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 2957 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 2958 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 2959 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 2960
charlesmn 0:3ac96e360672 2961 psystem->system__mode_start =
charlesmn 0:3ac96e360672 2962 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM |
charlesmn 0:3ac96e360672 2963 VL53L1_DEVICEREADOUTMODE_SPLIT_MANUAL |
charlesmn 0:3ac96e360672 2964 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn 0:3ac96e360672 2965 }
charlesmn 0:3ac96e360672 2966
charlesmn 0:3ac96e360672 2967 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2968
charlesmn 0:3ac96e360672 2969 return status;
charlesmn 0:3ac96e360672 2970 }
charlesmn 0:3ac96e360672 2971
charlesmn 0:3ac96e360672 2972
charlesmn 0:3ac96e360672 2973 VL53L1_Error VL53L1_preset_mode_histogram_xtalk_planar(
charlesmn 0:3ac96e360672 2974 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 2975 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 2976 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 2977 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 2978 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 2979 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 2980 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 2981 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 2982 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 2983 {
charlesmn 0:3ac96e360672 2984
charlesmn 0:3ac96e360672 2985
charlesmn 0:3ac96e360672 2986 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2987
charlesmn 0:3ac96e360672 2988 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2989
charlesmn 0:3ac96e360672 2990
charlesmn 0:3ac96e360672 2991
charlesmn 0:3ac96e360672 2992 status =
charlesmn 0:3ac96e360672 2993 VL53L1_preset_mode_histogram_multizone_long_range(
charlesmn 0:3ac96e360672 2994 phistpostprocess,
charlesmn 0:3ac96e360672 2995 pstatic,
charlesmn 0:3ac96e360672 2996 phistogram,
charlesmn 0:3ac96e360672 2997 pgeneral,
charlesmn 0:3ac96e360672 2998 ptiming,
charlesmn 0:3ac96e360672 2999 pdynamic,
charlesmn 0:3ac96e360672 3000 psystem,
charlesmn 0:3ac96e360672 3001 ptuning_parms,
charlesmn 0:3ac96e360672 3002 pzone_cfg);
charlesmn 0:3ac96e360672 3003
charlesmn 0:3ac96e360672 3004
charlesmn 0:3ac96e360672 3005
charlesmn 0:3ac96e360672 3006 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3007
charlesmn 0:3ac96e360672 3008
charlesmn 0:3ac96e360672 3009
charlesmn 0:3ac96e360672 3010 status =
charlesmn 0:3ac96e360672 3011 VL53L1_zone_preset_xtalk_planar(
charlesmn 0:3ac96e360672 3012 pgeneral,
charlesmn 0:3ac96e360672 3013 pzone_cfg);
charlesmn 0:3ac96e360672 3014
charlesmn 0:3ac96e360672 3015
charlesmn 0:3ac96e360672 3016
charlesmn 0:3ac96e360672 3017 ptiming->range_config__vcsel_period_a = 0x09;
charlesmn 0:3ac96e360672 3018 ptiming->range_config__vcsel_period_b = 0x09;
charlesmn 0:3ac96e360672 3019
charlesmn 0:3ac96e360672 3020
charlesmn 0:3ac96e360672 3021
charlesmn 0:3ac96e360672 3022 VL53L1_init_histogram_config_structure(
charlesmn 0:3ac96e360672 3023 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 3024 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 3025 phistogram);
charlesmn 0:3ac96e360672 3026
charlesmn 0:3ac96e360672 3027
charlesmn 0:3ac96e360672 3028
charlesmn 0:3ac96e360672 3029 VL53L1_init_histogram_multizone_config_structure(
charlesmn 0:3ac96e360672 3030 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 3031 7, 0, 1, 2, 3, 4,
charlesmn 0:3ac96e360672 3032 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 3033
charlesmn 0:3ac96e360672 3034
charlesmn 0:3ac96e360672 3035
charlesmn 0:3ac96e360672 3036
charlesmn 0:3ac96e360672 3037 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3038 status =
charlesmn 0:3ac96e360672 3039 VL53L1_set_histogram_multizone_initial_bin_config(
charlesmn 0:3ac96e360672 3040 pzone_cfg,
charlesmn 0:3ac96e360672 3041 phistogram,
charlesmn 0:3ac96e360672 3042 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 3043 }
charlesmn 0:3ac96e360672 3044
charlesmn 0:3ac96e360672 3045
charlesmn 0:3ac96e360672 3046
charlesmn 0:3ac96e360672 3047 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 3048 phistogram,
charlesmn 0:3ac96e360672 3049 pstatic,
charlesmn 0:3ac96e360672 3050 pgeneral,
charlesmn 0:3ac96e360672 3051 ptiming,
charlesmn 0:3ac96e360672 3052 pdynamic);
charlesmn 0:3ac96e360672 3053
charlesmn 0:3ac96e360672 3054 }
charlesmn 0:3ac96e360672 3055
charlesmn 0:3ac96e360672 3056 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3057
charlesmn 0:3ac96e360672 3058 return status;
charlesmn 0:3ac96e360672 3059 }
charlesmn 0:3ac96e360672 3060
charlesmn 0:3ac96e360672 3061 VL53L1_Error VL53L1_preset_mode_histogram_xtalk_mm1(
charlesmn 0:3ac96e360672 3062 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 3063 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 3064 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 3065 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 3066 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 3067 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 3068 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 3069 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 3070 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 3071 {
charlesmn 0:3ac96e360672 3072
charlesmn 0:3ac96e360672 3073
charlesmn 0:3ac96e360672 3074 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3075
charlesmn 0:3ac96e360672 3076 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3077
charlesmn 0:3ac96e360672 3078
charlesmn 0:3ac96e360672 3079
charlesmn 0:3ac96e360672 3080 status =
charlesmn 0:3ac96e360672 3081 VL53L1_preset_mode_histogram_ranging(
charlesmn 0:3ac96e360672 3082 phistpostprocess,
charlesmn 0:3ac96e360672 3083 pstatic,
charlesmn 0:3ac96e360672 3084 phistogram,
charlesmn 0:3ac96e360672 3085 pgeneral,
charlesmn 0:3ac96e360672 3086 ptiming,
charlesmn 0:3ac96e360672 3087 pdynamic,
charlesmn 0:3ac96e360672 3088 psystem,
charlesmn 0:3ac96e360672 3089 ptuning_parms,
charlesmn 0:3ac96e360672 3090 pzone_cfg);
charlesmn 0:3ac96e360672 3091
charlesmn 0:3ac96e360672 3092
charlesmn 0:3ac96e360672 3093
charlesmn 0:3ac96e360672 3094
charlesmn 0:3ac96e360672 3095 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3096
charlesmn 0:3ac96e360672 3097
charlesmn 0:3ac96e360672 3098
charlesmn 0:3ac96e360672 3099
charlesmn 0:3ac96e360672 3100
charlesmn 0:3ac96e360672 3101 VL53L1_init_histogram_config_structure(
charlesmn 0:3ac96e360672 3102 8+7, 8+0, 8+1, 8+2, 8+3, 8+4,
charlesmn 0:3ac96e360672 3103 8+7, 8+0, 8+1, 8+2, 8+3, 8+4,
charlesmn 0:3ac96e360672 3104 phistogram);
charlesmn 0:3ac96e360672 3105
charlesmn 0:3ac96e360672 3106
charlesmn 0:3ac96e360672 3107 VL53L1_init_histogram_multizone_config_structure(
charlesmn 0:3ac96e360672 3108 8+7, 8+0, 8+1, 8+2, 8+3, 8+4,
charlesmn 0:3ac96e360672 3109 8+7, 8+0, 8+1, 8+2, 8+3, 8+4,
charlesmn 0:3ac96e360672 3110 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 3111
charlesmn 0:3ac96e360672 3112
charlesmn 0:3ac96e360672 3113
charlesmn 0:3ac96e360672 3114 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 3115 phistogram,
charlesmn 0:3ac96e360672 3116 pstatic,
charlesmn 0:3ac96e360672 3117 pgeneral,
charlesmn 0:3ac96e360672 3118 ptiming,
charlesmn 0:3ac96e360672 3119 pdynamic);
charlesmn 0:3ac96e360672 3120
charlesmn 0:3ac96e360672 3121
charlesmn 0:3ac96e360672 3122
charlesmn 0:3ac96e360672 3123 ptiming->range_config__vcsel_period_a = 0x09;
charlesmn 0:3ac96e360672 3124 ptiming->range_config__vcsel_period_b = 0x09;
charlesmn 0:3ac96e360672 3125
charlesmn 0:3ac96e360672 3126
charlesmn 0:3ac96e360672 3127
charlesmn 0:3ac96e360672 3128 ptiming->mm_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 3129 ptiming->mm_config__timeout_macrop_a_lo = 0x21;
charlesmn 0:3ac96e360672 3130 ptiming->mm_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 3131 ptiming->mm_config__timeout_macrop_b_lo = 0x21;
charlesmn 0:3ac96e360672 3132
charlesmn 0:3ac96e360672 3133
charlesmn 0:3ac96e360672 3134
charlesmn 0:3ac96e360672 3135 ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn 0:3ac96e360672 3136 ptiming->range_config__timeout_macrop_a_lo = 0x29;
charlesmn 0:3ac96e360672 3137 ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn 0:3ac96e360672 3138 ptiming->range_config__timeout_macrop_b_lo = 0x29;
charlesmn 0:3ac96e360672 3139
charlesmn 0:3ac96e360672 3140
charlesmn 0:3ac96e360672 3141
charlesmn 0:3ac96e360672 3142 pgeneral->cal_config__vcsel_start = 0x09;
charlesmn 0:3ac96e360672 3143
charlesmn 0:3ac96e360672 3144
charlesmn 0:3ac96e360672 3145
charlesmn 0:3ac96e360672 3146 pgeneral->phasecal_config__timeout_macrop = 0xF5;
charlesmn 0:3ac96e360672 3147
charlesmn 0:3ac96e360672 3148
charlesmn 0:3ac96e360672 3149
charlesmn 0:3ac96e360672 3150 pdynamic->sd_config__woi_sd0 = 0x09;
charlesmn 0:3ac96e360672 3151 pdynamic->sd_config__woi_sd1 = 0x09;
charlesmn 0:3ac96e360672 3152 pdynamic->sd_config__initial_phase_sd0 = 0x09;
charlesmn 0:3ac96e360672 3153 pdynamic->sd_config__initial_phase_sd1 = 0x06;
charlesmn 0:3ac96e360672 3154
charlesmn 0:3ac96e360672 3155 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 3156 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 3157 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 3158 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 3159 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 3160 VL53L1_SEQUENCE_MM1_EN |
charlesmn 0:3ac96e360672 3161 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 3162
charlesmn 0:3ac96e360672 3163
charlesmn 0:3ac96e360672 3164
charlesmn 0:3ac96e360672 3165
charlesmn 0:3ac96e360672 3166 psystem->system__mode_start =
charlesmn 0:3ac96e360672 3167 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM |
charlesmn 0:3ac96e360672 3168 VL53L1_DEVICEREADOUTMODE_DUAL_SD |
charlesmn 0:3ac96e360672 3169 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn 0:3ac96e360672 3170 }
charlesmn 0:3ac96e360672 3171
charlesmn 0:3ac96e360672 3172 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3173
charlesmn 0:3ac96e360672 3174 return status;
charlesmn 0:3ac96e360672 3175 }
charlesmn 0:3ac96e360672 3176
charlesmn 0:3ac96e360672 3177
charlesmn 0:3ac96e360672 3178 VL53L1_Error VL53L1_preset_mode_histogram_xtalk_mm2(
charlesmn 0:3ac96e360672 3179 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 3180 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 3181 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 3182 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 3183 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 3184 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 3185 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 3186 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 3187 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 3188 {
charlesmn 0:3ac96e360672 3189
charlesmn 0:3ac96e360672 3190
charlesmn 0:3ac96e360672 3191 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3192
charlesmn 0:3ac96e360672 3193 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3194
charlesmn 0:3ac96e360672 3195
charlesmn 0:3ac96e360672 3196
charlesmn 0:3ac96e360672 3197 status =
charlesmn 0:3ac96e360672 3198 VL53L1_preset_mode_histogram_xtalk_mm1(
charlesmn 0:3ac96e360672 3199 phistpostprocess,
charlesmn 0:3ac96e360672 3200 pstatic,
charlesmn 0:3ac96e360672 3201 phistogram,
charlesmn 0:3ac96e360672 3202 pgeneral,
charlesmn 0:3ac96e360672 3203 ptiming,
charlesmn 0:3ac96e360672 3204 pdynamic,
charlesmn 0:3ac96e360672 3205 psystem,
charlesmn 0:3ac96e360672 3206 ptuning_parms,
charlesmn 0:3ac96e360672 3207 pzone_cfg);
charlesmn 0:3ac96e360672 3208
charlesmn 0:3ac96e360672 3209
charlesmn 0:3ac96e360672 3210 pdynamic->system__sequence_config =
charlesmn 0:3ac96e360672 3211 VL53L1_SEQUENCE_VHV_EN |
charlesmn 0:3ac96e360672 3212 VL53L1_SEQUENCE_PHASECAL_EN |
charlesmn 0:3ac96e360672 3213 VL53L1_SEQUENCE_DSS1_EN |
charlesmn 0:3ac96e360672 3214 VL53L1_SEQUENCE_DSS2_EN |
charlesmn 0:3ac96e360672 3215 VL53L1_SEQUENCE_MM2_EN |
charlesmn 0:3ac96e360672 3216 VL53L1_SEQUENCE_RANGE_EN;
charlesmn 0:3ac96e360672 3217
charlesmn 0:3ac96e360672 3218
charlesmn 0:3ac96e360672 3219
charlesmn 0:3ac96e360672 3220 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3221
charlesmn 0:3ac96e360672 3222 return status;
charlesmn 0:3ac96e360672 3223 }
charlesmn 0:3ac96e360672 3224
charlesmn 0:3ac96e360672 3225
charlesmn 0:3ac96e360672 3226
charlesmn 0:3ac96e360672 3227
charlesmn 0:3ac96e360672 3228 VL53L1_Error VL53L1_preset_mode_histogram_multizone(
charlesmn 0:3ac96e360672 3229 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 3230 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 3231 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 3232 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 3233 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 3234 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 3235 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 3236 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 3237 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 3238 {
charlesmn 0:3ac96e360672 3239
charlesmn 0:3ac96e360672 3240
charlesmn 0:3ac96e360672 3241 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3242
charlesmn 0:3ac96e360672 3243 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3244
charlesmn 0:3ac96e360672 3245
charlesmn 0:3ac96e360672 3246
charlesmn 0:3ac96e360672 3247 status =
charlesmn 0:3ac96e360672 3248 VL53L1_preset_mode_histogram_medium_range(
charlesmn 0:3ac96e360672 3249 phistpostprocess,
charlesmn 0:3ac96e360672 3250 pstatic,
charlesmn 0:3ac96e360672 3251 phistogram,
charlesmn 0:3ac96e360672 3252 pgeneral,
charlesmn 0:3ac96e360672 3253 ptiming,
charlesmn 0:3ac96e360672 3254 pdynamic,
charlesmn 0:3ac96e360672 3255 psystem,
charlesmn 0:3ac96e360672 3256 ptuning_parms,
charlesmn 0:3ac96e360672 3257 pzone_cfg);
charlesmn 0:3ac96e360672 3258
charlesmn 0:3ac96e360672 3259
charlesmn 0:3ac96e360672 3260
charlesmn 0:3ac96e360672 3261 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3262
charlesmn 0:3ac96e360672 3263
charlesmn 0:3ac96e360672 3264
charlesmn 0:3ac96e360672 3265 status =
charlesmn 0:3ac96e360672 3266 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 3267 4, 8, 2,
charlesmn 0:3ac96e360672 3268 4, 8, 2,
charlesmn 0:3ac96e360672 3269 7, 7,
charlesmn 0:3ac96e360672 3270 pzone_cfg);
charlesmn 0:3ac96e360672 3271
charlesmn 0:3ac96e360672 3272 pgeneral->global_config__stream_divider =
charlesmn 0:3ac96e360672 3273 pzone_cfg->active_zones + 1;
charlesmn 0:3ac96e360672 3274
charlesmn 0:3ac96e360672 3275
charlesmn 0:3ac96e360672 3276
charlesmn 0:3ac96e360672 3277 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3278 status =
charlesmn 0:3ac96e360672 3279 VL53L1_set_histogram_multizone_initial_bin_config(
charlesmn 0:3ac96e360672 3280 pzone_cfg,
charlesmn 0:3ac96e360672 3281 phistogram,
charlesmn 0:3ac96e360672 3282 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 3283 }
charlesmn 0:3ac96e360672 3284
charlesmn 0:3ac96e360672 3285 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 3286 phistogram,
charlesmn 0:3ac96e360672 3287 pstatic,
charlesmn 0:3ac96e360672 3288 pgeneral,
charlesmn 0:3ac96e360672 3289 ptiming,
charlesmn 0:3ac96e360672 3290 pdynamic);
charlesmn 0:3ac96e360672 3291 }
charlesmn 0:3ac96e360672 3292
charlesmn 0:3ac96e360672 3293 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3294
charlesmn 0:3ac96e360672 3295 return status;
charlesmn 0:3ac96e360672 3296 }
charlesmn 0:3ac96e360672 3297
charlesmn 0:3ac96e360672 3298 VL53L1_Error VL53L1_preset_mode_histogram_multizone_short_range(
charlesmn 0:3ac96e360672 3299 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 3300 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 3301 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 3302 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 3303 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 3304 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 3305 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 3306 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 3307 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 3308 {
charlesmn 0:3ac96e360672 3309
charlesmn 0:3ac96e360672 3310
charlesmn 0:3ac96e360672 3311 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3312
charlesmn 0:3ac96e360672 3313 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3314
charlesmn 0:3ac96e360672 3315
charlesmn 0:3ac96e360672 3316
charlesmn 0:3ac96e360672 3317 status =
charlesmn 0:3ac96e360672 3318 VL53L1_preset_mode_histogram_short_range(
charlesmn 0:3ac96e360672 3319 phistpostprocess,
charlesmn 0:3ac96e360672 3320 pstatic,
charlesmn 0:3ac96e360672 3321 phistogram,
charlesmn 0:3ac96e360672 3322 pgeneral,
charlesmn 0:3ac96e360672 3323 ptiming,
charlesmn 0:3ac96e360672 3324 pdynamic,
charlesmn 0:3ac96e360672 3325 psystem,
charlesmn 0:3ac96e360672 3326 ptuning_parms,
charlesmn 0:3ac96e360672 3327 pzone_cfg);
charlesmn 0:3ac96e360672 3328
charlesmn 0:3ac96e360672 3329
charlesmn 0:3ac96e360672 3330
charlesmn 0:3ac96e360672 3331 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3332
charlesmn 0:3ac96e360672 3333
charlesmn 0:3ac96e360672 3334
charlesmn 0:3ac96e360672 3335 status =
charlesmn 0:3ac96e360672 3336 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 3337 4, 8, 2,
charlesmn 0:3ac96e360672 3338 4, 8, 2,
charlesmn 0:3ac96e360672 3339 7, 7,
charlesmn 0:3ac96e360672 3340 pzone_cfg);
charlesmn 0:3ac96e360672 3341
charlesmn 0:3ac96e360672 3342 pgeneral->global_config__stream_divider =
charlesmn 0:3ac96e360672 3343 pzone_cfg->active_zones + 1;
charlesmn 0:3ac96e360672 3344
charlesmn 0:3ac96e360672 3345
charlesmn 0:3ac96e360672 3346
charlesmn 0:3ac96e360672 3347 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3348 status =
charlesmn 0:3ac96e360672 3349 VL53L1_set_histogram_multizone_initial_bin_config(
charlesmn 0:3ac96e360672 3350 pzone_cfg,
charlesmn 0:3ac96e360672 3351 phistogram,
charlesmn 0:3ac96e360672 3352 &(pzone_cfg->multizone_hist_cfg)
charlesmn 0:3ac96e360672 3353 );
charlesmn 0:3ac96e360672 3354 }
charlesmn 0:3ac96e360672 3355
charlesmn 0:3ac96e360672 3356
charlesmn 0:3ac96e360672 3357
charlesmn 0:3ac96e360672 3358 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 3359 phistogram,
charlesmn 0:3ac96e360672 3360 pstatic,
charlesmn 0:3ac96e360672 3361 pgeneral,
charlesmn 0:3ac96e360672 3362 ptiming,
charlesmn 0:3ac96e360672 3363 pdynamic);
charlesmn 0:3ac96e360672 3364 }
charlesmn 0:3ac96e360672 3365
charlesmn 0:3ac96e360672 3366 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3367
charlesmn 0:3ac96e360672 3368 return status;
charlesmn 0:3ac96e360672 3369 }
charlesmn 0:3ac96e360672 3370
charlesmn 0:3ac96e360672 3371
charlesmn 0:3ac96e360672 3372 VL53L1_Error VL53L1_preset_mode_histogram_multizone_long_range(
charlesmn 0:3ac96e360672 3373 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 3374 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 3375 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 3376 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 3377 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 3378 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 3379 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 3380 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 3381 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 3382 {
charlesmn 0:3ac96e360672 3383
charlesmn 0:3ac96e360672 3384
charlesmn 0:3ac96e360672 3385 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3386
charlesmn 0:3ac96e360672 3387 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3388
charlesmn 0:3ac96e360672 3389
charlesmn 0:3ac96e360672 3390
charlesmn 0:3ac96e360672 3391 status =
charlesmn 0:3ac96e360672 3392 VL53L1_preset_mode_histogram_long_range(
charlesmn 0:3ac96e360672 3393 phistpostprocess,
charlesmn 0:3ac96e360672 3394 pstatic,
charlesmn 0:3ac96e360672 3395 phistogram,
charlesmn 0:3ac96e360672 3396 pgeneral,
charlesmn 0:3ac96e360672 3397 ptiming,
charlesmn 0:3ac96e360672 3398 pdynamic,
charlesmn 0:3ac96e360672 3399 psystem,
charlesmn 0:3ac96e360672 3400 ptuning_parms,
charlesmn 0:3ac96e360672 3401 pzone_cfg);
charlesmn 0:3ac96e360672 3402
charlesmn 0:3ac96e360672 3403
charlesmn 0:3ac96e360672 3404
charlesmn 0:3ac96e360672 3405 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3406
charlesmn 0:3ac96e360672 3407
charlesmn 0:3ac96e360672 3408
charlesmn 0:3ac96e360672 3409 status =
charlesmn 0:3ac96e360672 3410 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 3411 4, 8, 2,
charlesmn 0:3ac96e360672 3412 4, 8, 2,
charlesmn 0:3ac96e360672 3413 7, 7,
charlesmn 0:3ac96e360672 3414 pzone_cfg);
charlesmn 0:3ac96e360672 3415
charlesmn 0:3ac96e360672 3416 pgeneral->global_config__stream_divider =
charlesmn 0:3ac96e360672 3417 pzone_cfg->active_zones + 1;
charlesmn 0:3ac96e360672 3418
charlesmn 0:3ac96e360672 3419
charlesmn 0:3ac96e360672 3420
charlesmn 0:3ac96e360672 3421 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3422 status =
charlesmn 0:3ac96e360672 3423 VL53L1_set_histogram_multizone_initial_bin_config(
charlesmn 0:3ac96e360672 3424 pzone_cfg,
charlesmn 0:3ac96e360672 3425 phistogram,
charlesmn 0:3ac96e360672 3426 &(pzone_cfg->multizone_hist_cfg));
charlesmn 0:3ac96e360672 3427 }
charlesmn 0:3ac96e360672 3428
charlesmn 0:3ac96e360672 3429
charlesmn 0:3ac96e360672 3430
charlesmn 0:3ac96e360672 3431 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 3432 phistogram,
charlesmn 0:3ac96e360672 3433 pstatic,
charlesmn 0:3ac96e360672 3434 pgeneral,
charlesmn 0:3ac96e360672 3435 ptiming,
charlesmn 0:3ac96e360672 3436 pdynamic);
charlesmn 0:3ac96e360672 3437 }
charlesmn 0:3ac96e360672 3438
charlesmn 0:3ac96e360672 3439 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3440
charlesmn 0:3ac96e360672 3441 return status;
charlesmn 0:3ac96e360672 3442 }
charlesmn 0:3ac96e360672 3443
charlesmn 0:3ac96e360672 3444
charlesmn 0:3ac96e360672 3445
charlesmn 0:3ac96e360672 3446
charlesmn 0:3ac96e360672 3447 VL53L1_Error VL53L1_preset_mode_olt(
charlesmn 0:3ac96e360672 3448 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 3449 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 3450 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 3451 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 3452 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 3453 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 3454 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 3455 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 3456 {
charlesmn 0:3ac96e360672 3457
charlesmn 0:3ac96e360672 3458
charlesmn 0:3ac96e360672 3459 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3460
charlesmn 0:3ac96e360672 3461 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3462
charlesmn 0:3ac96e360672 3463
charlesmn 0:3ac96e360672 3464
charlesmn 0:3ac96e360672 3465 status = VL53L1_preset_mode_standard_ranging(
charlesmn 0:3ac96e360672 3466 pstatic,
charlesmn 0:3ac96e360672 3467 phistogram,
charlesmn 0:3ac96e360672 3468 pgeneral,
charlesmn 0:3ac96e360672 3469 ptiming,
charlesmn 0:3ac96e360672 3470 pdynamic,
charlesmn 0:3ac96e360672 3471 psystem,
charlesmn 0:3ac96e360672 3472 ptuning_parms,
charlesmn 0:3ac96e360672 3473 pzone_cfg);
charlesmn 0:3ac96e360672 3474
charlesmn 0:3ac96e360672 3475
charlesmn 0:3ac96e360672 3476
charlesmn 0:3ac96e360672 3477 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3478
charlesmn 0:3ac96e360672 3479 psystem->system__stream_count_ctrl = 0x01;
charlesmn 0:3ac96e360672 3480
charlesmn 0:3ac96e360672 3481 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3482
charlesmn 0:3ac96e360672 3483 return status;
charlesmn 0:3ac96e360672 3484 }
charlesmn 0:3ac96e360672 3485
charlesmn 0:3ac96e360672 3486
charlesmn 0:3ac96e360672 3487 void VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 3488 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 3489 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 3490 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 3491 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 3492 VL53L1_dynamic_config_t *pdynamic)
charlesmn 0:3ac96e360672 3493 {
charlesmn 0:3ac96e360672 3494
charlesmn 0:3ac96e360672 3495
charlesmn 0:3ac96e360672 3496 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3497
charlesmn 0:3ac96e360672 3498 SUPPRESS_UNUSED_WARNING(pgeneral);
charlesmn 0:3ac96e360672 3499
charlesmn 0:3ac96e360672 3500 pstatic->sigma_estimator__effective_pulse_width_ns =
charlesmn 0:3ac96e360672 3501 phistogram->histogram_config__high_amb_even_bin_0_1;
charlesmn 0:3ac96e360672 3502 pstatic->sigma_estimator__effective_ambient_width_ns =
charlesmn 0:3ac96e360672 3503 phistogram->histogram_config__high_amb_even_bin_2_3;
charlesmn 0:3ac96e360672 3504 pstatic->sigma_estimator__sigma_ref_mm =
charlesmn 0:3ac96e360672 3505 phistogram->histogram_config__high_amb_even_bin_4_5;
charlesmn 0:3ac96e360672 3506
charlesmn 0:3ac96e360672 3507 pstatic->algo__crosstalk_compensation_valid_height_mm =
charlesmn 0:3ac96e360672 3508 phistogram->histogram_config__high_amb_odd_bin_0_1;
charlesmn 0:3ac96e360672 3509
charlesmn 0:3ac96e360672 3510 pstatic->spare_host_config__static_config_spare_0 =
charlesmn 0:3ac96e360672 3511 phistogram->histogram_config__high_amb_odd_bin_2_3;
charlesmn 0:3ac96e360672 3512 pstatic->spare_host_config__static_config_spare_1 =
charlesmn 0:3ac96e360672 3513 phistogram->histogram_config__high_amb_odd_bin_4_5;
charlesmn 0:3ac96e360672 3514
charlesmn 0:3ac96e360672 3515 pstatic->algo__range_ignore_threshold_mcps =
charlesmn 0:3ac96e360672 3516 (((uint16_t)phistogram->histogram_config__mid_amb_even_bin_0_1)
charlesmn 0:3ac96e360672 3517 << 8)
charlesmn 0:3ac96e360672 3518 + (uint16_t)phistogram->histogram_config__mid_amb_even_bin_2_3;
charlesmn 0:3ac96e360672 3519
charlesmn 0:3ac96e360672 3520 pstatic->algo__range_ignore_valid_height_mm =
charlesmn 0:3ac96e360672 3521 phistogram->histogram_config__mid_amb_even_bin_4_5;
charlesmn 0:3ac96e360672 3522 pstatic->algo__range_min_clip =
charlesmn 0:3ac96e360672 3523 phistogram->histogram_config__mid_amb_odd_bin_0_1;
charlesmn 0:3ac96e360672 3524 pstatic->algo__consistency_check__tolerance =
charlesmn 0:3ac96e360672 3525 phistogram->histogram_config__mid_amb_odd_bin_2;
charlesmn 0:3ac96e360672 3526
charlesmn 0:3ac96e360672 3527 pstatic->spare_host_config__static_config_spare_2 =
charlesmn 0:3ac96e360672 3528 phistogram->histogram_config__mid_amb_odd_bin_3_4;
charlesmn 0:3ac96e360672 3529 pstatic->sd_config__reset_stages_msb =
charlesmn 0:3ac96e360672 3530 phistogram->histogram_config__mid_amb_odd_bin_5;
charlesmn 0:3ac96e360672 3531
charlesmn 0:3ac96e360672 3532 pstatic->sd_config__reset_stages_lsb =
charlesmn 0:3ac96e360672 3533 phistogram->histogram_config__user_bin_offset;
charlesmn 0:3ac96e360672 3534
charlesmn 0:3ac96e360672 3535 ptiming->range_config__sigma_thresh =
charlesmn 0:3ac96e360672 3536 (((uint16_t)phistogram->histogram_config__low_amb_even_bin_0_1)
charlesmn 0:3ac96e360672 3537 << 8)
charlesmn 0:3ac96e360672 3538 + (uint16_t)phistogram->histogram_config__low_amb_even_bin_2_3;
charlesmn 0:3ac96e360672 3539
charlesmn 0:3ac96e360672 3540 ptiming->range_config__min_count_rate_rtn_limit_mcps =
charlesmn 0:3ac96e360672 3541 (((uint16_t)phistogram->histogram_config__low_amb_even_bin_4_5)
charlesmn 0:3ac96e360672 3542 << 8)
charlesmn 0:3ac96e360672 3543 + (uint16_t)phistogram->histogram_config__low_amb_odd_bin_0_1;
charlesmn 0:3ac96e360672 3544
charlesmn 0:3ac96e360672 3545 ptiming->range_config__valid_phase_low =
charlesmn 0:3ac96e360672 3546 phistogram->histogram_config__low_amb_odd_bin_2_3;
charlesmn 0:3ac96e360672 3547 ptiming->range_config__valid_phase_high =
charlesmn 0:3ac96e360672 3548 phistogram->histogram_config__low_amb_odd_bin_4_5;
charlesmn 0:3ac96e360672 3549
charlesmn 0:3ac96e360672 3550 pdynamic->system__thresh_high =
charlesmn 0:3ac96e360672 3551 phistogram->histogram_config__amb_thresh_low;
charlesmn 0:3ac96e360672 3552
charlesmn 0:3ac96e360672 3553 pdynamic->system__thresh_low =
charlesmn 0:3ac96e360672 3554 phistogram->histogram_config__amb_thresh_high;
charlesmn 0:3ac96e360672 3555
charlesmn 0:3ac96e360672 3556 pdynamic->system__enable_xtalk_per_quadrant =
charlesmn 0:3ac96e360672 3557 phistogram->histogram_config__spad_array_selection;
charlesmn 0:3ac96e360672 3558
charlesmn 0:3ac96e360672 3559 LOG_FUNCTION_END(0);
charlesmn 0:3ac96e360672 3560
charlesmn 0:3ac96e360672 3561 }
charlesmn 0:3ac96e360672 3562
charlesmn 0:3ac96e360672 3563 void VL53L1_copy_hist_bins_to_static_cfg(
charlesmn 0:3ac96e360672 3564 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 3565 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 3566 VL53L1_timing_config_t *ptiming)
charlesmn 0:3ac96e360672 3567 {
charlesmn 0:3ac96e360672 3568
charlesmn 0:3ac96e360672 3569
charlesmn 0:3ac96e360672 3570 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3571
charlesmn 0:3ac96e360672 3572 pstatic->sigma_estimator__effective_pulse_width_ns =
charlesmn 0:3ac96e360672 3573 phistogram->histogram_config__high_amb_even_bin_0_1;
charlesmn 0:3ac96e360672 3574 pstatic->sigma_estimator__effective_ambient_width_ns =
charlesmn 0:3ac96e360672 3575 phistogram->histogram_config__high_amb_even_bin_2_3;
charlesmn 0:3ac96e360672 3576 pstatic->sigma_estimator__sigma_ref_mm =
charlesmn 0:3ac96e360672 3577 phistogram->histogram_config__high_amb_even_bin_4_5;
charlesmn 0:3ac96e360672 3578
charlesmn 0:3ac96e360672 3579 pstatic->algo__crosstalk_compensation_valid_height_mm =
charlesmn 0:3ac96e360672 3580 phistogram->histogram_config__high_amb_odd_bin_0_1;
charlesmn 0:3ac96e360672 3581
charlesmn 0:3ac96e360672 3582 pstatic->spare_host_config__static_config_spare_0 =
charlesmn 0:3ac96e360672 3583 phistogram->histogram_config__high_amb_odd_bin_2_3;
charlesmn 0:3ac96e360672 3584 pstatic->spare_host_config__static_config_spare_1 =
charlesmn 0:3ac96e360672 3585 phistogram->histogram_config__high_amb_odd_bin_4_5;
charlesmn 0:3ac96e360672 3586
charlesmn 0:3ac96e360672 3587 pstatic->algo__range_ignore_threshold_mcps =
charlesmn 0:3ac96e360672 3588 (((uint16_t)phistogram->histogram_config__mid_amb_even_bin_0_1)
charlesmn 0:3ac96e360672 3589 << 8)
charlesmn 0:3ac96e360672 3590 + (uint16_t)phistogram->histogram_config__mid_amb_even_bin_2_3;
charlesmn 0:3ac96e360672 3591
charlesmn 0:3ac96e360672 3592 pstatic->algo__range_ignore_valid_height_mm =
charlesmn 0:3ac96e360672 3593 phistogram->histogram_config__mid_amb_even_bin_4_5;
charlesmn 0:3ac96e360672 3594 pstatic->algo__range_min_clip =
charlesmn 0:3ac96e360672 3595 phistogram->histogram_config__mid_amb_odd_bin_0_1;
charlesmn 0:3ac96e360672 3596 pstatic->algo__consistency_check__tolerance =
charlesmn 0:3ac96e360672 3597 phistogram->histogram_config__mid_amb_odd_bin_2;
charlesmn 0:3ac96e360672 3598
charlesmn 0:3ac96e360672 3599 pstatic->spare_host_config__static_config_spare_2 =
charlesmn 0:3ac96e360672 3600 phistogram->histogram_config__mid_amb_odd_bin_3_4;
charlesmn 0:3ac96e360672 3601 pstatic->sd_config__reset_stages_msb =
charlesmn 0:3ac96e360672 3602 phistogram->histogram_config__mid_amb_odd_bin_5;
charlesmn 0:3ac96e360672 3603
charlesmn 0:3ac96e360672 3604 ptiming->range_config__sigma_thresh =
charlesmn 0:3ac96e360672 3605 (((uint16_t)phistogram->histogram_config__low_amb_even_bin_0_1)
charlesmn 0:3ac96e360672 3606 << 8)
charlesmn 0:3ac96e360672 3607 + (uint16_t)phistogram->histogram_config__low_amb_even_bin_2_3;
charlesmn 0:3ac96e360672 3608
charlesmn 0:3ac96e360672 3609 ptiming->range_config__min_count_rate_rtn_limit_mcps =
charlesmn 0:3ac96e360672 3610 (((uint16_t)phistogram->histogram_config__low_amb_even_bin_4_5)
charlesmn 0:3ac96e360672 3611 << 8)
charlesmn 0:3ac96e360672 3612 + (uint16_t)phistogram->histogram_config__low_amb_odd_bin_0_1;
charlesmn 0:3ac96e360672 3613
charlesmn 0:3ac96e360672 3614 ptiming->range_config__valid_phase_low =
charlesmn 0:3ac96e360672 3615 phistogram->histogram_config__low_amb_odd_bin_2_3;
charlesmn 0:3ac96e360672 3616 ptiming->range_config__valid_phase_high =
charlesmn 0:3ac96e360672 3617 phistogram->histogram_config__low_amb_odd_bin_4_5;
charlesmn 0:3ac96e360672 3618
charlesmn 0:3ac96e360672 3619 LOG_FUNCTION_END(0);
charlesmn 0:3ac96e360672 3620
charlesmn 0:3ac96e360672 3621 }
charlesmn 0:3ac96e360672 3622
charlesmn 0:3ac96e360672 3623
charlesmn 0:3ac96e360672 3624 VL53L1_Error VL53L1_preset_mode_histogram_ranging_ref(
charlesmn 0:3ac96e360672 3625 VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn 0:3ac96e360672 3626 VL53L1_static_config_t *pstatic,
charlesmn 0:3ac96e360672 3627 VL53L1_histogram_config_t *phistogram,
charlesmn 0:3ac96e360672 3628 VL53L1_general_config_t *pgeneral,
charlesmn 0:3ac96e360672 3629 VL53L1_timing_config_t *ptiming,
charlesmn 0:3ac96e360672 3630 VL53L1_dynamic_config_t *pdynamic,
charlesmn 0:3ac96e360672 3631 VL53L1_system_control_t *psystem,
charlesmn 0:3ac96e360672 3632 VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn 0:3ac96e360672 3633 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 3634 {
charlesmn 0:3ac96e360672 3635
charlesmn 0:3ac96e360672 3636
charlesmn 0:3ac96e360672 3637 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3638
charlesmn 0:3ac96e360672 3639 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3640
charlesmn 0:3ac96e360672 3641
charlesmn 0:3ac96e360672 3642
charlesmn 0:3ac96e360672 3643 status =
charlesmn 0:3ac96e360672 3644 VL53L1_preset_mode_histogram_ranging(
charlesmn 0:3ac96e360672 3645 phistpostprocess,
charlesmn 0:3ac96e360672 3646 pstatic,
charlesmn 0:3ac96e360672 3647 phistogram,
charlesmn 0:3ac96e360672 3648 pgeneral,
charlesmn 0:3ac96e360672 3649 ptiming,
charlesmn 0:3ac96e360672 3650 pdynamic,
charlesmn 0:3ac96e360672 3651 psystem,
charlesmn 0:3ac96e360672 3652 ptuning_parms,
charlesmn 0:3ac96e360672 3653 pzone_cfg);
charlesmn 0:3ac96e360672 3654
charlesmn 0:3ac96e360672 3655
charlesmn 0:3ac96e360672 3656
charlesmn 0:3ac96e360672 3657 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3658
charlesmn 0:3ac96e360672 3659
charlesmn 0:3ac96e360672 3660
charlesmn 0:3ac96e360672 3661 phistogram->histogram_config__spad_array_selection = 0x01;
charlesmn 0:3ac96e360672 3662
charlesmn 0:3ac96e360672 3663
charlesmn 0:3ac96e360672 3664
charlesmn 0:3ac96e360672 3665 VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn 0:3ac96e360672 3666 phistogram,
charlesmn 0:3ac96e360672 3667 pstatic,
charlesmn 0:3ac96e360672 3668 pgeneral,
charlesmn 0:3ac96e360672 3669 ptiming,
charlesmn 0:3ac96e360672 3670 pdynamic);
charlesmn 0:3ac96e360672 3671 }
charlesmn 0:3ac96e360672 3672
charlesmn 0:3ac96e360672 3673 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3674
charlesmn 0:3ac96e360672 3675 return status;
charlesmn 0:3ac96e360672 3676 }
charlesmn 0:3ac96e360672 3677
charlesmn 0:3ac96e360672 3678
charlesmn 0:3ac96e360672 3679
charlesmn 0:3ac96e360672 3680
charlesmn 0:3ac96e360672 3681